From 45e4676797c2b6efc859159df99cf71680bdce6f Mon Sep 17 00:00:00 2001 From: dragonmux Date: Wed, 15 Jan 2025 06:32:27 +0000 Subject: [PATCH 1/3] adiv5_jtag: Turned out that the DP version number is not the same as the protocol version. Adjust the low-level impl accordingly. --- src/target/adiv5_jtag.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/target/adiv5_jtag.c b/src/target/adiv5_jtag.c index 9be38aaaa6b..3f958218fa3 100644 --- a/src/target/adiv5_jtag.c +++ b/src/target/adiv5_jtag.c @@ -154,7 +154,7 @@ uint32_t adiv5_jtag_raw_access( } /* If this is an ADIv6 JTAG-DPv1, check for fault */ - if (dp->version > 0 && ack == JTAG_ADIv6_ACK_FAULT) { + if (dp->version > 2 && ack == JTAG_ADIv6_ACK_FAULT) { DEBUG_ERROR("JTAG access resulted in fault\n"); /* Use the SWD ack codes for the fault code to be completely consistent between JTAG-vs-SWD */ dp->fault = SWD_ACK_FAULT; @@ -162,13 +162,13 @@ uint32_t adiv5_jtag_raw_access( } /* Check for a not-OK ack under ADIv5 JTAG-DPv0, or ADIv6 JTAG-DPv1 */ - if ((dp->version == 0 && ack != JTAG_ADIv5_ACK_OK) || (dp->version > 0 && ack != JTAG_ADIv6_ACK_OK)) { + if ((dp->version < 3 && ack != JTAG_ADIv5_ACK_OK) || (dp->version > 2 && ack != JTAG_ADIv6_ACK_OK)) { DEBUG_ERROR("JTAG access resulted in: %" PRIx32 ":%x\n", result, ack); raise_exception(EXCEPTION_ERROR, "JTAG-DP invalid ACK"); } /* ADIv6 needs 8 idle cycles run after we get done to ensure the state machine is idle */ - if (dp->version > 0) + if (dp->version > 2) jtag_proc.jtagtap_cycle(false, false, 8); return result; } From b55b6e3ea9d677765890887ea9cc12d86cd190bf Mon Sep 17 00:00:00 2001 From: dragonmux Date: Wed, 15 Jan 2025 06:47:15 +0000 Subject: [PATCH 2/3] adiv5_jtag: Properly dispatch the Cortex-M33/TEALDAP PARTNO code --- src/target/adiv5.h | 4 ++-- src/target/adiv5_jtag.c | 5 ++--- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/src/target/adiv5.h b/src/target/adiv5.h index c28dcb699a8..6e23108bfd3 100644 --- a/src/target/adiv5.h +++ b/src/target/adiv5.h @@ -220,8 +220,8 @@ #define JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA 0xba01U /* - * ARM JTAG PARTNO values from Cortex-M33 TRM (ARM document ID 100230, issue 0100) - * A.4.2.2 Identification Code register, IDCODE, Table A-13 pg98 + * ARM JTAG PARTNO values from Cortex-M33 TRM (ARM document ID 100230, issue 0100_03) + * Appendix A, §A.4.2 Identification Code register, IDCODE, Table A-13 pg130 * (for TEALDAP/CM33DAP MINDP SWJ-DP/JTAG-DP) */ #define JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33 0xba04U diff --git a/src/target/adiv5_jtag.c b/src/target/adiv5_jtag.c index 3f958218fa3..fc9d01ac892 100644 --- a/src/target/adiv5_jtag.c +++ b/src/target/adiv5_jtag.c @@ -83,12 +83,11 @@ void adiv5_jtag_dp_handler(const uint8_t dev_index) /* Correct the LPC43xx errata PARTNO values */ if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA) dp->partno = JTAG_IDCODE_PARTNO_SOC400_4BIT; - /* Correct the GD32E50x PARTNO value */ - else if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33) - dp->partno = JTAG_IDCODE_PARTNO_SOC400_4BIT; if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT || dp->partno == JTAG_IDCODE_PARTNO_SOC400_8BIT) dp->version = 0U; + else if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33) + dp->version = 1U; else if (dp->partno == JTAG_IDCODE_PARTNO_SOC600_4BIT || dp->partno == JTAG_IDCODE_PARTNO_SOC600_8BIT) dp->version = 3U; else From d64349278fd3c3bac13ecfc926275a2f9a1e89c2 Mon Sep 17 00:00:00 2001 From: dragonmux Date: Wed, 15 Jan 2025 06:53:37 +0000 Subject: [PATCH 3/3] adiv5_jtag: Properly dispatch the LPC43xx PARTNO code --- src/target/adiv5.h | 7 +++---- src/target/adiv5_jtag.c | 7 ++----- 2 files changed, 5 insertions(+), 9 deletions(-) diff --git a/src/target/adiv5.h b/src/target/adiv5.h index 6e23108bfd3..198ddc6cb12 100644 --- a/src/target/adiv5.h +++ b/src/target/adiv5.h @@ -213,11 +213,10 @@ #define JTAG_IDCODE_PARTNO_SOC400_4BIT 0xba00U #define JTAG_IDCODE_PARTNO_SOC400_8BIT 0xba03U /* - * This PARTNO value comes from the LPC43xx parts which have a bugged pair of TAPs. - * This value is actually reserved as a SWD-DPv1 value, but appears anyway on those devices - * for the second and third JTAG-DPs which are still JTAG-DPv0. + * This PARTNO value comes from the LPC43xx parts which have a pair of Cortex-M0's using DPv1 TAPs. + * Value lifted from UM10503, §50.9 JTAG TAP Identification, Table 1170, pg1355 */ -#define JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA 0xba01U +#define JTAG_IDCODE_PARTNO_SOC400_4BIT_LPC43xx 0xba01U /* * ARM JTAG PARTNO values from Cortex-M33 TRM (ARM document ID 100230, issue 0100_03) diff --git a/src/target/adiv5_jtag.c b/src/target/adiv5_jtag.c index fc9d01ac892..6667a658866 100644 --- a/src/target/adiv5_jtag.c +++ b/src/target/adiv5_jtag.c @@ -80,13 +80,10 @@ void adiv5_jtag_dp_handler(const uint8_t dev_index) /* Check which version of DP we have here, if it's an ARM-made DP, and set up `dp->version` accordingly */ if (dp->designer_code == JEP106_MANUFACTURER_ARM) { - /* Correct the LPC43xx errata PARTNO values */ - if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_ERRATA) - dp->partno = JTAG_IDCODE_PARTNO_SOC400_4BIT; - if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT || dp->partno == JTAG_IDCODE_PARTNO_SOC400_8BIT) dp->version = 0U; - else if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33) + else if (dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_CM33 || + dp->partno == JTAG_IDCODE_PARTNO_SOC400_4BIT_LPC43xx) dp->version = 1U; else if (dp->partno == JTAG_IDCODE_PARTNO_SOC600_4BIT || dp->partno == JTAG_IDCODE_PARTNO_SOC600_8BIT) dp->version = 3U;