flist

./chip_top/AnyCore_Chip.sv
./core_top/DebugConfig.sv
./core_top/PerfMon.sv
./core_top/PowerManager.sv
./core_top/RegisterConsolidate.sv
./core_top/Core_OOO.sv
./core_top/ResetControl.sv
./ISA/RISCV_ISA.sv
./bist/LogicBist.sv
./bist/MemBist.sv
./dcache/DCache_controller.sv
./decode/Decode.sv
./decode/Decode_RISCV.sv
./decode/InstBufRename.sv
./decode/InstructionBuffer.sv
./decode/InstructionBuffer_Lane.sv
./decode/PreDecode_RISCV.sv
./decode/ppa_decode.sv
./dispatch/Dispatch.sv
./dispatch/ExePipeScheduler.sv
./dispatch/ldViolationPred.sv
./dispatch/ppa_dispatch.sv
./execute/AGEN_ALU.sv
./execute/AgenLsu.sv
./execute/Complex_ALU.sv
./execute/Ctrl_ALU.sv
./execute/Demux.sv
./execute/Execute_Ctrl.sv
./execute/Execute_M.sv
./execute/Execute_SC.sv
./execute/ExecutionPipe_Ctrl.sv
./execute/ExecutionPipe_M.sv
./execute/ExecutionPipe_SC.sv
./execute/FP_ALU.sv
./execute/ForwardCheck.sv
./execute/Mux.sv
./execute/Simple_ALU.sv
./execute/ppa_execute_ctrl.sv
./execute/ppa_execute_m.sv
./execute/ppa_execute_sc.sv
./fetch/BTB.sv
./fetch/BranchPrediction_2-bit.sv
./fetch/CtrlQueue.sv
./fetch/Fetch1Fetch2.sv
./fetch/Fetch2Decode.sv
./fetch/FetchStage1.sv
./fetch/FetchStage2.sv
./fetch/L1ICache.sv
./fetch/RAS.sv
./fetch/SelectInst.sv
./fetch/ppa_fetch1.sv
./fetch/ppa_fetch2.sv
./fetch/BranchPredictionGshare.sv
./icache/ICache_controller.sv
./issue/AgeOrdering.sv
./issue/Encoder.sv
./issue/FreeIssueq.sv
./issue/IssueLane.sv
./issue/IssuePartition.sv
./issue/IssueQFreeList.sv
./issue/IssueQRegRead.sv
./issue/IssueQueue.sv
./issue/PriorityEncoder.sv
./issue/PriorityEncoderRR.sv
./issue/RSR.sv
./issue/RSRLane.sv
./issue/Select.sv
./issue/SelectBetweenBlocks.sv
./issue/SelectBlock.sv
./issue/SelectFromBlock.sv
./issue/IssueQueuePartitioned.sv
./lib/PGIsolationCell.sv
./lib/PipeLineReg.sv
./lib/clk_gater_fg.sv
./lib/clk_gater_ul.sv
./lsu/CommitLoad.sv
./lsu/CommitStore.sv
./lsu/DispatchedLoad.sv
./lsu/DispatchedStore.sv
./lsu/L1DataCache.sv
./lsu/LDX_path.sv
./lsu/LDX_path_structured.sv
./lsu/LSUControl.sv
./lsu/LSUDatapath.sv
./lsu/LoadStoreUnit.sv
./lsu/STX_path.sv
./lsu/STX_path_structured.sv
./rams/ALCTRL_RAM.sv
./rams/ALDATA_RAM.sv
./rams/ALNPC_RAM.sv
./rams/ALREADY_RAM.sv
./rams/ALVIO_RAM.sv
./rams/AMT_RAM.sv
./rams/BP_RAM.sv
./rams/BTB_RAM.sv
./rams/CTI_COMMIT_RAM.sv
./rams/CTI_COUNTER_RAM.sv
./rams/DEBUG_DATA_RAM.sv
./rams/DEBUG_INST_RAM.sv
./rams/FREELIST_RAM.sv
./rams/IBUFF_RAM.sv
./rams/IQFREELIST_RAM.sv
./rams/IQPAYLOAD_RAM.sv
./rams/LDQ_CAM.sv
./rams/LDVIO_RAM.sv
./rams/PRF_RAM.sv
./rams/RAM_1R1W.sv
./rams/RAM_1R2W.sv
./rams/RAM_4R1W.sv
./rams/RAM_8R4W.sv
./rams/RAS_RAM.sv
./rams/RMT_RAM.sv
./rams/STQ_CAM.sv
./rams/STQ_FOLLOWINGLD_RAM.sv
./rams/STQ_RAM.sv
./rams/WAKEUP_CAM.sv
./rams/LDQ_RAM.sv
./rams/LDVIO_VLD_RAM.sv
./rams/BP_RAM_GSHARE.sv
./rams/ALEXCPT_RAM.sv
./rams_configurable/CAM_PARTITIONED.sv
./rams_configurable/CAM_RAM_PARTITIONED.sv
./rams_configurable/CAM_RAM_STATIC_CONFIG.sv
./rams_configurable/CAM_STATIC_CONFIG.sv
./rams_configurable/RAM_CONFIGURABLE.sv
./rams_configurable/RAM_PARTITIONED.sv
./rams_configurable/RAM_PARTITIONED_NO_DECODE.sv
./rams_configurable/RAM_PARTITIONED_SHARED_DECODE.sv
./rams_configurable/RAM_PG_1R1W.sv
./rams_configurable/RAM_PG_2R1W.sv
./rams_configurable/RAM_STATIC_CONFIG.sv
./rams_configurable/RAM_STATIC_CONFIG_NO_DECODE.sv
./regRead/Bypass_1D.sv
./regRead/Bypass_2D.sv
./regRead/Bypass_3D.sv
./regRead/Bypass_4D.sv
./regRead/PhyRegFile.sv
./regRead/RegRead.sv
./regRead/RegReadExecute.sv
./regRead/SupRegFile.sv
./regRead/PhyRegFileBytePipelined.sv
./rename/Rename.sv
./rename/RenameDispatch.sv
./rename/RenameLane.sv
./rename/RenameMapTable.sv
./rename/SpecFreeList.sv
./rename/ppa_rename.sv
./retire/ActiveList.sv
./retire/ArchMapTable.sv
./testbenches/RAM_CONFIGURABLE_tb.sv
./testbenches/RAM_PARTITIONED_tb.sv
./testbenches/RAM_STATIC_CONFIG_tb.sv
./testbenches/l2.sv
./testbenches/l2_dcache.sv
./testbenches/l2_icache.sv
./testbenches/memory_hier.sv
./testbenches/simulate.sv
./testbenches/simulate_chip.sv
./testbenches/simulate_chip_power.sv
./testbenches/simulate_chip_reconfig.sv
./testbenches/simulate_chip_reconfig_power.sv
./testbenches/simulate_power.sv
./testbenches/simulate_reconfig.sv
./testbenches/simulate_reconfig_power.sv
./testbenches/Debug_Prints.sv
./testbenches/Task_Lib.sv
./testbenches/Gshare_behavioral.sv
./writeback/Writeback_Ctrl.sv
./writeback/Writeback_M.sv
./writeback/Writeback_SC.sv
./rams_partitioned/ALCTRL_RAM_PARTITIONED.sv
./rams_partitioned/ALDATA_RAM_PARTITIONED.sv
./rams_partitioned/ALNPC_RAM_PARTITIONED.sv
./rams_partitioned/FREELIST_RAM_PARTITIONED.sv
./rams_partitioned/IQFREELIST_RAM_PARTITIONED.sv
./rams_partitioned/IQPAYLOAD_RAM_PARTITIONED.sv
./rams_partitioned/LDQ_CAM_PARTITIONED.sv
./rams_partitioned/LDQ_RAM_PARTITIONED.sv
./rams_partitioned/PRF_RAM_PARTITIONED.sv
./rams_partitioned/STQ_CAM_PARTITIONED.sv
./rams_partitioned/STQ_FOLLOWINGLD_RAM_PARTITIONED.sv
./rams_partitioned/STQ_RAM_PARTITIONED.sv
./rams_partitioned/WAKEUP_CAM_PARTITIONED.sv
./configs/Config1.v
./configs/DynamicConfig.v
./configs/DynamicConfig_ANY1.v
./configs/StaticConfig1.v
./configs/StaticConfig2.v
./configs/StaticConfig2_ANY1.v
./configs/StaticConfig3.v
./configs/StaticConfig4.v
./configs/StaticConfig5.v
./configs/StaticConfig6.v
./configs/one-wide.v
./configs/two-wide.v
./serdes/Depacketizer.v
./serdes/Depacketizer_split.v
./serdes/Depacketizer_wide.v
./serdes/Packetizer.v
./serdes/Packetizer_split.v
./serdes/Packetizer_wide.v
./serdes/asym_fifo_2c.v