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[MERGE #2486 @ThomsonTan] Discard extra bits for left shift on arm
Merge pull request #2486 from ThomsonTan:FixShiftPeepsOnArm We use `<<` in Lowerer::PeepShl to convert SHR+SHL to AND. `<<` on ARM is implemented via LSL which generates all 0 when shift count is larger than 32. This is inconsistent to implement `<<` in JavaScript which only shift the lower 5-bit. See https://developer.mozilla.org/en-US/docs/Web/JavaScript/Reference/Operators/Bitwise_Operators#Left_shift.
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# VIM | ||
.*.swo | ||
.*.swp | ||
tags | ||
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# VS Code | ||
.vscode/ | ||
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28442624 | ||
28442624 |
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//------------------------------------------------------------------------------------------------------- | ||
// Copyright (C) Microsoft. All rights reserved. | ||
// Licensed under the MIT license. See LICENSE.txt file in the project root for full license information. | ||
//------------------------------------------------------------------------------------------------------- | ||
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function test0() { | ||
WScript.Echo(28510759.1 >> 49 << 49) | ||
} | ||
test0(); | ||
test0(); |
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