From 2d73c0334c2b80a83ee3d4415e5c72d36084581f Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Fri, 13 Sep 2024 18:20:55 +0100 Subject: [PATCH 01/19] Fix compile errors for templated functions --- TrackletAlgorithm/TrackBuilder.h | 2 +- emData/generate_TB.py | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/TrackletAlgorithm/TrackBuilder.h b/TrackletAlgorithm/TrackBuilder.h index d4302fc35ee..7bccf6fd2c0 100644 --- a/TrackletAlgorithm/TrackBuilder.h +++ b/TrackletAlgorithm/TrackBuilder.h @@ -104,7 +104,7 @@ class Merger { }; // TrackBuilder top template function -template +template void TrackBuilder( const BXType bx, const TrackletParameterMemory1 trackletParameters1[], diff --git a/emData/generate_TB.py b/emData/generate_TB.py index 34b82ae083a..4a9a21ffbe7 100755 --- a/emData/generate_TB.py +++ b/emData/generate_TB.py @@ -122,9 +122,9 @@ class ITC(Enum): "template constexpr int getNumDiskFMMemPerStub();\n" "template constexpr int getNumBarrelStub();\n" "template constexpr int getNumDiskStub();\n" - "template int getMPARNPages(const ITCType &);\n" - "template int getMPARMem(const ITCType &);\n" - "template int getMPARPage(const ITCType &);\n" + "template constexpr int getMPARNPages(const ITCType &);\n" + "template inline int getMPARMem(const ITCType &);\n" + "template constexpr int getMPARPage(const ITCType &);\n" ) # Calculate parameters and print out top function for each TB. @@ -177,7 +177,7 @@ class ITC(Enum): nParentheses = 0 first = True maxNPages = max([len(tpar) - len("MPAR_L1L2") for tpar in tparMems[tbName]]) - getMPARNPages = "template<> int\n" + getMPARNPages = "template<> constexpr int\n" getMPARNPages += "getMPARNPages(const ITCType &iTC) {\n" getMPARNPages += " return " for i in range(1, maxNPages): @@ -201,7 +201,7 @@ class ITC(Enum): # definition of getMPARMem function nParentheses = 0 - getMPARMem = "template<> int\n" + getMPARMem = "template<> inline int\n" getMPARMem += "getMPARMem(const ITCType &iTC) {\n" getMPARMem += " return " for i in range(0, max(nTPARMem) - 1): @@ -226,7 +226,7 @@ class ITC(Enum): # definition of getMPARPage function nParentheses = 0 - getMPARPage = "template<> int\n" + getMPARPage = "template<> constexpr int\n" getMPARPage += "getMPARPage(const ITCType &iTC) {\n" getMPARPage += " return " for i in range(0, maxNPages - 1): From 67b785f5c65878c351cecfcf2bca718d3b642b32 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Tue, 17 Sep 2024 16:31:01 +0100 Subject: [PATCH 02/19] Fixed clashes with Future SW code --- TrackletAlgorithm/MemoryTemplate.h | 33 ++++++----- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 65 ++++++++-------------- TrackletAlgorithm/MemoryTemplateTPROJ.h | 57 +++++++------------ 3 files changed, 61 insertions(+), 94 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index 2b6500f5d7e..c9c0a4c0d57 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -31,10 +31,14 @@ template // (1< BunchXingT; @@ -42,20 +46,20 @@ class MemoryTemplate protected: - DataType dataarray_[1< index) const { @@ -108,7 +112,7 @@ class MemoryTemplate #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline if(!NBIT_BX) ibx = 0; - if (addr_index < (1< overwrite) { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline if(!NBIT_BX) ibx = 0; - if (addr_index < (1< #else @@ -48,15 +47,19 @@ class MemoryTemplateBinnedCM{ static constexpr unsigned int NCP = NCOPY; #endif + constexpr unsigned int DEPTH_BX = 1< BunchXingT; typedef ap_uint NEntryT; protected: enum BitWidths { - kNBxBins = 1< slot, ap_uint index) const { #pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1 @@ -125,6 +128,7 @@ class MemoryTemplateBinnedCM{ if (isCMSSW) {ibx = 0; icopy = 0;} return dataarray_[icopy][ibx][getNEntryPerBin()*slot+index]; } + bool write_mem(BunchXingT ibx, ap_uint slot, DataType data, unsigned int nentry_ibx) { #pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1 #pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0 @@ -150,30 +154,18 @@ class MemoryTemplateBinnedCM{ if (nentry == ((1 << (NBIT_ADDR-NBIT_BIN)) - 1)) return false; - nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry+1; - if (ibin!=0) { - nentries_[ibx*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry+1; - } - binmask8_[ibx][ibin].set_bit(ireg,true); + nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry+1; + if (ibin!=0) { + nentries_[ibx*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry+1; + } + binmask8_[ibx][ibin].set_bit(ireg,true); - //icopy comparison must be signed int or future SW fails - writememloop:for (signed int icopy=0;icopy< (signed) NCP;icopy++) { + //icopy comparison must be signed int or future SW fails + writememloop:for (signed int icopy=0;icopy< (signed) NCP;icopy++) { #pragma HLS unroll - dataarray_[icopy][ibx][getNEntryPerBin()*slot+nentry] = data; - } + dataarray_[icopy][ibx][getNEntryPerBin()*slot+nentry] = data; + } #endif - -#ifdef CMSSW_GIT_HASH - ap_uint ibin; - ap_uint ireg; - (ireg,ibin)=slot; - nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry_ibx+1; - if (ibin!=0) { - nentries_[ibx*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry_ibx+1; - } - binmask8_[ibx][ibin].set_bit(ireg,true); -#endif - return true; } else { @@ -199,10 +191,10 @@ class MemoryTemplateBinnedCM{ DataType data("0",16); for (size_t ibx=0; ibx<(kNBxBins); ++ibx) { - for (size_t icopy=0; icopy < NCOPY; icopy++) { - for (size_t ibin=0; ibin < kNMemDepth; ibin++) { - dataarray_[icopy][ibx][ibin] = data; - } + for (size_t icopy=0; icopy < NCP; icopy++) { + for (size_t ibin=0; ibin < kNMemDepth; ibin++) { + dataarray_[icopy][ibx][ibin] = data; + } } // Clear nentries and binmask8 for (unsigned int ibin = 0; ibin < getNBins()/8; ++ibin) { @@ -244,15 +236,6 @@ class MemoryTemplateBinnedCM{ DataType data(datastr.c_str(), base); bool success = write_mem(ibx, slot, data, nentry_ibx); - #ifndef CMSSW_GIT_HASH - if (success) { - nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry_ibx+1; - if (ibin!=0) { - nentries_[ibx*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry_ibx+1; - } - binmask8_[ibx][ibin].set_bit(ireg,true); - } - #endif return success; } diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index b467012387e..a962b2d9f82 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -35,9 +35,12 @@ template mask_[1< mask_[DEPTH_BX]; //bitmask for hits public: - unsigned int getDepth() const {return (1< index, unsigned int page = 0) const { // TODO: check if valid if(!NBIT_BX) ibx = 0; - return dataarray_[ibx][(1< @@ -95,19 +98,15 @@ class MemoryTemplateTPROJ { #pragma HLS inline if(!NBIT_BX) ibx = 0; - if (addr_index < (1< Date: Wed, 18 Sep 2024 10:58:47 +0100 Subject: [PATCH 03/19] fix to earlier commit --- TrackletAlgorithm/MemoryTemplate.h | 6 +++--- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 9 ++++----- 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index c9c0a4c0d57..0d055702dab 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -35,11 +35,11 @@ class MemoryTemplate #ifdef CMSSW_GIT_HASH static constexpr unsigned int NBIT_BX = 0; #endif - - constexpr unsigned int DEPTH_BX = 1< BunchXingT; typedef ap_uint NEntryT; diff --git a/TrackletAlgorithm/MemoryTemplateBinnedCM.h b/TrackletAlgorithm/MemoryTemplateBinnedCM.h index 5e06a3150b7..79cccee4fdb 100644 --- a/TrackletAlgorithm/MemoryTemplateBinnedCM.h +++ b/TrackletAlgorithm/MemoryTemplateBinnedCM.h @@ -37,7 +37,6 @@ template BunchXingT; typedef ap_uint NEntryT; From f2af50439cd8fa06fdcde65b53dcfc01b2c438b1 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Wed, 18 Sep 2024 10:59:19 +0100 Subject: [PATCH 04/19] Modify write_mem so it can handle old txt files that dont have page number --- TrackletAlgorithm/MemoryTemplateTPROJ.h | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index a962b2d9f82..93fc3655059 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -2,6 +2,10 @@ #ifndef TrackletAlgorithm_MemoryTemplateTPROJ_h #define TrackletAlgorithm_MemoryTemplateTPROJ_h +// L1 Track CMSSW Future SW currently assumes only 1 FPGA used, +// and hence 1 page of memory. +#define CMSSW_1FPGA + #include #include "../TestBenches/FileReadUtility.h" @@ -21,7 +25,11 @@ template class AllStub; #endif #ifdef CMSSW_GIT_HASH +#ifdef CMSSW_1FPGA +template +#else template +#endif #else template #endif @@ -38,11 +46,15 @@ class MemoryTemplateTPROJ private: #ifdef CMSSW_GIT_HASH static constexpr unsigned int NBIT_BX = 0; +#ifdef CMSSW_1FPGA + static constexpr unsigned int NPAGE = 1; +#endif #endif - constexpr unsigned int DEPTH_BX = 1< BunchXingT; typedef ap_uint NEntryT; @@ -164,18 +176,23 @@ class MemoryTemplateTPROJ bool write_mem(BunchXingT ibx, const std::string line, int base=16) { +#ifdef CMSSW_1FPGA + const std::string datastr = line; + unsigned int page = 0; +#else assert(split(line,' ').size()==4); const std::string datastr = split(line,' ').back(); const std::string pagestr = split(line,' ').front(); - unsigned int page=4; + unsigned int page = 4; if (pagestr=="0x00") page = 0; if (pagestr=="0x01") page = 1; if (pagestr=="0x02") page = 2; if (pagestr=="0x03") page = 3; assert(page<4); +#endif if(!NBIT_BX) ibx = 0; DataType data(datastr.c_str(), base); From e04b77b912d99f469ef8c6a6772c5820889dadec Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Tue, 24 Sep 2024 09:20:05 +0100 Subject: [PATCH 05/19] Fix bug that only one quarter of memory being checked --- TestBenches/FileReadUtility.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/TestBenches/FileReadUtility.h b/TestBenches/FileReadUtility.h index e21eb7b4063..a441819b101 100644 --- a/TestBenches/FileReadUtility.h +++ b/TestBenches/FileReadUtility.h @@ -256,9 +256,9 @@ unsigned int compareMemWithMemPage(const MemType& memory_ref, const MemType& mem constexpr int lsb = (LSB >= 0 && MSB >= LSB) ? LSB : 0; constexpr int msb = (LSB >= 0 && MSB >= LSB) ? MSB : MemType::getWidth() - 1; - for (unsigned int ipage = 0; ipage < 4; ++ipage) { + for (unsigned int ipage = 0; ipage < memory_ref.getNPage(); ++ipage) { //FIXME - for (unsigned int i = 0; i < memory_ref.getDepth()/4; ++i) { + for (unsigned int i = 0; i < memory_ref.getDepth(); ++i) { const auto data_ref_raw = memory_ref.read_mem(ievt,i,ipage).raw(); const auto data_com_raw = memory.read_mem(ievt,i,ipage).raw(); const auto data_ref = data_ref_raw.range(msb,lsb); From 54ec7db45fac7d351251b6cb0f957bec6394d4ef Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Thu, 26 Sep 2024 16:38:01 +0100 Subject: [PATCH 06/19] Fix writing outside array bug --- TrackletAlgorithm/SWLUTReader.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/TrackletAlgorithm/SWLUTReader.h b/TrackletAlgorithm/SWLUTReader.h index ddbddd2da2e..c6aab9ff955 100644 --- a/TrackletAlgorithm/SWLUTReader.h +++ b/TrackletAlgorithm/SWLUTReader.h @@ -1,5 +1,6 @@ #include #include +#include // The following function provides a more compiler efficient method for reading // look up table arrays (currently used in TP), this is only used in C simulations and not synthesis @@ -25,8 +26,9 @@ template bool readSWLUT(lutType lut[lutsize],const s skipfirst = false; continue; } - lut[lutIndex]=lutval; + if (lutIndex < lutsize) lut[lutIndex]=lutval; ++lutIndex; } + assert(lutIndex == lutsize + 1); // Allows for final bracket. return true; } From 680159c1f1c5c251f56494f6556a00dbb15f0185 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Sat, 28 Sep 2024 12:52:44 +0100 Subject: [PATCH 07/19] tweak --- TrackletAlgorithm/SWLUTReader.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TrackletAlgorithm/SWLUTReader.h b/TrackletAlgorithm/SWLUTReader.h index c6aab9ff955..014c44ddf21 100644 --- a/TrackletAlgorithm/SWLUTReader.h +++ b/TrackletAlgorithm/SWLUTReader.h @@ -29,6 +29,6 @@ template bool readSWLUT(lutType lut[lutsize],const s if (lutIndex < lutsize) lut[lutIndex]=lutval; ++lutIndex; } - assert(lutIndex == lutsize + 1); // Allows for final bracket. + assert(lutIndex == lutsize || lutIndex == lutsize + 1); // Allow for optional final bracket. return true; } From c4c8ac3f6016169b45418221885829b83ded00ad Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Tue, 1 Oct 2024 14:59:54 +0100 Subject: [PATCH 08/19] Optimised CPU use --- TrackletAlgorithm/MemoryTemplate.h | 2 +- TrackletAlgorithm/MemoryTemplateTPROJ.h | 8 +++++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index 0d055702dab..337aaa04b90 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -184,7 +184,7 @@ class MemoryTemplate return success; } - bool write_mem(BunchXingT ibx, const std::string datastr, int base=16) + bool write_mem(BunchXingT ibx, const std::string& datastr, int base=16) { return write_mem(ibx, datastr.c_str(), base); } diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index 93fc3655059..8f7a02aa4cd 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -87,9 +87,10 @@ class MemoryTemplateTPROJ DataType read_mem(BunchXingT ibx, ap_uint index, unsigned int page = 0) const { + assert(page < NPAGE); // TODO: check if valid if(!NBIT_BX) ibx = 0; - return dataarray_[ibx][DEPTH_ADDR*page+index]; + return dataarray_[ibx][DEPTH_ADDR*page+index]; } template @@ -108,6 +109,7 @@ class MemoryTemplateTPROJ bool write_mem(BunchXingT ibx, DataType data, NEntryT addr_index, unsigned int page = 0) { + assert(page < NPAGE); #pragma HLS inline if(!NBIT_BX) ibx = 0; if (addr_index < DEPTH_ADDR) { @@ -174,10 +176,10 @@ class MemoryTemplateTPROJ return success; } - bool write_mem(BunchXingT ibx, const std::string line, int base=16) + bool write_mem(BunchXingT ibx, const std::string& line, int base=16) { #ifdef CMSSW_1FPGA - const std::string datastr = line; + const std::string& datastr = line; unsigned int page = 0; #else assert(split(line,' ').size()==4); From d229b0019e973846c698c0bb2183f4e62eeb5469 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Tue, 1 Oct 2024 17:16:34 +0100 Subject: [PATCH 09/19] fix compilation issue --- emData/generate_TB.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/emData/generate_TB.py b/emData/generate_TB.py index 4a9a21ffbe7..a2adc77f293 100755 --- a/emData/generate_TB.py +++ b/emData/generate_TB.py @@ -123,8 +123,8 @@ class ITC(Enum): "template constexpr int getNumBarrelStub();\n" "template constexpr int getNumDiskStub();\n" "template constexpr int getMPARNPages(const ITCType &);\n" - "template inline int getMPARMem(const ITCType &);\n" - "template constexpr int getMPARPage(const ITCType &);\n" + "template inline int getMPARMem(const ITCType &);\n" + "template inline int getMPARPage(const ITCType &);\n" ) # Calculate parameters and print out top function for each TB. From 34d1e99f39550e807e6377364493d67c69533241 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Wed, 2 Oct 2024 11:59:07 +0100 Subject: [PATCH 10/19] tweak --- TrackletAlgorithm/SWLUTReader.h | 1 - 1 file changed, 1 deletion(-) diff --git a/TrackletAlgorithm/SWLUTReader.h b/TrackletAlgorithm/SWLUTReader.h index 014c44ddf21..d712101b932 100644 --- a/TrackletAlgorithm/SWLUTReader.h +++ b/TrackletAlgorithm/SWLUTReader.h @@ -1,6 +1,5 @@ #include #include -#include // The following function provides a more compiler efficient method for reading // look up table arrays (currently used in TP), this is only used in C simulations and not synthesis From 705052c0bbd61daa3ab93799f12eb152dee29caf Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Wed, 2 Oct 2024 11:59:39 +0100 Subject: [PATCH 11/19] Fix bug in this PR --- TrackletAlgorithm/MemoryTemplateTPROJ.h | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index 8f7a02aa4cd..a10b3c3e36f 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -2,10 +2,6 @@ #ifndef TrackletAlgorithm_MemoryTemplateTPROJ_h #define TrackletAlgorithm_MemoryTemplateTPROJ_h -// L1 Track CMSSW Future SW currently assumes only 1 FPGA used, -// and hence 1 page of memory. -#define CMSSW_1FPGA - #include #include "../TestBenches/FileReadUtility.h" @@ -24,6 +20,12 @@ template class AllStub; #endif #endif +#ifdef CMSSW_GIT_HASH +// L1 Track CMSSW Future SW currently assumes only 1 FPGA used, +// and hence 1 page of memory. +#define CMSSW_1FPGA +#endif + #ifdef CMSSW_GIT_HASH #ifdef CMSSW_1FPGA template @@ -39,8 +41,8 @@ template Date: Wed, 2 Oct 2024 12:51:14 +0100 Subject: [PATCH 12/19] Fixed bug in PR --- emData/generate_TB.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/emData/generate_TB.py b/emData/generate_TB.py index a2adc77f293..a55b725ebed 100755 --- a/emData/generate_TB.py +++ b/emData/generate_TB.py @@ -226,7 +226,7 @@ class ITC(Enum): # definition of getMPARPage function nParentheses = 0 - getMPARPage = "template<> constexpr int\n" + getMPARPage = "template<> inline int\n" getMPARPage += "getMPARPage(const ITCType &iTC) {\n" getMPARPage += " return " for i in range(0, maxNPages - 1): From 9f4b729e106b6b3dda2b239e202c04899549e843 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Wed, 2 Oct 2024 12:56:46 +0100 Subject: [PATCH 13/19] Fixed bug in PR --- TrackletAlgorithm/MemoryTemplateTPROJ.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index a10b3c3e36f..ed0255cf83d 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -89,10 +89,10 @@ class MemoryTemplateTPROJ DataType read_mem(BunchXingT ibx, ap_uint index, unsigned int page = 0) const { - assert(page < NPAGE); - // TODO: check if valid - if(!NBIT_BX) ibx = 0; - return dataarray_[ibx][DEPTH_ADDR*page+index]; + //assert(page < NPAGE); + // TODO: check if valid + if(!NBIT_BX) ibx = 0; + return dataarray_[ibx][DEPTH_ADDR*page+index]; } template @@ -111,7 +111,7 @@ class MemoryTemplateTPROJ bool write_mem(BunchXingT ibx, DataType data, NEntryT addr_index, unsigned int page = 0) { - assert(page < NPAGE); + //assert(page < NPAGE); #pragma HLS inline if(!NBIT_BX) ibx = 0; if (addr_index < DEPTH_ADDR) { From 9d9584983ed1e1482d8f3c4cba0658b3513257ce Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Wed, 2 Oct 2024 14:24:05 +0100 Subject: [PATCH 14/19] Fix bug in PR --- emData/generate_TB.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/emData/generate_TB.py b/emData/generate_TB.py index a55b725ebed..b6c68bbbf9d 100755 --- a/emData/generate_TB.py +++ b/emData/generate_TB.py @@ -122,7 +122,7 @@ class ITC(Enum): "template constexpr int getNumDiskFMMemPerStub();\n" "template constexpr int getNumBarrelStub();\n" "template constexpr int getNumDiskStub();\n" - "template constexpr int getMPARNPages(const ITCType &);\n" + "template inline int getMPARNPages(const ITCType &);\n" "template inline int getMPARMem(const ITCType &);\n" "template inline int getMPARPage(const ITCType &);\n" ) @@ -177,7 +177,7 @@ class ITC(Enum): nParentheses = 0 first = True maxNPages = max([len(tpar) - len("MPAR_L1L2") for tpar in tparMems[tbName]]) - getMPARNPages = "template<> constexpr int\n" + getMPARNPages = "template<> inline int\n" getMPARNPages += "getMPARNPages(const ITCType &iTC) {\n" getMPARNPages += " return " for i in range(1, maxNPages): From 4beb80b7c658971ec635a95f3c30d75381a34bf2 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Wed, 9 Oct 2024 12:35:00 +0100 Subject: [PATCH 15/19] Switch to MemPrintSplit input files for Future SW --- TrackletAlgorithm/MemoryTemplateTPROJ.h | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index ed0255cf83d..ae81a6b921a 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -180,23 +180,18 @@ class MemoryTemplateTPROJ bool write_mem(BunchXingT ibx, const std::string& line, int base=16) { -#ifdef CMSSW_1FPGA - const std::string& datastr = line; - unsigned int page = 0; -#else assert(split(line,' ').size()==4); const std::string datastr = split(line,' ').back(); const std::string pagestr = split(line,' ').front(); - unsigned int page = 4; + unsigned int page = NPAGE; if (pagestr=="0x00") page = 0; if (pagestr=="0x01") page = 1; if (pagestr=="0x02") page = 2; if (pagestr=="0x03") page = 3; - assert(page<4); -#endif + assert(page < NPAGE); if(!NBIT_BX) ibx = 0; DataType data(datastr.c_str(), base); From a4b91c1a08b71d4a251544e1f917bd9322792f2b Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Mon, 14 Oct 2024 11:04:32 +0100 Subject: [PATCH 16/19] Changed TP tp used LutsSplit with CombinedCM chain --- emData/download.sh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/emData/download.sh b/emData/download.sh index 7c677cdbe53..865d9e55027 100755 --- a/emData/download.sh +++ b/emData/download.sh @@ -97,7 +97,8 @@ mkdir -p ../TopFunctions/CombinedConfig ./generate_IR.py -w LUTsCM/wires.dat -o ../TopFunctions/CombinedConfig ./generate_VMRCM.py -a -w LUTsCM/wires.dat -o ../TopFunctions/CombinedConfig ./generate_VMSMER.py -a -w LUTsCM/wires.dat -o ../TopFunctions/CombinedConfig -./generate_TP.py -w LUTsCM/wires.dat -o ../TopFunctions/CombinedConfig +# All other modules use LUTsSplit LUTS, & it's best, as LUTsCM out of date. +./generate_TP.py -w LUTsCM/wires.dat -l LUTsSplit -o ../TopFunctions/CombinedConfig ./generate_PC.py -w LUTsCM/wires.dat -o ../TopFunctions/CombinedConfig ./generate_MP.py -w LUTsCM/wires.dat -o ../TopFunctions/CombinedConfig ./generate_TB.py -w LUTsCM/wires.dat -o ../TopFunctions/CombinedConfig From d8ed7149537cb1f91a02fddac8bbbaba4e2cba60 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Fri, 15 Nov 2024 15:50:48 +0000 Subject: [PATCH 17/19] Give variable better name --- TrackletAlgorithm/VMRouterCM.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/TrackletAlgorithm/VMRouterCM.h b/TrackletAlgorithm/VMRouterCM.h index cfce364c392..edd8c6216e2 100644 --- a/TrackletAlgorithm/VMRouterCM.h +++ b/TrackletAlgorithm/VMRouterCM.h @@ -172,7 +172,7 @@ inline T createVMStub(const InputStub inputStub, // Main function // Two input region types InType and DISK2S due to the disks having both 2S and PS inputs. -template +template void VMRouterCM(const BXType bx, BXType& bx_o, // LUTs const int METable[], @@ -219,15 +219,15 @@ void VMRouterCM(const BXType bx, BXType& bx_o, //Create variables that keep track of which memory address to read and write to ap_uint read_addr(0); // Reading of input stubs - ap_uint addrCountASI[nAllInnerCopies]; // Writing of Inner Allstubs + ap_uint addrCountASI[nAllInnerVariants]; // Writing of Inner Allstubs ap_uint<5> addrCountME[1 << (rzSizeME + phiRegSize)]; // Writing of ME stubs, number of bits taken from whatever is defined in the memories: (4+rzSize + phiRegSize)-(rzSize + phiRegSize)+1 ap_uint<5> addrCountTE[1 << (rzSizeTE + phiRegSize)]; // Writing of TE stubs #pragma HLS array_partition variable=addrCountASI complete dim=0 #pragma HLS array_partition variable=addrCountME complete dim=0 #pragma HLS array_partition variable=addrCountTE complete dim=0 - if (nAllInnerCopies) { - for (int i = 0; i < nAllInnerCopies; i++) { + if (nAllInnerVariants) { + for (int i = 0; i < nAllInnerVariants; i++) { #pragma HLS unroll addrCountASI[i] = 0; } From bdac7868bd75c033451a35d550ef135a9963e2d1 Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Fri, 15 Nov 2024 16:20:13 +0000 Subject: [PATCH 18/19] Give variable better name --- TrackletAlgorithm/MatchProcessor.h | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/TrackletAlgorithm/MatchProcessor.h b/TrackletAlgorithm/MatchProcessor.h index 3815bddceed..cf4780b4d20 100644 --- a/TrackletAlgorithm/MatchProcessor.h +++ b/TrackletAlgorithm/MatchProcessor.h @@ -901,7 +901,7 @@ template constexpr uint32_t NPageSum(); #include "MatchProcessor_parameters.h" -template +template void MatchCalculator(BXType bx, ap_uint<1> newtracklet, ap_uint<1>& isMatch, @@ -913,7 +913,7 @@ void MatchCalculator(BXType bx, const AllStubMemory* allstub, const AllProjection& proj, ap_uint::kVMSMEIDSize> stubid, - FullMatchMemory fullmatch[maxFullMatchCopies] + FullMatchMemory fullmatch[maxFullMatchVariants] ){ #pragma HLS inline @@ -1180,7 +1180,7 @@ constexpr unsigned kNbitsrzbinMPDisk = kNbitsrzbin + 1; ////////////////////////////// // MatchProcessor -template void MatchProcessor(BXType bx, // because Vivado HLS cannot synthesize an array of @@ -1190,7 +1190,7 @@ void MatchProcessor(BXType bx, const VMStubMEMemoryCM& instubdata, const AllStubMemory* allstub, BXType& bx_o, - FullMatchMemory fullmatch[maxFullMatchCopies] + FullMatchMemory fullmatch[maxFullMatchVariants] ){ #pragma HLS inline @@ -1458,7 +1458,7 @@ void MatchProcessor(BXType bx, if (hasMatch_save) { isMatch = newtracklet_save ? ap_uint<1>(0) : isMatch; - MatchCalculator + MatchCalculator (bx, newtracklet_save, isMatch, savedMatch, best_delta_z, best_delta_phi, best_delta_rphi, best_delta_r, allstub, allproj_save, stubindex_save, fullmatch); } @@ -1483,7 +1483,6 @@ void MatchProcessor(BXType bx, newtracklet_save = newtracklet; allproj_save = allproj; stubindex_save = stubindex; - } //end MC if From 83b5becee790fc055f1b8fbeb21de2d0882f95bb Mon Sep 17 00:00:00 2001 From: Ian Tomalin Date: Tue, 3 Dec 2024 14:27:40 +0000 Subject: [PATCH 19/19] Replace tabs by spaces --- TrackletAlgorithm/MemoryTemplate.h | 66 +++++++++--------- TrackletAlgorithm/MemoryTemplateBinnedCM.h | 80 +++++++++++----------- TrackletAlgorithm/MemoryTemplateTPROJ.h | 42 ++++++------ 3 files changed, 93 insertions(+), 95 deletions(-) diff --git a/TrackletAlgorithm/MemoryTemplate.h b/TrackletAlgorithm/MemoryTemplate.h index 337aaa04b90..db6337eccf3 100644 --- a/TrackletAlgorithm/MemoryTemplate.h +++ b/TrackletAlgorithm/MemoryTemplate.h @@ -56,16 +56,16 @@ class MemoryTemplate NEntryT getEntries(BunchXingT bx) const { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 - return nentries_[bx]; + return nentries_[bx]; } const DataType (&get_mem() const)[DEPTH_BX][DEPTH_ADDR] {return dataarray_;} DataType read_mem(BunchXingT ibx, ap_uint index) const { - // TODO: check if valid - if(!NBIT_BX) ibx = 0; - return dataarray_[ibx][index]; + // TODO: check if valid + if(!NBIT_BX) ibx = 0; + return dataarray_[ibx][index]; } template @@ -76,7 +76,7 @@ class MemoryTemplate #ifdef __SYNTHESIS__ 0; #else - nentries_[ibx]; + nentries_[ibx]; #endif return write_mem(ibx,data,addr_index); } @@ -87,10 +87,10 @@ class MemoryTemplate #pragma HLS inline if(!NBIT_BX) ibx = 0; static_assert( - std::is_same::value - || (std::is_same >::value && std::is_same >::value) - || (std::is_same >::value && std::is_same >::value) - , "Invalid conversion between data types"); + std::is_same::value + || (std::is_same >::value && std::is_same >::value) + || (std::is_same >::value && std::is_same >::value) + , "Invalid conversion between data types"); DataType sameData(data.raw()); return write_mem(ibx,sameData,addr_index); } @@ -102,7 +102,7 @@ class MemoryTemplate #ifdef __SYNTHESIS__ 0; #else - nentries_[ibx]; + nentries_[ibx]; #endif return write_mem(ibx,data,addr_index); } @@ -130,7 +130,7 @@ class MemoryTemplate } } - bool write_mem_new(BunchXingT ibx, DataType data, ap_uint<1> overwrite) + bool write_mem_new(BunchXingT ibx, DataType data, ap_uint<1> overwrite) { #pragma HLS ARRAY_PARTITION variable=nentries_ complete dim=0 #pragma HLS inline @@ -141,9 +141,9 @@ class MemoryTemplate dataarray_[ibx][0] = data; #else if(overwrite == 0) { - dataarray_[ibx][nentries_[ibx]++] = data; + dataarray_[ibx][nentries_[ibx]++] = data; } else { - dataarray_[ibx][nentries_[ibx]-1] = data; + dataarray_[ibx][nentries_[ibx]-1] = data; } #endif @@ -157,7 +157,7 @@ class MemoryTemplate #ifndef __SYNTHESIS__ MemoryTemplate() { - clear(); + clear(); } ~MemoryTemplate(){} @@ -165,7 +165,7 @@ class MemoryTemplate void clear() { DataType data("0",16); - MEM_RST: for (size_t ibx=0; ibx BunchXingT; typedef ap_uint NEntryT; - protected: +protected: enum BitWidths { kNBxBins = DEPTH_BX, kNSlots = DEPTH_BIN, @@ -69,7 +69,7 @@ class MemoryTemplateBinnedCM{ ap_uint<8> binmask8_[kNBxBins][1< nentries_[slots]; - public: +public: unsigned int getDepth() const {return kNMemDepth;} unsigned int getNBX() const {return kNBxBins;} @@ -89,7 +89,7 @@ class MemoryTemplateBinnedCM{ } ap_uint<8> getBinMask8(BunchXingT bx, ap_uint ibin) const { - #pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0 +#pragma HLS ARRAY_PARTITION variable=binmask8_ complete dim=0 return binmask8_[bx][ibin]; } @@ -121,7 +121,7 @@ class MemoryTemplateBinnedCM{ } DataType read_mem(unsigned int icopy, BunchXingT ibx, ap_uint slot, - ap_uint index) const { + ap_uint index) const { #pragma HLS ARRAY_PARTITION variable=dataarray_ dim=1 // TODO: check if valid if (isCMSSW) {ibx = 0; icopy = 0;} @@ -153,24 +153,24 @@ class MemoryTemplateBinnedCM{ if (nentry == ((1 << (NBIT_ADDR-NBIT_BIN)) - 1)) return false; - nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry+1; - if (ibin!=0) { - nentries_[ibx*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry+1; - } - binmask8_[ibx][ibin].set_bit(ireg,true); + nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4)=nentry+1; + if (ibin!=0) { + nentries_[ibx*kNBinsRZ+ibin-1].range((ireg+8)*4+3,(ireg+8)*4)=nentry+1; + } + binmask8_[ibx][ibin].set_bit(ireg,true); - //icopy comparison must be signed int or future SW fails - writememloop:for (signed int icopy=0;icopy< (signed) NCP;icopy++) { + //icopy comparison must be signed int or future SW fails + writememloop:for (signed int icopy=0;icopy< (signed) NCP;icopy++) { #pragma HLS unroll - dataarray_[icopy][ibx][getNEntryPerBin()*slot+nentry] = data; - } + dataarray_[icopy][ibx][getNEntryPerBin()*slot+nentry] = data; + } #endif return true; } else { #ifndef __SYNTHESIS__ if (data.raw() != 0) { // To avoid lots of prints when we're clearing the memories - edm::LogVerbatim("L1trackHLS") << "Warning out of range. nentry_ibx = "< index) const { - print_data(dataarray_[bx][index]); + print_data(dataarray_[bx][index]); } //These are broken - comment out for now (ryd, 2024-10-27) /* - void print_mem(BunchXingT bx) const - { - for(unsigned int ibin=0;ibin<8;ibin++) { - for(unsigned int ireg=0;ireg<8;ireg++) { - for (unsigned int i = 0; i < nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4); ++i) { - edm::LogVerbatim("L1trackHLS") << bx << " " << i << " "; - print_entry(bx, i + slot*getNEntryPerBin() ); - } + void print_mem(BunchXingT bx) const { + for(unsigned int ibin=0;ibin<8;ibin++) { + for(unsigned int ireg=0;ireg<8;ireg++) { + for (unsigned int i = 0; i < nentries_[ibx*kNBinsRZ+ibin].range(ireg*4+3,ireg*4); ++i) { + edm::LogVerbatim("L1trackHLS") << bx << " " << i << " "; + print_entry(bx, i + slot*getNEntryPerBin() ); + } + } } } - } - void print_mem() const - { - for (unsigned int ibx = 0; ibx < kNBxBins; ++ibx) { - for (unsigned int i = 0; i < 8; ++i) { - edm::LogVerbatim("L1trackHLS") << ibx << " " << i << " "; - print_entry(ibx,i); - } - } - } + void print_mem() const { + for (unsigned int ibx = 0; ibx < kNBxBins; ++ibx) { + for (unsigned int i = 0; i < 8; ++i) { + edm::LogVerbatim("L1trackHLS") << ibx << " " << i << " "; + print_entry(ibx,i); + } + } + } */ static constexpr int getWidth() {return DataType::getWidth();} diff --git a/TrackletAlgorithm/MemoryTemplateTPROJ.h b/TrackletAlgorithm/MemoryTemplateTPROJ.h index ae81a6b921a..e388be88a03 100644 --- a/TrackletAlgorithm/MemoryTemplateTPROJ.h +++ b/TrackletAlgorithm/MemoryTemplateTPROJ.h @@ -90,21 +90,21 @@ class MemoryTemplateTPROJ DataType read_mem(BunchXingT ibx, ap_uint index, unsigned int page = 0) const { //assert(page < NPAGE); - // TODO: check if valid - if(!NBIT_BX) ibx = 0; - return dataarray_[ibx][DEPTH_ADDR*page+index]; + // TODO: check if valid + if(!NBIT_BX) ibx = 0; + return dataarray_[ibx][DEPTH_ADDR*page+index]; } template - bool write_mem(BunchXingT ibx, SpecType data, NEntryT addr_index, unsigned int page) + bool write_mem(BunchXingT ibx, SpecType data, NEntryT addr_index, unsigned int page) { #pragma HLS inline if(!NBIT_BX) ibx = 0; static_assert( - std::is_same::value - || (std::is_same >::value && std::is_same >::value) - || (std::is_same >::value && std::is_same >::value) - , "Invalid conversion between data types"); + std::is_same::value + || (std::is_same >::value && std::is_same >::value) + || (std::is_same >::value && std::is_same >::value) + , "Invalid conversion between data types"); DataType sameData(data.raw()); return write_mem(ibx, sameData, addr_index, page); } @@ -142,13 +142,13 @@ class MemoryTemplateTPROJ void clear() { DataType data("0",16); - MEM_RST: for (size_t ibx=0; ibx