From fbb6de2e3c5c7a8c5f5a67ce878ba68d9448d85c Mon Sep 17 00:00:00 2001 From: Jareth Gomes Date: Mon, 17 Apr 2023 04:29:43 +0000 Subject: [PATCH] Removed other spim library references --- spim-jsspim/CPU/data.cpp | 348 - spim-jsspim/CPU/data.h | 54 - spim-jsspim/CPU/display-utils.cpp | 290 - spim-jsspim/CPU/dump_ops.cpp | 129 - spim-jsspim/CPU/exceptions.s | 195 - spim-jsspim/CPU/inst.cpp | 1638 ----- spim-jsspim/CPU/inst.h | 273 - spim-jsspim/CPU/mem.cpp | 778 --- spim-jsspim/CPU/mem.h | 161 - spim-jsspim/CPU/op.h | 525 -- spim-jsspim/CPU/parser.h | 50 - spim-jsspim/CPU/parser.y | 2956 --------- spim-jsspim/CPU/reg.h | 245 - spim-jsspim/CPU/run.cpp | 1872 ------ spim-jsspim/CPU/run.h | 36 - spim-jsspim/CPU/scanner.h | 58 - spim-jsspim/CPU/scanner.l | 733 --- spim-jsspim/CPU/spim-syscall.h | 52 - spim-jsspim/CPU/spim-utils.cpp | 628 -- spim-jsspim/CPU/spim-utils.h | 67 - spim-jsspim/CPU/spim.h | 260 - spim-jsspim/CPU/string-stream.cpp | 142 - spim-jsspim/CPU/string-stream.h | 48 - spim-jsspim/CPU/sym-tbl.cpp | 518 -- spim-jsspim/CPU/sym-tbl.h | 76 - spim-jsspim/CPU/syscall.cpp | 337 - spim-jsspim/CPU/syscall.h | 62 - spim-jsspim/CPU/version.h | 1 - spim-jsspim/spim.cpp | 218 - spim-qtbase/CPU/data.cpp | 347 - spim-qtbase/CPU/data.h | 54 - spim-qtbase/CPU/display-utils.cpp | 287 - spim-qtbase/CPU/dump_ops.cpp | 129 - spim-qtbase/CPU/exceptions.s | 195 - spim-qtbase/CPU/inst.cpp | 1700 ----- spim-qtbase/CPU/inst.h | 280 - spim-qtbase/CPU/mem.cpp | 778 --- spim-qtbase/CPU/mem.h | 161 - spim-qtbase/CPU/op.h | 525 -- spim-qtbase/CPU/parser.h | 50 - spim-qtbase/CPU/parser.y | 2967 --------- spim-qtbase/CPU/reg.h | 240 - spim-qtbase/CPU/run.cpp | 1849 ------ spim-qtbase/CPU/run.h | 36 - spim-qtbase/CPU/scanner.h | 58 - spim-qtbase/CPU/scanner.l | 733 --- spim-qtbase/CPU/spim-syscall.h | 52 - spim-qtbase/CPU/spim-utils.cpp | 625 -- spim-qtbase/CPU/spim-utils.h | 67 - spim-qtbase/CPU/spim.h | 260 - spim-qtbase/CPU/string-stream.cpp | 142 - spim-qtbase/CPU/string-stream.h | 48 - spim-qtbase/CPU/sym-tbl.cpp | 518 -- spim-qtbase/CPU/sym-tbl.h | 76 - spim-qtbase/CPU/syscall.cpp | 337 - spim-qtbase/CPU/syscall.h | 62 - spim-qtbase/CPU/version.h | 1 - spim-qtbase/QtSpim/NewIcon.icns | Bin 96341 -> 0 bytes spim-qtbase/QtSpim/QtSpim.pro | 256 - spim-qtbase/QtSpim/README | 56 - spim-qtbase/QtSpim/breakpoint.ui | 115 - spim-qtbase/QtSpim/changevalue.ui | 102 - spim-qtbase/QtSpim/console.cpp | 155 - spim-qtbase/QtSpim/console.h | 64 - spim-qtbase/QtSpim/datatextedit.h | 57 - spim-qtbase/QtSpim/datawin.cpp | 415 -- spim-qtbase/QtSpim/exception.qrc | 39 - spim-qtbase/QtSpim/help/Fig10_1.jpg | Bin 53679 -> 0 bytes spim-qtbase/QtSpim/help/Fig10_2.jpg | Bin 175832 -> 0 bytes spim-qtbase/QtSpim/help/Fig1_1.jpg | Bin 34474 -> 0 bytes spim-qtbase/QtSpim/help/Fig1_6.jpg | Bin 22713 -> 0 bytes spim-qtbase/QtSpim/help/Fig2_1.jpg | Bin 16842 -> 0 bytes spim-qtbase/QtSpim/help/Fig3_1.jpg | Bin 35515 -> 0 bytes spim-qtbase/QtSpim/help/Fig5_1.jpg | Bin 18651 -> 0 bytes spim-qtbase/QtSpim/help/Fig6_2.jpg | Bin 19368 -> 0 bytes spim-qtbase/QtSpim/help/Fig6_3.jpg | Bin 22336 -> 0 bytes spim-qtbase/QtSpim/help/Fig6_3a.jpg | Bin 6705 -> 0 bytes spim-qtbase/QtSpim/help/Fig7_1.jpg | Bin 14836 -> 0 bytes spim-qtbase/QtSpim/help/Fig7_2.jpg | Bin 14591 -> 0 bytes spim-qtbase/QtSpim/help/Fig8_1.jpg | Bin 42403 -> 0 bytes spim-qtbase/QtSpim/help/HP_AppA.html | 6210 ------------------ spim-qtbase/QtSpim/help/main_windows.jpg | Bin 379586 -> 0 bytes spim-qtbase/QtSpim/help/qtspim.qhc | Bin 163840 -> 0 bytes spim-qtbase/QtSpim/help/qtspim.qhcp | 27 - spim-qtbase/QtSpim/help/qtspim.qhp | 72 - spim-qtbase/QtSpim/help/qtspim_help.html | 164 - spim-qtbase/QtSpim/help/settings_dialog.jpg | Bin 52497 -> 0 bytes spim-qtbase/QtSpim/help/settings_dialog2.jpg | Bin 52243 -> 0 bytes spim-qtbase/QtSpim/macinfo.plist | 22 - spim-qtbase/QtSpim/main.cpp | 268 - spim-qtbase/QtSpim/menu.cpp | 875 --- spim-qtbase/QtSpim/printwindows.ui | 150 - spim-qtbase/QtSpim/qtspim.rc | 1 - spim-qtbase/QtSpim/regtextedit.h | 61 - spim-qtbase/QtSpim/regwin.cpp | 619 -- spim-qtbase/QtSpim/runparams.ui | 172 - spim-qtbase/QtSpim/savelogfile.ui | 224 - spim-qtbase/QtSpim/settablecheckbox.h | 47 - spim-qtbase/QtSpim/settings.ui | 616 -- spim-qtbase/QtSpim/spim_settings.h | 110 - spim-qtbase/QtSpim/spim_support.cpp | 172 - spim-qtbase/QtSpim/spimview.cpp | 280 - spim-qtbase/QtSpim/spimview.h | 306 - spim-qtbase/QtSpim/spimview.ui | 593 -- spim-qtbase/QtSpim/state.cpp | 232 - spim-qtbase/QtSpim/texttextedit.h | 59 - spim-qtbase/QtSpim/textwin.cpp | 290 - spim-qtbase/QtSpim/windows_images.qrc | 51 - spim-qtbase/README | 49 - spim-qtbase/Tests/read.s | 50 - spim-qtbase/Tests/time.s | 57 - spim-qtbase/Tests/timer.s | 50 - spim-qtbase/Tests/tt.alu.bare.s | 1852 ------ spim-qtbase/Tests/tt.bare.s | 519 -- spim-qtbase/Tests/tt.be.s | 556 -- spim-qtbase/Tests/tt.core.s | 4862 -------------- spim-qtbase/Tests/tt.dir.s | 167 - spim-qtbase/Tests/tt.fpu.bare.s | 2239 ------- spim-qtbase/Tests/tt.in | 6 - spim-qtbase/Tests/tt.io.s | 209 - spim-qtbase/Tests/tt.le.s | 546 -- spim-qtbase/helloworld.s | 45 - spim-qtbase/spim.cpp | 1277 ---- spim-qtspimbot/CPU/data.cpp | 336 - spim-qtspimbot/CPU/data.h | 54 - spim-qtspimbot/CPU/display-utils.cpp | 295 - spim-qtspimbot/CPU/dump_ops.cpp | 129 - spim-qtspimbot/CPU/exceptions.s | 195 - spim-qtspimbot/CPU/inst.cpp | 1606 ----- spim-qtspimbot/CPU/inst.h | 280 - spim-qtspimbot/CPU/mem.cpp | 882 --- spim-qtspimbot/CPU/mem.h | 158 - spim-qtspimbot/CPU/op.h | 525 -- spim-qtspimbot/CPU/parser.h | 50 - spim-qtspimbot/CPU/parser.y | 2957 --------- spim-qtspimbot/CPU/reg.h | 268 - spim-qtspimbot/CPU/run.cpp | 1731 ----- spim-qtspimbot/CPU/run.h | 36 - spim-qtspimbot/CPU/scanner.h | 58 - spim-qtspimbot/CPU/scanner.l | 738 --- spim-qtspimbot/CPU/spim-syscall.h | 52 - spim-qtspimbot/CPU/spim-utils.cpp | 658 -- spim-qtspimbot/CPU/spim-utils.h | 92 - spim-qtspimbot/CPU/spim.h | 267 - spim-qtspimbot/CPU/string-stream.cpp | 142 - spim-qtspimbot/CPU/string-stream.h | 52 - spim-qtspimbot/CPU/sym-tbl.cpp | 522 -- spim-qtspimbot/CPU/sym-tbl.h | 76 - spim-qtspimbot/CPU/syscall.cpp | 373 -- spim-qtspimbot/CPU/syscall.h | 66 - spim-qtspimbot/CPU/vasm.cpp | 162 - spim-qtspimbot/CPU/vasm.h | 8 - spim-qtspimbot/CPU/version.h | 1 - spim-qtspimbot/README | 49 - spim-qtspimbot/spim.cpp | 1277 ---- 155 files changed, 64786 deletions(-) delete mode 100755 spim-jsspim/CPU/data.cpp delete mode 100755 spim-jsspim/CPU/data.h delete mode 100755 spim-jsspim/CPU/display-utils.cpp delete mode 100644 spim-jsspim/CPU/dump_ops.cpp delete mode 100755 spim-jsspim/CPU/exceptions.s delete mode 100755 spim-jsspim/CPU/inst.cpp delete mode 100755 spim-jsspim/CPU/inst.h delete mode 100755 spim-jsspim/CPU/mem.cpp delete mode 100755 spim-jsspim/CPU/mem.h delete mode 100755 spim-jsspim/CPU/op.h delete mode 100755 spim-jsspim/CPU/parser.h delete mode 100755 spim-jsspim/CPU/parser.y delete mode 100755 spim-jsspim/CPU/reg.h delete mode 100755 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100755 index 815a27f..0000000 --- a/spim-jsspim/CPU/data.cpp +++ /dev/null @@ -1,348 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to manipulate data segment directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser.h" -#include "run.h" -#include "data.h" - - -/* The first 64K of the data segment are dedicated to small data - segment, which is pointed to by $gp. This register points to the - middle of the segment, so we can use the full offset field in an - instruction. */ - -static mem_addr next_data_pc; /* Location for next datum in user process */ - -static mem_addr next_k_data_pc; /* Location for next datum in kernel */ - -static bool in_kernel = 0; /* => data goes to kdata, not data */ - -#define DATA_PC (in_kernel ? next_k_data_pc : next_data_pc) - -static mem_addr next_gp_item_addr; /* Address of next item accessed off $gp */ - -static bool auto_alignment = true; /* => align literal to natural bound*/ - - - -/* If TO_KERNEL is true, subsequent data will be placed in the - kernel data segment. If false, data will go to the user's data - segment.*/ - -void -user_kernel_data_segment (bool to_kernel) -{ - in_kernel = to_kernel; -} - - -void -end_of_assembly_file () -{ - in_kernel = false; - auto_alignment = true; -} - - -/* Set the point at which the first datum is stored to be ADDRESS + - 64K. The 64K increment allocates an area pointed to by register - $gp, which is initialized. */ - -void -data_begins_at_point (mem_addr addr) -{ - if (bare_machine) - next_data_pc = addr; - else - { - next_gp_item_addr = addr; - gp_midpoint = addr + 32*K; - R[REG_GP] = gp_midpoint; - next_data_pc = addr + 64 * K; - } -} - - -/* Set the point at which the first datum is stored in the kernel's - data segment. */ - -void -k_data_begins_at_point (mem_addr addr) -{ - next_k_data_pc = addr; -} - - -/* Arrange that the next datum is stored on a memory boundary with its - low ALIGNMENT bits equal to 0. If argument is 0, disable automatic - alignment.*/ - -void -align_data (int alignment) -{ - if (alignment == 0) - auto_alignment = false; - else if (in_kernel) - { - next_k_data_pc = - (next_k_data_pc + (1 << alignment) - 1) & (-1 << alignment); - fix_current_label_address (next_k_data_pc); - } - else - { - next_data_pc = (next_data_pc + (1 << alignment) - 1) & (-1 << alignment); - fix_current_label_address (next_data_pc); - } -} - - -void -set_data_alignment (int alignment) -{ - if (auto_alignment) - align_data (alignment); -} - - -void -enable_data_alignment () -{ - auto_alignment = true; -} - - -/* Set the location (in user or kernel data space) for the next datum. */ - -void -set_data_pc (mem_addr addr) -{ - if (in_kernel) - next_k_data_pc = addr; - else - next_data_pc = addr; -} - - -/* Return the address at which the next datum will be stored. */ - -mem_addr -current_data_pc () -{ - return (DATA_PC); -} - - -/* Bump the address at which the next data will be stored by DELTA - bytes. */ - -void -increment_data_pc (int delta) -{ - if (in_kernel) - { - next_k_data_pc += delta; - if (k_data_top <= next_k_data_pc) - expand_k_data(ROUND_UP(next_k_data_pc - k_data_top + 1, 64*K)); - } - else - { - next_data_pc += delta; - if (data_top <= next_data_pc) - expand_data(ROUND_UP(next_data_pc - data_top + 1, 64*K)); - } -} - - -/* Process a .extern NAME SIZE directive. */ - -void -extern_directive (char *name, int size) -{ - label *sym = make_label_global (name); - - if (!bare_machine - && !sym->gp_flag // Not already a global symbol - && size > 0 && size <= SMALL_DATA_SEG_MAX_SIZE - && next_gp_item_addr + size < gp_midpoint + 32*K) - { - sym->gp_flag = 1; - sym->addr = next_gp_item_addr; - next_gp_item_addr += size; - } -} - - -/* Process a .lcomm NAME SIZE directive. */ - -void -lcomm_directive (char *name, int size) -{ - if (!bare_machine - && size > 0 && size <= SMALL_DATA_SEG_MAX_SIZE - && next_gp_item_addr + size < gp_midpoint + 32*K) - { - label *sym = record_label (name, next_gp_item_addr, 1); - sym->gp_flag = 1; - - next_gp_item_addr += size; - /* Don't need to initialize since memory starts with 0's */ - } - else - { - (void)record_label (name, next_data_pc, 1); - - for ( ; size > 0; size --) - { - store_byte (0); - } - } -} - - -/* Process a .ascii STRING or .asciiz STRING directive. */ - -void -store_string (char *string, int length, bool null_terminate) -{ - for ( ; length > 0; string ++, length --) { - store_byte (*string); - } - if (null_terminate) - { - store_byte (0); - } -} - - -/* Process a .byte EXPR directive. */ - -void -store_byte (int value) -{ - set_mem_byte (DATA_PC, value); - increment_data_pc (1); -} - - -/* Process a .half EXPR directive. */ - -void -store_half (int value) -{ - if ((DATA_PC & 0x1) != 0) - { -#ifdef SPIM_BIGENDIAN - store_byte ((value >> 8) & 0xff); - store_byte (value & 0xff); -#else - store_byte (value & 0xff); - store_byte ((value >> 8) & 0xff); -#endif - } - else - { - set_mem_half (DATA_PC, value); - increment_data_pc (BYTES_PER_WORD / 2); - } -} - - -/* Process a .word EXPR directive. */ - -void -store_word (int value) -{ - if ((DATA_PC & 0x3) != 0) - { -#ifdef SPIM_BIGENDIAN - store_half ((value >> 16) & 0xffff); - store_half (value & 0xffff); -#else - store_half (value & 0xffff); - store_half ((value >> 16) & 0xffff); -#endif - } - else - { - set_mem_word (DATA_PC, value); - increment_data_pc (BYTES_PER_WORD); - } -} - - -/* Process a .double EXPR directive. */ - -void -store_double (double *value) -{ - if ((DATA_PC & 0x7) != 0) - { - store_word (* ((mem_word *) value)); - store_word (* (((mem_word *) value) + 1)); - } - else - { - set_mem_word (DATA_PC, *((mem_word *) value)); - increment_data_pc (BYTES_PER_WORD); - set_mem_word (DATA_PC, *(((mem_word *) value) + 1)); - increment_data_pc (BYTES_PER_WORD); - } -} - - -/* Process a .float EXPR directive. */ - -void -store_float (double *value) -{ - float val = (float)*value; - float *vp = &val; - - if ((DATA_PC & 0x3) != 0) - { - store_half (*(mem_word *) vp & 0xffff); - store_half ((*(mem_word *) vp >> 16) & 0xffff); - } - else - { - set_mem_word (DATA_PC, *((mem_word *) vp)); - increment_data_pc (BYTES_PER_WORD); - } -} diff --git a/spim-jsspim/CPU/data.h b/spim-jsspim/CPU/data.h deleted file mode 100755 index c058f88..0000000 --- a/spim-jsspim/CPU/data.h +++ /dev/null @@ -1,54 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to code to manipulate data segment directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -void align_data (int alignment); -mem_addr current_data_pc (); -void data_begins_at_point (mem_addr addr); -void enable_data_alignment (); -void end_of_assembly_file (); -void extern_directive (char *name, int size); -void increment_data_pc (int value); -void k_data_begins_at_point (mem_addr addr); -void lcomm_directive (char *name, int size); -void set_data_alignment (int); -void set_data_pc (mem_addr addr); -void set_text_pc (mem_addr addr); -void store_byte (int value); -void store_double (double *value); -void store_float (double *value); -void store_half (int value); -void store_string (char *string, int length, bool null_terminate); -void store_word (int value); -void user_kernel_data_segment (bool to_kernel); diff --git a/spim-jsspim/CPU/display-utils.cpp b/spim-jsspim/CPU/display-utils.cpp deleted file mode 100755 index 12ee33a..0000000 --- a/spim-jsspim/CPU/display-utils.cpp +++ /dev/null @@ -1,290 +0,0 @@ -/* SPIM S20 MIPS simulator. - Utilities for displaying machine contents. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "data.h" -#include "reg.h" -#include "mem.h" -#include "run.h" -#include "sym-tbl.h" - - -char* int_reg_names[32] = - {"r0", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra"}; - - -static mem_addr format_partial_line (str_stream *ss, mem_addr addr); - - -/* Write to the stream the contents of the machine's registers, in a wide - variety of formats. */ - -void -format_registers (str_stream *ss, int print_gpr_hex, int print_fpr_hex) -{ - int i; - char *grstr, *fpstr; - char *grfill, *fpfill; - - ss_printf (ss, " PC = %08x ", PC); - ss_printf (ss, "EPC = %08x ", CP0_EPC); - ss_printf (ss, " Cause = %08x ", CP0_Cause); - ss_printf (ss, " BadVAddr= %08x\n", CP0_BadVAddr); - ss_printf (ss, " Status = %08x ", CP0_Status); - ss_printf (ss, "HI = %08x ", HI); - ss_printf (ss, " LO = %08x\n", LO); - - if (print_gpr_hex) - grstr = "R%-2d (%2s) = %08x", grfill = " "; - else - grstr = "R%-2d (%2s) = %-10d", grfill = " "; - - ss_printf (ss, "\t\t\t\t General Registers\n"); - for (i = 0; i < 8; i++) - { - ss_printf (ss, grstr, i, int_reg_names[i], R[i]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+8, int_reg_names[i+8], R[i+8]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+16, int_reg_names[i+16], R[i+16]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+24, int_reg_names[i+24], R[i+24]); - ss_printf (ss, "\n"); - } - - ss_printf (ss, "\n FIR = %08x ", FIR); - ss_printf (ss, " FCSR = %08x ", FCSR); - ss_printf (ss, " FCCR = %08x ", FCCR); - ss_printf (ss, " FEXR = %08x\n", FEXR); - ss_printf (ss, " FENR = %08x\n", FENR); - - ss_printf (ss, "\t\t\t Double Floating Point Registers\n"); - - if (print_fpr_hex) - fpstr = "FP%-2d=%08x,%08x", fpfill = " "; - else - fpstr = "FP%-2d = %#-13.6g", fpfill = " "; - - if (print_fpr_hex) - for (i = 0; i < 4; i += 1) - { - int *r1, *r2; - - /* Use pointers to cast to ints without invoking float->int conversion - so we can just print the bits. */ - r1 = (int *)&FPR[i]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)&FPR[i+4]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+8, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)&FPR[i+8]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+16, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)&FPR[i+12]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+24, *r1, *r2); - ss_printf (ss, "\n"); - } - else for (i = 0; i < 4; i += 1) - { - ss_printf (ss, fpstr, 2*i, FPR[i]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+8, FPR[i+4]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+16, FPR[i+8]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+24, FPR[i+12]); - ss_printf (ss, "\n"); - } - - if (print_fpr_hex) - fpstr = "FP%-2d=%08x", fpfill = " "; - else - fpstr = "FP%-2d = %#-13.6g", fpfill = " "; - - ss_printf (ss, "\t\t\t Single Floating Point Registers\n"); - - if (print_fpr_hex) - for (i = 0; i < 8; i += 1) - { - /* Use pointers to cast to ints without invoking float->int conversion - so we can just print the bits. */ - ss_printf (ss, fpstr, i, *(int *)&FPR_S(i)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+8, *(int *)&FPR_S(i+8)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+16, *(int *)&FPR_S(i+16)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+24, *(int *)&FPR_S(i+24)); - ss_printf (ss, "\n"); - } - else for (i = 0; i < 8; i += 1) - { - ss_printf (ss, fpstr, i, FPR_S(i)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+8, FPR_S(i+8)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+16, FPR_S(i+16)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+24, FPR_S(i+24)); - ss_printf (ss, "\n"); - } -} - - - -/* Write to the stream a printable representation of the instructions in - memory addresses: FROM...TO. */ - -void -format_insts (str_stream *ss, mem_addr from, mem_addr to) -{ - instruction *inst; - mem_addr i; - - for (i = from; i < to; i += 4) - { - inst = read_mem_inst (i); - if (inst != NULL) - { - format_an_inst (ss, inst, i); - } - } -} - - -/* Write to the stream a printable representation of the data and stack - segments. */ - -void -format_data_segs (str_stream *ss) -{ - ss_printf (ss, "\tDATA\n"); - format_mem (ss, DATA_BOT, data_top); - - ss_printf (ss, "\n\tSTACK\n"); - format_mem (ss, ROUND_DOWN (R[29], BYTES_PER_WORD), STACK_TOP); - - ss_printf (ss, "\n\tKERNEL DATA\n"); - format_mem (ss, K_DATA_BOT, k_data_top); -} - - -#define BYTES_PER_LINE (4*BYTES_PER_WORD) - - -/* Write to the stream a printable representation of the data in memory - address: FROM...TO. */ - -void -format_mem (str_stream *ss, mem_addr from, mem_addr to) -{ - mem_word val; - mem_addr i = ROUND_UP (from, BYTES_PER_WORD); - int j; - - i = format_partial_line (ss, i); - - for ( ; i < to; ) - { - /* Count consecutive zero words */ - for (j = 0; (i + (uint32) j * BYTES_PER_WORD) < to; j += 1) - { - val = read_mem_word (i + (uint32) j * BYTES_PER_WORD); - if (val != 0) - { - break; - } - } - - if (j >= 4) - { - /* Block of 4 or more zero memory words: */ - ss_printf (ss, "[0x%08x]...[0x%08x] 0x00000000\n", - i, - i + (uint32) j * BYTES_PER_WORD); - - i = i + (uint32) j * BYTES_PER_WORD; - i = format_partial_line (ss, i); - } - else - { - /* Fewer than 4 zero words, print them on a single line: */ - ss_printf (ss, "[0x%08x] ", i); - do - { - val = read_mem_word (i); - ss_printf (ss, " 0x%08x", (unsigned int)val); - i += BYTES_PER_WORD; - } - while (i % BYTES_PER_LINE != 0); - - ss_printf (ss, "\n"); - } - } -} - - -/* Write to the stream a text line containing a fraction of a - quadword. Return the address after the last one written. */ - -static mem_addr -format_partial_line (str_stream *ss, mem_addr addr) -{ - if ((addr % BYTES_PER_LINE) != 0) - { - ss_printf (ss, "[0x%08x] ", addr); - - for (; (addr % BYTES_PER_LINE) != 0; addr += BYTES_PER_WORD) - { - mem_word val = read_mem_word (addr); - ss_printf (ss, " 0x%08x", (unsigned int)val); - } - - ss_printf (ss, "\n"); - } - - return addr; -} diff --git a/spim-jsspim/CPU/dump_ops.cpp b/spim-jsspim/CPU/dump_ops.cpp deleted file mode 100644 index 873acf3..0000000 --- a/spim-jsspim/CPU/dump_ops.cpp +++ /dev/null @@ -1,129 +0,0 @@ -/* SPIM S20 MIPS simulator. - Dump the op.h file in a readable format to allow checking of encodings. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include - -typedef struct inst_t -{ - char *opcode; - - union - { - unsigned int x; - struct - { - unsigned int funct:6; - unsigned int pad:10; - unsigned int rt:5; - unsigned int rs:5; - unsigned int op:6; - } f; - }; -} inst; - - -#define OP(a, b, c, d) {a, d}, - -inst ops [] = { -#include "op.h" -}; - - -int -compare_ops (inst *p1, inst *p2) -{ - if (p1->f.op < p2->f.op) - return (-1); - else if (p1->f.op > p2->f.op) - return (1); - else - { - if (p1->f.rs < p2->f.rs) - return (-1); - else if (p1->f.rs > p2->f.rs) - return (1); - else - { - if (p1->f.rt < p2->f.rt) - return (-1); - else if (p1->f.rt > p2->f.rt) - return (1); - else - { - if (p1->f.funct < p2->f.funct) - return (-1); - else if (p1->f.funct > p2->f.funct) - return (1); - else - return 0; - } - } - } -} - - -main (int argc, char** argv) -{ - /* Remove pseudo ops (opcode == -1) from table */ - int empty, next; - for (empty = 0, next = 0; next < (sizeof(ops) / sizeof(ops[0])); next += 1) - { - if (-1 == ops[next].x) - { - } - else - { - ops[empty] = ops[next]; - empty += 1; - } - } - - /* Radix sort instructions by field: op, rs, rt, funct */ - qsort (ops, empty, sizeof(ops[0]), compare_ops); - - /* Print related instructions in groups */ - int i; - for (i = 0; i < empty; i += 1) - { - if (0 < i && ops[i - 1].f.op != ops[i].f.op) - printf ("\n"); - - printf ("%10s op=%2d rs=%2d rt=%2d funct=%02x 0x%08x\n", - ops[i].opcode, - ops[i].f.op, - ops[i].f.rs, - ops[i].f.rt, - ops[i].f.funct, - ops[i].x); - } -} diff --git a/spim-jsspim/CPU/exceptions.s b/spim-jsspim/CPU/exceptions.s deleted file mode 100755 index 1abc5c4..0000000 --- a/spim-jsspim/CPU/exceptions.s +++ /dev/null @@ -1,195 +0,0 @@ -# SPIM S20 MIPS simulator. -# The default exception handler for spim. -# -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -# Define the exception handling code. This must go first! - - .kdata -__m1_: .asciiz " Exception " -__m2_: .asciiz " occurred and ignored\n" -__e0_: .asciiz " [Interrupt] " -__e1_: .asciiz " [TLB]" -__e2_: .asciiz " [TLB]" -__e3_: .asciiz " [TLB]" -__e4_: .asciiz " [Address error in inst/data fetch] " -__e5_: .asciiz " [Address error in store] " -__e6_: .asciiz " [Bad instruction address] " -__e7_: .asciiz " [Bad data address] " -__e8_: .asciiz " [Error in syscall] " -__e9_: .asciiz " [Breakpoint] " -__e10_: .asciiz " [Reserved instruction] " -__e11_: .asciiz "" -__e12_: .asciiz " [Arithmetic overflow] " -__e13_: .asciiz " [Trap] " -__e14_: .asciiz "" -__e15_: .asciiz " [Floating point] " -__e16_: .asciiz "" -__e17_: .asciiz "" -__e18_: .asciiz " [Coproc 2]" -__e19_: .asciiz "" -__e20_: .asciiz "" -__e21_: .asciiz "" -__e22_: .asciiz " [MDMX]" -__e23_: .asciiz " [Watch]" -__e24_: .asciiz " [Machine check]" -__e25_: .asciiz "" -__e26_: .asciiz "" -__e27_: .asciiz "" -__e28_: .asciiz "" -__e29_: .asciiz "" -__e30_: .asciiz " [Cache]" -__e31_: .asciiz "" -__excp: .word __e0_, __e1_, __e2_, __e3_, __e4_, __e5_, __e6_, __e7_, __e8_, __e9_ - .word __e10_, __e11_, __e12_, __e13_, __e14_, __e15_, __e16_, __e17_, __e18_, - .word __e19_, __e20_, __e21_, __e22_, __e23_, __e24_, __e25_, __e26_, __e27_, - .word __e28_, __e29_, __e30_, __e31_ -s1: .word 0 -s2: .word 0 - -# This is the exception handler code that the processor runs when -# an exception occurs. It only prints some information about the -# exception, but can server as a model of how to write a handler. -# -# Because we are running in the kernel, we can use $k0/$k1 without -# saving their old values. - -# This is the exception vector address for MIPS-1 (R2000): -# .ktext 0x80000080 -# This is the exception vector address for MIPS32: - .ktext 0x80000180 -# Select the appropriate one for the mode in which SPIM is compiled. - .set noat - move $k1 $at # Save $at - .set at - sw $v0 s1 # Not re-entrant and we can't trust $sp - sw $a0 s2 # But we need to use these registers - - mfc0 $k0 $13 # Cause register - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - - # Print information about exception. - # - li $v0 4 # syscall 4 (print_str) - la $a0 __m1_ - syscall - - li $v0 1 # syscall 1 (print_int) - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - syscall - - li $v0 4 # syscall 4 (print_str) - andi $a0 $k0 0x3c - lw $a0 __excp($a0) - nop - syscall - - bne $k0 0x18 ok_pc # Bad PC exception requires special checks - nop - - mfc0 $a0 $14 # EPC - andi $a0 $a0 0x3 # Is EPC word-aligned? - beq $a0 0 ok_pc - nop - - li $v0 10 # Exit on really bad PC - syscall - -ok_pc: - li $v0 4 # syscall 4 (print_str) - la $a0 __m2_ - syscall - - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - bne $a0 0 ret # 0 means exception was an interrupt - nop - -# Interrupt-specific code goes here! -# Don't skip instruction at EPC since it has not executed. - - -ret: -# Return from (non-interrupt) exception. Skip offending instruction -# at EPC to avoid infinite loop. -# - mfc0 $k0 $14 # Bump EPC register - addiu $k0 $k0 4 # Skip faulting instruction - # (Need to handle delayed branch case here) - mtc0 $k0 $14 - - -# Restore registers and reset procesor state -# - lw $v0 s1 # Restore other registers - lw $a0 s2 - - .set noat - move $at $k1 # Restore $at - .set at - - mtc0 $0 $13 # Clear Cause register - - mfc0 $k0 $12 # Set Status register - ori $k0 0x1 # Interrupts enabled - mtc0 $k0 $12 - -# Return from exception on MIPS32: - eret - -# Return sequence for MIPS-I (R2000): -# rfe # Return from exception handler - # Should be in jr's delay slot -# jr $k0 -# nop - - - -# Standard startup code. Invoke the routine "main" with arguments: -# main(argc, argv, envp) -# - .text - .globl __start -__start: - lw $a0 0($sp) # argc - addiu $a1 $sp 4 # argv - addiu $a2 $a1 4 # envp - sll $v0 $a0 2 - addu $a2 $a2 $v0 - jal main - nop - - li $v0 10 - syscall # syscall 10 (exit) - - .globl __eoth -__eoth: diff --git a/spim-jsspim/CPU/inst.cpp b/spim-jsspim/CPU/inst.cpp deleted file mode 100755 index 0f7e1c5..0000000 --- a/spim-jsspim/CPU/inst.cpp +++ /dev/null @@ -1,1638 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to build assembly instructions and resolve symbolic labels. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser.h" -#include "scanner.h" -#include "parser_yacc.h" -#include "data.h" - - -/* Local functions: */ - -static int compare_pair_value (name_val_val *p1, name_val_val *p2); -static void format_imm_expr (str_stream *ss, imm_expr *expr, int base_reg); -static void i_type_inst_full_word (int opcode, int rt, int rs, imm_expr *expr, - int value_known, int32 value); -static void inst_cmp (instruction *inst1, instruction *inst2); -static instruction *make_r_type_inst (int opcode, int rd, int rs, int rt); -static instruction *mk_i_inst (int32 value, int opcode, int rs, int rt, int offset); -static instruction *mk_j_inst (int32, int opcode, int target); -static instruction *mk_r_inst (int32, int opcode, int rs, int rt, int rd, int shamt); -static void produce_immediate (imm_expr *expr, int rt, int value_known, int32 value); -static void sort_a_opcode_table (); -static void sort_i_opcode_table (); -static void sort_name_table (); - - -/* Local variables: */ - -/* True means store instructions in kernel, not user, text segment */ - -static bool in_kernel = 0; - -/* Instruction used as breakpoint by SPIM: */ - -static instruction *break_inst = NULL; - - -/* Locations for next instruction in user and kernel text segments */ - -static mem_addr next_text_pc; - -static mem_addr next_k_text_pc; - - -#define INST_PC (in_kernel ? next_k_text_pc : next_text_pc) - - - -/* Set ADDRESS at which the next instruction is stored. */ - -void -text_begins_at_point (mem_addr addr) -{ - next_text_pc = addr; -} - - -void -k_text_begins_at_point (mem_addr addr) -{ - next_k_text_pc = addr; -} - - -/* Set the location (in user or kernel text space) for the next instruction. */ - -void -set_text_pc (mem_addr addr) -{ - if (in_kernel) - next_k_text_pc = addr; - else - next_text_pc = addr; -} - - -/* Return address for next instruction, in appropriate text segment. */ - -mem_addr -current_text_pc () -{ - return (INST_PC); -} - - -/* Increment the current text segement PC. */ - -void -increment_text_pc (int delta) -{ - if (in_kernel) - { - next_k_text_pc += delta; - if (k_text_top <= next_k_text_pc) - run_error("Can't expand kernel text segment\n"); - } - else - { - next_text_pc += delta; - if (text_top <= next_text_pc) - run_error("Can't expand text segment\n"); - } -} - - -/* If FLAG is true, next instruction goes to kernel text segment, - otherwise it goes to user segment. */ - -void -user_kernel_text_segment (bool to_kernel) -{ - in_kernel = to_kernel; -} - - -/* Store an INSTRUCTION in memory at the next location. */ - -void -store_instruction (instruction *inst) -{ - if (data_dir) - { - store_word (inst_encode (inst)); - free_inst (inst); - } - else if (text_dir) - { - exception_occurred = 0; - set_mem_inst (INST_PC, inst); - if (exception_occurred) - error ("Invalid address (0x%08x) for instruction\n", INST_PC); - else - increment_text_pc (BYTES_PER_WORD); - if (inst != NULL) - { - SET_SOURCE (inst, source_line ()); - if (ENCODING (inst) == 0) - SET_ENCODING (inst, inst_encode (inst)); - } - } -} - - - -void -i_type_inst_free (int opcode, int rt, int rs, imm_expr *expr) -{ - i_type_inst (opcode, rt, rs, expr); - free (expr); -} - - -/* Produce an immediate instruction with the OPCODE, RT, RS, and IMM - fields. NB, because the immediate value may not fit in the field, - this routine may produce more than one instruction. On the bare - machine, we resolve symbolic address, but they better produce values - that fit into instruction's immediate field. */ - -void -i_type_inst (int opcode, int rt, int rs, imm_expr *expr) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_EXPR (inst, copy_imm_expr (expr)); - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* Evaluate the instruction's expression. */ - int32 value = eval_imm_expr (expr); - - if (!bare_machine - && (((opcode == Y_ADDI_OP - || opcode == Y_ADDIU_OP - || opcode == Y_SLTI_OP - || opcode == Y_SLTIU_OP - || opcode == Y_TEQI_OP - || opcode == Y_TGEI_OP - || opcode == Y_TGEIU_OP - || opcode == Y_TLTI_OP - || opcode == Y_TLTIU_OP - || opcode == Y_TNEI_OP - || (opcode_is_load_store (opcode) && expr->bits == 0)) - // Sign-extended immediate values: - ? ((value & 0xffff8000) != 0 && (value & 0xffff8000) != 0xffff8000) - // Not sign-extended: - : (value & 0xffff0000) != 0))) - { - // Non-immediate value - free_inst (inst); - i_type_inst_full_word (opcode, rt, rs, expr, 1, value); - return; - } - else - resolve_a_label (expr->symbol, inst); - } - else if (bare_machine || expr->bits != 0) - /* Don't know expression's value, but only needed upper/lower 16-bits - anyways. */ - record_inst_uses_symbol (inst, expr->symbol); - else - { - /* Don't know the expressions's value and want all of its bits, - so assume that it will not produce a small result and generate - sequence for 32 bit value. */ - free_inst (inst); - - i_type_inst_full_word (opcode, rt, rs, expr, 0, 0); - return; - } - - store_instruction (inst); -} - - -/* The immediate value for an instruction will (or may) not fit in 16 bits. - Build the value from its piece with separate instructions. */ - -static void -i_type_inst_full_word (int opcode, int rt, int rs, imm_expr *expr, - int value_known, int32 value) -{ - if (opcode_is_load_store (opcode)) - { - int32 offset; - - if (expr->symbol != NULL - && expr->symbol->gp_flag - && rs == 0 - && (int32)IMM_MIN <= (offset = expr->symbol->addr + expr->offset) - && offset <= (int32)IMM_MAX) - { - i_type_inst_free (opcode, rt, REG_GP, make_imm_expr (offset, NULL, false)); - } - else if (value_known) - { - int low, high; - - high = (value >> 16) & 0xffff; - low = value & 0xffff; - - if (!(high == 0 && !(low & 0x8000)) && - !(high == 0xffff && (low & 0x8000))) - { - /* Some of high 16 bits are non-zero */ - if (low & 0x8000) - { - /* Adjust high 16, since load sign-extends low 16*/ - high += 1; - } - - i_type_inst_free (Y_LUI_OP, 1, 0, const_imm_expr (high)); - if (rs != 0) /* Base register */ - { - r_type_inst (Y_ADDU_OP, 1, 1, rs); - } - i_type_inst_free (opcode, rt, 1, lower_bits_of_expr (const_imm_expr (low))); - } - else - { - /* Special case, sign-extension of low 16 bits sets high to 0xffff */ - i_type_inst_free (opcode, rt, rs, const_imm_expr (low)); - } - } - else - { - /* Use $at */ - /* Need to adjust if lower bits are negative */ - i_type_inst_free (Y_LUI_OP, 1, 0, upper_bits_of_expr (expr)); - if (rs != 0) /* Base register */ - { - r_type_inst (Y_ADDU_OP, 1, 1, rs); - } - i_type_inst_free (opcode, rt, 1, lower_bits_of_expr (expr)); - } - } - else if (opcode_is_branch (opcode)) - { - /* This only allows branches +/- 32K, which is not correct! */ - i_type_inst_free (opcode, rt, rs, lower_bits_of_expr (expr)); - } - else - /* Computation instruction */ - { - int offset; - - if (expr->symbol != NULL - && expr->symbol->gp_flag && rs == 0 - && (int32)IMM_MIN <= (offset = expr->symbol->addr + expr->offset) - && offset <= (int32)IMM_MAX) - { - i_type_inst_free ((opcode == Y_LUI_OP ? Y_ADDIU_OP : opcode), - rt, REG_GP, make_imm_expr (offset, NULL, false)); - } - else - { - /* Use $at */ - if ((opcode == Y_ORI_OP - || opcode == Y_ADDI_OP - || opcode == Y_ADDIU_OP - || opcode == Y_LUI_OP) - && rs == 0) - { - produce_immediate(expr, rt, value_known, value); - } - else - { - produce_immediate(expr, 1, value_known, value); - r_type_inst (imm_op_to_op (opcode), rt, rs, 1); - } - } - } -} - - -static void -produce_immediate (imm_expr *expr, int rt, int value_known, int32 value) -{ - if (value_known && (value & 0xffff) == 0) - { - i_type_inst_free (Y_LUI_OP, rt, 0, upper_bits_of_expr (expr)); - } - else if (value_known && (value & 0xffff0000) == 0) - { - i_type_inst_free (Y_ORI_OP, rt, 0, lower_bits_of_expr (expr)); - } - else - { - i_type_inst_free (Y_LUI_OP, 1, 0, upper_bits_of_expr (expr)); - i_type_inst_free (Y_ORI_OP, rt, 1, lower_bits_of_expr(expr)); - } -} - - -/* Return a jump-type instruction with the given OPCODE and TARGET - fields. NB, even the immediate value may not fit in the field, this - routine will not produce more than one instruction. */ - -void -j_type_inst (int opcode, imm_expr *target) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE(inst, opcode); - target->offset = 0; /* Not PC relative */ - target->pc_relative = false; - SET_EXPR (inst, copy_imm_expr (target)); - if (target->symbol == NULL || SYMBOL_IS_DEFINED (target->symbol)) - resolve_a_label (target->symbol, inst); - else - record_inst_uses_symbol (inst, target->symbol); - store_instruction (inst); -} - - -/* Return a register-type instruction with the given OPCODE, RD, RS, and RT - fields. */ - -static instruction * -make_r_type_inst (int opcode, int rd, int rs, int rt) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE(inst, opcode); - SET_RS(inst, rs); - SET_RT(inst, rt); - SET_RD(inst, rd); - SHAMT(inst) = 0; - return (inst); -} - - -/* Return a register-type instruction with the given OPCODE, RD, RS, and RT - fields. */ - -void -r_type_inst (int opcode, int rd, int rs, int rt) -{ - store_instruction (make_r_type_inst (opcode, rd, rs, rt)); -} - - -/* Return a register-type instruction with the given OPCODE, FD, FS, and FT - fields. */ - -void -r_co_type_inst (int opcode, int fd, int fs, int ft) -{ - instruction *inst = make_r_type_inst (opcode, fs, 0, ft); - SET_FD (inst, fd); - store_instruction (inst); -} - - -/* Return a register-shift instruction with the given OPCODE, RD, RT, and - SHAMT fields.*/ - -void -r_sh_type_inst (int opcode, int rd, int rt, int shamt) -{ - instruction *inst = make_r_type_inst (opcode, rd, 0, rt); - SET_SHAMT(inst, shamt & 0x1f); - store_instruction (inst); -} - - -/* Return a floating-point compare instruction with the given OPCODE, - FS, FT, and CC fields.*/ - -void -r_cond_type_inst (int opcode, int fs, int ft, int cc) -{ - instruction *inst = make_r_type_inst (opcode, fs, 0, ft); - SET_FD(inst, cc << 2); - switch (opcode) - { - case Y_C_EQ_D_OP: - case Y_C_EQ_S_OP: - { - SET_COND(inst, COND_EQ); - break; - } - - case Y_C_LE_D_OP: - case Y_C_LE_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_EQ); - break; - } - - case Y_C_LT_D_OP: - case Y_C_LT_S_OP: - { - SET_COND(inst, COND_IN | COND_LT); - break; - } - - case Y_C_NGE_D_OP: - case Y_C_NGE_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_UN); - break; - } - - case Y_C_NGLE_D_OP: - case Y_C_NGLE_S_OP: - { - SET_COND(inst, COND_IN | COND_UN); - break; - } - - case Y_C_NGL_D_OP: - case Y_C_NGL_S_OP: - { - SET_COND(inst, COND_IN | COND_EQ | COND_UN); - break; - } - - case Y_C_NGT_D_OP: - case Y_C_NGT_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_EQ | COND_UN); - break; - } - - case Y_C_OLT_D_OP: - case Y_C_OLT_S_OP: - { - SET_COND(inst, COND_LT); - break; - } - - case Y_C_OLE_D_OP: - case Y_C_OLE_S_OP: - { - SET_COND(inst, COND_LT | COND_EQ); - break; - } - - case Y_C_SEQ_D_OP: - case Y_C_SEQ_S_OP: - { - SET_COND(inst, COND_IN | COND_EQ); - break; - } - - case Y_C_SF_D_OP: - case Y_C_SF_S_OP: - { - SET_COND(inst, COND_IN); - break; - } - - case Y_C_F_D_OP: - case Y_C_F_S_OP: - { - SET_COND(inst, 0); - break; - } - - case Y_C_UEQ_D_OP: - case Y_C_UEQ_S_OP: - { - SET_COND(inst, COND_EQ | COND_UN); - break; - } - - case Y_C_ULT_D_OP: - case Y_C_ULT_S_OP: - { - SET_COND(inst, COND_LT | COND_UN); - break; - } - - case Y_C_ULE_D_OP: - case Y_C_ULE_S_OP: - { - SET_COND(inst, COND_LT | COND_EQ | COND_UN); - break; - } - - case Y_C_UN_D_OP: - case Y_C_UN_S_OP: - { - SET_COND(inst, COND_UN); - break; - } - } - store_instruction (inst); -} - - -/* Make and return a deep copy of INST. */ - -instruction * -copy_inst (instruction *inst) -{ - instruction *new_inst = (instruction *) xmalloc (sizeof (instruction)); - - *new_inst = *inst; - /*memcpy ((void*)new_inst, (void*)inst , sizeof (instruction));*/ - SET_EXPR (new_inst, copy_imm_expr (EXPR (inst))); - return (new_inst); -} - - -void -free_inst (instruction *inst) -{ - if (inst != break_inst) - /* Don't free the breakpoint insructions since we only have one. */ - { - if (EXPR (inst)) - free (EXPR (inst)); - free (inst); - } -} - - - -/* Maintain a table mapping from opcode to instruction name and - instruction type. - - Table must be sorted before first use since its entries are - alphabetical on name, not ordered by opcode. */ - - -/* Sort all instruction table before first use. */ - -void -initialize_inst_tables () -{ - sort_name_table (); - sort_i_opcode_table (); - sort_a_opcode_table (); -} - - -/* Map from opcode -> name/type. */ - -static name_val_val name_tbl [] = { -#undef OP -#define OP(NAME, OPCODE, TYPE, R_OPCODE) {NAME, OPCODE, TYPE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the opcode value). */ - -static void -sort_name_table () -{ - qsort (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - -/* Compare the VALUE1 field of two NAME_VAL_VAL entries in the format - required by qsort. */ - -static int -compare_pair_value (name_val_val *p1, name_val_val *p2) -{ - if (p1->value1 < p2->value1) - return (-1); - else if (p1->value1 > p2->value1) - return (1); - else - return (0); -} - - -/* Print the instruction stored at the memory ADDRESS. */ - -void -print_inst (mem_addr addr) -{ - char* inst_str = inst_to_string (addr); - write_output (message_out, inst_str); - free (inst_str); -} - - -char* -inst_to_string(mem_addr addr) -{ - str_stream ss; - instruction *inst; - - exception_occurred = 0; - inst = read_mem_inst (addr); - - if (exception_occurred) - { - error ("Can't print instruction not in text segment (0x%08x)\n", addr); - return ""; - } - - ss_init (&ss); - format_an_inst (&ss, inst, addr); - return ss_to_string (&ss); -} - - -void -format_an_inst (str_stream *ss, instruction *inst, mem_addr addr) -{ - name_val_val *entry; - int line_start = ss_length (ss); - - if (inst_is_breakpoint (addr)) - { - delete_breakpoint (addr); - ss_printf (ss, "*"); - format_an_inst (ss, read_mem_inst (addr), addr); - add_breakpoint (addr); - return; - } - - ss_printf (ss, "[0x%08x]\t", addr); - if (inst == NULL) - { - ss_printf (ss, "\n"); - return; - } - - entry = map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - OPCODE (inst)); - if (entry == NULL) - { - ss_printf (ss, "\n", OPCODE (inst)); - return; - } - - ss_printf (ss, "0x%08x %s", (uint32)ENCODING (inst), entry->name); - switch (entry->value2) - { - case BC_TYPE_INST: - ss_printf (ss, "%d %d", CC (inst), IDISP (inst)); - break; - - case B1_TYPE_INST: - ss_printf (ss, " $%d %d", RS (inst), IDISP (inst)); - break; - - case I1s_TYPE_INST: - ss_printf (ss, " $%d, %d", RS (inst), IMM (inst)); - break; - - case I1t_TYPE_INST: - ss_printf (ss, " $%d, %d", RT (inst), IMM (inst)); - break; - - case I2_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RT (inst), RS (inst), IMM (inst)); - break; - - case B2_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RS (inst), RT (inst), IDISP (inst)); - break; - - case I2a_TYPE_INST: - ss_printf (ss, " $%d, %d($%d)", RT (inst), IMM (inst), BASE (inst)); - break; - - case R1s_TYPE_INST: - ss_printf (ss, " $%d", RS (inst)); - break; - - case R1d_TYPE_INST: - ss_printf (ss, " $%d", RD (inst)); - break; - - case R2td_TYPE_INST: - ss_printf (ss, " $%d, $%d", RT (inst), RD (inst)); - break; - - case R2st_TYPE_INST: - ss_printf (ss, " $%d, $%d", RS (inst), RT (inst)); - break; - - case R2ds_TYPE_INST: - ss_printf (ss, " $%d, $%d", RD (inst), RS (inst)); - break; - - case R2sh_TYPE_INST: - if (ENCODING (inst) == 0) - { - ss_erase (ss, 3); /* zap sll */ - ss_printf (ss, "nop"); - } - else - ss_printf (ss, " $%d, $%d, %d", RD (inst), RT (inst), SHAMT (inst)); - break; - - case R3_TYPE_INST: - ss_printf (ss, " $%d, $%d, $%d", RD (inst), RS (inst), RT (inst)); - break; - - case R3sh_TYPE_INST: - ss_printf (ss, " $%d, $%d, $%d", RD (inst), RT (inst), RS (inst)); - break; - - case FP_I2a_TYPE_INST: - ss_printf (ss, " $f%d, %d($%d)", FT (inst), IMM (inst), BASE (inst)); - break; - - case FP_R2ds_TYPE_INST: - ss_printf (ss, " $f%d, $f%d", FD (inst), FS (inst)); - break; - - case FP_R2ts_TYPE_INST: - ss_printf (ss, " $%d, $f%d", RT (inst), FS (inst)); - break; - - case FP_CMP_TYPE_INST: - if (FD (inst) == 0) - ss_printf (ss, " $f%d, $f%d", FS (inst), FT (inst)); - else - ss_printf (ss, " %d, $f%d, $f%d", FD (inst) >> 2, FS (inst), FT (inst)); - break; - - case FP_R3_TYPE_INST: - ss_printf (ss, " $f%d, $f%d, $f%d", FD (inst), FS (inst), FT (inst)); - break; - - case MOVC_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RD (inst), RS (inst), RT (inst) >> 2); - break; - - case FP_MOVC_TYPE_INST: - ss_printf (ss, " $f%d, $f%d, %d", FD (inst), FS (inst), CC (inst)); - break; - - case J_TYPE_INST: - ss_printf (ss, " 0x%08x", TARGET (inst) << 2); - break; - - case NOARG_TYPE_INST: - break; - - default: - fatal_error ("Unknown instruction type in print_inst\n"); - } - - if (EXPR (inst) != NULL && EXPR (inst)->symbol != NULL) - { - ss_printf (ss, " ["); - if (opcode_is_load_store (OPCODE (inst))) - format_imm_expr (ss, EXPR (inst), BASE (inst)); - else - format_imm_expr (ss, EXPR (inst), -1); - ss_printf (ss, "]"); - } - - if (SOURCE (inst) != NULL) - { - /* Comment is source line text of current line. */ - int gap_length = 57 - (ss_length (ss) - line_start); - for ( ; 0 < gap_length; gap_length -= 1) - { - ss_printf (ss, " "); - } - - ss_printf (ss, "; "); - ss_printf (ss, "%s", SOURCE (inst)); - } - - ss_printf (ss, "\n"); -} - - - -/* Return true if SPIM OPCODE (e.g. Y_...) represents a conditional - branch. */ - -bool -opcode_is_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1F_OP: - case Y_BC1FL_OP: - case Y_BC1T_OP: - case Y_BC1TL_OP: - case Y_BC2F_OP: - case Y_BC2FL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - case Y_BEQ_OP: - case Y_BEQL_OP: - case Y_BEQZ_POP: - case Y_BGE_POP: - case Y_BGEU_POP: - case Y_BGEZ_OP: - case Y_BGEZAL_OP: - case Y_BGEZALL_OP: - case Y_BGEZL_OP: - case Y_BGT_POP: - case Y_BGTU_POP: - case Y_BGTZ_OP: - case Y_BGTZL_OP: - case Y_BLE_POP: - case Y_BLEU_POP: - case Y_BLEZ_OP: - case Y_BLEZL_OP: - case Y_BLT_POP: - case Y_BLTU_POP: - case Y_BLTZ_OP: - case Y_BLTZAL_OP: - case Y_BLTZALL_OP: - case Y_BLTZL_OP: - case Y_BNE_OP: - case Y_BNEL_OP: - case Y_BNEZ_POP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE represents a nullified (e.g., Y_...L_OP) - conditional branch. */ - -bool -opcode_is_nullified_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1FL_OP: - case Y_BC1TL_OP: - case Y_BC2FL_OP: - case Y_BC2TL_OP: - case Y_BEQL_OP: - case Y_BGEZALL_OP: - case Y_BGEZL_OP: - case Y_BGTZL_OP: - case Y_BLEZL_OP: - case Y_BLTZALL_OP: - case Y_BLTZL_OP: - case Y_BNEL_OP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE (e.g. Y_...) represents a conditional - branch on a true condition. */ - -bool -opcode_is_true_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1T_OP: - case Y_BC1TL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE (e.g. Y_...) is a direct unconditional - branch (jump). */ - -bool -opcode_is_jump (int opcode) -{ - switch (opcode) - { - case Y_J_OP: - case Y_JAL_OP: - return true; - - default: - return false; - } -} - -/* Return true if SPIM OPCODE (e.g. Y_...) is a load or store. */ - -bool -opcode_is_load_store (int opcode) -{ - switch (opcode) - { - case Y_LB_OP: - case Y_LBU_OP: - case Y_LH_OP: - case Y_LHU_OP: - case Y_LL_OP: - case Y_LDC1_OP: - case Y_LDC2_OP: - case Y_LW_OP: - case Y_LWC1_OP: - case Y_LWC2_OP: - case Y_LWL_OP: - case Y_LWR_OP: - case Y_SB_OP: - case Y_SC_OP: - case Y_SH_OP: - case Y_SDC1_OP: - case Y_SDC2_OP: - case Y_SW_OP: - case Y_SWC1_OP: - case Y_SWC2_OP: - case Y_SWL_OP: - case Y_SWR_OP: - return true; - - default: - return false; - } -} - - -/* Return true if a breakpoint is set at ADDR. */ - -bool -inst_is_breakpoint (mem_addr addr) -{ - if (break_inst == NULL) - break_inst = make_r_type_inst (Y_BREAK_OP, 1, 0, 0); - - return (read_mem_inst (addr) == break_inst); -} - - -/* Set a breakpoint at ADDR and return the old instruction. If the - breakpoint cannot be set, return NULL. */ - -instruction * -set_breakpoint (mem_addr addr) -{ - instruction *old_inst; - - if (break_inst == NULL) - break_inst = make_r_type_inst (Y_BREAK_OP, 1, 0, 0); - - exception_occurred = 0; - old_inst = read_mem_inst (addr); - if (old_inst == break_inst) - return (NULL); - - set_mem_inst (addr, break_inst); - if (exception_occurred) - return (NULL); - else - return (old_inst); -} - - - -/* An immediate expression has the form: SYMBOL +/- IOFFSET, where either - part may be omitted. */ - -/* Make and return a new immediate expression */ - -imm_expr * -make_imm_expr (int offs, char *sym, bool is_pc_relative) -{ - imm_expr *expr = (imm_expr *) xmalloc (sizeof (imm_expr)); - - expr->offset = offs; - expr->bits = 0; - expr->pc_relative = is_pc_relative; - if (sym != NULL) - expr->symbol = lookup_label (sym); - else - expr->symbol = NULL; - return (expr); -} - - -/* Return a shallow copy of the EXPRESSION. */ - -imm_expr * -copy_imm_expr (imm_expr *old_expr) -{ - imm_expr *expr = (imm_expr *) xmalloc (sizeof (imm_expr)); - - *expr = *old_expr; - /*memcpy ((void*)expr, (void*)old_expr, sizeof (imm_expr));*/ - return (expr); -} - - -/* Return a shallow copy of an EXPRESSION that only uses the upper - sixteen bits of the expression's value. */ - -imm_expr * -upper_bits_of_expr (imm_expr *old_expr) -{ - imm_expr *expr = copy_imm_expr (old_expr); - - expr->bits = 1; - return (expr); -} - - -/* Return a shallow copy of the EXPRESSION that only uses the lower - sixteen bits of the expression's value. */ - -imm_expr * -lower_bits_of_expr (imm_expr *old_expr) -{ - imm_expr *expr = copy_imm_expr (old_expr); - - expr->bits = -1; - return (expr); -} - - -/* Return an instruction expression for a constant VALUE. */ - -imm_expr * -const_imm_expr (int32 value) -{ - return (make_imm_expr (value, NULL, false)); -} - - -/* Return a shallow copy of the EXPRESSION with the offset field - incremented by the given amount. */ - -imm_expr * -incr_expr_offset (imm_expr *expr, int32 value) -{ - imm_expr *new_expr = copy_imm_expr (expr); - - new_expr->offset += value; - return (new_expr); -} - - -/* Return the value of the EXPRESSION. */ - -int32 -eval_imm_expr (imm_expr *expr) -{ - int32 value; - - if (expr->symbol == NULL) - value = expr->offset; - else if (SYMBOL_IS_DEFINED (expr->symbol)) - { - value = expr->offset + expr->symbol->addr; - } - else - { - error ("Evaluated undefined symbol: %s\n", expr->symbol->name); - value = 0; - } - if (expr->bits > 0) - return ((value >> 16) & 0xffff); /* Use upper bits of result */ - else if (expr->bits < 0) - return (value & 0xffff); /* Use lower bits */ - else - return (value); -} - - -/* Print the EXPRESSION. */ - -static void -format_imm_expr (str_stream *ss, imm_expr *expr, int base_reg) -{ - if (expr->symbol != NULL) - { - ss_printf (ss, "%s", expr->symbol->name); - } - - if (expr->pc_relative) - ss_printf (ss, "-0x%08x", (unsigned int)-expr->offset); - else if (expr->offset < -10) - ss_printf (ss, "-%d (-0x%08x)", -expr->offset, (unsigned int)-expr->offset); - else if (expr->offset > 10) - ss_printf (ss, "+%d (0x%08x)", expr->offset, (unsigned int)expr->offset); - - if (base_reg != -1 && expr->symbol != NULL && - (expr->offset > 10 || expr->offset < -10)) - { - if (expr->offset == 0 && base_reg != 0) - ss_printf (ss, "+0"); - - if (expr->offset != 0 || base_reg != 0) - ss_printf (ss, "($%d)", base_reg); - } -} - - -/* Return true if the EXPRESSION is a constant 0. */ - -bool -is_zero_imm (imm_expr *expr) -{ - return (expr->offset == 0 && expr->symbol == NULL); -} - - - -/* Return an address expression of the form SYMBOL +/- IOFFSET (REGISTER). - Any of the three parts may be omitted. */ - -addr_expr * -make_addr_expr (int offs, char *sym, int reg_no) -{ - addr_expr *expr = (addr_expr *) xmalloc (sizeof (addr_expr)); - label *lab; - - if (reg_no == 0 && sym != NULL && (lab = lookup_label (sym))->gp_flag) - { - expr->reg_no = REG_GP; - expr->imm = make_imm_expr (offs + lab->addr - gp_midpoint, NULL, false); - } - else - { - expr->reg_no = (unsigned char)reg_no; - expr->imm = make_imm_expr (offs, (sym ? str_copy (sym) : sym), false); - } - return (expr); -} - - -imm_expr * -addr_expr_imm (addr_expr *expr) -{ - return (expr->imm); -} - - -int -addr_expr_reg (addr_expr *expr) -{ - return (expr->reg_no); -} - - - -/* Map between a SPIM instruction and the binary representation of the - instruction. */ - - -/* Maintain a table mapping from internal opcode (i_opcode) to actual - opcode (a_opcode). Table must be sorted before first use since its - entries are alphabetical on name, not ordered by opcode. */ - - -/* Map from internal opcode -> real opcode */ - -static name_val_val i_opcode_tbl [] = { -#undef OP -#define OP(NAME, I_OPCODE, TYPE, A_OPCODE) {NAME, I_OPCODE, (int)A_OPCODE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the interal opcode value). */ - -static void -sort_i_opcode_table () -{ - qsort (i_opcode_tbl, - sizeof (i_opcode_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - -#define REGS(R,O) (((R) & 0x1f) << O) - - -int32 -inst_encode (instruction *inst) -{ - int32 a_opcode = 0; - name_val_val *entry; - - if (inst == NULL) - return (0); - - entry = map_int_to_name_val_val (i_opcode_tbl, - sizeof (i_opcode_tbl) / sizeof (name_val_val), - OPCODE (inst)); - if (entry == NULL) - return 0; - - a_opcode = entry->value2; - entry = map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - OPCODE (inst)); - - switch (entry->value2) - { - case BC_TYPE_INST: - return (a_opcode - | REGS (CC (inst) << 2, 16) - | (IOFFSET (inst) & 0xffff)); - - case B1_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | (IOFFSET (inst) & 0xffff)); - - case I1s_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | (IMM (inst) & 0xffff)); - - case I1t_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | (IMM (inst) & 0xffff)); - - case I2_TYPE_INST: - case B2_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | (IMM (inst) & 0xffff)); - - case I2a_TYPE_INST: - return (a_opcode - | REGS (BASE (inst), 21) - | REGS (RT (inst), 16) - | (IOFFSET (inst) & 0xffff)); - - case R1s_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21)); - - case R1d_TYPE_INST: - return (a_opcode - | REGS (RD (inst), 11)); - - case R2td_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case R2st_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16)); - - case R2ds_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RD (inst), 11)); - - case R2sh_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (RD (inst), 11) - | REGS (SHAMT (inst), 6)); - - case R3_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case R3sh_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case FP_I2a_TYPE_INST: - return (a_opcode - | REGS (BASE (inst), 21) - | REGS (RT (inst), 16) - | (IOFFSET (inst) & 0xffff)); - - case FP_R2ds_TYPE_INST: - return (a_opcode - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case FP_R2ts_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (FS (inst), 11)); - - case FP_CMP_TYPE_INST: - return (a_opcode - | REGS (FT (inst), 16) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6) - | COND (inst)); - - case FP_R3_TYPE_INST: - return (a_opcode - | REGS (FT (inst), 16) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case MOVC_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case FP_MOVC_TYPE_INST: - return (a_opcode - | REGS (CC (inst), 18) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case J_TYPE_INST: - return (a_opcode - | TARGET (inst)); - - case NOARG_TYPE_INST: - return (a_opcode); - - default: - fatal_error ("Unknown instruction type in inst_encoding\n"); - return (0); /* Not reached */ - } -} - - -/* Maintain a table mapping from actual opcode to interal opcode. - Table must be sorted before first use since its entries are - alphabetical on name, not ordered by opcode. */ - - -/* Map from internal opcode -> real opcode */ - -static name_val_val a_opcode_tbl [] = { -#undef OP -#define OP(NAME, I_OPCODE, TYPE, A_OPCODE) {NAME, (int)A_OPCODE, (int)I_OPCODE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the interal opcode value). */ - -static void -sort_a_opcode_table () -{ - qsort (a_opcode_tbl, - sizeof (a_opcode_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - - -instruction * -inst_decode (int32 val) -{ - int32 a_opcode = val & 0xfc000000; - name_val_val *entry; - int32 i_opcode; - - /* Field classes: (opcode is continued in other part of instruction): */ - if (a_opcode == 0 || a_opcode == 0x70000000) /* SPECIAL or SPECIAL2 */ - a_opcode |= (val & 0x3f); - else if (a_opcode == 0x04000000) /* REGIMM */ - a_opcode |= (val & 0x001f0000); - else if (a_opcode == 0x40000000) /* COP0 */ - a_opcode |= (val & 0x03e00000) | (val & 0x1f); - else if (a_opcode == 0x44000000) /* COP1 */ - { - a_opcode |= (val & 0x03e00000); - if ((val & 0xff000000) == 0x45000000) - a_opcode |= (val & 0x00010000); /* BC1f/t */ - else - a_opcode |= (val & 0x3f); - } - else if (a_opcode == 0x48000000 /* COPz */ - || a_opcode == 0x4c000000) - a_opcode |= (val & 0x03e00000); - - - entry = map_int_to_name_val_val (a_opcode_tbl, - sizeof (a_opcode_tbl) / sizeof (name_val_val), - a_opcode); - if (entry == NULL) - return (mk_r_inst (val, 0, 0, 0, 0, 0)); /* Invalid inst */ - - i_opcode = entry->value2; - - switch (map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - i_opcode)->value2) - { - case BC_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case B1_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), 0, val & 0xffff)); - - case I1s_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), 0, val & 0xffff)); - - case I1t_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case I2_TYPE_INST: - case B2_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case I2a_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case R1s_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), 0, 0, 0)); - - case R1d_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, 0, BIN_RD(val), 0)); - - case R2td_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_RD(val), 0)); - - case R2st_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), 0, 0)); - - case R2ds_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), 0, BIN_RD(val), 0)); - - case R2sh_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_RD(val), BIN_SA(val))); - - case R3_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case R3sh_TYPE_INST: - return(mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case FP_I2a_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_BASE(val), BIN_FT(val), val & 0xffff)); - - case FP_R2ds_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_FS(val), 0, BIN_FD(val), 0)); - - case FP_R2ts_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_FS(val), 0)); - - case FP_CMP_TYPE_INST: - { - instruction *inst = mk_r_inst (val, i_opcode, BIN_FS (val), BIN_FT (val), BIN_FD(val), 0); - SET_COND (inst, val & 0xf); - return (inst); - } - - case FP_R3_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_FS(val), BIN_FT(val), BIN_FD(val), 0)); - - case MOVC_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case FP_MOVC_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_FS(val), BIN_RT(val), BIN_FD(val), 0)); - - case J_TYPE_INST: - return (mk_j_inst (val, i_opcode, val & 0x2ffffff)); - - - case NOARG_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, 0, 0, 0)); - - default: - return (mk_r_inst (val, 0, 0, 0, 0, 0)); /* Invalid inst */ - } -} - - -static instruction * -mk_r_inst (int32 val, int opcode, int rs, int rt, int rd, int shamt) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_RD (inst, rd); - SET_SHAMT (inst, shamt); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - - -static instruction * -mk_i_inst (int32 val, int opcode, int rs, int rt, int offset) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_IOFFSET (inst, offset); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - -static instruction * -mk_j_inst (int32 val, int opcode, int target) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_TARGET (inst, target); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - - - -/* Code to test encode/decode of instructions. */ - -void -test_assembly (instruction *inst) -{ - instruction *new_inst = inst_decode (inst_encode (inst)); - - inst_cmp (inst, new_inst); - free_inst (new_inst); -} - - -static void -inst_cmp (instruction *inst1, instruction *inst2) -{ - static str_stream ss; - - ss_clear (&ss); - if (memcmp (inst1, inst2, sizeof (instruction) - 4) != 0) - { - ss_printf (&ss, "=================== Not Equal ===================\n"); - format_an_inst (&ss, inst1, 0); - format_an_inst (&ss, inst2, 0); - ss_printf (&ss, "=================== Not Equal ===================\n"); - } -} diff --git a/spim-jsspim/CPU/inst.h b/spim-jsspim/CPU/inst.h deleted file mode 100755 index 809bff1..0000000 --- a/spim-jsspim/CPU/inst.h +++ /dev/null @@ -1,273 +0,0 @@ -/* SPIM S20 MIPS simulator. - Description of a SPIM S20 instruction. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Represenation of the expression that produce a value for an instruction's - immediate field. Immediates have the form: label +/- offset. */ - -typedef struct immexpr -{ - int offset; /* Offset from symbol */ - struct lab *symbol; /* Symbolic label */ - short bits; /* > 0 => 31..16, < 0 => 15..0 */ - bool pc_relative; /* => offset from label in code */ -} imm_expr; - - -/* Representation of the expression that produce an address for an - instruction. Address have the form: label +/- offset (register). */ - -typedef struct addrexpr -{ - unsigned char reg_no; /* Register number */ - imm_expr *imm; /* The immediate part */ -} addr_expr; - - - -/* Representation of an instruction. Store the instruction fields in an - overlapping manner similar to the real encoding (but not identical, to - speed decoding in C code, as opposed to hardware).. */ - -typedef struct inst_s -{ - short opcode; - - union - { - /* R-type or I-type: */ - struct - { - unsigned char rs; - unsigned char rt; - - union - { - short imm; - - struct - { - unsigned char rd; - unsigned char shamt; - } r; - } r_i; - } r_i; - - /* J-type: */ - mem_addr target; - } r_t; - - int32 encoding; - imm_expr *expr; - char *source_line; -} instruction; - - -#define OPCODE(INST) (INST)->opcode -#define SET_OPCODE(INST, VAL) (INST)->opcode = (short)(VAL) - - -#define RS(INST) (INST)->r_t.r_i.rs -#define SET_RS(INST, VAL) (INST)->r_t.r_i.rs = (unsigned char)(VAL) - -#define RT(INST) (INST)->r_t.r_i.rt -#define SET_RT(INST, VAL) (INST)->r_t.r_i.rt = (unsigned char)(VAL) - -#define RD(INST) (INST)->r_t.r_i.r_i.r.rd -#define SET_RD(INST, VAL) (INST)->r_t.r_i.r_i.r.rd = (unsigned char)(VAL) - - -#define FS(INST) RD(INST) -#define SET_FS(INST, VAL) SET_RD(INST, VAL) - -#define FT(INST) RT(INST) -#define SET_FT(INST, VAL) SET_RT(INST, VAL) - -#define FD(INST) SHAMT(INST) -#define SET_FD(INST, VAL) SET_SHAMT(INST, VAL) - - -#define SHAMT(INST) (INST)->r_t.r_i.r_i.r.shamt -#define SET_SHAMT(INST, VAL) (INST)->r_t.r_i.r_i.r.shamt = (unsigned char)(VAL) - -#define IMM(INST) (INST)->r_t.r_i.r_i.imm -#define SET_IMM(INST, VAL) (INST)->r_t.r_i.r_i.imm = (short)(VAL) - - -#define BASE(INST) RS(INST) -#define SET_BASE(INST, VAL) SET_RS(INST, VAL) - -#define IOFFSET(INST) IMM(INST) -#define SET_IOFFSET(INST, VAL) SET_IMM(INST, VAL) -#define IDISP(INST) (SIGN_EX (IOFFSET (INST) << 2)) - - -#define COND(INST) RS(INST) -#define SET_COND(INST, VAL) SET_RS(INST, VAL) - -#define CC(INST) (RT(INST) >> 2) -#define ND(INST) ((RT(INST) & 0x2) >> 1) -#define TF(INST) (RT(INST) & 0x1) - - -#define TARGET(INST) (INST)->r_t.target -#define SET_TARGET(INST, VAL) (INST)->r_t.target = (mem_addr)(VAL) - -#define ENCODING(INST) (INST)->encoding -#define SET_ENCODING(INST, VAL) (INST)->encoding = (int32)(VAL) - -#define EXPR(INST) (INST)->expr -#define SET_EXPR(INST, VAL) (INST)->expr = (imm_expr*)(VAL) - -#define SOURCE(INST) (INST)->source_line -#define SET_SOURCE(INST, VAL) (INST)->source_line = (char *)(VAL) - - -#define COND_UN 0x1 -#define COND_EQ 0x2 -#define COND_LT 0x4 -#define COND_IN 0x8 - -/* Minimum and maximum values that fit in instruction's imm field */ -#define IMM_MIN 0xffff8000 -#define IMM_MAX 0x00007fff - -#define UIMM_MIN (unsigned)0 -#define UIMM_MAX ((unsigned)((1<<16)-1)) - - - -/* Raise an exception! */ - -extern int exception_occurred; - -#define RAISE_EXCEPTION(EXCODE, MISC) \ - { \ - raise_exception(EXCODE); \ - MISC; \ - } \ - - -#define RAISE_INTERRUPT(LEVEL) \ - { \ - /* Set IP (pending) bit for interrupt level. */ \ - CP0_Cause |= (1 << ((LEVEL) + 8)); \ - } \ - -#define CLEAR_INTERRUPT(LEVEL) \ - { \ - /* Clear IP (pending) bit for interrupt level. */ \ - CP0_Cause &= ~(1 << ((LEVEL) + 8)); \ - } \ - -/* Recognized exceptions: */ - -#define ExcCode_Int 0 /* Interrupt */ -#define ExcCode_Mod 1 /* TLB modification (not implemented) */ -#define ExcCode_TLBL 2 /* TLB exception (not implemented) */ -#define ExcCode_TLBS 3 /* TLB exception (not implemented) */ -#define ExcCode_AdEL 4 /* Address error (load/fetch) */ -#define ExcCode_AdES 5 /* Address error (store) */ -#define ExcCode_IBE 6 /* Bus error, instruction fetch */ -#define ExcCode_DBE 7 /* Bus error, data reference */ -#define ExcCode_Sys 8 /* Syscall exception */ -#define ExcCode_Bp 9 /* Breakpoint exception */ -#define ExcCode_RI 10 /* Reserve instruction */ -#define ExcCode_CpU 11 /* Coprocessor unusable */ -#define ExcCode_Ov 12 /* Arithmetic overflow */ -#define ExcCode_Tr 13 /* Trap */ -#define ExcCode_FPE 15 /* Floating point */ -#define ExcCode_C2E 18 /* Coprocessor 2 (not impelemented) */ -#define ExcCode_MDMX 22 /* MDMX unusable (not implemented) */ -#define ExcCode_WATCH 23 /* Reference to Watch (not impelemented) */ -#define ExcCode_MCheck 24 /* Machine check (not implemented) */ -#define ExcCode_CacheErr 30 /* Cache error (not impelemented) */ - - - -/* Fields in binary representation of instructions: */ - -#define BIN_REG(V,O) (((V) >> O) & 0x1f) -#define BIN_RS(V) (BIN_REG(V, 21)) -#define BIN_RT(V) (BIN_REG(V, 16)) -#define BIN_RD(V) (BIN_REG(V, 11)) -#define BIN_SA(V) (BIN_REG(V, 6)) - -#define BIN_BASE(V) (BIN_REG(V, 21)) -#define BIN_FT(V) (BIN_REG(V, 16)) -#define BIN_FS(V) (BIN_REG(V, 11)) -#define BIN_FD(V) (BIN_REG(V, 6)) - - - -/* Exported functions: */ - -imm_expr *addr_expr_imm (addr_expr *expr); -int addr_expr_reg (addr_expr *expr); -imm_expr *const_imm_expr (int32 value); -imm_expr *copy_imm_expr (imm_expr *old_expr); -instruction *copy_inst (instruction *inst); -mem_addr current_text_pc (); -int32 eval_imm_expr (imm_expr *expr); -void format_an_inst (str_stream *ss, instruction *inst, mem_addr addr); -void free_inst (instruction *inst); -void i_type_inst (int opcode, int rt, int rs, imm_expr *expr); -void i_type_inst_free (int opcode, int rt, int rs, imm_expr *expr); -void increment_text_pc (int delta); -imm_expr *incr_expr_offset (imm_expr *expr, int32 value); -void initialize_inst_tables (); -instruction *inst_decode (int32 value); -int32 inst_encode (instruction *inst); -bool inst_is_breakpoint (mem_addr addr); -void j_type_inst (int opcode, imm_expr *target); -void k_text_begins_at_point (mem_addr addr); -imm_expr *lower_bits_of_expr (imm_expr *old_expr); -addr_expr *make_addr_expr (int offs, char *sym, int reg_no); -imm_expr *make_imm_expr (int offs, char *sym, bool is_pc_relative); -bool opcode_is_branch (int opcode); -bool opcode_is_nullified_branch (int opcode); -bool opcode_is_true_branch (int opcode); -bool opcode_is_jump (int opcode); -bool opcode_is_load_store (int opcode); -void print_inst (mem_addr addr); -char* inst_to_string (mem_addr addr); -void r_co_type_inst (int opcode, int fd, int fs, int ft); -void r_cond_type_inst (int opcode, int fs, int ft, int cc); -void r_sh_type_inst (int opcode, int rd, int rt, int shamt); -void r_type_inst (int opcode, int rd, int rs, int rt); -void raise_exception(int excode); -instruction *set_breakpoint (mem_addr addr); -void store_instruction (instruction *inst); -void text_begins_at_point (mem_addr addr); -imm_expr *upper_bits_of_expr (imm_expr *old_expr); -void user_kernel_text_segment (bool to_kernel); -bool is_zero_imm (imm_expr *expr); diff --git a/spim-jsspim/CPU/mem.cpp b/spim-jsspim/CPU/mem.cpp deleted file mode 100755 index 0d17111..0000000 --- a/spim-jsspim/CPU/mem.cpp +++ /dev/null @@ -1,778 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to create, maintain and access memory. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" - -/* Exported Variables: */ - -reg_word R[R_LENGTH]; -reg_word HI, LO; -int HI_present, LO_present; -mem_addr PC, nPC; -double *FPR; /* Dynamically allocate so overlay */ -float *FGR; /* is possible */ -int *FWR; /* is possible */ -reg_word CCR[4][32], CPR[4][32]; - -instruction **text_seg; -bool text_modified; /* => text segment was written */ -mem_addr text_top; -mem_word *data_seg; -bool data_modified; /* => a data segment was written */ -short *data_seg_h; /* Points to same vector as DATA_SEG */ -BYTE_TYPE *data_seg_b; /* Ditto */ -mem_addr data_top; -mem_addr gp_midpoint; /* Middle of $gp area */ -mem_word *stack_seg; -short *stack_seg_h; /* Points to same vector as STACK_SEG */ -BYTE_TYPE *stack_seg_b; /* Ditto */ -mem_addr stack_bot; -instruction **k_text_seg; -mem_addr k_text_top; -mem_word *k_data_seg; -short *k_data_seg_h; -BYTE_TYPE *k_data_seg_b; -mem_addr k_data_top; - - -/* Local functions: */ - -static mem_word bad_mem_read (mem_addr addr, int mask); -static void bad_mem_write (mem_addr addr, mem_word value, int mask); -static instruction *bad_text_read (mem_addr addr); -static void bad_text_write (mem_addr addr, instruction *inst); -static void free_instructions (instruction **inst, int n); -static mem_word read_memory_mapped_IO (mem_addr addr); -static void write_memory_mapped_IO (mem_addr addr, mem_word value); - - -/* Local variables: */ - -static int32 data_size_limit, stack_size_limit, k_data_size_limit; - - - -/* Memory is allocated in five chunks: - text, data, stack, kernel text, and kernel data. - - The arrays are independent and have different semantics. - - text is allocated from 0x400000 up and only contains INSTRUCTIONs. - It does not expand. - - data is allocated from 0x10000000 up. It can be extended by the - SBRK system call. Programs can only read and write this segment. - - stack grows from 0x7fffefff down. It is automatically extended. - Programs can only read and write this segment. - - k_text is like text, except its is allocated from 0x80000000 up. - - k_data is like data, but is allocated from 0x90000000 up. - - Both kernel text and kernel data can only be accessed in kernel mode. -*/ - -/* The text segments contain pointers to instructions, not actual - instructions, so they must be allocated large enough to hold as many - pointers as there would be instructions (the two differ on machines in - which pointers are not 32 bits long). The following calculations round - up in case size is not a multiple of BYTES_PER_WORD. */ - -#define BYTES_TO_INST(N) (((N) + BYTES_PER_WORD - 1) / BYTES_PER_WORD * sizeof(instruction*)) - - -void -make_memory (int text_size, int data_size, int data_limit, - int stack_size, int stack_limit, int k_text_size, - int k_data_size, int k_data_limit) -{ - if (data_size <= 65536) - data_size = 65536; - data_size = ROUND_UP(data_size, BYTES_PER_WORD); /* Keep word aligned */ - - if (text_seg == NULL) - text_seg = (instruction **) xmalloc (BYTES_TO_INST(text_size)); - else - { - free_instructions (text_seg, (text_top - TEXT_BOT) / BYTES_PER_WORD); - text_seg = (instruction **) realloc (text_seg, BYTES_TO_INST(text_size)); - } - memclr (text_seg, BYTES_TO_INST(text_size)); - text_top = TEXT_BOT + text_size; - - data_size = ROUND_UP(data_size, BYTES_PER_WORD); /* Keep word aligned */ - if (data_seg == NULL) - data_seg = (mem_word *) xmalloc (data_size); - else - data_seg = (mem_word *) realloc (data_seg, data_size); - memclr (data_seg, data_size); - data_seg_b = (BYTE_TYPE *) data_seg; - data_seg_h = (short *) data_seg; - data_top = DATA_BOT + data_size; - data_size_limit = data_limit; - - stack_size = ROUND_UP(stack_size, BYTES_PER_WORD); /* Keep word aligned */ - if (stack_seg == NULL) - stack_seg = (mem_word *) xmalloc (stack_size); - else - stack_seg = (mem_word *) realloc (stack_seg, stack_size); - memclr (stack_seg, stack_size); - stack_seg_b = (BYTE_TYPE *) stack_seg; - stack_seg_h = (short *) stack_seg; - stack_bot = STACK_TOP - stack_size; - stack_size_limit = stack_limit; - - if (k_text_seg == NULL) - k_text_seg = (instruction **) xmalloc (BYTES_TO_INST(k_text_size)); - else - { - free_instructions (k_text_seg, - (k_text_top - K_TEXT_BOT) / BYTES_PER_WORD); - k_text_seg = (instruction **) realloc(k_text_seg, - BYTES_TO_INST(k_text_size)); - } - memclr (k_text_seg, BYTES_TO_INST(k_text_size)); - k_text_top = K_TEXT_BOT + k_text_size; - - k_data_size = ROUND_UP(k_data_size, BYTES_PER_WORD); /* Keep word aligned */ - if (k_data_seg == NULL) - k_data_seg = (mem_word *) xmalloc (k_data_size); - else - k_data_seg = (mem_word *) realloc (k_data_seg, k_data_size); - memclr (k_data_seg, k_data_size); - k_data_seg_b = (BYTE_TYPE *) k_data_seg; - k_data_seg_h = (short *) k_data_seg; - k_data_top = K_DATA_BOT + k_data_size; - k_data_size_limit = k_data_limit; - - text_modified = true; - data_modified = true; -} - - -/* Free the storage used by the old instructions in memory. */ - -static void -free_instructions (instruction **inst, int n) -{ - for ( ; n > 0; n --, inst ++) - if (*inst) - free_inst (*inst); -} - - -/* Expand the data segment by adding N bytes. */ - -void -expand_data (int addl_bytes) -{ - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = data_top - DATA_BOT; - int new_size = old_size + delta; - BYTE_TYPE *p; - - if ((addl_bytes < 0) || (new_size > data_size_limit)) - { - error ("Can't expand data segment by %d bytes to %d bytes\n", - addl_bytes, new_size); - run_error ("Use -ldata # with # > %d\n", new_size); - } - data_seg = (mem_word *) realloc (data_seg, new_size); - if (data_seg == NULL) - fatal_error ("realloc failed in expand_data\n"); - - data_seg_b = (BYTE_TYPE *) data_seg; - data_seg_h = (short *) data_seg; - data_top += delta; - - /* Zero new memory */ - for (p = data_seg_b + old_size; p < data_seg_b + new_size; ) - *p ++ = 0; -} - - -/* Expand the stack segment by adding N bytes. Can't use REALLOC - since it copies from bottom of memory blocks and stack grows down from - top of its block. */ - -void -expand_stack (int addl_bytes) -{ - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = STACK_TOP - stack_bot; - int new_size = old_size + MAX (delta, old_size); - mem_word *new_seg; - mem_word *po, *pn; - - if ((addl_bytes < 0) || (new_size > stack_size_limit)) - { - run_error ("Can't expand stack segment by %d bytes to %d bytes.\nUse -lstack # with # > %d\n", - addl_bytes, new_size, new_size); - } - - new_seg = (mem_word *) xmalloc (new_size); - memset(new_seg, 0, new_size); - - po = stack_seg + (old_size / BYTES_PER_WORD - 1); - pn = new_seg + (new_size / BYTES_PER_WORD - 1); - for ( ; po >= stack_seg ; ) *pn -- = *po --; - - free (stack_seg); - stack_seg = new_seg; - stack_seg_b = (BYTE_TYPE *) stack_seg; - stack_seg_h = (short *) stack_seg; - stack_bot -= (new_size - old_size); -} - - -/* Expand the kernel data segment by adding N bytes. */ - -void -expand_k_data (int addl_bytes) -{ - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = k_data_top - K_DATA_BOT; - int new_size = old_size + delta; - BYTE_TYPE *p; - - if ((addl_bytes < 0) || (new_size > k_data_size_limit)) - { - run_error ("Can't expand kernel data segment by %d bytes to %d bytes.\nUse -lkdata # with # > %d\n", - addl_bytes, new_size, new_size); - } - k_data_seg = (mem_word *) realloc (k_data_seg, new_size); - if (k_data_seg == NULL) - fatal_error ("realloc failed in expand_k_data\n"); - - k_data_seg_b = (BYTE_TYPE *) k_data_seg; - k_data_seg_h = (short *) k_data_seg; - k_data_top += delta; - - /* Zero new memory */ - for (p = k_data_seg_b + old_size / BYTES_PER_WORD; - p < k_data_seg_b + new_size / BYTES_PER_WORD; ) - *p ++ = 0; -} - - - -/* Access memory */ - -void* -mem_reference(mem_addr addr) -{ - if ((addr >= TEXT_BOT) && (addr < text_top)) - return addr - TEXT_BOT + (char*) text_seg; - else if ((addr >= DATA_BOT) && (addr < data_top)) - return addr - DATA_BOT + (char*) data_seg; - else if ((addr >= stack_bot) && (addr < STACK_TOP)) - return addr - stack_bot + (char*) stack_seg; - else if ((addr >= K_TEXT_BOT) && (addr < k_text_top)) - return addr - K_TEXT_BOT + (char*) k_text_seg; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top)) - return addr - K_DATA_BOT + (char*) k_data_seg; - else - { - run_error ("Memory address out of bounds\n"); - return NULL; - } -} - - -instruction* -read_mem_inst(mem_addr addr) -{ - if ((addr >= TEXT_BOT) && (addr < text_top) && !(addr & 0x3)) - return text_seg [(addr - TEXT_BOT) >> 2]; - else if ((addr >= K_TEXT_BOT) && (addr < k_text_top) && !(addr & 0x3)) - return k_text_seg [(addr - K_TEXT_BOT) >> 2]; - else - return bad_text_read (addr); -} - - -reg_word -read_mem_byte(mem_addr addr) -{ - if ((addr >= DATA_BOT) && (addr < data_top)) - return data_seg_b [addr - DATA_BOT]; - else if ((addr >= stack_bot) && (addr < STACK_TOP)) - return stack_seg_b [addr - stack_bot]; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top)) - return k_data_seg_b [addr - K_DATA_BOT]; - else - return bad_mem_read (addr, 0); -} - - -reg_word -read_mem_half(mem_addr addr) -{ - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x1)) - return data_seg_h [(addr - DATA_BOT) >> 1]; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x1)) - return stack_seg_h [(addr - stack_bot) >> 1]; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x1)) - return k_data_seg_h [(addr - K_DATA_BOT) >> 1]; - else - return bad_mem_read (addr, 0x1); -} - - -reg_word -read_mem_word(mem_addr addr) -{ - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x3)) - return data_seg [(addr - DATA_BOT) >> 2]; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x3)) - return stack_seg [(addr - stack_bot) >> 2]; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x3)) - return k_data_seg [(addr - K_DATA_BOT) >> 2]; - else - return bad_mem_read (addr, 0x3); -} - - -void -set_mem_inst(mem_addr addr, instruction* inst) -{ - text_modified = true; - if ((addr >= TEXT_BOT) && (addr < text_top) && !(addr & 0x3)) - text_seg [(addr - TEXT_BOT) >> 2] = inst; - else if ((addr >= K_TEXT_BOT) && (addr < k_text_top) && !(addr & 0x3)) - k_text_seg [(addr - K_TEXT_BOT) >> 2] = inst; - else - bad_text_write (addr, inst); -} - - -void -set_mem_byte(mem_addr addr, reg_word value) -{ - data_modified = true; - if ((addr >= DATA_BOT) && (addr < data_top)) - data_seg_b [addr - DATA_BOT] = (BYTE_TYPE) value; - else if ((addr >= stack_bot) && (addr < STACK_TOP)) - stack_seg_b [addr - stack_bot] = (BYTE_TYPE) value; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top)) - k_data_seg_b [addr - K_DATA_BOT] = (BYTE_TYPE) value; - else - bad_mem_write (addr, value, 0); -} - - -void -set_mem_half(mem_addr addr, reg_word value) -{ - data_modified = true; - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x1)) - data_seg_h [(addr - DATA_BOT) >> 1] = (short) value; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x1)) - stack_seg_h [(addr - stack_bot) >> 1] = (short) value; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x1)) - k_data_seg_h [(addr - K_DATA_BOT) >> 1] = (short) value; - else - bad_mem_write (addr, value, 0x1); -} - - -void -set_mem_word(mem_addr addr, reg_word value) -{ - data_modified = true; - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x3)) - data_seg [(addr - DATA_BOT) >> 2] = (mem_word) value; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x3)) - stack_seg [(addr - stack_bot) >> 2] = (mem_word) value; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x3)) - k_data_seg [(addr - K_DATA_BOT) >> 2] = (mem_word) value; - else - bad_mem_write (addr, value, 0x3); -} - - -/* Handle the infrequent and erroneous cases in memory accesses. */ - -static instruction * -bad_text_read (mem_addr addr) -{ - RAISE_EXCEPTION (ExcCode_IBE, CP0_BadVAddr = addr); - return (inst_decode (0)); -} - - -static void -bad_text_write (mem_addr addr, instruction *inst) -{ - RAISE_EXCEPTION (ExcCode_IBE, CP0_BadVAddr = addr); - set_mem_word (addr, ENCODING (inst)); -} - - -static mem_word -bad_mem_read (mem_addr addr, int mask) -{ - mem_word tmp; - - if ((addr & mask) != 0) - RAISE_EXCEPTION (ExcCode_AdEL, CP0_BadVAddr = addr) - else if (addr >= TEXT_BOT && addr < text_top) - switch (mask) - { - case 0x0: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = (unsigned)tmp >> (8 * (3 - (addr & 0x3))); -#else - tmp = (unsigned)tmp >> (8 * (addr & 0x3)); -#endif - return (0xff & tmp); - - case 0x1: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = (unsigned)tmp >> (8 * (2 - (addr & 0x2))); -#else - tmp = (unsigned)tmp >> (8 * (addr & 0x2)); -#endif - return (0xffff & tmp); - - case 0x3: - { - instruction *inst = text_seg [(addr - TEXT_BOT) >> 2]; - if (inst == NULL) - return 0; - else - return (ENCODING (inst)); - } - - default: - run_error ("Bad mask (0x%x) in bad_mem_read\n", mask); - } - else if (addr > data_top - && addr < stack_bot - /* If more than 16 MB below stack, probably is bad data ref */ - && addr > stack_bot - 16*K*K) - { - /* Grow stack segment */ - expand_stack (stack_bot - addr + 4); - return (0); - } - else if (MM_IO_BOT <= addr && addr <= MM_IO_TOP) - return (read_memory_mapped_IO (addr)); - else - /* Address out of range */ - RAISE_EXCEPTION (ExcCode_DBE, CP0_BadVAddr = addr) - return (0); -} - - -static void -bad_mem_write (mem_addr addr, mem_word value, int mask) -{ - mem_word tmp; - - if ((addr & mask) != 0) - /* Unaligned address fault */ - RAISE_EXCEPTION (ExcCode_AdES, CP0_BadVAddr = addr) - else if (addr >= TEXT_BOT && addr < text_top) - { - switch (mask) - { - case 0x0: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = ((tmp & ~(0xff << (8 * (3 - (addr & 0x3))))) - | (value & 0xff) << (8 * (3 - (addr & 0x3)))); -#else - tmp = ((tmp & ~(0xff << (8 * (addr & 0x3)))) - | (value & 0xff) << (8 * (addr & 0x3))); -#endif - break; - - case 0x1: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = ((tmp & ~(0xffff << (8 * (2 - (addr & 0x2))))) - | (value & 0xffff) << (8 * (2 - (addr & 0x2)))); -#else - tmp = ((tmp & ~(0xffff << (8 * (addr & 0x2)))) - | (value & 0xffff) << (8 * (addr & 0x2))); -#endif - break; - - case 0x3: - tmp = value; - break; - - default: - tmp = 0; - run_error ("Bad mask (0x%x) in bad_mem_read\n", mask); - } - - if (text_seg [(addr - TEXT_BOT) >> 2] != NULL) - { - free_inst (text_seg[(addr - TEXT_BOT) >> 2]); - } - text_seg [(addr - TEXT_BOT) >> 2] = inst_decode (tmp); - - text_modified = true; - } - else if (addr > data_top - && addr < stack_bot - /* If more than 16 MB below stack, probably is bad data ref */ - && addr > stack_bot - 16*K*K) - { - /* Grow stack segment */ - expand_stack (stack_bot - addr + 4); - if (addr >= stack_bot) - { - if (mask == 0) - stack_seg_b [addr - stack_bot] = (char)value; - else if (mask == 1) - stack_seg_h [(addr - stack_bot) >> 1] = (short)value; - else - stack_seg [(addr - stack_bot) >> 2] = value; - } - else - RAISE_EXCEPTION (ExcCode_DBE, CP0_BadVAddr = addr) - - data_modified = true; - } - else if (MM_IO_BOT <= addr && addr <= MM_IO_TOP) - write_memory_mapped_IO (addr, value); - else - /* Address out of range */ - RAISE_EXCEPTION (ExcCode_DBE, CP0_BadVAddr = addr) -} - - - -/* Memory-mapped IO routines. */ - -static int recv_control = 0; /* No input */ -static int recv_buffer; -static int recv_buffer_full_timer = 0; - -static int trans_control = TRANS_READY; /* Ready to write */ -static int trans_buffer; -static int trans_buffer_full_timer = 0; - - -/* Check if input is available and output is possible. If so, update the - memory-mapped control registers and buffers. */ - -void -check_memory_mapped_IO () -{ - if (recv_buffer_full_timer > 0) - { - /* Do not check for more input until this interval expires. */ - recv_buffer_full_timer -= 1; - } - else if (console_input_available ()) - { - /* Read new char into the buffer and raise an interrupt, if interrupts - are enabled for device. */ - /* assert(recv_buffer_full_timer == 0); */ - recv_buffer = get_console_char (); - recv_control |= RECV_READY; - recv_buffer_full_timer = RECV_INTERVAL; - if (recv_control & RECV_INT_ENABLE) - { - RAISE_INTERRUPT (RECV_INT_LEVEL); - } - } - - if (trans_buffer_full_timer > 0) - { - /* Do not allow output until this interval expires. */ - trans_buffer_full_timer -= 1; - } - else if (!(trans_control & TRANS_READY)) - { - /* Done writing: empty the buffer and raise an interrupt, if interrupts - are enabled for device. */ - /* assert(trans_buffer_full_timer == 0); */ - trans_control |= TRANS_READY; - if (trans_control & TRANS_INT_ENABLE) - { - RAISE_INTERRUPT (TRANS_INT_LEVEL); - } - } -} - - -/* Invoked on a write to the memory-mapped IO area. */ - -static void -write_memory_mapped_IO (mem_addr addr, mem_word value) -{ - switch (addr) - { - case TRANS_CTRL_ADDR: - /* Program can only set the interrupt enable, not ready, bit. */ - if ((value & TRANS_INT_ENABLE) != 0) - { - /* Enable interrupts: */ - trans_control |= TRANS_INT_ENABLE; - if (trans_control & TRANS_READY) - { - /* Raise interrupt on enabling a ready transmitter */ - RAISE_INTERRUPT (TRANS_INT_LEVEL); - } - } - else - { - /* Disable interrupts: */ - trans_control &= ~TRANS_INT_ENABLE; - CLEAR_INTERRUPT (TRANS_INT_LEVEL); /* Clear IP bit in Cause */ - } - break; - - case TRANS_BUFFER_ADDR: - /* Ignore write if device is not ready. */ - if ((trans_control & TRANS_READY) != 0) - { - /* Write char: */ - trans_buffer = value & 0xff; - put_console_char ((char)trans_buffer); - /* Device is busy for a while: */ - trans_control &= ~TRANS_READY; - trans_buffer_full_timer = TRANS_LATENCY; - CLEAR_INTERRUPT (TRANS_INT_LEVEL); /* Clear IP bit in Cause */ - } - break; - - case RECV_CTRL_ADDR: - /* Program can only set the interrupt enable, not ready, bit. */ - if ((value & RECV_INT_ENABLE) != 0) - { - /* Enable interrupts: */ - recv_control |= RECV_INT_ENABLE; - if (recv_control & RECV_READY) - { - /* Raise interrupt on enabling a ready receiver */ - RAISE_INTERRUPT (RECV_INT_LEVEL); - } - } - else - { - /* Disable interrupts: */ - recv_control &= ~RECV_INT_ENABLE; - CLEAR_INTERRUPT (RECV_INT_LEVEL); /* Clear IP bit in Cause */ - } - break; - - case RECV_BUFFER_ADDR: - /* Nop: program can't change buffer. */ - break; - - default: - run_error ("Write to unused memory-mapped IO address (0x%x)\n", addr); - } -} - - -/* Invoked on a read in the memory-mapped IO area. */ - -static mem_word -read_memory_mapped_IO (mem_addr addr) -{ - switch (addr) - { - case TRANS_CTRL_ADDR: - return (trans_control); - - case TRANS_BUFFER_ADDR: - return (trans_buffer & 0xff); - - case RECV_CTRL_ADDR: - return (recv_control); - - case RECV_BUFFER_ADDR: - recv_control &= ~RECV_READY; /* Buffer now empty */ - recv_buffer_full_timer = 0; - CLEAR_INTERRUPT (RECV_INT_LEVEL); /* Clear IP bit in Cause */ - return (recv_buffer & 0xff); - - default: - run_error ("Read from unused memory-mapped IO address (0x%x)\n", addr); - return (0); - } -} - - - -/* Misc. routines */ - -void -print_mem (mem_addr addr) -{ - mem_word value; - - if ((addr & 0x3) != 0) - addr &= ~0x3; /* Address must be word-aligned */ - - if (TEXT_BOT <= addr && addr < text_top) - print_inst (addr); - else if (DATA_BOT <= addr && addr < data_top) - { - value = read_mem_word (addr); - write_output (message_out, "Data seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else if (stack_bot <= addr && addr < STACK_TOP) - { - value = read_mem_word (addr); - write_output (message_out, "Stack seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else if (K_TEXT_BOT <= addr && addr < k_text_top) - print_inst (addr); - else if (K_DATA_BOT <= addr && addr < k_data_top) - { - value = read_mem_word (addr); - write_output (message_out, - "Kernel Data seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else - error ("Address 0x%08x (%d) to print_mem is out of bounds\n", addr, addr); -} diff --git a/spim-jsspim/CPU/mem.h b/spim-jsspim/CPU/mem.h deleted file mode 100755 index 018cbd6..0000000 --- a/spim-jsspim/CPU/mem.h +++ /dev/null @@ -1,161 +0,0 @@ -/* SPIM S20 MIPS simulator. - Macros for accessing memory. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* A note on directions: "Bottom" of memory is the direction of - decreasing addresses. "Top" is the direction of increasing addresses.*/ - - -/* Type of contents of a memory word. */ - -typedef int32 /*@alt unsigned int @*/ mem_word; - - -/* The text segment and boundaries. */ - -extern instruction **text_seg; - -extern bool text_modified; /* => text segment was written */ - -#define TEXT_BOT ((mem_addr) 0x400000) - -extern mem_addr text_top; - - -/* Amount to grow text segment when we run out of space for instructions. */ - -#define TEXT_CHUNK_SIZE 4096 - - -/* The data segment and boundaries. */ - -extern mem_word *data_seg; - -extern bool data_modified; /* => a data segment was written */ - -extern short *data_seg_h; /* Points to same vector as DATA_SEG */ - -#define BYTE_TYPE signed char - - -extern BYTE_TYPE *data_seg_b; /* Ditto */ - -#define DATA_BOT ((mem_addr) 0x10000000) - -extern mem_addr data_top; - -extern mem_addr gp_midpoint; /* Middle of $gp area */ - - -/* The stack segment and boundaries. */ - -extern mem_word *stack_seg; - -extern short *stack_seg_h; /* Points to same vector as STACK_SEG */ - -extern BYTE_TYPE *stack_seg_b; /* Ditto */ - -extern mem_addr stack_bot; - -/* Exclusive, but include 4K at top of stack. */ - -#define STACK_TOP ((mem_addr) 0x80000000) - - -/* The kernel text segment and boundaries. */ - -extern instruction **k_text_seg; - -#define K_TEXT_BOT ((mem_addr) 0x80000000) - -extern mem_addr k_text_top; - - -/* Kernel data segment and boundaries. */ - -extern mem_word *k_data_seg; - -extern short *k_data_seg_h; - -extern BYTE_TYPE *k_data_seg_b; - -#define K_DATA_BOT ((mem_addr) 0x90000000) - -extern mem_addr k_data_top; - - -/* Memory-mapped IO area: */ -#define MM_IO_BOT ((mem_addr) 0xffff0000) -#define MM_IO_TOP ((mem_addr) 0xffffffff) - - -/* Read from console: */ -#define RECV_CTRL_ADDR ((mem_addr) 0xffff0000) -#define RECV_BUFFER_ADDR ((mem_addr) 0xffff0004) - -#define RECV_READY 0x1 -#define RECV_INT_ENABLE 0x2 - -#define RECV_INT_LEVEL 3 /* HW Interrupt 1 */ - - -/* Write to console: */ -#define TRANS_CTRL_ADDR ((mem_addr) 0xffff0008) -#define TRANS_BUFFER_ADDR ((mem_addr) 0xffff000c) - -#define TRANS_READY 0x1 -#define TRANS_INT_ENABLE 0x2 - -#define TRANS_INT_LEVEL 2 /* HW Interrupt 0 */ - - - - -/* Exported functions: */ - -void check_memory_mapped_IO (); -void expand_data (int addl_bytes); -void expand_k_data (int addl_bytes); -void expand_stack (int addl_bytes); -void make_memory (int text_size, int data_size, int data_limit, - int stack_size, int stack_limit, int k_text_size, - int k_data_size, int k_data_limit); -void* mem_reference(mem_addr addr); -void print_mem (mem_addr addr); -instruction* read_mem_inst(mem_addr addr); -reg_word read_mem_byte(mem_addr addr); -reg_word read_mem_half(mem_addr addr); -reg_word read_mem_word(mem_addr addr); -void set_mem_inst(mem_addr addr, instruction* inst); -void set_mem_byte(mem_addr addr, reg_word value); -void set_mem_half(mem_addr addr, reg_word value); -void set_mem_word(mem_addr addr, reg_word value); diff --git a/spim-jsspim/CPU/op.h b/spim-jsspim/CPU/op.h deleted file mode 100755 index 4b46df5..0000000 --- a/spim-jsspim/CPU/op.h +++ /dev/null @@ -1,525 +0,0 @@ -/* SPIM S20 MIPS simulator. - This file describes the MIPS instructions, the assembler pseudo - instructions, the assembler pseudo-ops, and the spim commands. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Type of each entry: */ - -#define ASM_DIR 0 -#define PSEUDO_OP 1 - -#define BC_TYPE_INST 10 -#define B1_TYPE_INST 11 -#define I1s_TYPE_INST 12 -#define I1t_TYPE_INST 13 -#define I2_TYPE_INST 14 -#define B2_TYPE_INST 15 -#define I2a_TYPE_INST 16 - -#define R1s_TYPE_INST 20 -#define R1d_TYPE_INST 21 -#define R2st_TYPE_INST 22 -#define R2ds_TYPE_INST 23 -#define R2td_TYPE_INST 24 -#define R2sh_TYPE_INST 25 -#define R3_TYPE_INST 26 -#define R3sh_TYPE_INST 27 - -#define FP_I2a_TYPE_INST 30 -#define FP_R2ds_TYPE_INST 31 -#define FP_R2ts_TYPE_INST 32 -#define FP_CMP_TYPE_INST 33 -#define FP_R3_TYPE_INST 34 -#define FP_R4_TYPE_INST 35 -#define FP_MOVC_TYPE_INST 36 -#define MOVC_TYPE_INST 37 - -#define J_TYPE_INST 40 -#define NOARG_TYPE_INST 42 - - -/* Information on each keyword token that can be read by spim. Must be - sorted in alphabetical order. */ - -OP(".alias", Y_ALIAS_DIR, ASM_DIR, -1) -OP(".align", Y_ALIGN_DIR, ASM_DIR, -1) -OP(".ascii", Y_ASCII_DIR, ASM_DIR, -1) -OP(".asciiz", Y_ASCIIZ_DIR, ASM_DIR, -1) -OP(".asm0", Y_ASM0_DIR, ASM_DIR, -1) -OP(".bgnb", Y_BGNB_DIR, ASM_DIR, -1) -OP(".byte", Y_BYTE_DIR, ASM_DIR, -1) -OP(".comm", Y_COMM_DIR, ASM_DIR, -1) -OP(".data", Y_DATA_DIR, ASM_DIR, -1) -OP(".double", Y_DOUBLE_DIR, ASM_DIR, -1) -OP(".end", Y_END_DIR, ASM_DIR, -1) -OP(".endb", Y_ENDB_DIR, ASM_DIR, -1) -OP(".endr", Y_ENDR_DIR, ASM_DIR, -1) -OP(".ent", Y_ENT_DIR, ASM_DIR, -1) -OP(".err", Y_ERR_DIR, ASM_DIR, -1) -OP(".extern", Y_EXTERN_DIR, ASM_DIR, -1) -OP(".file", Y_FILE_DIR, ASM_DIR, -1) -OP(".float", Y_FLOAT_DIR, ASM_DIR, -1) -OP(".fmask", Y_FMASK_DIR, ASM_DIR, -1) -OP(".frame", Y_FRAME_DIR, ASM_DIR, -1) -OP(".globl", Y_GLOBAL_DIR, ASM_DIR, -1) -OP(".half", Y_HALF_DIR, ASM_DIR, -1) -OP(".kdata", Y_K_DATA_DIR, ASM_DIR, -1) -OP(".ktext", Y_K_TEXT_DIR, ASM_DIR, -1) -OP(".lab", Y_LABEL_DIR, ASM_DIR, -1) -OP(".lcomm", Y_LCOMM_DIR, ASM_DIR, -1) -OP(".livereg", Y_LIVEREG_DIR, ASM_DIR, -1) -OP(".loc", Y_LOC_DIR, ASM_DIR, -1) -OP(".mask", Y_MASK_DIR, ASM_DIR, -1) -OP(".noalias", Y_NOALIAS_DIR, ASM_DIR, -1) -OP(".option", Y_OPTIONS_DIR, ASM_DIR, -1) -OP(".rdata", Y_RDATA_DIR, ASM_DIR, -1) -OP(".repeat", Y_REPEAT_DIR, ASM_DIR, -1) -OP(".sdata", Y_SDATA_DIR, ASM_DIR, -1) -OP(".set", Y_SET_DIR, ASM_DIR, -1) -OP(".space", Y_SPACE_DIR, ASM_DIR, -1) -OP(".struct", Y_STRUCT_DIR, ASM_DIR, -1) -OP(".text", Y_TEXT_DIR, ASM_DIR, -1) -OP(".verstamp",Y_VERSTAMP_DIR, ASM_DIR, -1) -OP(".vreg", Y_VREG_DIR, ASM_DIR, -1) -OP(".word", Y_WORD_DIR, ASM_DIR, -1) - -OP("abs", Y_ABS_POP, PSEUDO_OP, -1) -OP("abs.d", Y_ABS_D_OP, FP_R2ds_TYPE_INST, 0x46200005) -OP("abs.ps", Y_ABS_PS_OP, FP_R2ds_TYPE_INST, 0x46600005) /* MIPS32 Rev 2 */ -OP("abs.s", Y_ABS_S_OP, FP_R2ds_TYPE_INST, 0x46000005) - -OP("add", Y_ADD_OP, R3_TYPE_INST, 0x00000020) -OP("add.d", Y_ADD_D_OP, FP_R3_TYPE_INST, 0x46200000) -OP("add.ps", Y_ADD_PS_OP, FP_R3_TYPE_INST, 0x46600000) /* MIPS32 Rev 2 */ -OP("add.s", Y_ADD_S_OP, FP_R3_TYPE_INST, 0x46000000) -OP("addi", Y_ADDI_OP, I2_TYPE_INST, 0x20000000) -OP("addiu", Y_ADDIU_OP, I2_TYPE_INST, 0x24000000) -OP("addu", Y_ADDU_OP, R3_TYPE_INST, 0x00000021) - -OP("alnv.ps", Y_ALNV_PS_OP, FP_R4_TYPE_INST, 0x4c00001e) /* MIPS32 Rev 2 */ - -OP("and", Y_AND_OP, R3_TYPE_INST, 0x00000024) -OP("andi", Y_ANDI_OP, I2_TYPE_INST, 0x30000000) - -OP("b", Y_B_POP, PSEUDO_OP, -1) -OP("bal", Y_BAL_POP, PSEUDO_OP, -1) - -OP("bc1f", Y_BC1F_OP, BC_TYPE_INST, 0x45000000) -OP("bc1fl", Y_BC1FL_OP, BC_TYPE_INST, 0x45020000) /* MIPS32 */ -OP("bc1t", Y_BC1T_OP, BC_TYPE_INST, 0x45010000) -OP("bc1tl", Y_BC1TL_OP, BC_TYPE_INST, 0x45030000) /* MIPS32 */ - -OP("bc2f", Y_BC2F_OP, BC_TYPE_INST, 0x49000000) -OP("bc2fl", Y_BC2FL_OP, BC_TYPE_INST, 0x49020000) /* MIPS32 */ -OP("bc2t", Y_BC2T_OP, BC_TYPE_INST, 0x49010000) -OP("bc2tl", Y_BC2TL_OP, BC_TYPE_INST, 0x49030000) /* MIPS32 */ - -OP("beq", Y_BEQ_OP, B2_TYPE_INST, 0x10000000) -OP("beql", Y_BEQL_OP, B2_TYPE_INST, 0x50000000) /* MIPS32 */ -OP("beqz", Y_BEQZ_POP, PSEUDO_OP, -1) -OP("bge", Y_BGE_POP, PSEUDO_OP, -1) -OP("bgeu", Y_BGEU_POP, PSEUDO_OP, -1) -OP("bgez", Y_BGEZ_OP, B1_TYPE_INST, 0x04010000) -OP("bgezal", Y_BGEZAL_OP, B1_TYPE_INST, 0x04110000) -OP("bgezall", Y_BGEZALL_OP, B1_TYPE_INST, 0x04130000) /* MIPS32 */ -OP("bgezl", Y_BGEZL_OP, B1_TYPE_INST, 0x04030000) /* MIPS32 */ -OP("bgt", Y_BGT_POP, PSEUDO_OP, -1) -OP("bgtu", Y_BGTU_POP, PSEUDO_OP, -1) -OP("bgtz", Y_BGTZ_OP, B1_TYPE_INST, 0x1c000000) -OP("bgtzl", Y_BGTZL_OP, B1_TYPE_INST, 0x5c000000) /* MIPS32 */ -OP("ble", Y_BLE_POP, PSEUDO_OP, -1) -OP("bleu", Y_BLEU_POP, PSEUDO_OP, -1) -OP("blez", Y_BLEZ_OP, B1_TYPE_INST, 0x18000000) -OP("blezl", Y_BLEZL_OP, B1_TYPE_INST, 0x58000000) /* MIPS32 */ -OP("blt", Y_BLT_POP, PSEUDO_OP, -1) -OP("bltu", Y_BLTU_POP, PSEUDO_OP, -1) -OP("bltz", Y_BLTZ_OP, B1_TYPE_INST, 0x04000000) -OP("bltzal", Y_BLTZAL_OP, B1_TYPE_INST, 0x04100000) -OP("bltzall", Y_BLTZALL_OP, B1_TYPE_INST, 0x04120000) /* MIPS32 */ -OP("bltzl", Y_BLTZL_OP, B1_TYPE_INST, 0x04020000) /* MIPS32 */ -OP("bne", Y_BNE_OP, B2_TYPE_INST, 0x14000000) -OP("bnel", Y_BNEL_OP, B2_TYPE_INST, 0x54000000) /* MIPS32 */ -OP("bnez", Y_BNEZ_POP, PSEUDO_OP, -1) - -OP("break", Y_BREAK_OP, NOARG_TYPE_INST, 0x0000000d) - -OP("c.eq.d", Y_C_EQ_D_OP, FP_CMP_TYPE_INST, 0x46200032) -OP("c.eq.ps", Y_C_EQ_PS_OP, FP_CMP_TYPE_INST, 0x46600032) /* MIPS32 Rev 2 */ -OP("c.eq.s", Y_C_EQ_S_OP, FP_CMP_TYPE_INST, 0x46000032) -OP("c.f.d", Y_C_F_D_OP, FP_CMP_TYPE_INST, 0x46200030) -OP("c.f.ps", Y_C_F_PS_OP, FP_CMP_TYPE_INST, 0x46600030) /* MIPS32 Rev 2 */ -OP("c.f.s", Y_C_F_S_OP, FP_CMP_TYPE_INST, 0x46000030) -OP("c.le.d", Y_C_LE_D_OP, FP_CMP_TYPE_INST, 0x4620003e) -OP("c.le.ps", Y_C_LE_PS_OP, FP_CMP_TYPE_INST, 0x4660003e) /* MIPS32 Rev 2 */ -OP("c.le.s", Y_C_LE_S_OP, FP_CMP_TYPE_INST, 0x4600003e) -OP("c.lt.d", Y_C_LT_D_OP, FP_CMP_TYPE_INST, 0x4620003c) -OP("c.lt.ps", Y_C_LT_PS_OP, FP_CMP_TYPE_INST, 0x4660003c) /* MIPS32 Rev 2 */ -OP("c.lt.s", Y_C_LT_S_OP, FP_CMP_TYPE_INST, 0x4600003c) -OP("c.nge.d", Y_C_NGE_D_OP, FP_CMP_TYPE_INST, 0x4620003d) -OP("c.nge.ps", Y_C_NGE_PS_OP, FP_CMP_TYPE_INST, 0x4660003d) /* MIPS32 Rev 2 */ -OP("c.nge.s", Y_C_NGE_S_OP, FP_CMP_TYPE_INST, 0x4600003d) -OP("c.ngl.d", Y_C_NGL_D_OP, FP_CMP_TYPE_INST, 0x4620003b) -OP("c.ngl.ps", Y_C_NGL_PS_OP, FP_CMP_TYPE_INST, 0x4660003b) /* MIPS32 Rev 2 */ -OP("c.ngl.s", Y_C_NGL_S_OP, FP_CMP_TYPE_INST, 0x4600003b) -OP("c.ngle.d", Y_C_NGLE_D_OP, FP_CMP_TYPE_INST, 0x46200039) -OP("c.ngle.ps", Y_C_NGLE_PS_OP, FP_CMP_TYPE_INST, 0x46600039) /* MIPS32 Rev 2 */ -OP("c.ngle.s", Y_C_NGLE_S_OP, FP_CMP_TYPE_INST, 0x46000039) -OP("c.ngt.d", Y_C_NGT_D_OP, FP_CMP_TYPE_INST, 0x4620003f) -OP("c.ngt.ps", Y_C_NGT_PS_OP, FP_CMP_TYPE_INST, 0x4660003f) /* MIPS32 Rev 2 */ -OP("c.ngt.s", Y_C_NGT_S_OP, FP_CMP_TYPE_INST, 0x4600003f) -OP("c.ole.d", Y_C_OLE_D_OP, FP_CMP_TYPE_INST, 0x46200036) -OP("c.ole.ps", Y_C_OLE_PS_OP, FP_CMP_TYPE_INST, 0x46600036) /* MIPS32 Rev 2 */ -OP("c.ole.s", Y_C_OLE_S_OP, FP_CMP_TYPE_INST, 0x46000036) -OP("c.olt.d", Y_C_OLT_D_OP, FP_CMP_TYPE_INST, 0x46200034) -OP("c.olt.ps", Y_C_OLT_PS_OP, FP_CMP_TYPE_INST, 0x46600034) /* MIPS32 Rev 2 */ -OP("c.olt.s", Y_C_OLT_S_OP, FP_CMP_TYPE_INST, 0x46000034) -OP("c.seq.d", Y_C_SEQ_D_OP, FP_CMP_TYPE_INST, 0x4620003a) -OP("c.seq.ps", Y_C_SEQ_PS_OP, FP_CMP_TYPE_INST, 0x4660003a) /* MIPS32 Rev 2 */ -OP("c.seq.s", Y_C_SEQ_S_OP, FP_CMP_TYPE_INST, 0x4600003a) -OP("c.sf.d", Y_C_SF_D_OP, FP_CMP_TYPE_INST, 0x46200038) -OP("c.sf.ps", Y_C_SF_PS_OP, FP_CMP_TYPE_INST, 0x46600038) /* MIPS32 Rev 2 */ -OP("c.sf.s", Y_C_SF_S_OP, FP_CMP_TYPE_INST, 0x46000038) -OP("c.ueq.d", Y_C_UEQ_D_OP, FP_CMP_TYPE_INST, 0x46200033) -OP("c.ueq.ps", Y_C_UEQ_PS_OP, FP_CMP_TYPE_INST, 0x46600033) /* MIPS32 Rev 2 */ -OP("c.ueq.s", Y_C_UEQ_S_OP, FP_CMP_TYPE_INST, 0x46000033) -OP("c.ule.d", Y_C_ULE_D_OP, FP_CMP_TYPE_INST, 0x46200037) -OP("c.ule.ps", Y_C_ULE_PS_OP, FP_CMP_TYPE_INST, 0x46600037) /* MIPS32 Rev 2 */ -OP("c.ule.s", Y_C_ULE_S_OP, FP_CMP_TYPE_INST, 0x46000037) -OP("c.ult.d", Y_C_ULT_D_OP, FP_CMP_TYPE_INST, 0x46200035) -OP("c.ult.ps", Y_C_ULT_PS_OP, FP_CMP_TYPE_INST, 0x46600035) /* MIPS32 Rev 2 */ -OP("c.ult.s", Y_C_ULT_S_OP, FP_CMP_TYPE_INST, 0x46000035) -OP("c.un.d", Y_C_UN_D_OP, FP_CMP_TYPE_INST, 0x46200031) -OP("c.un.ps", Y_C_UN_PS_OP, FP_CMP_TYPE_INST, 0x46600031) /* MIPS32 Rev 2 */ -OP("c.un.s", Y_C_UN_S_OP, FP_CMP_TYPE_INST, 0x46000031) - -OP("cache", Y_CACHE_OP, I2_TYPE_INST, 0xbc000000) /* MIPS32 */ - -OP("ceil.l.d", Y_CEIL_L_D_OP, FP_R2ds_TYPE_INST, 0x4620000a) /* MIPS32 Rev 2 */ -OP("ceil.l.s", Y_CEIL_L_S_OP, FP_R2ds_TYPE_INST, 0x4600000a) /* MIPS32 Rev 2 */ -OP("ceil.w.d", Y_CEIL_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000e) /* MIPS32 */ -OP("ceil.w.s", Y_CEIL_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000e) /* MIPS32 */ - -OP("cfc0", Y_CFC0_OP, FP_R2ts_TYPE_INST, 0x40400000) -OP("cfc1", Y_CFC1_OP, FP_R2ts_TYPE_INST, 0x44400000) -OP("cfc2", Y_CFC2_OP, FP_R2ts_TYPE_INST, 0x48400000) - -OP("clo", Y_CLO_OP, R3_TYPE_INST, 0x70000021) -OP("clz", Y_CLZ_OP, R3_TYPE_INST, 0x70000020) - -OP("cop2", Y_COP2_OP, J_TYPE_INST, 0x4a000000) - -OP("ctc0", Y_CTC0_OP, FP_R2ts_TYPE_INST, 0x40c00000) -OP("ctc1", Y_CTC1_OP, FP_R2ts_TYPE_INST, 0x44c00000) -OP("ctc2", Y_CTC2_OP, FP_R2ts_TYPE_INST, 0x48c00000) - -OP("cvt.d.l", Y_CVT_D_L_OP, FP_R2ds_TYPE_INST, 0x46b00021) /* MIPS32 Rev 2 */ -OP("cvt.d.s", Y_CVT_D_S_OP, FP_R2ds_TYPE_INST, 0x46000021) -OP("cvt.d.w", Y_CVT_D_W_OP, FP_R2ds_TYPE_INST, 0x46200021) -OP("cvt.l.d", Y_CVT_L_D_OP, FP_R2ds_TYPE_INST, 0x46200025) /* MIPS32 Rev 2 */ -OP("cvt.l.s", Y_CVT_L_S_OP, FP_R2ds_TYPE_INST, 0x46000025) /* MIPS32 Rev 2 */ -OP("cvt.ps.s", Y_CVT_PS_S_OP, FP_R2ds_TYPE_INST, 0x46000026) /* MIPS32 Rev 2 */ -OP("cvt.s.d", Y_CVT_S_D_OP, FP_R2ds_TYPE_INST, 0x46200020) -OP("cvt.s.l", Y_CVT_S_L_OP, FP_R2ds_TYPE_INST, 0x46b00020) /* MIPS32 Rev 2 */ -OP("cvt.s.pl", Y_CVT_S_PL_OP, FP_R2ds_TYPE_INST, 0x46c00024) /* MIPS32 Rev 2 */ -OP("cvt.s.pu", Y_CVT_S_PU_OP, FP_R2ds_TYPE_INST, 0x46c00020) /* MIPS32 Rev 2 */ -OP("cvt.s.w", Y_CVT_S_W_OP, FP_R2ds_TYPE_INST, 0x46800020) -OP("cvt.w.d", Y_CVT_W_D_OP, FP_R2ds_TYPE_INST, 0x46200024) -OP("cvt.w.s", Y_CVT_W_S_OP, FP_R2ds_TYPE_INST, 0x46000024) - -OP("deret", Y_DERET_OP, NOARG_TYPE_INST, 0x4200001f) /* MIPS32 Rev 2 */ -OP("di", Y_DI_OP, I1t_TYPE_INST, 0x41606000) /* MIPS32 Rev 2 */ - -OP("div", Y_DIV_OP, R2st_TYPE_INST, 0x0000001a) -OP("div.d", Y_DIV_D_OP, FP_R3_TYPE_INST, 0x46200003) -OP("div.s", Y_DIV_S_OP, FP_R3_TYPE_INST, 0x46000003) -OP("divu", Y_DIVU_OP, R2st_TYPE_INST, 0x0000001b) - -OP("ehb", Y_EHB_OP, NOARG_TYPE_INST, 0x000000c0) /* MIPS32 Rev 2 */ -OP("ei", Y_EI_OP, I1t_TYPE_INST, 0x41606020) /* MIPS32 Rev 2 */ -OP("eret", Y_ERET_OP, NOARG_TYPE_INST, 0x42000018) /* MIPS32 */ -OP("ext", Y_EXT_OP, FP_R2ds_TYPE_INST, 0x7c000000) /* MIPS32 Rev 2 */ - -OP("floor.l.d", Y_FLOOR_L_D_OP, FP_R2ds_TYPE_INST, 0x4620000b) /* MIPS32 Rev 2 */ -OP("floor.l.s", Y_FLOOR_L_S_OP, FP_R2ds_TYPE_INST, 0x4600000b) /* MIPS32 Rev 2 */ -OP("floor.w.d", Y_FLOOR_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000f) /* MIPS32 */ -OP("floor.w.s", Y_FLOOR_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000f) /* MIPS32 */ - -OP("ins", Y_INS_OP, FP_R2ds_TYPE_INST, 0x7c000004) /* MIPS32 Rev 2 */ - -OP("j", Y_J_OP, J_TYPE_INST, 0x08000000) -OP("jal", Y_JAL_OP, J_TYPE_INST, 0x0c000000) -OP("jalr", Y_JALR_OP, R2ds_TYPE_INST, 0x00000009) -OP("jalr.hb", Y_JALR_HB_OP, R2ds_TYPE_INST, 0x00000409) /* MIPS32 Rev 2 */ - -OP("jr", Y_JR_OP, R1s_TYPE_INST, 0x00000008) -OP("jr.hb", Y_JR_HB_OP, R1s_TYPE_INST, 0x00000408) /* MIPS32 Rev 2 */ - -OP("l.d", Y_L_D_POP, PSEUDO_OP, -1) -OP("l.s", Y_L_S_POP, PSEUDO_OP, -1) - -OP("la", Y_LA_POP, PSEUDO_OP, -1) -OP("lb", Y_LB_OP, I2a_TYPE_INST, 0x80000000) -OP("lbu", Y_LBU_OP, I2a_TYPE_INST, 0x90000000) -OP("ld", Y_LD_POP, PSEUDO_OP, -1) -OP("ldc1", Y_LDC1_OP, FP_I2a_TYPE_INST, 0xd4000000) /* MIPS32 */ -OP("ldc2", Y_LDC2_OP, I2a_TYPE_INST, 0xd8000000) /* MIPS32 */ -OP("ldxc1", Y_LDXC1_OP, FP_R3_TYPE_INST, 0x4c000001) /* MIPS32 Rev 2 */ -OP("lh", Y_LH_OP, I2a_TYPE_INST, 0x84000000) -OP("lhu", Y_LHU_OP, I2a_TYPE_INST, 0x94000000) - -OP("li", Y_LI_POP, PSEUDO_OP, -1) -OP("li.d", Y_LI_D_POP, PSEUDO_OP, -1) -OP("li.s", Y_LI_S_POP, PSEUDO_OP, -1) - -OP("ll", Y_LL_OP, I2a_TYPE_INST, 0xc0000000) /* MIPS32 */ - -OP("lui", Y_LUI_OP, I1t_TYPE_INST, 0x3c000000) -OP("luxc1", Y_LUXC1_OP, FP_R3_TYPE_INST, 0x4c000005) /* MIPS32 Rev 2 */ - -OP("lw", Y_LW_OP, I2a_TYPE_INST, 0x8c000000) -OP("lwc1", Y_LWC1_OP, FP_I2a_TYPE_INST, 0xc4000000) -OP("lwc2", Y_LWC2_OP, I2a_TYPE_INST, 0xc8000000) -OP("lwl", Y_LWL_OP, I2a_TYPE_INST, 0x88000000) -OP("lwr", Y_LWR_OP, I2a_TYPE_INST, 0x98000000) -OP("lwxc1", Y_LWXC1_OP, FP_R3_TYPE_INST, 0x4c000000) /* MIPS32 Rev 2 */ - -OP("madd", Y_MADD_OP, R2st_TYPE_INST, 0x70000000) /* MIPS32 */ -OP("madd.d", Y_MADD_D_OP, FP_R4_TYPE_INST, 0x4c000001) /* MIPS32 Rev 2 */ -OP("madd.ps", Y_MADD_PS_OP, FP_R4_TYPE_INST, 0x4c000006) /* MIPS32 Rev 2 */ -OP("madd.s", Y_MADD_S_OP, FP_R4_TYPE_INST, 0x4c000000) /* MIPS32 Rev 2 */ -OP("maddu", Y_MADDU_OP, R2st_TYPE_INST, 0x70000001) /* MIPS32 */ - -OP("mfc0", Y_MFC0_OP, R2td_TYPE_INST, 0x40000000) -OP("mfc1", Y_MFC1_OP, FP_R2ts_TYPE_INST, 0x44000000) -OP("mfc1.d", Y_MFC1_D_POP, PSEUDO_OP, -1) -OP("mfc2", Y_MFC2_OP, R2td_TYPE_INST, 0x48000000) -OP("mfhc1", Y_MFHC1_OP, FP_R2ts_TYPE_INST, 0x44600000) /* MIPS32 Rev 2 */ -OP("mfhc2", Y_MFHC2_OP, R2td_TYPE_INST, 0x48600000) /* MIPS32 Rev 2 */ -OP("mfhi", Y_MFHI_OP, R1d_TYPE_INST, 0x00000010) -OP("mflo", Y_MFLO_OP, R1d_TYPE_INST, 0x00000012) - -OP("mov.d", Y_MOV_D_OP, FP_R2ds_TYPE_INST, 0x46200006) -OP("mov.ps", Y_MOV_PS_OP, FP_R2ds_TYPE_INST, 0x46c00006) /* MIPS32 Rev 2 */ -OP("mov.s", Y_MOV_S_OP, FP_R2ds_TYPE_INST, 0x46000006) -OP("move", Y_MOVE_POP, PSEUDO_OP, -1) - -OP("movf", Y_MOVF_OP, MOVC_TYPE_INST, 0x00000001) /* MIPS32 */ -OP("movf.d", Y_MOVF_D_OP, FP_MOVC_TYPE_INST, 0x46200011) /* MIPS32 */ -OP("movf.ps", Y_MOVF_PS_OP, FP_MOVC_TYPE_INST, 0x46c00011) /* MIPS32 Rev 2 */ -OP("movf.s", Y_MOVF_S_OP, FP_MOVC_TYPE_INST, 0x46000011) /* MIPS32 */ - -OP("movn", Y_MOVN_OP, R3_TYPE_INST, 0x0000000b) /* MIPS32 */ -OP("movn.d", Y_MOVN_D_OP, FP_MOVC_TYPE_INST, 0x46200013) /* MIPS32 */ -OP("movn.ps", Y_MOVN_PS_OP, FP_MOVC_TYPE_INST, 0x46c00013) /* MIPS32 Rev 2 */ -OP("movn.s", Y_MOVN_S_OP, FP_MOVC_TYPE_INST, 0x46000013) /* MIPS32 */ - -OP("movt", Y_MOVT_OP, MOVC_TYPE_INST, 0x00010001) /* MIPS32 */ -OP("movt.d", Y_MOVT_D_OP, FP_MOVC_TYPE_INST, 0x46210011) /* MIPS32 */ -OP("movt.ps", Y_MOVT_PS_OP, FP_MOVC_TYPE_INST, 0x46c10011) /* MIPS32 Rev 2 */ -OP("movt.s", Y_MOVT_S_OP, FP_MOVC_TYPE_INST, 0x46010011) /* MIPS32 */ - -OP("movz", Y_MOVZ_OP, R3_TYPE_INST, 0x0000000a) /* MIPS32 */ -OP("movz.d", Y_MOVZ_D_OP, FP_MOVC_TYPE_INST, 0x46200012) /* MIPS32 */ -OP("movz.ps", Y_MOVZ_PS_OP, FP_MOVC_TYPE_INST, 0x46c00012) /* MIPS32 Rev 2 */ -OP("movz.s", Y_MOVZ_S_OP, FP_MOVC_TYPE_INST, 0x46000012) /* MIPS32 */ - -OP("msub", Y_MSUB_OP, R2st_TYPE_INST, 0x70000004) /* MIPS32 */ -OP("msub.d", Y_MSUB_D_OP, FP_R4_TYPE_INST, 0x4c000021) /* MIPS32 Rev 2 */ -OP("msub.ps", Y_MSUB_PS_OP, FP_R4_TYPE_INST, 0x4c000026) /* MIPS32 Rev 2 */ -OP("msub.s", Y_MSUB_S_OP, FP_R4_TYPE_INST, 0x4c000020) /* MIPS32 Rev 2 */ -OP("msubu", Y_MSUBU_OP, R2st_TYPE_INST, 0x70000005) /* MIPS32 */ - -OP("mtc0", Y_MTC0_OP, R2td_TYPE_INST, 0x40800000) -OP("mtc1", Y_MTC1_OP, FP_R2ts_TYPE_INST, 0x44800000) -OP("mtc1.d", Y_MTC1_D_POP, PSEUDO_OP, -1) -OP("mtc2", Y_MTC2_OP, R2td_TYPE_INST, 0x48800000) -OP("mthc1", Y_MTHC1_OP, FP_R2ts_TYPE_INST, 0x44e00000) /* MIPS32 Rev 2 */ -OP("mthc2", Y_MTHC2_OP, R2td_TYPE_INST, 0x48e00000) /* MIPS32 Rev 2 */ - -OP("mthi", Y_MTHI_OP, R1s_TYPE_INST, 0x00000011) -OP("mtlo", Y_MTLO_OP, R1s_TYPE_INST, 0x00000013) - -OP("mul", Y_MUL_OP, R3_TYPE_INST, 0x70000002) /* MIPS32 */ -OP("mul.d", Y_MUL_D_OP, FP_R3_TYPE_INST, 0x46200002) -OP("mul.ps", Y_MUL_PS_OP, FP_R3_TYPE_INST, 0x46c00002) /* MIPS32 Rev 2 */ -OP("mul.s", Y_MUL_S_OP, FP_R3_TYPE_INST, 0x46000002) -OP("mulo", Y_MULO_POP, PSEUDO_OP, -1) -OP("mulou", Y_MULOU_POP, PSEUDO_OP, -1) -OP("mult", Y_MULT_OP, R2st_TYPE_INST, 0x00000018) -OP("multu", Y_MULTU_OP, R2st_TYPE_INST, 0x00000019) - -OP("neg", Y_NEG_POP, PSEUDO_OP, -1) -OP("neg.d", Y_NEG_D_OP, FP_R2ds_TYPE_INST, 0x46200007) -OP("neg.ps", Y_NEG_PS_OP, FP_R2ds_TYPE_INST, 0x46c00007) /* MIPS32 Rev 2 */ -OP("neg.s", Y_NEG_S_OP, FP_R2ds_TYPE_INST, 0x46000007) -OP("negu", Y_NEGU_POP, PSEUDO_OP, -1) - -OP("nmadd.d", Y_NMADD_D_OP, FP_R4_TYPE_INST, 0x4c000031) /* MIPS32 Rev 2 */ -OP("nmadd.ps", Y_NMADD_PS_OP, FP_R4_TYPE_INST, 0x4c000036) /* MIPS32 Rev 2 */ -OP("nmadd.s", Y_NMADD_S_OP, FP_R4_TYPE_INST, 0x4c000030) /* MIPS32 Rev 2 */ -OP("nmsub.d", Y_NMSUB_D_OP, FP_R4_TYPE_INST, 0x4c000039) /* MIPS32 Rev 2 */ -OP("nmsub.ps", Y_NMSUB_PS_OP, FP_R4_TYPE_INST, 0x4c00003e) /* MIPS32 Rev 2 */ -OP("nmsub.s", Y_NMSUB_S_OP, FP_R4_TYPE_INST, 0x4c000038) /* MIPS32 Rev 2 */ - -OP("nop", Y_NOP_POP, PSEUDO_OP, -1) -OP("nor", Y_NOR_OP, R3_TYPE_INST, 0x00000027) -OP("not", Y_NOT_POP, PSEUDO_OP, -1) -OP("or", Y_OR_OP, R3_TYPE_INST, 0x00000025) -OP("ori", Y_ORI_OP, I2_TYPE_INST, 0x34000000) - -OP("pll.ps", Y_PLL_PS_OP, FP_R3_TYPE_INST, 0x46c0002c) /* MIPS32 Rev 2 */ -OP("plu.ps", Y_PLU_PS_OP, FP_R3_TYPE_INST, 0x46c0002d) /* MIPS32 Rev 2 */ - -OP("pref", Y_PREF_OP, I2_TYPE_INST, 0xcc000000) /* MIPS32 */ -OP("prefx", Y_PREFX_OP, R2st_TYPE_INST, 0x4600000f) /* MIPS32 Rev 2 */ -OP("pul.ps", Y_PUL_PS_OP, FP_R3_TYPE_INST, 0x46c0002e) /* MIPS32 Rev 2 */ -OP("puu.ps", Y_PUU_PS_OP, FP_R3_TYPE_INST, 0x46c0002f) /* MIPS32 Rev 2 */ - -OP("rdhwr", Y_RDHWR_OP, R3_TYPE_INST, 0x7c00003b) /* MIPS32 Rev 2 */ -OP("rdpgpr", Y_RDPGPR_OP, R2td_TYPE_INST, 0x41400000) /* MIPS32 Rev 2 */ - -OP("recip.d", Y_RECIP_D_OP, FP_R2ds_TYPE_INST, 0x46200015) /* MIPS32 Rev 2 */ -OP("recip.s", Y_RECIP_S_OP, FP_R2ds_TYPE_INST, 0x46000015) /* MIPS32 Rev 2 */ - -OP("rem", Y_REM_POP, PSEUDO_OP, -1) -OP("remu", Y_REMU_POP, PSEUDO_OP, -1) - -OP("rfe", Y_RFE_OP, NOARG_TYPE_INST, 0x42000010) - -OP("rol", Y_ROL_POP, PSEUDO_OP, -1) -OP("ror", Y_ROR_POP, PSEUDO_OP, -1) -OP("rotr", Y_ROTR_OP, R2sh_TYPE_INST, 0x00200002) /* MIPS32 Rev 2 */ -OP("rotrv", Y_ROTRV_OP, R2sh_TYPE_INST, 0x00200003) /* MIPS32 Rev 2 */ - -OP("round.l.d", Y_ROUND_L_D_OP, FP_R2ds_TYPE_INST, 0x46200008) /* MIPS32 Rev 2 */ -OP("round.l.s", Y_ROUND_L_S_OP, FP_R2ds_TYPE_INST, 0x46000008) /* MIPS32 Rev 2 */ -OP("round.w.d", Y_ROUND_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000c) /* MIPS32 */ -OP("round.w.s", Y_ROUND_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000c) /* MIPS32 */ - -OP("rsqrt.d", Y_RSQRT_D_OP, FP_R2ds_TYPE_INST, 0x46200016) /* MIPS32 Rev 2 */ -OP("rsqrt.s", Y_RSQRT_S_OP, FP_R2ds_TYPE_INST, 0x46000016) /* MIPS32 Rev 2 */ - -OP("s.d", Y_S_D_POP, PSEUDO_OP, -1) -OP("s.s", Y_S_S_POP, PSEUDO_OP, -1) - -OP("sb", Y_SB_OP, I2a_TYPE_INST, 0xa0000000) -OP("sc", Y_SC_OP, I2a_TYPE_INST, 0xe0000000) /* MIPS32 */ -OP("sd", Y_SD_POP, PSEUDO_OP, -1) -OP("sdbbp", Y_SDBBP_OP, NOARG_TYPE_INST, 0x7000003f) /* MIPS32 Rev 2*/ -OP("sdc1", Y_SDC1_OP, FP_I2a_TYPE_INST, 0xf4000000) /* MIPS32 */ -OP("sdc2", Y_SDC2_OP, I2a_TYPE_INST, 0xf8000000) /* MIPS32 */ -OP("sdxc1", Y_SDXC1_OP, FP_R3_TYPE_INST, 0x46000009) /* MIPS32 Rev 2 */ - -OP("seb", Y_SEB_OP, R2td_TYPE_INST, 0x7c000420) /* MIPS32 Rev 2 */ -OP("seh", Y_SEH_OP, R2td_TYPE_INST, 0x7c000620) /* MIPS32 Rev 2 */ -OP("seq", Y_SEQ_POP, PSEUDO_OP, -1) -OP("sge", Y_SGE_POP, PSEUDO_OP, -1) -OP("sgeu", Y_SGEU_POP, PSEUDO_OP, -1) -OP("sgt", Y_SGT_POP, PSEUDO_OP, -1) -OP("sgtu", Y_SGTU_POP, PSEUDO_OP, -1) - -OP("sh", Y_SH_OP, I2a_TYPE_INST, 0xa4000000) -OP("sle", Y_SLE_POP, PSEUDO_OP, -1) -OP("sleu", Y_SLEU_POP, PSEUDO_OP, -1) -OP("sll", Y_SLL_OP, R2sh_TYPE_INST, 0x00000000) -OP("sllv", Y_SLLV_OP, R3sh_TYPE_INST, 0x00000004) - -OP("slt", Y_SLT_OP, R3_TYPE_INST, 0x0000002a) -OP("slti", Y_SLTI_OP, I2_TYPE_INST, 0x28000000) -OP("sltiu", Y_SLTIU_OP, I2_TYPE_INST, 0x2c000000) -OP("sltu", Y_SLTU_OP, R3_TYPE_INST, 0x0000002b) -OP("sne", Y_SNE_POP, PSEUDO_OP, -1) - -OP("sqrt.d", Y_SQRT_D_OP, FP_R2ds_TYPE_INST, 0x46200004) /* MIPS32 */ -OP("sqrt.s", Y_SQRT_S_OP, FP_R2ds_TYPE_INST, 0x46000004) /* MIPS32 */ - -OP("sra", Y_SRA_OP, R2sh_TYPE_INST, 0x00000003) -OP("srav", Y_SRAV_OP, R3sh_TYPE_INST, 0x00000007) -OP("srl", Y_SRL_OP, R2sh_TYPE_INST, 0x00000002) -OP("srlv", Y_SRLV_OP, R3sh_TYPE_INST, 0x00000006) - -OP("ssnop", Y_SSNOP_OP, R2sh_TYPE_INST, 0x00000040) /* MIPS32 */ - -OP("sub", Y_SUB_OP, R3_TYPE_INST, 0x00000022) -OP("sub.d", Y_SUB_D_OP, FP_R3_TYPE_INST, 0x46200001) -OP("sub.ps", Y_SUB_PS_OP, FP_R3_TYPE_INST, 0x46600001) /* MIPS32 Rev 2 */ -OP("sub.s", Y_SUB_S_OP, FP_R3_TYPE_INST, 0x46000001) -OP("subu", Y_SUBU_OP, R3_TYPE_INST, 0x00000023) - -OP("suxc1", Y_SUXC1_OP, FP_R3_TYPE_INST, 0x4600000d) /* MIPS32 Rev 2 */ - -OP("sw", Y_SW_OP, I2a_TYPE_INST, 0xac000000) -OP("swc1", Y_SWC1_OP, FP_I2a_TYPE_INST, 0xe4000000) -OP("swc2", Y_SWC2_OP, I2a_TYPE_INST, 0xe8000000) -OP("swl", Y_SWL_OP, I2a_TYPE_INST, 0xa8000000) -OP("swr", Y_SWR_OP, I2a_TYPE_INST, 0xb8000000) -OP("swxc1", Y_SWXC1_OP, FP_R3_TYPE_INST, 0x46000008) /* MIPS32 Rev 2 */ - -OP("sync", Y_SYNC_OP, NOARG_TYPE_INST, 0x0000000f) /* MIPS32 */ -OP("synci", Y_SYNCI_OP, I2_TYPE_INST, 0x04140000) /* MIPS32 Rev 2 */ -OP("syscall", Y_SYSCALL_OP, NOARG_TYPE_INST, 0x0000000c) - -OP("teq", Y_TEQ_OP, R2st_TYPE_INST, 0x00000034) /* MIPS32 */ -OP("teqi", Y_TEQI_OP, I1s_TYPE_INST, 0x040c0000) /* MIPS32 */ -OP("tge", Y_TGE_OP, R2st_TYPE_INST, 0x00000030) /* MIPS32 */ -OP("tgei", Y_TGEI_OP, I1s_TYPE_INST, 0x04080000) /* MIPS32 */ -OP("tgeiu", Y_TGEIU_OP, I1s_TYPE_INST, 0x04090000) /* MIPS32 */ -OP("tgeu", Y_TGEU_OP, R2st_TYPE_INST, 0x00000031) /* MIPS32 */ - -OP("tlbp", Y_TLBP_OP, NOARG_TYPE_INST, 0x42000008) -OP("tlbr", Y_TLBR_OP, NOARG_TYPE_INST, 0x42000001) -OP("tlbwi", Y_TLBWI_OP, NOARG_TYPE_INST, 0x42000002) -OP("tlbwr", Y_TLBWR_OP, NOARG_TYPE_INST, 0x42000006) - -OP("tlt", Y_TLT_OP, R2st_TYPE_INST, 0x00000032) /* MIPS32 */ -OP("tlti", Y_TLTI_OP, I1s_TYPE_INST, 0x040a0000) /* MIPS32 */ -OP("tltiu", Y_TLTIU_OP, I1s_TYPE_INST, 0x040b0000) /* MIPS32 */ -OP("tltu", Y_TLTU_OP, R2st_TYPE_INST, 0x00000033) /* MIPS32 */ -OP("tne", Y_TNE_OP, R2st_TYPE_INST, 0x00000036) /* MIPS32 */ -OP("tnei", Y_TNEI_OP, I1s_TYPE_INST, 0x040e0000) /* MIPS32 */ - -OP("trunc.l.d", Y_TRUNC_L_D_OP, FP_R2ds_TYPE_INST, 0x46200009) /* MIPS32 Rev 2 */ -OP("trunc.l.s", Y_TRUNC_L_S_OP, FP_R2ds_TYPE_INST, 0x46000009) /* MIPS32 Rev 2 */ -OP("trunc.w.d", Y_TRUNC_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000d) /* MIPS32 */ -OP("trunc.w.s", Y_TRUNC_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000d) /* MIPS32 */ - -OP("ulh", Y_ULH_POP, PSEUDO_OP, -1) -OP("ulhu", Y_ULHU_POP, PSEUDO_OP, -1) -OP("ulw", Y_ULW_POP, PSEUDO_OP, -1) -OP("ush", Y_USH_POP, PSEUDO_OP, -1) -OP("usw", Y_USW_POP, PSEUDO_OP, -1) - -OP("wrpgpr", Y_WRPGPR_OP, R2td_TYPE_INST, 0x41c00000) /* MIPS32 Rev 2 */ -OP("wsbh", Y_WSBH_OP, R2td_TYPE_INST, 0x7c0000a0) /* MIPS32 Rev 2 */ - -OP("xor", Y_XOR_OP, R3_TYPE_INST, 0x00000026) -OP("xori", Y_XORI_OP, I2_TYPE_INST, 0x38000000) diff --git a/spim-jsspim/CPU/parser.h b/spim-jsspim/CPU/parser.h deleted file mode 100755 index 0e120f8..0000000 --- a/spim-jsspim/CPU/parser.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to parser for instructions and assembler directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -void fix_current_label_address (mem_addr new_addr); -int imm_op_to_op (int opcode); -void initialize_parser (char *file_name); -int op_to_imm_op (int opcode); -void yyerror (char *s); -int yyparse (); - - -/* Exported Variables: */ - -extern bool data_dir; /* => item in data segment */ - -extern bool text_dir; /* => item in text segment */ - -extern bool parse_error_occurred; /* => parse resulted in error */ diff --git a/spim-jsspim/CPU/parser.y b/spim-jsspim/CPU/parser.y deleted file mode 100755 index 4e7202f..0000000 --- a/spim-jsspim/CPU/parser.y +++ /dev/null @@ -1,2956 +0,0 @@ -/* SPIM S20 MIPS simulator. - Parser for instructions and assembler directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -%expect 25 /* Supress warning about 25 shift-reduce conflicts */ - -%start LINE - -%token Y_EOF - -%token Y_NL -%token Y_INT -%token Y_ID -%token Y_REG -%token Y_FP_REG -%token Y_STR -%token Y_FP - -/* MIPS instructions op codes: */ - -%token Y_ABS_D_OP -%token Y_ABS_PS_OP -%token Y_ABS_S_OP -%token Y_ADD_D_OP -%token Y_ADD_OP -%token Y_ADD_PS_OP -%token Y_ADD_S_OP -%token Y_ADDI_OP -%token Y_ADDIU_OP -%token Y_ADDU_OP -%token Y_ALNV_PS_OP -%token Y_AND_OP -%token Y_ANDI_OP -%token Y_BC1F_OP -%token Y_BC1FL_OP -%token Y_BC1T_OP -%token Y_BC1TL_OP -%token Y_BC2F_OP -%token Y_BC2FL_OP -%token Y_BC2T_OP -%token Y_BC2TL_OP -%token Y_BEQ_OP -%token Y_BEQL_OP -%token Y_BGEZ_OP -%token Y_BGEZAL_OP -%token Y_BGEZALL_OP -%token Y_BGEZL_OP -%token Y_BGTZ_OP -%token Y_BGTZL_OP -%token Y_BLEZ_OP -%token Y_BLEZL_OP -%token Y_BLTZ_OP -%token Y_BLTZAL_OP -%token Y_BLTZALL_OP -%token Y_BLTZL_OP -%token Y_BNE_OP -%token Y_BNEL_OP -%token Y_BREAK_OP -%token Y_C_EQ_D_OP -%token Y_C_EQ_PS_OP -%token Y_C_EQ_S_OP -%token Y_C_F_D_OP -%token Y_C_F_PS_OP -%token Y_C_F_S_OP -%token Y_C_LE_D_OP -%token Y_C_LE_PS_OP -%token Y_C_LE_S_OP -%token Y_C_LT_D_OP -%token Y_C_LT_PS_OP -%token Y_C_LT_S_OP -%token Y_C_NGE_D_OP -%token Y_C_NGE_PS_OP -%token Y_C_NGE_S_OP -%token Y_C_NGL_D_OP -%token Y_C_NGL_PS_OP -%token Y_C_NGL_S_OP -%token Y_C_NGLE_D_OP -%token Y_C_NGLE_PS_OP -%token Y_C_NGLE_S_OP -%token Y_C_NGT_D_OP -%token Y_C_NGT_PS_OP -%token Y_C_NGT_S_OP -%token Y_C_OLE_D_OP -%token Y_C_OLE_PS_OP -%token Y_C_OLE_S_OP -%token Y_C_OLT_D_OP -%token Y_C_OLT_PS_OP -%token Y_C_OLT_S_OP -%token Y_C_SEQ_D_OP -%token Y_C_SEQ_PS_OP -%token Y_C_SEQ_S_OP -%token Y_C_SF_D_OP -%token Y_C_SF_PS_OP -%token Y_C_SF_S_OP -%token Y_C_UEQ_D_OP -%token Y_C_UEQ_PS_OP -%token Y_C_UEQ_S_OP -%token Y_C_ULE_D_OP -%token Y_C_ULE_PS_OP -%token Y_C_ULE_S_OP -%token Y_C_ULT_D_OP -%token Y_C_ULT_PS_OP -%token Y_C_ULT_S_OP -%token Y_C_UN_D_OP -%token Y_C_UN_PS_OP -%token Y_C_UN_S_OP -%token Y_CACHE_OP -%token Y_CEIL_L_D_OP -%token Y_CEIL_L_S_OP -%token Y_CEIL_W_D_OP -%token Y_CEIL_W_S_OP -%token Y_CFC0_OP -%token Y_CFC1_OP -%token Y_CFC2_OP -%token Y_CLO_OP -%token Y_CLZ_OP -%token Y_COP2_OP -%token Y_CTC0_OP -%token Y_CTC1_OP -%token Y_CTC2_OP -%token Y_CVT_D_L_OP -%token Y_CVT_D_S_OP -%token Y_CVT_D_W_OP -%token Y_CVT_L_D_OP -%token Y_CVT_L_S_OP -%token Y_CVT_PS_S_OP -%token Y_CVT_S_D_OP -%token Y_CVT_S_L_OP -%token Y_CVT_S_PL_OP -%token Y_CVT_S_PU_OP -%token Y_CVT_S_W_OP -%token Y_CVT_W_D_OP -%token Y_CVT_W_S_OP -%token Y_DERET_OP -%token Y_DI_OP -%token Y_DIV_D_OP -%token Y_DIV_OP -%token Y_DIV_S_OP -%token Y_DIVU_OP -%token Y_EHB_OP -%token Y_EI_OP -%token Y_ERET_OP -%token Y_EXT_OP -%token Y_FLOOR_L_D_OP -%token Y_FLOOR_L_S_OP -%token Y_FLOOR_W_D_OP -%token Y_FLOOR_W_S_OP -%token Y_INS_OP -%token Y_J_OP -%token Y_JAL_OP -%token Y_JALR_HB_OP -%token Y_JALR_OP -%token Y_JR_HB_OP -%token Y_JR_OP -%token Y_LB_OP -%token Y_LBU_OP -%token Y_LDC1_OP -%token Y_LDC2_OP -%token Y_LDXC1_OP -%token Y_LH_OP -%token Y_LHU_OP -%token Y_LL_OP -%token Y_LUI_OP -%token Y_LUXC1_OP -%token Y_LW_OP -%token Y_LWC1_OP -%token Y_LWC2_OP -%token Y_LWL_OP -%token Y_LWR_OP -%token Y_LWXC1_OP -%token Y_MADD_D_OP -%token Y_MADD_OP -%token Y_MADD_PS_OP -%token Y_MADD_S_OP -%token Y_MADDU_OP -%token Y_MFC0_OP -%token Y_MFC1_OP -%token Y_MFC2_OP -%token Y_MFHC1_OP -%token Y_MFHC2_OP -%token Y_MFHI_OP -%token Y_MFLO_OP -%token Y_MOV_D_OP -%token Y_MOV_PS_OP -%token Y_MOV_S_OP -%token Y_MOVF_D_OP -%token Y_MOVF_OP -%token Y_MOVF_PS_OP -%token Y_MOVF_S_OP -%token Y_MOVN_D_OP -%token Y_MOVN_OP -%token Y_MOVN_PS_OP -%token Y_MOVN_S_OP -%token Y_MOVT_D_OP -%token Y_MOVT_OP -%token Y_MOVT_PS_OP -%token Y_MOVT_S_OP -%token Y_MOVZ_D_OP -%token Y_MOVZ_OP -%token Y_MOVZ_PS_OP -%token Y_MOVZ_S_OP -%token Y_MSUB_D_OP -%token Y_MSUB_OP -%token Y_MSUB_PS_OP -%token Y_MSUB_S_OP -%token Y_MSUBU_OP -%token Y_MTC0_OP -%token Y_MTC1_OP -%token Y_MTC2_OP -%token Y_MTHC1_OP -%token Y_MTHC2_OP -%token Y_MTHI_OP -%token Y_MTLO_OP -%token Y_MUL_D_OP -%token Y_MUL_PS_OP -%token Y_MUL_S_OP -%token Y_MUL_OP -%token Y_MULT_OP -%token Y_MULTU_OP -%token Y_NEG_D_OP -%token Y_NEG_PS_OP -%token Y_NEG_S_OP -%token Y_NMADD_D_OP -%token Y_NMADD_PS_OP -%token Y_NMADD_S_OP -%token Y_NMSUB_D_OP -%token Y_NMSUB_PS_OP -%token Y_NMSUB_S_OP -%token Y_NOR_OP -%token Y_OR_OP -%token Y_ORI_OP -%token Y_PFW_OP -%token Y_PLL_PS_OP -%token Y_PLU_PS_OP -%token Y_PREF_OP -%token Y_PREFX_OP -%token Y_PUL_PS_OP -%token Y_PUU_PS_OP -%token Y_RDHWR_OP -%token Y_RDPGPR_OP -%token Y_RECIP_D_OP -%token Y_RECIP_S_OP -%token Y_RFE_OP -%token Y_ROTR_OP -%token Y_ROTRV_OP -%token Y_ROUND_L_D_OP -%token Y_ROUND_L_S_OP -%token Y_ROUND_W_D_OP -%token Y_ROUND_W_S_OP -%token Y_RSQRT_D_OP -%token Y_RSQRT_S_OP -%token Y_SB_OP -%token Y_SC_OP -%token Y_SDBBP_OP -%token Y_SDC1_OP -%token Y_SDC2_OP -%token Y_SDXC1_OP -%token Y_SEB_OP -%token Y_SEH_OP -%token Y_SH_OP -%token Y_SLL_OP -%token Y_SLLV_OP -%token Y_SLT_OP -%token Y_SLTI_OP -%token Y_SLTIU_OP -%token Y_SLTU_OP -%token Y_SQRT_D_OP -%token Y_SQRT_S_OP -%token Y_SRA_OP -%token Y_SRAV_OP -%token Y_SRL_OP -%token Y_SRLV_OP -%token Y_SSNOP_OP -%token Y_SUB_D_OP -%token Y_SUB_OP -%token Y_SUB_PS_OP -%token Y_SUB_S_OP -%token Y_SUBU_OP -%token Y_SUXC1_OP -%token Y_SW_OP -%token Y_SWC1_OP -%token Y_SWC2_OP -%token Y_SWL_OP -%token Y_SWR_OP -%token Y_SWXC1_OP -%token Y_SYNC_OP -%token Y_SYNCI_OP -%token Y_SYSCALL_OP -%token Y_TEQ_OP -%token Y_TEQI_OP -%token Y_TGE_OP -%token Y_TGEI_OP -%token Y_TGEIU_OP -%token Y_TGEU_OP -%token Y_TLBP_OP -%token Y_TLBR_OP -%token Y_TLBWI_OP -%token Y_TLBWR_OP -%token Y_TLT_OP -%token Y_TLTI_OP -%token Y_TLTIU_OP -%token Y_TLTU_OP -%token Y_TNE_OP -%token Y_TNEI_OP -%token Y_TRUNC_L_D_OP -%token Y_TRUNC_L_S_OP -%token Y_TRUNC_W_D_OP -%token Y_TRUNC_W_S_OP -%token Y_WRPGPR_OP -%token Y_WSBH_OP -%token Y_XOR_OP -%token Y_XORI_OP - - -/* Assembler pseudo operations op codes: */ - -%token Y_ABS_POP -%token Y_B_POP -%token Y_BAL_POP -%token Y_BEQZ_POP -%token Y_BGE_POP -%token Y_BGEU_POP -%token Y_BGT_POP -%token Y_BGTU_POP -%token Y_BLE_POP -%token Y_BLEU_POP -%token Y_BLT_POP -%token Y_BLTU_POP -%token Y_BNEZ_POP -%token Y_LA_POP -%token Y_LD_POP -%token Y_L_D_POP -%token Y_L_S_POP -%token Y_LI_D_POP -%token Y_LI_POP -%token Y_LI_S_POP -%token Y_MFC1_D_POP -%token Y_MOVE_POP -%token Y_MTC1_D_POP -%token Y_MULO_POP -%token Y_MULOU_POP -%token Y_NEG_POP -%token Y_NEGU_POP -%token Y_NOP_POP -%token Y_NOT_POP -%token Y_REM_POP -%token Y_REMU_POP -%token Y_ROL_POP -%token Y_ROR_POP -%token Y_S_D_POP -%token Y_S_S_POP -%token Y_SD_POP -%token Y_SEQ_POP -%token Y_SGE_POP -%token Y_SGEU_POP -%token Y_SGT_POP -%token Y_SGTU_POP -%token Y_SLE_POP -%token Y_SLEU_POP -%token Y_SNE_POP -%token Y_ULH_POP -%token Y_ULHU_POP -%token Y_ULW_POP -%token Y_USH_POP -%token Y_USW_POP - -/* Assembler directives: */ - -%token Y_ALIAS_DIR -%token Y_ALIGN_DIR -%token Y_ASCII_DIR -%token Y_ASCIIZ_DIR -%token Y_ASM0_DIR -%token Y_BGNB_DIR -%token Y_BYTE_DIR -%token Y_COMM_DIR -%token Y_DATA_DIR -%token Y_DOUBLE_DIR -%token Y_END_DIR -%token Y_ENDB_DIR -%token Y_ENDR_DIR -%token Y_ENT_DIR -%token Y_ERR_DIR -%token Y_EXTERN_DIR -%token Y_FILE_DIR -%token Y_FLOAT_DIR -%token Y_FMASK_DIR -%token Y_FRAME_DIR -%token Y_GLOBAL_DIR -%token Y_HALF_DIR -%token Y_K_DATA_DIR -%token Y_K_TEXT_DIR -%token Y_LABEL_DIR -%token Y_LCOMM_DIR -%token Y_LIVEREG_DIR -%token Y_LOC_DIR -%token Y_MASK_DIR -%token Y_NOALIAS_DIR -%token Y_OPTIONS_DIR -%token Y_RDATA_DIR -%token Y_REPEAT_DIR -%token Y_SDATA_DIR -%token Y_SET_DIR -%token Y_SPACE_DIR -%token Y_STRUCT_DIR -%token Y_TEXT_DIR -%token Y_VERSTAMP_DIR -%token Y_VREG_DIR -%token Y_WORD_DIR - -%{ -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "data.h" -#include "scanner.h" -#include "parser.h" - - -/* return (0) */ -#define LINE_PARSE_DONE YYACCEPT - -/* return (1) */ -#define FILE_PARSE_DONE YYABORT - -typedef struct ll -{ - label *head; - struct ll *tail; -} label_list; - - -/* Exported Variables: */ - -bool data_dir; /* => item in data segment */ - -bool text_dir; /* => item in text segment */ - -bool parse_error_occurred; /* => parse resulted in error */ - - -/* Local functions: */ - -static imm_expr *branch_offset (int n_inst); -static int cc_to_rt (int cc, int nd, int tf); -static void check_imm_range (imm_expr*, int32, int32); -static void check_uimm_range (imm_expr*, uint32, uint32); -static void clear_labels (); -static label_list *cons_label (label *head, label_list *tail); -static void div_inst (int op, int rd, int rs, int rt, int const_divisor); -static void mips32_r2_inst (); -static void mult_inst (int op, int rd, int rs, int rt); -static void nop_inst (); -static void set_eq_inst (int op, int rd, int rs, int rt); -static void set_ge_inst (int op, int rd, int rs, int rt); -static void set_gt_inst (int op, int rd, int rs, int rt); -static void set_le_inst (int op, int rd, int rs, int rt); -static void store_word_data (int value); -static void trap_inst (); -static void yywarn (char*); - - -/* Local variables: */ - -static bool null_term; /* => string terminate by \0 */ - -static void (*store_op) (void*); /* Function to store items in an EXPR_LST */ - -static label_list *this_line_labels = NULL; /* List of label for curent line */ - -static bool noat_flag = 0; /* => program can use $1 */ - -static char *input_file_name; /* Name of file being parsed */ - -%} - - - -%% - -LINE: {parse_error_occurred = false; scanner_start_line (); } LBL_CMD ; - -LBL_CMD: OPT_LBL CMD - | CMD - ; - - -OPT_LBL: ID ':' { - /* Call outside of cons_label, since an error sets that variable to NULL. */ - label* l = record_label ((char*)$1.p, - text_dir ? current_text_pc () : current_data_pc (), - 0); - this_line_labels = cons_label (l, this_line_labels); - free ((char*)$1.p); - } - - | ID '=' EXPR - { - label *l = record_label ((char*)$1.p, (mem_addr)$3.i, 1); - free ((char*)$1.p); - - l->const_flag = 1; - clear_labels (); - } - ; - - -CMD: ASM_CODE - { - clear_labels (); - } - TERM - - | ASM_DIRECTIVE - { - clear_labels (); - } - TERM - - | TERM - ; - - -TERM: Y_NL - { - LINE_PARSE_DONE; - } - - | Y_EOF - { - clear_labels (); - FILE_PARSE_DONE; - } - ; - - - -ASM_CODE: LOAD_OPS DEST ADDRESS - { - i_type_inst ($1.i == Y_LD_POP ? Y_LW_OP : $1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - if ($1.i == Y_LD_POP) - i_type_inst_free (Y_LW_OP, - $2.i + 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 4)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADC_OPS COP_REG ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADFP_OPS F_SRC1 ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADI_OPS DEST UIMM16 - { - i_type_inst_free ($1.i, $2.i, 0, (imm_expr *)$3.p); - } - - - | Y_LA_POP DEST ADDRESS - { - if (addr_expr_reg ((addr_expr *)$3.p)) - i_type_inst (Y_ADDI_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - else - i_type_inst (Y_ORI_OP, $2.i, 0, - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_LI_POP DEST IMM32 - { - i_type_inst_free (Y_ORI_OP, $2.i, 0, (imm_expr *)$3.p); - } - - - | Y_LI_D_POP F_DEST Y_FP - { - int *x = (int *) $3.p; - - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*x)); - r_co_type_inst (Y_MTC1_OP, 0, $2.i, 1); - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*(x+1))); - r_co_type_inst (Y_MTC1_OP, 0, $2.i + 1, 1); - } - - - | Y_LI_S_POP F_DEST Y_FP - { - float x = (float) *((double *) $3.p); - int *y = (int *) &x; - - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*y)); - r_co_type_inst (Y_MTC1_OP, 0, $2.i, 1); - } - - - | Y_ULW_POP DEST ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (Y_LWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_LWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); -#else - i_type_inst_free (Y_LWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); - i_type_inst (Y_LWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | ULOADH_POPS DEST ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (($1.i == Y_ULH_POP ? Y_LB_OP : Y_LBU_OP), - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_LBU_OP, 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); -#else - i_type_inst_free (($1.i == Y_ULH_POP ? Y_LB_OP : Y_LBU_OP), - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); - i_type_inst (Y_LBU_OP, 1, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - r_sh_type_inst (Y_SLL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | LOADFP_INDEX_OPS F_DEST ADDRESS - { - mips32_r2_inst (); - } - - - | STORE_OPS SRC1 ADDRESS - { - i_type_inst ($1.i == Y_SD_POP ? Y_SW_OP : $1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - if ($1.i == Y_SD_POP) - i_type_inst_free (Y_SW_OP, $2.i + 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 4)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREC_OPS COP_REG ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_USW_POP SRC1 ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (Y_SWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_SWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); -#else - i_type_inst_free (Y_SWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); - i_type_inst (Y_SWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_USH_POP SRC1 ADDRESS - { - i_type_inst (Y_SB_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - - /* ROL SRC, SRC, 8 */ - r_sh_type_inst (Y_SLL_OP, 1, $2.i, 24); - r_sh_type_inst (Y_SRL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - - i_type_inst_free (Y_SB_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); - /* ROR SRC, SRC, 8 */ - r_sh_type_inst (Y_SRL_OP, 1, $2.i, 24); - r_sh_type_inst (Y_SLL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREFP_OPS F_SRC1 ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREFP_INDEX_OPS F_DEST ADDRESS - { - mips32_r2_inst (); - } - - - | SYS_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | PREFETCH_OPS ADDRESS - { - mips32_r2_inst (); - } - - - | CACHE_OPS Y_INT ADDRESS - { - i_type_inst_free ($1.i, $2.i, 0, (imm_expr *)$3.p); - } - - - | TLB_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | Y_SYNC_OP - { - r_type_inst ($1.i, 0, 0, 0); - } - - | Y_SYNC_OP Y_INT - { - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | Y_BREAK_OP Y_INT - { - if ($2.i == 1) - yyerror ("Breakpoint 1 is reserved for debugger"); - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | Y_NOP_POP - { - nop_inst (); - } - - - | Y_SSNOP_OP - { - r_sh_type_inst (Y_SLL_OP, 0, 0, 1); /* SLL r0 r0 1 */ - } - - - | Y_ABS_POP DEST SRC1 - { - if ($2.i != $3.i) - r_type_inst (Y_ADDU_OP, $2.i, 0, $3.i); - - i_type_inst_free (Y_BGEZ_OP, 0, $3.i, branch_offset (2)); - r_type_inst (Y_SUB_OP, $2.i, 0, $3.i); - } - - - | Y_NEG_POP DEST SRC1 - { - r_type_inst (Y_SUB_OP, $2.i, 0, $3.i); - } - - - | Y_NEGU_POP DEST SRC1 - { - r_type_inst (Y_SUBU_OP, $2.i, 0, $3.i); - } - - - | Y_NOT_POP DEST SRC1 - { - r_type_inst (Y_NOR_OP, $2.i, $3.i, 0); - } - - - | Y_MOVE_POP DEST SRC1 - { - r_type_inst (Y_ADDU_OP, $2.i, 0, $3.i); - } - - - | NULLARY_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | NULLARY_OPS_REV2 - { - mips32_r2_inst (); - } - - - | COUNT_LEADING_OPS DEST SRC1 - { - /* RT must be equal to RD */ - r_type_inst ($1.i, $2.i, $3.i, $2.i); - } - - - | UNARY_OPS_REV2 DEST - { - mips32_r2_inst (); - } - - - | BINARYI_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | BINARYI_OPS DEST SRC1 IMM32 - { - i_type_inst_free (op_to_imm_op ($1.i), $2.i, $3.i, - (imm_expr *)$4.p); - } - - | BINARYI_OPS DEST IMM32 - { - i_type_inst_free (op_to_imm_op ($1.i), $2.i, $2.i, - (imm_expr *)$3.p); - } - - - | BINARYIR_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $4.i, $3.i); - } - - | BINARYIR_OPS DEST SRC1 Y_INT - { - r_sh_type_inst (op_to_imm_op ($1.i), $2.i, $3.i, $4.i); - } - - | BINARYIR_OPS DEST Y_INT - { - r_sh_type_inst (op_to_imm_op ($1.i), $2.i, $2.i, $3.i); - } - - - | BINARY_ARITHI_OPS DEST SRC1 IMM16 - { - i_type_inst_free ($1.i, $2.i, $3.i, (imm_expr *)$4.p); - } - - | BINARY_ARITHI_OPS DEST IMM16 - { - i_type_inst_free ($1.i, $2.i, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_LOGICALI_OPS DEST SRC1 UIMM16 - { - i_type_inst_free ($1.i, $2.i, $3.i, (imm_expr *)$4.p); - } - - | BINARY_LOGICALI_OPS DEST UIMM16 - { - i_type_inst_free ($1.i, $2.i, $2.i, (imm_expr *)$3.p); - } - - - | SHIFT_OPS DEST SRC1 Y_INT - { - if (($4.i < 0) || (31 < $4.i)) - yywarn ("Shift distance can only be in the range 0..31"); - r_sh_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SHIFT_OPS DEST SRC1 SRC2 - { - r_type_inst (imm_op_to_op ($1.i), $2.i, $4.i, $3.i); - } - - - | SHIFT_OPS_REV2 DEST SRC1 Y_INT - { - mips32_r2_inst (); - } - - | SHIFTV_OPS_REV2 DEST SRC1 SRC2 - { - mips32_r2_inst (); - } - - - | BINARY_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | BINARY_OPS DEST SRC1 IMM32 - { - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - r_type_inst ($1.i, - $2.i, - $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - } - free ((imm_expr *)$4.p); - } - - | BINARY_OPS DEST IMM32 - { - check_uimm_range ((imm_expr *)$3.p, UIMM_MIN, UIMM_MAX); - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (!is_zero_imm ((imm_expr *)$3.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - r_type_inst ($1.i, - $2.i, - $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1)); - } - free ((imm_expr *)$3.p); - } - - - | BINARY_OPS_REV2 DEST SRC1 - { - mips32_r2_inst (); - } - - - | SUB_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SUB_OPS DEST SRC1 IMM32 - { - int val = eval_imm_expr ((imm_expr *)$4.p); - - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - i_type_inst ($1.i == Y_SUB_OP ? Y_ADDI_OP - : $1.i == Y_SUBU_OP ? Y_ADDIU_OP - : (fatal_error ("Bad SUB_OP\n"), 0), - $2.i, - $3.i, - make_imm_expr (-val, NULL, false)); - free ((imm_expr *)$4.p); - } - - | SUB_OPS DEST IMM32 - { - int val = eval_imm_expr ((imm_expr *)$3.p); - - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - i_type_inst ($1.i == Y_SUB_OP ? Y_ADDI_OP - : $1.i == Y_SUBU_OP ? Y_ADDIU_OP - : (fatal_error ("Bad SUB_OP\n"), 0), - $2.i, - $2.i, - make_imm_expr (-val, NULL, false)); - free ((imm_expr *)$3.p); - } - - - | DIV_POPS DEST SRC1 - { - /* The hardware divide operation (ignore 1st arg) */ - if ($1.i != Y_DIV_OP && $1.i != Y_DIVU_OP) - yyerror ("REM requires 3 arguments"); - else - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - | DIV_POPS DEST SRC1 SRC2 - { - /* Pseudo divide operations */ - div_inst ($1.i, $2.i, $3.i, $4.i, 0); - } - - | DIV_POPS DEST SRC1 IMM32 - { - if (is_zero_imm ((imm_expr *)$4.p)) - yyerror ("Divide by zero"); - else - { - /* Use $at */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - div_inst ($1.i, $2.i, $3.i, 1, 1); - } - } - - - | MUL_POPS DEST SRC1 SRC2 - { - mult_inst ($1.i, $2.i, $3.i, $4.i); - } - - | MUL_POPS DEST SRC1 IMM32 - { - if (is_zero_imm ((imm_expr *)$4.p)) - /* Optimize: n * 0 == 0 */ - i_type_inst_free (Y_ORI_OP, $2.i, 0, (imm_expr *)$4.p); - else - { - /* Use $at */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - mult_inst ($1.i, $2.i, $3.i, 1); - } - } - - - | MULT_OPS SRC1 SRC2 - { - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - - | MULT_OPS3 DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | MULT_OPS3 DEST SRC1 IMM32 - { - /* Special case, for backward compatibility with pseudo-op - MULT instruction */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); /* Use $at */ - r_type_inst ($1.i, $2.i, $3.i, 1); - } - - - | Y_ROR_POP DEST SRC1 SRC2 - { - r_type_inst (Y_SUBU_OP, 1, 0, $4.i); - r_type_inst (Y_SLLV_OP, 1, 1, $3.i); - r_type_inst (Y_SRLV_OP, $2.i, $4.i, $3.i); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - } - - - | Y_ROL_POP DEST SRC1 SRC2 - { - r_type_inst (Y_SUBU_OP, 1, 0, $4.i); - r_type_inst (Y_SRLV_OP, 1, 1, $3.i); - r_type_inst (Y_SLLV_OP, $2.i, $4.i, $3.i); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - } - - - | Y_ROR_POP DEST SRC1 IMM32 - { - long dist = eval_imm_expr ((imm_expr *)$4.p); - - check_imm_range ((imm_expr *)$4.p, 0, 31); - r_sh_type_inst (Y_SLL_OP, 1, $3.i, -dist); - r_sh_type_inst (Y_SRL_OP, $2.i, $3.i, dist); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free ((imm_expr *)$4.p); - } - - - | Y_ROL_POP DEST SRC1 IMM32 - { - long dist = eval_imm_expr ((imm_expr *)$4.p); - - check_imm_range ((imm_expr *)$4.p, 0, 31); - r_sh_type_inst (Y_SRL_OP, 1, $3.i, -dist); - r_sh_type_inst (Y_SLL_OP, $2.i, $3.i, dist); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free ((imm_expr *)$4.p); - } - - - | BF_OPS_REV2 F_DEST F_SRC2 Y_INT Y_INT - { - mips32_r2_inst (); - } - - - | SET_LE_POPS DEST SRC1 SRC2 - { - set_le_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_LE_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_le_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | SET_GT_POPS DEST SRC1 SRC2 - { - set_gt_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_GT_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_gt_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - - | SET_GE_POPS DEST SRC1 SRC2 - { - set_ge_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_GE_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_ge_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | SET_EQ_POPS DEST SRC1 SRC2 - { - set_eq_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_EQ_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_eq_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | BR_COP_OPS LABEL - { - /* RS and RT fields contain information on test */ - int nd = opcode_is_nullified_branch ($1.i) ? 1 : 0; - int tf = opcode_is_true_branch ($1.i) ? 1 : 0; - i_type_inst_free ($1.i, - cc_to_rt (0, nd, tf), - BIN_RS ($1.i), - (imm_expr *)$2.p); - } - - | BR_COP_OPS CC_REG LABEL - { - /* RS and RT fields contain information on test */ - int nd = opcode_is_nullified_branch ($1.i) ? 1 : 0; - int tf = opcode_is_true_branch ($1.i) ? 1 : 0; - i_type_inst_free ($1.i, - cc_to_rt ($2.i, nd, tf), - BIN_RS ($1.i), - (imm_expr *)$3.p); - } - - - | UNARY_BR_OPS SRC1 LABEL - { - i_type_inst_free ($1.i, 0, $2.i, (imm_expr *)$3.p); - } - - - | UNARY_BR_POPS SRC1 LABEL - { - i_type_inst_free ($1.i == Y_BEQZ_POP ? Y_BEQ_OP : Y_BNE_OP, - 0, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_BR_OPS SRC1 SRC2 LABEL - { - i_type_inst_free ($1.i, $3.i, $2.i, (imm_expr *)$4.p); - } - - | BINARY_BR_OPS SRC1 BR_IMM32 LABEL - { - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (is_zero_imm ((imm_expr *)$3.p)) - i_type_inst ($1.i, $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1), - (imm_expr *)$4.p); - else - { - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst ($1.i, $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1), - (imm_expr *)$4.p); - } - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | BR_GT_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BGT_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $3.i, $2.i); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_GT_POPS SRC1 BR_IMM32 LABEL - { - if ($1.i == Y_BGT_POP) - { - /* Use $at */ - i_type_inst_free (Y_SLTI_OP, 1, $2.i, - incr_expr_offset ((imm_expr *)$3.p, 1)); - i_type_inst (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - else - { - /* Use $at */ - /* Can't add 1 to immediate since 0xffffffff+1 = 0 < 1 */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst_free (Y_BEQ_OP, $2.i, 1, branch_offset (3)); - r_type_inst (Y_SLTU_OP, 1, $2.i, 1); - i_type_inst (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | BR_GE_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BGE_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $2.i, $3.i); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_GE_POPS SRC1 BR_IMM32 LABEL - { - i_type_inst ($1.i == Y_BGE_POP ? Y_SLTI_OP : Y_SLTIU_OP, - 1, $2.i, (imm_expr *)$3.p); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - free ((imm_expr *)$3.p); - } - - - | BR_LT_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BLT_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $2.i, $3.i); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_LT_POPS SRC1 BR_IMM32 LABEL - { - i_type_inst ($1.i == Y_BLT_POP ? Y_SLTI_OP : Y_SLTIU_OP, - 1, $2.i, (imm_expr *)$3.p); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - free ((imm_expr *)$3.p); - } - - - | BR_LE_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BLE_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $3.i, $2.i); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_LE_POPS SRC1 BR_IMM32 LABEL - { - if ($1.i == Y_BLE_POP) - { - /* Use $at */ - i_type_inst_free (Y_SLTI_OP, 1, $2.i, - incr_expr_offset ((imm_expr *)$3.p, 1)); - i_type_inst (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - else - { - /* Use $at */ - /* Can't add 1 to immediate since 0xffffffff+1 = 0 < 1 */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst (Y_BEQ_OP, $2.i, 1, (imm_expr *)$4.p); - r_type_inst (Y_SLTU_OP, 1, $2.i, 1); - i_type_inst (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | J_OPS LABEL - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - j_type_inst (Y_J_OP, (imm_expr *)$2.p); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - j_type_inst (Y_JAL_OP, (imm_expr *)$2.p); - free ((imm_expr *)$2.p); - } - - | J_OPS SRC1 - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - r_type_inst (Y_JR_OP, 0, $2.i, 0); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - r_type_inst (Y_JALR_OP, 31, $2.i, 0); - } - - | J_OPS DEST SRC1 - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - r_type_inst (Y_JR_OP, 0, $3.i, 0); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - r_type_inst (Y_JALR_OP, $2.i, $3.i, 0); - } - - - | B_OPS LABEL - { - i_type_inst_free (($1.i == Y_BAL_POP ? Y_BGEZAL_OP : Y_BGEZ_OP), - 0, 0, (imm_expr *)$2.p); - } - - - | BINARYI_TRAP_OPS SRC1 IMM16 - { - i_type_inst_free ($1.i, 0, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_TRAP_OPS SRC1 SRC2 - { - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - - | FP_MOVE_OPS F_DEST F_SRC1 - { - r_co_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_MOVE_OPS_REV2 F_DEST F_SRC1 - { - mips32_r2_inst (); - } - - - | MOVEC_OPS DEST SRC1 REG - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | MOVECC_OPS DEST SRC1 Y_INT - { - r_type_inst ($1.i, - $2.i, - $3.i, - (($4.i & 0x7) << 2)); - } - - - | FP_MOVEC_OPS F_DEST F_SRC1 REG - { - r_co_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | FP_MOVEC_OPS_REV2 F_DEST F_SRC1 REG - { - mips32_r2_inst (); - } - - - | FP_MOVECC_OPS F_DEST F_SRC1 - { - r_co_type_inst ($1.i, $2.i, $3.i, cc_to_rt (0, 0, 0)); - } - - - | FP_MOVECC_OPS F_DEST F_SRC1 CC_REG - { - r_co_type_inst ($1.i, $2.i, $3.i, cc_to_rt ($4.i, 0, 0)); - } - - - | FP_MOVECC_OPS_REV2 F_DEST F_SRC1 CC_REG - { - mips32_r2_inst (); - } - - - | MOVE_FROM_HILO_OPS REG - { - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | MOVE_TO_HILO_OPS REG - { - r_type_inst ($1.i, 0, $2.i, 0); - } - - - - | MOVE_COP_OPS REG COP_REG - { - if ($1.i == Y_MFC1_D_POP) - { - r_co_type_inst (Y_MFC1_OP, 0, $3.i, $2.i); - r_co_type_inst (Y_MFC1_OP, 0, $3.i + 1, $2.i + 1); - } - else if ($1.i == Y_MTC1_D_POP) - { - r_co_type_inst (Y_MTC1_OP, 0, $3.i, $2.i); - r_co_type_inst (Y_MTC1_OP, 0, $3.i + 1, $2.i + 1); - } - else - r_co_type_inst ($1.i, 0, $3.i, $2.i); - } - - - | MOVE_COP_OPS_REV2 REG COP_REG - { - mips32_r2_inst (); - } - - - | CTL_COP_OPS REG COP_REG - { - r_co_type_inst ($1.i, 0, $3.i, $2.i); - } - - - | FP_UNARY_OPS F_DEST F_SRC2 - { - r_co_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_UNARY_OPS_REV2 F_DEST F_SRC2 - { - mips32_r2_inst (); - } - - - | FP_BINARY_OPS F_DEST F_SRC1 F_SRC2 - { - r_co_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | FP_BINARY_OPS_REV2 F_DEST F_SRC1 F_SRC2 - { - mips32_r2_inst (); - } - - - | FP_TERNARY_OPS_REV2 F_DEST F_SRC1 F_SRC2 FP_REGISTER - { - mips32_r2_inst (); - } - - - | FP_CMP_OPS F_SRC1 F_SRC2 - { - r_cond_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_CMP_OPS CC_REG F_SRC1 F_SRC2 - { - r_cond_type_inst ($1.i, $3.i, $4.i, $2.i); - } - - - | FP_CMP_OPS_REV2 F_SRC1 F_SRC2 - { - mips32_r2_inst (); - } - - - | Y_COP2_OP IMM32 - { - i_type_inst_free ($1.i, 0, 0, (imm_expr *)$2.p); - } - ; - - - -LOAD_OPS: Y_LB_OP - | Y_LBU_OP - | Y_LH_OP - | Y_LHU_OP - | Y_LL_OP - | Y_LW_OP - | Y_LWL_OP - | Y_LWR_OP - | Y_PFW_OP - | Y_LD_POP - ; - -LOADI_OPS: Y_LUI_OP - ; - -ULOADH_POPS: Y_ULH_POP - | Y_ULHU_POP - ; - -LOADC_OPS: Y_LDC2_OP - | Y_LWC2_OP - ; - -LOADFP_OPS: Y_LDC1_OP - | Y_LWC1_OP - | Y_L_D_POP { $$.i = Y_LDC1_OP; } - | Y_L_S_POP { $$.i = Y_LWC1_OP; } - ; - -LOADFP_INDEX_OPS: Y_LDXC1_OP - | Y_LUXC1_OP - | Y_LWXC1_OP - ; - -STORE_OPS: Y_SB_OP - | Y_SC_OP - | Y_SH_OP - | Y_SW_OP - | Y_SWL_OP - | Y_SWR_OP - | Y_SD_POP - ; - -STOREC_OPS: Y_SWC2_OP - | Y_SDC2_OP - | Y_S_D_POP { $$.i = Y_SDC1_OP; } - | Y_S_S_POP { $$.i = Y_SWC1_OP; } - ; - -STOREFP_OPS: Y_SWC1_OP - | Y_SDC1_OP - ; - -STOREFP_INDEX_OPS: Y_SDXC1_OP - | Y_SUXC1_OP - | Y_SWXC1_OP - ; - -SYS_OPS: Y_RFE_OP - { -#ifdef MIPS1 - yywarn ("RFE should only be used when SPIM is compiled as a MIPS-I processor"); -#endif - } - | Y_SYSCALL_OP - ; - -PREFETCH_OPS: Y_PREFX_OP - | Y_SYNCI_OP - ; - -CACHE_OPS: Y_CACHE_OP - | Y_PREF_OP - ; - -TLB_OPS: Y_TLBP_OP - | Y_TLBR_OP - | Y_TLBWI_OP - | Y_TLBWR_OP - ; - -NULLARY_OPS: Y_ERET_OP - { -#ifdef MIPS1 - yywarn ("ERET should only be used when SPIM is compiled as a MIPS32 processor"); -#endif - } - ; - -NULLARY_OPS_REV2: Y_DERET_OP - | Y_EHB_OP - | Y_SDBBP_OP - ; - -COUNT_LEADING_OPS: Y_CLO_OP - | Y_CLZ_OP - ; - -UNARY_OPS_REV2: Y_DI_OP - | Y_EI_OP - ; - -/* These binary operations have immediate analogues. */ - -BINARYI_OPS: Y_ADD_OP - | Y_ADDU_OP - | Y_AND_OP - | Y_XOR_OP - | Y_OR_OP - | Y_SLT_OP - | Y_SLTU_OP - ; - -BINARYIR_OPS: Y_SLLV_OP - | Y_SRAV_OP - | Y_SRLV_OP - ; - -BINARY_ARITHI_OPS: Y_ADDI_OP - | Y_ADDIU_OP - | Y_SLTI_OP - | Y_SLTIU_OP - ; - -BINARY_LOGICALI_OPS: Y_ANDI_OP - | Y_ORI_OP - | Y_XORI_OP - ; - -SHIFT_OPS: Y_SLL_OP - | Y_SRA_OP - | Y_SRL_OP - ; - -SHIFT_OPS_REV2: Y_ROTR_OP - ; - -SHIFTV_OPS_REV2: Y_ROTRV_OP - ; - - -/* These binary operations do not have immediate analogues. */ - -BINARY_OPS: Y_NOR_OP - ; - -BINARY_OPS_REV2: Y_RDHWR_OP - | Y_RDPGPR_OP - | Y_SEB_OP - | Y_SEH_OP - | Y_WRPGPR_OP - | Y_WSBH_OP - ; - -SUB_OPS: Y_SUB_OP - | Y_SUBU_OP - ; - -DIV_POPS: Y_DIV_OP - | Y_DIVU_OP - | Y_REM_POP - | Y_REMU_POP - ; - -MUL_POPS: Y_MULO_POP - | Y_MULOU_POP - ; - -SET_LE_POPS: Y_SLE_POP - | Y_SLEU_POP - ; - -SET_GT_POPS: Y_SGT_POP - | Y_SGTU_POP - ; - -SET_GE_POPS: Y_SGE_POP - | Y_SGEU_POP - ; - -SET_EQ_POPS: Y_SEQ_POP - | Y_SNE_POP - ; - -MULT_OPS: Y_MULT_OP - | Y_MULTU_OP - | Y_MADD_OP - | Y_MADDU_OP - | Y_MSUB_OP - | Y_MSUBU_OP - ; - -MULT_OPS3: Y_MUL_OP - ; - -BF_OPS_REV2: Y_EXT_OP - | Y_INS_OP - ; - -BR_COP_OPS: Y_BC1F_OP - | Y_BC1FL_OP - | Y_BC1T_OP - | Y_BC1TL_OP - | Y_BC2F_OP - | Y_BC2FL_OP - | Y_BC2T_OP - | Y_BC2TL_OP - ; - -UNARY_BR_OPS: Y_BGEZ_OP - | Y_BGEZL_OP - | Y_BGEZAL_OP - | Y_BGEZALL_OP - | Y_BGTZ_OP - | Y_BGTZL_OP - | Y_BLEZ_OP - | Y_BLEZL_OP - | Y_BLTZ_OP - | Y_BLTZL_OP - | Y_BLTZAL_OP - | Y_BLTZALL_OP - ; - -UNARY_BR_POPS: Y_BEQZ_POP - | Y_BNEZ_POP - ; - -BINARY_BR_OPS: Y_BEQ_OP - | Y_BEQL_OP - | Y_BNE_OP - | Y_BNEL_OP - ; - -BR_GT_POPS: Y_BGT_POP - | Y_BGTU_POP - -BR_GE_POPS: Y_BGE_POP - | Y_BGEU_POP - -BR_LT_POPS: Y_BLT_POP - | Y_BLTU_POP - -BR_LE_POPS: Y_BLE_POP - | Y_BLEU_POP - ; - -J_OPS: Y_J_OP - | Y_JR_OP - | Y_JR_HB_OP { yywarn ("Warning:IPS32 Rev 2 '.HB' extension is not implemented and is ignored"); } - | Y_JAL_OP - | Y_JALR_OP - | Y_JALR_HB_OP { yywarn ("Warning:IPS32 Rev 2 '.HB' extension is not implemented and is ignored"); } - ; - -B_OPS: Y_B_POP - | Y_BAL_POP - ; - - -BINARYI_TRAP_OPS: Y_TEQI_OP - | Y_TGEI_OP - | Y_TGEIU_OP - | Y_TLTI_OP - | Y_TLTIU_OP - | Y_TNEI_OP - ; - -BINARY_TRAP_OPS: Y_TEQ_OP - | Y_TGE_OP - | Y_TGEU_OP - | Y_TLT_OP - | Y_TLTU_OP - | Y_TNE_OP - ; - - -MOVE_FROM_HILO_OPS: Y_MFHI_OP - | Y_MFLO_OP - ; - -MOVE_TO_HILO_OPS: Y_MTHI_OP - | Y_MTLO_OP - ; - -MOVEC_OPS: Y_MOVN_OP - | Y_MOVZ_OP - ; - -MOVE_COP_OPS: Y_MFC0_OP - | Y_MFC1_OP - | Y_MFC1_D_POP - | Y_MFC2_OP - | Y_MTC0_OP - | Y_MTC1_OP - | Y_MTC1_D_POP - | Y_MTC2_OP - ; - -MOVE_COP_OPS_REV2: Y_MFHC1_OP - | Y_MFHC2_OP - | Y_MTHC1_OP - | Y_MTHC2_OP - ; - -CTL_COP_OPS: Y_CFC0_OP - | Y_CFC1_OP - | Y_CFC2_OP - | Y_CTC0_OP - | Y_CTC1_OP - | Y_CTC2_OP - ; - -/* Floating point operations */ - -FP_MOVE_OPS: Y_MOV_S_OP - | Y_MOV_D_OP - ; - -FP_MOVE_OPS_REV2: Y_MOV_PS_OP - ; - - -MOVECC_OPS: Y_MOVF_OP - | Y_MOVT_OP - ; - - -FP_MOVEC_OPS: Y_MOVN_D_OP - | Y_MOVN_S_OP - | Y_MOVZ_D_OP - | Y_MOVZ_S_OP - ; - -FP_MOVEC_OPS_REV2: Y_MOVN_PS_OP - | Y_MOVZ_PS_OP - ; - - -FP_MOVECC_OPS: Y_MOVF_D_OP - | Y_MOVF_S_OP - | Y_MOVT_D_OP - | Y_MOVT_S_OP - ; - -FP_MOVECC_OPS_REV2: Y_MOVF_PS_OP - | Y_MOVT_PS_OP - ; - -FP_UNARY_OPS: Y_ABS_S_OP - | Y_ABS_D_OP - | Y_CEIL_W_D_OP - | Y_CEIL_W_S_OP - | Y_CVT_D_S_OP - | Y_CVT_D_W_OP - | Y_CVT_S_D_OP - | Y_CVT_S_W_OP - | Y_CVT_W_D_OP - | Y_CVT_W_S_OP - | Y_FLOOR_W_D_OP - | Y_FLOOR_W_S_OP - | Y_NEG_S_OP - | Y_NEG_D_OP - | Y_ROUND_W_D_OP - | Y_ROUND_W_S_OP - | Y_SQRT_D_OP - | Y_SQRT_S_OP - | Y_TRUNC_W_D_OP - | Y_TRUNC_W_S_OP - ; - -FP_UNARY_OPS_REV2: Y_ABS_PS_OP - | Y_CEIL_L_D_OP - | Y_CEIL_L_S_OP - | Y_CVT_D_L_OP - | Y_CVT_L_D_OP - | Y_CVT_L_S_OP - | Y_CVT_PS_S_OP - | Y_CVT_S_L_OP - | Y_CVT_S_PL_OP - | Y_CVT_S_PU_OP - | Y_FLOOR_L_D_OP - | Y_FLOOR_L_S_OP - | Y_NEG_PS_OP - | Y_RECIP_D_OP - | Y_RECIP_S_OP - | Y_ROUND_L_D_OP - | Y_ROUND_L_S_OP - | Y_RSQRT_D_OP - | Y_RSQRT_S_OP - | Y_TRUNC_L_D_OP - | Y_TRUNC_L_S_OP - ; - -FP_BINARY_OPS: Y_ADD_S_OP - | Y_ADD_D_OP - | Y_DIV_S_OP - | Y_DIV_D_OP - | Y_MUL_S_OP - | Y_MUL_D_OP - | Y_SUB_S_OP - | Y_SUB_D_OP - ; - -FP_BINARY_OPS_REV2: Y_ADD_PS_OP - | Y_MUL_PS_OP - | Y_PLL_PS_OP - | Y_PLU_PS_OP - | Y_PUL_PS_OP - | Y_PUU_PS_OP - ; - -FP_TERNARY_OPS_REV2: Y_ALNV_PS_OP - | Y_MADD_D_OP - | Y_MADD_PS_OP - | Y_MADD_S_OP - | Y_MSUB_D_OP - | Y_MSUB_PS_OP - | Y_MSUB_S_OP - | Y_NMADD_D_OP - | Y_NMADD_PS_OP - | Y_NMADD_S_OP - | Y_NMSUB_D_OP - | Y_NMSUB_PS_OP - | Y_NMSUB_S_OP - ; - -FP_CMP_OPS: Y_C_F_S_OP - | Y_C_UN_S_OP - | Y_C_EQ_S_OP - | Y_C_UEQ_S_OP - | Y_C_OLT_S_OP - | Y_C_OLE_S_OP - | Y_C_ULT_S_OP - | Y_C_ULE_S_OP - | Y_C_SF_S_OP - | Y_C_NGLE_S_OP - | Y_C_SEQ_S_OP - | Y_C_NGL_S_OP - | Y_C_LT_S_OP - | Y_C_NGE_S_OP - | Y_C_LE_S_OP - | Y_C_NGT_S_OP - | Y_C_F_D_OP - | Y_C_UN_D_OP - | Y_C_EQ_D_OP - | Y_C_UEQ_D_OP - | Y_C_OLT_D_OP - | Y_C_OLE_D_OP - | Y_C_ULT_D_OP - | Y_C_ULE_D_OP - | Y_C_SF_D_OP - | Y_C_NGLE_D_OP - | Y_C_SEQ_D_OP - | Y_C_NGL_D_OP - | Y_C_LT_D_OP - | Y_C_NGE_D_OP - | Y_C_LE_D_OP - | Y_C_NGT_D_OP - ; - -FP_CMP_OPS_REV2: Y_C_EQ_PS_OP - | Y_C_F_PS_OP - | Y_C_LT_PS_OP - | Y_C_LE_PS_OP - | Y_C_NGE_PS_OP - | Y_C_NGL_PS_OP - | Y_C_NGLE_PS_OP - | Y_C_NGT_PS_OP - | Y_C_OLE_PS_OP - | Y_C_OLT_PS_OP - | Y_C_SEQ_PS_OP - | Y_C_SF_PS_OP - | Y_C_UEQ_PS_OP - | Y_C_ULE_PS_OP - | Y_C_ULT_PS_OP - | Y_C_UN_PS_OP - ; - - - -ASM_DIRECTIVE: Y_ALIAS_DIR Y_REG Y_REG - - | Y_ALIGN_DIR EXPR - { - align_data ($2.i); - } - - | Y_ASCII_DIR {null_term = false;} STR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - | Y_ASCIIZ_DIR {null_term = true;} STR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_ASM0_DIR - - | Y_BGNB_DIR Y_INT - - - | Y_BYTE_DIR - {store_op = (void(*)(void*))store_byte;} - EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_COMM_DIR ID EXPR - { - align_data (2); - if (lookup_label ((char*)$2.p)->addr == 0) - { - (void)record_label ((char*)$2.p, current_data_pc (), 1); - free ((char*)$2.p); - } - increment_data_pc ($3.i); - } - - - | Y_DATA_DIR - {user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_DATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_K_DATA_DIR - { - user_kernel_data_segment (true); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_K_DATA_DIR Y_INT - { - user_kernel_data_segment (true); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_DOUBLE_DIR - { - store_op = (void(*)(void*))store_double; - if (data_dir) set_data_alignment (3); - } - FP_EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_END_DIR OPTIONAL_ID - - | Y_ENDB_DIR Y_INT - - | Y_ENDR_DIR - - | Y_ENT_DIR ID - - | Y_ENT_DIR ID Y_INT - - - | Y_EXTERN_DIR ID EXPR - { - extern_directive ((char*)$2.p, $3.i); - } - - - | Y_ERR_DIR - { - fatal_error ("File contains an .err directive\n"); - } - - - | Y_FILE_DIR Y_INT Y_STR - - - | Y_FLOAT_DIR - { - store_op = (void(*)(void*))store_float; - if (data_dir) set_data_alignment (2); - } - FP_EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_FMASK_DIR Y_INT Y_INT - - | Y_FRAME_DIR REGISTER Y_INT REGISTER - - - | Y_GLOBAL_DIR ID - { - (void)make_label_global ((char*)$2.p); - free ((char*)$2.p); - } - - - | Y_HALF_DIR - { - store_op = (void(*)(void*))store_half; - if (data_dir) set_data_alignment (1); - } - EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_LABEL_DIR ID - { - (void)record_label ((char*)$2.p, - text_dir ? current_text_pc () : current_data_pc (), - 1); - free ((char*)$2.p); - } - - - | Y_LCOMM_DIR ID EXPR - { - lcomm_directive ((char*)$2.p, $3.i); - } - - - /* Produced by cc 2.10 */ - | Y_LIVEREG_DIR Y_INT Y_INT - - - | Y_LOC_DIR Y_INT Y_INT - - | Y_MASK_DIR Y_INT Y_INT - - | Y_NOALIAS_DIR Y_REG Y_REG - - | Y_OPTIONS_DIR ID - - | Y_REPEAT_DIR EXPR - { - yyerror ("Warning: repeat directive ignored"); - } - - - | Y_RDATA_DIR - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_RDATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_SDATA_DIR - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_SDATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_SET_DIR ID - { - if (streq ((char*)$2.p, "noat")) - noat_flag = true; - else if (streq ((char*)$2.p, "at")) - noat_flag = false; - } - - - | Y_SPACE_DIR EXPR - { - if (data_dir) - increment_data_pc ($2.i); - else if (text_dir) - increment_text_pc ($2.i); - } - - - | Y_STRUCT_DIR EXPR - { - yyerror ("Warning: struct directive ignored"); - } - - - | Y_TEXT_DIR - { - user_kernel_text_segment (false); - data_dir = false; text_dir = true; - enable_data_alignment (); - } - - | Y_TEXT_DIR Y_INT - { - user_kernel_text_segment (false); - data_dir = false; text_dir = true; - enable_data_alignment (); - set_text_pc ($2.i); - } - - - | Y_K_TEXT_DIR - { - user_kernel_text_segment (true); - data_dir = false; text_dir = true; - enable_data_alignment (); - } - - | Y_K_TEXT_DIR Y_INT - { - user_kernel_text_segment (true); - data_dir = false; text_dir = true; - enable_data_alignment (); - set_text_pc ($2.i); - } - - - | Y_VERSTAMP_DIR Y_INT Y_INT - - | Y_VREG_DIR REGISTER Y_INT Y_INT - - - | Y_WORD_DIR - { - store_op = (void(*)(void*))store_word_data; - if (data_dir) set_data_alignment (2); - } - EXPR_LST - - ; - - - -ADDRESS: {only_id = 1;} ADDR {only_id = 0; $$ = $2;} - -ADDR: '(' REGISTER ')' - { - $$.p = make_addr_expr (0, NULL, $2.i); - } - - | ABS_ADDR - { - $$.p = make_addr_expr ($1.i, NULL, 0); - } - - | ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr ($1.i, NULL, $3.i); - } - - | Y_ID - { - $$.p = make_addr_expr (0, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | Y_ID '(' REGISTER ')' - { - $$.p = make_addr_expr (0, (char*)$1.p, $3.i); - free ((char*)$1.p); - } - - | Y_ID '+' ABS_ADDR - { - $$.p = make_addr_expr ($3.i, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | ABS_ADDR '+' ID - { - $$.p = make_addr_expr ($1.i, (char*)$3.p, 0); - } - - | Y_ID '-' ABS_ADDR - { - $$.p = make_addr_expr (- $3.i, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | Y_ID '+' ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr ($3.i, (char*)$1.p, $5.i); - free ((char*)$1.p); - } - - | Y_ID '-' ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr (- $3.i, (char*)$1.p, $5.i); - free ((char*)$1.p); - } - ; - - -BR_IMM32: {only_id = 1;} IMM32 {only_id = 0; $$ = $2;} - -IMM16: IMM32 - { - check_imm_range ((imm_expr*)$1.p, IMM_MIN, IMM_MAX); - $$ = $1; - } - -UIMM16: IMM32 - { - check_uimm_range ((imm_expr*)$1.p, UIMM_MIN, UIMM_MAX); - $$ = $1; - } - - -IMM32: ABS_ADDR - { - $$.p = make_imm_expr ($1.i, NULL, false); - } - - | '(' ABS_ADDR ')' '>' '>' Y_INT - { - $$.p = make_imm_expr ($2.i >> $6.i, NULL, false); - } - - | ID - { - $$.p = make_imm_expr (0, (char*)$1.p, false); - } - - | Y_ID '+' ABS_ADDR - { - $$.p = make_imm_expr ($3.i, (char*)$1.p, false); - free ((char*)$1.p); - } - - | Y_ID '-' ABS_ADDR - { - $$.p = make_imm_expr (- $3.i, (char*)$1.p, false); - free ((char*)$1.p); - } - ; - - -ABS_ADDR: Y_INT - - | Y_INT '+' Y_INT - {$$.i = $1.i + $3.i;} - - | Y_INT Y_INT - { - /* This is actually: Y_INT '-' Y_INT, since the binary - subtract operator gets scanned as a unary negation - operator. */ - if ($2.i >= 0) yyerror ("Syntax error"); - $$.i = $1.i - -$2.i; - } - ; - -SRC1: REGISTER ; - -SRC2: REGISTER ; - -DEST: REGISTER ; - -REG: REGISTER ; - -REGISTER: Y_REG - { - if ($1.i < 0 || $1.i > 31) - yyerror ("Register number out of range"); - if ($1.i == 1 && !bare_machine && !noat_flag) - yyerror ("Register 1 is reserved for assembler"); - $$ = $1; - } - -F_DEST: FP_REGISTER ; - -F_SRC1: FP_REGISTER ; - -F_SRC2: FP_REGISTER ; - -FP_REGISTER: Y_FP_REG - { - if ($1.i < 0 || $1.i > 31) - yyerror ("FP register number out of range"); - $$ = $1; - } - - -CC_REG: Y_INT - { - if ($1.i < 0 || $1.i > 7) - yyerror ("CC register number out of range"); - $$ = $1; - } - - -COP_REG: Y_REG - - | Y_FP_REG - - ; - - -LABEL: ID - { - $$.p = make_imm_expr (-(int)current_text_pc (), (char*)$1.p, true); - } - - -STR_LST: STR_LST STR - | STR - ; - - -STR: Y_STR - { - store_string ((char*)$1.p, strlen((char*)$1.p), null_term); - free ((char*)$1.p); - } - | Y_STR ':' Y_INT - { - int i; - - for (i = 0; i < $3.i; i ++) - store_string ((char*)$1.p, strlen((char*)$1.p), null_term); - free ((char*)$1.p); - } - ; - - -EXPRESSION: {only_id = 1;} EXPR {only_id = 0; $$ = $2;} - -EXPR: - TRM - | - EXPR '+' TRM - { $$.i = $1.i + $3.i; } - | - EXPR '-' TRM - { $$.i = $1.i - $3.i; } - ; - -TRM: - FACTOR - | - TRM '*' FACTOR - { $$.i = $1.i * $3.i; } - | - TRM '/' FACTOR - { $$.i = $1.i / $3.i; } - ; - -FACTOR: Y_INT - - | '(' EXPR ')' - { $$.i = $2.i; } - - | ID - { - label *l = lookup_label ((char*)$1.p); - if (l->addr == 0) - { - record_data_uses_symbol (current_data_pc (), l); - $$.p = NULL; - } - else - $$.i = l->addr; - } - - -EXPR_LST: EXPR_LST EXPRESSION - { - store_op ($2.p); - } - | EXPRESSION - { - store_op ($1.p); - } - | EXPRESSION ':' EXPR - { - int i; - - for (i = 0; i < $3.i; i ++) - store_op ($1.p); - } - ; - - -FP_EXPR_LST: FP_EXPR_LST Y_FP - { - store_op ($2.p); - } - | Y_FP - { - store_op ($1.p); - } - ; - - -OPTIONAL_ID: {only_id = 1;} OPT_ID {only_id = 0; $$ = $2;} - -OPT_ID: ID - | {$$.p = (void*)NULL;} - ; - - -ID: {only_id = 1;} Y_ID {only_id = 0; $$ = $2;} - - -%% - -/* Maintain and update the address of labels for the current line. */ - -void -fix_current_label_address (mem_addr new_addr) -{ - label_list *l; - - for (l = this_line_labels; l != NULL; l = l->tail) - { - l->head->addr = new_addr; - } - clear_labels (); -} - - -static label_list * -cons_label (label *head, label_list *tail) -{ - label_list *c = (label_list *) malloc (sizeof (label_list)); - - c->head = head; - c->tail = tail; - return (c); -} - - -static void -clear_labels () -{ - label_list *n; - - for ( ; this_line_labels != NULL; this_line_labels = n) - { - resolve_label_uses (this_line_labels->head); - n = this_line_labels->tail; - free (this_line_labels); - } - this_line_labels = NULL; -} - - -/* Operations on op codes. */ - -int -op_to_imm_op (int opcode) -{ - switch (opcode) - { - case Y_ADD_OP: return (Y_ADDI_OP); - case Y_ADDU_OP: return (Y_ADDIU_OP); - case Y_AND_OP: return (Y_ANDI_OP); - case Y_OR_OP: return (Y_ORI_OP); - case Y_XOR_OP: return (Y_XORI_OP); - case Y_SLT_OP: return (Y_SLTI_OP); - case Y_SLTU_OP: return (Y_SLTIU_OP); - case Y_SLLV_OP: return (Y_SLL_OP); - case Y_SRAV_OP: return (Y_SRA_OP); - case Y_SRLV_OP: return (Y_SRL_OP); - default: fatal_error ("Can't convert op to immediate op\n"); return (0); - } -} - - -int -imm_op_to_op (int opcode) -{ - switch (opcode) - { - case Y_ADDI_OP: return (Y_ADD_OP); - case Y_ADDIU_OP: return (Y_ADDU_OP); - case Y_ANDI_OP: return (Y_AND_OP); - case Y_ORI_OP: return (Y_OR_OP); - case Y_XORI_OP: return (Y_XOR_OP); - case Y_SLTI_OP: return (Y_SLT_OP); - case Y_SLTIU_OP: return (Y_SLTU_OP); - case Y_J_OP: return (Y_JR_OP); - case Y_LUI_OP: return (Y_ADDU_OP); - case Y_SLL_OP: return (Y_SLLV_OP); - case Y_SRA_OP: return (Y_SRAV_OP); - case Y_SRL_OP: return (Y_SRLV_OP); - default: fatal_error ("Can't convert immediate op to op\n"); return (0); - } -} - - -static void -nop_inst () -{ - r_type_inst (Y_SLL_OP, 0, 0, 0); /* = 0 */ -} - - -static void -trap_inst () -{ - r_type_inst (Y_BREAK_OP, 0, 0, 0); -} - - -static imm_expr * -branch_offset (int n_inst) -{ - return (const_imm_expr (n_inst << 2)); /* Later shifted right 2 places */ -} - - -static void -div_inst (int op, int rd, int rs, int rt, int const_divisor) -{ - if (rd != 0 && !const_divisor) - { - i_type_inst_free (Y_BNE_OP, 0, rt, branch_offset (2)); - trap_inst (); - } - - if (op == Y_DIV_OP || op == Y_REM_POP) - r_type_inst (Y_DIV_OP, 0, rs, rt); - else - r_type_inst (Y_DIVU_OP, 0, rs, rt); - - if (rd != 0) - { - if (op == Y_DIV_OP || op == Y_DIVU_OP) - /* Quotient */ - r_type_inst (Y_MFLO_OP, rd, 0, 0); - else - /* Remainder */ - r_type_inst (Y_MFHI_OP, rd, 0, 0); - } -} - - -static void -mult_inst (int op, int rd, int rs, int rt) -{ - if (op == Y_MULOU_POP) - r_type_inst (Y_MULTU_OP, 0, rs, rt); - else - r_type_inst (Y_MULT_OP, 0, rs, rt); - if (op == Y_MULOU_POP && rd != 0) - { - r_type_inst (Y_MFHI_OP, 1, 0, 0); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, branch_offset (2)); - trap_inst (); - } - else if (op == Y_MULO_POP && rd != 0) - { - r_type_inst (Y_MFHI_OP, 1, 0, 0); /* use $at */ - r_type_inst (Y_MFLO_OP, rd, 0, 0); - r_sh_type_inst (Y_SRA_OP, rd, rd, 31); - i_type_inst_free (Y_BEQ_OP, rd, 1, branch_offset (2)); - trap_inst (); - } - if (rd != 0) - r_type_inst (Y_MFLO_OP, rd, 0, 0); -} - - -static void -set_le_inst (int op, int rd, int rs, int rt) -{ - i_type_inst_free (Y_BNE_OP, rs, rt, branch_offset (3)); - i_type_inst_free (Y_ORI_OP, rd, 0, const_imm_expr (1)); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (2)); - r_type_inst ((op == Y_SLE_POP ? Y_SLT_OP : Y_SLTU_OP), rd, rs, rt); -} - - -static void -set_gt_inst (int op, int rd, int rs, int rt) -{ - r_type_inst (op == Y_SGT_POP ? Y_SLT_OP : Y_SLTU_OP, rd, rt, rs); -} - - -static void -set_ge_inst (int op, int rd, int rs, int rt) -{ - i_type_inst_free (Y_BNE_OP, rs, rt, branch_offset (3)); - i_type_inst_free (Y_ORI_OP, rd, 0, const_imm_expr (1)); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (2)); - r_type_inst (op == Y_SGE_POP ? Y_SLT_OP : Y_SLTU_OP, rd, rt, rs); -} - - -static void -set_eq_inst (int op, int rd, int rs, int rt) -{ - imm_expr *if_eq, *if_neq; - - if (op == Y_SEQ_POP) - if_eq = const_imm_expr (1), if_neq = const_imm_expr (0); - else - if_eq = const_imm_expr (0), if_neq = const_imm_expr (1); - - i_type_inst_free (Y_BEQ_OP, rs, rt, branch_offset (3)); - /* RD <- 0 (if not equal) */ - i_type_inst_free (Y_ORI_OP, rd, 0, if_neq); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (2)); /* Branch always */ - /* RD <- 1 */ - i_type_inst_free (Y_ORI_OP, rd, 0, if_eq); -} - - -/* Store the value either as a datum or instruction. */ - -static void -store_word_data (int value) -{ - if (data_dir) - store_word (value); - else if (text_dir) - store_instruction (inst_decode (value)); -} - - - -void -initialize_parser (char *file_name) -{ - input_file_name = file_name; - only_id = 0; - data_dir = false; - text_dir = true; -} - - -static void -check_imm_range (imm_expr* expr, int32 min, int32 max) -{ - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* If expression can be evaluated, compare its value against the limits - and complain if the value is out of bounds. */ - int32 value = eval_imm_expr (expr); - - if (value < min || max < value) - { - char str[200]; - sprintf (str, "immediate value (%d) out of range (%d .. %d)", - value, min, max); - yywarn (str); - } - } -} - - -static void -check_uimm_range (imm_expr* expr, uint32 min, uint32 max) -{ - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* If expression can be evaluated, compare its value against the limits - and complain if the value is out of bounds. */ - uint32 value = (uint32)eval_imm_expr (expr); - - if (value < min || max < value) - { - char str[200]; - sprintf (str, "immediate value (%d) out of range (%d .. %d)", - (int32)value, (int32)min, (int32)max); - yywarn (str); - } - } -} - -void -yyerror (char *s) -{ - parse_error_occurred = true; - clear_labels (); - yywarn (s); -} - - -void -yywarn (char *s) -{ - error ("spim: (parser) %s on line %d of file %s\n%s", s, line_no, input_file_name, erroneous_line ()); -} - - -static void -mips32_r2_inst () -{ - yyerror ("Warning: MIPS32 Rev 2 instruction is not implemented. Instruction ignored."); -} - - -static int -cc_to_rt (int cc, int nd, int tf) -{ - return (cc << 2) | (nd << 1) | tf; -} diff --git a/spim-jsspim/CPU/reg.h b/spim-jsspim/CPU/reg.h deleted file mode 100755 index 6015c43..0000000 --- a/spim-jsspim/CPU/reg.h +++ /dev/null @@ -1,245 +0,0 @@ -/* SPIM S20 MIPS simulator. - Declarations of registers and code for accessing them. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -typedef int32 /*@alt unsigned int @*/ reg_word; -typedef uint32 u_reg_word; - - -/* General purpose registers: */ - -#define R_LENGTH 32 - -extern reg_word R[R_LENGTH]; - -extern reg_word HI, LO; - -extern mem_addr PC, nPC; - - -/* Argument passing registers */ - -#define REG_V0 2 -#define REG_A0 4 -#define REG_A1 5 -#define REG_A2 6 -#define REG_A3 7 -#define REG_FA0 12 -#define REG_SP 29 - - -/* Result registers */ - -#define REG_RES 2 -#define REG_FRES 0 - - -/* $gp registers */ - -#define REG_GP 28 - -extern char *int_reg_names[]; - - - -/* Coprocessor registers: */ - -extern reg_word CCR[4][32], CPR[4][32]; - - - -/* Exeception handling registers (Coprocessor 0): */ - -/* BadVAddr register: */ -#define CP0_BadVAddr_Reg 8 -#define CP0_BadVAddr (CPR[0][CP0_BadVAddr_Reg]) - -/* Count register: */ -#define CP0_Count_Reg 9 -#define CP0_Count (CPR[0][CP0_Count_Reg]) /* ToDo */ - -/* Compare register: */ -#define CP0_Compare_Reg 11 -#define CP0_Compare (CPR[0][CP0_Compare_Reg]) /* ToDo */ - -/* Status register: */ -#define CP0_Status_Reg 12 -#define CP0_Status (CPR[0][CP0_Status_Reg]) -/* Implemented fields: */ -#define CP0_Status_CU 0xf0000000 -#define CP0_Status_IM 0x0000ff00 -#define CP0_Status_IM7 0x00008000 /* HW Int 5 */ -#define CP0_Status_IM6 0x00004000 /* HW Int 4 */ -#define CP0_Status_IM5 0x00002000 /* HW Int 3 */ -#define CP0_Status_IM4 0x00001000 /* HW Int 2 */ -#define CP0_Status_IM3 0x00000800 /* HW Int 1 */ -#define CP0_Status_IM2 0x00000400 /* HW Int 0 */ -#define CP0_Status_IM1 0x00000200 /* SW Int 1 */ -#define CP0_Status_IM0 0x00000100 /* SW Int 0 */ -#define CP0_Status_UM 0x00000010 -#define CP0_Status_EXL 0x00000002 -#define CP0_Status_IE 0x00000001 -#define CP0_Status_Mask (CP0_Status_CU \ - | CP0_Status_UM \ - | CP0_Status_IM \ - | CP0_Status_EXL \ - | CP0_Status_IE) - -/* Cause register: */ -#define CP0_Cause_Reg 13 -#define CP0_Cause (CPR[0][CP0_Cause_Reg]) -/* Implemented fields: */ -#define CP0_Cause_BD 0x80000000 -#define CP0_Cause_IP 0x0000ff00 -#define CP0_Cause_IP7 0x00008000 /* HW Int 5 */ -#define CP0_Cause_IP6 0x00004000 /* HW Int 4 */ -#define CP0_Cause_IP5 0x00002000 /* HW Int 3 */ -#define CP0_Cause_IP4 0x00001000 /* HW Int 2 */ -#define CP0_Cause_IP3 0x00000800 /* HW Int 1 */ -#define CP0_Cause_IP2 0x00000400 /* HW Int 0 */ -#define CP0_Cause_IP1 0x00000200 /* SW Int 1 */ -#define CP0_Cause_IP0 0x00000100 /* SW Int 0 */ -#define CP0_Cause_ExcCode 0x0000007c -#define CP0_Cause_Mask (CP0_Cause_BD \ - | CP0_Cause_IP \ - | CP0_Cause_IP7 \ - | CP0_Cause_IP6 \ - | CP0_Cause_IP5 \ - | CP0_Cause_IP4 \ - | CP0_Cause_IP3 \ - | CP0_Cause_IP2 \ - | CP0_Cause_ExcCode) -#define CP0_ExCode ((CP0_Cause & CP0_Cause_ExcCode) >> 2) - -/* EPC register: */ -#define CP0_EPC_Reg 14 -#define CP0_EPC (CPR[0][CP0_EPC_Reg]) - -/* Config register: */ -#define CP0_Config_Reg 16 -#define CP0_Config (CPR[0][CP0_Config_Reg]) -/* Implemented fields: */ -#define CP0_Config_BE 0x000080000 -#define CP0_Config_AT 0x000060000 -#define CP0_Config_AR 0x00001c000 -#define CP0_Config_MT 0x000000380 -#define CP0_Config_Mask (CP0_Config_BE \ - | CP0_Config_AT \ - | CP0_Config_AR \ - | CP0_Config_MT) - - - -/* Floating Point Coprocessor (1) registers. - - This is the MIPS32, Revision 1 FPU register set. It contains 32, 32-bit - registers (either 32 single or 16 double precision), as in the R2010. - The MIPS32, Revision 2 or MIPS64 register set has 32 of each type of - register. */ - -#define FGR_LENGTH 32 -#define FPR_LENGTH 16 - -extern double *FPR; /* Dynamically allocate so overlay */ -extern float *FGR; /* is possible */ -extern int *FWR; /* is possible */ - - -#define FPR_S(REGNO) (FGR[REGNO]) - -#define FPR_D(REGNO) (((REGNO) & 0x1) \ - ? (run_error ("Odd FP double register number\n") , 0.0) \ - : FPR[(REGNO) / 2]) - -#define FPR_W(REGNO) (FWR[REGNO]) - - -#define SET_FPR_S(REGNO, VALUE) {FGR[REGNO] = (float) (VALUE);} - -#define SET_FPR_D(REGNO, VALUE) {if ((REGNO) & 0x1) \ - run_error ("Odd FP double register number\n"); \ - else FPR[(REGNO) / 2] = (double) (VALUE);} - -#define SET_FPR_W(REGNO, VALUE) {FWR[REGNO] = (int32) (VALUE);} - - -/* Floating point control registers: */ - -#define FCR (CPR[1]) - - -#define FIR_REG 0 -#define FIR (FCR[FIR_REG]) -/* Implemented fields: */ -#define FIR_W 0x0008000 -#define FIR_D 0x0001000 -#define FIR_S 0x0000800 -#define FIR_MASK (FIR_W | FIR_D | FIR_S) - -#define FCCR_REG 25 -#define FCCR (FCR[FCCR_REG]) -/* Implemented fields: */ -#define FCCR_FCC 0x000000ff -#define FCCR_MASK (FCCR_FCC) - -#define FEXR_REG 26 -#define FEXR (FCR[FEXR_REG]) -/* No implemented fields */ - -#define FENR_REG 28 -#define FENR (FCR[FENR_REG]) -/* No implemented fields */ - -#define FCSR_REG 31 -#define FCSR (FCR[FCSR_REG]) -/* Implemented fields: */ -#define FCSR_FCC 0xfe800000 -#define FCSR_MASK (FCSR_FCC) -/* Floating point Cause (not implemented): */ -#define FCSR_Cause_E 0x00020000 -#define FCSR_Cause_V 0x00010000 -#define FCSR_Cause_Z 0x00008000 -#define FCSR_Cause_O 0x00004000 -#define FCSR_Cause_U 0x00002000 -#define FCSR_Cause_I 0x00001000 -/* Floating point Enables (not implemented): */ -#define FCSR_Enable_V 0x00000800 -#define FCSR_Enable_Z 0x00000400 -#define FCSR_Enable_O 0x00000200 -#define FCSR_Enable_U 0x00000100 -#define FCSR_Enable_I 0x00000080 -/* Floating point Flags (not implemented): */ -#define FCSR_Flag_V 0x00000040 -#define FCSR_Flag_Z 0x00000020 -#define FCSR_Flag_O 0x00000010 -#define FCSR_Flag_U 0x00000008 -#define FCSR_Flag_I 0x00000004 diff --git a/spim-jsspim/CPU/run.cpp b/spim-jsspim/CPU/run.cpp deleted file mode 100755 index a3127fe..0000000 --- a/spim-jsspim/CPU/run.cpp +++ /dev/null @@ -1,1872 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM instructions. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifdef mips -#define _IEEE 1 -#include -#else -#define NaN(X) ((X) != (X)) -#endif - -#include -#include - -#ifdef _WIN32 -#define VC_EXTRALEAN -#include -#else -#include -#include -#include -#include -#endif - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser_yacc.h" -#include "syscall.h" -#include "run.h" - -bool force_break = false; /* For the execution env. to force an execution break */ - -#ifdef _MSC_BUILD -/* Disable MS VS warning about constant predicate in conditional. */ -#pragma warning(disable: 4127) -#endif - - -/* Local functions: */ - -static void bump_CP0_timer (); -static void set_fpu_cc (int cond, int cc, int less, int equal, int unordered); -static void signed_multiply (reg_word v1, reg_word v2); -static void start_CP0_timer (); -#ifdef _WIN32 -void CALLBACK timer_completion_routine(LPVOID lpArgToCompletionRoutine, - DWORD dwTimerLowValue, DWORD dwTimerHighValue); -#endif -static void unsigned_multiply (reg_word v1, reg_word v2); - - -#define SIGN_BIT(X) ((X) & 0x80000000) - -#define ARITH_OVFL(RESULT, OP1, OP2) (SIGN_BIT (OP1) == SIGN_BIT (OP2) \ - && SIGN_BIT (OP1) != SIGN_BIT (RESULT)) - - - -/* True when delayed_branches is true and instruction is executing in delay -slot of another instruction. */ -static int running_in_delay_slot = 0; - - -/* Executed delayed branch and jump instructions by running the - instruction from the delay slot before transfering control. Note, - in branches that don't jump, the instruction in the delay slot is - executed by falling through normally. - - We take advantage of the MIPS architecture, which leaves undefined - the result of executing a delayed instruction in a delay slot. Here - we execute the second branch. */ - -#define BRANCH_INST(TEST, TARGET, NULLIFY) \ - { \ - if (TEST) \ - { \ - mem_addr target = (TARGET); \ - if (delayed_branches) \ - { \ - /* +4 since jump in delay slot */ \ - target += BYTES_PER_WORD; \ - } \ - JUMP_INST(target) \ - } \ - else if (NULLIFY) \ - { \ - /* If test fails and nullify bit set, skip\ - instruction in delay slot. */ \ - PC += BYTES_PER_WORD; \ - } \ - } - - -#define JUMP_INST(TARGET) \ - { \ - if (delayed_branches) \ - { \ - running_in_delay_slot = 1; \ - run_spim (PC + BYTES_PER_WORD, 1, display);\ - running_in_delay_slot = 0; \ - } \ - /* -4 since PC is bumped after this inst */ \ - PC = (TARGET) - BYTES_PER_WORD; \ - } - - -/* If the delayed_load flag is false, the result from a load is available - immediate. If the delayed_load flag is true, the result from a load is - not available until the subsequent instruction has executed (as in the - real machine). We need a two element shift register for the value and its - destination, as the instruction following the load can itself be a load - instruction. */ - -#define LOAD_INST(DEST_A, LD, MASK) \ - { \ - LOAD_INST_BASE (DEST_A, (LD & (MASK))) \ - } - - -#define LOAD_INST_BASE(DEST_A, VALUE) \ - { \ - if (delayed_loads) \ - { \ - delayed_load_addr1 = (DEST_A); \ - delayed_load_value1 = (VALUE); \ - } \ - else \ - { \ - *(DEST_A) = (VALUE); \ - } \ - } - - -#define DO_DELAYED_UPDATE() \ - if (delayed_loads) \ - { \ - /* Check for delayed updates */ \ - if (delayed_load_addr2 != NULL) \ - { \ - *delayed_load_addr2 = delayed_load_value2; \ - } \ - delayed_load_addr2 = delayed_load_addr1; \ - delayed_load_value2 = delayed_load_value1; \ - delayed_load_addr1 = NULL; \ - } - - - -/* Run the program stored in memory, starting at address PC for - STEPS_TO_RUN instruction executions. If flag DISPLAY is true, print - each instruction before it executes. Return true if program's - execution can continue. */ - -bool -run_spim (mem_addr initial_PC, int steps_to_run, bool display) -{ - instruction *inst; - static reg_word *delayed_load_addr1 = NULL, delayed_load_value1; - static reg_word *delayed_load_addr2 = NULL, delayed_load_value2; - int step, step_size, next_step; - - PC = initial_PC; - if (!bare_machine && mapped_io) - next_step = IO_INTERVAL; - else - next_step = steps_to_run; /* Run to completion */ - - /* Start a timer running */ - start_CP0_timer(); - - for (step_size = MIN (next_step, steps_to_run); - steps_to_run > 0; - steps_to_run -= step_size, step_size = MIN (next_step, steps_to_run)) - { - if (!bare_machine && mapped_io) - /* Every IO_INTERVAL steps, check if memory-mapped IO registers - have changed. */ - check_memory_mapped_IO (); - /* else run inner loop for all steps */ - - if ((CP0_Status & CP0_Status_IE) - && !(CP0_Status & CP0_Status_EXL) - && ((CP0_Cause & CP0_Cause_IP) & (CP0_Status & CP0_Status_IM))) - { - /* There is an interrupt to process if IE bit set, EXL bit not - set, and non-masked IP bit set */ - raise_exception (ExcCode_Int); - /* Handle interrupt now, before instruction executes, so that - EPC points to unexecuted instructions, which is the one to - return to. */ - handle_exception (); - } - - force_break = false; - for (step = 0; step < step_size; step += 1) - { - if (force_break) - { - return true; - } - - R[0] = 0; /* Maintain invariant value */ - -#ifdef _WIN32 - SleepEx(0, TRUE); /* Put thread in awaitable state for WaitableTimer */ -#else - { - /* Poll for timer expiration */ - struct itimerval time; - if (-1 == getitimer (ITIMER_REAL, &time)) - { - perror ("getitmer failed"); - } - if (time.it_value.tv_usec == 0 && time.it_value.tv_sec == 0) - { - /* Timer expired */ - bump_CP0_timer (); - - /* Restart timer for next interval */ - start_CP0_timer (); - } - } -#endif - - exception_occurred = 0; - inst = read_mem_inst (PC); - if (exception_occurred) /* In reading instruction */ - { - exception_occurred = 0; - handle_exception (); - continue; - } - else if (inst == NULL) - { - run_error ("Attempt to execute non-instruction at 0x%08x\n", PC); - return false; - } - else if (EXPR (inst) != NULL - && EXPR (inst)->symbol != NULL - && EXPR (inst)->symbol->addr == 0) - { - run_error ("Instruction references undefined symbol at 0x%08x\n %s", PC, inst_to_string(PC)); - return false; - } - - if (display) - print_inst (PC); - -#ifdef TEST_ASM - test_assembly (inst); -#endif - - DO_DELAYED_UPDATE (); - - switch (OPCODE (inst)) - { - case Y_ADD_OP: - { - reg_word vs = R[RS (inst)], vt = R[RT (inst)]; - reg_word sum = vs + vt; - - if (ARITH_OVFL (sum, vs, vt)) - RAISE_EXCEPTION (ExcCode_Ov, break); - R[RD (inst)] = sum; - break; - } - - case Y_ADDI_OP: - { - reg_word vs = R[RS (inst)], imm = (short) IMM (inst); - reg_word sum = vs + imm; - - if (ARITH_OVFL (sum, vs, imm)) - RAISE_EXCEPTION (ExcCode_Ov, break); - R[RT (inst)] = sum; - break; - } - - case Y_ADDIU_OP: - R[RT (inst)] = R[RS (inst)] + (short) IMM (inst); - break; - - case Y_ADDU_OP: - R[RD (inst)] = R[RS (inst)] + R[RT (inst)]; - break; - - case Y_AND_OP: - R[RD (inst)] = R[RS (inst)] & R[RT (inst)]; - break; - - case Y_ANDI_OP: - R[RT (inst)] = R[RS (inst)] & (0xffff & IMM (inst)); - break; - - case Y_BC2F_OP: - case Y_BC2FL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_BEQ_OP: - BRANCH_INST (R[RS (inst)] == R[RT (inst)], - PC + IDISP (inst), - 0); - break; - - case Y_BEQL_OP: - BRANCH_INST (R[RS (inst)] == R[RT (inst)], - PC + IDISP (inst), - 1); - break; - - case Y_BGEZ_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 0); - break; - - case Y_BGEZL_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 1); - break; - - case Y_BGEZAL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 0); - break; - - case Y_BGEZALL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 1); - break; - - case Y_BGTZ_OP: - BRANCH_INST (R[RS (inst)] != 0 && SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 0); - break; - - case Y_BGTZL_OP: - BRANCH_INST (R[RS (inst)] != 0 && SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 1); - break; - - case Y_BLEZ_OP: - BRANCH_INST (R[RS (inst)] == 0 || SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 0); - break; - - case Y_BLEZL_OP: - BRANCH_INST (R[RS (inst)] == 0 || SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 1); - break; - - case Y_BLTZ_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 0); - break; - - case Y_BLTZL_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 1); - break; - - case Y_BLTZAL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 0); - break; - - case Y_BLTZALL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 1); - break; - - case Y_BNE_OP: - BRANCH_INST (R[RS (inst)] != R[RT (inst)], - PC + IDISP (inst), - 0); - break; - - case Y_BNEL_OP: - BRANCH_INST (R[RS (inst)] != R[RT (inst)], - PC + IDISP (inst), - 1); - break; - - case Y_BREAK_OP: - if (RD (inst) == 1) - /* Debugger breakpoint */ - RAISE_EXCEPTION (ExcCode_Bp, return true) - else - RAISE_EXCEPTION (ExcCode_Bp, break); - - case Y_CACHE_OP: - break; /* Memory details not implemented */ - - case Y_CFC0_OP: - R[RT (inst)] = CCR[0][RD (inst)]; - break; - - case Y_CFC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_CLO_OP: - { - reg_word val = R[RS (inst)]; - int i; - for (i = 31; 0 <= i; i -= 1) - if (((val >> i) & 0x1) == 0) break; - - R[RD (inst) ] = 31 - i; - break; - } - - case Y_CLZ_OP: - { - reg_word val = R[RS (inst)]; - int i; - for (i = 31; 0 <= i; i -= 1) - if (((val >> i) & 0x1) == 1) break; - - R[RD (inst) ] = 31 - i; - break; - } - - case Y_COP2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_CTC0_OP: - CCR[0][RD (inst)] = R[RT (inst)]; - break; - - case Y_CTC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_DIV_OP: - /* The behavior of this instruction is undefined on divide by - zero or overflow. */ - if (R[RT (inst)] != 0 - && !(R[RS (inst)] == (reg_word)0x80000000 - && R[RT (inst)] == (reg_word)0xffffffff)) - { - LO = (reg_word) R[RS (inst)] / (reg_word) R[RT (inst)]; - HI = (reg_word) R[RS (inst)] % (reg_word) R[RT (inst)]; - } - break; - - case Y_DIVU_OP: - /* The behavior of this instruction is undefined on divide by - zero or overflow. */ - if (R[RT (inst)] != 0 - && !(R[RS (inst)] == (reg_word)0x80000000 - && R[RT (inst)] == (reg_word)0xffffffff)) - { - LO = (u_reg_word) R[RS (inst)] / (u_reg_word) R[RT (inst)]; - HI = (u_reg_word) R[RS (inst)] % (u_reg_word) R[RT (inst)]; - } - break; - - case Y_ERET_OP: - { - CP0_Status &= ~CP0_Status_EXL; /* Clear EXL bit */ - JUMP_INST (CP0_EPC); /* Jump to EPC */ - } - break; - - case Y_J_OP: - JUMP_INST (((PC & 0xf0000000) | TARGET (inst) << 2)); - break; - - case Y_JAL_OP: - if (delayed_branches) - R[31] = PC + 2 * BYTES_PER_WORD; - else - R[31] = PC + BYTES_PER_WORD; - JUMP_INST (((PC & 0xf0000000) | (TARGET (inst) << 2))); - break; - - case Y_JALR_OP: - { - mem_addr tmp = R[RS (inst)]; - - if (delayed_branches) - R[RD (inst)] = PC + 2 * BYTES_PER_WORD; - else - R[RD (inst)] = PC + BYTES_PER_WORD; - JUMP_INST (tmp); - } - break; - - case Y_JR_OP: - { - mem_addr tmp = R[RS (inst)]; - - JUMP_INST (tmp); - } - break; - - case Y_LB_OP: - LOAD_INST (&R[RT (inst)], - read_mem_byte (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LBU_OP: - LOAD_INST (&R[RT (inst)], - read_mem_byte (R[BASE (inst)] + IOFFSET (inst)), - 0xff); - break; - - case Y_LH_OP: - LOAD_INST (&R[RT (inst)], - read_mem_half (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LHU_OP: - LOAD_INST (&R[RT (inst)], - read_mem_half (R[BASE (inst)] + IOFFSET (inst)), - 0xffff); - break; - - case Y_LL_OP: - /* Uniprocess, so this instruction is just a load */ - LOAD_INST (&R[RT (inst)], - read_mem_word (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LUI_OP: - R[RT (inst)] = (IMM (inst) << 16) & 0xffff0000; - break; - - case Y_LW_OP: - LOAD_INST (&R[RT (inst)], - read_mem_word (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LDC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_LWC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_LWL_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - reg_word word; /* Can't be register */ - int byte = addr & 0x3; - reg_word reg_val = R[RT (inst)]; - - word = read_mem_word (addr & 0xfffffffc); - if (!exception_occurred) -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - word = word; - break; - - case 1: - word = ((word & 0xffffff) << 8) | (reg_val & 0xff); - break; - - case 2: - word = ((word & 0xffff) << 16) | (reg_val & 0xffff); - break; - - case 3: - word = ((word & 0xff) << 24) | (reg_val & 0xffffff); - break; - } -#else - switch (byte) - { - case 0: - word = ((word & 0xff) << 24) | (reg_val & 0xffffff); - break; - - case 1: - word = ((word & 0xffff) << 16) | (reg_val & 0xffff); - break; - - case 2: - word = ((word & 0xffffff) << 8) | (reg_val & 0xff); - break; - - case 3: - break; - } -#endif - LOAD_INST_BASE (&R[RT (inst)], word); - break; - } - - case Y_LWR_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - reg_word word; /* Can't be register */ - int byte = addr & 0x3; - reg_word reg_val = R[RT (inst)]; - - word = read_mem_word (addr & 0xfffffffc); - if (!exception_occurred) -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - word = (reg_val & 0xffffff00) | ((unsigned)(word & 0xff000000) >> 24); - break; - - case 1: - word = (reg_val & 0xffff0000) | ((unsigned)(word & 0xffff0000) >> 16); - break; - - case 2: - word = (reg_val & 0xff000000) | ((unsigned)(word & 0xffffff00) >> 8); - break; - - case 3: - word = word; - break; - } -#else - switch (byte) - { - case 0: - break; - - case 1: - word = (reg_val & 0xff000000) | ((word & 0xffffff00) >> 8); - break; - - case 2: - word = (reg_val & 0xffff0000) | ((word & 0xffff0000) >> 16); - break; - - case 3: - word = (reg_val & 0xffffff00) | ((word & 0xff000000) >> 24); - break; - } -#endif - LOAD_INST_BASE (&R[RT (inst)], word); - break; - } - - case Y_MADD_OP: - case Y_MADDU_OP: - { - reg_word lo = LO, hi = HI; - reg_word tmp; - if (OPCODE (inst) == Y_MADD_OP) - { - signed_multiply(R[RS (inst)], R[RT (inst)]); - } - else /* Y_MADDU_OP */ - { - unsigned_multiply(R[RS (inst)], R[RT (inst)]); - } - tmp = lo + LO; - if ((unsigned)tmp < (unsigned)LO || (unsigned)tmp < (unsigned)lo) - { - /* Addition of low-order word overflows */ - hi += 1; - } - LO = tmp; - HI = hi + HI; - break; - } - - case Y_MFC0_OP: - R[RT (inst)] = CPR[0][FS (inst)]; - break; - - case Y_MFC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_MFHI_OP: - R[RD (inst)] = HI; - break; - - case Y_MFLO_OP: - R[RD (inst)] = LO; - break; - - case Y_MOVN_OP: - if (R[RT (inst)] != 0) - R[RD (inst)] = R[RS (inst)]; - break; - - case Y_MOVZ_OP: - if (R[RT (inst)] == 0) - R[RD (inst)] = R[RS (inst)]; - break; - - case Y_MSUB_OP: - case Y_MSUBU_OP: - { - reg_word lo = LO, hi = HI; - reg_word tmp; - - if (OPCODE (inst) == Y_MSUB_OP) - { - signed_multiply(R[RS (inst)], R[RT (inst)]); - } - else /* Y_MSUBU_OP */ - { - unsigned_multiply(R[RS (inst)], R[RT (inst)]); - } - - tmp = lo - LO; - if ((unsigned)LO > (unsigned)lo) - { - /* Subtraction of low-order word borrows */ - hi -= 1; - } - LO = tmp; - HI = hi - HI; - break; - } - - case Y_MTC0_OP: - CPR[0][FS (inst)] = R[RT (inst)]; - switch (FS (inst)) - { - case CP0_Compare_Reg: - CP0_Cause &= ~CP0_Cause_IP7; /* Writing clears HW interrupt 5 */ - break; - - case CP0_Status_Reg: - CP0_Status &= CP0_Status_Mask; - CP0_Status |= ((CP0_Status_CU & 0x30000000) | CP0_Status_UM); - break; - - case CP0_Cause_Reg: - CPR[0][FS (inst)] &= CP0_Cause_Mask; - break; - - case CP0_Config_Reg: - CPR[0][FS (inst)] &= CP0_Config_Mask; - break; - - default: - break; - } - break; - - case Y_MTC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_MTHI_OP: - HI = R[RS (inst)]; - break; - - case Y_MTLO_OP: - LO = R[RS (inst)]; - break; - - case Y_MUL_OP: - signed_multiply(R[RS (inst)], R[RT (inst)]); - R[RD (inst)] = LO; - break; - - case Y_MULT_OP: - signed_multiply(R[RS (inst)], R[RT (inst)]); - break; - - case Y_MULTU_OP: - unsigned_multiply (R[RS (inst)], R[RT (inst)]); - break; - - case Y_NOR_OP: - R[RD (inst)] = ~ (R[RS (inst)] | R[RT (inst)]); - break; - - case Y_OR_OP: - R[RD (inst)] = R[RS (inst)] | R[RT (inst)]; - break; - - case Y_ORI_OP: - R[RT (inst)] = R[RS (inst)] | (0xffff & IMM (inst)); - break; - - case Y_PREF_OP: - break; /* Memory details not implemented */ - - case Y_RFE_OP: -#ifdef MIPS1 - /* This is MIPS-I, not compatible with MIPS32 or the - definition of the bits in the CP0 Status register in that - architecture. */ - CP0_Status = (CP0_Status & 0xfffffff0) | ((CP0_Status & 0x3c) >> 2); -#else - RAISE_EXCEPTION (ExcCode_RI, {}); /* Not MIPS32 instruction */ -#endif - break; - - case Y_SB_OP: - set_mem_byte (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SC_OP: - /* Uniprocessor, so instruction is just a store */ - set_mem_word (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SDC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_SH_OP: - set_mem_half (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SLL_OP: - { - int shamt = SHAMT (inst); - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = R[RT (inst)] << shamt; - else - R[RD (inst)] = R[RT (inst)]; - break; - } - - case Y_SLLV_OP: - { - int shamt = (R[RS (inst)] & 0x1f); - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = R[RT (inst)] << shamt; - else - R[RD (inst)] = R[RT (inst)]; - break; - } - - case Y_SLT_OP: - if (R[RS (inst)] < R[RT (inst)]) - R[RD (inst)] = 1; - else - R[RD (inst)] = 0; - break; - - case Y_SLTI_OP: - if (R[RS (inst)] < (short) IMM (inst)) - R[RT (inst)] = 1; - else - R[RT (inst)] = 0; - break; - - case Y_SLTIU_OP: - { - int x = (short) IMM (inst); - - if ((u_reg_word) R[RS (inst)] < (u_reg_word) x) - R[RT (inst)] = 1; - else - R[RT (inst)] = 0; - break; - } - - case Y_SLTU_OP: - if ((u_reg_word) R[RS (inst)] < (u_reg_word) R[RT (inst)]) - R[RD (inst)] = 1; - else - R[RD (inst)] = 0; - break; - - case Y_SRA_OP: - { - int shamt = SHAMT (inst); - reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SRAV_OP: - { - int shamt = R[RS (inst)] & 0x1f; - reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SRL_OP: - { - int shamt = SHAMT (inst); - u_reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SRLV_OP: - { - int shamt = R[RS (inst)] & 0x1f; - u_reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SUB_OP: - { - reg_word vs = R[RS (inst)], vt = R[RT (inst)]; - reg_word diff = vs - vt; - - if (SIGN_BIT (vs) != SIGN_BIT (vt) - && SIGN_BIT (vs) != SIGN_BIT (diff)) - RAISE_EXCEPTION (ExcCode_Ov, break); - R[RD (inst)] = diff; - break; - } - - case Y_SUBU_OP: - R[RD (inst)] = (u_reg_word)R[RS (inst)]-(u_reg_word)R[RT (inst)]; - break; - - case Y_SW_OP: - set_mem_word (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SWC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_SWL_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - mem_word data; - reg_word reg = R[RT (inst)]; - int byte = addr & 0x3; - - data = read_mem_word (addr & 0xfffffffc); -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - data = reg; - break; - - case 1: - data = (data & 0xff000000) | (reg >> 8 & 0xffffff); - break; - - case 2: - data = (data & 0xffff0000) | (reg >> 16 & 0xffff); - break; - - case 3: - data = (data & 0xffffff00) | (reg >> 24 & 0xff); - break; - } -#else - switch (byte) - { - case 0: - data = (data & 0xffffff00) | (reg >> 24 & 0xff); - break; - - case 1: - data = (data & 0xffff0000) | (reg >> 16 & 0xffff); - break; - - case 2: - data = (data & 0xff000000) | (reg >> 8 & 0xffffff); - break; - - case 3: - data = reg; - break; - } -#endif - set_mem_word (addr & 0xfffffffc, data); - break; - } - - case Y_SWR_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - mem_word data; - reg_word reg = R[RT (inst)]; - int byte = addr & 0x3; - - data = read_mem_word (addr & 0xfffffffc); -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - data = ((reg << 24) & 0xff000000) | (data & 0xffffff); - break; - - case 1: - data = ((reg << 16) & 0xffff0000) | (data & 0xffff); - break; - - case 2: - data = ((reg << 8) & 0xffffff00) | (data & 0xff) ; - break; - - case 3: - data = reg; - break; - } -#else - switch (byte) - { - case 0: - data = reg; - break; - - case 1: - data = ((reg << 8) & 0xffffff00) | (data & 0xff) ; - break; - - case 2: - data = ((reg << 16) & 0xffff0000) | (data & 0xffff); - break; - - case 3: - data = ((reg << 24) & 0xff000000) | (data & 0xffffff); - break; - } -#endif - set_mem_word (addr & 0xfffffffc, data); - break; - } - - case Y_SYNC_OP: - break; /* Memory details not implemented */ - - case Y_SYSCALL_OP: - if (!do_syscall ()) - return false; - break; - - case Y_TEQ_OP: - if (R[RS (inst)] == R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TEQI_OP: - if (R[RS (inst)] == IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGE_OP: - if (R[RS (inst)] >= R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGEI_OP: - if (R[RS (inst)] >= IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGEIU_OP: - if ((u_reg_word)R[RS (inst)] >= (u_reg_word)IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGEU_OP: - if ((u_reg_word)R[RS (inst)] >= (u_reg_word)R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLBP_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBR_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBWI_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBWR_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLT_OP: - if (R[RS (inst)] < R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLTI_OP: - if (R[RS (inst)] < IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLTIU_OP: - if ((u_reg_word)R[RS (inst)] < (u_reg_word)IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLTU_OP: - if ((u_reg_word)R[RS (inst)] < (u_reg_word)R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TNE_OP: - if (R[RS (inst)] != R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TNEI_OP: - if (R[RS (inst)] != IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_XOR_OP: - R[RD (inst)] = R[RS (inst)] ^ R[RT (inst)]; - break; - - case Y_XORI_OP: - R[RT (inst)] = R[RS (inst)] ^ (0xffff & IMM (inst)); - break; - - - /* FPA Operations */ - - case Y_ABS_S_OP: - SET_FPR_S (FD (inst), fabs (FPR_S (FS (inst)))); - break; - - case Y_ABS_D_OP: - SET_FPR_D (FD (inst), fabs (FPR_D (FS (inst)))); - break; - - case Y_ADD_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) + FPR_S (FT (inst))); - /* Should trap on inexact/overflow/underflow */ - break; - - case Y_ADD_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) + FPR_D (FT (inst))); - /* Should trap on inexact/overflow/underflow */ - break; - - case Y_BC1F_OP: - case Y_BC1FL_OP: - case Y_BC1T_OP: - case Y_BC1TL_OP: - { - int cc = CC (inst); - int nd = ND (inst); /* 1 => nullify */ - int tf = TF (inst); /* 0 => BC1F, 1 => BC1T */ - BRANCH_INST ((FCCR & (1 << cc)) == (tf << cc), - PC + IDISP (inst), - nd); - break; - } - - case Y_C_F_S_OP: - case Y_C_UN_S_OP: - case Y_C_EQ_S_OP: - case Y_C_UEQ_S_OP: - case Y_C_OLT_S_OP: - case Y_C_OLE_S_OP: - case Y_C_ULT_S_OP: - case Y_C_ULE_S_OP: - case Y_C_SF_S_OP: - case Y_C_NGLE_S_OP: - case Y_C_SEQ_S_OP: - case Y_C_NGL_S_OP: - case Y_C_LT_S_OP: - case Y_C_NGE_S_OP: - case Y_C_LE_S_OP: - case Y_C_NGT_S_OP: - { - float v1 = FPR_S (FS (inst)), v2 = FPR_S (FT (inst)); - double dv1 = v1, dv2 = v2; - int cond = COND (inst); - int cc = FD (inst); - - if (NaN (dv1) || NaN (dv2)) - { - if (cond & COND_IN) - { - RAISE_EXCEPTION (ExcCode_FPE, break); - } - set_fpu_cc (cond, cc, 0, 0, 1); - } - else - { - set_fpu_cc (cond, cc, v1 < v2, v1 == v2, 0); - } - } - break; - - case Y_C_F_D_OP: - case Y_C_UN_D_OP: - case Y_C_EQ_D_OP: - case Y_C_UEQ_D_OP: - case Y_C_OLT_D_OP: - case Y_C_OLE_D_OP: - case Y_C_ULT_D_OP: - case Y_C_ULE_D_OP: - case Y_C_SF_D_OP: - case Y_C_NGLE_D_OP: - case Y_C_SEQ_D_OP: - case Y_C_NGL_D_OP: - case Y_C_LT_D_OP: - case Y_C_NGE_D_OP: - case Y_C_LE_D_OP: - case Y_C_NGT_D_OP: - { - double v1 = FPR_D (FS (inst)), v2 = FPR_D (FT (inst)); - int cond = COND (inst); - int cc = FD (inst); - - if (NaN (v1) || NaN (v2)) - { - if (cond & COND_IN) - { - RAISE_EXCEPTION (ExcCode_FPE, break); - } - set_fpu_cc (cond, cc, 0, 0, 1); - } - else - { - set_fpu_cc (cond, cc, v1 < v2, v1 == v2, 0); - } - } - break; - - case Y_CFC1_OP: - R[RT (inst)] = FCR[FS (inst)]; - break; - - case Y_CTC1_OP: - FCR[FS (inst)] = R[RT (inst)]; - - if (FIR_REG == FS (inst)) - { - /* Read only register */ - FIR = FIR_MASK; - } - else if (FCCR_REG == FS (inst)) - { - /* FCC bits in FCSR and FCCR linked */ - FCSR = (FCSR & ~0xfe400000) - | ((FCCR & 0xfe) << 24) - | ((FCCR & 0x1) << 23); - FCCR &= FCCR_MASK; - } - else if (FCSR_REG == FS (inst)) - { - /* FCC bits in FCSR and FCCR linked */ - FCCR = ((FCSR >> 24) & 0xfe) | ((FCSR >> 23) & 0x1); - FCSR &= FCSR_MASK; - if ((R[RT (inst)] & ~FCSR_MASK) != 0) - /* Trying to set unsupported mode */ - RAISE_EXCEPTION (ExcCode_FPE, {}); - } - break; - - case Y_CEIL_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)ceil (val)); - break; - } - - case Y_CEIL_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)ceil (val)); - break; - } - - case Y_CVT_D_S_OP: - { - double val = FPR_S (FS (inst)); - - SET_FPR_D (FD (inst), val); - break; - } - - case Y_CVT_D_W_OP: - { - double val = (double)FPR_W (FS (inst)); - - SET_FPR_D (FD (inst), val); - break; - } - - case Y_CVT_S_D_OP: - { - float val = (float)FPR_D (FS (inst)); - - SET_FPR_S (FD (inst), val); - break; - } - - case Y_CVT_S_W_OP: - { - float val = (float)FPR_W (FS (inst)); - - SET_FPR_S (FD (inst), val); - break; - } - - case Y_CVT_W_D_OP: - { - int val = (int32)FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), val); - break; - } - - case Y_CVT_W_S_OP: - { - int val = (int32)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), val); - break; - } - - case Y_DIV_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) / FPR_S (FT (inst))); - break; - - case Y_DIV_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) / FPR_D (FT (inst))); - break; - - case Y_FLOOR_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)floor (val)); - break; - } - - case Y_FLOOR_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)floor (val)); - break; - } - - case Y_LDC1_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - if ((addr & 0x3) != 0) - RAISE_EXCEPTION (ExcCode_AdEL, CP0_BadVAddr = addr); - - LOAD_INST ((reg_word *) &FPR_S(FT (inst)), - read_mem_word (addr), - 0xffffffff); - LOAD_INST ((reg_word *) &FPR_S(FT (inst) + 1), - read_mem_word (addr + sizeof(mem_word)), - 0xffffffff); - break; - } - - case Y_LWC1_OP: - LOAD_INST ((reg_word *) &FPR_S(FT (inst)), - read_mem_word (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_MFC1_OP: - { - float val = FPR_S(FS (inst)); - reg_word *vp = (reg_word *) &val; - - R[RT (inst)] = *vp; /* Fool coercion */ - break; - } - - case Y_MOV_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - case Y_MOV_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - - case Y_MOVF_OP: - { - int cc = CC (inst); - if ((FCCR & (1 << cc)) == 0) - R[RD (inst)] = R[RS (inst)]; - break; - } - - case Y_MOVF_D_OP: - { - int cc = CC (inst); - if ((FCCR & (1 << cc)) == 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVF_S_OP: - { - int cc = CC (inst); - if ((FCCR & (1 << cc)) == 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - } - - case Y_MOVN_D_OP: - { - if (R[RT (inst)] != 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVN_S_OP: - { - if (R[RT (inst)] != 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - } - - case Y_MOVT_OP: - { - int cc = CC (inst); - if ((FCCR & (1 << cc)) != 0) - R[RD (inst)] = R[RS (inst)]; - break; - } - - case Y_MOVT_D_OP: - { - int cc = CC (inst); - if ((FCCR & (1 << cc)) != 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVT_S_OP: - { - int cc = CC (inst); - if ((FCCR & (1 << cc)) != 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - } - - case Y_MOVZ_D_OP: - { - if (R[RT (inst)] == 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVZ_S_OP: - { - if (R[RT (inst)] == 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - } - - case Y_MTC1_OP: - { - reg_word word = R[RT (inst)]; - float *wp = (float *) &word; - - SET_FPR_S(FS (inst), *wp); /* fool coercion */ - break; - } - - case Y_MUL_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) * FPR_S (FT (inst))); - break; - - case Y_MUL_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) * FPR_D (FT (inst))); - break; - - case Y_NEG_S_OP: - SET_FPR_S (FD (inst), -FPR_S (FS (inst))); - break; - - case Y_NEG_D_OP: - SET_FPR_D (FD (inst), -FPR_D (FS (inst))); - break; - - case Y_ROUND_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)(val + 0.5)); /* Casting truncates */ - break; - } - - case Y_ROUND_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)(val + 0.5)); /* Casting truncates */ - break; - } - - case Y_SDC1_OP: - { - double val = FPR_D (RT (inst)); - reg_word *vp = (reg_word*)&val; - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - if ((addr & 0x3) != 0) - RAISE_EXCEPTION (ExcCode_AdEL, CP0_BadVAddr = addr); - - set_mem_word (addr, *vp); - set_mem_word (addr + sizeof(mem_word), *(vp + 1)); - break; - } - - case Y_SQRT_D_OP: - SET_FPR_D (FD (inst), sqrt (FPR_D (FS (inst)))); - break; - - case Y_SQRT_S_OP: - SET_FPR_S (FD (inst), sqrt (FPR_S (FS (inst)))); - break; - - case Y_SUB_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) - FPR_S (FT (inst))); - break; - - case Y_SUB_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) - FPR_D (FT (inst))); - break; - - case Y_SWC1_OP: - { - float val = FPR_S(RT (inst)); - reg_word *vp = (reg_word *) &val; - - set_mem_word (R[BASE (inst)] + IOFFSET (inst), *vp); - break; - } - - case Y_TRUNC_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)val); /* Casting truncates */ - break; - } - - case Y_TRUNC_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)val); /* Casting truncates */ - break; - } - - default: - fatal_error ("Unknown instruction type: %d\n", OPCODE (inst)); - break; - } - - /* After instruction executes: */ - PC += BYTES_PER_WORD; - - if (exception_occurred) - { - handle_exception (); - } - } /* End: for (step = 0; ... */ - } /* End: for ( ; steps_to_run > 0 ... */ - - /* Executed enought steps, return, but are able to continue. */ - return true; -} - - -#ifdef _WIN32 -void CALLBACK -timer_completion_routine(LPVOID lpArgToCompletionRoutine, DWORD dwTimerLowValue, DWORD dwTimerHighValue) -{ - lpArgToCompletionRoutine = lpArgToCompletionRoutine; - dwTimerLowValue = dwTimerLowValue; - dwTimerHighValue = dwTimerHighValue; - bump_CP0_timer (); -} -#endif - - -/* Increment CP0 Count register and test if it matches the Compare - register. If so, cause an interrupt. */ - -static void -bump_CP0_timer () -{ - CP0_Count += 1; - if (CP0_Count == CP0_Compare) - { - RAISE_INTERRUPT (7); - } -} - - -static void -start_CP0_timer () -{ -#ifdef _WIN32 - HANDLE timer = CreateWaitableTimer(NULL, TRUE, TEXT("SPIMTimer")); - if (NULL == timer) - { - error ("CreateWaitableTimer failed"); - } - else - { - LARGE_INTEGER interval; - interval.QuadPart = -10000 * TIMER_TICK_MS; /* Unit is 100 nsec */ - - if (!SetWaitableTimer (timer, &interval, 1, timer_completion_routine, 0, FALSE)) - { - error ("SetWaitableTimer failed"); - } - } -#else - /* Should use ITIMER_VIRTUAL delivering SIGVTALRM, but that does not seem - to work under Cygwin, so we'll adopt the lowest common denominator and - use real time. - - We ignore the resulting signal, however, and read the timer with getitimer, - since signals interrupt I/O calls, such as read, and make user - interaction with SPIM work very poorly. Since speed isn't an important - aspect of SPIM, polling isn't a big deal. */ - if (SIG_ERR == signal (SIGALRM, SIG_IGN)) - { - perror ("signal failed"); - } - else - { - struct itimerval time; - if (-1 == getitimer (ITIMER_REAL, &time)) - { - perror ("getitmer failed"); - } - if (time.it_value.tv_usec == 0 && time.it_value.tv_sec == 0) - { - /* Timer is expired or has not been started. - Start a non-periodic timer for TIMER_TICK_MS microseconds. */ - time.it_interval.tv_sec = 0; - time.it_interval.tv_usec = 0; - time.it_value.tv_sec = 0; - time.it_value.tv_usec = TIMER_TICK_MS * 1000; - if (-1 == setitimer (ITIMER_REAL, &time, NULL)) - { - perror ("setitmer failed"); - } - } - } -#endif -} - - -/* Multiply two 32-bit numbers, V1 and V2, to produce a 64 bit result in - the HI/LO registers. The algorithm is high-school math: - - A B - x C D - ------ - AD || BD - AC || CB || 0 - - where A and B are the high and low short words of V1, C and D are the short - words of V2, AD is the product of A and D, and X || Y is (X << 16) + Y. - Since the algorithm is programmed in C, we need to be careful not to - overflow. */ - -static void -unsigned_multiply (reg_word v1, reg_word v2) -{ - u_reg_word a, b, c, d; - u_reg_word bd, ad, cb, ac; - u_reg_word mid, mid2, carry_mid = 0; - - a = (v1 >> 16) & 0xffff; - b = v1 & 0xffff; - c = (v2 >> 16) & 0xffff; - d = v2 & 0xffff; - - bd = b * d; - ad = a * d; - cb = c * b; - ac = a * c; - - mid = ad + cb; - if (mid < ad || mid < cb) - /* Arithmetic overflow or carry-out */ - carry_mid = 1; - - mid2 = mid + ((bd >> 16) & 0xffff); - if (mid2 < mid || mid2 < ((bd >> 16) & 0xffff)) - /* Arithmetic overflow or carry-out */ - carry_mid += 1; - - LO = (bd & 0xffff) | ((mid2 & 0xffff) << 16); - HI = ac + (carry_mid << 16) + ((mid2 >> 16) & 0xffff); -} - - -static void -signed_multiply (reg_word v1, reg_word v2) -{ - int neg_sign = 0; - - if (v1 < 0) - { - v1 = - v1; - neg_sign = 1; - } - if (v2 < 0) - { - v2 = - v2; - neg_sign = ! neg_sign; - } - - unsigned_multiply (v1, v2); - if (neg_sign) - { - LO = ~ LO; - HI = ~ HI; - LO += 1; - if (LO == 0) - HI += 1; - } -} - -static void -set_fpu_cc (int cond, int cc, int less, int equal, int unordered) -{ - int result; - int fcsr_bit; - - result = 0; - if (cond & COND_LT) result |= less; - if (cond & COND_EQ) result |= equal; - if (cond & COND_UN) result |= unordered; - - FCCR = (FCCR & ~(1 << cc)) | (result << cc); - if (0 == cc) - { - fcsr_bit = 23; - } - else - { - fcsr_bit = 24 + cc; - } - FCSR = (FCSR & ~(1 << fcsr_bit)) | (result << fcsr_bit); -} - - -void -raise_exception (int excode) -{ - if (ExcCode_Int != excode - || ((CP0_Status & CP0_Status_IE) /* Allow interrupt if IE and !EXL */ - && !(CP0_Status & CP0_Status_EXL))) - { - /* Ignore interrupt exception when interrupts disabled. */ - exception_occurred = 1; - if (running_in_delay_slot) - { - /* In delay slot */ - if ((CP0_Status & CP0_Status_EXL) == 0) - { - /* Branch's addr */ - CP0_EPC = ROUND_DOWN (PC - BYTES_PER_WORD, BYTES_PER_WORD); - /* Set BD bit to record that instruction is in delay slot */ - CP0_Cause |= CP0_Cause_BD; - } - } - else - { - /* Not in delay slot */ - if ((CP0_Status & CP0_Status_EXL) == 0) - { - /* Faulting instruction's address */ - CP0_EPC = ROUND_DOWN (PC, BYTES_PER_WORD); - } - } - /* ToDo: set CE field of Cause register to coprocessor causing exception */ - - /* Record cause of exception */ - CP0_Cause = (CP0_Cause & ~CP0_Cause_ExcCode) | (excode << 2); - - /* Turn on EXL bit to prevent subsequent interrupts from affecting EPC */ - CP0_Status |= CP0_Status_EXL; - -#ifdef MIPS1 - CP0_Status = (CP0_Status & 0xffffffc0) | ((CP0_Status & 0xf) << 2); -#endif - } -} diff --git a/spim-jsspim/CPU/run.h b/spim-jsspim/CPU/run.h deleted file mode 100755 index a8029d1..0000000 --- a/spim-jsspim/CPU/run.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM instructions. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -bool run_spim (mem_addr initial_PC, int steps, bool display); diff --git a/spim-jsspim/CPU/scanner.h b/spim-jsspim/CPU/scanner.h deleted file mode 100755 index 3f97644..0000000 --- a/spim-jsspim/CPU/scanner.h +++ /dev/null @@ -1,58 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to lexical scanner. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions (besides yylex): */ - -void initialize_scanner (FILE *in_file); -void push_scanner (FILE *in_file); -void pop_scanner (); -char* erroneous_line (); -void scanner_start_line (); -int register_name_to_number (char *name); -char *source_line (); -int yylex (); - -/* Exported Variables: */ - -/* This flag tells the scanner to treat the next sequence of letters - etc as an identifier and not look it up as an opcode. It permits us - to use opcodes as symbols in most places. However, because of the - LALR(1) lookahead, it does not work for labels. */ - -extern int only_id; - -typedef intptr_union yylval_t; -#define YYSTYPE yylval_t -extern YYSTYPE yylval; /* Value of token from YYLEX */ - -extern int line_no; /* Line number in input file*/ diff --git a/spim-jsspim/CPU/scanner.l b/spim-jsspim/CPU/scanner.l deleted file mode 100755 index 24a7baf..0000000 --- a/spim-jsspim/CPU/scanner.l +++ /dev/null @@ -1,733 +0,0 @@ -%{ -/* SPIM S20 MIPS simulator. - Lexical scanner. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "sym-tbl.h" -#include "parser.h" -#include "scanner.h" -#include "parser_yacc.h" - -#ifdef _WIN32 -#include -#else -#include -#endif - -#define YY_NO_UNISTD_H - -/* Exported Variables: */ - -int only_id; -int line_no; /* Line number in input file*/ - - -/* Local Variables: */ - -/* Track which line we are reading and where it began in the buffer. */ -static int current_line_no = 0; - -static char *current_line = NULL; - - -static double scan_float; /* Where FP values are kept */ - -static int line_returned = 0; /* Returned current line yet? */ - -static int eof_returned = 0; /* Return EOF token yet? */ - - -/* Local functions: */ - -static int check_keyword (char *id, int allow_pseudo_ops); -static char *copy_str (char *str, int chop); -static char scan_escape (char **str); - - -#undef yywrap - -%} - -%% - -[ \t] { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - } - - -[\n] { - line_no += 1; - return (Y_NL); - } - -[\r] { /* Ignore carrage returns */ } - -[;] { - return (Y_NL); - } - - -[\001] { /* Marker character inserted to allow scanner to - return Y_EOF before returning hard EOF. */ - return (Y_EOF); - } - -"#".* { - /* Ignore comments */ - } - - -(-[0-9]+)|([0-9]+) { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.i = atoi (yytext); - return (Y_INT); - } - - -((0x)|(-0x))[0-9A-Fa-f]+ { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - if (*yytext == '-') - { - sscanf(yytext+3, "%x", (unsigned int*)&(yylval.i)); - yylval.i = -yylval.i; - } - else - { - sscanf(yytext+2, "%x", (unsigned int*)&(yylval.i)); - } - return (Y_INT); - } - - -(\+|\-)?[0-9]+[\.\,\'][0-9]+(e)?(\+|\-)?[0-9]* { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - scan_float = atof (yytext); - yylval.p = (double*) &scan_float; - return (Y_FP); - } - - -[a-zA-Z_\.][a-zA-Z0-9_\.]* { - int token = check_keyword (yytext, - !bare_machine - && accept_pseudo_insts); - label *l; - - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (!only_id && token != 0) - { - /* Keyword */ - yylval.i = token; - current_line = yytext; - return (token); - } - - if (only_id && token != 0) - yyerror ("Cannot use opcodes as labels"); - - if ((l = label_is_defined (yytext)) != NULL - && l->const_flag) - { - /* Defined label */ - yylval.i = (int) l->addr; - return (Y_INT); - } - else - { - /* Not-yet defined label */ - yylval.p = (char*) str_copy (yytext); - return (Y_ID); - } - } - - -\$[a-zA-Z0-9_\.$]+ { - int reg_no = register_name_to_number (yytext + 1); - - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (reg_no != -1 - && *(yytext + 1) == 'f' - && *(yytext + 2) != 'p') - { - /* Floating point register ($f0) */ - yylval.i = reg_no; - return (Y_FP_REG); - } - - if (0 <= reg_no && reg_no < R_LENGTH) - { - /* Register ($r0) */ - yylval.i = reg_no; - return (Y_REG); - } - else - { - /* Otherwise, an integer or identifier */ - label *l = label_is_defined (yytext); - - if (l != NULL && l->const_flag) - { - yylval.i = (int) l->addr; - return (Y_INT); - } - else - { - yylval.p = (char*) str_copy (yytext); - return (Y_ID); - } - } - } - - -[\*\/:()+-]|">"|"=" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - return (*yytext); - } - - -"," { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - /* Skip commas */ - } - -"?" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.p = (char*) str_copy (yytext); - /* For top level */ - return (Y_ID); - } - - -\"(([^""])|(\\\"))*\" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.p = (char*) copy_str (yytext + 1, 1); - return (Y_STR); - } - -\'(([^''])|(\\[^'']))\' { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (*(yytext + 1) == '\\') - { - char *escape = yytext + 2; - yylval.i = (int) scan_escape (&escape); - } - else - { - yylval.i = (int) *(yytext + 1); - } - - return (Y_INT); - } - -. { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yyerror ("Unknown character"); - } - - -%% - - - -void -initialize_scanner (FILE *in_file) -{ - if (yyin != in_file) - { - push_scanner (in_file); - } - yyin = in_file; - -#ifdef FLEX_SCANNER - yyrestart(in_file); -#define YY_FLEX_VERSION (YY_FLEX_MAJOR_VERSION * 1000 + YY_FLEX_MINOR_VERSION * 100 + YY_FLEX_SUBMINOR_VERSION) -#if YY_FLEX_VERSION >= 2533 - /* flex 2.5.33 flipped the polarity of this flag (sigh) */ - yy_init = 0; -#else - yy_init = 1; -#endif -#endif - - line_no = 1; - current_line = NULL; - line_returned = 0; - eof_returned = 0; -} - -void -push_scanner (FILE *in_file) -{ - YY_BUFFER_STATE buf = yy_create_buffer (in_file, YY_BUF_SIZE); - yypush_buffer_state (buf); -} - -void -pop_scanner () -{ - yypop_buffer_state (); -} - -void -scanner_start_line () -{ - current_line = NULL; - line_returned = 0; -} - - -/* This is a work-around for a bug in flex v 2.5.31 (but not earlier or - later versions such as 2.5.4) that left this symbol undefined. */ - -#ifndef yytext_ptr -#define yytext_ptr yytext -#endif - - -/* Use yywrap to insert a marker character, which causes the - scanner to return Y_EOF, before return a hard EOF. This - wouldn't be necessary, except that bison does not allow - the parser to use EOF (= 0) as a non-terminal */ - -int yywrap() -{ - if (eof_returned) - return (1); - else - { - unput ('\001'); - eof_returned = 1; -#ifdef FLEX_SCANNER - yy_did_buffer_switch_on_eof = 1; -#endif - return (0); - } -} - - -/* A backslash has just been read, return the character designated by *STR. */ - -static char -scan_escape (char **str) -{ - char first = **str; - *str += 1; - switch (first) - { - case 'a': return '\a'; - case 'b': return '\b'; - case 'f': return '\f'; - case 'n': return '\n'; - case 'r': return '\r'; - case 't': return '\t'; - case '\\': return '\\'; - case '"': return '"'; - case '\'': return '\''; - - case 'x': - case 'X': - { - char c1 = **str, c2 = *(*str + 1); - int b = 0; - - if ('0' <= c1 && c1 <= '9') b = c1 - '0'; - else if ('A' <= c1 && c1 <= 'F') b = c1 - 'A' + 10; - else if ('a' <= c1 && c1 <= 'f') b = c1 - 'a' + 10; - else yyerror ("Bad character in \\X construct in string"); - - b <<= 4; - if ('0' <= c2 && c2 <= '9') b += c2 - '0'; - else if ('A' <= c2 && c2 <= 'F') b += c2 - 'A' + 10; - else if ('a' <= c2 && c2 <= 'f') b += c2 - 'a' + 10; - else yyerror ("Bad character in \\X construct in string"); - - *str += 2; - return (char) b; - } - - default: - { - char message[] = "Bad character \\X"; - message[strlen (message) - 1] = first; - yyerror (message); - return '\0'; - } - } -} - - -/* Return a freshly-allocated copy of STRING with the last CHOP - characters removed. */ - -static char * -copy_str (char *str, int chop) -{ - int new_len = strlen (str) - chop; - char *new_str = (char *) xmalloc (new_len + 1), *n; - - for (n = new_str; *str != '\0' && new_len > 0; new_len -= 1) - if (*str == '\\') - switch (*(str + 1)) - { - case 'n': - { - *n ++ = '\n'; - str += 2; - new_len -= 1; - continue; - } - case 't': - { - *n ++ = '\t'; - str += 2; - new_len -= 1; - continue; - } - case '"': - { - *n ++ = '"'; - str += 2; - new_len -= 1; - continue; - } - case '0': /* \nnn */ - case '1': - case '2': - case '3': - { - char c2 = *(str + 2), c3 = *(str + 3); - int b = (*(str + 1) - '0') << 3; - - if ('0' <= c2 && c2 <= '7') - b += (c2 - '0') << 3; - else - yyerror ("Bad character in \\ooo construct in string"); - - if ('0' <= c3 && c3 <= '7') - b += c3 - '0'; - else - yyerror ("Bad character in \\ooo construct in string"); - - *n ++ = (char) b; - str += 4; - new_len -= 3; - continue; - } - case 'X': - { - char c2 = *(str + 2), c3 = *(str + 3); - int b = 0; - - if ('0' <= c2 && c2 <= '9') - b = c2 - '0'; - else if ('A' <= c2 && c2 <= 'F') - b = c2 - 'A' + 10; - else - yyerror ("Bad character in \\X construct in string"); - - b <<= 4; - if ('0' <= c3 && c3 <= '9') - b += c3 - '0'; - else if ('A' <= c3 && c3 <= 'F') - b += c3 - 'A' + 10; - else - yyerror ("Bad character in \\X construct in string"); - - *n ++ = (char) b; - str += 4; - new_len -= 3; - continue; - } - default: - { - *n ++ = *str ++; - continue; - } - } - else - *n ++ = *str ++; - - *n = '\0'; - return (new_str); -} - - -/* On a parse error, write out the current line and print a caret (^) - below the point at which the error occured. Also, reset the input - stream to the begining of the next line. */ - -char* -erroneous_line () -{ - int prefix_length = yytext - current_line; - int i, c; - str_stream ss; - - ss_init (&ss); - - if (current_line == NULL) return ss_to_string (&ss); - - /* Print part of line that has been consumed. */ - ss_printf (&ss, " "); - if (0 <= prefix_length) - { - /* yytext and current_line point to same line */ - c = *(current_line + prefix_length); - *(current_line + prefix_length) = '\0'; - ss_printf (&ss, "%s", current_line); - *(current_line + prefix_length) = (char)c; - ss_printf (&ss, "%s", yytext); - } - else - { - /* yytext and current_line point to different lines */ - ss_printf (&ss, "%s", current_line); - prefix_length = strlen(current_line); - } - - /* Flush the rest of the line (not consumed) from lex input. */ - if (*yytext != '\n') - { -#ifdef __cplusplus - while ((c = yyinput ()) != '\n' && c != EOF && c != 1) -#else - while ((c = input ()) != '\n' && c != EOF && c != 1) -#endif - { - ss_printf (&ss, "%c", c); - } - if (c == '\n') unput ('\n'); - current_line = NULL; - } - - /* Print marker to point at which consumption stopped. */ - ss_printf (&ss, "\n "); - for (i = 0; i < prefix_length; i ++) ss_printf (&ss, " "); - ss_printf (&ss, "^\n"); - - return ss_to_string (&ss); -} - - -static name_val_val keyword_tbl [] = { -#undef OP -#define OP(NAME, OPCODE, TYPE, R_OPCODE) {NAME, OPCODE, TYPE}, -#include "op.h" -}; - - -static int -check_keyword (char *id, int allow_pseudo_ops) -{ - name_val_val *entry = - map_string_to_name_val_val (keyword_tbl, - sizeof(keyword_tbl) / sizeof (name_val_val), - id); - if (entry == NULL) - return (0); - else if (!allow_pseudo_ops && entry->value2 == PSEUDO_OP) - return (0); - else - return (entry->value1); -} - - -static name_val_val register_tbl [] = { - {"a0", 4, 0}, - {"a1", 5, 0}, - {"a2", 6, 0}, - {"a3", 7, 0}, - {"at", 1, 0}, - {"fp", 30, 0}, - {"gp", 28, 0}, - {"k0", 26, 0}, - {"k1", 27, 0}, - {"kt0", 26, 0}, - {"kt1", 27, 0}, - {"ra", 31, 0}, - {"s0", 16, 0}, - {"s1", 17, 0}, - {"s2", 18, 0}, - {"s3", 19, 0}, - {"s4", 20, 0}, - {"s5", 21, 0}, - {"s6", 22, 0}, - {"s7", 23, 0}, - {"s8", 30, 0}, - {"sp", 29, 0}, - {"t0", 8, 0}, - {"t1", 9, 0}, - {"t2", 10, 0}, - {"t3", 11, 0}, - {"t4", 12, 0}, - {"t5", 13, 0}, - {"t6", 14, 0}, - {"t7", 15, 0}, - {"t8", 24, 0}, - {"t9", 25, 0}, - {"v0", 2, 0}, - {"v1", 3, 0}, - {"zero", 0, 0} -}; - -int -register_name_to_number (char *name) -{ - int c1 = *name, c2 = *(name + 1); - - if ('0' <= c1 && c1 <= '9' - && (c2 == '\0' || (('0' <= c2 && c2 <= '9') && *(name + 2) == '\0'))) - return (atoi (name)); - else if (c1 == 'f' && c2 >= '0' && c2 <= '9') - return atoi (name + 1); - else - { - name_val_val *entry = - map_string_to_name_val_val (register_tbl, - sizeof (register_tbl) / sizeof (name_val_val), - name); - if (entry == NULL) - return (-1); - else - return (entry->value1); - } -} - - -/* Exactly once, return the current source line, as a printable string - with a line number. Subsequent calls receive NULL instead of the - line. */ - -char * -source_line () -{ - if (line_returned) - return (NULL); - else if (current_line == NULL) /* Error on line */ - return (NULL); - else - { - char *eol1, c1; - char *null1 = NULL; - char *r; - - /* Find end of line: */ - for (eol1 = current_line; *eol1 != '\0' && *eol1 != '\n'; ) eol1 += 1; - -#ifdef FLEX_SCANNER - /* Ran into null byte, inserted by yylex. In necessary, look further - for newline. (This only works for scanners produced by flex. Other - versions of lex need similar code, or source code lines will end - early. */ - if (*eol1 == '\0' && yy_hold_char != '\n') - { - null1 = eol1; - *eol1 = yy_hold_char; - for ( ; *eol1 != '\0' && *eol1 != '\n'; ) - eol1 += 1; - } -#endif - - /* Save end-of-line character and null terminate string so it can - be printed. */ - c1 = *eol1; - *eol1 = '\0'; - - r = (char *) xmalloc (eol1 - current_line + 10); - sprintf (r, "%d: %s", current_line_no, current_line); - - /* Restore end-of-line character and, if necessary, yylex's null byte. */ - *eol1 = c1; - if (null1 != NULL) - { - *null1 = '\0'; - } - line_returned = 1; - return ((char *) r); - } -} diff --git a/spim-jsspim/CPU/spim-syscall.h b/spim-jsspim/CPU/spim-syscall.h deleted file mode 100644 index f350f07..0000000 --- a/spim-jsspim/CPU/spim-syscall.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPIM S20 MIPS simulator. - System calls implemented by simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#define PRINT_INT_SYSCALL 1 -#define PRINT_FLOAT_SYSCALL 2 -#define PRINT_DOUBLE_SYSCALL 3 -#define PRINT_STRING_SYSCALL 4 -#define READ_INT_SYSCALL 5 -#define READ_FLOAT_SYSCALL 6 -#define READ_DOUBLE_SYSCALL 7 -#define READ_STRING_SYSCALL 8 -#define SBRK_SYSCALL 9 -#define EXIT_SYSCALL 10 -#define PRINT_CHARACTER_SYSCALL 11 -#define READ_CHARACTER_SYSCALL 12 - -#define OPEN_SYSCALL 13 -#define READ_SYSCALL 14 -#define WRITE_SYSCALL 15 -#define CLOSE_SYSCALL 16 - -#define EXIT2_SYSCALL 17 diff --git a/spim-jsspim/CPU/spim-utils.cpp b/spim-jsspim/CPU/spim-utils.cpp deleted file mode 100755 index 562b653..0000000 --- a/spim-jsspim/CPU/spim-utils.cpp +++ /dev/null @@ -1,628 +0,0 @@ -/* SPIM S20 MIPS simulator. - Misc. routines for SPIM. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include -#include -#include - -#include "spim.h" -#include "version.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "data.h" -#include "reg.h" -#include "mem.h" -#include "scanner.h" -#include "parser.h" -#include "parser_yacc.h" -#include "run.h" -#include "sym-tbl.h" - - -/* Internal functions: */ - -static mem_addr copy_int_to_stack (int n); -static mem_addr copy_str_to_stack (char *s); -static void delete_all_breakpoints (); - - -int exception_occurred; - -int initial_text_size = TEXT_SIZE; - -int initial_data_size = DATA_SIZE; - -mem_addr initial_data_limit = DATA_LIMIT; - -int initial_stack_size = STACK_SIZE; - -mem_addr initial_stack_limit = STACK_LIMIT; - -int initial_k_text_size = K_TEXT_SIZE; - -int initial_k_data_size = K_DATA_SIZE; - -mem_addr initial_k_data_limit = K_DATA_LIMIT; - - - -/* Initialize or reinitialize the state of the machine. */ - -void -initialize_world (char* exception_file_names, bool print_message) -{ - /* Allocate the floating point registers */ - if (FGR == NULL) - FPR = (double *) xmalloc (FPR_LENGTH * sizeof (double)); - /* Allocate the memory */ - make_memory (initial_text_size, - initial_data_size, initial_data_limit, - initial_stack_size, initial_stack_limit, - initial_k_text_size, - initial_k_data_size, initial_k_data_limit); - initialize_registers (); - initialize_inst_tables (); - initialize_symbol_table (); - k_text_begins_at_point (K_TEXT_BOT); - k_data_begins_at_point (K_DATA_BOT); - data_begins_at_point (DATA_BOT); - text_begins_at_point (TEXT_BOT); - - if (exception_file_names != NULL) - { - bool old_bare = bare_machine; - bool old_accept = accept_pseudo_insts; - char *filename; - char *files; - - /* Save machine state */ - bare_machine = false; /* Exception handler uses extended machine */ - accept_pseudo_insts = true; - - /* strtok modifies the string, so we must back up the string prior to use. */ - if ((files = strdup (exception_file_names)) == NULL) - fatal_error ("Insufficient memory to complete.\n"); - - for (filename = strtok (files, ";"); filename != NULL; filename = strtok (NULL, ";")) - { - if (!read_assembly_file (filename)) - fatal_error ("Cannot read exception handler: %s\n", filename); - - if (print_message) - write_output (message_out, "Loaded: %s\n", filename); - } - - free (files); - - /* Restore machine state */ - bare_machine = old_bare; - accept_pseudo_insts = old_accept; - - if (!bare_machine) - { - (void)make_label_global ("main"); /* In case .globl main forgotten */ - (void)record_label ("main", 0, 0); - } - } - initialize_scanner (stdin); - delete_all_breakpoints (); -} - - -void -write_startup_message () -{ - write_output (message_out, "SPIM %s\n", SPIM_VERSION); - write_output (message_out, "Copyright 1990-2017 by James Larus.\n"); - write_output (message_out, "All Rights Reserved.\n"); - write_output (message_out, "SPIM is distributed under a BSD license.\n"); - write_output (message_out, "See the file README for a full copyright notice.\n"); -} - - - -void -initialize_registers () -{ - memclr (FPR, FPR_LENGTH * sizeof (double)); - FGR = (float *) FPR; - FWR = (int *) FPR; - - memclr (R, R_LENGTH * sizeof (reg_word)); - R[REG_SP] = STACK_TOP - BYTES_PER_WORD - 4096; /* Initialize $sp */ - HI = LO = 0; - PC = 0; - - CP0_BadVAddr = 0; - CP0_Count = 0; - CP0_Compare = 0; - CP0_Status = (CP0_Status_CU & 0x30000000) | CP0_Status_IM | CP0_Status_UM; - CP0_Cause = 0; - CP0_EPC = 0; -#ifdef SPIM_BIGENDIAN - CP0_Config = CP0_Config_BE; -#else - CP0_Config = 0; -#endif - - FIR = FIR_W | FIR_D | FIR_S; /* Word, double, & single implemented */ - FCSR = 0x0; - FCCR = 0x0; - FEXR = 0x0; - FENR = 0x0; -} - - -/* Read file NAME, which should contain assembly code. Return true if - successful and false otherwise. */ - -bool -read_assembly_file (char *name) -{ - FILE *file = fopen (name, "rt"); - - if (file == NULL) - { - error ("Cannot open file: `%s'\n", name); - return false; - } - else - { - initialize_scanner (file); - initialize_parser (name); - - while (!yyparse ()) ; - - fclose (file); - flush_local_labels (!parse_error_occurred); - end_of_assembly_file (); - return true; - } -} - - -mem_addr -starting_address () -{ - return (find_symbol_address (DEFAULT_RUN_LOCATION)); -} - - -#define MAX_ARGS 10000 - -/* Initialize the SPIM stack from a string containing the command line. */ - -void -initialize_stack(const char *command_line) -{ - int argc = 0; - char *argv[MAX_ARGS]; - char *a; - char *args = str_copy((char*)command_line); /* Destructively modify string */ - char *orig_args = args; - - while (*args != '\0') - { - /* Skip leading blanks */ - while (*args == ' ' || *args == '\t') args++; - - /* First non-blank char */ - a = args; - - /* Last non-blank, non-null char */ - while (*args != ' ' && *args != '\t' && *args != '\0') args++; - - /* Terminate word */ - if (a != args) - { - if (*args != '\0') - *args++ = '\0'; /* Null terminate */ - - argv[argc++] = a; - - if (MAX_ARGS == argc) - { - break; /* If too many, ignore rest of list */ - } - } - } - - initialize_run_stack (argc, argv); - free (orig_args); -} - - -/* Initialize the SPIM stack with ARGC, ARGV, and ENVP data. */ - -#ifdef _MSC_VER -#define environ _environ -#endif - -void -initialize_run_stack (int argc, char **argv) -{ - char **p; - extern char **environ; - int i, j = 0, env_j; - mem_addr addrs[10000]; - - - R[REG_SP] = STACK_TOP - 1; /* Initialize $sp */ - - /* Put strings on stack: */ - /* env: */ - for (p = environ; *p != NULL; p++) - addrs[j++] = copy_str_to_stack (*p); - env_j = j; - - /* argv; */ - for (i = 0; i < argc; i++) - addrs[j++] = copy_str_to_stack (argv[i]); - - /* Align stack pointer for word-size data */ - R[REG_SP] = R[REG_SP] & ~3; /* Round down to nearest word */ - R[REG_SP] -= BYTES_PER_WORD; /* First free word on stack */ - R[REG_SP] = R[REG_SP] & ~7; /* Double-word align stack-pointer*/ - - /* Build vectors on stack: */ - /* env: */ - (void)copy_int_to_stack (0); /* Null-terminate vector */ - for (i = env_j - 1; i >= 0; i--) - R[REG_A2] = copy_int_to_stack (addrs[i]); - - /* argv: */ - (void)copy_int_to_stack (0); /* Null-terminate vector */ - for (i = j - 1; i >= env_j; i--) - R[REG_A1] = copy_int_to_stack (addrs[i]); - - /* argc: */ - R[REG_A0] = argc; - set_mem_word (R[REG_SP], argc); /* Leave argc on stack */ -} - - -static mem_addr -copy_str_to_stack (char *s) -{ - int i = (int)strlen (s); - while (i >= 0) - { - set_mem_byte (R[REG_SP], s[i]); - R[REG_SP] -= 1; - i -= 1; - } - return ((mem_addr) R[REG_SP] + 1); /* Leaves stack pointer byte-aligned!! */ -} - - -static mem_addr -copy_int_to_stack (int n) -{ - set_mem_word (R[REG_SP], n); - R[REG_SP] -= BYTES_PER_WORD; - return ((mem_addr) R[REG_SP] + BYTES_PER_WORD); -} - - -/* Run the program, starting at PC, for STEPS instructions. Display each - instruction before executing if DISPLAY is true. If CONT_BKPT is - true, then step through a breakpoint. CONTINUABLE is true if - execution can continue. Return true if breakpoint is encountered. */ - -bool -run_program (mem_addr pc, int steps, bool display, bool cont_bkpt, bool* continuable) -{ - if (cont_bkpt && inst_is_breakpoint (pc)) - { - mem_addr addr = PC == 0 ? pc : PC; - - delete_breakpoint (addr); - exception_occurred = 0; - *continuable = run_spim (addr, 1, display); - add_breakpoint (addr); - steps -= 1; - pc = PC; - } - - exception_occurred = 0; - *continuable = run_spim (pc, steps, display); - if (exception_occurred && CP0_ExCode == ExcCode_Bp) - { - /* Turn off EXL bit, so subsequent interrupts set EPC since the break is - handled by SPIM code, not MIPS code. */ - CP0_Status &= ~CP0_Status_EXL; - return true; - } - else - return false; -} - - -/* Record of where a breakpoint was placed and the instruction previously - in memory. */ - -typedef struct bkptrec -{ - mem_addr addr; - instruction *inst; - struct bkptrec *next; -} bkpt; - - -static bkpt *bkpts = NULL; - - -/* Set a breakpoint at memory location ADDR. */ - -void -add_breakpoint (mem_addr addr) -{ - bkpt *rec = (bkpt *) xmalloc (sizeof (bkpt)); - - rec->next = bkpts; - rec->addr = addr; - - if ((rec->inst = set_breakpoint (addr)) != NULL) - bkpts = rec; - else - { - if (exception_occurred) - error ("Cannot put a breakpoint at address 0x%08x\n", addr); - else - error ("No instruction to breakpoint at address 0x%08x\n", addr); - free (rec); - } -} - - -/* Delete all breakpoints at memory location ADDR. */ - -void -delete_breakpoint (mem_addr addr) -{ - bkpt *p, *b; - int deleted_one = 0; - - for (p = NULL, b = bkpts; b != NULL; ) - if (b->addr == addr) - { - bkpt *n; - - set_mem_inst (addr, b->inst); - if (p == NULL) - bkpts = b->next; - else - p->next = b->next; - n = b->next; - free (b); - b = n; - deleted_one = 1; - } - else - p = b, b = b->next; - if (!deleted_one) - error ("No breakpoint to delete at 0x%08x\n", addr); -} - - -static void -delete_all_breakpoints () -{ - bkpt *b, *n; - - for (b = bkpts, n = NULL; b != NULL; b = n) - { - n = b->next; - free (b); - } - bkpts = NULL; -} - - -/* List all breakpoints. */ - -void -list_breakpoints () -{ - bkpt *b; - - if (bkpts) - for (b = bkpts; b != NULL; b = b->next) - write_output (message_out, "Breakpoint at 0x%08x\n", b->addr); - else - write_output (message_out, "No breakpoints set\n"); -} - - - -/* Utility routines */ - - -/* Return the entry in the linear TABLE of length LENGTH with key STRING. - TABLE must be sorted on the key field. - Return NULL if no such entry exists. */ - -name_val_val * -map_string_to_name_val_val (name_val_val tbl[], int tbl_len, char *id) -{ - int low = 0; - int hi = tbl_len - 1; - - while (low <= hi) - { - int mid = (low + hi) / 2; - char *idp = id, *np = tbl[mid].name; - - while (*idp == *np && *idp != '\0') {idp ++; np ++;} - - if (*np == '\0' && *idp == '\0') /* End of both strings */ - return (& tbl[mid]); - else if (*idp > *np) - low = mid + 1; - else - hi = mid - 1; - } - - return NULL; -} - - -/* Return the entry in the linear TABLE of length LENGTH with VALUE1 field NUM. - TABLE must be sorted on the VALUE1 field. - Return NULL if no such entry exists. */ - -name_val_val * -map_int_to_name_val_val (name_val_val tbl[], int tbl_len, int num) -{ - int low = 0; - int hi = tbl_len - 1; - - while (low <= hi) - { - int mid = (low + hi) / 2; - - if (tbl[mid].value1 == num) - return (&tbl[mid]); - else if (num > tbl[mid].value1) - low = mid + 1; - else - hi = mid - 1; - } - - return NULL; -} - - -#ifdef NEED_VSPRINTF -char * -vsprintf (str, fmt, args) - char *str,*fmt; - va_list *args; -{ - FILE _strbuf; - - _strbuf._flag = _IOWRT+_IOSTRG; - _strbuf._ptr = str; - _strbuf._cnt = 32767; - _doprnt(fmt, args, &_strbuf); - putc('\0', &_strbuf); - return(str); -} -#endif - - -#ifdef NEED_STRTOL -unsigned long -strtol (const char* str, const char** eptr, int base) -{ - long result; - - if (base != 0 && base != 16) - fatal_error ("SPIM's strtol only works for base 16 (not base %d)\n", base); - if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X')) - { - str += 2; - sscanf (str, "%lx", &result); - } - else if (base == 16) - { - sscanf (str, "%lx", &result); - } - else - { - sscanf (str, "%ld", &result); - } - return (result); -} -#endif - - -#ifdef NEED_STRTOUL -unsigned long -strtoul (const char* str, char** eptr, int base) -{ - unsigned long result; - - if (base != 0 && base != 16) - fatal_error ("SPIM's strtoul only works for base 16 (not base %d)\n", base); - if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X')) - { - str += 2; - sscanf (str, "%lx", &result); - } - else if (base == 16) - { - sscanf (str, "%lx", &result); - } - else - { - sscanf (str, "%ld", &result); - } - return (result); -} -#endif - - -char * -str_copy (char *str) -{ - return (strcpy ((char*)xmalloc ((int)strlen (str) + 1), str)); -} - - -void * -xmalloc (int size) -{ - void *x = (void *) malloc (size); - - if (x == 0) - fatal_error ("Out of memory at request for %d bytes.\n"); - return (x); -} - - -/* Allocate a zero'ed block of storage. */ - -void * -zmalloc (int size) -{ - void *z = (void *) malloc (size); - - if (z == 0) - fatal_error ("Out of memory at request for %d bytes.\n"); - - memclr (z, size); - return (z); -} diff --git a/spim-jsspim/CPU/spim-utils.h b/spim-jsspim/CPU/spim-utils.h deleted file mode 100755 index 33273c5..0000000 --- a/spim-jsspim/CPU/spim-utils.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to misc. routines for SPIM. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Triple containing a string and two integers. Used in tables - mapping from a name to values. */ - -typedef struct -{ - char *name; - int value1; - int value2; -} name_val_val; - - - -/* Exported functions: */ - -void add_breakpoint (mem_addr addr); -void delete_breakpoint (mem_addr addr); -void format_data_segs (str_stream *ss); -void format_insts (str_stream *ss, mem_addr from, mem_addr to); -void format_mem (str_stream *ss, mem_addr from, mem_addr to); -void format_registers (str_stream *ss, int print_gpr_hex, int print_fpr_hex); -void initialize_registers (); -void initialize_stack (const char *command_line); -void initialize_run_stack (int argc, char **argv); -void initialize_world (char *exception_file_names, bool print_message); -void list_breakpoints (); -name_val_val *map_int_to_name_val_val (name_val_val tbl[], int tbl_len, int num); -name_val_val *map_string_to_name_val_val (name_val_val tbl[], int tbl_len, char *id); -bool read_assembly_file (char *name); -bool run_program (mem_addr pc, int steps, bool display, bool cont_bkpt, bool* continuable); -mem_addr starting_address (); -char *str_copy (char *str); -void write_startup_message (); -void *xmalloc (int); -void *zmalloc (int); diff --git a/spim-jsspim/CPU/spim.h b/spim-jsspim/CPU/spim.h deleted file mode 100755 index 39aba75..0000000 --- a/spim-jsspim/CPU/spim.h +++ /dev/null @@ -1,260 +0,0 @@ -/* SPIM S20 MIPS simulator. - Definitions for the SPIM S20. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef NULL -#define NULL 0 -#endif - -/* This declaration must match the endianness of the machine SPIM is running on. You CANNOT - set SPIM to simulate a different endianness than the machine that executes it. Almost - every processor (notably the x86) is little endian today. If your machine is big endian, - define -DSPIM_BIGENDIAN in the Makefile. */ - -#ifndef SPIM_BIGENDIAN -#define SPIM_LITTLENDIAN -#endif - - -/* Type declarations for portability. They work for DEC's Alpha (64 bits) - and 32 bit machines */ - -typedef int int32; -typedef unsigned int uint32; -typedef union {int i; void* p;} intptr_union; - - -#define streq(s1, s2) !strcmp(s1, s2) - - -/* Round V to next greatest B boundary */ -#define ROUND_UP(V, B) (((int) V + (B-1)) & ~(B-1)) -#define ROUND_DOWN(V, B) (((int) V) & ~(B-1)) - -/* Sign-extend an int16 to an int32 */ -#define SIGN_EX(X) (((X) & 0x8000) ? ((X) | 0xffff0000) : (X)) - - -#ifdef MIN /* Some systems define these in system includes */ -#undef MIN -#endif -#ifdef MAX -#undef MAX -#endif -#define MIN(A, B) ((A) < (B) ? (A) : (B)) -#define MAX(A, B) ((A) > (B) ? (A) : (B)) - - -/* Useful and pervasive declarations: */ - -#ifdef NEED_MEM_FUNCTIONS -#define memcpy(T, F, S) bcopy((void*)F, (void*)T, S) -#define memclr(B, S) bzero(B, S) -#define memcmp(S1, S2, N) bcmp(S1, S2, N) -#else -#include -#define memclr(B, S) memset((void*)B, 0, S) -#endif - -#include -#include -#define QSORT_FUNC int(*)(const void *, const void *) - - - -#define K 1024 - - -/* Type of a memory address. Must be a 32-bit quantity to match MIPS. */ - -typedef uint32 /*@alt int @*/ mem_addr; - - -#define BYTES_PER_WORD 4 /* On the MIPS processor */ - - -/* Sizes of memory segments. */ - -/* Initial size of text segment. */ - -#ifndef TEXT_SIZE -#define TEXT_SIZE (256*K) /* 1/4 MB */ -#endif - -/* Initial size of k_text segment. */ - -#ifndef K_TEXT_SIZE -#define K_TEXT_SIZE (64*K) /* 64 KB */ -#endif - -/* The data segment must be larger than 64K since we immediate grab - 64K for the small data segment pointed to by $gp. The data segment is - expanded by an sbrk system call. */ - -/* Initial size of data segment. */ - -#ifndef DATA_SIZE -#define DATA_SIZE (256*K) /* 1/4 MB */ -#endif - -/* Maximum size of data segment. */ - -#ifndef DATA_LIMIT -#define DATA_LIMIT (K*K) /* 1 MB */ -#endif - -/* Initial size of k_data segment. */ - -#ifndef K_DATA_SIZE -#define K_DATA_SIZE (64*K) /* 64 KB */ -#endif - -/* Maximum size of k_data segment. */ - -#ifndef K_DATA_LIMIT -#define K_DATA_LIMIT (K*K) /* 1 MB */ -#endif - -/* The stack grows down automatically. */ - -/* Initial size of stack segment. */ - -#ifndef STACK_SIZE -#define STACK_SIZE (64*K) /* 64 KB */ -#endif - -/* Maximum size of stack segment. */ - -#ifndef STACK_LIMIT -#define STACK_LIMIT (256*K) /* 1/4 MB */ -#endif - - -/* Name of the function to invoke at start up */ - -#define DEFAULT_RUN_LOCATION "__start" - - -/* Name of the symbol marking the end of the exception handler */ - -#define END_OF_TRAP_HANDLER_SYMBOL "__eoth" - - -/* Default number of instructions to execute. */ - -#define DEFAULT_RUN_STEPS 2147483647 - - -/* Address to branch to when exception occurs */ -#ifdef MIPS1 -/* MIPS R2000 */ -#define EXCEPTION_ADDR 0x80000080 -#else -/* MIPS32 */ -#define EXCEPTION_ADDR 0x80000180 -#endif - -/* Maximum size of object stored in the small data segment pointed to by $gp */ - -#define SMALL_DATA_SEG_MAX_SIZE 8 - -#ifndef DIRECT_MAPPED -#define DIRECT_MAPPED 0 -#define TWO_WAY_SET 1 -#endif - - -/* Interval (in instructions) at which memory-mapped IO registers are - checked and updated. (This is to reduce overhead from making system calls - to check for IO. It can be set as low as 1.) */ - -#define IO_INTERVAL 100 - - -/* Number of IO_INTERVALs that a character remains in receiver buffer, - even if another character is available. */ - -#define RECV_INTERVAL 100 - - -/* Number of IO_INTERVALs that it takes to write a character. */ - -#define TRANS_LATENCY 100 - - -/* Iterval (milliseconds) for the hardware timer in CP0. */ - -#define TIMER_TICK_MS 10 /* 100 times per second */ - - - -/* A port is either a Unix file descriptor (an int) or a FILE* pointer. */ - -#include - -typedef union {int i; FILE* f;} port; - - -/* Exported functions (from spim.c or xspim.c): */ - -int console_input_available (); -void error (char *fmt, ...); -void fatal_error (char *fmt, ...); -char get_console_char (); -void put_console_char (char c); -void read_input (char *str, int n); -void run_error (char *fmt, ...); -void write_output (port, char *fmt, ...); - - -/* Exported variables: */ - -extern bool bare_machine; /* => simulate bare machine */ -extern bool accept_pseudo_insts; /* => parse pseudo instructions */ -extern bool delayed_branches; /* => simulate delayed branches */ -extern bool delayed_loads; /* => simulate delayed loads */ -extern bool quiet; /* => no warning messages */ -extern char *exception_file_name; /* File containing exception handler */ -extern bool force_break; /* => stop interpreter loop */ -extern bool parser_error_occurred; /* => parse resulted in error */ -extern int spim_return_value; /* Value returned when spim exits */ -/* Actual type of structure pointed to depends on X/terminal interface */ -extern port message_out, console_out, console_in; -extern bool mapped_io; /* => activate memory-mapped IO */ -extern int initial_text_size; -extern int initial_data_size; -extern mem_addr initial_data_limit; -extern int initial_stack_size; -extern mem_addr initial_stack_limit; -extern int initial_k_text_size; -extern int initial_k_data_size; -extern mem_addr initial_k_data_limit; diff --git a/spim-jsspim/CPU/string-stream.cpp b/spim-jsspim/CPU/string-stream.cpp deleted file mode 100755 index a083247..0000000 --- a/spim-jsspim/CPU/string-stream.cpp +++ /dev/null @@ -1,142 +0,0 @@ -/* SPIM S20 MIPS simulator. - Append-only output stream convertable to a string. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include -#include - -#include "spim.h" -#include "string-stream.h" - - -#ifndef SS_BUF_LENGTH -/* Initialize length of buffer */ -#define SS_BUF_LENGTH 256 -#endif - - -void -ss_init (str_stream* ss) -{ - ss->buf = (char *) malloc (SS_BUF_LENGTH); - ss->max_length = SS_BUF_LENGTH; - ss->empty_pos = 0; - ss->initialized = 1; -} - - -void -ss_clear (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - ss->empty_pos = 0; -} - - -void -ss_erase (str_stream* ss, int n) -{ - if (0 == ss->initialized) ss_init (ss); - - ss->empty_pos -= n; - if (ss->empty_pos <0) ss->empty_pos = 0; -} - - -int -ss_length (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - return ss->empty_pos; -} - - -char* -ss_to_string (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - if (ss->empty_pos == ss->max_length) - { - /* Not enough room to store output: increase buffer size and try again */ - ss->max_length = ss->max_length + 1; - ss->buf = (char *) realloc (ss->buf, (size_t)ss->max_length); - if (NULL == ss->buf) - fatal_error ("realloc failed\n"); - } - ss->buf[ss->empty_pos] = '\0'; /* Null terminate string */ - ss->empty_pos += 1; - return ss->buf; -} - - -void -ss_printf (str_stream* ss, char* fmt, ...) -{ - int free_space; - int n; - va_list args; - - va_start (args, fmt); - - if (0 == ss->initialized) ss_init (ss); - - free_space = ss->max_length - ss->empty_pos; -#ifdef _WIN32 - /* Returns -1 when buffer is too small */ - while ((n = _vsnprintf (ss->buf + ss->empty_pos, free_space, fmt, args)) < 0) -#else - /* Returns necessary space when buffer is too small */ - while ((n = vsnprintf (ss->buf + ss->empty_pos, free_space, fmt, args)) >= free_space) -#endif - { - /* Not enough room to store output: double buffer size and try again */ - ss->max_length = 2 * ss->max_length; - ss->buf = (char *) realloc (ss->buf, (size_t)ss->max_length); - free_space = ss->max_length - ss->empty_pos; - if (NULL == ss->buf) - fatal_error ("realloc failed\n"); - - va_end (args); /* Restart argument pointer */ - va_start (args, fmt); - } - ss->empty_pos += n; - - /* Null terminate string (for debugging) if there is enough room*/ - if (ss->empty_pos < ss->max_length) - ss->buf[ss->empty_pos] = '\0'; - - va_end (args); -} diff --git a/spim-jsspim/CPU/string-stream.h b/spim-jsspim/CPU/string-stream.h deleted file mode 100755 index 1766b67..0000000 --- a/spim-jsspim/CPU/string-stream.h +++ /dev/null @@ -1,48 +0,0 @@ -/* SPIM S20 MIPS simulator. - Append-only output stream convertable to a string. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -typedef struct str_stm -{ - char* buf; /* Buffer containing output */ - int max_length; /* Length of buffer */ - int empty_pos; /* Index of empty char in stream*/ - int initialized; /* Stream initialized? */ -} str_stream; - - -void ss_init (str_stream* ss); -void ss_clear (str_stream* ss); -void ss_erase (str_stream* ss, int n); -int ss_length (str_stream* ss); -char* ss_to_string (str_stream* ss); -void ss_printf (str_stream* ss, char* fmt, ...); diff --git a/spim-jsspim/CPU/sym-tbl.cpp b/spim-jsspim/CPU/sym-tbl.cpp deleted file mode 100755 index b2490b5..0000000 --- a/spim-jsspim/CPU/sym-tbl.cpp +++ /dev/null @@ -1,518 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to maintain symbol table to resolve symbolic labels. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "data.h" -#include "parser.h" -#include "sym-tbl.h" -#include "parser_yacc.h" - - -/* Local functions: */ - -static void get_hash (char *name, int *slot_no, label **entry); -static void resolve_a_label_sub (label *sym, instruction *inst, mem_addr pc); - - - -/* Keep track of the memory location that a label represents. If we - see a reference to a label that is not yet defined, then record the - reference so that we can patch up the instruction when the label is - defined. - - At the end of a file, we flush the hash table of all non-global - labels so they can't be seen in other files. */ - - -static label *local_labels = NULL; /* Labels local to current file. */ - - -#define HASHBITS 30 - -#define LABEL_HASH_TABLE_SIZE 8191 - - -/* Map from name of a label to a label structure. */ - -static label *label_hash_table [LABEL_HASH_TABLE_SIZE]; - - -/* Initialize the symbol table by removing and freeing old entries. */ - -void -initialize_symbol_table () -{ - int i; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - { - label *x, *n; - - for (x = label_hash_table [i]; x != NULL; x = n) - { - free (x->name); - n = x->next; - free (x); - } - label_hash_table [i] = NULL; - } - - local_labels = NULL; -} - - - -/* Lookup for a label with the given NAME. Set the SLOT_NO to be the hash - table bucket that contains (or would contain) the label's record. If the - record is already in the table, set ENTRY to point to it. Otherwise, - set ENTRY to be NULL. */ - -static void -get_hash (char *name, int *slot_no, label **entry) -{ - int hi; - int i; - label *lab; - int len; - - /* Compute length of name in len. */ - for (len = 0; name[len]; len++) ; - - /* Compute hash code */ - hi = len; - for (i = 0; i < len; i++) - hi = ((hi * 613) + (unsigned)(name[i])); - - hi &= (1 << HASHBITS) - 1; - hi %= LABEL_HASH_TABLE_SIZE; - - *slot_no = hi; - /* Search table for entry */ - for (lab = label_hash_table [hi]; lab; lab = lab->next) - if (streq (lab->name, name)) - { - *entry = lab; /* <-- return if found */ - return; - } - *entry = NULL; -} - - -/* Lookup label with NAME. Either return its symbol table entry or NULL - if it is not in the table. */ - -label * -label_is_defined (char *name) -{ - int hi; - label *entry; - - get_hash (name, &hi, &entry); - - return (entry); -} - - -/* Return a label with a given NAME. If an label with that name has - previously been looked-up, the same node is returned this time. */ - -label * -lookup_label (char *name) -{ - int hi; - label *entry, *lab; - - get_hash (name, &hi, &entry); - - if (entry != NULL) - return (entry); - - /* Not found, create one, add to chain */ - lab = (label *) xmalloc (sizeof (label)); - lab->name = str_copy (name); - lab->addr = 0; - lab->global_flag = 0; - lab->const_flag = 0; - lab->gp_flag = 0; - lab->uses = NULL; - - lab->next = label_hash_table [hi]; - label_hash_table [hi] = lab; - return lab; /* <-- return if created */ -} - - -/* Record that the label named NAME refers to ADDRESS. If RESOLVE_USES is - true, resolve all references to it. Return the label structure. */ - -label * -record_label (char *name, mem_addr address, int resolve_uses) -{ - label *l = lookup_label (name); - - if (!l->gp_flag) - { - if (l->addr != 0) - { - yyerror ("Label is defined for the second time"); - return (l); - } - l->addr = address; - } - - if (resolve_uses) - { - resolve_label_uses (l); - } - - if (!l->global_flag) - { - l->next_local = local_labels; - local_labels = l; - } - return (l); -} - - -/* Make the label named NAME global. Return its symbol. */ - -label * -make_label_global (char *name) -{ - label *l = lookup_label (name); - - l->global_flag = 1; - return (l); -} - - -/* Record that an INSTRUCTION uses the as-yet undefined SYMBOL. */ - -void -record_inst_uses_symbol (instruction *inst, label *sym) -{ - label_use *u = (label_use *) xmalloc (sizeof (label_use)); - - if (data_dir) /* Want to free up original instruction */ - { - u->inst = copy_inst (inst); - u->addr = current_data_pc (); - } - else - { - u->inst = inst; - u->addr = current_text_pc (); - } - u->next = sym->uses; - sym->uses = u; -} - - -/* Record that a memory LOCATION uses the as-yet undefined SYMBOL. */ - -void -record_data_uses_symbol (mem_addr location, label *sym) -{ - label_use *u = (label_use *) xmalloc (sizeof (label_use)); - - u->inst = NULL; - u->addr = location; - u->next = sym->uses; - sym->uses = u; -} - - -/* Given a newly-defined LABEL, resolve the previously encountered - instructions and data locations that refer to the label. */ - -void -resolve_label_uses (label *sym) -{ - label_use *use; - label_use *next_use; - - for (use = sym->uses; use != NULL; use = next_use) - { - resolve_a_label_sub (sym, use->inst, use->addr); - if (use->inst != NULL && use->addr >= DATA_BOT && use->addr < stack_bot) - { - set_mem_word (use->addr, inst_encode (use->inst)); - free_inst (use->inst); - } - next_use = use->next; - free (use); - } - sym->uses = NULL; -} - - -/* Resolve the newly-defined label in INSTRUCTION. */ - -void -resolve_a_label (label *sym, instruction *inst) -{ - resolve_a_label_sub (sym, - inst, - (data_dir ? current_data_pc () : current_text_pc ())); -} - - -static void -resolve_a_label_sub (label *sym, instruction *inst, mem_addr pc) -{ - if (inst == NULL) - { - /* Memory data: */ - set_mem_word (pc, sym->addr); - } - else - { - /* Instruction: */ - if (EXPR (inst)->pc_relative) - EXPR (inst)->offset = 0 - pc; /* Instruction may have moved */ - - if (EXPR (inst)->symbol == NULL - || SYMBOL_IS_DEFINED (EXPR (inst)->symbol)) - { - int32 value; - int32 field_mask; - - if (opcode_is_branch (OPCODE (inst))) - { - int val; - - /* Drop low two bits since instructions are on word boundaries. */ - val = SIGN_EX (eval_imm_expr (EXPR (inst))); /* 16->32 bits */ - val = (val >> 2) & 0xffff; /* right shift, 32->16 bits */ - - if (delayed_branches) - val -= 1; - - value = val; - field_mask = 0xffff; - } - else if (opcode_is_jump (OPCODE (inst))) - { - value = eval_imm_expr (EXPR (inst)); - if ((value & 0xf0000000) != (pc & 0xf0000000)) - { - error ("Target of jump differs in high-order 4 bits from instruction pc 0x%x\n", pc); - } - /* Drop high four bits, since they come from the PC and the - low two bits since instructions are on word boundaries. */ - value = (value & 0x0fffffff) >> 2; - field_mask = 0xffffffff; /* Already checked that value fits in instruction */ - } - else if (opcode_is_load_store (OPCODE (inst))) - { - /* Label's location is an address */ - value = eval_imm_expr (EXPR (inst)); - field_mask = 0xffff; - - if (value & 0x8000) - { - /* LW/SW sign extends offset. Compensate by adding 1 to high 16 bits. */ - instruction* prev_inst; - instruction* prev_prev_inst; - prev_inst = read_mem_inst (pc - BYTES_PER_WORD); - prev_prev_inst = read_mem_inst (pc - 2 * BYTES_PER_WORD); - - if (prev_inst != NULL - && OPCODE (prev_inst) == Y_LUI_OP - && EXPR (inst)->symbol == EXPR (prev_inst)->symbol - && IMM (prev_inst) == 0) - { - /* Check that previous instruction was LUI and it has no immediate, - otherwise it will have compensated for sign-extension */ - EXPR (prev_inst)->offset += 0x10000; - } - /* There is an ADDU instruction before the LUI if the - LW/SW instruction uses an index register: skip over the ADDU. */ - else if (prev_prev_inst != NULL - && OPCODE (prev_prev_inst) == Y_LUI_OP - && EXPR (inst)->symbol == EXPR (prev_prev_inst)->symbol - && IMM (prev_prev_inst) == 0) - { - EXPR (prev_prev_inst)->offset += 0x10000; - } - } - } - else - { - /* Label's location is a value */ - value = eval_imm_expr (EXPR (inst)); - field_mask = 0xffff; - } - - if ((value & ~field_mask) != (int32)0 - && (value & ~field_mask) != (int32)0xffff0000) - { - error ("Immediate value is too large for field: "); - print_inst (pc); - } - if (opcode_is_jump (OPCODE (inst))) - SET_TARGET (inst, value); /* Don't mask so it is sign-extended */ - else - SET_IMM (inst, value); /* Ditto */ - SET_ENCODING (inst, inst_encode (inst)); - } - else - error ("Resolving undefined symbol: %s\n", - (EXPR (inst)->symbol == NULL) ? "" : EXPR (inst)->symbol->name); - } -} - - -/* Remove all local (non-global) label from the table. */ - -void -flush_local_labels (int issue_undef_warnings) -{ - label *l; - - for (l = local_labels; l != NULL; l = l->next_local) - { - int hi; - label *entry, *lab, *p; - - get_hash (l->name, &hi, &entry); - - for (lab = label_hash_table [hi], p = NULL; - lab; - p = lab, lab = lab->next) - if (lab == entry) - { - if (p == NULL) - label_hash_table [hi] = lab->next; - else - p->next = lab->next; - if (issue_undef_warnings && entry->addr == 0 && !entry->const_flag) - error ("Warning: local symbol %s was not defined\n", - entry->name); - /* Can't free label since IMM_EXPR's still reference it */ - break; - } - } - local_labels = NULL; -} - - -/* Return the address of SYMBOL or 0 if it is undefined. */ - -mem_addr -find_symbol_address (char *symbol) -{ - label *l = lookup_label (symbol); - - if (l == NULL || l->addr == 0) - return 0; - else - return (l->addr); -} - - -/* Print all symbols in the table. */ - -void -print_symbols () -{ - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table [i]; l != NULL; l = l->next) - write_output (message_out, "%s%s at 0x%08x\n", - l->global_flag ? "g\t" : "\t", l->name, l->addr); -} - - -/* Print all undefined symbols in the table. */ - -void -print_undefined_symbols () -{ - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table [i]; l != NULL; l = l->next) - if (l->addr == 0) - write_output (message_out, "%s\n", l->name); -} - - -/* Return a string containing the names of all undefined symbols in the - table, seperated by a newline character. Return NULL if no symbols - are undefined. */ - -char * -undefined_symbol_string () -{ - int buffer_length = 128; - int string_length = 0; - char *buffer = (char*)malloc(buffer_length); - - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table[i]; l != NULL; l = l->next) - if (l->addr == 0) - { - int name_length = (int)strlen(l->name); - int after_length = string_length + name_length + 2; - if (buffer_length < after_length) - { - buffer_length = MAX (2 * buffer_length, 2 * after_length); - buffer = (char*)realloc (buffer, buffer_length); - } - memcpy (buffer + string_length, l->name, name_length); - string_length += name_length; - buffer[string_length] = '\n'; - string_length += 1; - buffer[string_length] = '\0'; /* After end of string */ - } - - if (string_length != 0) - return (buffer); - else - { - free (buffer); - return (NULL); - }; -} diff --git a/spim-jsspim/CPU/sym-tbl.h b/spim-jsspim/CPU/sym-tbl.h deleted file mode 100755 index 94760f3..0000000 --- a/spim-jsspim/CPU/sym-tbl.h +++ /dev/null @@ -1,76 +0,0 @@ -/* SPIM S20 MIPS simulator. - Data structures for symbolic addresses. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -typedef struct lab_use -{ - instruction *inst; /* NULL => Data, not code */ - mem_addr addr; - struct lab_use *next; -} label_use; - - -/* Symbol table information on a label. */ - -typedef struct lab -{ - char *name; /* Name of label */ - long addr; /* Address of label or 0 if not yet defined */ - unsigned global_flag : 1; /* Non-zero => declared global */ - unsigned gp_flag : 1; /* Non-zero => referenced off gp */ - unsigned const_flag : 1; /* Non-zero => constant value (in addr) */ - struct lab *next; /* Hash table link */ - struct lab *next_local; /* Link in list of local labels */ - label_use *uses; /* List of instructions that reference */ -} label; /* label that has not yet been defined */ - - -#define SYMBOL_IS_DEFINED(SYM) ((SYM)->addr != 0) - - - -/* Exported functions: */ - -mem_addr find_symbol_address (char *symbol); -void flush_local_labels (int issue_undef_warnings); -void initialize_symbol_table (); -label *label_is_defined (char *name); -label *lookup_label (char *name); -label *make_label_global (char *name); -void print_symbols (); -void print_undefined_symbols (); -label *record_label (char *name, mem_addr address, int resolve_uses); -void record_data_uses_symbol (mem_addr location, label *sym); -void record_inst_uses_symbol (instruction *inst, label *sym); -char *undefined_symbol_string (); -void resolve_a_label (label *sym, instruction *inst); -void resolve_label_uses (label *sym); diff --git a/spim-jsspim/CPU/syscall.cpp b/spim-jsspim/CPU/syscall.cpp deleted file mode 100755 index 0c36b7d..0000000 --- a/spim-jsspim/CPU/syscall.cpp +++ /dev/null @@ -1,337 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM syscalls, both in simulator and bare mode. - Execute MIPS syscalls in bare mode, when running on MIPS systems. - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef _WIN32 -#include -#endif -#include -#include -#include -#include -#include - -#ifdef _WIN32 -#include -#endif - -#include "spim.h" -#include "string-stream.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "syscall.h" - - -#ifdef _WIN32 -/* Windows has an handler that is invoked when an invalid argument is passed to a system - call. https://msdn.microsoft.com/en-us/library/a9yf33zb(v=vs.110).aspx - - All good, except that the handler tries to invoke Watson and then kill spim with an exception. - - Override the handler to just report an error. -*/ - -#include -#include -#include - -void myInvalidParameterHandler(const wchar_t* expression, - const wchar_t* function, - const wchar_t* file, - unsigned int line, - uintptr_t pReserved) -{ - if (function != NULL) - { - run_error ("Bad parameter to system call: %s\n", function); - } - else - { - run_error ("Bad parameter to system call\n"); - } -} - -static _invalid_parameter_handler oldHandler; - -void windowsParameterHandlingControl(int flag ) -{ - static _invalid_parameter_handler oldHandler; - static _invalid_parameter_handler newHandler = myInvalidParameterHandler; - - if (flag == 0) - { - oldHandler = _set_invalid_parameter_handler(newHandler); - _CrtSetReportMode(_CRT_ASSERT, 0); // Disable the message box for assertions. - } - else - { - newHandler = _set_invalid_parameter_handler(oldHandler); - _CrtSetReportMode(_CRT_ASSERT, 1); // Enable the message box for assertions. - } -} -#endif - - -/* Decides which syscall to execute or simulate. Returns zero upon - exit syscall and non-zero to continue execution. */ - -int -do_syscall () -{ -#ifdef _WIN32 - windowsParameterHandlingControl(0); -#endif - - /* Syscalls for the source-language version of SPIM. These are easier to - use than the real syscall and are portable to non-MIPS operating - systems. */ - - switch (R[REG_V0]) - { - case PRINT_INT_SYSCALL: - write_output (console_out, "%d", R[REG_A0]); - break; - - case PRINT_FLOAT_SYSCALL: - { - float val = FPR_S (REG_FA0); - - write_output (console_out, "%.8f", val); - break; - } - - case PRINT_DOUBLE_SYSCALL: - write_output (console_out, "%.18g", FPR[REG_FA0 / 2]); - break; - - case PRINT_STRING_SYSCALL: - write_output (console_out, "%s", mem_reference (R[REG_A0])); - break; - - case READ_INT_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - R[REG_RES] = atol (str); - break; - } - - case READ_FLOAT_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - FPR_S (REG_FRES) = (float) atof (str); - break; - } - - case READ_DOUBLE_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - FPR [REG_FRES] = atof (str); - break; - } - - case READ_STRING_SYSCALL: - { - read_input ( (char *) mem_reference (R[REG_A0]), R[REG_A1]); - data_modified = true; - break; - } - - case SBRK_SYSCALL: - { - mem_addr x = data_top; - expand_data (R[REG_A0]); - R[REG_RES] = x; - data_modified = true; - break; - } - - case PRINT_CHARACTER_SYSCALL: - write_output (console_out, "%c", R[REG_A0]); - break; - - case READ_CHARACTER_SYSCALL: - { - static char str [2]; - - read_input (str, 2); - if (*str == '\0') *str = '\n'; /* makes xspim = spim */ - R[REG_RES] = (long) str[0]; - break; - } - - case EXIT_SYSCALL: - spim_return_value = 0; - return (0); - - case EXIT2_SYSCALL: - spim_return_value = R[REG_A0]; /* value passed to spim's exit() call */ - return (0); - - case OPEN_SYSCALL: - { -#ifdef _WIN32 - R[REG_RES] = _open((char*)mem_reference (R[REG_A0]), R[REG_A1], R[REG_A2]); -#else - R[REG_RES] = open((char*)mem_reference (R[REG_A0]), R[REG_A1], R[REG_A2]); -#endif - break; - } - - case READ_SYSCALL: - { - /* Test if address is valid */ - (void)mem_reference (R[REG_A1] + R[REG_A2] - 1); -#ifdef _WIN32 - R[REG_RES] = _read(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#else - R[REG_RES] = read(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#endif - data_modified = true; - break; - } - - case WRITE_SYSCALL: - { - /* Test if address is valid */ - (void)mem_reference (R[REG_A1] + R[REG_A2] - 1); -#ifdef _WIN32 - R[REG_RES] = _write(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#else - R[REG_RES] = write(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#endif - break; - } - - case CLOSE_SYSCALL: - { -#ifdef _WIN32 - R[REG_RES] = _close(R[REG_A0]); -#else - R[REG_RES] = close(R[REG_A0]); -#endif - break; - } - - default: - run_error ("Unknown system call: %d\n", R[REG_V0]); - break; - } - -#ifdef _WIN32 - windowsParameterHandlingControl(1); -#endif - return (1); -} - - -void -handle_exception () -{ - if (!quiet && CP0_ExCode != ExcCode_Int) - error ("Exception occurred at PC=0x%08x\n", CP0_EPC); - - exception_occurred = 0; - PC = EXCEPTION_ADDR; - - switch (CP0_ExCode) - { - case ExcCode_Int: - break; - - case ExcCode_AdEL: - if (!quiet) - error (" Unaligned address in inst/data fetch: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_AdES: - if (!quiet) - error (" Unaligned address in store: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_IBE: - if (!quiet) - error (" Bad address in text read: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_DBE: - if (!quiet) - error (" Bad address in data/stack read: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_Sys: - if (!quiet) - error (" Error in syscall\n"); - break; - - case ExcCode_Bp: - exception_occurred = 0; - return; - - case ExcCode_RI: - if (!quiet) - error (" Reserved instruction execution\n"); - break; - - case ExcCode_CpU: - if (!quiet) - error (" Coprocessor unuable\n"); - break; - - case ExcCode_Ov: - if (!quiet) - error (" Arithmetic overflow\n"); - break; - - case ExcCode_Tr: - if (!quiet) - error (" Trap\n"); - break; - - case ExcCode_FPE: - if (!quiet) - error (" Floating point\n"); - break; - - default: - if (!quiet) - error ("Unknown exception: %d\n", CP0_ExCode); - break; - } -} diff --git a/spim-jsspim/CPU/syscall.h b/spim-jsspim/CPU/syscall.h deleted file mode 100755 index f8c0b46..0000000 --- a/spim-jsspim/CPU/syscall.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM syscalls, both in simulator and bare mode. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions. */ - -int do_syscall (); -void handle_exception (); - -#define PRINT_INT_SYSCALL 1 -#define PRINT_FLOAT_SYSCALL 2 -#define PRINT_DOUBLE_SYSCALL 3 -#define PRINT_STRING_SYSCALL 4 - -#define READ_INT_SYSCALL 5 -#define READ_FLOAT_SYSCALL 6 -#define READ_DOUBLE_SYSCALL 7 -#define READ_STRING_SYSCALL 8 - -#define SBRK_SYSCALL 9 - -#define EXIT_SYSCALL 10 - -#define PRINT_CHARACTER_SYSCALL 11 -#define READ_CHARACTER_SYSCALL 12 - -#define OPEN_SYSCALL 13 -#define READ_SYSCALL 14 -#define WRITE_SYSCALL 15 -#define CLOSE_SYSCALL 16 - -#define EXIT2_SYSCALL 17 - diff --git a/spim-jsspim/CPU/version.h b/spim-jsspim/CPU/version.h deleted file mode 100644 index 2c1902e..0000000 --- a/spim-jsspim/CPU/version.h +++ /dev/null @@ -1 +0,0 @@ -#define SPIM_VERSION "Version 9.1.20 of August 29, 2017" diff --git a/spim-jsspim/spim.cpp b/spim-jsspim/spim.cpp deleted file mode 100644 index 4cee351..0000000 --- a/spim-jsspim/spim.cpp +++ /dev/null @@ -1,218 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include "emscripten/bind.h" -#include "emscripten/val.h" - -#include -#include -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "data.h" -#include "version.h" - -using namespace emscripten; - -bool bare_machine; /* => simulate bare machine */ -bool delayed_branches; /* => simulate delayed branches */ -bool delayed_loads; /* => simulate delayed loads */ -bool accept_pseudo_insts = true; /* => parse pseudo instructions */ -bool quiet; /* => no warning messages */ -char *exception_file_name; -port message_out, console_out, console_in; -bool mapped_io; /* => activate memory-mapped IO */ -int spim_return_value; /* Value returned when spim exits */ - -static str_stream ss; -void init() { - error("Based on SPIM %s " - "by James Larus.\n", - SPIM_VERSION); - - initialize_world(DEFAULT_EXCEPTION_HANDLER, false); - initialize_run_stack(0, nullptr); - read_assembly_file("input.s"); - PC = starting_address(); -} - - -int step(int step_size, bool cont_bkpt) { - mem_addr addr = PC == 0 ? starting_address() : PC; - if (step_size == 0) step_size = DEFAULT_RUN_STEPS; - - bool continuable, bp_encountered; - bp_encountered = run_program(addr, step_size, false, cont_bkpt, &continuable); - - if (!continuable) { // finished - printf("\n"); // to flush output - error("Execution finished\n"); - return 0; - } - - if (bp_encountered) { - error("Breakpoint encountered at 0x%08x\n", PC); - return -1; - } - - return 1; -} - - -std::string getUserText() { - ss_clear(&ss); - format_insts(&ss, TEXT_BOT, text_top); - return std::string(ss_to_string(&ss)); -} - -std::string getKernelText() { - ss_clear(&ss); - format_insts(&ss, K_TEXT_BOT, k_text_top); - return std::string(ss_to_string(&ss)); -} - -val getStack() { return val(typed_memory_view(STACK_LIMIT / 16, (unsigned int *) stack_seg)); } -val getUserData() { return val(typed_memory_view(data_top - DATA_BOT, (unsigned int *) data_seg)); } -val getKernelData() { return val(typed_memory_view(k_data_top - K_DATA_BOT, (unsigned int *) k_data_seg)); } -val getGeneralRegVals() { return val(typed_memory_view(32, (unsigned int *) R)); } -val getFloatRegVals() { return val(typed_memory_view(32, (float *) FPR)); } -val getDoubleRegVals() { return val(typed_memory_view(16, (double *) FPR)); } - -val getSpecialRegVals() { - static unsigned int specialRegs[12]; - specialRegs[0] = PC; - specialRegs[1] = CP0_EPC; - specialRegs[2] = CP0_Cause; - specialRegs[3] = CP0_BadVAddr; - specialRegs[4] = CP0_Status; - specialRegs[5] = HI; - specialRegs[6] = LO; - specialRegs[7] = FIR; - specialRegs[8] = FCSR; - specialRegs[9] = FCCR; - specialRegs[10] = FEXR; - specialRegs[11] = FENR; - - return val(typed_memory_view(12, specialRegs)); -} - -EMSCRIPTEN_BINDINGS(init) { function("init", &init); } -EMSCRIPTEN_BINDINGS(step) { function("step", &step); } -EMSCRIPTEN_BINDINGS(getUserText) { function("getUserText", &getUserText); } -EMSCRIPTEN_BINDINGS(getKernelText) { function("getKernelText", &getKernelText); } -EMSCRIPTEN_BINDINGS(getStack) { function("getStack", &getStack); } -EMSCRIPTEN_BINDINGS(getUserData) { function("getUserData", &getUserData); } -EMSCRIPTEN_BINDINGS(getKernelData) { function("getKernelData", &getKernelData); } -EMSCRIPTEN_BINDINGS(getGeneralRegVals) { function("getGeneralRegVals", &getGeneralRegVals); } -EMSCRIPTEN_BINDINGS(getFloatRegVals) { function("getFloatRegVals", &getFloatRegVals); } -EMSCRIPTEN_BINDINGS(getDoubleRegVals) { function("getDoubleRegVals", &getDoubleRegVals); } -EMSCRIPTEN_BINDINGS(getSpecialRegVals) { function("getSpecialRegVals", &getSpecialRegVals); } -EMSCRIPTEN_BINDINGS(delete_breakpoint) { function("deleteBreakpoint", &delete_breakpoint); } -EMSCRIPTEN_BINDINGS(add_breakpoint) { function("addBreakpoint", &add_breakpoint); } - -/* Print an error message. */ - -void error(char *fmt, ...) { - va_list args; - va_start(args, fmt); - vfprintf(stderr, fmt, args); - va_end(args); -} - -/* Print the error message then exit. */ - -void fatal_error(char *fmt, ...) { - va_list args; - va_start(args, fmt); - fmt = va_arg(args, char *); - vfprintf(stderr, fmt, args); - exit(-1); -} - -/* Print an error message and return to top level. */ - -void run_error(char *fmt, ...) { - va_list args; - va_start(args, fmt); - vfprintf(stderr, fmt, args); - va_end(args); -} - -/* IO facilities: */ - -void write_output(port fp, char *fmt, ...) { - va_list args; - va_start(args, fmt); - vfprintf(stdout, fmt, args); - fflush(stdout); - va_end(args); -} - -/* Simulate the semantics of fgets (not gets) on Unix file. */ - -void read_input(char *str, int str_size) { - char *ptr; - ptr = str; - while (1 < str_size) /* Reserve space for null */ - { - char buf[1]; - if (read((int) console_in.i, buf, 1) <= 0) /* Not in raw mode! */ - break; - - *ptr++ = buf[0]; - str_size -= 1; - - if (buf[0] == '\n') break; - } - - if (0 < str_size) *ptr = '\0'; /* Null terminate input */ -} - -int console_input_available() { - return 0; -} - -char get_console_char() { - char buf; - read(0, &buf, 1); - return (buf); -} - -void put_console_char(char c) { - putc(c, stdout); - fflush(stdout); -} \ No newline at end of file diff --git a/spim-qtbase/CPU/data.cpp b/spim-qtbase/CPU/data.cpp deleted file mode 100755 index a9a049a..0000000 --- a/spim-qtbase/CPU/data.cpp +++ /dev/null @@ -1,347 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to manipulate data segment directives. - - Copyright (c) 1990-2021, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser.h" -#include "run.h" -#include "data.h" - - -/* The first 64K of the data segment are dedicated to small data - segment, which is pointed to by $gp. This register points to the - middle of the segment, so we can use the full offset field in an - instruction. */ - -static mem_addr next_data_pc; /* Location for next datum in user process */ - -static mem_addr next_k_data_pc; /* Location for next datum in kernel */ - -static bool in_kernel = 0; /* => data goes to kdata, not data */ - -#define DATA_PC (in_kernel ? next_k_data_pc : next_data_pc) - -static mem_addr next_gp_item_addr; /* Address of next item accessed off $gp */ - -static bool enable_data_auto_alignment = true; /* => align literal to natural bound */ - - - -/* If TO_KERNEL is true, subsequent data will be placed in the - kernel data segment. If false, data will go to the user's data - segment.*/ - -void -user_kernel_data_segment (bool to_kernel) -{ - in_kernel = to_kernel; -} - - -void -end_of_assembly_file () -{ - in_kernel = false; - enable_data_auto_alignment = true; -} - - -/* Set the point at which the first datum is stored to be ADDRESS + - 64K. The 64K increment allocates an area pointed to by register - $gp, which is initialized. */ - -void -data_begins_at_point (mem_addr addr) -{ - if (bare_machine) - next_data_pc = addr; - else - { - next_gp_item_addr = addr; - gp_midpoint = addr + 32*K; - R[REG_GP] = gp_midpoint; - next_data_pc = addr + 64 * K; - } -} - - -/* Set the point at which the first datum is stored in the kernel's - data segment. */ - -void -k_data_begins_at_point (mem_addr addr) -{ - next_k_data_pc = addr; -} - - -/* Arrange that the next datum is stored on a memory boundary with its - low ALIGNMENT bits equal to 0. If argument is 0, disable automatic - alignment.*/ - -void -align_data (int alignment) -{ - if (alignment == 0) - enable_data_auto_alignment = false; - else if (in_kernel) - { - next_k_data_pc = (next_k_data_pc + (1 << alignment) - 1) & (0xffffffff << alignment); - fix_current_label_address (next_k_data_pc); - } - else - { - next_data_pc = (next_data_pc + (1 << alignment) - 1) & (0xffffffff << alignment); - fix_current_label_address (next_data_pc); - } -} - - -void -set_data_alignment (int alignment) -{ - if (enable_data_auto_alignment) - align_data (alignment); -} - - -void -enable_data_alignment () -{ - enable_data_auto_alignment = true; -} - - -/* Set the location (in user or kernel data space) for the next datum. */ - -void -set_data_pc (mem_addr addr) -{ - if (in_kernel) - next_k_data_pc = addr; - else - next_data_pc = addr; -} - - -/* Return the address at which the next datum will be stored. */ - -mem_addr -current_data_pc () -{ - return (DATA_PC); -} - - -/* Bump the address at which the next data will be stored by DELTA - bytes. */ - -void -increment_data_pc (int delta) -{ - if (in_kernel) - { - next_k_data_pc += delta; - if (k_data_top <= next_k_data_pc) - expand_k_data(ROUND_UP(next_k_data_pc - k_data_top + 1, 64*K)); - } - else - { - next_data_pc += delta; - if (data_top <= next_data_pc) - expand_data(ROUND_UP(next_data_pc - data_top + 1, 64*K)); - } -} - - -/* Process a .extern NAME SIZE directive. */ - -void -extern_directive (char *name, int size) -{ - label *sym = make_label_global (name); - - if (!bare_machine - && !sym->gp_flag // Not already a global symbol - && size > 0 && size <= SMALL_DATA_SEG_MAX_SIZE - && next_gp_item_addr + size < gp_midpoint + 32*K) - { - sym->gp_flag = 1; - sym->addr = next_gp_item_addr; - next_gp_item_addr += size; - } -} - - -/* Process a .lcomm NAME SIZE directive. */ - -void -lcomm_directive (char *name, int size) -{ - if (!bare_machine - && size > 0 && size <= SMALL_DATA_SEG_MAX_SIZE - && next_gp_item_addr + size < gp_midpoint + 32*K) - { - label *sym = record_label (name, next_gp_item_addr, 1); - sym->gp_flag = 1; - - next_gp_item_addr += size; - /* Don't need to initialize since memory starts with 0's */ - } - else - { - (void)record_label (name, next_data_pc, 1); - - for ( ; size > 0; size --) - { - store_byte (0); - } - } -} - - -/* Process a .ascii STRING or .asciiz STRING directive. */ - -void -store_string (char *string, int length, bool null_terminate) -{ - for ( ; length > 0; string ++, length --) { - store_byte (*string); - } - if (null_terminate) - { - store_byte (0); - } -} - - -/* Process a .byte EXPR directive. */ - -void -store_byte (int value) -{ - set_mem_byte (DATA_PC, value); - increment_data_pc (1); -} - - -/* Process a .half EXPR directive. */ - -void -store_half (int value) -{ - if ((DATA_PC & 0x1) != 0) - { -#ifdef SPIM_BIGENDIAN - store_byte ((value >> 8) & 0xff); - store_byte (value & 0xff); -#else - store_byte (value & 0xff); - store_byte ((value >> 8) & 0xff); -#endif - } - else - { - set_mem_half (DATA_PC, value); - increment_data_pc (BYTES_PER_WORD / 2); - } -} - - -/* Process a .word EXPR directive. */ - -void -store_word (int value) -{ - if ((DATA_PC & 0x3) != 0) - { -#ifdef SPIM_BIGENDIAN - store_half ((value >> 16) & 0xffff); - store_half (value & 0xffff); -#else - store_half (value & 0xffff); - store_half ((value >> 16) & 0xffff); -#endif - } - else - { - set_mem_word (DATA_PC, value); - increment_data_pc (BYTES_PER_WORD); - } -} - - -/* Process a .double EXPR directive. */ - -void -store_double (double *value) -{ - if ((DATA_PC & 0x7) != 0) - { - store_word (* ((mem_word *) value)); - store_word (* (((mem_word *) value) + 1)); - } - else - { - set_mem_word (DATA_PC, *((mem_word *) value)); - increment_data_pc (BYTES_PER_WORD); - set_mem_word (DATA_PC, *(((mem_word *) value) + 1)); - increment_data_pc (BYTES_PER_WORD); - } -} - - -/* Process a .float EXPR directive. */ - -void -store_float (double *value) -{ - float val = (float)*value; - float *vp = &val; - - if ((DATA_PC & 0x3) != 0) - { - store_half (*(mem_word *) vp & 0xffff); - store_half ((*(mem_word *) vp >> 16) & 0xffff); - } - else - { - set_mem_word (DATA_PC, *((mem_word *) vp)); - increment_data_pc (BYTES_PER_WORD); - } -} diff --git a/spim-qtbase/CPU/data.h b/spim-qtbase/CPU/data.h deleted file mode 100755 index c058f88..0000000 --- a/spim-qtbase/CPU/data.h +++ /dev/null @@ -1,54 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to code to manipulate data segment directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -void align_data (int alignment); -mem_addr current_data_pc (); -void data_begins_at_point (mem_addr addr); -void enable_data_alignment (); -void end_of_assembly_file (); -void extern_directive (char *name, int size); -void increment_data_pc (int value); -void k_data_begins_at_point (mem_addr addr); -void lcomm_directive (char *name, int size); -void set_data_alignment (int); -void set_data_pc (mem_addr addr); -void set_text_pc (mem_addr addr); -void store_byte (int value); -void store_double (double *value); -void store_float (double *value); -void store_half (int value); -void store_string (char *string, int length, bool null_terminate); -void store_word (int value); -void user_kernel_data_segment (bool to_kernel); diff --git a/spim-qtbase/CPU/display-utils.cpp b/spim-qtbase/CPU/display-utils.cpp deleted file mode 100755 index 045969d..0000000 --- a/spim-qtbase/CPU/display-utils.cpp +++ /dev/null @@ -1,287 +0,0 @@ -/* SPIM S20 MIPS simulator. - Utilities for displaying machine contents. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "data.h" -#include "reg.h" -#include "mem.h" -#include "run.h" -#include "sym-tbl.h" - - -char* int_reg_names[32] = - {"r0", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra"}; - - -static mem_addr format_partial_line (str_stream *ss, mem_addr addr); - - -/* Write to the stream the contents of the machine's registers, in a wide - variety of formats. */ - -void -format_registers (str_stream *ss, int print_gpr_hex, int print_fpr_hex) -{ - int i; - char *grstr, *fpstr; - char *grfill, *fpfill; - - ss_printf (ss, " PC = %08x ", PC); - ss_printf (ss, "EPC = %08x ", CP0_EPC); - ss_printf (ss, " Cause = %08x ", CP0_Cause); - ss_printf (ss, " BadVAddr= %08x\n", CP0_BadVAddr); - ss_printf (ss, " Status = %08x ", CP0_Status); - ss_printf (ss, "HI = %08x ", HI); - ss_printf (ss, " LO = %08x\n", LO); - - if (print_gpr_hex) - grstr = "R%-2d (%2s) = %08x", grfill = " "; - else - grstr = "R%-2d (%2s) = %-10d", grfill = " "; - - ss_printf (ss, "\t\t\t\t General Registers\n"); - for (i = 0; i < 8; i++) - { - ss_printf (ss, grstr, i, int_reg_names[i], R[i]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+8, int_reg_names[i+8], R[i+8]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+16, int_reg_names[i+16], R[i+16]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+24, int_reg_names[i+24], R[i+24]); - ss_printf (ss, "\n"); - } - - ss_printf (ss, "\n FIR = %08x ", FIR); - ss_printf (ss, " FCSR = %08x ", FCSR); - - ss_printf (ss, "\t\t\t Double Floating Point Registers\n"); - - if (print_fpr_hex) - fpstr = "FP%-2d=%08x,%08x", fpfill = " "; - else - fpstr = "FP%-2d = %#-13.6g", fpfill = " "; - - if (print_fpr_hex) - for (i = 0; i < 4; i += 1) - { - int *r1, *r2; - - /* Use pointers to cast to ints without invoking float->int conversion - so we can just print the bits. */ - r1 = (int *)&FPR[i]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)&FPR[i+4]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+8, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)&FPR[i+8]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+16, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)&FPR[i+12]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+24, *r1, *r2); - ss_printf (ss, "\n"); - } - else for (i = 0; i < 4; i += 1) - { - ss_printf (ss, fpstr, 2*i, FPR[i]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+8, FPR[i+4]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+16, FPR[i+8]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+24, FPR[i+12]); - ss_printf (ss, "\n"); - } - - if (print_fpr_hex) - fpstr = "FP%-2d=%08x", fpfill = " "; - else - fpstr = "FP%-2d = %#-13.6g", fpfill = " "; - - ss_printf (ss, "\t\t\t Single Floating Point Registers\n"); - - if (print_fpr_hex) - for (i = 0; i < 8; i += 1) - { - /* Use pointers to cast to ints without invoking float->int conversion - so we can just print the bits. */ - ss_printf (ss, fpstr, i, *(int *)&FPR_S(i)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+8, *(int *)&FPR_S(i+8)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+16, *(int *)&FPR_S(i+16)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+24, *(int *)&FPR_S(i+24)); - ss_printf (ss, "\n"); - } - else for (i = 0; i < 8; i += 1) - { - ss_printf (ss, fpstr, i, FPR_S(i)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+8, FPR_S(i+8)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+16, FPR_S(i+16)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+24, FPR_S(i+24)); - ss_printf (ss, "\n"); - } -} - - - -/* Write to the stream a printable representation of the instructions in - memory addresses: FROM...TO. */ - -void -format_insts (str_stream *ss, mem_addr from, mem_addr to) -{ - instruction *inst; - mem_addr i; - - for (i = from; i < to; i += 4) - { - inst = read_mem_inst (i); - if (inst != NULL) - { - format_an_inst (ss, inst, i); - } - } -} - - -/* Write to the stream a printable representation of the data and stack - segments. */ - -void -format_data_segs (str_stream *ss) -{ - ss_printf (ss, "\tDATA\n"); - format_mem (ss, DATA_BOT, data_top); - - ss_printf (ss, "\n\tSTACK\n"); - format_mem (ss, ROUND_DOWN (R[29], BYTES_PER_WORD), STACK_TOP); - - ss_printf (ss, "\n\tKERNEL DATA\n"); - format_mem (ss, K_DATA_BOT, k_data_top); -} - - -#define BYTES_PER_LINE (4*BYTES_PER_WORD) - - -/* Write to the stream a printable representation of the data in memory - address: FROM...TO. */ - -void -format_mem (str_stream *ss, mem_addr from, mem_addr to) -{ - mem_word val; - mem_addr i = ROUND_UP (from, BYTES_PER_WORD); - int j; - - i = format_partial_line (ss, i); - - for ( ; i < to; ) - { - /* Count consecutive zero words */ - for (j = 0; (i + (uint32) j * BYTES_PER_WORD) < to; j += 1) - { - val = read_mem_word (i + (uint32) j * BYTES_PER_WORD); - if (val != 0) - { - break; - } - } - - if (j >= 4) - { - /* Block of 4 or more zero memory words: */ - ss_printf (ss, "[0x%08x]...[0x%08x] 0x00000000\n", - i, - i + (uint32) j * BYTES_PER_WORD); - - i = i + (uint32) j * BYTES_PER_WORD; - i = format_partial_line (ss, i); - } - else - { - /* Fewer than 4 zero words, print them on a single line: */ - ss_printf (ss, "[0x%08x] ", i); - do - { - val = read_mem_word (i); - ss_printf (ss, " 0x%08x", (unsigned int)val); - i += BYTES_PER_WORD; - } - while (i % BYTES_PER_LINE != 0); - - ss_printf (ss, "\n"); - } - } -} - - -/* Write to the stream a text line containing a fraction of a - quadword. Return the address after the last one written. */ - -static mem_addr -format_partial_line (str_stream *ss, mem_addr addr) -{ - if ((addr % BYTES_PER_LINE) != 0) - { - ss_printf (ss, "[0x%08x] ", addr); - - for (; (addr % BYTES_PER_LINE) != 0; addr += BYTES_PER_WORD) - { - mem_word val = read_mem_word (addr); - ss_printf (ss, " 0x%08x", (unsigned int)val); - } - - ss_printf (ss, "\n"); - } - - return addr; -} diff --git a/spim-qtbase/CPU/dump_ops.cpp b/spim-qtbase/CPU/dump_ops.cpp deleted file mode 100644 index 873acf3..0000000 --- a/spim-qtbase/CPU/dump_ops.cpp +++ /dev/null @@ -1,129 +0,0 @@ -/* SPIM S20 MIPS simulator. - Dump the op.h file in a readable format to allow checking of encodings. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include - -typedef struct inst_t -{ - char *opcode; - - union - { - unsigned int x; - struct - { - unsigned int funct:6; - unsigned int pad:10; - unsigned int rt:5; - unsigned int rs:5; - unsigned int op:6; - } f; - }; -} inst; - - -#define OP(a, b, c, d) {a, d}, - -inst ops [] = { -#include "op.h" -}; - - -int -compare_ops (inst *p1, inst *p2) -{ - if (p1->f.op < p2->f.op) - return (-1); - else if (p1->f.op > p2->f.op) - return (1); - else - { - if (p1->f.rs < p2->f.rs) - return (-1); - else if (p1->f.rs > p2->f.rs) - return (1); - else - { - if (p1->f.rt < p2->f.rt) - return (-1); - else if (p1->f.rt > p2->f.rt) - return (1); - else - { - if (p1->f.funct < p2->f.funct) - return (-1); - else if (p1->f.funct > p2->f.funct) - return (1); - else - return 0; - } - } - } -} - - -main (int argc, char** argv) -{ - /* Remove pseudo ops (opcode == -1) from table */ - int empty, next; - for (empty = 0, next = 0; next < (sizeof(ops) / sizeof(ops[0])); next += 1) - { - if (-1 == ops[next].x) - { - } - else - { - ops[empty] = ops[next]; - empty += 1; - } - } - - /* Radix sort instructions by field: op, rs, rt, funct */ - qsort (ops, empty, sizeof(ops[0]), compare_ops); - - /* Print related instructions in groups */ - int i; - for (i = 0; i < empty; i += 1) - { - if (0 < i && ops[i - 1].f.op != ops[i].f.op) - printf ("\n"); - - printf ("%10s op=%2d rs=%2d rt=%2d funct=%02x 0x%08x\n", - ops[i].opcode, - ops[i].f.op, - ops[i].f.rs, - ops[i].f.rt, - ops[i].f.funct, - ops[i].x); - } -} diff --git a/spim-qtbase/CPU/exceptions.s b/spim-qtbase/CPU/exceptions.s deleted file mode 100755 index c88334d..0000000 --- a/spim-qtbase/CPU/exceptions.s +++ /dev/null @@ -1,195 +0,0 @@ -# SPIM S20 MIPS simulator. -# The default exception handler for spim. -# -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -# Define the exception handling code. This must go first! - - .kdata -__m1_: .asciiz " Exception " -__m2_: .asciiz " occurred and ignored\n" -__e0_: .asciiz " [Interrupt] " -__e1_: .asciiz " [TLB]" -__e2_: .asciiz " [TLB]" -__e3_: .asciiz " [TLB]" -__e4_: .asciiz " [Address error in inst/data fetch] " -__e5_: .asciiz " [Address error in store] " -__e6_: .asciiz " [Bad instruction address] " -__e7_: .asciiz " [Bad data address] " -__e8_: .asciiz " [Error in syscall] " -__e9_: .asciiz " [Breakpoint] " -__e10_: .asciiz " [Reserved instruction] " -__e11_: .asciiz "" -__e12_: .asciiz " [Arithmetic overflow] " -__e13_: .asciiz " [Trap] " -__e14_: .asciiz "" -__e15_: .asciiz " [Floating point] " -__e16_: .asciiz "" -__e17_: .asciiz "" -__e18_: .asciiz " [Coproc 2]" -__e19_: .asciiz "" -__e20_: .asciiz "" -__e21_: .asciiz "" -__e22_: .asciiz " [MDMX]" -__e23_: .asciiz " [Watch]" -__e24_: .asciiz " [Machine check]" -__e25_: .asciiz "" -__e26_: .asciiz "" -__e27_: .asciiz "" -__e28_: .asciiz "" -__e29_: .asciiz "" -__e30_: .asciiz " [Cache]" -__e31_: .asciiz "" -__excp: .word __e0_, __e1_, __e2_, __e3_, __e4_, __e5_, __e6_, __e7_, __e8_, __e9_ - .word __e10_, __e11_, __e12_, __e13_, __e14_, __e15_, __e16_, __e17_, __e18_, - .word __e19_, __e20_, __e21_, __e22_, __e23_, __e24_, __e25_, __e26_, __e27_, - .word __e28_, __e29_, __e30_, __e31_ -s1: .word 0 -s2: .word 0 - -# This is the exception handler code that the processor runs when -# an exception occurs. It only prints some information about the -# exception, but can server as a model of how to write a handler. -# -# Because we are running in the kernel, we can use $k0/$k1 without -# saving their old values. - -# This is the exception vector address for MIPS-1 (R2000): -# .ktext 0x80000080 -# This is the exception vector address for MIPS32: - .ktext 0x80000180 -# Select the appropriate one for the mode in which SPIM is compiled. - .set noat - move $k1 $at # Save $at - .set at - sw $v0 s1 # Not re-entrant and we can't trust $sp - sw $a0 s2 # But we need to use these registers - - mfc0 $k0 $13 # Cause register - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - - # Print information about exception. - # - li $v0 4 # syscall 4 (print_str) - la $a0 __m1_ - syscall - - li $v0 1 # syscall 1 (print_int) - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - syscall - - li $v0 4 # syscall 4 (print_str) - andi $a0 $k0 0x3c - lw $a0 __excp($a0) - nop - syscall - - bne $k0 0x18 ok_pc # Bad PC exception requires special checks - nop - - mfc0 $a0 $14 # EPC - andi $a0 $a0 0x3 # Is EPC word-aligned? - beq $a0 0 ok_pc - nop - - li $v0 10 # Exit on really bad PC - syscall - -ok_pc: - li $v0 4 # syscall 4 (print_str) - la $a0 __m2_ - syscall - - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - bne $a0 0 ret # 0 means exception was an interrupt - nop - -# Interrupt-specific code goes here! -# Don't skip instruction at EPC since it has not executed. - - -ret: -# Return from (non-interrupt) exception. Skip offending instruction -# at EPC to avoid infinite loop. -# - mfc0 $k0 $14 # Bump EPC register - addiu $k0 $k0 4 # Skip faulting instruction - # (Need to handle delayed branch case here) - mtc0 $k0 $14 - - -# Restore registers and reset procesor state -# - lw $v0 s1 # Restore other registers - lw $a0 s2 - - .set noat - move $at $k1 # Restore $at - .set at - - mtc0 $0 $13 # Clear Cause register - - mfc0 $k0 $12 # Set Status register - ori $k0 0x1 # Interrupts enabled - mtc0 $k0 $12 - -# Return from exception on MIPS32: - eret - -# Return sequence for MIPS-I (R2000): -# rfe # Return from exception handler - # Should be in jr's delay slot -# jr $k0 -# nop - - - -# Standard startup code. Invoke the routine "main" with arguments: -# main(argc, argv, envp) -# - .text - .globl __start -__start: - lw $a0 0($sp) # argc - addiu $a1 $sp 4 # argv - addiu $a2 $a1 4 # envp - sll $v0 $a0 2 - addu $a2 $a2 $v0 - jal main - nop - - li $v0 10 - syscall # syscall 10 (exit) - - .globl __eoth -__eoth: diff --git a/spim-qtbase/CPU/inst.cpp b/spim-qtbase/CPU/inst.cpp deleted file mode 100755 index dc0b13e..0000000 --- a/spim-qtbase/CPU/inst.cpp +++ /dev/null @@ -1,1700 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to build assembly instructions and resolve symbolic labels. - - Copyright (c) 1990-2021, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser.h" -#include "scanner.h" -#include "parser_yacc.h" -#include "data.h" - - -/* Local functions: */ - -static int compare_pair_value (name_val_val *p1, name_val_val *p2); -static void format_imm_expr (str_stream *ss, imm_expr *expr, int base_reg); -static void i_type_inst_full_word (int opcode, int rt, int rs, imm_expr *expr, - int value_known, int32 value); -static void inst_cmp (instruction *inst1, instruction *inst2); -static instruction *make_r_type_inst (int opcode, int rd, int rs, int rt); -static instruction *mk_i_inst (int32 value, int opcode, int rs, int rt, int offset); -static instruction *mk_j_inst (int32 value, int opcode, int target); -static instruction *mk_r_inst (int32 value, int opcode, int rs, int rt, int rd, int shamt); -static instruction *mk_co_r_inst (int32 value, int opcode, int fd, int fs, int ft); -static void produce_immediate (imm_expr *expr, int rt, int value_known, int32 value); -static void sort_a_opcode_table (); -static void sort_i_opcode_table (); -static void sort_name_table (); - - -/* Local variables: */ - -/* True means store instructions in kernel, not user, text segment */ - -static bool in_kernel = 0; - -/* Instruction used as breakpoint by SPIM: */ - -static instruction *break_inst = NULL; - - -/* Locations for next instruction in user and kernel text segments */ - -static mem_addr next_text_pc; - -static mem_addr next_k_text_pc; - -static bool enable_text_auto_alignment = true; /* => align literal to natural bound */ - - -#define INST_PC (in_kernel ? next_k_text_pc : next_text_pc) - - -/* Set ADDRESS at which the next instruction is stored. */ - -void -text_begins_at_point (mem_addr addr) -{ - next_text_pc = addr; - in_kernel = false; - enable_text_auto_alignment = true; -} - - -void -k_text_begins_at_point (mem_addr addr) -{ - next_k_text_pc = addr; - in_kernel = false; - enable_text_auto_alignment = true; -} - -/* Arrange that the next instruction is stored on a memory boundary with its - low ALIGNMENT bits equal to 0. If argument is 0, disable automatic - alignment.*/ - -void -align_text (int alignment) -{ - if (alignment == 0) - enable_text_auto_alignment = false; - else if (in_kernel) - { - next_k_text_pc = (next_k_text_pc + (1 << alignment) - 1) & (0xffffffff << alignment); - fix_current_label_address (next_k_text_pc); - } - else - { - next_text_pc = (next_text_pc + (1 << alignment) - 1) & (0xffffffff << alignment); - fix_current_label_address (next_text_pc); - } -} - - -void -set_text_alignment (int alignment) -{ - if (enable_text_auto_alignment) - align_text (alignment); -} - - -void -enable_text_alignment () -{ - enable_text_auto_alignment = true; -} - - -/* Set the location (in user or kernel text space) for the next instruction. */ - -void -set_text_pc (mem_addr addr) -{ - if (in_kernel) - next_k_text_pc = addr; - else - next_text_pc = addr; -} - - -/* Return address for next instruction, in appropriate text segment. */ - -mem_addr -current_text_pc () -{ - return (INST_PC); -} - - -/* Increment the current text segement PC. */ - -void -increment_text_pc (int delta) -{ - if (in_kernel) - { - next_k_text_pc += delta; - if (k_text_top <= next_k_text_pc) - run_error("Can't expand kernel text segment\n"); - } - else - { - next_text_pc += delta; - if (text_top <= next_text_pc) - run_error("Can't expand text segment\n"); - } -} - - -/* If FLAG is true, next instruction goes to kernel text segment, - otherwise it goes to user segment. */ - -void -user_kernel_text_segment (bool to_kernel) -{ - in_kernel = to_kernel; -} - - -/* Store an INSTRUCTION in memory at the next location. */ - -void -store_instruction (instruction *inst) -{ - if (data_dir) - { - store_word (inst_encode (inst)); - free_inst (inst); - } - else if (text_dir) - { - exception_occurred = 0; - set_mem_inst (INST_PC, inst); - if (exception_occurred) - error ("Invalid address (0x%08x) for instruction\n", INST_PC); - else - increment_text_pc (BYTES_PER_WORD); - if (inst != NULL) - { - SET_SOURCE (inst, source_line ()); - if (ENCODING (inst) == 0) - SET_ENCODING (inst, inst_encode (inst)); - } - } -} - - - -void -i_type_inst_free (int opcode, int rt, int rs, imm_expr *expr) -{ - i_type_inst (opcode, rt, rs, expr); - free (expr); -} - - -/* Produce an immediate instruction with the OPCODE, RT, RS, and IMM - fields. NB, because the immediate value may not fit in the field, - this routine may produce more than one instruction. On the bare - machine, we resolve symbolic address, but they better produce values - that fit into instruction's immediate field. */ - -void -i_type_inst (int opcode, int rt, int rs, imm_expr *expr) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_EXPR (inst, copy_imm_expr (expr)); - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* Evaluate the instruction's expression. */ - int32 value = eval_imm_expr (expr); - - if (!bare_machine - && (((opcode == Y_ADDI_OP - || opcode == Y_ADDIU_OP - || opcode == Y_SLTI_OP - || opcode == Y_SLTIU_OP - || opcode == Y_TEQI_OP - || opcode == Y_TGEI_OP - || opcode == Y_TGEIU_OP - || opcode == Y_TLTI_OP - || opcode == Y_TLTIU_OP - || opcode == Y_TNEI_OP - || (opcode_is_load_store (opcode) && expr->bits == 0)) - // Sign-extended immediate values: - ? ((value & 0xffff8000) != 0 && (value & 0xffff8000) != 0xffff8000) - // Not sign-extended: - : (value & 0xffff0000) != 0))) - { - // Non-immediate value - free_inst (inst); - i_type_inst_full_word (opcode, rt, rs, expr, 1, value); - return; - } - else - resolve_a_label (expr->symbol, inst); - } - else if (bare_machine || expr->bits != 0) - /* Don't know expression's value, but only needed upper/lower 16-bits - anyways. */ - record_inst_uses_symbol (inst, expr->symbol); - else - { - /* Don't know the expressions's value and want all of its bits, - so assume that it will not produce a small result and generate - sequence for 32 bit value. */ - free_inst (inst); - - i_type_inst_full_word (opcode, rt, rs, expr, 0, 0); - return; - } - - store_instruction (inst); -} - - -/* The immediate value for an instruction will (or may) not fit in 16 bits. - Build the value from its piece with separate instructions. */ - -static void -i_type_inst_full_word (int opcode, int rt, int rs, imm_expr *expr, - int value_known, int32 value) -{ - if (opcode_is_load_store (opcode)) - { - int32 offset; - - if (expr->symbol != NULL - && expr->symbol->gp_flag - && rs == 0 - && (int32)IMM_MIN <= (offset = expr->symbol->addr + expr->offset) - && offset <= (int32)IMM_MAX) - { - i_type_inst_free (opcode, rt, REG_GP, make_imm_expr (offset, NULL, false)); - } - else if (value_known) - { - int low, high; - - high = (value >> 16) & 0xffff; - low = value & 0xffff; - - if (!(high == 0 && !(low & 0x8000)) && - !(high == 0xffff && (low & 0x8000))) - { - /* Some of high 16 bits are non-zero */ - if (low & 0x8000) - { - /* Adjust high 16, since load sign-extends low 16*/ - high += 1; - } - - i_type_inst_free (Y_LUI_OP, 1, 0, const_imm_expr (high)); - if (rs != 0) /* Base register */ - { - r_type_inst (Y_ADDU_OP, 1, 1, rs); - } - i_type_inst_free (opcode, rt, 1, lower_bits_of_expr (const_imm_expr (low))); - } - else - { - /* Special case, sign-extension of low 16 bits sets high to 0xffff */ - i_type_inst_free (opcode, rt, rs, const_imm_expr (low)); - } - } - else - { - /* Use $at */ - /* Need to adjust if lower bits are negative */ - i_type_inst_free (Y_LUI_OP, 1, 0, upper_bits_of_expr (expr)); - if (rs != 0) /* Base register */ - { - r_type_inst (Y_ADDU_OP, 1, 1, rs); - } - i_type_inst_free (opcode, rt, 1, lower_bits_of_expr (expr)); - } - } - else if (opcode_is_branch (opcode)) - { - /* This only allows branches +/- 32K, which is not correct! */ - i_type_inst_free (opcode, rt, rs, lower_bits_of_expr (expr)); - } - else - /* Computation instruction */ - { - int offset; - - if (expr->symbol != NULL - && expr->symbol->gp_flag && rs == 0 - && (int32)IMM_MIN <= (offset = expr->symbol->addr + expr->offset) - && offset <= (int32)IMM_MAX) - { - i_type_inst_free ((opcode == Y_LUI_OP ? Y_ADDIU_OP : opcode), - rt, REG_GP, make_imm_expr (offset, NULL, false)); - } - else - { - /* Use $at */ - if ((opcode == Y_ORI_OP - || opcode == Y_ADDI_OP - || opcode == Y_ADDIU_OP - || opcode == Y_LUI_OP) - && rs == 0) - { - produce_immediate(expr, rt, value_known, value); - } - else - { - produce_immediate(expr, 1, value_known, value); - r_type_inst (imm_op_to_op (opcode), rt, rs, 1); - } - } - } -} - - -static void -produce_immediate (imm_expr *expr, int rt, int value_known, int32 value) -{ - if (value_known && (value & 0xffff) == 0) - { - i_type_inst_free (Y_LUI_OP, rt, 0, upper_bits_of_expr (expr)); - } - else if (value_known && (value & 0xffff0000) == 0) - { - i_type_inst_free (Y_ORI_OP, rt, 0, lower_bits_of_expr (expr)); - } - else - { - i_type_inst_free (Y_LUI_OP, 1, 0, upper_bits_of_expr (expr)); - i_type_inst_free (Y_ORI_OP, rt, 1, lower_bits_of_expr(expr)); - } -} - - -/* Return a jump-type instruction with the given OPCODE and TARGET - fields. NB, even the immediate value may not fit in the field, this - routine will not produce more than one instruction. */ - -void -j_type_inst (int opcode, imm_expr *target) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE(inst, opcode); - target->offset = 0; /* Not PC relative */ - target->pc_relative = false; - SET_EXPR (inst, copy_imm_expr (target)); - if (target->symbol == NULL || SYMBOL_IS_DEFINED (target->symbol)) - resolve_a_label (target->symbol, inst); - else - record_inst_uses_symbol (inst, target->symbol); - store_instruction (inst); -} - - -/* Return a register-type instruction with the given OPCODE, RD, RS, and RT - fields. */ - -static instruction * -make_r_type_inst (int opcode, int rd, int rs, int rt) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE(inst, opcode); - SET_RS(inst, rs); - SET_RT(inst, rt); - SET_RD(inst, rd); - SHAMT(inst) = 0; - return (inst); -} - - -/* Return a register-type instruction with the given OPCODE, RD, RS, and RT - fields. */ - -void -r_type_inst (int opcode, int rd, int rs, int rt) -{ - store_instruction (make_r_type_inst (opcode, rd, rs, rt)); -} - - -/* Return a register-type instruction with the given OPCODE, FD, FS, and FT - fields. */ - -void -r_co_type_inst (int opcode, int fd, int fs, int ft) -{ - instruction *inst = make_r_type_inst (opcode, fs, 0, ft); - SET_FD (inst, fd); - store_instruction (inst); -} - - -/* Return a register-shift instruction with the given OPCODE, RD, RT, and - SHAMT fields.*/ - -void -r_sh_type_inst (int opcode, int rd, int rt, int shamt) -{ - instruction *inst = make_r_type_inst (opcode, rd, 0, rt); - SET_SHAMT(inst, shamt & 0x1f); - store_instruction (inst); -} - - -/* Return a floating-point compare instruction with the given OPCODE, - FS, FT, and CC fields.*/ - -void -r_cond_type_inst (int opcode, int fs, int ft, int cc) -{ - instruction *inst = make_r_type_inst (opcode, fs, 0, ft); - SET_FD(inst, cc << 2); - switch (opcode) - { - case Y_C_EQ_D_OP: - case Y_C_EQ_S_OP: - { - SET_COND(inst, COND_EQ); - break; - } - - case Y_C_LE_D_OP: - case Y_C_LE_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_EQ); - break; - } - - case Y_C_LT_D_OP: - case Y_C_LT_S_OP: - { - SET_COND(inst, COND_IN | COND_LT); - break; - } - - case Y_C_NGE_D_OP: - case Y_C_NGE_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_UN); - break; - } - - case Y_C_NGLE_D_OP: - case Y_C_NGLE_S_OP: - { - SET_COND(inst, COND_IN | COND_UN); - break; - } - - case Y_C_NGL_D_OP: - case Y_C_NGL_S_OP: - { - SET_COND(inst, COND_IN | COND_EQ | COND_UN); - break; - } - - case Y_C_NGT_D_OP: - case Y_C_NGT_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_EQ | COND_UN); - break; - } - - case Y_C_OLT_D_OP: - case Y_C_OLT_S_OP: - { - SET_COND(inst, COND_LT); - break; - } - - case Y_C_OLE_D_OP: - case Y_C_OLE_S_OP: - { - SET_COND(inst, COND_LT | COND_EQ); - break; - } - - case Y_C_SEQ_D_OP: - case Y_C_SEQ_S_OP: - { - SET_COND(inst, COND_IN | COND_EQ); - break; - } - - case Y_C_SF_D_OP: - case Y_C_SF_S_OP: - { - SET_COND(inst, COND_IN); - break; - } - - case Y_C_F_D_OP: - case Y_C_F_S_OP: - { - SET_COND(inst, 0); - break; - } - - case Y_C_UEQ_D_OP: - case Y_C_UEQ_S_OP: - { - SET_COND(inst, COND_EQ | COND_UN); - break; - } - - case Y_C_ULT_D_OP: - case Y_C_ULT_S_OP: - { - SET_COND(inst, COND_LT | COND_UN); - break; - } - - case Y_C_ULE_D_OP: - case Y_C_ULE_S_OP: - { - SET_COND(inst, COND_LT | COND_EQ | COND_UN); - break; - } - - case Y_C_UN_D_OP: - case Y_C_UN_S_OP: - { - SET_COND(inst, COND_UN); - break; - } - } - store_instruction (inst); -} - - -/* Make and return a deep copy of INST. */ - -instruction * -copy_inst (instruction *inst) -{ - instruction *new_inst = (instruction *) xmalloc (sizeof (instruction)); - - *new_inst = *inst; - /*memcpy ((void*)new_inst, (void*)inst , sizeof (instruction));*/ - SET_EXPR (new_inst, copy_imm_expr (EXPR (inst))); - return (new_inst); -} - - -void -free_inst (instruction *inst) -{ - if (inst != break_inst) - /* Don't free the breakpoint insructions since we only have one. */ - { - if (EXPR (inst)) - free (EXPR (inst)); - free (inst); - } -} - - - -/* Maintain a table mapping from opcode to instruction name and - instruction type. - - Table must be sorted before first use since its entries are - alphabetical on name, not ordered by opcode. */ - - -/* Sort all instruction table before first use. */ - -void -initialize_inst_tables () -{ - sort_name_table (); - sort_i_opcode_table (); - sort_a_opcode_table (); -} - - -/* Map from opcode -> name/type. */ - -static name_val_val name_tbl [] = { -#undef OP -#define OP(NAME, OPCODE, TYPE, R_OPCODE) {NAME, OPCODE, TYPE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the opcode value). */ - -static void -sort_name_table () -{ - qsort (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - -/* Compare the VALUE1 field of two NAME_VAL_VAL entries in the format - required by qsort. */ - -static int -compare_pair_value (name_val_val *p1, name_val_val *p2) -{ - if (p1->value1 < p2->value1) - return (-1); - else if (p1->value1 > p2->value1) - return (1); - else - return (0); -} - - -/* Print the instruction stored at the memory ADDRESS. */ - -void -print_inst (mem_addr addr) -{ - char* inst_str = inst_to_string (addr); - write_output (message_out, "%s", inst_str); - free (inst_str); -} - - -char* -inst_to_string(mem_addr addr) -{ - str_stream ss; - instruction *inst; - - exception_occurred = 0; - inst = read_mem_inst (addr); - - if (exception_occurred) - { - error ("Can't print instruction not in text segment (0x%08x)\n", addr); - return ""; - } - - ss_init (&ss); - format_an_inst (&ss, inst, addr); - return ss_to_string (&ss); -} - - -void -format_an_inst (str_stream *ss, instruction *inst, mem_addr addr) -{ - name_val_val *entry; - int line_start = ss_length (ss); - - if (addr != 0 && inst_is_breakpoint (addr)) - { - delete_breakpoint (addr); - ss_printf (ss, "*"); - format_an_inst (ss, read_mem_inst (addr), addr); - add_breakpoint (addr); - return; - } - - ss_printf (ss, "[0x%08x]\t", addr); - if (inst == NULL) - { - ss_printf (ss, "\n"); - return; - } - - entry = map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - OPCODE (inst)); - if (entry == NULL) - { - ss_printf (ss, "\n", OPCODE (inst)); - return; - } - - ss_printf (ss, "0x%08x %s", (uint32)ENCODING (inst), entry->name); - switch (entry->value2) - { - case BC_TYPE_INST: - ss_printf (ss, "%d %d", CC (inst), IDISP (inst)); - break; - - case B1_TYPE_INST: - ss_printf (ss, " $%d %d", RS (inst), IDISP (inst)); - break; - - case I1s_TYPE_INST: - ss_printf (ss, " $%d, %d", RS (inst), IMM (inst)); - break; - - case I1t_TYPE_INST: - ss_printf (ss, " $%d, %d", RT (inst), IMM (inst)); - break; - - case I2_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RT (inst), RS (inst), IMM (inst)); - break; - - case B2_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RS (inst), RT (inst), IDISP (inst)); - break; - - case I2a_TYPE_INST: - ss_printf (ss, " $%d, %d($%d)", RT (inst), IMM (inst), BASE (inst)); - break; - - case R1s_TYPE_INST: - ss_printf (ss, " $%d", RS (inst)); - break; - - case R1d_TYPE_INST: - ss_printf (ss, " $%d", RD (inst)); - break; - - case R2td_TYPE_INST: - ss_printf (ss, " $%d, $%d", RT (inst), RD (inst)); - break; - - case R2st_TYPE_INST: - ss_printf (ss, " $%d, $%d", RS (inst), RT (inst)); - break; - - case R2ds_TYPE_INST: - ss_printf (ss, " $%d, $%d", RD (inst), RS (inst)); - break; - - case R2sh_TYPE_INST: - if (ENCODING (inst) == 0) - { - ss_erase (ss, 3); /* zap sll */ - ss_printf (ss, "nop"); - } - else - ss_printf (ss, " $%d, $%d, %d", RD (inst), RT (inst), SHAMT (inst)); - break; - - case R3_TYPE_INST: - ss_printf (ss, " $%d, $%d, $%d", RD (inst), RS (inst), RT (inst)); - break; - - case R3sh_TYPE_INST: - ss_printf (ss, " $%d, $%d, $%d", RD (inst), RT (inst), RS (inst)); - break; - - case FP_I2a_TYPE_INST: - ss_printf (ss, " $f%d, %d($%d)", FT (inst), IMM (inst), BASE (inst)); - break; - - case FP_R2ds_TYPE_INST: - ss_printf (ss, " $f%d, $f%d", FD (inst), FS (inst)); - break; - - case FP_R2ts_TYPE_INST: - ss_printf (ss, " $%d, $f%d", RT (inst), FS (inst)); - break; - - case FP_CMP_TYPE_INST: - if (FD (inst) == 0) - ss_printf (ss, " $f%d, $f%d", FS (inst), FT (inst)); - else - ss_printf (ss, " %d, $f%d, $f%d", FD (inst) >> 2, FS (inst), FT (inst)); - break; - - case FP_R3_TYPE_INST: - ss_printf (ss, " $f%d, $f%d, $f%d", FD (inst), FS (inst), FT (inst)); - break; - - case MOVC_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RD (inst), RS (inst), RT (inst) >> 2); - break; - - case FP_MOVC_TYPE_INST: - ss_printf (ss, " $f%d, $f%d, %d", FD (inst), FS (inst), CC (inst)); - break; - - case J_TYPE_INST: - ss_printf (ss, " 0x%08x", TARGET (inst) << 2); - break; - - case NOARG_TYPE_INST: - break; - - default: - fatal_error ("Unknown instruction type in print_inst\n"); - } - - if (EXPR (inst) != NULL && EXPR (inst)->symbol != NULL) - { - ss_printf (ss, " ["); - if (opcode_is_load_store (OPCODE (inst))) - format_imm_expr (ss, EXPR (inst), BASE (inst)); - else - format_imm_expr (ss, EXPR (inst), -1); - ss_printf (ss, "]"); - } - - if (SOURCE (inst) != NULL) - { - /* Comment is source line text of current line. */ - int gap_length = 57 - (ss_length (ss) - line_start); - for ( ; 0 < gap_length; gap_length -= 1) - { - ss_printf (ss, " "); - } - - ss_printf (ss, "; "); - ss_printf (ss, "%s", SOURCE (inst)); - } - - ss_printf (ss, "\n"); -} - - - -/* Return true if SPIM OPCODE (e.g. Y_...) represents a conditional - branch. */ - -bool -opcode_is_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1F_OP: - case Y_BC1FL_OP: - case Y_BC1T_OP: - case Y_BC1TL_OP: - case Y_BC2F_OP: - case Y_BC2FL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - case Y_BEQ_OP: - case Y_BEQL_OP: - case Y_BEQZ_POP: - case Y_BGE_POP: - case Y_BGEU_POP: - case Y_BGEZ_OP: - case Y_BGEZAL_OP: - case Y_BGEZALL_OP: - case Y_BGEZL_OP: - case Y_BGT_POP: - case Y_BGTU_POP: - case Y_BGTZ_OP: - case Y_BGTZL_OP: - case Y_BLE_POP: - case Y_BLEU_POP: - case Y_BLEZ_OP: - case Y_BLEZL_OP: - case Y_BLT_POP: - case Y_BLTU_POP: - case Y_BLTZ_OP: - case Y_BLTZAL_OP: - case Y_BLTZALL_OP: - case Y_BLTZL_OP: - case Y_BNE_OP: - case Y_BNEL_OP: - case Y_BNEZ_POP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE represents a nullified (e.g., Y_...L_OP) - conditional branch. */ - -bool -opcode_is_nullified_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1FL_OP: - case Y_BC1TL_OP: - case Y_BC2FL_OP: - case Y_BC2TL_OP: - case Y_BEQL_OP: - case Y_BGEZALL_OP: - case Y_BGEZL_OP: - case Y_BGTZL_OP: - case Y_BLEZL_OP: - case Y_BLTZALL_OP: - case Y_BLTZL_OP: - case Y_BNEL_OP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE (e.g. Y_...) represents a conditional - branch on a true condition. */ - -bool -opcode_is_true_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1T_OP: - case Y_BC1TL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE (e.g. Y_...) is a direct unconditional - branch (jump). */ - -bool -opcode_is_jump (int opcode) -{ - switch (opcode) - { - case Y_J_OP: - case Y_JAL_OP: - return true; - - default: - return false; - } -} - -/* Return true if SPIM OPCODE (e.g. Y_...) is a load or store. */ - -bool -opcode_is_load_store (int opcode) -{ - switch (opcode) - { - case Y_LB_OP: - case Y_LBU_OP: - case Y_LH_OP: - case Y_LHU_OP: - case Y_LL_OP: - case Y_LDC1_OP: - case Y_LDC2_OP: - case Y_LW_OP: - case Y_LWC1_OP: - case Y_LWC2_OP: - case Y_LWL_OP: - case Y_LWR_OP: - case Y_SB_OP: - case Y_SC_OP: - case Y_SH_OP: - case Y_SDC1_OP: - case Y_SDC2_OP: - case Y_SW_OP: - case Y_SWC1_OP: - case Y_SWC2_OP: - case Y_SWL_OP: - case Y_SWR_OP: - return true; - - default: - return false; - } -} - - -/* Return true if a breakpoint is set at ADDR. */ - -bool -inst_is_breakpoint (mem_addr addr) -{ - if (break_inst == NULL) - break_inst = make_r_type_inst (Y_BREAK_OP, 1, 0, 0); - - return (read_mem_inst (addr) == break_inst); -} - - -/* Set a breakpoint at ADDR and return the old instruction. If the - breakpoint cannot be set, return NULL. */ - -instruction * -set_breakpoint (mem_addr addr) -{ - instruction *old_inst; - - if (break_inst == NULL) - break_inst = make_r_type_inst (Y_BREAK_OP, 1, 0, 0); - - exception_occurred = 0; - old_inst = read_mem_inst (addr); - if (old_inst == break_inst) - return (NULL); - - set_mem_inst (addr, break_inst); - if (exception_occurred) - return (NULL); - else - return (old_inst); -} - - - -/* An immediate expression has the form: SYMBOL +/- IOFFSET, where either - part may be omitted. */ - -/* Make and return a new immediate expression */ - -imm_expr * -make_imm_expr (int offs, char *sym, bool is_pc_relative) -{ - imm_expr *expr = (imm_expr *) xmalloc (sizeof (imm_expr)); - - expr->offset = offs; - expr->bits = 0; - expr->pc_relative = is_pc_relative; - if (sym != NULL) - expr->symbol = lookup_label (sym); - else - expr->symbol = NULL; - return (expr); -} - - -/* Return a shallow copy of the EXPRESSION. */ - -imm_expr * -copy_imm_expr (imm_expr *old_expr) -{ - imm_expr *expr = (imm_expr *) xmalloc (sizeof (imm_expr)); - - *expr = *old_expr; - /*memcpy ((void*)expr, (void*)old_expr, sizeof (imm_expr));*/ - return (expr); -} - - -/* Return a shallow copy of an EXPRESSION that only uses the upper - sixteen bits of the expression's value. */ - -imm_expr * -upper_bits_of_expr (imm_expr *old_expr) -{ - imm_expr *expr = copy_imm_expr (old_expr); - - expr->bits = 1; - return (expr); -} - - -/* Return a shallow copy of the EXPRESSION that only uses the lower - sixteen bits of the expression's value. */ - -imm_expr * -lower_bits_of_expr (imm_expr *old_expr) -{ - imm_expr *expr = copy_imm_expr (old_expr); - - expr->bits = -1; - return (expr); -} - - -/* Return an instruction expression for a constant VALUE. */ - -imm_expr * -const_imm_expr (int32 value) -{ - return (make_imm_expr (value, NULL, false)); -} - - -/* Return a shallow copy of the EXPRESSION with the offset field - incremented by the given amount. */ - -imm_expr * -incr_expr_offset (imm_expr *expr, int32 value) -{ - imm_expr *new_expr = copy_imm_expr (expr); - - new_expr->offset += value; - return (new_expr); -} - - -/* Return the value of the EXPRESSION. */ - -int32 -eval_imm_expr (imm_expr *expr) -{ - int32 value; - - if (expr->symbol == NULL) - value = expr->offset; - else if (SYMBOL_IS_DEFINED (expr->symbol)) - { - value = expr->offset + expr->symbol->addr; - } - else - { - error ("Evaluated undefined symbol: %s\n", expr->symbol->name); - value = 0; - } - if (expr->bits > 0) - return ((value >> 16) & 0xffff); /* Use upper bits of result */ - else if (expr->bits < 0) - return (value & 0xffff); /* Use lower bits */ - else - return (value); -} - - -/* Print the EXPRESSION. */ - -static void -format_imm_expr (str_stream *ss, imm_expr *expr, int base_reg) -{ - if (expr->symbol != NULL) - { - ss_printf (ss, "%s", expr->symbol->name); - } - - if (expr->pc_relative) - ss_printf (ss, "-0x%08x", (unsigned int)-expr->offset); - else if (expr->offset < -10) - ss_printf (ss, "-%d (-0x%08x)", -expr->offset, (unsigned int)-expr->offset); - else if (expr->offset > 10) - ss_printf (ss, "+%d (0x%08x)", expr->offset, (unsigned int)expr->offset); - - if (base_reg != -1 && expr->symbol != NULL && - (expr->offset > 10 || expr->offset < -10)) - { - if (expr->offset == 0 && base_reg != 0) - ss_printf (ss, "+0"); - - if (expr->offset != 0 || base_reg != 0) - ss_printf (ss, "($%d)", base_reg); - } -} - - -/* Return true if the EXPRESSION is a constant 0. */ - -bool -is_zero_imm (imm_expr *expr) -{ - return (expr->offset == 0 && expr->symbol == NULL); -} - - - -/* Return an address expression of the form SYMBOL +/- IOFFSET (REGISTER). - Any of the three parts may be omitted. */ - -addr_expr * -make_addr_expr (int offs, char *sym, int reg_no) -{ - addr_expr *expr = (addr_expr *) xmalloc (sizeof (addr_expr)); - label *lab; - - if (reg_no == 0 && sym != NULL && (lab = lookup_label (sym))->gp_flag) - { - expr->reg_no = REG_GP; - expr->imm = make_imm_expr (offs + lab->addr - gp_midpoint, NULL, false); - } - else - { - expr->reg_no = (unsigned char)reg_no; - expr->imm = make_imm_expr (offs, (sym ? str_copy (sym) : sym), false); - } - return (expr); -} - - -imm_expr * -addr_expr_imm (addr_expr *expr) -{ - return (expr->imm); -} - - -int -addr_expr_reg (addr_expr *expr) -{ - return (expr->reg_no); -} - - - -/* Map between a SPIM instruction and the binary representation of the - instruction. */ - - -/* Maintain a table mapping from internal opcode (i_opcode) to actual - opcode (a_opcode). Table must be sorted before first use since its - entries are alphabetical on name, not ordered by opcode. */ - - -/* Map from internal opcode -> real opcode */ - -static name_val_val i_opcode_tbl [] = { -#undef OP -#define OP(NAME, I_OPCODE, TYPE, A_OPCODE) {NAME, I_OPCODE, (int)A_OPCODE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the interal opcode value). */ - -static void -sort_i_opcode_table () -{ - qsort (i_opcode_tbl, - sizeof (i_opcode_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - -#define REGS(R,O) (((R) & 0x1f) << O) - - -int32 -inst_encode (instruction *inst) -{ - int32 a_opcode = 0; - name_val_val *entry; - - if (inst == NULL) - return (0); - - entry = map_int_to_name_val_val (i_opcode_tbl, - sizeof (i_opcode_tbl) / sizeof (name_val_val), - OPCODE (inst)); - if (entry == NULL) - return 0; - - a_opcode = entry->value2; - entry = map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - OPCODE (inst)); - - switch (entry->value2) - { - case BC_TYPE_INST: - return (a_opcode - | REGS (CC (inst) << 2, 16) - | (IOFFSET (inst) & 0xffff)); - - case B1_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | (IOFFSET (inst) & 0xffff)); - - case I1s_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | (IMM (inst) & 0xffff)); - - case I1t_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | (IMM (inst) & 0xffff)); - - case I2_TYPE_INST: - case B2_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | (IMM (inst) & 0xffff)); - - case I2a_TYPE_INST: - return (a_opcode - | REGS (BASE (inst), 21) - | REGS (RT (inst), 16) - | (IOFFSET (inst) & 0xffff)); - - case R1s_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21)); - - case R1d_TYPE_INST: - return (a_opcode - | REGS (RD (inst), 11)); - - case R2td_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case R2st_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16)); - - case R2ds_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RD (inst), 11)); - - case R2sh_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (RD (inst), 11) - | REGS (SHAMT (inst), 6)); - - case R3_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case R3sh_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case FP_I2a_TYPE_INST: - return (a_opcode - | REGS (BASE (inst), 21) - | REGS (RT (inst), 16) - | (IOFFSET (inst) & 0xffff)); - - case FP_R2ds_TYPE_INST: - return (a_opcode - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case FP_R2ts_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (FS (inst), 11)); - - case FP_CMP_TYPE_INST: - return (a_opcode - | REGS (FT (inst), 16) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6) - | COND (inst)); - - case FP_R3_TYPE_INST: - return (a_opcode - | REGS (FT (inst), 16) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case MOVC_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case FP_MOVC_TYPE_INST: - return (a_opcode - | REGS (CC (inst), 18) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case J_TYPE_INST: - return (a_opcode - | TARGET (inst)); - - case NOARG_TYPE_INST: - return (a_opcode); - - default: - fatal_error ("Unknown instruction type in inst_encoding\n"); - return (0); /* Not reached */ - } -} - - -/* Maintain a table mapping from actual opcode to interal opcode. - Table must be sorted before first use since its entries are - alphabetical on name, not ordered by opcode. */ - - -/* Map from internal opcode -> real opcode */ - -static name_val_val a_opcode_tbl [] = { -#undef OP -#define OP(NAME, I_OPCODE, TYPE, A_OPCODE) {NAME, (int)A_OPCODE, (int)I_OPCODE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the interal opcode value). */ - -static void -sort_a_opcode_table () -{ - qsort (a_opcode_tbl, - sizeof (a_opcode_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - - -instruction * -inst_decode (int32 val) -{ - int32 a_opcode = val & 0xfc000000; - name_val_val *entry; - int32 i_opcode; - - /* Field classes: (opcode is continued in other part of instruction): */ - if (a_opcode == 0 || a_opcode == 0x70000000) /* SPECIAL or SPECIAL2 */ - a_opcode |= (val & 0x3f); - else if (a_opcode == 0x04000000) /* REGIMM */ - a_opcode |= (val & 0x001f0000); - else if (a_opcode == 0x40000000) /* COP0 */ - a_opcode |= (val & 0x03e00000) | (val & 0x1f); - else if (a_opcode == 0x44000000) /* COP1 */ - { - a_opcode |= (val & 0x03e00000); - if ((val & 0xff000000) == 0x45000000) - a_opcode |= (val & 0x00010000); /* BC1f/t */ - else - a_opcode |= (val & 0x3f); - } - else if (a_opcode == 0x48000000 /* COPz */ - || a_opcode == 0x4c000000) - a_opcode |= (val & 0x03e00000); - - - entry = map_int_to_name_val_val (a_opcode_tbl, - sizeof (a_opcode_tbl) / sizeof (name_val_val), - a_opcode); - if (entry == NULL) - return (mk_r_inst (val, 0, 0, 0, 0, 0)); /* Invalid inst */ - - i_opcode = entry->value2; - - switch (map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - i_opcode)->value2) - { - case BC_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case B1_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), 0, val & 0xffff)); - - case I1s_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), 0, val & 0xffff)); - - case I1t_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case I2_TYPE_INST: - case B2_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case I2a_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case R1s_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), 0, 0, 0)); - - case R1d_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, 0, BIN_RD(val), 0)); - - case R2td_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_RD(val), 0)); - - case R2st_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), 0, 0)); - - case R2ds_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), 0, BIN_RD(val), 0)); - - case R2sh_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_RD(val), BIN_SA(val))); - - case R3_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case R3sh_TYPE_INST: - return(mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case FP_I2a_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_BASE(val), BIN_FT(val), val & 0xffff)); - - case FP_R2ds_TYPE_INST: - return (mk_co_r_inst (val, i_opcode, BIN_FS(val), 0, BIN_FD(val))); - - case FP_R2ts_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_FS(val), 0)); - - case FP_CMP_TYPE_INST: - { - instruction *inst = mk_r_inst (val, i_opcode, BIN_FS(val), BIN_FT(val), BIN_FD(val), 0); - SET_COND (inst, val & 0xf); - return (inst); - } - - case FP_R3_TYPE_INST: - return (mk_co_r_inst (val, i_opcode, BIN_FS(val), BIN_FT(val), BIN_FD(val))); - - case MOVC_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case FP_MOVC_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_FS(val), BIN_RT(val), BIN_FD(val), 0)); - - case J_TYPE_INST: - return (mk_j_inst (val, i_opcode, val & 0x3ffffff)); - - - case NOARG_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, 0, 0, 0)); - - default: - return (mk_r_inst (val, 0, 0, 0, 0, 0)); /* Invalid inst */ - } -} - - -static instruction * -mk_r_inst (int32 val, int opcode, int rs, int rt, int rd, int shamt) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_RD (inst, rd); - SET_SHAMT (inst, shamt); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - -static instruction * -mk_co_r_inst (int32 val, int opcode, int fs, int ft, int fd) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_FS (inst, fs); - SET_FT (inst, ft); - SET_FD (inst, fd); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - -static instruction * -mk_i_inst (int32 val, int opcode, int rs, int rt, int offset) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_IOFFSET (inst, offset); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - -static instruction * -mk_j_inst (int32 val, int opcode, int target) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_TARGET (inst, target); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - - - -/* Code to test encode/decode of instructions. */ - -void -test_assembly (instruction *inst) -{ - instruction *new_inst = inst_decode (inst_encode (inst)); - - inst_cmp (inst, new_inst); - free_inst (new_inst); -} - - -static void -inst_cmp (instruction *inst1, instruction *inst2) -{ - static str_stream ss; - - ss_clear (&ss); - if (inst1->opcode != inst2->opcode - || inst1->encoding != inst2->encoding - || RS(inst1) != RS(inst2) - || RT(inst1) != RT(inst2) - || RD(inst1) != RD(inst2) - || SHAMT(inst1) != SHAMT(inst2)) - { - ss_printf (&ss, "=================== Not Equal ===================\n"); - format_an_inst (&ss, inst1, 0); - ss_printf (&ss, "===================\n"); - format_an_inst (&ss, inst2, 0); - ss_printf (&ss, "=================== Not Equal ===================\n"); - error(ss_to_string(&ss)); - } -} diff --git a/spim-qtbase/CPU/inst.h b/spim-qtbase/CPU/inst.h deleted file mode 100755 index 51733e9..0000000 --- a/spim-qtbase/CPU/inst.h +++ /dev/null @@ -1,280 +0,0 @@ -/* SPIM S20 MIPS simulator. - Description of a SPIM S20 instruction. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Represenation of the expression that produce a value for an instruction's - immediate field. Immediates have the form: label +/- offset. */ - -typedef struct immexpr -{ - int offset; /* Offset from symbol */ - struct lab *symbol; /* Symbolic label */ - short bits; /* > 0 => 31..16, < 0 => 15..0 */ - bool pc_relative; /* => offset from label in code */ -} imm_expr; - - -/* Representation of the expression that produce an address for an - instruction. Address have the form: label +/- offset (register). */ - -typedef struct addrexpr -{ - unsigned char reg_no; /* Register number */ - imm_expr *imm; /* The immediate part */ -} addr_expr; - - - -/* Representation of an instruction. Store the instruction fields in an - overlapping manner similar to the real encoding (but not identical, to - speed decoding in C code, as opposed to hardware).. */ - -typedef struct inst_s -{ - short opcode; - - union - { - /* R-type or I-type: */ - struct - { - unsigned char rs; - unsigned char rt; - - union - { - short imm; - - struct - { - unsigned char rd; - unsigned char shamt; - } r; - } r_i; - } r_i; - - /* J-type: */ - mem_addr target; - } r_t; - - int32 encoding; - imm_expr *expr; - char *source_line; -} instruction; - - -#define OPCODE(INST) (INST)->opcode -#define SET_OPCODE(INST, VAL) (INST)->opcode = (short)(VAL) - - -#define RS(INST) (INST)->r_t.r_i.rs -#define SET_RS(INST, VAL) (INST)->r_t.r_i.rs = (unsigned char)(VAL) - -#define RT(INST) (INST)->r_t.r_i.rt -#define SET_RT(INST, VAL) (INST)->r_t.r_i.rt = (unsigned char)(VAL) - -#define RD(INST) (INST)->r_t.r_i.r_i.r.rd -#define SET_RD(INST, VAL) (INST)->r_t.r_i.r_i.r.rd = (unsigned char)(VAL) - - -#define FS(INST) RD(INST) -#define SET_FS(INST, VAL) SET_RD(INST, VAL) - -#define FT(INST) RT(INST) -#define SET_FT(INST, VAL) SET_RT(INST, VAL) - -#define FD(INST) SHAMT(INST) -#define SET_FD(INST, VAL) SET_SHAMT(INST, VAL) - - -#define SHAMT(INST) (INST)->r_t.r_i.r_i.r.shamt -#define SET_SHAMT(INST, VAL) (INST)->r_t.r_i.r_i.r.shamt = (unsigned char)(VAL) - -#define IMM(INST) (INST)->r_t.r_i.r_i.imm -#define SET_IMM(INST, VAL) (INST)->r_t.r_i.r_i.imm = (short)(VAL) - - -#define BASE(INST) RS(INST) -#define SET_BASE(INST, VAL) SET_RS(INST, VAL) - -#define IOFFSET(INST) IMM(INST) -#define SET_IOFFSET(INST, VAL) SET_IMM(INST, VAL) -#define IDISP(INST) (SIGN_EX (IOFFSET (INST) << 2)) - - -#define COND(INST) RS(INST) -#define SET_COND(INST, VAL) SET_RS(INST, VAL) - -#define CC(INST) (RT(INST) >> 2) -#define ND(INST) ((RT(INST) & 0x2) >> 1) -#define TF(INST) (RT(INST) & 0x1) - -#define CCFP(INST) (FD(INST) >> 2) -#define NDFP(INST) ((FD(INST) & 0x2) >> 1) -#define TFF(INST) (FD(INST) & 0x1) - -#define TARGET(INST) (INST)->r_t.target -#define SET_TARGET(INST, VAL) (INST)->r_t.target = (mem_addr)(VAL) - -#define ENCODING(INST) (INST)->encoding -#define SET_ENCODING(INST, VAL) (INST)->encoding = (int32)(VAL) - -#define EXPR(INST) (INST)->expr -#define SET_EXPR(INST, VAL) (INST)->expr = (imm_expr*)(VAL) - -#define SOURCE(INST) (INST)->source_line -#define SET_SOURCE(INST, VAL) (INST)->source_line = (char *)(VAL) - - -#define COND_UN 0x1 -#define COND_EQ 0x2 -#define COND_LT 0x4 -#define COND_IN 0x8 - -/* Minimum and maximum values that fit in instruction's imm field */ -#define IMM_MIN 0xffff8000 -#define IMM_MAX 0x00007fff - -#define UIMM_MIN (unsigned)0 -#define UIMM_MAX ((unsigned)((1<<16)-1)) - - - -/* Raise an exception! */ - -extern int exception_occurred; - -#define RAISE_EXCEPTION(EXCODE, MISC) \ - { \ - raise_exception(EXCODE); \ - MISC; \ - } \ - - -#define RAISE_INTERRUPT(LEVEL) \ - { \ - /* Set IP (pending) bit for interrupt level. */ \ - CP0_Cause |= (1 << ((LEVEL) + 8)); \ - } \ - -#define CLEAR_INTERRUPT(LEVEL) \ - { \ - /* Clear IP (pending) bit for interrupt level. */ \ - CP0_Cause &= ~(1 << ((LEVEL) + 8)); \ - } \ - -/* Recognized exceptions: */ - -#define ExcCode_Int 0 /* Interrupt */ -#define ExcCode_Mod 1 /* TLB modification (not implemented) */ -#define ExcCode_TLBL 2 /* TLB exception (not implemented) */ -#define ExcCode_TLBS 3 /* TLB exception (not implemented) */ -#define ExcCode_AdEL 4 /* Address error (load/fetch) */ -#define ExcCode_AdES 5 /* Address error (store) */ -#define ExcCode_IBE 6 /* Bus error, instruction fetch */ -#define ExcCode_DBE 7 /* Bus error, data reference */ -#define ExcCode_Sys 8 /* Syscall exception */ -#define ExcCode_Bp 9 /* Breakpoint exception */ -#define ExcCode_RI 10 /* Reserve instruction */ -#define ExcCode_CpU 11 /* Coprocessor unusable */ -#define ExcCode_Ov 12 /* Arithmetic overflow */ -#define ExcCode_Tr 13 /* Trap */ -#define ExcCode_FPE 15 /* Floating point */ -#define ExcCode_C2E 18 /* Coprocessor 2 (not impelemented) */ -#define ExcCode_MDMX 22 /* MDMX unusable (not implemented) */ -#define ExcCode_WATCH 23 /* Reference to Watch (not impelemented) */ -#define ExcCode_MCheck 24 /* Machine check (not implemented) */ -#define ExcCode_CacheErr 30 /* Cache error (not impelemented) */ - - - -/* Fields in binary representation of instructions: */ - -#define BIN_REG(V,O) (((V) >> O) & 0x1f) -#define BIN_RS(V) (BIN_REG(V, 21)) -#define BIN_RT(V) (BIN_REG(V, 16)) -#define BIN_RD(V) (BIN_REG(V, 11)) -#define BIN_SA(V) (BIN_REG(V, 6)) - -#define BIN_BASE(V) (BIN_REG(V, 21)) -#define BIN_FT(V) (BIN_REG(V, 16)) -#define BIN_FS(V) (BIN_REG(V, 11)) -#define BIN_FD(V) (BIN_REG(V, 6)) - - - -/* Exported functions: */ - -imm_expr *addr_expr_imm (addr_expr *expr); -int addr_expr_reg (addr_expr *expr); -void align_text (int alignment); -imm_expr *const_imm_expr (int32 value); -imm_expr *copy_imm_expr (imm_expr *old_expr); -instruction *copy_inst (instruction *inst); -mem_addr current_text_pc (); -void enable_text_alignment (); -int32 eval_imm_expr (imm_expr *expr); -void format_an_inst (str_stream *ss, instruction *inst, mem_addr addr); -void free_inst (instruction *inst); -void i_type_inst (int opcode, int rt, int rs, imm_expr *expr); -void i_type_inst_free (int opcode, int rt, int rs, imm_expr *expr); -void increment_text_pc (int delta); -imm_expr *incr_expr_offset (imm_expr *expr, int32 value); -void initialize_inst_tables (); -instruction *inst_decode (int32 value); -int32 inst_encode (instruction *inst); -bool inst_is_breakpoint (mem_addr addr); -void j_type_inst (int opcode, imm_expr *target); -void k_text_begins_at_point (mem_addr addr); -imm_expr *lower_bits_of_expr (imm_expr *old_expr); -addr_expr *make_addr_expr (int offs, char *sym, int reg_no); -imm_expr *make_imm_expr (int offs, char *sym, bool is_pc_relative); -bool opcode_is_branch (int opcode); -bool opcode_is_nullified_branch (int opcode); -bool opcode_is_true_branch (int opcode); -bool opcode_is_jump (int opcode); -bool opcode_is_load_store (int opcode); -void print_inst (mem_addr addr); -char* inst_to_string (mem_addr addr); -void r_co_type_inst (int opcode, int fd, int fs, int ft); -void r_cond_type_inst (int opcode, int fs, int ft, int cc); -void r_sh_type_inst (int opcode, int rd, int rt, int shamt); -void r_type_inst (int opcode, int rd, int rs, int rt); -void raise_exception(int excode); -instruction *set_breakpoint (mem_addr addr); -void set_text_alignment (int alignment); -void store_instruction (instruction *inst); -void test_assembly (instruction *inst); -void text_begins_at_point (mem_addr addr); -imm_expr *upper_bits_of_expr (imm_expr *old_expr); -void user_kernel_text_segment (bool to_kernel); -bool is_zero_imm (imm_expr *expr); diff --git a/spim-qtbase/CPU/mem.cpp b/spim-qtbase/CPU/mem.cpp deleted file mode 100755 index 0d17111..0000000 --- a/spim-qtbase/CPU/mem.cpp +++ /dev/null @@ -1,778 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to create, maintain and access memory. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" - -/* Exported Variables: */ - -reg_word R[R_LENGTH]; -reg_word HI, LO; -int HI_present, LO_present; -mem_addr PC, nPC; -double *FPR; /* Dynamically allocate so overlay */ -float *FGR; /* is possible */ -int *FWR; /* is possible */ -reg_word CCR[4][32], CPR[4][32]; - -instruction **text_seg; -bool text_modified; /* => text segment was written */ -mem_addr text_top; -mem_word *data_seg; -bool data_modified; /* => a data segment was written */ -short *data_seg_h; /* Points to same vector as DATA_SEG */ -BYTE_TYPE *data_seg_b; /* Ditto */ -mem_addr data_top; -mem_addr gp_midpoint; /* Middle of $gp area */ -mem_word *stack_seg; -short *stack_seg_h; /* Points to same vector as STACK_SEG */ -BYTE_TYPE *stack_seg_b; /* Ditto */ -mem_addr stack_bot; -instruction **k_text_seg; -mem_addr k_text_top; -mem_word *k_data_seg; -short *k_data_seg_h; -BYTE_TYPE *k_data_seg_b; -mem_addr k_data_top; - - -/* Local functions: */ - -static mem_word bad_mem_read (mem_addr addr, int mask); -static void bad_mem_write (mem_addr addr, mem_word value, int mask); -static instruction *bad_text_read (mem_addr addr); -static void bad_text_write (mem_addr addr, instruction *inst); -static void free_instructions (instruction **inst, int n); -static mem_word read_memory_mapped_IO (mem_addr addr); -static void write_memory_mapped_IO (mem_addr addr, mem_word value); - - -/* Local variables: */ - -static int32 data_size_limit, stack_size_limit, k_data_size_limit; - - - -/* Memory is allocated in five chunks: - text, data, stack, kernel text, and kernel data. - - The arrays are independent and have different semantics. - - text is allocated from 0x400000 up and only contains INSTRUCTIONs. - It does not expand. - - data is allocated from 0x10000000 up. It can be extended by the - SBRK system call. Programs can only read and write this segment. - - stack grows from 0x7fffefff down. It is automatically extended. - Programs can only read and write this segment. - - k_text is like text, except its is allocated from 0x80000000 up. - - k_data is like data, but is allocated from 0x90000000 up. - - Both kernel text and kernel data can only be accessed in kernel mode. -*/ - -/* The text segments contain pointers to instructions, not actual - instructions, so they must be allocated large enough to hold as many - pointers as there would be instructions (the two differ on machines in - which pointers are not 32 bits long). The following calculations round - up in case size is not a multiple of BYTES_PER_WORD. */ - -#define BYTES_TO_INST(N) (((N) + BYTES_PER_WORD - 1) / BYTES_PER_WORD * sizeof(instruction*)) - - -void -make_memory (int text_size, int data_size, int data_limit, - int stack_size, int stack_limit, int k_text_size, - int k_data_size, int k_data_limit) -{ - if (data_size <= 65536) - data_size = 65536; - data_size = ROUND_UP(data_size, BYTES_PER_WORD); /* Keep word aligned */ - - if (text_seg == NULL) - text_seg = (instruction **) xmalloc (BYTES_TO_INST(text_size)); - else - { - free_instructions (text_seg, (text_top - TEXT_BOT) / BYTES_PER_WORD); - text_seg = (instruction **) realloc (text_seg, BYTES_TO_INST(text_size)); - } - memclr (text_seg, BYTES_TO_INST(text_size)); - text_top = TEXT_BOT + text_size; - - data_size = ROUND_UP(data_size, BYTES_PER_WORD); /* Keep word aligned */ - if (data_seg == NULL) - data_seg = (mem_word *) xmalloc (data_size); - else - data_seg = (mem_word *) realloc (data_seg, data_size); - memclr (data_seg, data_size); - data_seg_b = (BYTE_TYPE *) data_seg; - data_seg_h = (short *) data_seg; - data_top = DATA_BOT + data_size; - data_size_limit = data_limit; - - stack_size = ROUND_UP(stack_size, BYTES_PER_WORD); /* Keep word aligned */ - if (stack_seg == NULL) - stack_seg = (mem_word *) xmalloc (stack_size); - else - stack_seg = (mem_word *) realloc (stack_seg, stack_size); - memclr (stack_seg, stack_size); - stack_seg_b = (BYTE_TYPE *) stack_seg; - stack_seg_h = (short *) stack_seg; - stack_bot = STACK_TOP - stack_size; - stack_size_limit = stack_limit; - - if (k_text_seg == NULL) - k_text_seg = (instruction **) xmalloc (BYTES_TO_INST(k_text_size)); - else - { - free_instructions (k_text_seg, - (k_text_top - K_TEXT_BOT) / BYTES_PER_WORD); - k_text_seg = (instruction **) realloc(k_text_seg, - BYTES_TO_INST(k_text_size)); - } - memclr (k_text_seg, BYTES_TO_INST(k_text_size)); - k_text_top = K_TEXT_BOT + k_text_size; - - k_data_size = ROUND_UP(k_data_size, BYTES_PER_WORD); /* Keep word aligned */ - if (k_data_seg == NULL) - k_data_seg = (mem_word *) xmalloc (k_data_size); - else - k_data_seg = (mem_word *) realloc (k_data_seg, k_data_size); - memclr (k_data_seg, k_data_size); - k_data_seg_b = (BYTE_TYPE *) k_data_seg; - k_data_seg_h = (short *) k_data_seg; - k_data_top = K_DATA_BOT + k_data_size; - k_data_size_limit = k_data_limit; - - text_modified = true; - data_modified = true; -} - - -/* Free the storage used by the old instructions in memory. */ - -static void -free_instructions (instruction **inst, int n) -{ - for ( ; n > 0; n --, inst ++) - if (*inst) - free_inst (*inst); -} - - -/* Expand the data segment by adding N bytes. */ - -void -expand_data (int addl_bytes) -{ - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = data_top - DATA_BOT; - int new_size = old_size + delta; - BYTE_TYPE *p; - - if ((addl_bytes < 0) || (new_size > data_size_limit)) - { - error ("Can't expand data segment by %d bytes to %d bytes\n", - addl_bytes, new_size); - run_error ("Use -ldata # with # > %d\n", new_size); - } - data_seg = (mem_word *) realloc (data_seg, new_size); - if (data_seg == NULL) - fatal_error ("realloc failed in expand_data\n"); - - data_seg_b = (BYTE_TYPE *) data_seg; - data_seg_h = (short *) data_seg; - data_top += delta; - - /* Zero new memory */ - for (p = data_seg_b + old_size; p < data_seg_b + new_size; ) - *p ++ = 0; -} - - -/* Expand the stack segment by adding N bytes. Can't use REALLOC - since it copies from bottom of memory blocks and stack grows down from - top of its block. */ - -void -expand_stack (int addl_bytes) -{ - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = STACK_TOP - stack_bot; - int new_size = old_size + MAX (delta, old_size); - mem_word *new_seg; - mem_word *po, *pn; - - if ((addl_bytes < 0) || (new_size > stack_size_limit)) - { - run_error ("Can't expand stack segment by %d bytes to %d bytes.\nUse -lstack # with # > %d\n", - addl_bytes, new_size, new_size); - } - - new_seg = (mem_word *) xmalloc (new_size); - memset(new_seg, 0, new_size); - - po = stack_seg + (old_size / BYTES_PER_WORD - 1); - pn = new_seg + (new_size / BYTES_PER_WORD - 1); - for ( ; po >= stack_seg ; ) *pn -- = *po --; - - free (stack_seg); - stack_seg = new_seg; - stack_seg_b = (BYTE_TYPE *) stack_seg; - stack_seg_h = (short *) stack_seg; - stack_bot -= (new_size - old_size); -} - - -/* Expand the kernel data segment by adding N bytes. */ - -void -expand_k_data (int addl_bytes) -{ - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = k_data_top - K_DATA_BOT; - int new_size = old_size + delta; - BYTE_TYPE *p; - - if ((addl_bytes < 0) || (new_size > k_data_size_limit)) - { - run_error ("Can't expand kernel data segment by %d bytes to %d bytes.\nUse -lkdata # with # > %d\n", - addl_bytes, new_size, new_size); - } - k_data_seg = (mem_word *) realloc (k_data_seg, new_size); - if (k_data_seg == NULL) - fatal_error ("realloc failed in expand_k_data\n"); - - k_data_seg_b = (BYTE_TYPE *) k_data_seg; - k_data_seg_h = (short *) k_data_seg; - k_data_top += delta; - - /* Zero new memory */ - for (p = k_data_seg_b + old_size / BYTES_PER_WORD; - p < k_data_seg_b + new_size / BYTES_PER_WORD; ) - *p ++ = 0; -} - - - -/* Access memory */ - -void* -mem_reference(mem_addr addr) -{ - if ((addr >= TEXT_BOT) && (addr < text_top)) - return addr - TEXT_BOT + (char*) text_seg; - else if ((addr >= DATA_BOT) && (addr < data_top)) - return addr - DATA_BOT + (char*) data_seg; - else if ((addr >= stack_bot) && (addr < STACK_TOP)) - return addr - stack_bot + (char*) stack_seg; - else if ((addr >= K_TEXT_BOT) && (addr < k_text_top)) - return addr - K_TEXT_BOT + (char*) k_text_seg; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top)) - return addr - K_DATA_BOT + (char*) k_data_seg; - else - { - run_error ("Memory address out of bounds\n"); - return NULL; - } -} - - -instruction* -read_mem_inst(mem_addr addr) -{ - if ((addr >= TEXT_BOT) && (addr < text_top) && !(addr & 0x3)) - return text_seg [(addr - TEXT_BOT) >> 2]; - else if ((addr >= K_TEXT_BOT) && (addr < k_text_top) && !(addr & 0x3)) - return k_text_seg [(addr - K_TEXT_BOT) >> 2]; - else - return bad_text_read (addr); -} - - -reg_word -read_mem_byte(mem_addr addr) -{ - if ((addr >= DATA_BOT) && (addr < data_top)) - return data_seg_b [addr - DATA_BOT]; - else if ((addr >= stack_bot) && (addr < STACK_TOP)) - return stack_seg_b [addr - stack_bot]; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top)) - return k_data_seg_b [addr - K_DATA_BOT]; - else - return bad_mem_read (addr, 0); -} - - -reg_word -read_mem_half(mem_addr addr) -{ - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x1)) - return data_seg_h [(addr - DATA_BOT) >> 1]; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x1)) - return stack_seg_h [(addr - stack_bot) >> 1]; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x1)) - return k_data_seg_h [(addr - K_DATA_BOT) >> 1]; - else - return bad_mem_read (addr, 0x1); -} - - -reg_word -read_mem_word(mem_addr addr) -{ - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x3)) - return data_seg [(addr - DATA_BOT) >> 2]; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x3)) - return stack_seg [(addr - stack_bot) >> 2]; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x3)) - return k_data_seg [(addr - K_DATA_BOT) >> 2]; - else - return bad_mem_read (addr, 0x3); -} - - -void -set_mem_inst(mem_addr addr, instruction* inst) -{ - text_modified = true; - if ((addr >= TEXT_BOT) && (addr < text_top) && !(addr & 0x3)) - text_seg [(addr - TEXT_BOT) >> 2] = inst; - else if ((addr >= K_TEXT_BOT) && (addr < k_text_top) && !(addr & 0x3)) - k_text_seg [(addr - K_TEXT_BOT) >> 2] = inst; - else - bad_text_write (addr, inst); -} - - -void -set_mem_byte(mem_addr addr, reg_word value) -{ - data_modified = true; - if ((addr >= DATA_BOT) && (addr < data_top)) - data_seg_b [addr - DATA_BOT] = (BYTE_TYPE) value; - else if ((addr >= stack_bot) && (addr < STACK_TOP)) - stack_seg_b [addr - stack_bot] = (BYTE_TYPE) value; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top)) - k_data_seg_b [addr - K_DATA_BOT] = (BYTE_TYPE) value; - else - bad_mem_write (addr, value, 0); -} - - -void -set_mem_half(mem_addr addr, reg_word value) -{ - data_modified = true; - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x1)) - data_seg_h [(addr - DATA_BOT) >> 1] = (short) value; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x1)) - stack_seg_h [(addr - stack_bot) >> 1] = (short) value; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x1)) - k_data_seg_h [(addr - K_DATA_BOT) >> 1] = (short) value; - else - bad_mem_write (addr, value, 0x1); -} - - -void -set_mem_word(mem_addr addr, reg_word value) -{ - data_modified = true; - if ((addr >= DATA_BOT) && (addr < data_top) && !(addr & 0x3)) - data_seg [(addr - DATA_BOT) >> 2] = (mem_word) value; - else if ((addr >= stack_bot) && (addr < STACK_TOP) && !(addr & 0x3)) - stack_seg [(addr - stack_bot) >> 2] = (mem_word) value; - else if ((addr >= K_DATA_BOT) && (addr < k_data_top) && !(addr & 0x3)) - k_data_seg [(addr - K_DATA_BOT) >> 2] = (mem_word) value; - else - bad_mem_write (addr, value, 0x3); -} - - -/* Handle the infrequent and erroneous cases in memory accesses. */ - -static instruction * -bad_text_read (mem_addr addr) -{ - RAISE_EXCEPTION (ExcCode_IBE, CP0_BadVAddr = addr); - return (inst_decode (0)); -} - - -static void -bad_text_write (mem_addr addr, instruction *inst) -{ - RAISE_EXCEPTION (ExcCode_IBE, CP0_BadVAddr = addr); - set_mem_word (addr, ENCODING (inst)); -} - - -static mem_word -bad_mem_read (mem_addr addr, int mask) -{ - mem_word tmp; - - if ((addr & mask) != 0) - RAISE_EXCEPTION (ExcCode_AdEL, CP0_BadVAddr = addr) - else if (addr >= TEXT_BOT && addr < text_top) - switch (mask) - { - case 0x0: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = (unsigned)tmp >> (8 * (3 - (addr & 0x3))); -#else - tmp = (unsigned)tmp >> (8 * (addr & 0x3)); -#endif - return (0xff & tmp); - - case 0x1: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = (unsigned)tmp >> (8 * (2 - (addr & 0x2))); -#else - tmp = (unsigned)tmp >> (8 * (addr & 0x2)); -#endif - return (0xffff & tmp); - - case 0x3: - { - instruction *inst = text_seg [(addr - TEXT_BOT) >> 2]; - if (inst == NULL) - return 0; - else - return (ENCODING (inst)); - } - - default: - run_error ("Bad mask (0x%x) in bad_mem_read\n", mask); - } - else if (addr > data_top - && addr < stack_bot - /* If more than 16 MB below stack, probably is bad data ref */ - && addr > stack_bot - 16*K*K) - { - /* Grow stack segment */ - expand_stack (stack_bot - addr + 4); - return (0); - } - else if (MM_IO_BOT <= addr && addr <= MM_IO_TOP) - return (read_memory_mapped_IO (addr)); - else - /* Address out of range */ - RAISE_EXCEPTION (ExcCode_DBE, CP0_BadVAddr = addr) - return (0); -} - - -static void -bad_mem_write (mem_addr addr, mem_word value, int mask) -{ - mem_word tmp; - - if ((addr & mask) != 0) - /* Unaligned address fault */ - RAISE_EXCEPTION (ExcCode_AdES, CP0_BadVAddr = addr) - else if (addr >= TEXT_BOT && addr < text_top) - { - switch (mask) - { - case 0x0: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = ((tmp & ~(0xff << (8 * (3 - (addr & 0x3))))) - | (value & 0xff) << (8 * (3 - (addr & 0x3)))); -#else - tmp = ((tmp & ~(0xff << (8 * (addr & 0x3)))) - | (value & 0xff) << (8 * (addr & 0x3))); -#endif - break; - - case 0x1: - tmp = ENCODING (text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = ((tmp & ~(0xffff << (8 * (2 - (addr & 0x2))))) - | (value & 0xffff) << (8 * (2 - (addr & 0x2)))); -#else - tmp = ((tmp & ~(0xffff << (8 * (addr & 0x2)))) - | (value & 0xffff) << (8 * (addr & 0x2))); -#endif - break; - - case 0x3: - tmp = value; - break; - - default: - tmp = 0; - run_error ("Bad mask (0x%x) in bad_mem_read\n", mask); - } - - if (text_seg [(addr - TEXT_BOT) >> 2] != NULL) - { - free_inst (text_seg[(addr - TEXT_BOT) >> 2]); - } - text_seg [(addr - TEXT_BOT) >> 2] = inst_decode (tmp); - - text_modified = true; - } - else if (addr > data_top - && addr < stack_bot - /* If more than 16 MB below stack, probably is bad data ref */ - && addr > stack_bot - 16*K*K) - { - /* Grow stack segment */ - expand_stack (stack_bot - addr + 4); - if (addr >= stack_bot) - { - if (mask == 0) - stack_seg_b [addr - stack_bot] = (char)value; - else if (mask == 1) - stack_seg_h [(addr - stack_bot) >> 1] = (short)value; - else - stack_seg [(addr - stack_bot) >> 2] = value; - } - else - RAISE_EXCEPTION (ExcCode_DBE, CP0_BadVAddr = addr) - - data_modified = true; - } - else if (MM_IO_BOT <= addr && addr <= MM_IO_TOP) - write_memory_mapped_IO (addr, value); - else - /* Address out of range */ - RAISE_EXCEPTION (ExcCode_DBE, CP0_BadVAddr = addr) -} - - - -/* Memory-mapped IO routines. */ - -static int recv_control = 0; /* No input */ -static int recv_buffer; -static int recv_buffer_full_timer = 0; - -static int trans_control = TRANS_READY; /* Ready to write */ -static int trans_buffer; -static int trans_buffer_full_timer = 0; - - -/* Check if input is available and output is possible. If so, update the - memory-mapped control registers and buffers. */ - -void -check_memory_mapped_IO () -{ - if (recv_buffer_full_timer > 0) - { - /* Do not check for more input until this interval expires. */ - recv_buffer_full_timer -= 1; - } - else if (console_input_available ()) - { - /* Read new char into the buffer and raise an interrupt, if interrupts - are enabled for device. */ - /* assert(recv_buffer_full_timer == 0); */ - recv_buffer = get_console_char (); - recv_control |= RECV_READY; - recv_buffer_full_timer = RECV_INTERVAL; - if (recv_control & RECV_INT_ENABLE) - { - RAISE_INTERRUPT (RECV_INT_LEVEL); - } - } - - if (trans_buffer_full_timer > 0) - { - /* Do not allow output until this interval expires. */ - trans_buffer_full_timer -= 1; - } - else if (!(trans_control & TRANS_READY)) - { - /* Done writing: empty the buffer and raise an interrupt, if interrupts - are enabled for device. */ - /* assert(trans_buffer_full_timer == 0); */ - trans_control |= TRANS_READY; - if (trans_control & TRANS_INT_ENABLE) - { - RAISE_INTERRUPT (TRANS_INT_LEVEL); - } - } -} - - -/* Invoked on a write to the memory-mapped IO area. */ - -static void -write_memory_mapped_IO (mem_addr addr, mem_word value) -{ - switch (addr) - { - case TRANS_CTRL_ADDR: - /* Program can only set the interrupt enable, not ready, bit. */ - if ((value & TRANS_INT_ENABLE) != 0) - { - /* Enable interrupts: */ - trans_control |= TRANS_INT_ENABLE; - if (trans_control & TRANS_READY) - { - /* Raise interrupt on enabling a ready transmitter */ - RAISE_INTERRUPT (TRANS_INT_LEVEL); - } - } - else - { - /* Disable interrupts: */ - trans_control &= ~TRANS_INT_ENABLE; - CLEAR_INTERRUPT (TRANS_INT_LEVEL); /* Clear IP bit in Cause */ - } - break; - - case TRANS_BUFFER_ADDR: - /* Ignore write if device is not ready. */ - if ((trans_control & TRANS_READY) != 0) - { - /* Write char: */ - trans_buffer = value & 0xff; - put_console_char ((char)trans_buffer); - /* Device is busy for a while: */ - trans_control &= ~TRANS_READY; - trans_buffer_full_timer = TRANS_LATENCY; - CLEAR_INTERRUPT (TRANS_INT_LEVEL); /* Clear IP bit in Cause */ - } - break; - - case RECV_CTRL_ADDR: - /* Program can only set the interrupt enable, not ready, bit. */ - if ((value & RECV_INT_ENABLE) != 0) - { - /* Enable interrupts: */ - recv_control |= RECV_INT_ENABLE; - if (recv_control & RECV_READY) - { - /* Raise interrupt on enabling a ready receiver */ - RAISE_INTERRUPT (RECV_INT_LEVEL); - } - } - else - { - /* Disable interrupts: */ - recv_control &= ~RECV_INT_ENABLE; - CLEAR_INTERRUPT (RECV_INT_LEVEL); /* Clear IP bit in Cause */ - } - break; - - case RECV_BUFFER_ADDR: - /* Nop: program can't change buffer. */ - break; - - default: - run_error ("Write to unused memory-mapped IO address (0x%x)\n", addr); - } -} - - -/* Invoked on a read in the memory-mapped IO area. */ - -static mem_word -read_memory_mapped_IO (mem_addr addr) -{ - switch (addr) - { - case TRANS_CTRL_ADDR: - return (trans_control); - - case TRANS_BUFFER_ADDR: - return (trans_buffer & 0xff); - - case RECV_CTRL_ADDR: - return (recv_control); - - case RECV_BUFFER_ADDR: - recv_control &= ~RECV_READY; /* Buffer now empty */ - recv_buffer_full_timer = 0; - CLEAR_INTERRUPT (RECV_INT_LEVEL); /* Clear IP bit in Cause */ - return (recv_buffer & 0xff); - - default: - run_error ("Read from unused memory-mapped IO address (0x%x)\n", addr); - return (0); - } -} - - - -/* Misc. routines */ - -void -print_mem (mem_addr addr) -{ - mem_word value; - - if ((addr & 0x3) != 0) - addr &= ~0x3; /* Address must be word-aligned */ - - if (TEXT_BOT <= addr && addr < text_top) - print_inst (addr); - else if (DATA_BOT <= addr && addr < data_top) - { - value = read_mem_word (addr); - write_output (message_out, "Data seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else if (stack_bot <= addr && addr < STACK_TOP) - { - value = read_mem_word (addr); - write_output (message_out, "Stack seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else if (K_TEXT_BOT <= addr && addr < k_text_top) - print_inst (addr); - else if (K_DATA_BOT <= addr && addr < k_data_top) - { - value = read_mem_word (addr); - write_output (message_out, - "Kernel Data seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else - error ("Address 0x%08x (%d) to print_mem is out of bounds\n", addr, addr); -} diff --git a/spim-qtbase/CPU/mem.h b/spim-qtbase/CPU/mem.h deleted file mode 100755 index 018cbd6..0000000 --- a/spim-qtbase/CPU/mem.h +++ /dev/null @@ -1,161 +0,0 @@ -/* SPIM S20 MIPS simulator. - Macros for accessing memory. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* A note on directions: "Bottom" of memory is the direction of - decreasing addresses. "Top" is the direction of increasing addresses.*/ - - -/* Type of contents of a memory word. */ - -typedef int32 /*@alt unsigned int @*/ mem_word; - - -/* The text segment and boundaries. */ - -extern instruction **text_seg; - -extern bool text_modified; /* => text segment was written */ - -#define TEXT_BOT ((mem_addr) 0x400000) - -extern mem_addr text_top; - - -/* Amount to grow text segment when we run out of space for instructions. */ - -#define TEXT_CHUNK_SIZE 4096 - - -/* The data segment and boundaries. */ - -extern mem_word *data_seg; - -extern bool data_modified; /* => a data segment was written */ - -extern short *data_seg_h; /* Points to same vector as DATA_SEG */ - -#define BYTE_TYPE signed char - - -extern BYTE_TYPE *data_seg_b; /* Ditto */ - -#define DATA_BOT ((mem_addr) 0x10000000) - -extern mem_addr data_top; - -extern mem_addr gp_midpoint; /* Middle of $gp area */ - - -/* The stack segment and boundaries. */ - -extern mem_word *stack_seg; - -extern short *stack_seg_h; /* Points to same vector as STACK_SEG */ - -extern BYTE_TYPE *stack_seg_b; /* Ditto */ - -extern mem_addr stack_bot; - -/* Exclusive, but include 4K at top of stack. */ - -#define STACK_TOP ((mem_addr) 0x80000000) - - -/* The kernel text segment and boundaries. */ - -extern instruction **k_text_seg; - -#define K_TEXT_BOT ((mem_addr) 0x80000000) - -extern mem_addr k_text_top; - - -/* Kernel data segment and boundaries. */ - -extern mem_word *k_data_seg; - -extern short *k_data_seg_h; - -extern BYTE_TYPE *k_data_seg_b; - -#define K_DATA_BOT ((mem_addr) 0x90000000) - -extern mem_addr k_data_top; - - -/* Memory-mapped IO area: */ -#define MM_IO_BOT ((mem_addr) 0xffff0000) -#define MM_IO_TOP ((mem_addr) 0xffffffff) - - -/* Read from console: */ -#define RECV_CTRL_ADDR ((mem_addr) 0xffff0000) -#define RECV_BUFFER_ADDR ((mem_addr) 0xffff0004) - -#define RECV_READY 0x1 -#define RECV_INT_ENABLE 0x2 - -#define RECV_INT_LEVEL 3 /* HW Interrupt 1 */ - - -/* Write to console: */ -#define TRANS_CTRL_ADDR ((mem_addr) 0xffff0008) -#define TRANS_BUFFER_ADDR ((mem_addr) 0xffff000c) - -#define TRANS_READY 0x1 -#define TRANS_INT_ENABLE 0x2 - -#define TRANS_INT_LEVEL 2 /* HW Interrupt 0 */ - - - - -/* Exported functions: */ - -void check_memory_mapped_IO (); -void expand_data (int addl_bytes); -void expand_k_data (int addl_bytes); -void expand_stack (int addl_bytes); -void make_memory (int text_size, int data_size, int data_limit, - int stack_size, int stack_limit, int k_text_size, - int k_data_size, int k_data_limit); -void* mem_reference(mem_addr addr); -void print_mem (mem_addr addr); -instruction* read_mem_inst(mem_addr addr); -reg_word read_mem_byte(mem_addr addr); -reg_word read_mem_half(mem_addr addr); -reg_word read_mem_word(mem_addr addr); -void set_mem_inst(mem_addr addr, instruction* inst); -void set_mem_byte(mem_addr addr, reg_word value); -void set_mem_half(mem_addr addr, reg_word value); -void set_mem_word(mem_addr addr, reg_word value); diff --git a/spim-qtbase/CPU/op.h b/spim-qtbase/CPU/op.h deleted file mode 100755 index 4b46df5..0000000 --- a/spim-qtbase/CPU/op.h +++ /dev/null @@ -1,525 +0,0 @@ -/* SPIM S20 MIPS simulator. - This file describes the MIPS instructions, the assembler pseudo - instructions, the assembler pseudo-ops, and the spim commands. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Type of each entry: */ - -#define ASM_DIR 0 -#define PSEUDO_OP 1 - -#define BC_TYPE_INST 10 -#define B1_TYPE_INST 11 -#define I1s_TYPE_INST 12 -#define I1t_TYPE_INST 13 -#define I2_TYPE_INST 14 -#define B2_TYPE_INST 15 -#define I2a_TYPE_INST 16 - -#define R1s_TYPE_INST 20 -#define R1d_TYPE_INST 21 -#define R2st_TYPE_INST 22 -#define R2ds_TYPE_INST 23 -#define R2td_TYPE_INST 24 -#define R2sh_TYPE_INST 25 -#define R3_TYPE_INST 26 -#define R3sh_TYPE_INST 27 - -#define FP_I2a_TYPE_INST 30 -#define FP_R2ds_TYPE_INST 31 -#define FP_R2ts_TYPE_INST 32 -#define FP_CMP_TYPE_INST 33 -#define FP_R3_TYPE_INST 34 -#define FP_R4_TYPE_INST 35 -#define FP_MOVC_TYPE_INST 36 -#define MOVC_TYPE_INST 37 - -#define J_TYPE_INST 40 -#define NOARG_TYPE_INST 42 - - -/* Information on each keyword token that can be read by spim. Must be - sorted in alphabetical order. */ - -OP(".alias", Y_ALIAS_DIR, ASM_DIR, -1) -OP(".align", Y_ALIGN_DIR, ASM_DIR, -1) -OP(".ascii", Y_ASCII_DIR, ASM_DIR, -1) -OP(".asciiz", Y_ASCIIZ_DIR, ASM_DIR, -1) -OP(".asm0", Y_ASM0_DIR, ASM_DIR, -1) -OP(".bgnb", Y_BGNB_DIR, ASM_DIR, -1) -OP(".byte", Y_BYTE_DIR, ASM_DIR, -1) -OP(".comm", Y_COMM_DIR, ASM_DIR, -1) -OP(".data", Y_DATA_DIR, ASM_DIR, -1) -OP(".double", Y_DOUBLE_DIR, ASM_DIR, -1) -OP(".end", Y_END_DIR, ASM_DIR, -1) -OP(".endb", Y_ENDB_DIR, ASM_DIR, -1) -OP(".endr", Y_ENDR_DIR, ASM_DIR, -1) -OP(".ent", Y_ENT_DIR, ASM_DIR, -1) -OP(".err", Y_ERR_DIR, ASM_DIR, -1) -OP(".extern", Y_EXTERN_DIR, ASM_DIR, -1) -OP(".file", Y_FILE_DIR, ASM_DIR, -1) -OP(".float", Y_FLOAT_DIR, ASM_DIR, -1) -OP(".fmask", Y_FMASK_DIR, ASM_DIR, -1) -OP(".frame", Y_FRAME_DIR, ASM_DIR, -1) -OP(".globl", Y_GLOBAL_DIR, ASM_DIR, -1) -OP(".half", Y_HALF_DIR, ASM_DIR, -1) -OP(".kdata", Y_K_DATA_DIR, ASM_DIR, -1) -OP(".ktext", Y_K_TEXT_DIR, ASM_DIR, -1) -OP(".lab", Y_LABEL_DIR, ASM_DIR, -1) -OP(".lcomm", Y_LCOMM_DIR, ASM_DIR, -1) -OP(".livereg", Y_LIVEREG_DIR, ASM_DIR, -1) -OP(".loc", Y_LOC_DIR, ASM_DIR, -1) -OP(".mask", Y_MASK_DIR, ASM_DIR, -1) -OP(".noalias", Y_NOALIAS_DIR, ASM_DIR, -1) -OP(".option", Y_OPTIONS_DIR, ASM_DIR, -1) -OP(".rdata", Y_RDATA_DIR, ASM_DIR, -1) -OP(".repeat", Y_REPEAT_DIR, ASM_DIR, -1) -OP(".sdata", Y_SDATA_DIR, ASM_DIR, -1) -OP(".set", Y_SET_DIR, ASM_DIR, -1) -OP(".space", Y_SPACE_DIR, ASM_DIR, -1) -OP(".struct", Y_STRUCT_DIR, ASM_DIR, -1) -OP(".text", Y_TEXT_DIR, ASM_DIR, -1) -OP(".verstamp",Y_VERSTAMP_DIR, ASM_DIR, -1) -OP(".vreg", Y_VREG_DIR, ASM_DIR, -1) -OP(".word", Y_WORD_DIR, ASM_DIR, -1) - -OP("abs", Y_ABS_POP, PSEUDO_OP, -1) -OP("abs.d", Y_ABS_D_OP, FP_R2ds_TYPE_INST, 0x46200005) -OP("abs.ps", Y_ABS_PS_OP, FP_R2ds_TYPE_INST, 0x46600005) /* MIPS32 Rev 2 */ -OP("abs.s", Y_ABS_S_OP, FP_R2ds_TYPE_INST, 0x46000005) - -OP("add", Y_ADD_OP, R3_TYPE_INST, 0x00000020) -OP("add.d", Y_ADD_D_OP, FP_R3_TYPE_INST, 0x46200000) -OP("add.ps", Y_ADD_PS_OP, FP_R3_TYPE_INST, 0x46600000) /* MIPS32 Rev 2 */ -OP("add.s", Y_ADD_S_OP, FP_R3_TYPE_INST, 0x46000000) -OP("addi", Y_ADDI_OP, I2_TYPE_INST, 0x20000000) -OP("addiu", Y_ADDIU_OP, I2_TYPE_INST, 0x24000000) -OP("addu", Y_ADDU_OP, R3_TYPE_INST, 0x00000021) - -OP("alnv.ps", Y_ALNV_PS_OP, FP_R4_TYPE_INST, 0x4c00001e) /* MIPS32 Rev 2 */ - -OP("and", Y_AND_OP, R3_TYPE_INST, 0x00000024) -OP("andi", Y_ANDI_OP, I2_TYPE_INST, 0x30000000) - -OP("b", Y_B_POP, PSEUDO_OP, -1) -OP("bal", Y_BAL_POP, PSEUDO_OP, -1) - -OP("bc1f", Y_BC1F_OP, BC_TYPE_INST, 0x45000000) -OP("bc1fl", Y_BC1FL_OP, BC_TYPE_INST, 0x45020000) /* MIPS32 */ -OP("bc1t", Y_BC1T_OP, BC_TYPE_INST, 0x45010000) -OP("bc1tl", Y_BC1TL_OP, BC_TYPE_INST, 0x45030000) /* MIPS32 */ - -OP("bc2f", Y_BC2F_OP, BC_TYPE_INST, 0x49000000) -OP("bc2fl", Y_BC2FL_OP, BC_TYPE_INST, 0x49020000) /* MIPS32 */ -OP("bc2t", Y_BC2T_OP, BC_TYPE_INST, 0x49010000) -OP("bc2tl", Y_BC2TL_OP, BC_TYPE_INST, 0x49030000) /* MIPS32 */ - -OP("beq", Y_BEQ_OP, B2_TYPE_INST, 0x10000000) -OP("beql", Y_BEQL_OP, B2_TYPE_INST, 0x50000000) /* MIPS32 */ -OP("beqz", Y_BEQZ_POP, PSEUDO_OP, -1) -OP("bge", Y_BGE_POP, PSEUDO_OP, -1) -OP("bgeu", Y_BGEU_POP, PSEUDO_OP, -1) -OP("bgez", Y_BGEZ_OP, B1_TYPE_INST, 0x04010000) -OP("bgezal", Y_BGEZAL_OP, B1_TYPE_INST, 0x04110000) -OP("bgezall", Y_BGEZALL_OP, B1_TYPE_INST, 0x04130000) /* MIPS32 */ -OP("bgezl", Y_BGEZL_OP, B1_TYPE_INST, 0x04030000) /* MIPS32 */ -OP("bgt", Y_BGT_POP, PSEUDO_OP, -1) -OP("bgtu", Y_BGTU_POP, PSEUDO_OP, -1) -OP("bgtz", Y_BGTZ_OP, B1_TYPE_INST, 0x1c000000) -OP("bgtzl", Y_BGTZL_OP, B1_TYPE_INST, 0x5c000000) /* MIPS32 */ -OP("ble", Y_BLE_POP, PSEUDO_OP, -1) -OP("bleu", Y_BLEU_POP, PSEUDO_OP, -1) -OP("blez", Y_BLEZ_OP, B1_TYPE_INST, 0x18000000) -OP("blezl", Y_BLEZL_OP, B1_TYPE_INST, 0x58000000) /* MIPS32 */ -OP("blt", Y_BLT_POP, PSEUDO_OP, -1) -OP("bltu", Y_BLTU_POP, PSEUDO_OP, -1) -OP("bltz", Y_BLTZ_OP, B1_TYPE_INST, 0x04000000) -OP("bltzal", Y_BLTZAL_OP, B1_TYPE_INST, 0x04100000) -OP("bltzall", Y_BLTZALL_OP, B1_TYPE_INST, 0x04120000) /* MIPS32 */ -OP("bltzl", Y_BLTZL_OP, B1_TYPE_INST, 0x04020000) /* MIPS32 */ -OP("bne", Y_BNE_OP, B2_TYPE_INST, 0x14000000) -OP("bnel", Y_BNEL_OP, B2_TYPE_INST, 0x54000000) /* MIPS32 */ -OP("bnez", Y_BNEZ_POP, PSEUDO_OP, -1) - -OP("break", Y_BREAK_OP, NOARG_TYPE_INST, 0x0000000d) - -OP("c.eq.d", Y_C_EQ_D_OP, FP_CMP_TYPE_INST, 0x46200032) -OP("c.eq.ps", Y_C_EQ_PS_OP, FP_CMP_TYPE_INST, 0x46600032) /* MIPS32 Rev 2 */ -OP("c.eq.s", Y_C_EQ_S_OP, FP_CMP_TYPE_INST, 0x46000032) -OP("c.f.d", Y_C_F_D_OP, FP_CMP_TYPE_INST, 0x46200030) -OP("c.f.ps", Y_C_F_PS_OP, FP_CMP_TYPE_INST, 0x46600030) /* MIPS32 Rev 2 */ -OP("c.f.s", Y_C_F_S_OP, FP_CMP_TYPE_INST, 0x46000030) -OP("c.le.d", Y_C_LE_D_OP, FP_CMP_TYPE_INST, 0x4620003e) -OP("c.le.ps", Y_C_LE_PS_OP, FP_CMP_TYPE_INST, 0x4660003e) /* MIPS32 Rev 2 */ -OP("c.le.s", Y_C_LE_S_OP, FP_CMP_TYPE_INST, 0x4600003e) -OP("c.lt.d", Y_C_LT_D_OP, FP_CMP_TYPE_INST, 0x4620003c) -OP("c.lt.ps", Y_C_LT_PS_OP, FP_CMP_TYPE_INST, 0x4660003c) /* MIPS32 Rev 2 */ -OP("c.lt.s", Y_C_LT_S_OP, FP_CMP_TYPE_INST, 0x4600003c) -OP("c.nge.d", Y_C_NGE_D_OP, FP_CMP_TYPE_INST, 0x4620003d) -OP("c.nge.ps", Y_C_NGE_PS_OP, FP_CMP_TYPE_INST, 0x4660003d) /* MIPS32 Rev 2 */ -OP("c.nge.s", Y_C_NGE_S_OP, FP_CMP_TYPE_INST, 0x4600003d) -OP("c.ngl.d", Y_C_NGL_D_OP, FP_CMP_TYPE_INST, 0x4620003b) -OP("c.ngl.ps", Y_C_NGL_PS_OP, FP_CMP_TYPE_INST, 0x4660003b) /* MIPS32 Rev 2 */ -OP("c.ngl.s", Y_C_NGL_S_OP, FP_CMP_TYPE_INST, 0x4600003b) -OP("c.ngle.d", Y_C_NGLE_D_OP, FP_CMP_TYPE_INST, 0x46200039) -OP("c.ngle.ps", Y_C_NGLE_PS_OP, FP_CMP_TYPE_INST, 0x46600039) /* MIPS32 Rev 2 */ -OP("c.ngle.s", Y_C_NGLE_S_OP, FP_CMP_TYPE_INST, 0x46000039) -OP("c.ngt.d", Y_C_NGT_D_OP, FP_CMP_TYPE_INST, 0x4620003f) -OP("c.ngt.ps", Y_C_NGT_PS_OP, FP_CMP_TYPE_INST, 0x4660003f) /* MIPS32 Rev 2 */ -OP("c.ngt.s", Y_C_NGT_S_OP, FP_CMP_TYPE_INST, 0x4600003f) -OP("c.ole.d", Y_C_OLE_D_OP, FP_CMP_TYPE_INST, 0x46200036) -OP("c.ole.ps", Y_C_OLE_PS_OP, FP_CMP_TYPE_INST, 0x46600036) /* MIPS32 Rev 2 */ -OP("c.ole.s", Y_C_OLE_S_OP, FP_CMP_TYPE_INST, 0x46000036) -OP("c.olt.d", Y_C_OLT_D_OP, FP_CMP_TYPE_INST, 0x46200034) -OP("c.olt.ps", Y_C_OLT_PS_OP, FP_CMP_TYPE_INST, 0x46600034) /* MIPS32 Rev 2 */ -OP("c.olt.s", Y_C_OLT_S_OP, FP_CMP_TYPE_INST, 0x46000034) -OP("c.seq.d", Y_C_SEQ_D_OP, FP_CMP_TYPE_INST, 0x4620003a) -OP("c.seq.ps", Y_C_SEQ_PS_OP, FP_CMP_TYPE_INST, 0x4660003a) /* MIPS32 Rev 2 */ -OP("c.seq.s", Y_C_SEQ_S_OP, FP_CMP_TYPE_INST, 0x4600003a) -OP("c.sf.d", Y_C_SF_D_OP, FP_CMP_TYPE_INST, 0x46200038) -OP("c.sf.ps", Y_C_SF_PS_OP, FP_CMP_TYPE_INST, 0x46600038) /* MIPS32 Rev 2 */ -OP("c.sf.s", Y_C_SF_S_OP, FP_CMP_TYPE_INST, 0x46000038) -OP("c.ueq.d", Y_C_UEQ_D_OP, FP_CMP_TYPE_INST, 0x46200033) -OP("c.ueq.ps", Y_C_UEQ_PS_OP, FP_CMP_TYPE_INST, 0x46600033) /* MIPS32 Rev 2 */ -OP("c.ueq.s", Y_C_UEQ_S_OP, FP_CMP_TYPE_INST, 0x46000033) -OP("c.ule.d", Y_C_ULE_D_OP, FP_CMP_TYPE_INST, 0x46200037) -OP("c.ule.ps", Y_C_ULE_PS_OP, FP_CMP_TYPE_INST, 0x46600037) /* MIPS32 Rev 2 */ -OP("c.ule.s", Y_C_ULE_S_OP, FP_CMP_TYPE_INST, 0x46000037) -OP("c.ult.d", Y_C_ULT_D_OP, FP_CMP_TYPE_INST, 0x46200035) -OP("c.ult.ps", Y_C_ULT_PS_OP, FP_CMP_TYPE_INST, 0x46600035) /* MIPS32 Rev 2 */ -OP("c.ult.s", Y_C_ULT_S_OP, FP_CMP_TYPE_INST, 0x46000035) -OP("c.un.d", Y_C_UN_D_OP, FP_CMP_TYPE_INST, 0x46200031) -OP("c.un.ps", Y_C_UN_PS_OP, FP_CMP_TYPE_INST, 0x46600031) /* MIPS32 Rev 2 */ -OP("c.un.s", Y_C_UN_S_OP, FP_CMP_TYPE_INST, 0x46000031) - -OP("cache", Y_CACHE_OP, I2_TYPE_INST, 0xbc000000) /* MIPS32 */ - -OP("ceil.l.d", Y_CEIL_L_D_OP, FP_R2ds_TYPE_INST, 0x4620000a) /* MIPS32 Rev 2 */ -OP("ceil.l.s", Y_CEIL_L_S_OP, FP_R2ds_TYPE_INST, 0x4600000a) /* MIPS32 Rev 2 */ -OP("ceil.w.d", Y_CEIL_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000e) /* MIPS32 */ -OP("ceil.w.s", Y_CEIL_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000e) /* MIPS32 */ - -OP("cfc0", Y_CFC0_OP, FP_R2ts_TYPE_INST, 0x40400000) -OP("cfc1", Y_CFC1_OP, FP_R2ts_TYPE_INST, 0x44400000) -OP("cfc2", Y_CFC2_OP, FP_R2ts_TYPE_INST, 0x48400000) - -OP("clo", Y_CLO_OP, R3_TYPE_INST, 0x70000021) -OP("clz", Y_CLZ_OP, R3_TYPE_INST, 0x70000020) - -OP("cop2", Y_COP2_OP, J_TYPE_INST, 0x4a000000) - -OP("ctc0", Y_CTC0_OP, FP_R2ts_TYPE_INST, 0x40c00000) -OP("ctc1", Y_CTC1_OP, FP_R2ts_TYPE_INST, 0x44c00000) -OP("ctc2", Y_CTC2_OP, FP_R2ts_TYPE_INST, 0x48c00000) - -OP("cvt.d.l", Y_CVT_D_L_OP, FP_R2ds_TYPE_INST, 0x46b00021) /* MIPS32 Rev 2 */ -OP("cvt.d.s", Y_CVT_D_S_OP, FP_R2ds_TYPE_INST, 0x46000021) -OP("cvt.d.w", Y_CVT_D_W_OP, FP_R2ds_TYPE_INST, 0x46200021) -OP("cvt.l.d", Y_CVT_L_D_OP, FP_R2ds_TYPE_INST, 0x46200025) /* MIPS32 Rev 2 */ -OP("cvt.l.s", Y_CVT_L_S_OP, FP_R2ds_TYPE_INST, 0x46000025) /* MIPS32 Rev 2 */ -OP("cvt.ps.s", Y_CVT_PS_S_OP, FP_R2ds_TYPE_INST, 0x46000026) /* MIPS32 Rev 2 */ -OP("cvt.s.d", Y_CVT_S_D_OP, FP_R2ds_TYPE_INST, 0x46200020) -OP("cvt.s.l", Y_CVT_S_L_OP, FP_R2ds_TYPE_INST, 0x46b00020) /* MIPS32 Rev 2 */ -OP("cvt.s.pl", Y_CVT_S_PL_OP, FP_R2ds_TYPE_INST, 0x46c00024) /* MIPS32 Rev 2 */ -OP("cvt.s.pu", Y_CVT_S_PU_OP, FP_R2ds_TYPE_INST, 0x46c00020) /* MIPS32 Rev 2 */ -OP("cvt.s.w", Y_CVT_S_W_OP, FP_R2ds_TYPE_INST, 0x46800020) -OP("cvt.w.d", Y_CVT_W_D_OP, FP_R2ds_TYPE_INST, 0x46200024) -OP("cvt.w.s", Y_CVT_W_S_OP, FP_R2ds_TYPE_INST, 0x46000024) - -OP("deret", Y_DERET_OP, NOARG_TYPE_INST, 0x4200001f) /* MIPS32 Rev 2 */ -OP("di", Y_DI_OP, I1t_TYPE_INST, 0x41606000) /* MIPS32 Rev 2 */ - -OP("div", Y_DIV_OP, R2st_TYPE_INST, 0x0000001a) -OP("div.d", Y_DIV_D_OP, FP_R3_TYPE_INST, 0x46200003) -OP("div.s", Y_DIV_S_OP, FP_R3_TYPE_INST, 0x46000003) -OP("divu", Y_DIVU_OP, R2st_TYPE_INST, 0x0000001b) - -OP("ehb", Y_EHB_OP, NOARG_TYPE_INST, 0x000000c0) /* MIPS32 Rev 2 */ -OP("ei", Y_EI_OP, I1t_TYPE_INST, 0x41606020) /* MIPS32 Rev 2 */ -OP("eret", Y_ERET_OP, NOARG_TYPE_INST, 0x42000018) /* MIPS32 */ -OP("ext", Y_EXT_OP, FP_R2ds_TYPE_INST, 0x7c000000) /* MIPS32 Rev 2 */ - -OP("floor.l.d", Y_FLOOR_L_D_OP, FP_R2ds_TYPE_INST, 0x4620000b) /* MIPS32 Rev 2 */ -OP("floor.l.s", Y_FLOOR_L_S_OP, FP_R2ds_TYPE_INST, 0x4600000b) /* MIPS32 Rev 2 */ -OP("floor.w.d", Y_FLOOR_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000f) /* MIPS32 */ -OP("floor.w.s", Y_FLOOR_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000f) /* MIPS32 */ - -OP("ins", Y_INS_OP, FP_R2ds_TYPE_INST, 0x7c000004) /* MIPS32 Rev 2 */ - -OP("j", Y_J_OP, J_TYPE_INST, 0x08000000) -OP("jal", Y_JAL_OP, J_TYPE_INST, 0x0c000000) -OP("jalr", Y_JALR_OP, R2ds_TYPE_INST, 0x00000009) -OP("jalr.hb", Y_JALR_HB_OP, R2ds_TYPE_INST, 0x00000409) /* MIPS32 Rev 2 */ - -OP("jr", Y_JR_OP, R1s_TYPE_INST, 0x00000008) -OP("jr.hb", Y_JR_HB_OP, R1s_TYPE_INST, 0x00000408) /* MIPS32 Rev 2 */ - -OP("l.d", Y_L_D_POP, PSEUDO_OP, -1) -OP("l.s", Y_L_S_POP, PSEUDO_OP, -1) - -OP("la", Y_LA_POP, PSEUDO_OP, -1) -OP("lb", Y_LB_OP, I2a_TYPE_INST, 0x80000000) -OP("lbu", Y_LBU_OP, I2a_TYPE_INST, 0x90000000) -OP("ld", Y_LD_POP, PSEUDO_OP, -1) -OP("ldc1", Y_LDC1_OP, FP_I2a_TYPE_INST, 0xd4000000) /* MIPS32 */ -OP("ldc2", Y_LDC2_OP, I2a_TYPE_INST, 0xd8000000) /* MIPS32 */ -OP("ldxc1", Y_LDXC1_OP, FP_R3_TYPE_INST, 0x4c000001) /* MIPS32 Rev 2 */ -OP("lh", Y_LH_OP, I2a_TYPE_INST, 0x84000000) -OP("lhu", Y_LHU_OP, I2a_TYPE_INST, 0x94000000) - -OP("li", Y_LI_POP, PSEUDO_OP, -1) -OP("li.d", Y_LI_D_POP, PSEUDO_OP, -1) -OP("li.s", Y_LI_S_POP, PSEUDO_OP, -1) - -OP("ll", Y_LL_OP, I2a_TYPE_INST, 0xc0000000) /* MIPS32 */ - -OP("lui", Y_LUI_OP, I1t_TYPE_INST, 0x3c000000) -OP("luxc1", Y_LUXC1_OP, FP_R3_TYPE_INST, 0x4c000005) /* MIPS32 Rev 2 */ - -OP("lw", Y_LW_OP, I2a_TYPE_INST, 0x8c000000) -OP("lwc1", Y_LWC1_OP, FP_I2a_TYPE_INST, 0xc4000000) -OP("lwc2", Y_LWC2_OP, I2a_TYPE_INST, 0xc8000000) -OP("lwl", Y_LWL_OP, I2a_TYPE_INST, 0x88000000) -OP("lwr", Y_LWR_OP, I2a_TYPE_INST, 0x98000000) -OP("lwxc1", Y_LWXC1_OP, FP_R3_TYPE_INST, 0x4c000000) /* MIPS32 Rev 2 */ - -OP("madd", Y_MADD_OP, R2st_TYPE_INST, 0x70000000) /* MIPS32 */ -OP("madd.d", Y_MADD_D_OP, FP_R4_TYPE_INST, 0x4c000001) /* MIPS32 Rev 2 */ -OP("madd.ps", Y_MADD_PS_OP, FP_R4_TYPE_INST, 0x4c000006) /* MIPS32 Rev 2 */ -OP("madd.s", Y_MADD_S_OP, FP_R4_TYPE_INST, 0x4c000000) /* MIPS32 Rev 2 */ -OP("maddu", Y_MADDU_OP, R2st_TYPE_INST, 0x70000001) /* MIPS32 */ - -OP("mfc0", Y_MFC0_OP, R2td_TYPE_INST, 0x40000000) -OP("mfc1", Y_MFC1_OP, FP_R2ts_TYPE_INST, 0x44000000) -OP("mfc1.d", Y_MFC1_D_POP, PSEUDO_OP, -1) -OP("mfc2", Y_MFC2_OP, R2td_TYPE_INST, 0x48000000) -OP("mfhc1", Y_MFHC1_OP, FP_R2ts_TYPE_INST, 0x44600000) /* MIPS32 Rev 2 */ -OP("mfhc2", Y_MFHC2_OP, R2td_TYPE_INST, 0x48600000) /* MIPS32 Rev 2 */ -OP("mfhi", Y_MFHI_OP, R1d_TYPE_INST, 0x00000010) -OP("mflo", Y_MFLO_OP, R1d_TYPE_INST, 0x00000012) - -OP("mov.d", Y_MOV_D_OP, FP_R2ds_TYPE_INST, 0x46200006) -OP("mov.ps", Y_MOV_PS_OP, FP_R2ds_TYPE_INST, 0x46c00006) /* MIPS32 Rev 2 */ -OP("mov.s", Y_MOV_S_OP, FP_R2ds_TYPE_INST, 0x46000006) -OP("move", Y_MOVE_POP, PSEUDO_OP, -1) - -OP("movf", Y_MOVF_OP, MOVC_TYPE_INST, 0x00000001) /* MIPS32 */ -OP("movf.d", Y_MOVF_D_OP, FP_MOVC_TYPE_INST, 0x46200011) /* MIPS32 */ -OP("movf.ps", Y_MOVF_PS_OP, FP_MOVC_TYPE_INST, 0x46c00011) /* MIPS32 Rev 2 */ -OP("movf.s", Y_MOVF_S_OP, FP_MOVC_TYPE_INST, 0x46000011) /* MIPS32 */ - -OP("movn", Y_MOVN_OP, R3_TYPE_INST, 0x0000000b) /* MIPS32 */ -OP("movn.d", Y_MOVN_D_OP, FP_MOVC_TYPE_INST, 0x46200013) /* MIPS32 */ -OP("movn.ps", Y_MOVN_PS_OP, FP_MOVC_TYPE_INST, 0x46c00013) /* MIPS32 Rev 2 */ -OP("movn.s", Y_MOVN_S_OP, FP_MOVC_TYPE_INST, 0x46000013) /* MIPS32 */ - -OP("movt", Y_MOVT_OP, MOVC_TYPE_INST, 0x00010001) /* MIPS32 */ -OP("movt.d", Y_MOVT_D_OP, FP_MOVC_TYPE_INST, 0x46210011) /* MIPS32 */ -OP("movt.ps", Y_MOVT_PS_OP, FP_MOVC_TYPE_INST, 0x46c10011) /* MIPS32 Rev 2 */ -OP("movt.s", Y_MOVT_S_OP, FP_MOVC_TYPE_INST, 0x46010011) /* MIPS32 */ - -OP("movz", Y_MOVZ_OP, R3_TYPE_INST, 0x0000000a) /* MIPS32 */ -OP("movz.d", Y_MOVZ_D_OP, FP_MOVC_TYPE_INST, 0x46200012) /* MIPS32 */ -OP("movz.ps", Y_MOVZ_PS_OP, FP_MOVC_TYPE_INST, 0x46c00012) /* MIPS32 Rev 2 */ -OP("movz.s", Y_MOVZ_S_OP, FP_MOVC_TYPE_INST, 0x46000012) /* MIPS32 */ - -OP("msub", Y_MSUB_OP, R2st_TYPE_INST, 0x70000004) /* MIPS32 */ -OP("msub.d", Y_MSUB_D_OP, FP_R4_TYPE_INST, 0x4c000021) /* MIPS32 Rev 2 */ -OP("msub.ps", Y_MSUB_PS_OP, FP_R4_TYPE_INST, 0x4c000026) /* MIPS32 Rev 2 */ -OP("msub.s", Y_MSUB_S_OP, FP_R4_TYPE_INST, 0x4c000020) /* MIPS32 Rev 2 */ -OP("msubu", Y_MSUBU_OP, R2st_TYPE_INST, 0x70000005) /* MIPS32 */ - -OP("mtc0", Y_MTC0_OP, R2td_TYPE_INST, 0x40800000) -OP("mtc1", Y_MTC1_OP, FP_R2ts_TYPE_INST, 0x44800000) -OP("mtc1.d", Y_MTC1_D_POP, PSEUDO_OP, -1) -OP("mtc2", Y_MTC2_OP, R2td_TYPE_INST, 0x48800000) -OP("mthc1", Y_MTHC1_OP, FP_R2ts_TYPE_INST, 0x44e00000) /* MIPS32 Rev 2 */ -OP("mthc2", Y_MTHC2_OP, R2td_TYPE_INST, 0x48e00000) /* MIPS32 Rev 2 */ - -OP("mthi", Y_MTHI_OP, R1s_TYPE_INST, 0x00000011) -OP("mtlo", Y_MTLO_OP, R1s_TYPE_INST, 0x00000013) - -OP("mul", Y_MUL_OP, R3_TYPE_INST, 0x70000002) /* MIPS32 */ -OP("mul.d", Y_MUL_D_OP, FP_R3_TYPE_INST, 0x46200002) -OP("mul.ps", Y_MUL_PS_OP, FP_R3_TYPE_INST, 0x46c00002) /* MIPS32 Rev 2 */ -OP("mul.s", Y_MUL_S_OP, FP_R3_TYPE_INST, 0x46000002) -OP("mulo", Y_MULO_POP, PSEUDO_OP, -1) -OP("mulou", Y_MULOU_POP, PSEUDO_OP, -1) -OP("mult", Y_MULT_OP, R2st_TYPE_INST, 0x00000018) -OP("multu", Y_MULTU_OP, R2st_TYPE_INST, 0x00000019) - -OP("neg", Y_NEG_POP, PSEUDO_OP, -1) -OP("neg.d", Y_NEG_D_OP, FP_R2ds_TYPE_INST, 0x46200007) -OP("neg.ps", Y_NEG_PS_OP, FP_R2ds_TYPE_INST, 0x46c00007) /* MIPS32 Rev 2 */ -OP("neg.s", Y_NEG_S_OP, FP_R2ds_TYPE_INST, 0x46000007) -OP("negu", Y_NEGU_POP, PSEUDO_OP, -1) - -OP("nmadd.d", Y_NMADD_D_OP, FP_R4_TYPE_INST, 0x4c000031) /* MIPS32 Rev 2 */ -OP("nmadd.ps", Y_NMADD_PS_OP, FP_R4_TYPE_INST, 0x4c000036) /* MIPS32 Rev 2 */ -OP("nmadd.s", Y_NMADD_S_OP, FP_R4_TYPE_INST, 0x4c000030) /* MIPS32 Rev 2 */ -OP("nmsub.d", Y_NMSUB_D_OP, FP_R4_TYPE_INST, 0x4c000039) /* MIPS32 Rev 2 */ -OP("nmsub.ps", Y_NMSUB_PS_OP, FP_R4_TYPE_INST, 0x4c00003e) /* MIPS32 Rev 2 */ -OP("nmsub.s", Y_NMSUB_S_OP, FP_R4_TYPE_INST, 0x4c000038) /* MIPS32 Rev 2 */ - -OP("nop", Y_NOP_POP, PSEUDO_OP, -1) -OP("nor", Y_NOR_OP, R3_TYPE_INST, 0x00000027) -OP("not", Y_NOT_POP, PSEUDO_OP, -1) -OP("or", Y_OR_OP, R3_TYPE_INST, 0x00000025) -OP("ori", Y_ORI_OP, I2_TYPE_INST, 0x34000000) - -OP("pll.ps", Y_PLL_PS_OP, FP_R3_TYPE_INST, 0x46c0002c) /* MIPS32 Rev 2 */ -OP("plu.ps", Y_PLU_PS_OP, FP_R3_TYPE_INST, 0x46c0002d) /* MIPS32 Rev 2 */ - -OP("pref", Y_PREF_OP, I2_TYPE_INST, 0xcc000000) /* MIPS32 */ -OP("prefx", Y_PREFX_OP, R2st_TYPE_INST, 0x4600000f) /* MIPS32 Rev 2 */ -OP("pul.ps", Y_PUL_PS_OP, FP_R3_TYPE_INST, 0x46c0002e) /* MIPS32 Rev 2 */ -OP("puu.ps", Y_PUU_PS_OP, FP_R3_TYPE_INST, 0x46c0002f) /* MIPS32 Rev 2 */ - -OP("rdhwr", Y_RDHWR_OP, R3_TYPE_INST, 0x7c00003b) /* MIPS32 Rev 2 */ -OP("rdpgpr", Y_RDPGPR_OP, R2td_TYPE_INST, 0x41400000) /* MIPS32 Rev 2 */ - -OP("recip.d", Y_RECIP_D_OP, FP_R2ds_TYPE_INST, 0x46200015) /* MIPS32 Rev 2 */ -OP("recip.s", Y_RECIP_S_OP, FP_R2ds_TYPE_INST, 0x46000015) /* MIPS32 Rev 2 */ - -OP("rem", Y_REM_POP, PSEUDO_OP, -1) -OP("remu", Y_REMU_POP, PSEUDO_OP, -1) - -OP("rfe", Y_RFE_OP, NOARG_TYPE_INST, 0x42000010) - -OP("rol", Y_ROL_POP, PSEUDO_OP, -1) -OP("ror", Y_ROR_POP, PSEUDO_OP, -1) -OP("rotr", Y_ROTR_OP, R2sh_TYPE_INST, 0x00200002) /* MIPS32 Rev 2 */ -OP("rotrv", Y_ROTRV_OP, R2sh_TYPE_INST, 0x00200003) /* MIPS32 Rev 2 */ - -OP("round.l.d", Y_ROUND_L_D_OP, FP_R2ds_TYPE_INST, 0x46200008) /* MIPS32 Rev 2 */ -OP("round.l.s", Y_ROUND_L_S_OP, FP_R2ds_TYPE_INST, 0x46000008) /* MIPS32 Rev 2 */ -OP("round.w.d", Y_ROUND_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000c) /* MIPS32 */ -OP("round.w.s", Y_ROUND_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000c) /* MIPS32 */ - -OP("rsqrt.d", Y_RSQRT_D_OP, FP_R2ds_TYPE_INST, 0x46200016) /* MIPS32 Rev 2 */ -OP("rsqrt.s", Y_RSQRT_S_OP, FP_R2ds_TYPE_INST, 0x46000016) /* MIPS32 Rev 2 */ - -OP("s.d", Y_S_D_POP, PSEUDO_OP, -1) -OP("s.s", Y_S_S_POP, PSEUDO_OP, -1) - -OP("sb", Y_SB_OP, I2a_TYPE_INST, 0xa0000000) -OP("sc", Y_SC_OP, I2a_TYPE_INST, 0xe0000000) /* MIPS32 */ -OP("sd", Y_SD_POP, PSEUDO_OP, -1) -OP("sdbbp", Y_SDBBP_OP, NOARG_TYPE_INST, 0x7000003f) /* MIPS32 Rev 2*/ -OP("sdc1", Y_SDC1_OP, FP_I2a_TYPE_INST, 0xf4000000) /* MIPS32 */ -OP("sdc2", Y_SDC2_OP, I2a_TYPE_INST, 0xf8000000) /* MIPS32 */ -OP("sdxc1", Y_SDXC1_OP, FP_R3_TYPE_INST, 0x46000009) /* MIPS32 Rev 2 */ - -OP("seb", Y_SEB_OP, R2td_TYPE_INST, 0x7c000420) /* MIPS32 Rev 2 */ -OP("seh", Y_SEH_OP, R2td_TYPE_INST, 0x7c000620) /* MIPS32 Rev 2 */ -OP("seq", Y_SEQ_POP, PSEUDO_OP, -1) -OP("sge", Y_SGE_POP, PSEUDO_OP, -1) -OP("sgeu", Y_SGEU_POP, PSEUDO_OP, -1) -OP("sgt", Y_SGT_POP, PSEUDO_OP, -1) -OP("sgtu", Y_SGTU_POP, PSEUDO_OP, -1) - -OP("sh", Y_SH_OP, I2a_TYPE_INST, 0xa4000000) -OP("sle", Y_SLE_POP, PSEUDO_OP, -1) -OP("sleu", Y_SLEU_POP, PSEUDO_OP, -1) -OP("sll", Y_SLL_OP, R2sh_TYPE_INST, 0x00000000) -OP("sllv", Y_SLLV_OP, R3sh_TYPE_INST, 0x00000004) - -OP("slt", Y_SLT_OP, R3_TYPE_INST, 0x0000002a) -OP("slti", Y_SLTI_OP, I2_TYPE_INST, 0x28000000) -OP("sltiu", Y_SLTIU_OP, I2_TYPE_INST, 0x2c000000) -OP("sltu", Y_SLTU_OP, R3_TYPE_INST, 0x0000002b) -OP("sne", Y_SNE_POP, PSEUDO_OP, -1) - -OP("sqrt.d", Y_SQRT_D_OP, FP_R2ds_TYPE_INST, 0x46200004) /* MIPS32 */ -OP("sqrt.s", Y_SQRT_S_OP, FP_R2ds_TYPE_INST, 0x46000004) /* MIPS32 */ - -OP("sra", Y_SRA_OP, R2sh_TYPE_INST, 0x00000003) -OP("srav", Y_SRAV_OP, R3sh_TYPE_INST, 0x00000007) -OP("srl", Y_SRL_OP, R2sh_TYPE_INST, 0x00000002) -OP("srlv", Y_SRLV_OP, R3sh_TYPE_INST, 0x00000006) - -OP("ssnop", Y_SSNOP_OP, R2sh_TYPE_INST, 0x00000040) /* MIPS32 */ - -OP("sub", Y_SUB_OP, R3_TYPE_INST, 0x00000022) -OP("sub.d", Y_SUB_D_OP, FP_R3_TYPE_INST, 0x46200001) -OP("sub.ps", Y_SUB_PS_OP, FP_R3_TYPE_INST, 0x46600001) /* MIPS32 Rev 2 */ -OP("sub.s", Y_SUB_S_OP, FP_R3_TYPE_INST, 0x46000001) -OP("subu", Y_SUBU_OP, R3_TYPE_INST, 0x00000023) - -OP("suxc1", Y_SUXC1_OP, FP_R3_TYPE_INST, 0x4600000d) /* MIPS32 Rev 2 */ - -OP("sw", Y_SW_OP, I2a_TYPE_INST, 0xac000000) -OP("swc1", Y_SWC1_OP, FP_I2a_TYPE_INST, 0xe4000000) -OP("swc2", Y_SWC2_OP, I2a_TYPE_INST, 0xe8000000) -OP("swl", Y_SWL_OP, I2a_TYPE_INST, 0xa8000000) -OP("swr", Y_SWR_OP, I2a_TYPE_INST, 0xb8000000) -OP("swxc1", Y_SWXC1_OP, FP_R3_TYPE_INST, 0x46000008) /* MIPS32 Rev 2 */ - -OP("sync", Y_SYNC_OP, NOARG_TYPE_INST, 0x0000000f) /* MIPS32 */ -OP("synci", Y_SYNCI_OP, I2_TYPE_INST, 0x04140000) /* MIPS32 Rev 2 */ -OP("syscall", Y_SYSCALL_OP, NOARG_TYPE_INST, 0x0000000c) - -OP("teq", Y_TEQ_OP, R2st_TYPE_INST, 0x00000034) /* MIPS32 */ -OP("teqi", Y_TEQI_OP, I1s_TYPE_INST, 0x040c0000) /* MIPS32 */ -OP("tge", Y_TGE_OP, R2st_TYPE_INST, 0x00000030) /* MIPS32 */ -OP("tgei", Y_TGEI_OP, I1s_TYPE_INST, 0x04080000) /* MIPS32 */ -OP("tgeiu", Y_TGEIU_OP, I1s_TYPE_INST, 0x04090000) /* MIPS32 */ -OP("tgeu", Y_TGEU_OP, R2st_TYPE_INST, 0x00000031) /* MIPS32 */ - -OP("tlbp", Y_TLBP_OP, NOARG_TYPE_INST, 0x42000008) -OP("tlbr", Y_TLBR_OP, NOARG_TYPE_INST, 0x42000001) -OP("tlbwi", Y_TLBWI_OP, NOARG_TYPE_INST, 0x42000002) -OP("tlbwr", Y_TLBWR_OP, NOARG_TYPE_INST, 0x42000006) - -OP("tlt", Y_TLT_OP, R2st_TYPE_INST, 0x00000032) /* MIPS32 */ -OP("tlti", Y_TLTI_OP, I1s_TYPE_INST, 0x040a0000) /* MIPS32 */ -OP("tltiu", Y_TLTIU_OP, I1s_TYPE_INST, 0x040b0000) /* MIPS32 */ -OP("tltu", Y_TLTU_OP, R2st_TYPE_INST, 0x00000033) /* MIPS32 */ -OP("tne", Y_TNE_OP, R2st_TYPE_INST, 0x00000036) /* MIPS32 */ -OP("tnei", Y_TNEI_OP, I1s_TYPE_INST, 0x040e0000) /* MIPS32 */ - -OP("trunc.l.d", Y_TRUNC_L_D_OP, FP_R2ds_TYPE_INST, 0x46200009) /* MIPS32 Rev 2 */ -OP("trunc.l.s", Y_TRUNC_L_S_OP, FP_R2ds_TYPE_INST, 0x46000009) /* MIPS32 Rev 2 */ -OP("trunc.w.d", Y_TRUNC_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000d) /* MIPS32 */ -OP("trunc.w.s", Y_TRUNC_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000d) /* MIPS32 */ - -OP("ulh", Y_ULH_POP, PSEUDO_OP, -1) -OP("ulhu", Y_ULHU_POP, PSEUDO_OP, -1) -OP("ulw", Y_ULW_POP, PSEUDO_OP, -1) -OP("ush", Y_USH_POP, PSEUDO_OP, -1) -OP("usw", Y_USW_POP, PSEUDO_OP, -1) - -OP("wrpgpr", Y_WRPGPR_OP, R2td_TYPE_INST, 0x41c00000) /* MIPS32 Rev 2 */ -OP("wsbh", Y_WSBH_OP, R2td_TYPE_INST, 0x7c0000a0) /* MIPS32 Rev 2 */ - -OP("xor", Y_XOR_OP, R3_TYPE_INST, 0x00000026) -OP("xori", Y_XORI_OP, I2_TYPE_INST, 0x38000000) diff --git a/spim-qtbase/CPU/parser.h b/spim-qtbase/CPU/parser.h deleted file mode 100755 index 0e120f8..0000000 --- a/spim-qtbase/CPU/parser.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to parser for instructions and assembler directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -void fix_current_label_address (mem_addr new_addr); -int imm_op_to_op (int opcode); -void initialize_parser (char *file_name); -int op_to_imm_op (int opcode); -void yyerror (char *s); -int yyparse (); - - -/* Exported Variables: */ - -extern bool data_dir; /* => item in data segment */ - -extern bool text_dir; /* => item in text segment */ - -extern bool parse_error_occurred; /* => parse resulted in error */ diff --git a/spim-qtbase/CPU/parser.y b/spim-qtbase/CPU/parser.y deleted file mode 100755 index eceee93..0000000 --- a/spim-qtbase/CPU/parser.y +++ /dev/null @@ -1,2967 +0,0 @@ -/* SPIM S20 MIPS simulator. - Parser for instructions and assembler directives. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -%expect 25 /* Supress warning about 25 shift-reduce conflicts */ - -%start LINE - -%token Y_EOF - -%token Y_NL -%token Y_INT -%token Y_ID -%token Y_REG -%token Y_FP_REG -%token Y_STR -%token Y_FP - -/* MIPS instructions op codes: */ - -%token Y_ABS_D_OP -%token Y_ABS_PS_OP -%token Y_ABS_S_OP -%token Y_ADD_D_OP -%token Y_ADD_OP -%token Y_ADD_PS_OP -%token Y_ADD_S_OP -%token Y_ADDI_OP -%token Y_ADDIU_OP -%token Y_ADDU_OP -%token Y_ALNV_PS_OP -%token Y_AND_OP -%token Y_ANDI_OP -%token Y_BC1F_OP -%token Y_BC1FL_OP -%token Y_BC1T_OP -%token Y_BC1TL_OP -%token Y_BC2F_OP -%token Y_BC2FL_OP -%token Y_BC2T_OP -%token Y_BC2TL_OP -%token Y_BEQ_OP -%token Y_BEQL_OP -%token Y_BGEZ_OP -%token Y_BGEZAL_OP -%token Y_BGEZALL_OP -%token Y_BGEZL_OP -%token Y_BGTZ_OP -%token Y_BGTZL_OP -%token Y_BLEZ_OP -%token Y_BLEZL_OP -%token Y_BLTZ_OP -%token Y_BLTZAL_OP -%token Y_BLTZALL_OP -%token Y_BLTZL_OP -%token Y_BNE_OP -%token Y_BNEL_OP -%token Y_BREAK_OP -%token Y_C_EQ_D_OP -%token Y_C_EQ_PS_OP -%token Y_C_EQ_S_OP -%token Y_C_F_D_OP -%token Y_C_F_PS_OP -%token Y_C_F_S_OP -%token Y_C_LE_D_OP -%token Y_C_LE_PS_OP -%token Y_C_LE_S_OP -%token Y_C_LT_D_OP -%token Y_C_LT_PS_OP -%token Y_C_LT_S_OP -%token Y_C_NGE_D_OP -%token Y_C_NGE_PS_OP -%token Y_C_NGE_S_OP -%token Y_C_NGL_D_OP -%token Y_C_NGL_PS_OP -%token Y_C_NGL_S_OP -%token Y_C_NGLE_D_OP -%token Y_C_NGLE_PS_OP -%token Y_C_NGLE_S_OP -%token Y_C_NGT_D_OP -%token Y_C_NGT_PS_OP -%token Y_C_NGT_S_OP -%token Y_C_OLE_D_OP -%token Y_C_OLE_PS_OP -%token Y_C_OLE_S_OP -%token Y_C_OLT_D_OP -%token Y_C_OLT_PS_OP -%token Y_C_OLT_S_OP -%token Y_C_SEQ_D_OP -%token Y_C_SEQ_PS_OP -%token Y_C_SEQ_S_OP -%token Y_C_SF_D_OP -%token Y_C_SF_PS_OP -%token Y_C_SF_S_OP -%token Y_C_UEQ_D_OP -%token Y_C_UEQ_PS_OP -%token Y_C_UEQ_S_OP -%token Y_C_ULE_D_OP -%token Y_C_ULE_PS_OP -%token Y_C_ULE_S_OP -%token Y_C_ULT_D_OP -%token Y_C_ULT_PS_OP -%token Y_C_ULT_S_OP -%token Y_C_UN_D_OP -%token Y_C_UN_PS_OP -%token Y_C_UN_S_OP -%token Y_CACHE_OP -%token Y_CEIL_L_D_OP -%token Y_CEIL_L_S_OP -%token Y_CEIL_W_D_OP -%token Y_CEIL_W_S_OP -%token Y_CFC0_OP -%token Y_CFC1_OP -%token Y_CFC2_OP -%token Y_CLO_OP -%token Y_CLZ_OP -%token Y_COP2_OP -%token Y_CTC0_OP -%token Y_CTC1_OP -%token Y_CTC2_OP -%token Y_CVT_D_L_OP -%token Y_CVT_D_S_OP -%token Y_CVT_D_W_OP -%token Y_CVT_L_D_OP -%token Y_CVT_L_S_OP -%token Y_CVT_PS_S_OP -%token Y_CVT_S_D_OP -%token Y_CVT_S_L_OP -%token Y_CVT_S_PL_OP -%token Y_CVT_S_PU_OP -%token Y_CVT_S_W_OP -%token Y_CVT_W_D_OP -%token Y_CVT_W_S_OP -%token Y_DERET_OP -%token Y_DI_OP -%token Y_DIV_D_OP -%token Y_DIV_OP -%token Y_DIV_S_OP -%token Y_DIVU_OP -%token Y_EHB_OP -%token Y_EI_OP -%token Y_ERET_OP -%token Y_EXT_OP -%token Y_FLOOR_L_D_OP -%token Y_FLOOR_L_S_OP -%token Y_FLOOR_W_D_OP -%token Y_FLOOR_W_S_OP -%token Y_INS_OP -%token Y_J_OP -%token Y_JAL_OP -%token Y_JALR_HB_OP -%token Y_JALR_OP -%token Y_JR_HB_OP -%token Y_JR_OP -%token Y_LB_OP -%token Y_LBU_OP -%token Y_LDC1_OP -%token Y_LDC2_OP -%token Y_LDXC1_OP -%token Y_LH_OP -%token Y_LHU_OP -%token Y_LL_OP -%token Y_LUI_OP -%token Y_LUXC1_OP -%token Y_LW_OP -%token Y_LWC1_OP -%token Y_LWC2_OP -%token Y_LWL_OP -%token Y_LWR_OP -%token Y_LWXC1_OP -%token Y_MADD_D_OP -%token Y_MADD_OP -%token Y_MADD_PS_OP -%token Y_MADD_S_OP -%token Y_MADDU_OP -%token Y_MFC0_OP -%token Y_MFC1_OP -%token Y_MFC2_OP -%token Y_MFHC1_OP -%token Y_MFHC2_OP -%token Y_MFHI_OP -%token Y_MFLO_OP -%token Y_MOV_D_OP -%token Y_MOV_PS_OP -%token Y_MOV_S_OP -%token Y_MOVF_D_OP -%token Y_MOVF_OP -%token Y_MOVF_PS_OP -%token Y_MOVF_S_OP -%token Y_MOVN_D_OP -%token Y_MOVN_OP -%token Y_MOVN_PS_OP -%token Y_MOVN_S_OP -%token Y_MOVT_D_OP -%token Y_MOVT_OP -%token Y_MOVT_PS_OP -%token Y_MOVT_S_OP -%token Y_MOVZ_D_OP -%token Y_MOVZ_OP -%token Y_MOVZ_PS_OP -%token Y_MOVZ_S_OP -%token Y_MSUB_D_OP -%token Y_MSUB_OP -%token Y_MSUB_PS_OP -%token Y_MSUB_S_OP -%token Y_MSUBU_OP -%token Y_MTC0_OP -%token Y_MTC1_OP -%token Y_MTC2_OP -%token Y_MTHC1_OP -%token Y_MTHC2_OP -%token Y_MTHI_OP -%token Y_MTLO_OP -%token Y_MUL_D_OP -%token Y_MUL_PS_OP -%token Y_MUL_S_OP -%token Y_MUL_OP -%token Y_MULT_OP -%token Y_MULTU_OP -%token Y_NEG_D_OP -%token Y_NEG_PS_OP -%token Y_NEG_S_OP -%token Y_NMADD_D_OP -%token Y_NMADD_PS_OP -%token Y_NMADD_S_OP -%token Y_NMSUB_D_OP -%token Y_NMSUB_PS_OP -%token Y_NMSUB_S_OP -%token Y_NOR_OP -%token Y_OR_OP -%token Y_ORI_OP -%token Y_PFW_OP -%token Y_PLL_PS_OP -%token Y_PLU_PS_OP -%token Y_PREF_OP -%token Y_PREFX_OP -%token Y_PUL_PS_OP -%token Y_PUU_PS_OP -%token Y_RDHWR_OP -%token Y_RDPGPR_OP -%token Y_RECIP_D_OP -%token Y_RECIP_S_OP -%token Y_RFE_OP -%token Y_ROTR_OP -%token Y_ROTRV_OP -%token Y_ROUND_L_D_OP -%token Y_ROUND_L_S_OP -%token Y_ROUND_W_D_OP -%token Y_ROUND_W_S_OP -%token Y_RSQRT_D_OP -%token Y_RSQRT_S_OP -%token Y_SB_OP -%token Y_SC_OP -%token Y_SDBBP_OP -%token Y_SDC1_OP -%token Y_SDC2_OP -%token Y_SDXC1_OP -%token Y_SEB_OP -%token Y_SEH_OP -%token Y_SH_OP -%token Y_SLL_OP -%token Y_SLLV_OP -%token Y_SLT_OP -%token Y_SLTI_OP -%token Y_SLTIU_OP -%token Y_SLTU_OP -%token Y_SQRT_D_OP -%token Y_SQRT_S_OP -%token Y_SRA_OP -%token Y_SRAV_OP -%token Y_SRL_OP -%token Y_SRLV_OP -%token Y_SSNOP_OP -%token Y_SUB_D_OP -%token Y_SUB_OP -%token Y_SUB_PS_OP -%token Y_SUB_S_OP -%token Y_SUBU_OP -%token Y_SUXC1_OP -%token Y_SW_OP -%token Y_SWC1_OP -%token Y_SWC2_OP -%token Y_SWL_OP -%token Y_SWR_OP -%token Y_SWXC1_OP -%token Y_SYNC_OP -%token Y_SYNCI_OP -%token Y_SYSCALL_OP -%token Y_TEQ_OP -%token Y_TEQI_OP -%token Y_TGE_OP -%token Y_TGEI_OP -%token Y_TGEIU_OP -%token Y_TGEU_OP -%token Y_TLBP_OP -%token Y_TLBR_OP -%token Y_TLBWI_OP -%token Y_TLBWR_OP -%token Y_TLT_OP -%token Y_TLTI_OP -%token Y_TLTIU_OP -%token Y_TLTU_OP -%token Y_TNE_OP -%token Y_TNEI_OP -%token Y_TRUNC_L_D_OP -%token Y_TRUNC_L_S_OP -%token Y_TRUNC_W_D_OP -%token Y_TRUNC_W_S_OP -%token Y_WRPGPR_OP -%token Y_WSBH_OP -%token Y_XOR_OP -%token Y_XORI_OP - - -/* Assembler pseudo operations op codes: */ - -%token Y_ABS_POP -%token Y_B_POP -%token Y_BAL_POP -%token Y_BEQZ_POP -%token Y_BGE_POP -%token Y_BGEU_POP -%token Y_BGT_POP -%token Y_BGTU_POP -%token Y_BLE_POP -%token Y_BLEU_POP -%token Y_BLT_POP -%token Y_BLTU_POP -%token Y_BNEZ_POP -%token Y_LA_POP -%token Y_LD_POP -%token Y_L_D_POP -%token Y_L_S_POP -%token Y_LI_D_POP -%token Y_LI_POP -%token Y_LI_S_POP -%token Y_MFC1_D_POP -%token Y_MOVE_POP -%token Y_MTC1_D_POP -%token Y_MULO_POP -%token Y_MULOU_POP -%token Y_NEG_POP -%token Y_NEGU_POP -%token Y_NOP_POP -%token Y_NOT_POP -%token Y_REM_POP -%token Y_REMU_POP -%token Y_ROL_POP -%token Y_ROR_POP -%token Y_S_D_POP -%token Y_S_S_POP -%token Y_SD_POP -%token Y_SEQ_POP -%token Y_SGE_POP -%token Y_SGEU_POP -%token Y_SGT_POP -%token Y_SGTU_POP -%token Y_SLE_POP -%token Y_SLEU_POP -%token Y_SNE_POP -%token Y_ULH_POP -%token Y_ULHU_POP -%token Y_ULW_POP -%token Y_USH_POP -%token Y_USW_POP - -/* Assembler directives: */ - -%token Y_ALIAS_DIR -%token Y_ALIGN_DIR -%token Y_ASCII_DIR -%token Y_ASCIIZ_DIR -%token Y_ASM0_DIR -%token Y_BGNB_DIR -%token Y_BYTE_DIR -%token Y_COMM_DIR -%token Y_DATA_DIR -%token Y_DOUBLE_DIR -%token Y_END_DIR -%token Y_ENDB_DIR -%token Y_ENDR_DIR -%token Y_ENT_DIR -%token Y_ERR_DIR -%token Y_EXTERN_DIR -%token Y_FILE_DIR -%token Y_FLOAT_DIR -%token Y_FMASK_DIR -%token Y_FRAME_DIR -%token Y_GLOBAL_DIR -%token Y_HALF_DIR -%token Y_K_DATA_DIR -%token Y_K_TEXT_DIR -%token Y_LABEL_DIR -%token Y_LCOMM_DIR -%token Y_LIVEREG_DIR -%token Y_LOC_DIR -%token Y_MASK_DIR -%token Y_NOALIAS_DIR -%token Y_OPTIONS_DIR -%token Y_RDATA_DIR -%token Y_REPEAT_DIR -%token Y_SDATA_DIR -%token Y_SET_DIR -%token Y_SPACE_DIR -%token Y_STRUCT_DIR -%token Y_TEXT_DIR -%token Y_VERSTAMP_DIR -%token Y_VREG_DIR -%token Y_WORD_DIR - -%{ -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "data.h" -#include "scanner.h" -#include "parser.h" - - -/* return (0) */ -#define LINE_PARSE_DONE YYACCEPT - -/* return (1) */ -#define FILE_PARSE_DONE YYABORT - -typedef struct ll -{ - label *head; - struct ll *tail; -} label_list; - - -/* Exported Variables: */ - -bool data_dir; /* => item in data segment */ - -bool text_dir; /* => item in text segment */ - -bool parse_error_occurred; /* => parse resulted in error */ - - -/* Local functions: */ - -static imm_expr *branch_offset (int n_inst); -static int cc_to_rt (int cc, int nd, int tf); -static void check_imm_range (imm_expr*, int32, int32); -static void check_uimm_range (imm_expr*, uint32, uint32); -static void clear_labels (); -static label_list *cons_label (label *head, label_list *tail); -static void div_inst (int op, int rd, int rs, int rt, int const_divisor); -static void mips32_r2_inst (); -static void mult_inst (int op, int rd, int rs, int rt); -static void nop_inst (); -static void set_eq_inst (int op, int rd, int rs, int rt); -static void set_ge_inst (int op, int rd, int rs, int rt); -static void set_gt_inst (int op, int rd, int rs, int rt); -static void set_le_inst (int op, int rd, int rs, int rt); -static void store_word_data (int value); -static void trap_inst (); -static void yywarn (char*); - - -/* Local variables: */ - -static bool null_term; /* => string terminate by \0 */ - -static void (*store_op) (int); /* Function to store items in an EXPR_LST */ -static void (*store_fp_op) (double*); /* Ditto FP_EXPR_LST */ - -static label_list *this_line_labels = NULL; /* List of label for curent line */ - -static bool noat_flag = 0; /* => program can use $1 */ - -static char *input_file_name; /* Name of file being parsed */ - -%} - - - -%% - -LINE: {parse_error_occurred = false; scanner_start_line (); } LBL_CMD ; - -LBL_CMD: OPT_LBL CMD - | CMD - ; - - -OPT_LBL: ID ':' { - /* Call outside of cons_label, since an error sets that variable to NULL. */ - label* l = record_label ((char*)$1.p, - text_dir ? current_text_pc () : current_data_pc (), - 0); - this_line_labels = cons_label (l, this_line_labels); - free ((char*)$1.p); - } - - | ID '=' EXPR - { - label *l = record_label ((char*)$1.p, (mem_addr)$3.i, 1); - free ((char*)$1.p); - - l->const_flag = 1; - clear_labels (); - } - ; - - -CMD: ASM_CODE - { - clear_labels (); - } - TERM - - | ASM_DIRECTIVE - { - clear_labels (); - } - TERM - - | TERM - ; - - -TERM: Y_NL - { - LINE_PARSE_DONE; - } - - | Y_EOF - { - clear_labels (); - FILE_PARSE_DONE; - } - ; - - - -ASM_CODE: LOAD_OPS DEST ADDRESS - { - i_type_inst ($1.i == Y_LD_POP ? Y_LW_OP : $1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - if ($1.i == Y_LD_POP) - i_type_inst_free (Y_LW_OP, - $2.i + 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 4)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADC_OPS COP_REG ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADFP_OPS F_SRC1 ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADI_OPS DEST UIMM16 - { - i_type_inst_free ($1.i, $2.i, 0, (imm_expr *)$3.p); - } - - - | Y_LA_POP DEST ADDRESS - { - if (addr_expr_reg ((addr_expr *)$3.p)) - i_type_inst (Y_ADDI_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - else - i_type_inst (Y_ORI_OP, $2.i, 0, - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_LI_POP DEST IMM32 - { - i_type_inst_free (Y_ORI_OP, $2.i, 0, (imm_expr *)$3.p); - } - - - | Y_LI_D_POP F_DEST Y_FP - { - int *x = (int *) $3.p; - - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*x)); - r_co_type_inst (Y_MTC1_OP, 0, $2.i, 1); - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*(x+1))); - r_co_type_inst (Y_MTC1_OP, 0, $2.i + 1, 1); - } - - - | Y_LI_S_POP F_DEST Y_FP - { - float x = (float) *((double *) $3.p); - int *y = (int *) &x; - - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*y)); - r_co_type_inst (Y_MTC1_OP, 0, $2.i, 1); - } - - - | Y_ULW_POP DEST ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (Y_LWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_LWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); -#else - i_type_inst_free (Y_LWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); - i_type_inst (Y_LWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | ULOADH_POPS DEST ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (($1.i == Y_ULH_POP ? Y_LB_OP : Y_LBU_OP), - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_LBU_OP, 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); -#else - i_type_inst_free (($1.i == Y_ULH_POP ? Y_LB_OP : Y_LBU_OP), - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); - i_type_inst (Y_LBU_OP, 1, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - r_sh_type_inst (Y_SLL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | LOADFP_INDEX_OPS F_DEST ADDRESS - { - mips32_r2_inst (); - } - - - | STORE_OPS SRC1 ADDRESS - { - i_type_inst ($1.i == Y_SD_POP ? Y_SW_OP : $1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - if ($1.i == Y_SD_POP) - i_type_inst_free (Y_SW_OP, $2.i + 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 4)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREC_OPS COP_REG ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_USW_POP SRC1 ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (Y_SWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_SWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); -#else - i_type_inst_free (Y_SWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); - i_type_inst (Y_SWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_USH_POP SRC1 ADDRESS - { - i_type_inst (Y_SB_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - - /* ROL SRC, SRC, 8 */ - r_sh_type_inst (Y_SLL_OP, 1, $2.i, 24); - r_sh_type_inst (Y_SRL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - - i_type_inst_free (Y_SB_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); - /* ROR SRC, SRC, 8 */ - r_sh_type_inst (Y_SRL_OP, 1, $2.i, 24); - r_sh_type_inst (Y_SLL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREFP_OPS F_SRC1 ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREFP_INDEX_OPS F_DEST ADDRESS - { - mips32_r2_inst (); - } - - - | SYS_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | PREFETCH_OPS ADDRESS - { - mips32_r2_inst (); - } - - - | CACHE_OPS Y_INT ADDRESS - { - i_type_inst_free ($1.i, $2.i, 0, (imm_expr *)$3.p); - } - - - | TLB_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | Y_SYNC_OP - { - r_type_inst ($1.i, 0, 0, 0); - } - - | Y_SYNC_OP Y_INT - { - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | Y_BREAK_OP Y_INT - { - if ($2.i == 1) - yyerror ("Breakpoint 1 is reserved for debugger"); - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | Y_NOP_POP - { - nop_inst (); - } - - - | Y_SSNOP_OP - { - r_sh_type_inst (Y_SLL_OP, 0, 0, 1); /* SLL r0 r0 1 */ - } - - - | Y_ABS_POP DEST SRC1 - { - if ($2.i != $3.i) - r_type_inst (Y_ADDU_OP, $2.i, 0, $3.i); - - i_type_inst_free (Y_BGEZ_OP, 0, $3.i, branch_offset (3)); - nop_inst(); - r_type_inst (Y_SUB_OP, $2.i, 0, $3.i); - } - - - | Y_NEG_POP DEST SRC1 - { - r_type_inst (Y_SUB_OP, $2.i, 0, $3.i); - } - - - | Y_NEGU_POP DEST SRC1 - { - r_type_inst (Y_SUBU_OP, $2.i, 0, $3.i); - } - - - | Y_NOT_POP DEST SRC1 - { - r_type_inst (Y_NOR_OP, $2.i, $3.i, 0); - } - - - | Y_MOVE_POP DEST SRC1 - { - r_type_inst (Y_ADDU_OP, $2.i, 0, $3.i); - } - - - | NULLARY_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | NULLARY_OPS_REV2 - { - mips32_r2_inst (); - } - - - | COUNT_LEADING_OPS DEST SRC1 - { - /* RT must be equal to RD */ - r_type_inst ($1.i, $2.i, $3.i, $2.i); - } - - - | UNARY_OPS_REV2 DEST - { - mips32_r2_inst (); - } - - - | BINARYI_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | BINARYI_OPS DEST SRC1 IMM32 - { - i_type_inst_free (op_to_imm_op ($1.i), $2.i, $3.i, - (imm_expr *)$4.p); - } - - | BINARYI_OPS DEST IMM32 - { - i_type_inst_free (op_to_imm_op ($1.i), $2.i, $2.i, - (imm_expr *)$3.p); - } - - - | BINARYIR_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $4.i, $3.i); - } - - | BINARYIR_OPS DEST SRC1 Y_INT - { - r_sh_type_inst (op_to_imm_op ($1.i), $2.i, $3.i, $4.i); - } - - | BINARYIR_OPS DEST Y_INT - { - r_sh_type_inst (op_to_imm_op ($1.i), $2.i, $2.i, $3.i); - } - - - | BINARY_ARITHI_OPS DEST SRC1 IMM16 - { - i_type_inst_free ($1.i, $2.i, $3.i, (imm_expr *)$4.p); - } - - | BINARY_ARITHI_OPS DEST IMM16 - { - i_type_inst_free ($1.i, $2.i, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_LOGICALI_OPS DEST SRC1 UIMM16 - { - i_type_inst_free ($1.i, $2.i, $3.i, (imm_expr *)$4.p); - } - - | BINARY_LOGICALI_OPS DEST UIMM16 - { - i_type_inst_free ($1.i, $2.i, $2.i, (imm_expr *)$3.p); - } - - - | SHIFT_OPS DEST SRC1 Y_INT - { - if (($4.i < 0) || (31 < $4.i)) - yywarn ("Shift distance can only be in the range 0..31"); - r_sh_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SHIFT_OPS DEST SRC1 SRC2 - { - r_type_inst (imm_op_to_op ($1.i), $2.i, $4.i, $3.i); - } - - - | SHIFT_OPS_REV2 DEST SRC1 Y_INT - { - mips32_r2_inst (); - } - - | SHIFTV_OPS_REV2 DEST SRC1 SRC2 - { - mips32_r2_inst (); - } - - - | BINARY_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | BINARY_OPS DEST SRC1 IMM32 - { - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - r_type_inst ($1.i, - $2.i, - $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - } - free ((imm_expr *)$4.p); - } - - | BINARY_OPS DEST IMM32 - { - check_uimm_range ((imm_expr *)$3.p, UIMM_MIN, UIMM_MAX); - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (!is_zero_imm ((imm_expr *)$3.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - r_type_inst ($1.i, - $2.i, - $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1)); - } - free ((imm_expr *)$3.p); - } - - - | BINARY_OPS_REV2 DEST SRC1 - { - mips32_r2_inst (); - } - - - | SUB_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SUB_OPS DEST SRC1 IMM32 - { - int val = eval_imm_expr ((imm_expr *)$4.p); - - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - i_type_inst ($1.i == Y_SUB_OP ? Y_ADDI_OP - : $1.i == Y_SUBU_OP ? Y_ADDIU_OP - : (fatal_error ("Bad SUB_OP\n"), 0), - $2.i, - $3.i, - make_imm_expr (-val, NULL, false)); - free ((imm_expr *)$4.p); - } - - | SUB_OPS DEST IMM32 - { - int val = eval_imm_expr ((imm_expr *)$3.p); - - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - i_type_inst ($1.i == Y_SUB_OP ? Y_ADDI_OP - : $1.i == Y_SUBU_OP ? Y_ADDIU_OP - : (fatal_error ("Bad SUB_OP\n"), 0), - $2.i, - $2.i, - make_imm_expr (-val, NULL, false)); - free ((imm_expr *)$3.p); - } - - - | DIV_POPS DEST SRC1 - { - /* The hardware divide operation (ignore 1st arg) */ - if ($1.i != Y_DIV_OP && $1.i != Y_DIVU_OP) - yyerror ("REM requires 3 arguments"); - else - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - | DIV_POPS DEST SRC1 SRC2 - { - /* Pseudo divide operations */ - div_inst ($1.i, $2.i, $3.i, $4.i, 0); - } - - | DIV_POPS DEST SRC1 IMM32 - { - if (is_zero_imm ((imm_expr *)$4.p)) - yyerror ("Divide by zero"); - else - { - /* Use $at */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - div_inst ($1.i, $2.i, $3.i, 1, 1); - } - } - - - | MUL_POPS DEST SRC1 SRC2 - { - mult_inst ($1.i, $2.i, $3.i, $4.i); - } - - | MUL_POPS DEST SRC1 IMM32 - { - if (is_zero_imm ((imm_expr *)$4.p)) - /* Optimize: n * 0 == 0 */ - i_type_inst_free (Y_ORI_OP, $2.i, 0, (imm_expr *)$4.p); - else - { - /* Use $at */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - mult_inst ($1.i, $2.i, $3.i, 1); - } - } - - - | MULT_OPS SRC1 SRC2 - { - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - - | MULT_OPS3 DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | MULT_OPS3 DEST SRC1 IMM32 - { - /* Special case, for backward compatibility with pseudo-op - MULT instruction */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); /* Use $at */ - r_type_inst ($1.i, $2.i, $3.i, 1); - } - - - | Y_ROR_POP DEST SRC1 SRC2 - { - r_type_inst (Y_SUBU_OP, 1, 0, $4.i); - r_type_inst (Y_SLLV_OP, 1, 1, $3.i); - r_type_inst (Y_SRLV_OP, $2.i, $4.i, $3.i); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - } - - - | Y_ROL_POP DEST SRC1 SRC2 - { - r_type_inst (Y_SUBU_OP, 1, 0, $4.i); - r_type_inst (Y_SRLV_OP, 1, 1, $3.i); - r_type_inst (Y_SLLV_OP, $2.i, $4.i, $3.i); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - } - - - | Y_ROR_POP DEST SRC1 IMM32 - { - long dist = eval_imm_expr ((imm_expr *)$4.p); - - check_imm_range ((imm_expr *)$4.p, 0, 31); - r_sh_type_inst (Y_SLL_OP, 1, $3.i, -dist); - r_sh_type_inst (Y_SRL_OP, $2.i, $3.i, dist); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free ((imm_expr *)$4.p); - } - - - | Y_ROL_POP DEST SRC1 IMM32 - { - long dist = eval_imm_expr ((imm_expr *)$4.p); - - check_imm_range ((imm_expr *)$4.p, 0, 31); - r_sh_type_inst (Y_SRL_OP, 1, $3.i, -dist); - r_sh_type_inst (Y_SLL_OP, $2.i, $3.i, dist); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free ((imm_expr *)$4.p); - } - - - | BF_OPS_REV2 F_DEST F_SRC2 Y_INT Y_INT - { - mips32_r2_inst (); - } - - - | SET_LE_POPS DEST SRC1 SRC2 - { - set_le_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_LE_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_le_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | SET_GT_POPS DEST SRC1 SRC2 - { - set_gt_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_GT_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_gt_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - - | SET_GE_POPS DEST SRC1 SRC2 - { - set_ge_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_GE_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_ge_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | SET_EQ_POPS DEST SRC1 SRC2 - { - set_eq_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_EQ_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_eq_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | BR_COP_OPS LABEL - { - /* RS and RT fields contain information on test */ - int nd = opcode_is_nullified_branch ($1.i) ? 1 : 0; - int tf = opcode_is_true_branch ($1.i) ? 1 : 0; - i_type_inst_free ($1.i, - cc_to_rt (0, nd, tf), - BIN_RS ($1.i), - (imm_expr *)$2.p); - } - - | BR_COP_OPS CC_REG LABEL - { - /* RS and RT fields contain information on test */ - int nd = opcode_is_nullified_branch ($1.i) ? 1 : 0; - int tf = opcode_is_true_branch ($1.i) ? 1 : 0; - i_type_inst_free ($1.i, - cc_to_rt ($2.i, nd, tf), - BIN_RS ($1.i), - (imm_expr *)$3.p); - } - - - | UNARY_BR_OPS SRC1 LABEL - { - i_type_inst_free ($1.i, 0, $2.i, (imm_expr *)$3.p); - } - - - | UNARY_BR_POPS SRC1 LABEL - { - i_type_inst_free ($1.i == Y_BEQZ_POP ? Y_BEQ_OP : Y_BNE_OP, - 0, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_BR_OPS SRC1 SRC2 LABEL - { - i_type_inst_free ($1.i, $3.i, $2.i, (imm_expr *)$4.p); - } - - | BINARY_BR_OPS SRC1 BR_IMM32 LABEL - { - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (is_zero_imm ((imm_expr *)$3.p)) - i_type_inst ($1.i, $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1), - (imm_expr *)$4.p); - else - { - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst ($1.i, $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1), - (imm_expr *)$4.p); - } - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | BR_GT_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BGT_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $3.i, $2.i); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_GT_POPS SRC1 BR_IMM32 LABEL - { - if ($1.i == Y_BGT_POP) - { - /* Use $at */ - i_type_inst_free (Y_SLTI_OP, 1, $2.i, - incr_expr_offset ((imm_expr *)$3.p, 1)); - i_type_inst (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - else - { - /* Use $at */ - /* Can't add 1 to immediate since 0xffffffff+1 = 0 < 1 */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst_free (Y_BEQ_OP, $2.i, 1, branch_offset (3)); - r_type_inst (Y_SLTU_OP, 1, $2.i, 1); - i_type_inst (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | BR_GE_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BGE_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $2.i, $3.i); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_GE_POPS SRC1 BR_IMM32 LABEL - { - i_type_inst ($1.i == Y_BGE_POP ? Y_SLTI_OP : Y_SLTIU_OP, - 1, $2.i, (imm_expr *)$3.p); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - free ((imm_expr *)$3.p); - } - - - | BR_LT_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BLT_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $2.i, $3.i); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_LT_POPS SRC1 BR_IMM32 LABEL - { - i_type_inst ($1.i == Y_BLT_POP ? Y_SLTI_OP : Y_SLTIU_OP, - 1, $2.i, (imm_expr *)$3.p); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - free ((imm_expr *)$3.p); - } - - - | BR_LE_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BLE_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $3.i, $2.i); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_LE_POPS SRC1 BR_IMM32 LABEL - { - if ($1.i == Y_BLE_POP) - { - /* Use $at */ - i_type_inst_free (Y_SLTI_OP, 1, $2.i, - incr_expr_offset ((imm_expr *)$3.p, 1)); - i_type_inst (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - else - { - /* Use $at */ - /* Can't add 1 to immediate since 0xffffffff+1 = 0 < 1 */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst (Y_BEQ_OP, $2.i, 1, (imm_expr *)$4.p); - r_type_inst (Y_SLTU_OP, 1, $2.i, 1); - i_type_inst (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | J_OPS LABEL - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - j_type_inst (Y_J_OP, (imm_expr *)$2.p); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - j_type_inst (Y_JAL_OP, (imm_expr *)$2.p); - free ((imm_expr *)$2.p); - } - - | J_OPS SRC1 - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - r_type_inst (Y_JR_OP, 0, $2.i, 0); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - r_type_inst (Y_JALR_OP, 31, $2.i, 0); - } - - | J_OPS DEST SRC1 - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - r_type_inst (Y_JR_OP, 0, $3.i, 0); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - r_type_inst (Y_JALR_OP, $2.i, $3.i, 0); - } - - - | B_OPS LABEL - { - i_type_inst_free (($1.i == Y_BAL_POP ? Y_BGEZAL_OP : Y_BGEZ_OP), - 0, 0, (imm_expr *)$2.p); - } - - - | BINARYI_TRAP_OPS SRC1 IMM16 - { - i_type_inst_free ($1.i, 0, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_TRAP_OPS SRC1 SRC2 - { - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - - | FP_MOVE_OPS F_DEST F_SRC1 - { - r_co_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_MOVE_OPS_REV2 F_DEST F_SRC1 - { - mips32_r2_inst (); - } - - - | MOVEC_OPS DEST SRC1 REG - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | MOVECC_OPS DEST SRC1 Y_INT - { - r_type_inst ($1.i, - $2.i, - $3.i, - (($4.i & 0x7) << 2)); - } - - - | FP_MOVEC_OPS F_DEST F_SRC1 REG - { - r_co_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | FP_MOVEC_OPS_REV2 F_DEST F_SRC1 REG - { - mips32_r2_inst (); - } - - - | FP_MOVECC_OPS F_DEST F_SRC1 - { - r_co_type_inst ($1.i, $2.i, $3.i, cc_to_rt (0, 0, 0)); - } - - - | FP_MOVECC_OPS F_DEST F_SRC1 CC_REG - { - r_co_type_inst ($1.i, $2.i, $3.i, cc_to_rt ($4.i, 0, 0)); - } - - - | FP_MOVECC_OPS_REV2 F_DEST F_SRC1 CC_REG - { - mips32_r2_inst (); - } - - - | MOVE_FROM_HILO_OPS REG - { - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | MOVE_TO_HILO_OPS REG - { - r_type_inst ($1.i, 0, $2.i, 0); - } - - - - | MOVE_COP_OPS REG COP_REG - { - if ($1.i == Y_MFC1_D_POP) - { - r_co_type_inst (Y_MFC1_OP, 0, $3.i, $2.i); - r_co_type_inst (Y_MFC1_OP, 0, $3.i + 1, $2.i + 1); - } - else if ($1.i == Y_MTC1_D_POP) - { - r_co_type_inst (Y_MTC1_OP, 0, $3.i, $2.i); - r_co_type_inst (Y_MTC1_OP, 0, $3.i + 1, $2.i + 1); - } - else - r_co_type_inst ($1.i, 0, $3.i, $2.i); - } - - - | MOVE_COP_OPS_REV2 REG COP_REG - { - mips32_r2_inst (); - } - - - | CTL_COP_OPS REG COP_REG - { - r_co_type_inst ($1.i, 0, $3.i, $2.i); - } - - - | FP_UNARY_OPS F_DEST F_SRC2 - { - r_co_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_UNARY_OPS_REV2 F_DEST F_SRC2 - { - mips32_r2_inst (); - } - - - | FP_BINARY_OPS F_DEST F_SRC1 F_SRC2 - { - r_co_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | FP_BINARY_OPS_REV2 F_DEST F_SRC1 F_SRC2 - { - mips32_r2_inst (); - } - - - | FP_TERNARY_OPS_REV2 F_DEST F_SRC1 F_SRC2 FP_REGISTER - { - mips32_r2_inst (); - } - - - | FP_CMP_OPS F_SRC1 F_SRC2 - { - r_cond_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_CMP_OPS CC_REG F_SRC1 F_SRC2 - { - r_cond_type_inst ($1.i, $3.i, $4.i, $2.i); - } - - - | FP_CMP_OPS_REV2 F_SRC1 F_SRC2 - { - mips32_r2_inst (); - } - - - | Y_COP2_OP IMM32 - { - i_type_inst_free ($1.i, 0, 0, (imm_expr *)$2.p); - } - ; - - - -LOAD_OPS: Y_LB_OP - | Y_LBU_OP - | Y_LH_OP - | Y_LHU_OP - | Y_LL_OP - | Y_LW_OP - | Y_LWL_OP - | Y_LWR_OP - | Y_PFW_OP - | Y_LD_POP - ; - -LOADI_OPS: Y_LUI_OP - ; - -ULOADH_POPS: Y_ULH_POP - | Y_ULHU_POP - ; - -LOADC_OPS: Y_LDC2_OP - | Y_LWC2_OP - ; - -LOADFP_OPS: Y_LDC1_OP - | Y_LWC1_OP - | Y_L_D_POP { $$.i = Y_LDC1_OP; } - | Y_L_S_POP { $$.i = Y_LWC1_OP; } - ; - -LOADFP_INDEX_OPS: Y_LDXC1_OP - | Y_LUXC1_OP - | Y_LWXC1_OP - ; - -STORE_OPS: Y_SB_OP - | Y_SC_OP - | Y_SH_OP - | Y_SW_OP - | Y_SWL_OP - | Y_SWR_OP - | Y_SD_POP - ; - -STOREC_OPS: Y_SWC2_OP - | Y_SDC2_OP - | Y_S_D_POP { $$.i = Y_SDC1_OP; } - | Y_S_S_POP { $$.i = Y_SWC1_OP; } - ; - -STOREFP_OPS: Y_SWC1_OP - | Y_SDC1_OP - ; - -STOREFP_INDEX_OPS: Y_SDXC1_OP - | Y_SUXC1_OP - | Y_SWXC1_OP - ; - -SYS_OPS: Y_RFE_OP - { -#ifdef MIPS1 - yywarn ("RFE should only be used when SPIM is compiled as a MIPS-I processor"); -#endif - } - | Y_SYSCALL_OP - ; - -PREFETCH_OPS: Y_PREFX_OP - | Y_SYNCI_OP - ; - -CACHE_OPS: Y_CACHE_OP - | Y_PREF_OP - ; - -TLB_OPS: Y_TLBP_OP - | Y_TLBR_OP - | Y_TLBWI_OP - | Y_TLBWR_OP - ; - -NULLARY_OPS: Y_ERET_OP - { -#ifdef MIPS1 - yywarn ("ERET should only be used when SPIM is compiled as a MIPS32 processor"); -#endif - } - ; - -NULLARY_OPS_REV2: Y_DERET_OP - | Y_EHB_OP - | Y_SDBBP_OP - ; - -COUNT_LEADING_OPS: Y_CLO_OP - | Y_CLZ_OP - ; - -UNARY_OPS_REV2: Y_DI_OP - | Y_EI_OP - ; - -/* These binary operations have immediate analogues. */ - -BINARYI_OPS: Y_ADD_OP - | Y_ADDU_OP - | Y_AND_OP - | Y_XOR_OP - | Y_OR_OP - | Y_SLT_OP - | Y_SLTU_OP - ; - -BINARYIR_OPS: Y_SLLV_OP - | Y_SRAV_OP - | Y_SRLV_OP - ; - -BINARY_ARITHI_OPS: Y_ADDI_OP - | Y_ADDIU_OP - | Y_SLTI_OP - | Y_SLTIU_OP - ; - -BINARY_LOGICALI_OPS: Y_ANDI_OP - | Y_ORI_OP - | Y_XORI_OP - ; - -SHIFT_OPS: Y_SLL_OP - | Y_SRA_OP - | Y_SRL_OP - ; - -SHIFT_OPS_REV2: Y_ROTR_OP - ; - -SHIFTV_OPS_REV2: Y_ROTRV_OP - ; - - -/* These binary operations do not have immediate analogues. */ - -BINARY_OPS: Y_NOR_OP - ; - -BINARY_OPS_REV2: Y_RDHWR_OP - | Y_RDPGPR_OP - | Y_SEB_OP - | Y_SEH_OP - | Y_WRPGPR_OP - | Y_WSBH_OP - ; - -SUB_OPS: Y_SUB_OP - | Y_SUBU_OP - ; - -DIV_POPS: Y_DIV_OP - | Y_DIVU_OP - | Y_REM_POP - | Y_REMU_POP - ; - -MUL_POPS: Y_MULO_POP - | Y_MULOU_POP - ; - -SET_LE_POPS: Y_SLE_POP - | Y_SLEU_POP - ; - -SET_GT_POPS: Y_SGT_POP - | Y_SGTU_POP - ; - -SET_GE_POPS: Y_SGE_POP - | Y_SGEU_POP - ; - -SET_EQ_POPS: Y_SEQ_POP - | Y_SNE_POP - ; - -MULT_OPS: Y_MULT_OP - | Y_MULTU_OP - | Y_MADD_OP - | Y_MADDU_OP - | Y_MSUB_OP - | Y_MSUBU_OP - ; - -MULT_OPS3: Y_MUL_OP - ; - -BF_OPS_REV2: Y_EXT_OP - | Y_INS_OP - ; - -BR_COP_OPS: Y_BC1F_OP - | Y_BC1FL_OP - | Y_BC1T_OP - | Y_BC1TL_OP - | Y_BC2F_OP - | Y_BC2FL_OP - | Y_BC2T_OP - | Y_BC2TL_OP - ; - -UNARY_BR_OPS: Y_BGEZ_OP - | Y_BGEZL_OP - | Y_BGEZAL_OP - | Y_BGEZALL_OP - | Y_BGTZ_OP - | Y_BGTZL_OP - | Y_BLEZ_OP - | Y_BLEZL_OP - | Y_BLTZ_OP - | Y_BLTZL_OP - | Y_BLTZAL_OP - | Y_BLTZALL_OP - ; - -UNARY_BR_POPS: Y_BEQZ_POP - | Y_BNEZ_POP - ; - -BINARY_BR_OPS: Y_BEQ_OP - | Y_BEQL_OP - | Y_BNE_OP - | Y_BNEL_OP - ; - -BR_GT_POPS: Y_BGT_POP - | Y_BGTU_POP - -BR_GE_POPS: Y_BGE_POP - | Y_BGEU_POP - -BR_LT_POPS: Y_BLT_POP - | Y_BLTU_POP - -BR_LE_POPS: Y_BLE_POP - | Y_BLEU_POP - ; - -J_OPS: Y_J_OP - | Y_JR_OP - | Y_JR_HB_OP { yywarn ("Warning:IPS32 Rev 2 '.HB' extension is not implemented and is ignored"); } - | Y_JAL_OP - | Y_JALR_OP - | Y_JALR_HB_OP { yywarn ("Warning:IPS32 Rev 2 '.HB' extension is not implemented and is ignored"); } - ; - -B_OPS: Y_B_POP - | Y_BAL_POP - ; - - -BINARYI_TRAP_OPS: Y_TEQI_OP - | Y_TGEI_OP - | Y_TGEIU_OP - | Y_TLTI_OP - | Y_TLTIU_OP - | Y_TNEI_OP - ; - -BINARY_TRAP_OPS: Y_TEQ_OP - | Y_TGE_OP - | Y_TGEU_OP - | Y_TLT_OP - | Y_TLTU_OP - | Y_TNE_OP - ; - - -MOVE_FROM_HILO_OPS: Y_MFHI_OP - | Y_MFLO_OP - ; - -MOVE_TO_HILO_OPS: Y_MTHI_OP - | Y_MTLO_OP - ; - -MOVEC_OPS: Y_MOVN_OP - | Y_MOVZ_OP - ; - -MOVE_COP_OPS: Y_MFC0_OP - | Y_MFC1_OP - | Y_MFC1_D_POP - | Y_MFC2_OP - | Y_MTC0_OP - | Y_MTC1_OP - | Y_MTC1_D_POP - | Y_MTC2_OP - ; - -MOVE_COP_OPS_REV2: Y_MFHC1_OP - | Y_MFHC2_OP - | Y_MTHC1_OP - | Y_MTHC2_OP - ; - -CTL_COP_OPS: Y_CFC0_OP - | Y_CFC1_OP - | Y_CFC2_OP - | Y_CTC0_OP - | Y_CTC1_OP - | Y_CTC2_OP - ; - -/* Floating point operations */ - -FP_MOVE_OPS: Y_MOV_S_OP - | Y_MOV_D_OP - ; - -FP_MOVE_OPS_REV2: Y_MOV_PS_OP - ; - - -MOVECC_OPS: Y_MOVF_OP - | Y_MOVT_OP - ; - - -FP_MOVEC_OPS: Y_MOVN_D_OP - | Y_MOVN_S_OP - | Y_MOVZ_D_OP - | Y_MOVZ_S_OP - ; - -FP_MOVEC_OPS_REV2: Y_MOVN_PS_OP - | Y_MOVZ_PS_OP - ; - - -FP_MOVECC_OPS: Y_MOVF_D_OP - | Y_MOVF_S_OP - | Y_MOVT_D_OP - | Y_MOVT_S_OP - ; - -FP_MOVECC_OPS_REV2: Y_MOVF_PS_OP - | Y_MOVT_PS_OP - ; - -FP_UNARY_OPS: Y_ABS_S_OP - | Y_ABS_D_OP - | Y_CEIL_W_D_OP - | Y_CEIL_W_S_OP - | Y_CVT_D_S_OP - | Y_CVT_D_W_OP - | Y_CVT_S_D_OP - | Y_CVT_S_W_OP - | Y_CVT_W_D_OP - | Y_CVT_W_S_OP - | Y_FLOOR_W_D_OP - | Y_FLOOR_W_S_OP - | Y_NEG_S_OP - | Y_NEG_D_OP - | Y_ROUND_W_D_OP - | Y_ROUND_W_S_OP - | Y_SQRT_D_OP - | Y_SQRT_S_OP - | Y_TRUNC_W_D_OP - | Y_TRUNC_W_S_OP - ; - -FP_UNARY_OPS_REV2: Y_ABS_PS_OP - | Y_CEIL_L_D_OP - | Y_CEIL_L_S_OP - | Y_CVT_D_L_OP - | Y_CVT_L_D_OP - | Y_CVT_L_S_OP - | Y_CVT_PS_S_OP - | Y_CVT_S_L_OP - | Y_CVT_S_PL_OP - | Y_CVT_S_PU_OP - | Y_FLOOR_L_D_OP - | Y_FLOOR_L_S_OP - | Y_NEG_PS_OP - | Y_RECIP_D_OP - | Y_RECIP_S_OP - | Y_ROUND_L_D_OP - | Y_ROUND_L_S_OP - | Y_RSQRT_D_OP - | Y_RSQRT_S_OP - | Y_TRUNC_L_D_OP - | Y_TRUNC_L_S_OP - ; - -FP_BINARY_OPS: Y_ADD_S_OP - | Y_ADD_D_OP - | Y_DIV_S_OP - | Y_DIV_D_OP - | Y_MUL_S_OP - | Y_MUL_D_OP - | Y_SUB_S_OP - | Y_SUB_D_OP - ; - -FP_BINARY_OPS_REV2: Y_ADD_PS_OP - | Y_MUL_PS_OP - | Y_PLL_PS_OP - | Y_PLU_PS_OP - | Y_PUL_PS_OP - | Y_PUU_PS_OP - ; - -FP_TERNARY_OPS_REV2: Y_ALNV_PS_OP - | Y_MADD_D_OP - | Y_MADD_PS_OP - | Y_MADD_S_OP - | Y_MSUB_D_OP - | Y_MSUB_PS_OP - | Y_MSUB_S_OP - | Y_NMADD_D_OP - | Y_NMADD_PS_OP - | Y_NMADD_S_OP - | Y_NMSUB_D_OP - | Y_NMSUB_PS_OP - | Y_NMSUB_S_OP - ; - -FP_CMP_OPS: Y_C_F_S_OP - | Y_C_UN_S_OP - | Y_C_EQ_S_OP - | Y_C_UEQ_S_OP - | Y_C_OLT_S_OP - | Y_C_OLE_S_OP - | Y_C_ULT_S_OP - | Y_C_ULE_S_OP - | Y_C_SF_S_OP - | Y_C_NGLE_S_OP - | Y_C_SEQ_S_OP - | Y_C_NGL_S_OP - | Y_C_LT_S_OP - | Y_C_NGE_S_OP - | Y_C_LE_S_OP - | Y_C_NGT_S_OP - | Y_C_F_D_OP - | Y_C_UN_D_OP - | Y_C_EQ_D_OP - | Y_C_UEQ_D_OP - | Y_C_OLT_D_OP - | Y_C_OLE_D_OP - | Y_C_ULT_D_OP - | Y_C_ULE_D_OP - | Y_C_SF_D_OP - | Y_C_NGLE_D_OP - | Y_C_SEQ_D_OP - | Y_C_NGL_D_OP - | Y_C_LT_D_OP - | Y_C_NGE_D_OP - | Y_C_LE_D_OP - | Y_C_NGT_D_OP - ; - -FP_CMP_OPS_REV2: Y_C_EQ_PS_OP - | Y_C_F_PS_OP - | Y_C_LT_PS_OP - | Y_C_LE_PS_OP - | Y_C_NGE_PS_OP - | Y_C_NGL_PS_OP - | Y_C_NGLE_PS_OP - | Y_C_NGT_PS_OP - | Y_C_OLE_PS_OP - | Y_C_OLT_PS_OP - | Y_C_SEQ_PS_OP - | Y_C_SF_PS_OP - | Y_C_UEQ_PS_OP - | Y_C_ULE_PS_OP - | Y_C_ULT_PS_OP - | Y_C_UN_PS_OP - ; - - - -ASM_DIRECTIVE: Y_ALIAS_DIR Y_REG Y_REG - - | Y_ALIGN_DIR EXPR - { - if (text_dir) - align_text ($2.i); - else - align_data ($2.i); - } - - | Y_ASCII_DIR {null_term = false;} STR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - | Y_ASCIIZ_DIR {null_term = true;} STR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_ASM0_DIR - - | Y_BGNB_DIR Y_INT - - - | Y_BYTE_DIR - {store_op = store_byte;} - EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_COMM_DIR ID EXPR - { - align_data (2); - if (lookup_label ((char*)$2.p)->addr == 0) - { - (void)record_label ((char*)$2.p, current_data_pc (), 1); - free ((char*)$2.p); - } - increment_data_pc ($3.i); - } - - - | Y_DATA_DIR - {user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_DATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_K_DATA_DIR - { - user_kernel_data_segment (true); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_K_DATA_DIR Y_INT - { - user_kernel_data_segment (true); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_DOUBLE_DIR - { - store_fp_op = store_double; - if (data_dir) set_data_alignment (3); - } - FP_EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_END_DIR OPTIONAL_ID - - | Y_ENDB_DIR Y_INT - - | Y_ENDR_DIR - - | Y_ENT_DIR ID - - | Y_ENT_DIR ID Y_INT - - - | Y_EXTERN_DIR ID EXPR - { - extern_directive ((char*)$2.p, $3.i); - } - - - | Y_ERR_DIR - { - fatal_error ("File contains an .err directive\n"); - } - - - | Y_FILE_DIR Y_INT Y_STR - - - | Y_FLOAT_DIR - { - store_fp_op = store_float; - if (data_dir) set_data_alignment (2); - } - FP_EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_FMASK_DIR Y_INT Y_INT - - | Y_FRAME_DIR REGISTER Y_INT REGISTER - - - | Y_GLOBAL_DIR ID - { - (void)make_label_global ((char*)$2.p); - free ((char*)$2.p); - } - - - | Y_HALF_DIR - { - store_op = store_half; - if (data_dir) set_data_alignment (1); - } - EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_LABEL_DIR ID - { - (void)record_label ((char*)$2.p, - text_dir ? current_text_pc () : current_data_pc (), - 1); - free ((char*)$2.p); - } - - - | Y_LCOMM_DIR ID EXPR - { - lcomm_directive ((char*)$2.p, $3.i); - } - - - /* Produced by cc 2.10 */ - | Y_LIVEREG_DIR Y_INT Y_INT - - - | Y_LOC_DIR Y_INT Y_INT - - | Y_MASK_DIR Y_INT Y_INT - - | Y_NOALIAS_DIR Y_REG Y_REG - - | Y_OPTIONS_DIR ID - - | Y_REPEAT_DIR EXPR - { - yyerror ("Warning: repeat directive ignored"); - } - - - | Y_RDATA_DIR - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_RDATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_SDATA_DIR - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_SDATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_SET_DIR ID - { - if (streq ((char*)$2.p, "noat")) - noat_flag = true; - else if (streq ((char*)$2.p, "at")) - noat_flag = false; - } - - - | Y_SPACE_DIR EXPR - { - if (data_dir) - increment_data_pc ($2.i); - else if (text_dir) - increment_text_pc ($2.i); - } - - - | Y_STRUCT_DIR EXPR - { - yyerror ("Warning: struct directive ignored"); - } - - - | Y_TEXT_DIR - { - user_kernel_text_segment (false); - data_dir = false; text_dir = true; - enable_text_alignment (); - } - - | Y_TEXT_DIR Y_INT - { - user_kernel_text_segment (false); - data_dir = false; text_dir = true; - enable_text_alignment (); - set_text_pc ($2.i); - } - - - | Y_K_TEXT_DIR - { - user_kernel_text_segment (true); - data_dir = false; text_dir = true; - enable_text_alignment (); - } - - | Y_K_TEXT_DIR Y_INT - { - user_kernel_text_segment (true); - data_dir = false; text_dir = true; - enable_text_alignment (); - set_text_pc ($2.i); - } - - - | Y_VERSTAMP_DIR Y_INT Y_INT - - | Y_VREG_DIR REGISTER Y_INT Y_INT - - - | Y_WORD_DIR - { - store_op = store_word_data; - if (data_dir) set_data_alignment (2); - } - EXPR_LST - - ; - - - -ADDRESS: {only_id = 1;} ADDR {only_id = 0; $$ = $2;} - -ADDR: '(' REGISTER ')' - { - $$.p = make_addr_expr (0, NULL, $2.i); - } - - | ABS_ADDR - { - $$.p = make_addr_expr ($1.i, NULL, 0); - } - - | ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr ($1.i, NULL, $3.i); - } - - | Y_ID - { - $$.p = make_addr_expr (0, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | Y_ID '(' REGISTER ')' - { - $$.p = make_addr_expr (0, (char*)$1.p, $3.i); - free ((char*)$1.p); - } - - | Y_ID '+' ABS_ADDR - { - $$.p = make_addr_expr ($3.i, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | ABS_ADDR '+' ID - { - $$.p = make_addr_expr ($1.i, (char*)$3.p, 0); - } - - | Y_ID '-' ABS_ADDR - { - $$.p = make_addr_expr (- $3.i, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | Y_ID '+' ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr ($3.i, (char*)$1.p, $5.i); - free ((char*)$1.p); - } - - | Y_ID '-' ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr (- $3.i, (char*)$1.p, $5.i); - free ((char*)$1.p); - } - ; - - -BR_IMM32: {only_id = 1;} IMM32 {only_id = 0; $$ = $2;} - -IMM16: IMM32 - { - check_imm_range ((imm_expr*)$1.p, IMM_MIN, IMM_MAX); - $$ = $1; - } - -UIMM16: IMM32 - { - check_uimm_range ((imm_expr*)$1.p, UIMM_MIN, UIMM_MAX); - $$ = $1; - } - - -IMM32: ABS_ADDR - { - $$.p = make_imm_expr ($1.i, NULL, false); - } - - | '(' ABS_ADDR ')' '>' '>' Y_INT - { - $$.p = make_imm_expr ($2.i >> $6.i, NULL, false); - } - - | ID - { - $$.p = make_imm_expr (0, (char*)$1.p, false); - } - - | Y_ID '+' ABS_ADDR - { - $$.p = make_imm_expr ($3.i, (char*)$1.p, false); - free ((char*)$1.p); - } - - | Y_ID '-' ABS_ADDR - { - $$.p = make_imm_expr (- $3.i, (char*)$1.p, false); - free ((char*)$1.p); - } - ; - - -ABS_ADDR: Y_INT - - | Y_INT '+' Y_INT - {$$.i = $1.i + $3.i;} - - | Y_INT Y_INT - { - /* This is actually: Y_INT '-' Y_INT, since the binary - subtract operator gets scanned as a unary negation - operator. */ - if ($2.i >= 0) yyerror ("Syntax error"); - $$.i = $1.i - -$2.i; - } - ; - -SRC1: REGISTER ; - -SRC2: REGISTER ; - -DEST: REGISTER ; - -REG: REGISTER ; - -REGISTER: Y_REG - { - if ($1.i < 0 || $1.i > 31) - yyerror ("Register number out of range"); - if ($1.i == 1 && !bare_machine && !noat_flag) - yyerror ("Register 1 is reserved for assembler"); - $$ = $1; - } - -F_DEST: FP_REGISTER ; - -F_SRC1: FP_REGISTER ; - -F_SRC2: FP_REGISTER ; - -FP_REGISTER: Y_FP_REG - { - if ($1.i < 0 || $1.i > 31) - yyerror ("FP register number out of range"); - $$ = $1; - } - - -CC_REG: Y_INT - { - if ($1.i < 0 || $1.i > 7) - yyerror ("CC register number out of range"); - $$ = $1; - } - - -COP_REG: Y_REG - - | Y_FP_REG - - ; - - -LABEL: ID - { - $$.p = make_imm_expr (-(int)current_text_pc (), (char*)$1.p, true); - } - - -STR_LST: STR_LST STR - | STR - ; - - -STR: Y_STR - { - store_string ((char*)$1.p, strlen((char*)$1.p), null_term); - free ((char*)$1.p); - } - | Y_STR ':' Y_INT - { - int i; - - for (i = 0; i < $3.i; i ++) - store_string ((char*)$1.p, strlen((char*)$1.p), null_term); - free ((char*)$1.p); - } - ; - - -EXPRESSION: {only_id = 1;} EXPR {only_id = 0; $$ = $2;} - -EXPR: - TRM - | - EXPR '+' TRM - { $$.i = $1.i + $3.i; } - | - EXPR '-' TRM - { $$.i = $1.i - $3.i; } - ; - -TRM: - FACTOR - | - TRM '*' FACTOR - { $$.i = $1.i * $3.i; } - | - TRM '/' FACTOR - { $$.i = $1.i / $3.i; } - ; - -FACTOR: Y_INT - - | '(' EXPR ')' - { $$.i = $2.i; } - - | ID - { - label *l = lookup_label ((char*)$1.p); - if (l->addr == 0) - { - record_data_uses_symbol (current_data_pc (), l); - $$.p = NULL; - } - else - $$.i = l->addr; - } - - -EXPR_LST: EXPR_LST EXPRESSION - { - store_op ($2.i); - } - | EXPRESSION - { - store_op ($1.i); - } - | EXPRESSION ':' EXPR - { - int i; - - for (i = 0; i < $3.i; i ++) - store_op ($1.i); - } - ; - - -FP_EXPR_LST: FP_EXPR_LST Y_FP - { - store_fp_op ((double*)$2.p); - } - | Y_FP - { - store_fp_op ((double*)$1.p); - } - ; - - -OPTIONAL_ID: {only_id = 1;} OPT_ID {only_id = 0; $$ = $2;} - -OPT_ID: ID - | {$$.p = (void*)NULL;} - ; - - -ID: {only_id = 1;} Y_ID {only_id = 0; $$ = $2;} - - -%% - -/* Maintain and update the address of labels for the current line. */ - -void -fix_current_label_address (mem_addr new_addr) -{ - label_list *l; - - for (l = this_line_labels; l != NULL; l = l->tail) - { - l->head->addr = new_addr; - } - clear_labels (); -} - - -static label_list * -cons_label (label *head, label_list *tail) -{ - label_list *c = (label_list *) malloc (sizeof (label_list)); - - c->head = head; - c->tail = tail; - return (c); -} - - -static void -clear_labels () -{ - label_list *n; - - for ( ; this_line_labels != NULL; this_line_labels = n) - { - resolve_label_uses (this_line_labels->head); - n = this_line_labels->tail; - free (this_line_labels); - } - this_line_labels = NULL; -} - - -/* Operations on op codes. */ - -int -op_to_imm_op (int opcode) -{ - switch (opcode) - { - case Y_ADD_OP: return (Y_ADDI_OP); - case Y_ADDU_OP: return (Y_ADDIU_OP); - case Y_AND_OP: return (Y_ANDI_OP); - case Y_OR_OP: return (Y_ORI_OP); - case Y_XOR_OP: return (Y_XORI_OP); - case Y_SLT_OP: return (Y_SLTI_OP); - case Y_SLTU_OP: return (Y_SLTIU_OP); - case Y_SLLV_OP: return (Y_SLL_OP); - case Y_SRAV_OP: return (Y_SRA_OP); - case Y_SRLV_OP: return (Y_SRL_OP); - default: fatal_error ("Can't convert op to immediate op\n"); return (0); - } -} - - -int -imm_op_to_op (int opcode) -{ - switch (opcode) - { - case Y_ADDI_OP: return (Y_ADD_OP); - case Y_ADDIU_OP: return (Y_ADDU_OP); - case Y_ANDI_OP: return (Y_AND_OP); - case Y_ORI_OP: return (Y_OR_OP); - case Y_XORI_OP: return (Y_XOR_OP); - case Y_SLTI_OP: return (Y_SLT_OP); - case Y_SLTIU_OP: return (Y_SLTU_OP); - case Y_J_OP: return (Y_JR_OP); - case Y_LUI_OP: return (Y_ADDU_OP); - case Y_SLL_OP: return (Y_SLLV_OP); - case Y_SRA_OP: return (Y_SRAV_OP); - case Y_SRL_OP: return (Y_SRLV_OP); - default: fatal_error ("Can't convert immediate op to op\n"); return (0); - } -} - - -static void -nop_inst () -{ - r_type_inst (Y_SLL_OP, 0, 0, 0); /* = 0 */ -} - - -static void -trap_inst () -{ - r_type_inst (Y_BREAK_OP, 0, 0, 0); -} - - -static imm_expr * -branch_offset (int n_inst) -{ - return (const_imm_expr (n_inst << 2)); /* Later shifted right 2 places */ -} - - -static void -div_inst (int op, int rd, int rs, int rt, int const_divisor) -{ - if (rd != 0 && !const_divisor) - { - i_type_inst_free (Y_BNE_OP, 0, rt, branch_offset (3)); - nop_inst(); - trap_inst (); - } - - if (op == Y_DIV_OP || op == Y_REM_POP) - r_type_inst (Y_DIV_OP, 0, rs, rt); - else - r_type_inst (Y_DIVU_OP, 0, rs, rt); - - if (rd != 0) - { - if (op == Y_DIV_OP || op == Y_DIVU_OP) - /* Quotient */ - r_type_inst (Y_MFLO_OP, rd, 0, 0); - else - /* Remainder */ - r_type_inst (Y_MFHI_OP, rd, 0, 0); - } -} - - -static void -mult_inst (int op, int rd, int rs, int rt) -{ - if (op == Y_MULOU_POP) - r_type_inst (Y_MULTU_OP, 0, rs, rt); - else - r_type_inst (Y_MULT_OP, 0, rs, rt); - if (op == Y_MULOU_POP && rd != 0) - { - r_type_inst (Y_MFHI_OP, 1, 0, 0); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, branch_offset (3)); - nop_inst(); - trap_inst (); - } - else if (op == Y_MULO_POP && rd != 0) - { - r_type_inst (Y_MFHI_OP, 1, 0, 0); /* use $at */ - r_type_inst (Y_MFLO_OP, rd, 0, 0); - r_sh_type_inst (Y_SRA_OP, rd, rd, 31); - i_type_inst_free (Y_BEQ_OP, rd, 1, branch_offset (3)); - nop_inst(); - trap_inst (); - } - if (rd != 0) - r_type_inst (Y_MFLO_OP, rd, 0, 0); -} - - -static void -set_le_inst (int op, int rd, int rs, int rt) -{ - i_type_inst_free (Y_BNE_OP, rs, rt, branch_offset (3)); - i_type_inst_free (Y_ORI_OP, rd, 0, const_imm_expr (1)); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (3)); - nop_inst(); - r_type_inst ((op == Y_SLE_POP ? Y_SLT_OP : Y_SLTU_OP), rd, rs, rt); -} - - -static void -set_gt_inst (int op, int rd, int rs, int rt) -{ - r_type_inst (op == Y_SGT_POP ? Y_SLT_OP : Y_SLTU_OP, rd, rt, rs); -} - - -static void -set_ge_inst (int op, int rd, int rs, int rt) -{ - i_type_inst_free (Y_BNE_OP, rs, rt, branch_offset (3)); - i_type_inst_free (Y_ORI_OP, rd, 0, const_imm_expr (1)); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (3)); - nop_inst(); - r_type_inst (op == Y_SGE_POP ? Y_SLT_OP : Y_SLTU_OP, rd, rt, rs); -} - - -static void -set_eq_inst (int op, int rd, int rs, int rt) -{ - imm_expr *if_eq, *if_neq; - - if (op == Y_SEQ_POP) - if_eq = const_imm_expr (1), if_neq = const_imm_expr (0); - else - if_eq = const_imm_expr (0), if_neq = const_imm_expr (1); - - i_type_inst_free (Y_BEQ_OP, rs, rt, branch_offset (3)); - /* RD <- 0 (if not equal) */ - i_type_inst_free (Y_ORI_OP, rd, 0, if_neq); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (3)); /* Branch always */ - nop_inst(); - /* RD <- 1 */ - i_type_inst_free (Y_ORI_OP, rd, 0, if_eq); -} - - -/* Store the value either as a datum or instruction. */ - -static void -store_word_data (int value) -{ - if (data_dir) - store_word (value); - else if (text_dir) - store_instruction (inst_decode (value)); -} - - - -void -initialize_parser (char *file_name) -{ - input_file_name = file_name; - only_id = 0; - data_dir = false; - text_dir = true; -} - - -static void -check_imm_range (imm_expr* expr, int32 min, int32 max) -{ - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* If expression can be evaluated, compare its value against the limits - and complain if the value is out of bounds. */ - int32 value = eval_imm_expr (expr); - - if (value < min || max < value) - { - char str[200]; - sprintf (str, "immediate value (%d) out of range (%d .. %d)", - value, min, max); - yywarn (str); - } - } -} - - -static void -check_uimm_range (imm_expr* expr, uint32 min, uint32 max) -{ - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* If expression can be evaluated, compare its value against the limits - and complain if the value is out of bounds. */ - uint32 value = (uint32)eval_imm_expr (expr); - - if (value < min || max < value) - { - char str[200]; - sprintf (str, "immediate value (%d) out of range (%d .. %d)", - (int32)value, (int32)min, (int32)max); - yywarn (str); - } - } -} - -void -yyerror (char *s) -{ - parse_error_occurred = true; - clear_labels (); - yywarn (s); -} - - -void -yywarn (char *s) -{ - error ("spim: (parser) %s on line %d of file %s\n%s", s, line_no, input_file_name, erroneous_line ()); -} - - -static void -mips32_r2_inst () -{ - yyerror ("Warning: MIPS32 Rev 2 instruction is not implemented. Instruction ignored."); -} - - -static int -cc_to_rt (int cc, int nd, int tf) -{ - return (cc << 2) | (nd << 1) | tf; -} diff --git a/spim-qtbase/CPU/reg.h b/spim-qtbase/CPU/reg.h deleted file mode 100755 index 87e2195..0000000 --- a/spim-qtbase/CPU/reg.h +++ /dev/null @@ -1,240 +0,0 @@ -/* SPIM S20 MIPS simulator. - Declarations of registers and code for accessing them. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -typedef int32 /*@alt unsigned int @*/ reg_word; -typedef uint32 u_reg_word; - - -/* General purpose registers: */ - -#define R_LENGTH 32 - -extern reg_word R[R_LENGTH]; - -extern reg_word HI, LO; - -extern mem_addr PC, nPC; - - -/* Argument passing registers */ - -#define REG_V0 2 -#define REG_A0 4 -#define REG_A1 5 -#define REG_A2 6 -#define REG_A3 7 -#define REG_FA0 12 -#define REG_SP 29 - - -/* Result registers */ - -#define REG_RES 2 -#define REG_FRES 0 - - -/* $gp registers */ - -#define REG_GP 28 - -extern char *int_reg_names[]; - - - -/* Coprocessor registers: */ - -extern reg_word CCR[4][32], CPR[4][32]; - - - -/* Exeception handling registers (Coprocessor 0): */ - -/* BadVAddr register: */ -#define CP0_BadVAddr_Reg 8 -#define CP0_BadVAddr (CPR[0][CP0_BadVAddr_Reg]) - -/* Count register: */ -#define CP0_Count_Reg 9 -#define CP0_Count (CPR[0][CP0_Count_Reg]) /* ToDo */ - -/* Compare register: */ -#define CP0_Compare_Reg 11 -#define CP0_Compare (CPR[0][CP0_Compare_Reg]) /* ToDo */ - -/* Status register: */ -#define CP0_Status_Reg 12 -#define CP0_Status (CPR[0][CP0_Status_Reg]) -/* Implemented fields: */ -#define CP0_Status_CU 0xf0000000 -#define CP0_Status_IM 0x0000ff00 -#define CP0_Status_IM7 0x00008000 /* HW Int 5 */ -#define CP0_Status_IM6 0x00004000 /* HW Int 4 */ -#define CP0_Status_IM5 0x00002000 /* HW Int 3 */ -#define CP0_Status_IM4 0x00001000 /* HW Int 2 */ -#define CP0_Status_IM3 0x00000800 /* HW Int 1 */ -#define CP0_Status_IM2 0x00000400 /* HW Int 0 */ -#define CP0_Status_IM1 0x00000200 /* SW Int 1 */ -#define CP0_Status_IM0 0x00000100 /* SW Int 0 */ -#define CP0_Status_UM 0x00000010 -#define CP0_Status_EXL 0x00000002 -#define CP0_Status_IE 0x00000001 -#define CP0_Status_Mask (CP0_Status_CU \ - | CP0_Status_UM \ - | CP0_Status_IM \ - | CP0_Status_EXL \ - | CP0_Status_IE) - -/* Cause register: */ -#define CP0_Cause_Reg 13 -#define CP0_Cause (CPR[0][CP0_Cause_Reg]) -/* Implemented fields: */ -#define CP0_Cause_BD 0x80000000 -#define CP0_Cause_IP 0x0000ff00 -#define CP0_Cause_IP7 0x00008000 /* HW Int 5 */ -#define CP0_Cause_IP6 0x00004000 /* HW Int 4 */ -#define CP0_Cause_IP5 0x00002000 /* HW Int 3 */ -#define CP0_Cause_IP4 0x00001000 /* HW Int 2 */ -#define CP0_Cause_IP3 0x00000800 /* HW Int 1 */ -#define CP0_Cause_IP2 0x00000400 /* HW Int 0 */ -#define CP0_Cause_IP1 0x00000200 /* SW Int 1 */ -#define CP0_Cause_IP0 0x00000100 /* SW Int 0 */ -#define CP0_Cause_ExcCode 0x0000007c -#define CP0_Cause_Mask (CP0_Cause_BD \ - | CP0_Cause_IP \ - | CP0_Cause_IP7 \ - | CP0_Cause_IP6 \ - | CP0_Cause_IP5 \ - | CP0_Cause_IP4 \ - | CP0_Cause_IP3 \ - | CP0_Cause_IP2 \ - | CP0_Cause_ExcCode) -#define CP0_ExCode ((CP0_Cause & CP0_Cause_ExcCode) >> 2) - -/* EPC register: */ -#define CP0_EPC_Reg 14 -#define CP0_EPC (CPR[0][CP0_EPC_Reg]) - -/* Config register: */ -#define CP0_Config_Reg 16 -#define CP0_Config (CPR[0][CP0_Config_Reg]) -/* Implemented fields: */ -#define CP0_Config_BE 0x000080000 -#define CP0_Config_AT 0x000060000 -#define CP0_Config_AR 0x00001c000 -#define CP0_Config_MT 0x000000380 -#define CP0_Config_Mask (CP0_Config_BE \ - | CP0_Config_AT \ - | CP0_Config_AR \ - | CP0_Config_MT) - - - -/* Floating Point Coprocessor (1) registers. - - This is the MIPS32, Revision 1 FPU register set. It contains 32, 32-bit - registers (either 32 single or 16 double precision), as in the R2010. - The MIPS32, Revision 2 or MIPS64 register set has 32 of each type of - register. */ - -#define FGR_LENGTH 32 -#define FPR_LENGTH 16 - -extern double *FPR; /* Dynamically allocate so overlay */ -extern float *FGR; /* is possible */ -extern int *FWR; /* is possible */ - - -#define FPR_S(REGNO) (FGR[REGNO]) - -#define FPR_D(REGNO) (((REGNO) & 0x1) \ - ? (run_error ("Odd FP double register number\n") , 0.0) \ - : FPR[(REGNO) / 2]) - -#define FPR_W(REGNO) (FWR[REGNO]) - - -#define SET_FPR_S(REGNO, VALUE) {FGR[REGNO] = (float) (VALUE);} - -#define SET_FPR_D(REGNO, VALUE) {if ((REGNO) & 0x1) \ - run_error ("Odd FP double register number\n"); \ - else FPR[(REGNO) / 2] = (double) (VALUE);} - -#define SET_FPR_W(REGNO, VALUE) {FWR[REGNO] = (int32) (VALUE);} - - -/* Floating point control registers: */ - -#define FCR (CPR[1]) - - -#define FIR_REG 0 -#define FIR (FCR[FIR_REG]) - -/* Implemented fields: */ -#define FIR_W 0x0008000 -#define FIR_D 0x0001000 -#define FIR_S 0x0000800 -#define FIR_MASK (FIR_W | FIR_D | FIR_S) - - -#define FCSR_REG 31 -#define FCSR (FCR[FCSR_REG]) - -/* Implemented fields: */ -#define FCSR_FCC 0xfe800000 -#define FCSR_MASK (FCSR_FCC) -#define CC0_bit 23 -#define CC1_bit 25 -#define CC_mask(n) ((((n) == 0) || ((n) > 7)) ? (1 << CC0_bit) : (1 << (CC1_bit + (n) - 1))) -#define FCC(n) (((FCSR & CC_mask(n)) == 0) ? 0 : 1) -#define SET_FCC(n, v) if ((v) == 0) { FCSR &= ~CC_mask(n); } else { FCSR |= CC_mask(n); } - -/* Floating point Cause (not implemented): */ -#define FCSR_Cause_E 0x00020000 -#define FCSR_Cause_V 0x00010000 -#define FCSR_Cause_Z 0x00008000 -#define FCSR_Cause_O 0x00004000 -#define FCSR_Cause_U 0x00002000 -#define FCSR_Cause_I 0x00001000 -/* Floating point Enables (not implemented): */ -#define FCSR_Enable_V 0x00000800 -#define FCSR_Enable_Z 0x00000400 -#define FCSR_Enable_O 0x00000200 -#define FCSR_Enable_U 0x00000100 -#define FCSR_Enable_I 0x00000080 -/* Floating point Flags (not implemented): */ -#define FCSR_Flag_V 0x00000040 -#define FCSR_Flag_Z 0x00000020 -#define FCSR_Flag_O 0x00000010 -#define FCSR_Flag_U 0x00000008 -#define FCSR_Flag_I 0x00000004 diff --git a/spim-qtbase/CPU/run.cpp b/spim-qtbase/CPU/run.cpp deleted file mode 100755 index a82c835..0000000 --- a/spim-qtbase/CPU/run.cpp +++ /dev/null @@ -1,1849 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM instructions. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifdef mips -#define _IEEE 1 -#include -#else -#define NaN(X) ((X) != (X)) -#endif - -#include -#include - -#ifdef _WIN32 -#define VC_EXTRALEAN -#include -#else -#include -#include -#include -#include -#endif - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser_yacc.h" -#include "syscall.h" -#include "run.h" - -bool force_break = false; /* For the execution env. to force an execution break */ - -#ifdef _MSC_BUILD -/* Disable MS VS warning about constant predicate in conditional. */ -#pragma warning(disable: 4127) -#endif - - -/* Local functions: */ - -static void bump_CP0_timer (); -static void set_fpu_cc (int cond, int cc, int less, int equal, int unordered); -static void signed_multiply (reg_word v1, reg_word v2); -static void start_CP0_timer (); -#ifdef _WIN32 -void CALLBACK timer_completion_routine(LPVOID lpArgToCompletionRoutine, - DWORD dwTimerLowValue, DWORD dwTimerHighValue); -#endif -static void unsigned_multiply (reg_word v1, reg_word v2); - - -#define SIGN_BIT(X) ((X) & 0x80000000) - -#define ARITH_OVFL(RESULT, OP1, OP2) (SIGN_BIT (OP1) == SIGN_BIT (OP2) \ - && SIGN_BIT (OP1) != SIGN_BIT (RESULT)) - - - -/* True when delayed_branches is true and instruction is executing in delay -slot of another instruction. */ -static int running_in_delay_slot = 0; - - -/* Executed delayed branch and jump instructions by running the - instruction from the delay slot before transfering control. Note, - in branches that don't jump, the instruction in the delay slot is - executed by falling through normally. - - We take advantage of the MIPS architecture, which leaves undefined - the result of executing a delayed instruction in a delay slot. Here - we execute the second branch. */ - -#define BRANCH_INST(TEST, TARGET, NULLIFY) \ - { \ - if (TEST) \ - { \ - mem_addr target = (TARGET); \ - if (delayed_branches) \ - { \ - /* +4 since jump in delay slot */ \ - target += BYTES_PER_WORD; \ - } \ - JUMP_INST(target) \ - } \ - else if (NULLIFY) \ - { \ - /* If test fails and nullify bit set, skip\ - instruction in delay slot. */ \ - PC += BYTES_PER_WORD; \ - } \ - } - - -#define JUMP_INST(TARGET) \ - { \ - if (delayed_branches) \ - { \ - running_in_delay_slot = 1; \ - run_spim (PC + BYTES_PER_WORD, 1, display);\ - running_in_delay_slot = 0; \ - } \ - /* -4 since PC is bumped after this inst */ \ - PC = (TARGET) - BYTES_PER_WORD; \ - } - - -/* If the delayed_load flag is false, the result from a load is available - immediate. If the delayed_load flag is true, the result from a load is - not available until the subsequent instruction has executed (as in the - real machine). We need a two element shift register for the value and its - destination, as the instruction following the load can itself be a load - instruction. */ - -#define LOAD_INST(DEST_A, LD, MASK) \ - { \ - LOAD_INST_BASE (DEST_A, (LD & (MASK))) \ - } - - -#define LOAD_INST_BASE(DEST_A, VALUE) \ - { \ - if (delayed_loads) \ - { \ - delayed_load_addr1 = (DEST_A); \ - delayed_load_value1 = (VALUE); \ - } \ - else \ - { \ - *(DEST_A) = (VALUE); \ - } \ - } - - -#define DO_DELAYED_UPDATE() \ - if (delayed_loads) \ - { \ - /* Check for delayed updates */ \ - if (delayed_load_addr2 != NULL) \ - { \ - *delayed_load_addr2 = delayed_load_value2; \ - } \ - delayed_load_addr2 = delayed_load_addr1; \ - delayed_load_value2 = delayed_load_value1; \ - delayed_load_addr1 = NULL; \ - } - - - -/* Run the program stored in memory, starting at address PC for - STEPS_TO_RUN instruction executions. If flag DISPLAY is true, print - each instruction before it executes. Return true if program's - execution can continue. */ - -bool -run_spim (mem_addr initial_PC, int steps_to_run, bool display) -{ - instruction *inst; - static reg_word *delayed_load_addr1 = NULL, delayed_load_value1; - static reg_word *delayed_load_addr2 = NULL, delayed_load_value2; - int step, step_size, next_step; - - PC = initial_PC; - if (!bare_machine && mapped_io) - next_step = IO_INTERVAL; - else - next_step = steps_to_run; /* Run to completion */ - - /* Start a timer running */ - start_CP0_timer(); - - for (step_size = MIN (next_step, steps_to_run); - steps_to_run > 0; - steps_to_run -= step_size, step_size = MIN (next_step, steps_to_run)) - { - if (!bare_machine && mapped_io) - /* Every IO_INTERVAL steps, check if memory-mapped IO registers - have changed. */ - check_memory_mapped_IO (); - /* else run inner loop for all steps */ - - if ((CP0_Status & CP0_Status_IE) - && !(CP0_Status & CP0_Status_EXL) - && ((CP0_Cause & CP0_Cause_IP) & (CP0_Status & CP0_Status_IM))) - { - /* There is an interrupt to process if IE bit set, EXL bit not - set, and non-masked IP bit set */ - raise_exception (ExcCode_Int); - /* Handle interrupt now, before instruction executes, so that - EPC points to unexecuted instructions, which is the one to - return to. */ - handle_exception (); - } - - force_break = false; - for (step = 0; step < step_size; step += 1) - { - if (force_break) - { - return true; - } - - R[0] = 0; /* Maintain invariant value */ - -#ifdef _WIN32 - SleepEx(0, TRUE); /* Put thread in awaitable state for WaitableTimer */ -#else - { - /* Poll for timer expiration */ - struct itimerval time; - if (-1 == getitimer (ITIMER_REAL, &time)) - { - perror ("getitmer failed"); - } - if (time.it_value.tv_usec == 0 && time.it_value.tv_sec == 0) - { - /* Timer expired */ - bump_CP0_timer (); - - /* Restart timer for next interval */ - start_CP0_timer (); - } - } -#endif - - exception_occurred = 0; - inst = read_mem_inst (PC); - if (exception_occurred) /* In reading instruction */ - { - exception_occurred = 0; - handle_exception (); - continue; - } - else if (inst == NULL) - { - run_error ("Attempt to execute non-instruction at 0x%08x\n", PC); - return false; - } - else if (EXPR (inst) != NULL - && EXPR (inst)->symbol != NULL - && EXPR (inst)->symbol->addr == 0) - { - run_error ("Instruction references undefined symbol at 0x%08x\n %s", PC, inst_to_string(PC)); - return false; - } - - if (display) - print_inst (PC); - -#ifdef TEST_ASM - test_assembly (inst); -#endif - - DO_DELAYED_UPDATE (); - - switch (OPCODE (inst)) - { - case Y_ADD_OP: - { - reg_word vs = R[RS (inst)], vt = R[RT (inst)]; - reg_word sum = vs + vt; - - if (ARITH_OVFL (sum, vs, vt)) - RAISE_EXCEPTION (ExcCode_Ov, break); - R[RD (inst)] = sum; - break; - } - - case Y_ADDI_OP: - { - reg_word vs = R[RS (inst)], imm = (short) IMM (inst); - reg_word sum = vs + imm; - - if (ARITH_OVFL (sum, vs, imm)) - RAISE_EXCEPTION (ExcCode_Ov, break); - R[RT (inst)] = sum; - break; - } - - case Y_ADDIU_OP: - R[RT (inst)] = R[RS (inst)] + (short) IMM (inst); - break; - - case Y_ADDU_OP: - R[RD (inst)] = R[RS (inst)] + R[RT (inst)]; - break; - - case Y_AND_OP: - R[RD (inst)] = R[RS (inst)] & R[RT (inst)]; - break; - - case Y_ANDI_OP: - R[RT (inst)] = R[RS (inst)] & (0xffff & IMM (inst)); - break; - - case Y_BC2F_OP: - case Y_BC2FL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_BEQ_OP: - BRANCH_INST (R[RS (inst)] == R[RT (inst)], - PC + IDISP (inst), - 0); - break; - - case Y_BEQL_OP: - BRANCH_INST (R[RS (inst)] == R[RT (inst)], - PC + IDISP (inst), - 1); - break; - - case Y_BGEZ_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 0); - break; - - case Y_BGEZL_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 1); - break; - - case Y_BGEZAL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 0); - break; - - case Y_BGEZALL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 1); - break; - - case Y_BGTZ_OP: - BRANCH_INST (R[RS (inst)] != 0 && SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 0); - break; - - case Y_BGTZL_OP: - BRANCH_INST (R[RS (inst)] != 0 && SIGN_BIT (R[RS (inst)]) == 0, - PC + IDISP (inst), - 1); - break; - - case Y_BLEZ_OP: - BRANCH_INST (R[RS (inst)] == 0 || SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 0); - break; - - case Y_BLEZL_OP: - BRANCH_INST (R[RS (inst)] == 0 || SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 1); - break; - - case Y_BLTZ_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 0); - break; - - case Y_BLTZL_OP: - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 1); - break; - - case Y_BLTZAL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 0); - break; - - case Y_BLTZALL_OP: - R[31] = PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (R[RS (inst)]) != 0, - PC + IDISP (inst), - 1); - break; - - case Y_BNE_OP: - BRANCH_INST (R[RS (inst)] != R[RT (inst)], - PC + IDISP (inst), - 0); - break; - - case Y_BNEL_OP: - BRANCH_INST (R[RS (inst)] != R[RT (inst)], - PC + IDISP (inst), - 1); - break; - - case Y_BREAK_OP: - if (RD (inst) == 1) - /* Debugger breakpoint */ - RAISE_EXCEPTION (ExcCode_Bp, return true) - else - RAISE_EXCEPTION (ExcCode_Bp, break); - - case Y_CACHE_OP: - break; /* Memory details not implemented */ - - case Y_CFC0_OP: - R[RT (inst)] = CCR[0][RD (inst)]; - break; - - case Y_CFC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_CLO_OP: - { - reg_word val = R[RS (inst)]; - int i; - for (i = 31; 0 <= i; i -= 1) - if (((val >> i) & 0x1) == 0) break; - - R[RD (inst) ] = 31 - i; - break; - } - - case Y_CLZ_OP: - { - reg_word val = R[RS (inst)]; - int i; - for (i = 31; 0 <= i; i -= 1) - if (((val >> i) & 0x1) == 1) break; - - R[RD (inst) ] = 31 - i; - break; - } - - case Y_COP2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_CTC0_OP: - CCR[0][RD (inst)] = R[RT (inst)]; - break; - - case Y_CTC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_DIV_OP: - /* The behavior of this instruction is undefined on divide by - zero or overflow. */ - if (R[RT (inst)] != 0 - && !(R[RS (inst)] == (reg_word)0x80000000 - && R[RT (inst)] == (reg_word)0xffffffff)) - { - LO = (reg_word) R[RS (inst)] / (reg_word) R[RT (inst)]; - HI = (reg_word) R[RS (inst)] % (reg_word) R[RT (inst)]; - } - break; - - case Y_DIVU_OP: - /* The behavior of this instruction is undefined on divide by - zero or overflow. */ - if (R[RT (inst)] != 0 - && !(R[RS (inst)] == (reg_word)0x80000000 - && R[RT (inst)] == (reg_word)0xffffffff)) - { - LO = (u_reg_word) R[RS (inst)] / (u_reg_word) R[RT (inst)]; - HI = (u_reg_word) R[RS (inst)] % (u_reg_word) R[RT (inst)]; - } - break; - - case Y_ERET_OP: - { - CP0_Status &= ~CP0_Status_EXL; /* Clear EXL bit */ - JUMP_INST (CP0_EPC); /* Jump to EPC */ - } - break; - - case Y_J_OP: - JUMP_INST (((PC & 0xf0000000) | TARGET (inst) << 2)); - break; - - case Y_JAL_OP: - if (delayed_branches) - R[31] = PC + 2 * BYTES_PER_WORD; - else - R[31] = PC + BYTES_PER_WORD; - JUMP_INST (((PC & 0xf0000000) | (TARGET (inst) << 2))); - break; - - case Y_JALR_OP: - { - mem_addr tmp = R[RS (inst)]; - - if (delayed_branches) - R[RD (inst)] = PC + 2 * BYTES_PER_WORD; - else - R[RD (inst)] = PC + BYTES_PER_WORD; - JUMP_INST (tmp); - } - break; - - case Y_JR_OP: - { - mem_addr tmp = R[RS (inst)]; - - JUMP_INST (tmp); - } - break; - - case Y_LB_OP: - LOAD_INST (&R[RT (inst)], - read_mem_byte (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LBU_OP: - LOAD_INST (&R[RT (inst)], - read_mem_byte (R[BASE (inst)] + IOFFSET (inst)), - 0xff); - break; - - case Y_LH_OP: - LOAD_INST (&R[RT (inst)], - read_mem_half (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LHU_OP: - LOAD_INST (&R[RT (inst)], - read_mem_half (R[BASE (inst)] + IOFFSET (inst)), - 0xffff); - break; - - case Y_LL_OP: - /* Uniprocess, so this instruction is just a load */ - LOAD_INST (&R[RT (inst)], - read_mem_word (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LUI_OP: - R[RT (inst)] = (IMM (inst) << 16) & 0xffff0000; - break; - - case Y_LW_OP: - LOAD_INST (&R[RT (inst)], - read_mem_word (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LDC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_LWC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_LWL_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - reg_word word; /* Can't be register */ - int byte = addr & 0x3; - reg_word reg_val = R[RT (inst)]; - - word = read_mem_word (addr & 0xfffffffc); - if (!exception_occurred) -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - word = word; - break; - - case 1: - word = ((word & 0xffffff) << 8) | (reg_val & 0xff); - break; - - case 2: - word = ((word & 0xffff) << 16) | (reg_val & 0xffff); - break; - - case 3: - word = ((word & 0xff) << 24) | (reg_val & 0xffffff); - break; - } -#else - switch (byte) - { - case 0: - word = ((word & 0xff) << 24) | (reg_val & 0xffffff); - break; - - case 1: - word = ((word & 0xffff) << 16) | (reg_val & 0xffff); - break; - - case 2: - word = ((word & 0xffffff) << 8) | (reg_val & 0xff); - break; - - case 3: - break; - } -#endif - LOAD_INST_BASE (&R[RT (inst)], word); - break; - } - - case Y_LWR_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - reg_word word; /* Can't be register */ - int byte = addr & 0x3; - reg_word reg_val = R[RT (inst)]; - - word = read_mem_word (addr & 0xfffffffc); - if (!exception_occurred) -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - word = (reg_val & 0xffffff00) | ((unsigned)(word & 0xff000000) >> 24); - break; - - case 1: - word = (reg_val & 0xffff0000) | ((unsigned)(word & 0xffff0000) >> 16); - break; - - case 2: - word = (reg_val & 0xff000000) | ((unsigned)(word & 0xffffff00) >> 8); - break; - - case 3: - word = word; - break; - } -#else - switch (byte) - { - case 0: - break; - - case 1: - word = (reg_val & 0xff000000) | ((word & 0xffffff00) >> 8); - break; - - case 2: - word = (reg_val & 0xffff0000) | ((word & 0xffff0000) >> 16); - break; - - case 3: - word = (reg_val & 0xffffff00) | ((word & 0xff000000) >> 24); - break; - } -#endif - LOAD_INST_BASE (&R[RT (inst)], word); - break; - } - - case Y_MADD_OP: - case Y_MADDU_OP: - { - reg_word lo = LO, hi = HI; - reg_word tmp; - if (OPCODE (inst) == Y_MADD_OP) - { - signed_multiply(R[RS (inst)], R[RT (inst)]); - } - else /* Y_MADDU_OP */ - { - unsigned_multiply(R[RS (inst)], R[RT (inst)]); - } - tmp = lo + LO; - if ((unsigned)tmp < (unsigned)LO || (unsigned)tmp < (unsigned)lo) - { - /* Addition of low-order word overflows */ - hi += 1; - } - LO = tmp; - HI = hi + HI; - break; - } - - case Y_MFC0_OP: - R[RT (inst)] = CPR[0][FS (inst)]; - break; - - case Y_MFC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_MFHI_OP: - R[RD (inst)] = HI; - break; - - case Y_MFLO_OP: - R[RD (inst)] = LO; - break; - - case Y_MOVN_OP: - if (R[RT (inst)] != 0) - R[RD (inst)] = R[RS (inst)]; - break; - - case Y_MOVZ_OP: - if (R[RT (inst)] == 0) - R[RD (inst)] = R[RS (inst)]; - break; - - case Y_MSUB_OP: - case Y_MSUBU_OP: - { - reg_word lo = LO, hi = HI; - reg_word tmp; - - if (OPCODE (inst) == Y_MSUB_OP) - { - signed_multiply(R[RS (inst)], R[RT (inst)]); - } - else /* Y_MSUBU_OP */ - { - unsigned_multiply(R[RS (inst)], R[RT (inst)]); - } - - tmp = lo - LO; - if ((unsigned)LO > (unsigned)lo) - { - /* Subtraction of low-order word borrows */ - hi -= 1; - } - LO = tmp; - HI = hi - HI; - break; - } - - case Y_MTC0_OP: - CPR[0][FS (inst)] = R[RT (inst)]; - switch (FS (inst)) - { - case CP0_Compare_Reg: - CP0_Cause &= ~CP0_Cause_IP7; /* Writing clears HW interrupt 5 */ - break; - - case CP0_Status_Reg: - CP0_Status &= CP0_Status_Mask; - CP0_Status |= ((CP0_Status_CU & 0x30000000) | CP0_Status_UM); - break; - - case CP0_Cause_Reg: - CPR[0][FS (inst)] &= CP0_Cause_Mask; - break; - - case CP0_Config_Reg: - CPR[0][FS (inst)] &= CP0_Config_Mask; - break; - - default: - break; - } - break; - - case Y_MTC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_MTHI_OP: - HI = R[RS (inst)]; - break; - - case Y_MTLO_OP: - LO = R[RS (inst)]; - break; - - case Y_MUL_OP: - signed_multiply(R[RS (inst)], R[RT (inst)]); - R[RD (inst)] = LO; - break; - - case Y_MULT_OP: - signed_multiply(R[RS (inst)], R[RT (inst)]); - break; - - case Y_MULTU_OP: - unsigned_multiply (R[RS (inst)], R[RT (inst)]); - break; - - case Y_NOR_OP: - R[RD (inst)] = ~ (R[RS (inst)] | R[RT (inst)]); - break; - - case Y_OR_OP: - R[RD (inst)] = R[RS (inst)] | R[RT (inst)]; - break; - - case Y_ORI_OP: - R[RT (inst)] = R[RS (inst)] | (0xffff & IMM (inst)); - break; - - case Y_PREF_OP: - break; /* Memory details not implemented */ - - case Y_RFE_OP: -#ifdef MIPS1 - /* This is MIPS-I, not compatible with MIPS32 or the - definition of the bits in the CP0 Status register in that - architecture. */ - CP0_Status = (CP0_Status & 0xfffffff0) | ((CP0_Status & 0x3c) >> 2); -#else - RAISE_EXCEPTION (ExcCode_RI, {}); /* Not MIPS32 instruction */ -#endif - break; - - case Y_SB_OP: - set_mem_byte (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SC_OP: - /* Uniprocessor, so instruction is just a store */ - set_mem_word (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SDC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_SH_OP: - set_mem_half (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SLL_OP: - { - int shamt = SHAMT (inst); - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = R[RT (inst)] << shamt; - else - R[RD (inst)] = R[RT (inst)]; - break; - } - - case Y_SLLV_OP: - { - int shamt = (R[RS (inst)] & 0x1f); - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = R[RT (inst)] << shamt; - else - R[RD (inst)] = R[RT (inst)]; - break; - } - - case Y_SLT_OP: - if (R[RS (inst)] < R[RT (inst)]) - R[RD (inst)] = 1; - else - R[RD (inst)] = 0; - break; - - case Y_SLTI_OP: - if (R[RS (inst)] < (short) IMM (inst)) - R[RT (inst)] = 1; - else - R[RT (inst)] = 0; - break; - - case Y_SLTIU_OP: - { - int x = (short) IMM (inst); - - if ((u_reg_word) R[RS (inst)] < (u_reg_word) x) - R[RT (inst)] = 1; - else - R[RT (inst)] = 0; - break; - } - - case Y_SLTU_OP: - if ((u_reg_word) R[RS (inst)] < (u_reg_word) R[RT (inst)]) - R[RD (inst)] = 1; - else - R[RD (inst)] = 0; - break; - - case Y_SRA_OP: - { - int shamt = SHAMT (inst); - reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SRAV_OP: - { - int shamt = R[RS (inst)] & 0x1f; - reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SRL_OP: - { - int shamt = SHAMT (inst); - u_reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SRLV_OP: - { - int shamt = R[RS (inst)] & 0x1f; - u_reg_word val = R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - R[RD (inst)] = val >> shamt; - else - R[RD (inst)] = val; - break; - } - - case Y_SUB_OP: - { - reg_word vs = R[RS (inst)], vt = R[RT (inst)]; - reg_word diff = vs - vt; - - if (SIGN_BIT (vs) != SIGN_BIT (vt) - && SIGN_BIT (vs) != SIGN_BIT (diff)) - RAISE_EXCEPTION (ExcCode_Ov, break); - R[RD (inst)] = diff; - break; - } - - case Y_SUBU_OP: - R[RD (inst)] = (u_reg_word)R[RS (inst)]-(u_reg_word)R[RT (inst)]; - break; - - case Y_SW_OP: - set_mem_word (R[BASE (inst)] + IOFFSET (inst), R[RT (inst)]); - break; - - case Y_SWC2_OP: - RAISE_EXCEPTION (ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_SWL_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - mem_word data; - reg_word reg = R[RT (inst)]; - int byte = addr & 0x3; - - data = read_mem_word (addr & 0xfffffffc); -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - data = reg; - break; - - case 1: - data = (data & 0xff000000) | (reg >> 8 & 0xffffff); - break; - - case 2: - data = (data & 0xffff0000) | (reg >> 16 & 0xffff); - break; - - case 3: - data = (data & 0xffffff00) | (reg >> 24 & 0xff); - break; - } -#else - switch (byte) - { - case 0: - data = (data & 0xffffff00) | (reg >> 24 & 0xff); - break; - - case 1: - data = (data & 0xffff0000) | (reg >> 16 & 0xffff); - break; - - case 2: - data = (data & 0xff000000) | (reg >> 8 & 0xffffff); - break; - - case 3: - data = reg; - break; - } -#endif - set_mem_word (addr & 0xfffffffc, data); - break; - } - - case Y_SWR_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - mem_word data; - reg_word reg = R[RT (inst)]; - int byte = addr & 0x3; - - data = read_mem_word (addr & 0xfffffffc); -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - data = ((reg << 24) & 0xff000000) | (data & 0xffffff); - break; - - case 1: - data = ((reg << 16) & 0xffff0000) | (data & 0xffff); - break; - - case 2: - data = ((reg << 8) & 0xffffff00) | (data & 0xff) ; - break; - - case 3: - data = reg; - break; - } -#else - switch (byte) - { - case 0: - data = reg; - break; - - case 1: - data = ((reg << 8) & 0xffffff00) | (data & 0xff) ; - break; - - case 2: - data = ((reg << 16) & 0xffff0000) | (data & 0xffff); - break; - - case 3: - data = ((reg << 24) & 0xff000000) | (data & 0xffffff); - break; - } -#endif - set_mem_word (addr & 0xfffffffc, data); - break; - } - - case Y_SYNC_OP: - break; /* Memory details not implemented */ - - case Y_SYSCALL_OP: - if (!do_syscall ()) - return false; - break; - - case Y_TEQ_OP: - if (R[RS (inst)] == R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TEQI_OP: - if (R[RS (inst)] == IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGE_OP: - if (R[RS (inst)] >= R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGEI_OP: - if (R[RS (inst)] >= IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGEIU_OP: - if ((u_reg_word)R[RS (inst)] >= (u_reg_word)IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TGEU_OP: - if ((u_reg_word)R[RS (inst)] >= (u_reg_word)R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLBP_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBR_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBWI_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBWR_OP: - RAISE_EXCEPTION(ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLT_OP: - if (R[RS (inst)] < R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLTI_OP: - if (R[RS (inst)] < IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLTIU_OP: - if ((u_reg_word)R[RS (inst)] < (u_reg_word)IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TLTU_OP: - if ((u_reg_word)R[RS (inst)] < (u_reg_word)R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TNE_OP: - if (R[RS (inst)] != R[RT (inst)]) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_TNEI_OP: - if (R[RS (inst)] != IMM (inst)) - RAISE_EXCEPTION(ExcCode_Tr, {}); - break; - - case Y_XOR_OP: - R[RD (inst)] = R[RS (inst)] ^ R[RT (inst)]; - break; - - case Y_XORI_OP: - R[RT (inst)] = R[RS (inst)] ^ (0xffff & IMM (inst)); - break; - - - /* FPA Operations */ - - case Y_ABS_S_OP: - SET_FPR_S (FD (inst), fabs (FPR_S (FS (inst)))); - break; - - case Y_ABS_D_OP: - SET_FPR_D (FD (inst), fabs (FPR_D (FS (inst)))); - break; - - case Y_ADD_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) + FPR_S (FT (inst))); - /* Should trap on inexact/overflow/underflow */ - break; - - case Y_ADD_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) + FPR_D (FT (inst))); - /* Should trap on inexact/overflow/underflow */ - break; - - case Y_BC1F_OP: - case Y_BC1FL_OP: - case Y_BC1T_OP: - case Y_BC1TL_OP: - { - int cc = CC (inst); - int nd = ND (inst); /* 1 => nullify */ - int tf = TF (inst); /* 0 => BC1F, 1 => BC1T */ - BRANCH_INST (FCC(cc) == tf, - PC + IDISP (inst), - nd); - break; - } - - case Y_C_F_S_OP: - case Y_C_UN_S_OP: - case Y_C_EQ_S_OP: - case Y_C_UEQ_S_OP: - case Y_C_OLT_S_OP: - case Y_C_OLE_S_OP: - case Y_C_ULT_S_OP: - case Y_C_ULE_S_OP: - case Y_C_SF_S_OP: - case Y_C_NGLE_S_OP: - case Y_C_SEQ_S_OP: - case Y_C_NGL_S_OP: - case Y_C_LT_S_OP: - case Y_C_NGE_S_OP: - case Y_C_LE_S_OP: - case Y_C_NGT_S_OP: - { - float v1 = FPR_S (FS (inst)), v2 = FPR_S (FT (inst)); - double dv1 = v1, dv2 = v2; - int cond = COND (inst); - int cc = CCFP (inst); - - if (NaN (dv1) || NaN (dv2)) - { - if (cond & COND_IN) - { - RAISE_EXCEPTION (ExcCode_FPE, break); - } - set_fpu_cc (cond, cc, 0, 0, 1); - } - else - { - set_fpu_cc (cond, cc, v1 < v2, v1 == v2, 0); - } - } - break; - - case Y_C_F_D_OP: - case Y_C_UN_D_OP: - case Y_C_EQ_D_OP: - case Y_C_UEQ_D_OP: - case Y_C_OLT_D_OP: - case Y_C_OLE_D_OP: - case Y_C_ULT_D_OP: - case Y_C_ULE_D_OP: - case Y_C_SF_D_OP: - case Y_C_NGLE_D_OP: - case Y_C_SEQ_D_OP: - case Y_C_NGL_D_OP: - case Y_C_LT_D_OP: - case Y_C_NGE_D_OP: - case Y_C_LE_D_OP: - case Y_C_NGT_D_OP: - { - double v1 = FPR_D (FS (inst)), v2 = FPR_D (FT (inst)); - int cond = COND (inst); - int cc = CCFP(inst); - - if (NaN (v1) || NaN (v2)) - { - if (cond & COND_IN) - { - RAISE_EXCEPTION (ExcCode_FPE, break); - } - set_fpu_cc (cond, cc, 0, 0, 1); - } - else - { - set_fpu_cc (cond, cc, v1 < v2, v1 == v2, 0); - } - } - break; - - case Y_CFC1_OP: - R[RT (inst)] = FCR[FS (inst)]; - break; - - case Y_CTC1_OP: - FCR[FS (inst)] = R[RT (inst)]; - - if (FIR_REG == FS (inst)) - { - /* Read only register */ - } - else if (FCSR_REG == FS (inst)) - { - if ((R[RT (inst)] & ~FCSR_MASK) != 0) - /* Trying to set unsupported mode */ - RAISE_EXCEPTION (ExcCode_FPE, {}); - } - break; - - case Y_CEIL_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)ceil (val)); - break; - } - - case Y_CEIL_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)ceil (val)); - break; - } - - case Y_CVT_D_S_OP: - { - double val = FPR_S (FS (inst)); - - SET_FPR_D (FD (inst), val); - break; - } - - case Y_CVT_D_W_OP: - { - double val = (double)FPR_W (FS (inst)); - - SET_FPR_D (FD (inst), val); - break; - } - - case Y_CVT_S_D_OP: - { - float val = (float)FPR_D (FS (inst)); - - SET_FPR_S (FD (inst), val); - break; - } - - case Y_CVT_S_W_OP: - { - float val = (float)FPR_W (FS (inst)); - - SET_FPR_S (FD (inst), val); - break; - } - - case Y_CVT_W_D_OP: - { - int val = (int32)FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), val); - break; - } - - case Y_CVT_W_S_OP: - { - int val = (int32)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), val); - break; - } - - case Y_DIV_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) / FPR_S (FT (inst))); - break; - - case Y_DIV_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) / FPR_D (FT (inst))); - break; - - case Y_FLOOR_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)floor (val)); - break; - } - - case Y_FLOOR_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)floor (val)); - break; - } - - case Y_LDC1_OP: - { - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - if ((addr & 0x3) != 0) - RAISE_EXCEPTION (ExcCode_AdEL, CP0_BadVAddr = addr); - - LOAD_INST ((reg_word *) &FPR_S(FT (inst)), - read_mem_word (addr), - 0xffffffff); - LOAD_INST ((reg_word *) &FPR_S(FT (inst) + 1), - read_mem_word (addr + sizeof(mem_word)), - 0xffffffff); - break; - } - - case Y_LWC1_OP: - LOAD_INST ((reg_word *) &FPR_S(FT (inst)), - read_mem_word (R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_MFC1_OP: - { - float val = FPR_S(FS (inst)); - reg_word *vp = (reg_word *) &val; - - R[RT (inst)] = *vp; /* Fool coercion */ - break; - } - - case Y_MOV_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - case Y_MOV_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - - case Y_MOVF_OP: - { - int cc = CC (inst); - if (FCC(cc) == 0) - R[RD (inst)] = R[RS (inst)]; - break; - } - - case Y_MOVF_D_OP: - { - int cc = CC (inst); - if (FCC(cc) == 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVF_S_OP: - { - int cc = CC (inst); - if (FCC(cc) == 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - } - - case Y_MOVN_D_OP: - { - if (R[RT (inst)] != 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVN_S_OP: - { - if (R[RT (inst)] != 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - } - - case Y_MOVT_OP: - { - int cc = CC (inst); - if (FCC(cc) != 0) - R[RD (inst)] = R[RS (inst)]; - break; - } - - case Y_MOVT_D_OP: - { - int cc = CC (inst); - if (FCC(cc) != 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVT_S_OP: - { - int cc = CC (inst); - if (FCC(cc) != 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - } - - case Y_MOVZ_D_OP: - { - if (R[RT (inst)] == 0) - SET_FPR_D (FD (inst), FPR_D (FS (inst))); - break; - } - - case Y_MOVZ_S_OP: - { - if (R[RT (inst)] == 0) - SET_FPR_S (FD (inst), FPR_S (FS (inst))); - break; - - } - - case Y_MTC1_OP: - { - reg_word word = R[RT (inst)]; - float *wp = (float *) &word; - - SET_FPR_S(FS (inst), *wp); /* fool coercion */ - break; - } - - case Y_MUL_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) * FPR_S (FT (inst))); - break; - - case Y_MUL_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) * FPR_D (FT (inst))); - break; - - case Y_NEG_S_OP: - SET_FPR_S (FD (inst), -FPR_S (FS (inst))); - break; - - case Y_NEG_D_OP: - SET_FPR_D (FD (inst), -FPR_D (FS (inst))); - break; - - case Y_ROUND_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)(val + 0.5)); /* Casting truncates */ - break; - } - - case Y_ROUND_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)(val + 0.5)); /* Casting truncates */ - break; - } - - case Y_SDC1_OP: - { - double val = FPR_D (RT (inst)); - reg_word *vp = (reg_word*)&val; - mem_addr addr = R[BASE (inst)] + IOFFSET (inst); - if ((addr & 0x3) != 0) - RAISE_EXCEPTION (ExcCode_AdEL, CP0_BadVAddr = addr); - - set_mem_word (addr, *vp); - set_mem_word (addr + sizeof(mem_word), *(vp + 1)); - break; - } - - case Y_SQRT_D_OP: - SET_FPR_D (FD (inst), sqrt (FPR_D (FS (inst)))); - break; - - case Y_SQRT_S_OP: - SET_FPR_S (FD (inst), sqrt (FPR_S (FS (inst)))); - break; - - case Y_SUB_S_OP: - SET_FPR_S (FD (inst), FPR_S (FS (inst)) - FPR_S (FT (inst))); - break; - - case Y_SUB_D_OP: - SET_FPR_D (FD (inst), FPR_D (FS (inst)) - FPR_D (FT (inst))); - break; - - case Y_SWC1_OP: - { - float val = FPR_S(RT (inst)); - reg_word *vp = (reg_word *) &val; - - set_mem_word (R[BASE (inst)] + IOFFSET (inst), *vp); - break; - } - - case Y_TRUNC_W_D_OP: - { - double val = FPR_D (FS (inst)); - - SET_FPR_W (FD (inst), (int32)val); /* Casting truncates */ - break; - } - - case Y_TRUNC_W_S_OP: - { - double val = (double)FPR_S (FS (inst)); - - SET_FPR_W (FD (inst), (int32)val); /* Casting truncates */ - break; - } - - default: - fatal_error ("Unknown instruction type: %d\n", OPCODE (inst)); - break; - } - - /* After instruction executes: */ - PC += BYTES_PER_WORD; - - if (exception_occurred) - { - handle_exception (); - } - } /* End: for (step = 0; ... */ - } /* End: for ( ; steps_to_run > 0 ... */ - - /* Executed enought steps, return, but are able to continue. */ - return true; -} - - -#ifdef _WIN32 -void CALLBACK -timer_completion_routine(LPVOID lpArgToCompletionRoutine, DWORD dwTimerLowValue, DWORD dwTimerHighValue) -{ - lpArgToCompletionRoutine = lpArgToCompletionRoutine; - dwTimerLowValue = dwTimerLowValue; - dwTimerHighValue = dwTimerHighValue; - bump_CP0_timer (); -} -#endif - - -/* Increment CP0 Count register and test if it matches the Compare - register. If so, cause an interrupt. */ - -static void -bump_CP0_timer () -{ - CP0_Count += 1; - if (CP0_Count == CP0_Compare) - { - RAISE_INTERRUPT (7); - } -} - - -static void -start_CP0_timer () -{ -#ifdef _WIN32 - HANDLE timer = CreateWaitableTimer(NULL, TRUE, TEXT("SPIMTimer")); - if (NULL == timer) - { - error ("CreateWaitableTimer failed"); - } - else - { - LARGE_INTEGER interval; - interval.QuadPart = -10000 * TIMER_TICK_MS; /* Unit is 100 nsec */ - - if (!SetWaitableTimer (timer, &interval, 1, timer_completion_routine, 0, FALSE)) - { - error ("SetWaitableTimer failed"); - } - } -#else - /* Should use ITIMER_VIRTUAL delivering SIGVTALRM, but that does not seem - to work under Cygwin, so we'll adopt the lowest common denominator and - use real time. - - We ignore the resulting signal, however, and read the timer with getitimer, - since signals interrupt I/O calls, such as read, and make user - interaction with SPIM work very poorly. Since speed isn't an important - aspect of SPIM, polling isn't a big deal. */ - if (SIG_ERR == signal (SIGALRM, SIG_IGN)) - { - perror ("signal failed"); - } - else - { - struct itimerval time; - if (-1 == getitimer (ITIMER_REAL, &time)) - { - perror ("getitmer failed"); - } - if (time.it_value.tv_usec == 0 && time.it_value.tv_sec == 0) - { - /* Timer is expired or has not been started. - Start a non-periodic timer for TIMER_TICK_MS microseconds. */ - time.it_interval.tv_sec = 0; - time.it_interval.tv_usec = 0; - time.it_value.tv_sec = 0; - time.it_value.tv_usec = TIMER_TICK_MS * 1000; - if (-1 == setitimer (ITIMER_REAL, &time, NULL)) - { - perror ("setitmer failed"); - } - } - } -#endif -} - - -/* Multiply two 32-bit numbers, V1 and V2, to produce a 64 bit result in - the HI/LO registers. The algorithm is high-school math: - - A B - x C D - ------ - AD || BD - AC || CB || 0 - - where A and B are the high and low short words of V1, C and D are the short - words of V2, AD is the product of A and D, and X || Y is (X << 16) + Y. - Since the algorithm is programmed in C, we need to be careful not to - overflow. */ - -static void -unsigned_multiply (reg_word v1, reg_word v2) -{ - u_reg_word a, b, c, d; - u_reg_word bd, ad, cb, ac; - u_reg_word mid, mid2, carry_mid = 0; - - a = (v1 >> 16) & 0xffff; - b = v1 & 0xffff; - c = (v2 >> 16) & 0xffff; - d = v2 & 0xffff; - - bd = b * d; - ad = a * d; - cb = c * b; - ac = a * c; - - mid = ad + cb; - if (mid < ad || mid < cb) - /* Arithmetic overflow or carry-out */ - carry_mid = 1; - - mid2 = mid + ((bd >> 16) & 0xffff); - if (mid2 < mid || mid2 < ((bd >> 16) & 0xffff)) - /* Arithmetic overflow or carry-out */ - carry_mid += 1; - - LO = (bd & 0xffff) | ((mid2 & 0xffff) << 16); - HI = ac + (carry_mid << 16) + ((mid2 >> 16) & 0xffff); -} - - -static void -signed_multiply (reg_word v1, reg_word v2) -{ - int neg_sign = 0; - - if (v1 < 0) - { - v1 = - v1; - neg_sign = 1; - } - if (v2 < 0) - { - v2 = - v2; - neg_sign = ! neg_sign; - } - - unsigned_multiply (v1, v2); - if (neg_sign) - { - LO = ~ LO; - HI = ~ HI; - LO += 1; - if (LO == 0) - HI += 1; - } -} - -static void -set_fpu_cc (int cond, int cc, int less, int equal, int unordered) -{ - int result = 0; - - if (cond & COND_LT) result |= less; - if (cond & COND_EQ) result |= equal; - if (cond & COND_UN) result |= unordered; - - SET_FCC(cc, result); -} - - -void -raise_exception (int excode) -{ - if (ExcCode_Int != excode - || ((CP0_Status & CP0_Status_IE) /* Allow interrupt if IE and !EXL */ - && !(CP0_Status & CP0_Status_EXL))) - { - /* Ignore interrupt exception when interrupts disabled. */ - exception_occurred = 1; - if (running_in_delay_slot) - { - /* In delay slot */ - if ((CP0_Status & CP0_Status_EXL) == 0) - { - /* Branch's addr */ - CP0_EPC = ROUND_DOWN (PC - BYTES_PER_WORD, BYTES_PER_WORD); - /* Set BD bit to record that instruction is in delay slot */ - CP0_Cause |= CP0_Cause_BD; - } - } - else - { - /* Not in delay slot */ - if ((CP0_Status & CP0_Status_EXL) == 0) - { - /* Faulting instruction's address */ - CP0_EPC = ROUND_DOWN (PC, BYTES_PER_WORD); - } - } - /* ToDo: set CE field of Cause register to coprocessor causing exception */ - - /* Record cause of exception */ - CP0_Cause = (CP0_Cause & ~CP0_Cause_ExcCode) | (excode << 2); - - /* Turn on EXL bit to prevent subsequent interrupts from affecting EPC */ - CP0_Status |= CP0_Status_EXL; - -#ifdef MIPS1 - CP0_Status = (CP0_Status & 0xffffffc0) | ((CP0_Status & 0xf) << 2); -#endif - } -} diff --git a/spim-qtbase/CPU/run.h b/spim-qtbase/CPU/run.h deleted file mode 100755 index 934615a..0000000 --- a/spim-qtbase/CPU/run.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM instructions. - - Copyright (c) 1990-2021, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -bool run_spim (mem_addr initial_PC, int steps, bool display); diff --git a/spim-qtbase/CPU/scanner.h b/spim-qtbase/CPU/scanner.h deleted file mode 100755 index 3f97644..0000000 --- a/spim-qtbase/CPU/scanner.h +++ /dev/null @@ -1,58 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to lexical scanner. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions (besides yylex): */ - -void initialize_scanner (FILE *in_file); -void push_scanner (FILE *in_file); -void pop_scanner (); -char* erroneous_line (); -void scanner_start_line (); -int register_name_to_number (char *name); -char *source_line (); -int yylex (); - -/* Exported Variables: */ - -/* This flag tells the scanner to treat the next sequence of letters - etc as an identifier and not look it up as an opcode. It permits us - to use opcodes as symbols in most places. However, because of the - LALR(1) lookahead, it does not work for labels. */ - -extern int only_id; - -typedef intptr_union yylval_t; -#define YYSTYPE yylval_t -extern YYSTYPE yylval; /* Value of token from YYLEX */ - -extern int line_no; /* Line number in input file*/ diff --git a/spim-qtbase/CPU/scanner.l b/spim-qtbase/CPU/scanner.l deleted file mode 100755 index 6af2dbb..0000000 --- a/spim-qtbase/CPU/scanner.l +++ /dev/null @@ -1,733 +0,0 @@ -%{ -/* SPIM S20 MIPS simulator. - Lexical scanner. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "sym-tbl.h" -#include "parser.h" -#include "scanner.h" -#include "parser_yacc.h" - -#ifdef _WIN32 -#include -#else -#include -#endif - -#define YY_NO_UNISTD_H - -/* Exported Variables: */ - -int only_id; -int line_no; /* Line number in input file*/ - - -/* Local Variables: */ - -/* Track which line we are reading and where it began in the buffer. */ -static int current_line_no = 0; - -static char *current_line = NULL; - - -static double scan_float; /* Where FP values are kept */ - -static int line_returned = 0; /* Returned current line yet? */ - -static int eof_returned = 0; /* Return EOF token yet? */ - - -/* Local functions: */ - -static int check_keyword (char *id, int allow_pseudo_ops); -static char *copy_str (char *str, int chop); -static char scan_escape (char **str); - - -#undef yywrap - -%} - -%% - -[ \t] { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - } - - -[\n] { - line_no += 1; - return (Y_NL); - } - -[\r] { /* Ignore carrage returns */ } - -[;] { - return (Y_NL); - } - - -[\001] { /* Marker character inserted to allow scanner to - return Y_EOF before returning hard EOF. */ - return (Y_EOF); - } - -"#".* { - /* Ignore comments */ - } - - -(-[0-9]+)|([0-9]+) { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.i = atoi (yytext); - return (Y_INT); - } - - -((0x)|(-0x))[0-9A-Fa-f]+ { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - if (*yytext == '-') - { - sscanf(yytext+3, "%x", (unsigned int*)&(yylval.i)); - yylval.i = -yylval.i; - } - else - { - sscanf(yytext+2, "%x", (unsigned int*)&(yylval.i)); - } - return (Y_INT); - } - - -(\+|\-)?[0-9]+[\.\,\'][0-9]+(e)?(\+|\-)?[0-9]* { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - scan_float = atof (yytext); - yylval.p = (double*) &scan_float; - return (Y_FP); - } - - -[a-zA-Z_\.][a-zA-Z0-9_\.]* { - int token = check_keyword (yytext, - !bare_machine - && accept_pseudo_insts); - label *l; - - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (!only_id && token != 0) - { - /* Keyword */ - yylval.i = token; - current_line = yytext; - return (token); - } - - if (only_id && token != 0) - yyerror ("Cannot use opcodes as labels"); - - if ((l = label_is_defined (yytext)) != NULL - && l->const_flag) - { - /* Defined label */ - yylval.i = (int) l->addr; - return (Y_INT); - } - else - { - /* Not-yet defined label */ - yylval.p = (char*) str_copy (yytext); - return (Y_ID); - } - } - - -\$[a-zA-Z0-9_\.$]+ { - int reg_no = register_name_to_number (yytext + 1); - - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (reg_no != -1 - && *(yytext + 1) == 'f' - && *(yytext + 2) != 'p') - { - /* Floating point register ($f0) */ - yylval.i = reg_no; - return (Y_FP_REG); - } - - if (0 <= reg_no && reg_no < R_LENGTH) - { - /* Register ($r0) */ - yylval.i = reg_no; - return (Y_REG); - } - else - { - /* Otherwise, an integer or identifier */ - label *l = label_is_defined (yytext); - - if (l != NULL && l->const_flag) - { - yylval.i = (int) l->addr; - return (Y_INT); - } - else - { - yylval.p = (char*) str_copy (yytext); - return (Y_ID); - } - } - } - - -[\*\/:()+-]|">"|"=" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - return (*yytext); - } - - -"," { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - /* Skip commas */ - } - -"?" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.p = (char*) str_copy (yytext); - /* For top level */ - return (Y_ID); - } - - -\"(([^""])|(\\\"))*\" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.p = (char*) copy_str (yytext + 1, 1); - return (Y_STR); - } - -\'(([^''])|(\\[^'']))\' { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (*(yytext + 1) == '\\') - { - char *escape = yytext + 2; - yylval.i = (int) scan_escape (&escape); - } - else - { - yylval.i = (int) *(yytext + 1); - } - - return (Y_INT); - } - -. { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yyerror ("Unknown character"); - } - - -%% - - - -void -initialize_scanner (FILE *in_file) -{ - if (yyin != in_file) - { - push_scanner (in_file); - } - yyin = in_file; - -#ifdef FLEX_SCANNER - yyrestart(in_file); -#define YY_FLEX_VERSION (YY_FLEX_MAJOR_VERSION * 1000 + YY_FLEX_MINOR_VERSION * 100 + YY_FLEX_SUBMINOR_VERSION) -#if YY_FLEX_VERSION >= 2533 - /* flex 2.5.33 flipped the polarity of this flag (sigh) */ - yy_init = 0; -#else - yy_init = 1; -#endif -#endif - - line_no = 1; - current_line = NULL; - line_returned = 0; - eof_returned = 0; -} - -void -push_scanner (FILE *in_file) -{ - YY_BUFFER_STATE buf = yy_create_buffer (in_file, YY_BUF_SIZE); - yypush_buffer_state (buf); -} - -void -pop_scanner () -{ - yypop_buffer_state (); -} - -void -scanner_start_line () -{ - current_line = NULL; - line_returned = 0; -} - - -/* This is a work-around for a bug in flex v 2.5.31 (but not earlier or - later versions such as 2.5.4) that left this symbol undefined. */ - -#ifndef yytext_ptr -#define yytext_ptr yytext -#endif - - -/* Use yywrap to insert a marker character, which causes the - scanner to return Y_EOF, before return a hard EOF. This - wouldn't be necessary, except that bison does not allow - the parser to use EOF (= 0) as a non-terminal */ - -int yywrap() -{ - if (eof_returned) - return (1); - else - { - unput ('\001'); - eof_returned = 1; -#ifdef FLEX_SCANNER - yy_did_buffer_switch_on_eof = 1; -#endif - return (0); - } -} - - -/* A backslash has just been read, return the character designated by *STR. */ - -static char -scan_escape (char **str) -{ - char first = **str; - *str += 1; - switch (first) - { - case 'a': return '\a'; - case 'b': return '\b'; - case 'f': return '\f'; - case 'n': return '\n'; - case 'r': return '\r'; - case 't': return '\t'; - case '\\': return '\\'; - case '"': return '"'; - case '\'': return '\''; - - case 'x': - case 'X': - { - char c1 = **str, c2 = *(*str + 1); - int b = 0; - - if ('0' <= c1 && c1 <= '9') b = c1 - '0'; - else if ('A' <= c1 && c1 <= 'F') b = c1 - 'A' + 10; - else if ('a' <= c1 && c1 <= 'f') b = c1 - 'a' + 10; - else yyerror ("Bad character in \\X construct in string"); - - b <<= 4; - if ('0' <= c2 && c2 <= '9') b += c2 - '0'; - else if ('A' <= c2 && c2 <= 'F') b += c2 - 'A' + 10; - else if ('a' <= c2 && c2 <= 'f') b += c2 - 'a' + 10; - else yyerror ("Bad character in \\X construct in string"); - - *str += 2; - return (char) b; - } - - default: - { - char message[] = "Bad character \\X"; - message[strlen (message) - 1] = first; - yyerror (message); - return '\0'; - } - } -} - - -/* Return a freshly-allocated copy of STRING with the last CHOP - characters removed. */ - -static char * -copy_str (char *str, int chop) -{ - int new_len = strlen (str) - chop; - char *new_str = (char *) xmalloc (new_len + 1), *n; - - for (n = new_str; *str != '\0' && new_len > 0; new_len -= 1) - if (*str == '\\') - switch (*(str + 1)) - { - case 'n': - { - *n ++ = '\n'; - str += 2; - new_len -= 1; - continue; - } - case 't': - { - *n ++ = '\t'; - str += 2; - new_len -= 1; - continue; - } - case '"': - { - *n ++ = '"'; - str += 2; - new_len -= 1; - continue; - } - case '0': /* \nnn */ - case '1': - case '2': - case '3': - { - char c2 = *(str + 2), c3 = *(str + 3); - int b = (*(str + 1) - '0') << 3; - - if ('0' <= c2 && c2 <= '7') - b += (c2 - '0') << 3; - else - yyerror ("Bad character in \\ooo construct in string"); - - if ('0' <= c3 && c3 <= '7') - b += c3 - '0'; - else - yyerror ("Bad character in \\ooo construct in string"); - - *n ++ = (char) b; - str += 4; - new_len -= 3; - continue; - } - case 'X': - { - char c2 = *(str + 2), c3 = *(str + 3); - int b = 0; - - if ('0' <= c2 && c2 <= '9') - b = c2 - '0'; - else if ('A' <= c2 && c2 <= 'F') - b = c2 - 'A' + 10; - else - yyerror ("Bad character in \\X construct in string"); - - b <<= 4; - if ('0' <= c3 && c3 <= '9') - b += c3 - '0'; - else if ('A' <= c3 && c3 <= 'F') - b += c3 - 'A' + 10; - else - yyerror ("Bad character in \\X construct in string"); - - *n ++ = (char) b; - str += 4; - new_len -= 3; - continue; - } - default: - { - *n ++ = *str ++; - continue; - } - } - else - *n ++ = *str ++; - - *n = '\0'; - return (new_str); -} - - -/* On a parse error, write out the current line and print a caret (^) - below the point at which the error occured. Also, reset the input - stream to the begining of the next line. */ - -char* -erroneous_line () -{ - int prefix_length = yytext - current_line; - int i, c; - str_stream ss; - - ss_init (&ss); - - if (current_line == NULL) return ss_to_string (&ss); - - /* Print part of line that has been consumed. */ - ss_printf (&ss, " "); - if (0 <= prefix_length) - { - /* yytext and current_line point to same line */ - c = *(current_line + prefix_length); - *(current_line + prefix_length) = '\0'; - ss_printf (&ss, "%s", current_line); - *(current_line + prefix_length) = (char)c; - ss_printf (&ss, "%s", yytext); - } - else - { - /* yytext and current_line point to different lines */ - ss_printf (&ss, "%s", current_line); - prefix_length = strlen(current_line); - } - - /* Flush the rest of the line (not consumed) from lex input. */ - if (*yytext != '\n') - { -#ifdef __cplusplus - while ((c = yyinput ()) != '\n' && c != EOF && c != 1) -#else - while ((c = input ()) != '\n' && c != EOF && c != 1) -#endif - { - ss_printf (&ss, "%c", c); - } - if (c == '\n') unput ('\n'); - current_line = NULL; - } - - /* Print marker to point at which consumption stopped. */ - ss_printf (&ss, "\n "); - for (i = 0; i < prefix_length; i ++) ss_printf (&ss, " "); - ss_printf (&ss, "^\n"); - - return ss_to_string (&ss); -} - - -static name_val_val keyword_tbl [] = { -#undef OP -#define OP(NAME, OPCODE, TYPE, R_OPCODE) {NAME, OPCODE, TYPE}, -#include "op.h" -}; - - -static int -check_keyword (char *id, int allow_pseudo_ops) -{ - name_val_val *entry = - map_string_to_name_val_val (keyword_tbl, - sizeof(keyword_tbl) / sizeof (name_val_val), - id); - if (entry == NULL) - return (0); - else if (!allow_pseudo_ops && entry->value2 == PSEUDO_OP) - return (0); - else - return (entry->value1); -} - - -static name_val_val register_tbl [] = { - {"a0", 4, 0}, - {"a1", 5, 0}, - {"a2", 6, 0}, - {"a3", 7, 0}, - {"at", 1, 0}, - {"fp", 30, 0}, - {"gp", 28, 0}, - {"k0", 26, 0}, - {"k1", 27, 0}, - {"kt0", 26, 0}, - {"kt1", 27, 0}, - {"ra", 31, 0}, - {"s0", 16, 0}, - {"s1", 17, 0}, - {"s2", 18, 0}, - {"s3", 19, 0}, - {"s4", 20, 0}, - {"s5", 21, 0}, - {"s6", 22, 0}, - {"s7", 23, 0}, - {"s8", 30, 0}, - {"sp", 29, 0}, - {"t0", 8, 0}, - {"t1", 9, 0}, - {"t2", 10, 0}, - {"t3", 11, 0}, - {"t4", 12, 0}, - {"t5", 13, 0}, - {"t6", 14, 0}, - {"t7", 15, 0}, - {"t8", 24, 0}, - {"t9", 25, 0}, - {"v0", 2, 0}, - {"v1", 3, 0}, - {"zero", 0, 0} -}; - -int -register_name_to_number (char *name) -{ - int c1 = *name, c2 = *(name + 1); - - if ('0' <= c1 && c1 <= '9' - && (c2 == '\0' || (('0' <= c2 && c2 <= '9') && *(name + 2) == '\0'))) - return (atoi (name)); - else if (c1 == 'f' && c2 >= '0' && c2 <= '9') - return atoi (name + 1); - else - { - name_val_val *entry = - map_string_to_name_val_val (register_tbl, - sizeof (register_tbl) / sizeof (name_val_val), - name); - if (entry == NULL) - return (-1); - else - return (entry->value1); - } -} - - -/* Exactly once, return the current source line, as a printable string - with a line number. Subsequent calls receive NULL instead of the - line. */ - -char * -source_line () -{ - if (line_returned) - return (NULL); - else if (current_line == NULL) /* Error on line */ - return (NULL); - else - { - char *eol1, c1; - char *null1 = NULL; - char *r; - - /* Find end of line: */ - for (eol1 = current_line; *eol1 != '\0' && *eol1 != '\n'; ) eol1 += 1; - -#ifdef FLEX_SCANNER - /* Ran into null byte, inserted by yylex. In necessary, look further - for newline. (This only works for scanners produced by flex. Other - versions of lex need similar code, or source code lines will end - early. */ - if (*eol1 == '\0' && yy_hold_char != '\n') - { - null1 = eol1; - *eol1 = yy_hold_char; - for ( ; *eol1 != '\0' && *eol1 != '\n'; ) - eol1 += 1; - } -#endif - - /* Save end-of-line character and null terminate string so it can - be printed. */ - c1 = *eol1; - *eol1 = '\0'; - - r = (char *) xmalloc (eol1 - current_line + 10); - sprintf (r, "%d: %s", current_line_no, current_line); - - /* Restore end-of-line character and, if necessary, yylex's null byte. */ - *eol1 = c1; - if (null1 != NULL) - { - *null1 = '\0'; - } - line_returned = 1; - return ((char *) r); - } -} diff --git a/spim-qtbase/CPU/spim-syscall.h b/spim-qtbase/CPU/spim-syscall.h deleted file mode 100644 index f350f07..0000000 --- a/spim-qtbase/CPU/spim-syscall.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPIM S20 MIPS simulator. - System calls implemented by simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#define PRINT_INT_SYSCALL 1 -#define PRINT_FLOAT_SYSCALL 2 -#define PRINT_DOUBLE_SYSCALL 3 -#define PRINT_STRING_SYSCALL 4 -#define READ_INT_SYSCALL 5 -#define READ_FLOAT_SYSCALL 6 -#define READ_DOUBLE_SYSCALL 7 -#define READ_STRING_SYSCALL 8 -#define SBRK_SYSCALL 9 -#define EXIT_SYSCALL 10 -#define PRINT_CHARACTER_SYSCALL 11 -#define READ_CHARACTER_SYSCALL 12 - -#define OPEN_SYSCALL 13 -#define READ_SYSCALL 14 -#define WRITE_SYSCALL 15 -#define CLOSE_SYSCALL 16 - -#define EXIT2_SYSCALL 17 diff --git a/spim-qtbase/CPU/spim-utils.cpp b/spim-qtbase/CPU/spim-utils.cpp deleted file mode 100755 index 14ef37e..0000000 --- a/spim-qtbase/CPU/spim-utils.cpp +++ /dev/null @@ -1,625 +0,0 @@ -/* SPIM S20 MIPS simulator. - Misc. routines for SPIM. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include -#include -#include - -#include "spim.h" -#include "version.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "data.h" -#include "reg.h" -#include "mem.h" -#include "scanner.h" -#include "parser.h" -#include "parser_yacc.h" -#include "run.h" -#include "sym-tbl.h" - - -/* Internal functions: */ - -static mem_addr copy_int_to_stack (int n); -static mem_addr copy_str_to_stack (char *s); -static void delete_all_breakpoints (); - - -int exception_occurred; - -int initial_text_size = TEXT_SIZE; - -int initial_data_size = DATA_SIZE; - -mem_addr initial_data_limit = DATA_LIMIT; - -int initial_stack_size = STACK_SIZE; - -mem_addr initial_stack_limit = STACK_LIMIT; - -int initial_k_text_size = K_TEXT_SIZE; - -int initial_k_data_size = K_DATA_SIZE; - -mem_addr initial_k_data_limit = K_DATA_LIMIT; - - - -/* Initialize or reinitialize the state of the machine. */ - -void -initialize_world (char* exception_file_names, bool print_message) -{ - /* Allocate the floating point registers */ - if (FGR == NULL) - FPR = (double *) xmalloc (FPR_LENGTH * sizeof (double)); - /* Allocate the memory */ - make_memory (initial_text_size, - initial_data_size, initial_data_limit, - initial_stack_size, initial_stack_limit, - initial_k_text_size, - initial_k_data_size, initial_k_data_limit); - initialize_registers (); - initialize_inst_tables (); - initialize_symbol_table (); - k_text_begins_at_point (K_TEXT_BOT); - k_data_begins_at_point (K_DATA_BOT); - data_begins_at_point (DATA_BOT); - text_begins_at_point (TEXT_BOT); - - if (exception_file_names != NULL) - { - bool old_bare = bare_machine; - bool old_accept = accept_pseudo_insts; - char *filename; - char *files; - - /* Save machine state */ - bare_machine = false; /* Exception handler uses extended machine */ - accept_pseudo_insts = true; - - /* strtok modifies the string, so we must back up the string prior to use. */ - if ((files = strdup (exception_file_names)) == NULL) - fatal_error ("Insufficient memory to complete.\n"); - - for (filename = strtok (files, ";"); filename != NULL; filename = strtok (NULL, ";")) - { - if (!read_assembly_file (filename)) - fatal_error ("Cannot read exception handler: %s\n", filename); - - if (print_message) - write_output (message_out, "Loaded: %s\n", filename); - } - - free (files); - - /* Restore machine state */ - bare_machine = old_bare; - accept_pseudo_insts = old_accept; - - if (!bare_machine) - { - (void)make_label_global ("main"); /* In case .globl main forgotten */ - (void)record_label ("main", 0, 0); - } - } - initialize_scanner (stdin); - delete_all_breakpoints (); -} - - -void -write_startup_message () -{ - write_output (message_out, "SPIM %s\n", SPIM_VERSION); - write_output (message_out, "Copyright 1990-2021 by James Larus.\n"); - write_output (message_out, "All Rights Reserved.\n"); - write_output (message_out, "SPIM is distributed under a BSD license.\n"); - write_output (message_out, "See the file README for a full copyright notice.\n"); -} - - - -void -initialize_registers () -{ - memclr (FPR, FPR_LENGTH * sizeof (double)); - FGR = (float *) FPR; - FWR = (int *) FPR; - - memclr (R, R_LENGTH * sizeof (reg_word)); - R[REG_SP] = STACK_TOP - BYTES_PER_WORD - 4096; /* Initialize $sp */ - HI = LO = 0; - PC = 0; - - CP0_BadVAddr = 0; - CP0_Count = 0; - CP0_Compare = 0; - CP0_Status = (CP0_Status_CU & 0x30000000) | CP0_Status_IM | CP0_Status_UM; - CP0_Cause = 0; - CP0_EPC = 0; -#ifdef SPIM_BIGENDIAN - CP0_Config = CP0_Config_BE; -#else - CP0_Config = 0; -#endif - - FIR = FIR_W | FIR_D | FIR_S; /* Word, double, & single implemented */ - FCSR = 0x0; -} - - -/* Read file NAME, which should contain assembly code. Return true if - successful and false otherwise. */ - -bool -read_assembly_file (char *name) -{ - FILE *file = fopen (name, "rt"); - - if (file == NULL) - { - error ("Cannot open file: `%s'\n", name); - return false; - } - else - { - initialize_scanner (file); - initialize_parser (name); - - while (!yyparse ()) ; - - fclose (file); - flush_local_labels (!parse_error_occurred); - end_of_assembly_file (); - return true; - } -} - - -mem_addr -starting_address () -{ - return (find_symbol_address (DEFAULT_RUN_LOCATION)); -} - - -#define MAX_ARGS 10000 - -/* Initialize the SPIM stack from a string containing the command line. */ - -void -initialize_stack(const char *command_line) -{ - int argc = 0; - char *argv[MAX_ARGS]; - char *a; - char *args = str_copy((char*)command_line); /* Destructively modify string */ - char *orig_args = args; - - while (*args != '\0') - { - /* Skip leading blanks */ - while (*args == ' ' || *args == '\t') args++; - - /* First non-blank char */ - a = args; - - /* Last non-blank, non-null char */ - while (*args != ' ' && *args != '\t' && *args != '\0') args++; - - /* Terminate word */ - if (a != args) - { - if (*args != '\0') - *args++ = '\0'; /* Null terminate */ - - argv[argc++] = a; - - if (MAX_ARGS == argc) - { - break; /* If too many, ignore rest of list */ - } - } - } - - initialize_run_stack (argc, argv); - free (orig_args); -} - - -/* Initialize the SPIM stack with ARGC, ARGV, and ENVP data. */ - -#ifdef _MSC_VER -#define environ _environ -#endif - -void -initialize_run_stack (int argc, char **argv) -{ - char **p; - extern char **environ; - int i, j = 0, env_j; - mem_addr addrs[10000]; - - - R[REG_SP] = STACK_TOP - 1; /* Initialize $sp */ - - /* Put strings on stack: */ - /* env: */ - for (p = environ; *p != NULL; p++) - addrs[j++] = copy_str_to_stack (*p); - env_j = j; - - /* argv; */ - for (i = 0; i < argc; i++) - addrs[j++] = copy_str_to_stack (argv[i]); - - /* Align stack pointer for word-size data */ - R[REG_SP] = R[REG_SP] & ~3; /* Round down to nearest word */ - R[REG_SP] -= BYTES_PER_WORD; /* First free word on stack */ - R[REG_SP] = R[REG_SP] & ~7; /* Double-word align stack-pointer*/ - - /* Build vectors on stack: */ - /* env: */ - (void)copy_int_to_stack (0); /* Null-terminate vector */ - for (i = env_j - 1; i >= 0; i--) - R[REG_A2] = copy_int_to_stack (addrs[i]); - - /* argv: */ - (void)copy_int_to_stack (0); /* Null-terminate vector */ - for (i = j - 1; i >= env_j; i--) - R[REG_A1] = copy_int_to_stack (addrs[i]); - - /* argc: */ - R[REG_A0] = argc; - set_mem_word (R[REG_SP], argc); /* Leave argc on stack */ -} - - -static mem_addr -copy_str_to_stack (char *s) -{ - int i = (int)strlen (s); - while (i >= 0) - { - set_mem_byte (R[REG_SP], s[i]); - R[REG_SP] -= 1; - i -= 1; - } - return ((mem_addr) R[REG_SP] + 1); /* Leaves stack pointer byte-aligned!! */ -} - - -static mem_addr -copy_int_to_stack (int n) -{ - set_mem_word (R[REG_SP], n); - R[REG_SP] -= BYTES_PER_WORD; - return ((mem_addr) R[REG_SP] + BYTES_PER_WORD); -} - - -/* Run the program, starting at PC, for STEPS instructions. Display each - instruction before executing if DISPLAY is true. If CONT_BKPT is - true, then step through a breakpoint. CONTINUABLE is true if - execution can continue. Return true if breakpoint is encountered. */ - -bool -run_program (mem_addr pc, int steps, bool display, bool cont_bkpt, bool* continuable) -{ - if (cont_bkpt && inst_is_breakpoint (pc)) - { - mem_addr addr = PC == 0 ? pc : PC; - - delete_breakpoint (addr); - exception_occurred = 0; - *continuable = run_spim (addr, 1, display); - add_breakpoint (addr); - steps -= 1; - pc = PC; - } - - exception_occurred = 0; - *continuable = run_spim (pc, steps, display); - if (exception_occurred && CP0_ExCode == ExcCode_Bp) - { - /* Turn off EXL bit, so subsequent interrupts set EPC since the break is - handled by SPIM code, not MIPS code. */ - CP0_Status &= ~CP0_Status_EXL; - return true; - } - else - return false; -} - - -/* Record of where a breakpoint was placed and the instruction previously - in memory. */ - -typedef struct bkptrec -{ - mem_addr addr; - instruction *inst; - struct bkptrec *next; -} bkpt; - - -static bkpt *bkpts = NULL; - - -/* Set a breakpoint at memory location ADDR. */ - -void -add_breakpoint (mem_addr addr) -{ - bkpt *rec = (bkpt *) xmalloc (sizeof (bkpt)); - - rec->next = bkpts; - rec->addr = addr; - - if ((rec->inst = set_breakpoint (addr)) != NULL) - bkpts = rec; - else - { - if (exception_occurred) - error ("Cannot put a breakpoint at address 0x%08x\n", addr); - else - error ("No instruction to breakpoint at address 0x%08x\n", addr); - free (rec); - } -} - - -/* Delete all breakpoints at memory location ADDR. */ - -void -delete_breakpoint (mem_addr addr) -{ - bkpt *p, *b; - int deleted_one = 0; - - for (p = NULL, b = bkpts; b != NULL; ) - if (b->addr == addr) - { - bkpt *n; - - set_mem_inst (addr, b->inst); - if (p == NULL) - bkpts = b->next; - else - p->next = b->next; - n = b->next; - free (b); - b = n; - deleted_one = 1; - } - else - p = b, b = b->next; - if (!deleted_one) - error ("No breakpoint to delete at 0x%08x\n", addr); -} - - -static void -delete_all_breakpoints () -{ - bkpt *b, *n; - - for (b = bkpts, n = NULL; b != NULL; b = n) - { - n = b->next; - free (b); - } - bkpts = NULL; -} - - -/* List all breakpoints. */ - -void -list_breakpoints () -{ - bkpt *b; - - if (bkpts) - for (b = bkpts; b != NULL; b = b->next) - write_output (message_out, "Breakpoint at 0x%08x\n", b->addr); - else - write_output (message_out, "No breakpoints set\n"); -} - - - -/* Utility routines */ - - -/* Return the entry in the linear TABLE of length LENGTH with key STRING. - TABLE must be sorted on the key field. - Return NULL if no such entry exists. */ - -name_val_val * -map_string_to_name_val_val (name_val_val tbl[], int tbl_len, char *id) -{ - int low = 0; - int hi = tbl_len - 1; - - while (low <= hi) - { - int mid = (low + hi) / 2; - char *idp = id, *np = tbl[mid].name; - - while (*idp == *np && *idp != '\0') {idp ++; np ++;} - - if (*np == '\0' && *idp == '\0') /* End of both strings */ - return (& tbl[mid]); - else if (*idp > *np) - low = mid + 1; - else - hi = mid - 1; - } - - return NULL; -} - - -/* Return the entry in the linear TABLE of length LENGTH with VALUE1 field NUM. - TABLE must be sorted on the VALUE1 field. - Return NULL if no such entry exists. */ - -name_val_val * -map_int_to_name_val_val (name_val_val tbl[], int tbl_len, int num) -{ - int low = 0; - int hi = tbl_len - 1; - - while (low <= hi) - { - int mid = (low + hi) / 2; - - if (tbl[mid].value1 == num) - return (&tbl[mid]); - else if (num > tbl[mid].value1) - low = mid + 1; - else - hi = mid - 1; - } - - return NULL; -} - - -#ifdef NEED_VSPRINTF -char * -vsprintf (str, fmt, args) - char *str,*fmt; - va_list *args; -{ - FILE _strbuf; - - _strbuf._flag = _IOWRT+_IOSTRG; - _strbuf._ptr = str; - _strbuf._cnt = 32767; - _doprnt(fmt, args, &_strbuf); - putc('\0', &_strbuf); - return(str); -} -#endif - - -#ifdef NEED_STRTOL -unsigned long -strtol (const char* str, const char** eptr, int base) -{ - long result; - - if (base != 0 && base != 16) - fatal_error ("SPIM's strtol only works for base 16 (not base %d)\n", base); - if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X')) - { - str += 2; - sscanf (str, "%lx", &result); - } - else if (base == 16) - { - sscanf (str, "%lx", &result); - } - else - { - sscanf (str, "%ld", &result); - } - return (result); -} -#endif - - -#ifdef NEED_STRTOUL -unsigned long -strtoul (const char* str, char** eptr, int base) -{ - unsigned long result; - - if (base != 0 && base != 16) - fatal_error ("SPIM's strtoul only works for base 16 (not base %d)\n", base); - if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X')) - { - str += 2; - sscanf (str, "%lx", &result); - } - else if (base == 16) - { - sscanf (str, "%lx", &result); - } - else - { - sscanf (str, "%ld", &result); - } - return (result); -} -#endif - - -char * -str_copy (char *str) -{ - return (strcpy ((char*)xmalloc ((int)strlen (str) + 1), str)); -} - - -void * -xmalloc (int size) -{ - void *x = (void *) malloc (size); - - if (x == 0) - fatal_error ("Out of memory at request for %d bytes.\n"); - return (x); -} - - -/* Allocate a zero'ed block of storage. */ - -void * -zmalloc (int size) -{ - void *z = (void *) malloc (size); - - if (z == 0) - fatal_error ("Out of memory at request for %d bytes.\n"); - - memclr (z, size); - return (z); -} diff --git a/spim-qtbase/CPU/spim-utils.h b/spim-qtbase/CPU/spim-utils.h deleted file mode 100755 index 33273c5..0000000 --- a/spim-qtbase/CPU/spim-utils.h +++ /dev/null @@ -1,67 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to misc. routines for SPIM. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Triple containing a string and two integers. Used in tables - mapping from a name to values. */ - -typedef struct -{ - char *name; - int value1; - int value2; -} name_val_val; - - - -/* Exported functions: */ - -void add_breakpoint (mem_addr addr); -void delete_breakpoint (mem_addr addr); -void format_data_segs (str_stream *ss); -void format_insts (str_stream *ss, mem_addr from, mem_addr to); -void format_mem (str_stream *ss, mem_addr from, mem_addr to); -void format_registers (str_stream *ss, int print_gpr_hex, int print_fpr_hex); -void initialize_registers (); -void initialize_stack (const char *command_line); -void initialize_run_stack (int argc, char **argv); -void initialize_world (char *exception_file_names, bool print_message); -void list_breakpoints (); -name_val_val *map_int_to_name_val_val (name_val_val tbl[], int tbl_len, int num); -name_val_val *map_string_to_name_val_val (name_val_val tbl[], int tbl_len, char *id); -bool read_assembly_file (char *name); -bool run_program (mem_addr pc, int steps, bool display, bool cont_bkpt, bool* continuable); -mem_addr starting_address (); -char *str_copy (char *str); -void write_startup_message (); -void *xmalloc (int); -void *zmalloc (int); diff --git a/spim-qtbase/CPU/spim.h b/spim-qtbase/CPU/spim.h deleted file mode 100755 index 39aba75..0000000 --- a/spim-qtbase/CPU/spim.h +++ /dev/null @@ -1,260 +0,0 @@ -/* SPIM S20 MIPS simulator. - Definitions for the SPIM S20. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef NULL -#define NULL 0 -#endif - -/* This declaration must match the endianness of the machine SPIM is running on. You CANNOT - set SPIM to simulate a different endianness than the machine that executes it. Almost - every processor (notably the x86) is little endian today. If your machine is big endian, - define -DSPIM_BIGENDIAN in the Makefile. */ - -#ifndef SPIM_BIGENDIAN -#define SPIM_LITTLENDIAN -#endif - - -/* Type declarations for portability. They work for DEC's Alpha (64 bits) - and 32 bit machines */ - -typedef int int32; -typedef unsigned int uint32; -typedef union {int i; void* p;} intptr_union; - - -#define streq(s1, s2) !strcmp(s1, s2) - - -/* Round V to next greatest B boundary */ -#define ROUND_UP(V, B) (((int) V + (B-1)) & ~(B-1)) -#define ROUND_DOWN(V, B) (((int) V) & ~(B-1)) - -/* Sign-extend an int16 to an int32 */ -#define SIGN_EX(X) (((X) & 0x8000) ? ((X) | 0xffff0000) : (X)) - - -#ifdef MIN /* Some systems define these in system includes */ -#undef MIN -#endif -#ifdef MAX -#undef MAX -#endif -#define MIN(A, B) ((A) < (B) ? (A) : (B)) -#define MAX(A, B) ((A) > (B) ? (A) : (B)) - - -/* Useful and pervasive declarations: */ - -#ifdef NEED_MEM_FUNCTIONS -#define memcpy(T, F, S) bcopy((void*)F, (void*)T, S) -#define memclr(B, S) bzero(B, S) -#define memcmp(S1, S2, N) bcmp(S1, S2, N) -#else -#include -#define memclr(B, S) memset((void*)B, 0, S) -#endif - -#include -#include -#define QSORT_FUNC int(*)(const void *, const void *) - - - -#define K 1024 - - -/* Type of a memory address. Must be a 32-bit quantity to match MIPS. */ - -typedef uint32 /*@alt int @*/ mem_addr; - - -#define BYTES_PER_WORD 4 /* On the MIPS processor */ - - -/* Sizes of memory segments. */ - -/* Initial size of text segment. */ - -#ifndef TEXT_SIZE -#define TEXT_SIZE (256*K) /* 1/4 MB */ -#endif - -/* Initial size of k_text segment. */ - -#ifndef K_TEXT_SIZE -#define K_TEXT_SIZE (64*K) /* 64 KB */ -#endif - -/* The data segment must be larger than 64K since we immediate grab - 64K for the small data segment pointed to by $gp. The data segment is - expanded by an sbrk system call. */ - -/* Initial size of data segment. */ - -#ifndef DATA_SIZE -#define DATA_SIZE (256*K) /* 1/4 MB */ -#endif - -/* Maximum size of data segment. */ - -#ifndef DATA_LIMIT -#define DATA_LIMIT (K*K) /* 1 MB */ -#endif - -/* Initial size of k_data segment. */ - -#ifndef K_DATA_SIZE -#define K_DATA_SIZE (64*K) /* 64 KB */ -#endif - -/* Maximum size of k_data segment. */ - -#ifndef K_DATA_LIMIT -#define K_DATA_LIMIT (K*K) /* 1 MB */ -#endif - -/* The stack grows down automatically. */ - -/* Initial size of stack segment. */ - -#ifndef STACK_SIZE -#define STACK_SIZE (64*K) /* 64 KB */ -#endif - -/* Maximum size of stack segment. */ - -#ifndef STACK_LIMIT -#define STACK_LIMIT (256*K) /* 1/4 MB */ -#endif - - -/* Name of the function to invoke at start up */ - -#define DEFAULT_RUN_LOCATION "__start" - - -/* Name of the symbol marking the end of the exception handler */ - -#define END_OF_TRAP_HANDLER_SYMBOL "__eoth" - - -/* Default number of instructions to execute. */ - -#define DEFAULT_RUN_STEPS 2147483647 - - -/* Address to branch to when exception occurs */ -#ifdef MIPS1 -/* MIPS R2000 */ -#define EXCEPTION_ADDR 0x80000080 -#else -/* MIPS32 */ -#define EXCEPTION_ADDR 0x80000180 -#endif - -/* Maximum size of object stored in the small data segment pointed to by $gp */ - -#define SMALL_DATA_SEG_MAX_SIZE 8 - -#ifndef DIRECT_MAPPED -#define DIRECT_MAPPED 0 -#define TWO_WAY_SET 1 -#endif - - -/* Interval (in instructions) at which memory-mapped IO registers are - checked and updated. (This is to reduce overhead from making system calls - to check for IO. It can be set as low as 1.) */ - -#define IO_INTERVAL 100 - - -/* Number of IO_INTERVALs that a character remains in receiver buffer, - even if another character is available. */ - -#define RECV_INTERVAL 100 - - -/* Number of IO_INTERVALs that it takes to write a character. */ - -#define TRANS_LATENCY 100 - - -/* Iterval (milliseconds) for the hardware timer in CP0. */ - -#define TIMER_TICK_MS 10 /* 100 times per second */ - - - -/* A port is either a Unix file descriptor (an int) or a FILE* pointer. */ - -#include - -typedef union {int i; FILE* f;} port; - - -/* Exported functions (from spim.c or xspim.c): */ - -int console_input_available (); -void error (char *fmt, ...); -void fatal_error (char *fmt, ...); -char get_console_char (); -void put_console_char (char c); -void read_input (char *str, int n); -void run_error (char *fmt, ...); -void write_output (port, char *fmt, ...); - - -/* Exported variables: */ - -extern bool bare_machine; /* => simulate bare machine */ -extern bool accept_pseudo_insts; /* => parse pseudo instructions */ -extern bool delayed_branches; /* => simulate delayed branches */ -extern bool delayed_loads; /* => simulate delayed loads */ -extern bool quiet; /* => no warning messages */ -extern char *exception_file_name; /* File containing exception handler */ -extern bool force_break; /* => stop interpreter loop */ -extern bool parser_error_occurred; /* => parse resulted in error */ -extern int spim_return_value; /* Value returned when spim exits */ -/* Actual type of structure pointed to depends on X/terminal interface */ -extern port message_out, console_out, console_in; -extern bool mapped_io; /* => activate memory-mapped IO */ -extern int initial_text_size; -extern int initial_data_size; -extern mem_addr initial_data_limit; -extern int initial_stack_size; -extern mem_addr initial_stack_limit; -extern int initial_k_text_size; -extern int initial_k_data_size; -extern mem_addr initial_k_data_limit; diff --git a/spim-qtbase/CPU/string-stream.cpp b/spim-qtbase/CPU/string-stream.cpp deleted file mode 100755 index a083247..0000000 --- a/spim-qtbase/CPU/string-stream.cpp +++ /dev/null @@ -1,142 +0,0 @@ -/* SPIM S20 MIPS simulator. - Append-only output stream convertable to a string. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include -#include - -#include "spim.h" -#include "string-stream.h" - - -#ifndef SS_BUF_LENGTH -/* Initialize length of buffer */ -#define SS_BUF_LENGTH 256 -#endif - - -void -ss_init (str_stream* ss) -{ - ss->buf = (char *) malloc (SS_BUF_LENGTH); - ss->max_length = SS_BUF_LENGTH; - ss->empty_pos = 0; - ss->initialized = 1; -} - - -void -ss_clear (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - ss->empty_pos = 0; -} - - -void -ss_erase (str_stream* ss, int n) -{ - if (0 == ss->initialized) ss_init (ss); - - ss->empty_pos -= n; - if (ss->empty_pos <0) ss->empty_pos = 0; -} - - -int -ss_length (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - return ss->empty_pos; -} - - -char* -ss_to_string (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - if (ss->empty_pos == ss->max_length) - { - /* Not enough room to store output: increase buffer size and try again */ - ss->max_length = ss->max_length + 1; - ss->buf = (char *) realloc (ss->buf, (size_t)ss->max_length); - if (NULL == ss->buf) - fatal_error ("realloc failed\n"); - } - ss->buf[ss->empty_pos] = '\0'; /* Null terminate string */ - ss->empty_pos += 1; - return ss->buf; -} - - -void -ss_printf (str_stream* ss, char* fmt, ...) -{ - int free_space; - int n; - va_list args; - - va_start (args, fmt); - - if (0 == ss->initialized) ss_init (ss); - - free_space = ss->max_length - ss->empty_pos; -#ifdef _WIN32 - /* Returns -1 when buffer is too small */ - while ((n = _vsnprintf (ss->buf + ss->empty_pos, free_space, fmt, args)) < 0) -#else - /* Returns necessary space when buffer is too small */ - while ((n = vsnprintf (ss->buf + ss->empty_pos, free_space, fmt, args)) >= free_space) -#endif - { - /* Not enough room to store output: double buffer size and try again */ - ss->max_length = 2 * ss->max_length; - ss->buf = (char *) realloc (ss->buf, (size_t)ss->max_length); - free_space = ss->max_length - ss->empty_pos; - if (NULL == ss->buf) - fatal_error ("realloc failed\n"); - - va_end (args); /* Restart argument pointer */ - va_start (args, fmt); - } - ss->empty_pos += n; - - /* Null terminate string (for debugging) if there is enough room*/ - if (ss->empty_pos < ss->max_length) - ss->buf[ss->empty_pos] = '\0'; - - va_end (args); -} diff --git a/spim-qtbase/CPU/string-stream.h b/spim-qtbase/CPU/string-stream.h deleted file mode 100755 index 1766b67..0000000 --- a/spim-qtbase/CPU/string-stream.h +++ /dev/null @@ -1,48 +0,0 @@ -/* SPIM S20 MIPS simulator. - Append-only output stream convertable to a string. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -typedef struct str_stm -{ - char* buf; /* Buffer containing output */ - int max_length; /* Length of buffer */ - int empty_pos; /* Index of empty char in stream*/ - int initialized; /* Stream initialized? */ -} str_stream; - - -void ss_init (str_stream* ss); -void ss_clear (str_stream* ss); -void ss_erase (str_stream* ss, int n); -int ss_length (str_stream* ss); -char* ss_to_string (str_stream* ss); -void ss_printf (str_stream* ss, char* fmt, ...); diff --git a/spim-qtbase/CPU/sym-tbl.cpp b/spim-qtbase/CPU/sym-tbl.cpp deleted file mode 100755 index b2490b5..0000000 --- a/spim-qtbase/CPU/sym-tbl.cpp +++ /dev/null @@ -1,518 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to maintain symbol table to resolve symbolic labels. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "data.h" -#include "parser.h" -#include "sym-tbl.h" -#include "parser_yacc.h" - - -/* Local functions: */ - -static void get_hash (char *name, int *slot_no, label **entry); -static void resolve_a_label_sub (label *sym, instruction *inst, mem_addr pc); - - - -/* Keep track of the memory location that a label represents. If we - see a reference to a label that is not yet defined, then record the - reference so that we can patch up the instruction when the label is - defined. - - At the end of a file, we flush the hash table of all non-global - labels so they can't be seen in other files. */ - - -static label *local_labels = NULL; /* Labels local to current file. */ - - -#define HASHBITS 30 - -#define LABEL_HASH_TABLE_SIZE 8191 - - -/* Map from name of a label to a label structure. */ - -static label *label_hash_table [LABEL_HASH_TABLE_SIZE]; - - -/* Initialize the symbol table by removing and freeing old entries. */ - -void -initialize_symbol_table () -{ - int i; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - { - label *x, *n; - - for (x = label_hash_table [i]; x != NULL; x = n) - { - free (x->name); - n = x->next; - free (x); - } - label_hash_table [i] = NULL; - } - - local_labels = NULL; -} - - - -/* Lookup for a label with the given NAME. Set the SLOT_NO to be the hash - table bucket that contains (or would contain) the label's record. If the - record is already in the table, set ENTRY to point to it. Otherwise, - set ENTRY to be NULL. */ - -static void -get_hash (char *name, int *slot_no, label **entry) -{ - int hi; - int i; - label *lab; - int len; - - /* Compute length of name in len. */ - for (len = 0; name[len]; len++) ; - - /* Compute hash code */ - hi = len; - for (i = 0; i < len; i++) - hi = ((hi * 613) + (unsigned)(name[i])); - - hi &= (1 << HASHBITS) - 1; - hi %= LABEL_HASH_TABLE_SIZE; - - *slot_no = hi; - /* Search table for entry */ - for (lab = label_hash_table [hi]; lab; lab = lab->next) - if (streq (lab->name, name)) - { - *entry = lab; /* <-- return if found */ - return; - } - *entry = NULL; -} - - -/* Lookup label with NAME. Either return its symbol table entry or NULL - if it is not in the table. */ - -label * -label_is_defined (char *name) -{ - int hi; - label *entry; - - get_hash (name, &hi, &entry); - - return (entry); -} - - -/* Return a label with a given NAME. If an label with that name has - previously been looked-up, the same node is returned this time. */ - -label * -lookup_label (char *name) -{ - int hi; - label *entry, *lab; - - get_hash (name, &hi, &entry); - - if (entry != NULL) - return (entry); - - /* Not found, create one, add to chain */ - lab = (label *) xmalloc (sizeof (label)); - lab->name = str_copy (name); - lab->addr = 0; - lab->global_flag = 0; - lab->const_flag = 0; - lab->gp_flag = 0; - lab->uses = NULL; - - lab->next = label_hash_table [hi]; - label_hash_table [hi] = lab; - return lab; /* <-- return if created */ -} - - -/* Record that the label named NAME refers to ADDRESS. If RESOLVE_USES is - true, resolve all references to it. Return the label structure. */ - -label * -record_label (char *name, mem_addr address, int resolve_uses) -{ - label *l = lookup_label (name); - - if (!l->gp_flag) - { - if (l->addr != 0) - { - yyerror ("Label is defined for the second time"); - return (l); - } - l->addr = address; - } - - if (resolve_uses) - { - resolve_label_uses (l); - } - - if (!l->global_flag) - { - l->next_local = local_labels; - local_labels = l; - } - return (l); -} - - -/* Make the label named NAME global. Return its symbol. */ - -label * -make_label_global (char *name) -{ - label *l = lookup_label (name); - - l->global_flag = 1; - return (l); -} - - -/* Record that an INSTRUCTION uses the as-yet undefined SYMBOL. */ - -void -record_inst_uses_symbol (instruction *inst, label *sym) -{ - label_use *u = (label_use *) xmalloc (sizeof (label_use)); - - if (data_dir) /* Want to free up original instruction */ - { - u->inst = copy_inst (inst); - u->addr = current_data_pc (); - } - else - { - u->inst = inst; - u->addr = current_text_pc (); - } - u->next = sym->uses; - sym->uses = u; -} - - -/* Record that a memory LOCATION uses the as-yet undefined SYMBOL. */ - -void -record_data_uses_symbol (mem_addr location, label *sym) -{ - label_use *u = (label_use *) xmalloc (sizeof (label_use)); - - u->inst = NULL; - u->addr = location; - u->next = sym->uses; - sym->uses = u; -} - - -/* Given a newly-defined LABEL, resolve the previously encountered - instructions and data locations that refer to the label. */ - -void -resolve_label_uses (label *sym) -{ - label_use *use; - label_use *next_use; - - for (use = sym->uses; use != NULL; use = next_use) - { - resolve_a_label_sub (sym, use->inst, use->addr); - if (use->inst != NULL && use->addr >= DATA_BOT && use->addr < stack_bot) - { - set_mem_word (use->addr, inst_encode (use->inst)); - free_inst (use->inst); - } - next_use = use->next; - free (use); - } - sym->uses = NULL; -} - - -/* Resolve the newly-defined label in INSTRUCTION. */ - -void -resolve_a_label (label *sym, instruction *inst) -{ - resolve_a_label_sub (sym, - inst, - (data_dir ? current_data_pc () : current_text_pc ())); -} - - -static void -resolve_a_label_sub (label *sym, instruction *inst, mem_addr pc) -{ - if (inst == NULL) - { - /* Memory data: */ - set_mem_word (pc, sym->addr); - } - else - { - /* Instruction: */ - if (EXPR (inst)->pc_relative) - EXPR (inst)->offset = 0 - pc; /* Instruction may have moved */ - - if (EXPR (inst)->symbol == NULL - || SYMBOL_IS_DEFINED (EXPR (inst)->symbol)) - { - int32 value; - int32 field_mask; - - if (opcode_is_branch (OPCODE (inst))) - { - int val; - - /* Drop low two bits since instructions are on word boundaries. */ - val = SIGN_EX (eval_imm_expr (EXPR (inst))); /* 16->32 bits */ - val = (val >> 2) & 0xffff; /* right shift, 32->16 bits */ - - if (delayed_branches) - val -= 1; - - value = val; - field_mask = 0xffff; - } - else if (opcode_is_jump (OPCODE (inst))) - { - value = eval_imm_expr (EXPR (inst)); - if ((value & 0xf0000000) != (pc & 0xf0000000)) - { - error ("Target of jump differs in high-order 4 bits from instruction pc 0x%x\n", pc); - } - /* Drop high four bits, since they come from the PC and the - low two bits since instructions are on word boundaries. */ - value = (value & 0x0fffffff) >> 2; - field_mask = 0xffffffff; /* Already checked that value fits in instruction */ - } - else if (opcode_is_load_store (OPCODE (inst))) - { - /* Label's location is an address */ - value = eval_imm_expr (EXPR (inst)); - field_mask = 0xffff; - - if (value & 0x8000) - { - /* LW/SW sign extends offset. Compensate by adding 1 to high 16 bits. */ - instruction* prev_inst; - instruction* prev_prev_inst; - prev_inst = read_mem_inst (pc - BYTES_PER_WORD); - prev_prev_inst = read_mem_inst (pc - 2 * BYTES_PER_WORD); - - if (prev_inst != NULL - && OPCODE (prev_inst) == Y_LUI_OP - && EXPR (inst)->symbol == EXPR (prev_inst)->symbol - && IMM (prev_inst) == 0) - { - /* Check that previous instruction was LUI and it has no immediate, - otherwise it will have compensated for sign-extension */ - EXPR (prev_inst)->offset += 0x10000; - } - /* There is an ADDU instruction before the LUI if the - LW/SW instruction uses an index register: skip over the ADDU. */ - else if (prev_prev_inst != NULL - && OPCODE (prev_prev_inst) == Y_LUI_OP - && EXPR (inst)->symbol == EXPR (prev_prev_inst)->symbol - && IMM (prev_prev_inst) == 0) - { - EXPR (prev_prev_inst)->offset += 0x10000; - } - } - } - else - { - /* Label's location is a value */ - value = eval_imm_expr (EXPR (inst)); - field_mask = 0xffff; - } - - if ((value & ~field_mask) != (int32)0 - && (value & ~field_mask) != (int32)0xffff0000) - { - error ("Immediate value is too large for field: "); - print_inst (pc); - } - if (opcode_is_jump (OPCODE (inst))) - SET_TARGET (inst, value); /* Don't mask so it is sign-extended */ - else - SET_IMM (inst, value); /* Ditto */ - SET_ENCODING (inst, inst_encode (inst)); - } - else - error ("Resolving undefined symbol: %s\n", - (EXPR (inst)->symbol == NULL) ? "" : EXPR (inst)->symbol->name); - } -} - - -/* Remove all local (non-global) label from the table. */ - -void -flush_local_labels (int issue_undef_warnings) -{ - label *l; - - for (l = local_labels; l != NULL; l = l->next_local) - { - int hi; - label *entry, *lab, *p; - - get_hash (l->name, &hi, &entry); - - for (lab = label_hash_table [hi], p = NULL; - lab; - p = lab, lab = lab->next) - if (lab == entry) - { - if (p == NULL) - label_hash_table [hi] = lab->next; - else - p->next = lab->next; - if (issue_undef_warnings && entry->addr == 0 && !entry->const_flag) - error ("Warning: local symbol %s was not defined\n", - entry->name); - /* Can't free label since IMM_EXPR's still reference it */ - break; - } - } - local_labels = NULL; -} - - -/* Return the address of SYMBOL or 0 if it is undefined. */ - -mem_addr -find_symbol_address (char *symbol) -{ - label *l = lookup_label (symbol); - - if (l == NULL || l->addr == 0) - return 0; - else - return (l->addr); -} - - -/* Print all symbols in the table. */ - -void -print_symbols () -{ - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table [i]; l != NULL; l = l->next) - write_output (message_out, "%s%s at 0x%08x\n", - l->global_flag ? "g\t" : "\t", l->name, l->addr); -} - - -/* Print all undefined symbols in the table. */ - -void -print_undefined_symbols () -{ - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table [i]; l != NULL; l = l->next) - if (l->addr == 0) - write_output (message_out, "%s\n", l->name); -} - - -/* Return a string containing the names of all undefined symbols in the - table, seperated by a newline character. Return NULL if no symbols - are undefined. */ - -char * -undefined_symbol_string () -{ - int buffer_length = 128; - int string_length = 0; - char *buffer = (char*)malloc(buffer_length); - - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table[i]; l != NULL; l = l->next) - if (l->addr == 0) - { - int name_length = (int)strlen(l->name); - int after_length = string_length + name_length + 2; - if (buffer_length < after_length) - { - buffer_length = MAX (2 * buffer_length, 2 * after_length); - buffer = (char*)realloc (buffer, buffer_length); - } - memcpy (buffer + string_length, l->name, name_length); - string_length += name_length; - buffer[string_length] = '\n'; - string_length += 1; - buffer[string_length] = '\0'; /* After end of string */ - } - - if (string_length != 0) - return (buffer); - else - { - free (buffer); - return (NULL); - }; -} diff --git a/spim-qtbase/CPU/sym-tbl.h b/spim-qtbase/CPU/sym-tbl.h deleted file mode 100755 index 94760f3..0000000 --- a/spim-qtbase/CPU/sym-tbl.h +++ /dev/null @@ -1,76 +0,0 @@ -/* SPIM S20 MIPS simulator. - Data structures for symbolic addresses. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -typedef struct lab_use -{ - instruction *inst; /* NULL => Data, not code */ - mem_addr addr; - struct lab_use *next; -} label_use; - - -/* Symbol table information on a label. */ - -typedef struct lab -{ - char *name; /* Name of label */ - long addr; /* Address of label or 0 if not yet defined */ - unsigned global_flag : 1; /* Non-zero => declared global */ - unsigned gp_flag : 1; /* Non-zero => referenced off gp */ - unsigned const_flag : 1; /* Non-zero => constant value (in addr) */ - struct lab *next; /* Hash table link */ - struct lab *next_local; /* Link in list of local labels */ - label_use *uses; /* List of instructions that reference */ -} label; /* label that has not yet been defined */ - - -#define SYMBOL_IS_DEFINED(SYM) ((SYM)->addr != 0) - - - -/* Exported functions: */ - -mem_addr find_symbol_address (char *symbol); -void flush_local_labels (int issue_undef_warnings); -void initialize_symbol_table (); -label *label_is_defined (char *name); -label *lookup_label (char *name); -label *make_label_global (char *name); -void print_symbols (); -void print_undefined_symbols (); -label *record_label (char *name, mem_addr address, int resolve_uses); -void record_data_uses_symbol (mem_addr location, label *sym); -void record_inst_uses_symbol (instruction *inst, label *sym); -char *undefined_symbol_string (); -void resolve_a_label (label *sym, instruction *inst); -void resolve_label_uses (label *sym); diff --git a/spim-qtbase/CPU/syscall.cpp b/spim-qtbase/CPU/syscall.cpp deleted file mode 100755 index 0c36b7d..0000000 --- a/spim-qtbase/CPU/syscall.cpp +++ /dev/null @@ -1,337 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM syscalls, both in simulator and bare mode. - Execute MIPS syscalls in bare mode, when running on MIPS systems. - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef _WIN32 -#include -#endif -#include -#include -#include -#include -#include - -#ifdef _WIN32 -#include -#endif - -#include "spim.h" -#include "string-stream.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "syscall.h" - - -#ifdef _WIN32 -/* Windows has an handler that is invoked when an invalid argument is passed to a system - call. https://msdn.microsoft.com/en-us/library/a9yf33zb(v=vs.110).aspx - - All good, except that the handler tries to invoke Watson and then kill spim with an exception. - - Override the handler to just report an error. -*/ - -#include -#include -#include - -void myInvalidParameterHandler(const wchar_t* expression, - const wchar_t* function, - const wchar_t* file, - unsigned int line, - uintptr_t pReserved) -{ - if (function != NULL) - { - run_error ("Bad parameter to system call: %s\n", function); - } - else - { - run_error ("Bad parameter to system call\n"); - } -} - -static _invalid_parameter_handler oldHandler; - -void windowsParameterHandlingControl(int flag ) -{ - static _invalid_parameter_handler oldHandler; - static _invalid_parameter_handler newHandler = myInvalidParameterHandler; - - if (flag == 0) - { - oldHandler = _set_invalid_parameter_handler(newHandler); - _CrtSetReportMode(_CRT_ASSERT, 0); // Disable the message box for assertions. - } - else - { - newHandler = _set_invalid_parameter_handler(oldHandler); - _CrtSetReportMode(_CRT_ASSERT, 1); // Enable the message box for assertions. - } -} -#endif - - -/* Decides which syscall to execute or simulate. Returns zero upon - exit syscall and non-zero to continue execution. */ - -int -do_syscall () -{ -#ifdef _WIN32 - windowsParameterHandlingControl(0); -#endif - - /* Syscalls for the source-language version of SPIM. These are easier to - use than the real syscall and are portable to non-MIPS operating - systems. */ - - switch (R[REG_V0]) - { - case PRINT_INT_SYSCALL: - write_output (console_out, "%d", R[REG_A0]); - break; - - case PRINT_FLOAT_SYSCALL: - { - float val = FPR_S (REG_FA0); - - write_output (console_out, "%.8f", val); - break; - } - - case PRINT_DOUBLE_SYSCALL: - write_output (console_out, "%.18g", FPR[REG_FA0 / 2]); - break; - - case PRINT_STRING_SYSCALL: - write_output (console_out, "%s", mem_reference (R[REG_A0])); - break; - - case READ_INT_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - R[REG_RES] = atol (str); - break; - } - - case READ_FLOAT_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - FPR_S (REG_FRES) = (float) atof (str); - break; - } - - case READ_DOUBLE_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - FPR [REG_FRES] = atof (str); - break; - } - - case READ_STRING_SYSCALL: - { - read_input ( (char *) mem_reference (R[REG_A0]), R[REG_A1]); - data_modified = true; - break; - } - - case SBRK_SYSCALL: - { - mem_addr x = data_top; - expand_data (R[REG_A0]); - R[REG_RES] = x; - data_modified = true; - break; - } - - case PRINT_CHARACTER_SYSCALL: - write_output (console_out, "%c", R[REG_A0]); - break; - - case READ_CHARACTER_SYSCALL: - { - static char str [2]; - - read_input (str, 2); - if (*str == '\0') *str = '\n'; /* makes xspim = spim */ - R[REG_RES] = (long) str[0]; - break; - } - - case EXIT_SYSCALL: - spim_return_value = 0; - return (0); - - case EXIT2_SYSCALL: - spim_return_value = R[REG_A0]; /* value passed to spim's exit() call */ - return (0); - - case OPEN_SYSCALL: - { -#ifdef _WIN32 - R[REG_RES] = _open((char*)mem_reference (R[REG_A0]), R[REG_A1], R[REG_A2]); -#else - R[REG_RES] = open((char*)mem_reference (R[REG_A0]), R[REG_A1], R[REG_A2]); -#endif - break; - } - - case READ_SYSCALL: - { - /* Test if address is valid */ - (void)mem_reference (R[REG_A1] + R[REG_A2] - 1); -#ifdef _WIN32 - R[REG_RES] = _read(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#else - R[REG_RES] = read(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#endif - data_modified = true; - break; - } - - case WRITE_SYSCALL: - { - /* Test if address is valid */ - (void)mem_reference (R[REG_A1] + R[REG_A2] - 1); -#ifdef _WIN32 - R[REG_RES] = _write(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#else - R[REG_RES] = write(R[REG_A0], mem_reference (R[REG_A1]), R[REG_A2]); -#endif - break; - } - - case CLOSE_SYSCALL: - { -#ifdef _WIN32 - R[REG_RES] = _close(R[REG_A0]); -#else - R[REG_RES] = close(R[REG_A0]); -#endif - break; - } - - default: - run_error ("Unknown system call: %d\n", R[REG_V0]); - break; - } - -#ifdef _WIN32 - windowsParameterHandlingControl(1); -#endif - return (1); -} - - -void -handle_exception () -{ - if (!quiet && CP0_ExCode != ExcCode_Int) - error ("Exception occurred at PC=0x%08x\n", CP0_EPC); - - exception_occurred = 0; - PC = EXCEPTION_ADDR; - - switch (CP0_ExCode) - { - case ExcCode_Int: - break; - - case ExcCode_AdEL: - if (!quiet) - error (" Unaligned address in inst/data fetch: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_AdES: - if (!quiet) - error (" Unaligned address in store: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_IBE: - if (!quiet) - error (" Bad address in text read: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_DBE: - if (!quiet) - error (" Bad address in data/stack read: 0x%08x\n", CP0_BadVAddr); - break; - - case ExcCode_Sys: - if (!quiet) - error (" Error in syscall\n"); - break; - - case ExcCode_Bp: - exception_occurred = 0; - return; - - case ExcCode_RI: - if (!quiet) - error (" Reserved instruction execution\n"); - break; - - case ExcCode_CpU: - if (!quiet) - error (" Coprocessor unuable\n"); - break; - - case ExcCode_Ov: - if (!quiet) - error (" Arithmetic overflow\n"); - break; - - case ExcCode_Tr: - if (!quiet) - error (" Trap\n"); - break; - - case ExcCode_FPE: - if (!quiet) - error (" Floating point\n"); - break; - - default: - if (!quiet) - error ("Unknown exception: %d\n", CP0_ExCode); - break; - } -} diff --git a/spim-qtbase/CPU/syscall.h b/spim-qtbase/CPU/syscall.h deleted file mode 100755 index f8c0b46..0000000 --- a/spim-qtbase/CPU/syscall.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM syscalls, both in simulator and bare mode. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions. */ - -int do_syscall (); -void handle_exception (); - -#define PRINT_INT_SYSCALL 1 -#define PRINT_FLOAT_SYSCALL 2 -#define PRINT_DOUBLE_SYSCALL 3 -#define PRINT_STRING_SYSCALL 4 - -#define READ_INT_SYSCALL 5 -#define READ_FLOAT_SYSCALL 6 -#define READ_DOUBLE_SYSCALL 7 -#define READ_STRING_SYSCALL 8 - -#define SBRK_SYSCALL 9 - -#define EXIT_SYSCALL 10 - -#define PRINT_CHARACTER_SYSCALL 11 -#define READ_CHARACTER_SYSCALL 12 - -#define OPEN_SYSCALL 13 -#define READ_SYSCALL 14 -#define WRITE_SYSCALL 15 -#define CLOSE_SYSCALL 16 - -#define EXIT2_SYSCALL 17 - diff --git a/spim-qtbase/CPU/version.h b/spim-qtbase/CPU/version.h deleted file mode 100644 index 867d070..0000000 --- a/spim-qtbase/CPU/version.h +++ /dev/null @@ -1 +0,0 @@ -#define SPIM_VERSION "Version 9.1.23 of December 4, 2021" diff --git a/spim-qtbase/QtSpim/NewIcon.icns b/spim-qtbase/QtSpim/NewIcon.icns deleted file mode 100644 index f1d7d699e39ed305449d05df6385f244094b6159..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 96341 zcmeFZ2Ur_tx9>Y(TAm-647etC%vmEa5Xax%`|f@Bxz9ak^L=?N&Ajv1(mQLG-dVr3=Irr{*ATti-<-X+ zd>Ml1TlpXe-UBi8`|0ANOpe5aayI$oJA5y0D~F9tLma z7wvy&kt8K^GP&XKR0z!{{SmO%AFTC1b=xQXgSFRfR^gdceqm`XW^L{b>vP&1dQN>q zE@o}cwOMD{rAb*DwFt9Tba>5)ZfPB3cY`x{-=6Jzr$lB=tsI>`nj$EBTFt_mu@)9Ypyr;WUXDywi z7Ru@6eSNh$Yv}}8i!=$|YIN2{$FaL*$why@6X~oC2uXda=4Q8bVAj$fKaQ#`WCs_N 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a/spim-qtbase/QtSpim/QtSpim.pro b/spim-qtbase/QtSpim/QtSpim.pro deleted file mode 100644 index 3dc565d..0000000 --- a/spim-qtbase/QtSpim/QtSpim.pro +++ /dev/null @@ -1,256 +0,0 @@ -# SPIM S20 MIPS simulator. -# Qt interface for SPIM simulator. -# -# Copyright (c) 1990-2020, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -#------------------------------------------------- -# -# Project created by QtCreator 2010-07-11T10:46:07 -# -#------------------------------------------------- - -cache() - -QT += core widgets printsupport - -TARGET = QtSpim -TEMPLATE = app - - -YACCSOURCES = ../CPU/parser.y -LEXSOURCES = ../CPU/scanner.l - -SOURCES += main.cpp\ - spimview.cpp\ - menu.cpp\ - regwin.cpp\ - textwin.cpp\ - datawin.cpp\ - state.cpp\ - console.cpp\ - ../CPU/data.cpp\ - ../CPU/display-utils.cpp\ - ../CPU/inst.cpp\ - ../CPU/mem.cpp\ - ../CPU/run.cpp\ - ../CPU/spim-utils.cpp\ - ../CPU/string-stream.cpp\ - ../CPU/sym-tbl.cpp\ - ../CPU/syscall.cpp\ - spim_support.cpp - - -HEADERS += spimview.h\ - regtextedit.h\ - texttextedit.h\ - datatextedit.h\ - spim_settings.h\ - settablecheckbox.h\ - console.h - - -FORMS += spimview.ui\ - savelogfile.ui\ - printwindows.ui\ - runparams.ui\ - settings.ui\ - changevalue.ui \ - breakpoint.ui - - -INCLUDEPATH = ../CPU ../QtSpim - - -RESOURCES = windows_images.qrc exception.qrc - -win32:RC_FILE = qtspim.rc - - -QMAKE_YACC = bison -QMAKE_YACCFLAGS = --defines=parser_yacc.h --output=parser_yacc.cpp -QMAKE_YACCFLAGS_MANGLE = -p yy -QMAKE_YACC_HEADER = parser_yacc.h -QMAKE_YACC_SOURCE = parser_yacc.cpp - -QMAKE_LEX = flex -QMAKE_LEXFLAGS_MANGLE = -Pyy -QMAKE_LEXFLAGS = -I -8 --outfile=lex.scanner.c - - -# Help file -# -HELP_PROJ = help/qtspim.qhp -buildcompressedhelp.name = Build compressed help -buildcompressedhelp.input = HELP_PROJ -buildcompressedhelp.output = help/${QMAKE_FILE_BASE}.qch -buildcompressedhelp.commands= qhelpgenerator ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} -buildcompressedhelp.CONFIG = no_link recursive - -# qcollectiongenerator must be run in the directory containing the project file, otherwise it -# puts partial paths in the .qhc file, which make it impossible to install the help files in -# other directories. -# -HELP_COL_PROJ = help/qtspim.qhcp -buildhelpcollection.name = Build help collection -buildhelpcollection.input = HELP_COL_PROJ -buildhelpcollection.output = help/${QMAKE_FILE_BASE}.qhc -linux|macx:buildhelpcollection.commands= bash -c '\"pushd ${QMAKE_FILE_PATH}; qcollectiongenerator ${QMAKE_FILE_BASE}.qhcp; popd; $(COPY) ${QMAKE_FILE_PATH}/${QMAKE_FILE_BASE}.qhc ${QMAKE_FILE_OUT};\"' -win32:buildhelpcollection.commands= sh -c '\"pushd ${QMAKE_FILE_PATH} ; qcollectiongenerator ${QMAKE_FILE_BASE}.qhcp ; popd ; $(COPY) ${QMAKE_FILE_PATH}/${QMAKE_FILE_BASE}.qhc ${QMAKE_FILE_OUT}\"' -buildhelpcollection.CONFIG = no_link recursive - -QMAKE_EXTRA_COMPILERS += buildcompressedhelp buildhelpcollection -POST_TARGETDEPS += help/qtspim.qch help/qtspim.qhc - - -# Microsoft Visual C compiler flags -# -win32-msvc2008 { - # Compile all files as C++ - # - QMAKE_CFLAGS_DEBUG += -TP - QMAKE_CFLAGS_RELEASE += -TP - - # Disable security warnings - # - DEFINES += _CRT_SECURE_NO_WARNINGS -} -win32-msvc2010 { - # Compile all files as C++ - # - QMAKE_CFLAGS_DEBUG += -TP - QMAKE_CFLAGS_RELEASE += -TP - - # Disable security warnings - # - DEFINES += _CRT_SECURE_NO_WARNINGS -} -win32-msvc2012 { - # Compile all files as C++ - # - QMAKE_CFLAGS_DEBUG += -TP - QMAKE_CFLAGS_RELEASE += -TP - - # Disable security warnings - # - DEFINES += _CRT_SECURE_NO_WARNINGS -} - - -# gcc flags -# -win32-g++ { - # Compile all files as C++ - # Surpress gcc warning about deprecated conversion from string constant to char* - # - QMAKE_CFLAGS_DEBUG += -Wno-write-strings - QMAKE_CFLAGS_RELEASE += -Wno-write-strings - QMAKE_CXXFLAGS_DEBUG += -Wno-write-strings - QMAKE_CXXFLAGS_RELEASE += -Wno-write-strings - - # Surpress error when deleting non-existent file. - # - QMAKE_DEL_FILE = rm -f - QMAKE_MOVE = mv - QMAKE_COPY = cp -} - -linux-g++-32 { - # Compile all files as C++ - # Surpress gcc warning about deprecated conversion from string constant to char* - # - QMAKE_CFLAGS_DEBUG += -Wno-write-strings - QMAKE_CFLAGS_RELEASE += -Wno-write-strings - QMAKE_CXXFLAGS_DEBUG += -Wno-write-strings - QMAKE_CXXFLAGS_RELEASE += -Wno-write-strings - - # Libraries will be installed in standard location - QMAKE_RPATHDIR = /usr/lib/qtspim/lib - - # Surpress error when deleting non-existent file. - # - QMAKE_DEL_FILE = rm -f -} - -linux-g++ { - QMAKE_CFLAGS_DEBUG += -Wno-write-strings - QMAKE_CFLAGS_RELEASE += -Wno-write-strings - QMAKE_CXXFLAGS_DEBUG += -Wno-write-strings - QMAKE_CXXFLAGS_RELEASE += -Wno-write-strings - - # Libraries will be installed in standard location - QMAKE_RPATHDIR = /usr/lib/qtspim/lib - - # Surpress error when deleting non-existent file. - # - QMAKE_DEL_FILE = rm -f - - # This seems really stupid, but the only place that MOVE is invoked is to move parser_yacc.h on - # to itself, which fails with gnuutils, since they raises an error if you try to mv (or cp) a - # file onto itself. Pretty pointless, and no way to turn it off... - QMAKE_MOVE = touch - - # Do not add -lGL, since this requires installation of OpenCL libraries, - # which are already installed with QtCreator. - QMAKE_LIBS_OPENGL = -} - -macx-g++ { - # Compile all files as C++ - # Surpress gcc warning about deprecated conversion from string constant to char* - # - QMAKE_CFLAGS_DEBUG += -Wno-write-strings -Wno-deprecated-register - QMAKE_CFLAGS_RELEASE += -Wno-write-strings -Wno-deprecated-register - QMAKE_CXXFLAGS_DEBUG += -Wno-write-strings -Wno-deprecated-register - QMAKE_CXXFLAGS_RELEASE += -Wno-write-strings -Wno-deprecated-register - - # Surpress error when deleting non-existent file. - # - QMAKE_DEL_FILE = rm -f - QMAKE_INFO_PLIST = macinfo.plist - - ICON = NewIcon.icns -} - -macx-clang { - # Compile all files as C++ - # Surpress gcc warning about deprecated conversion from string constant to char* - # - QMAKE_CFLAGS_DEBUG += -Wno-write-strings -Wno-deprecated-register - QMAKE_CFLAGS_RELEASE += -Wno-write-strings -Wno-deprecated-register - QMAKE_CXXFLAGS_DEBUG += -Wno-write-strings -Wno-deprecated-register - QMAKE_CXXFLAGS_RELEASE += -Wno-write-strings -Wno-deprecated-register - - # Surpress error when deleting non-existent file. - # - QMAKE_DEL_FILE = rm -f - QMAKE_INFO_PLIST = macinfo.plist - - ICON = NewIcon.icns -} diff --git a/spim-qtbase/QtSpim/README b/spim-qtbase/QtSpim/README deleted file mode 100644 index 36fd24c..0000000 --- a/spim-qtbase/QtSpim/README +++ /dev/null @@ -1,56 +0,0 @@ - SPIM S20 MIPS simulator. - Qt interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - -Notes for building QtSpim on various systems. - -All: - Install the bison parser generator and flex lexer generator, either using Cygwin on Windows or native on Linux. - - -Windows: - The Open Source version of Qt Creator for Windows, which uses mingw works fine, as does - the version (which you need to build yourself) that uses Microsoft Visual Studio's C++ - compiler. - -Linux: - The version of Qt Creator that comes with Ubuntu is an old version, which has some problems with QtSpim. - Download a recent version from http://qt.nokia.com/downloads/. - -Mac: - Download the Mac Qt SDK at http://qt.nokia.com/downloads/sdk-mac-os-cpp. - - -Notes: - If you are porting to a new system, and see a large number of compiler errors in - QtCreator, changes are good that you need to change QtSpim.pro to define the compiler - flag that says "treat all files, including .c files, as C++ code. This flag is "-X C++" - for gcc and "-TP" for the Microsoft compiler. \ No newline at end of file diff --git a/spim-qtbase/QtSpim/breakpoint.ui b/spim-qtbase/QtSpim/breakpoint.ui deleted file mode 100644 index 3c8d57e..0000000 --- a/spim-qtbase/QtSpim/breakpoint.ui +++ /dev/null @@ -1,115 +0,0 @@ - - - BreakpointDialog - - - - 0 - 0 - 282 - 100 - - - - Breakpoint - - - - - 10 - 10 - 261 - 80 - - - - - - - Execution stopped at a breakpoint - - - - - - - - - Continue - - - true - - - - - - - Single Step - - - - - - - Abort - - - - - - - - - - - - continuePushButton - clicked() - BreakpointDialog - close() - - - 52 - 70 - - - 141 - 49 - - - - - singleStepPushButton - clicked() - BreakpointDialog - close() - - - 140 - 70 - - - 141 - 49 - - - - - abortPushButton - clicked() - BreakpointDialog - close() - - - 227 - 70 - - - 141 - 49 - - - - - diff --git a/spim-qtbase/QtSpim/changevalue.ui b/spim-qtbase/QtSpim/changevalue.ui deleted file mode 100644 index f8bf69b..0000000 --- a/spim-qtbase/QtSpim/changevalue.ui +++ /dev/null @@ -1,102 +0,0 @@ - - - ChangeValueDialog - - - - 0 - 0 - 239 - 160 - - - - Change Value - - - - - 10 - 10 - 221 - 141 - - - - - - - Change value to: - - - - - - - - - - - - Hexadecimal - - - - - - - Decimal - - - - - - - - - Qt::Horizontal - - - QDialogButtonBox::Cancel|QDialogButtonBox::Ok - - - - - - - - - - buttonBox - accepted() - ChangeValueDialog - accept() - - - 248 - 254 - - - 157 - 274 - - - - - buttonBox - rejected() - ChangeValueDialog - reject() - - - 316 - 260 - - - 286 - 274 - - - - - diff --git a/spim-qtbase/QtSpim/console.cpp b/spim-qtbase/QtSpim/console.cpp deleted file mode 100644 index 6edc896..0000000 --- a/spim-qtbase/QtSpim/console.cpp +++ /dev/null @@ -1,155 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spimview.h" - -Console::Console(QWidget *parent) - : QPlainTextEdit(parent) -{ - setWindowTitle("Console"); - resize(800, 600); - - setUndoRedoEnabled(false); - appendPlainText(QString("")); - - QFont courier("Courier"); - setFont(courier); -} - - -void Console::WriteOutput(QString out) -{ - activateWindow(); - moveCursor(QTextCursor::End); - insertPlainText(out); - ensureCursorVisible(); -} - - -QString Console::ReadChar() -{ - if (l->isRunning()) // Not re-enterent - { - return QString("\n"); - } - else - { - activateWindow(); - while (1) - { - if (InputAvailable()) - { - QString firstChar = inputBuffer.left(1); - inputBuffer.remove(0, 1); - return firstChar; - } - // This is a bit tricky and I hope it works on all platforms. If there aren't any - // characters in the buffer, start a new event loop to wait for keystrokes and block on - // it. Cannot use semaphores or busy-wait since both actions are on the same thread. - // - l->exec(); - } - } -} - - -bool Console::InputAvailable() -{ - return inputBuffer.length() > 0; -} - - -void Console::Clear() -{ - setPlainText(""); - inputBuffer = QString(""); - l = new QEventLoop(); -} - - -void Console::keyPressEvent(QKeyEvent* /*e*/) -{ - // Ignore -} - -void Console::keyReleaseEvent(QKeyEvent* e) -{ - QString key = e->text(); - - if (key != "") - { - inputBuffer.append(key); - if (!mapped_io) - { - WriteOutput(key); // Do not echo input when using mem mapped IO - } - - // Release the call on ReadChar (if any) that is blocked waiting for input. - // - l->exit(); - } -} - -void Console::mouseMoveEvent(QMouseEvent* /*e*/) -{ - // Ignore -} - -void Console::mousePressEvent(QMouseEvent* /*e*/) -{ - // Ignore -} - - -void Console::closeEvent(QCloseEvent* event) -{ - Window->ui->action_Win_Console->setChecked(false); - event->accept(); -} - - -void Console::hideEvent(QHideEvent* event) -{ - Window->ui->action_Win_Console->setChecked(false); - event->accept(); -} - - -void Console::showEvent(QShowEvent* event) -{ - if (Window != NULL) - { - Window->ui->action_Win_Console->setChecked(true); - } - event->accept(); -} diff --git a/spim-qtbase/QtSpim/console.h b/spim-qtbase/QtSpim/console.h deleted file mode 100644 index ff8a80f..0000000 --- a/spim-qtbase/QtSpim/console.h +++ /dev/null @@ -1,64 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include -#include -#include - -class Console : public QPlainTextEdit -{ -Q_OBJECT - -public: - Console(QWidget* parent); - - virtual void keyPressEvent(QKeyEvent* e); - virtual void keyReleaseEvent(QKeyEvent* e); - virtual void mouseMoveEvent(QMouseEvent* e); - virtual void mousePressEvent(QMouseEvent* e); - - void Clear(); - bool InputAvailable(); - QString ReadChar(); - void WriteOutput(QString out); - -protected: - virtual void closeEvent(QCloseEvent* event); - virtual void hideEvent(QHideEvent* event); - virtual void showEvent(QShowEvent* event); - -private: - QString inputBuffer; - QEventLoop* l; -}; diff --git a/spim-qtbase/QtSpim/datatextedit.h b/spim-qtbase/QtSpim/datatextedit.h deleted file mode 100644 index 4d51eba..0000000 --- a/spim-qtbase/QtSpim/datatextedit.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include - -class dataTextEdit : public QPlainTextEdit -{ - Q_OBJECT - -public: - dataTextEdit(); - void contextMenuEvent(QContextMenuEvent* event); - QAction* action_Context_ChangeValue; - -protected: - virtual void closeEvent(QCloseEvent* event); - virtual void hideEvent(QHideEvent* event); - virtual void showEvent(QShowEvent* event); - -private: - QPoint contextGlobalPos; - -public slots: - void changeValue(); - int addrFromPos(QTextCursor* cursor); -}; diff --git a/spim-qtbase/QtSpim/datawin.cpp b/spim-qtbase/QtSpim/datawin.cpp deleted file mode 100644 index be84bbd..0000000 --- a/spim-qtbase/QtSpim/datawin.cpp +++ /dev/null @@ -1,415 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spimview.h" -#include "ui_spimview.h" - -#include -#include -#include -#include -#define QT_USE_FAST_CONCATENATION -#include -#include - - -#define WORD_WIDTH_10 10 -#define WORD_WIDTH_16 8 -#define WORD_WIDTH_DEFAULT 32 - - -// -// Data segment window -// - -void SpimView::DisplayDataSegments(bool force) -{ - if (force || data_modified) - { - dataTextEdit* te = ui->DataSegDockWidget->findChild("DataSegmentTextEdit"); - QString windowContents = windowFormattingStart(st_textWinFont, st_textWinFontColor, st_textWinBackgroundColor); - int scrollPosition = te->verticalScrollBar()->value(); - - windowContents += formatUserDataSeg() % formatUserStack() % formatKernelDataSeg() % windowFormattingEnd(); - - te->clear(); - te->appendHtml(windowContents); - - te->verticalScrollBar()->setSliderPosition(scrollPosition); - } - data_modified = false; -} - - -QString SpimView::formatUserDataSeg() -{ - if (st_showUserDataSegment) - { - return formatSegLabel("User data segment", DATA_BOT, data_top) - % formatMemoryContents(DATA_BOT, data_top); - } - else - { - return QString(""); - } -} - - -QString SpimView::formatUserStack() -{ - if (st_showUserStackSegment) - { - return formatSegLabel("
User Stack", ROUND_DOWN(R[29], BYTES_PER_WORD), STACK_TOP) - % formatMemoryContents(ROUND_DOWN(R[29], BYTES_PER_WORD), STACK_TOP); - } - else - { - return QString(""); - } -} - - -QString SpimView::formatKernelDataSeg() -{ - if (st_showKernelDataSegment) - { - return formatSegLabel("
Kernel data segment", K_DATA_BOT, k_data_top) - % formatMemoryContents(K_DATA_BOT, k_data_top); - } - else - { - return QString(""); - } -} - - -#define BYTES_PER_LINE (4*BYTES_PER_WORD) - - -QString SpimView::formatMemoryContents(mem_addr from, mem_addr to) -{ - mem_addr i = ROUND_UP(from, BYTES_PER_WORD); - QString windowContents = formatPartialQuadWord(i, to); - i = ROUND_UP(i, BYTES_PER_LINE); // Next quadword - - for ( ; i < to; ) - { - mem_word val; - - /* Count consecutive zero words */ - int j; - for (j = 0; (i + (uint32) j * BYTES_PER_WORD) < to; j += 1) - { - val = read_mem_word(i + (uint32) j * BYTES_PER_WORD); - if (val != 0) - { - break; - } - } - - if (j >= 4) - { - /* Block of 4 or more zero memory words: */ - windowContents += QString("[") % formatAddress(i) - % QString("]..[") % formatAddress(i + (uint32) j * BYTES_PER_WORD - 1) - % QString("]") % nnbsp(2) % QString("00000000
"); - - i = i + (uint32) j * BYTES_PER_WORD; - windowContents += formatPartialQuadWord(i, to); - i = ROUND_UP(i, BYTES_PER_LINE); // Next quadword - } - else - { - /* Fewer than 4 zero words, print them on a single line: */ - windowContents += QString("[") % formatAddress(i) % "]" % nnbsp(2); - mem_addr j = i; - do - { - val = read_mem_word(i); - windowContents += nnbsp(2) % formatWord(val, st_dataSegmentDisplayBase); - i += BYTES_PER_WORD; - } - while ((i % BYTES_PER_LINE) != 0 && i < to); - - windowContents += nnbsp(2) % formatAsChars(j, i) % QString("
"); - } - } - return windowContents; -} - - -QString SpimView::formatPartialQuadWord(mem_addr from, mem_addr to) -{ - QString windowContents = QString(""); - - if ((from % BYTES_PER_LINE) != 0 && from < to) - { - windowContents += QString("[") % formatAddress(from) % QString("]") % nnbsp(2); - - mem_addr a; - for (a = from; (a % BYTES_PER_LINE) != 0 && from < to; a += BYTES_PER_WORD) - { - mem_word val = read_mem_word(a); - windowContents += nnbsp(2) % formatWord(val, st_dataSegmentDisplayBase); - } - - windowContents += formatAsChars(from, a) % QString("
"); - } - - return windowContents; -} - - -QString SpimView::formatAsChars(mem_addr from, mem_addr to) -{ - QString windowContents = nnbsp(2); - - if (to - from != BYTES_PER_LINE) - { - int missing = (BYTES_PER_LINE - (to - from)) / BYTES_PER_WORD; - windowContents += nnbsp(2); - switch (st_dataSegmentDisplayBase) - { - case 10: windowContents += nnbsp(missing * (WORD_WIDTH_10 + 2)); break; - case 16: windowContents += nnbsp(missing * (WORD_WIDTH_16 + 2)); break; - default: windowContents += nnbsp(missing * (WORD_WIDTH_DEFAULT + 2)); break; - } - } - - for (mem_addr a = from; a < to; a += 1) - { - mem_word val = read_mem_byte(a); - windowContents += formatChar(val) % " "; - } - - return windowContents; -} - - -// -// Utility functions -// - -QString formatAddress(mem_addr addr) -{ - return QString::number(addr, 16).rightJustified(8, '0'); -} - - -QString formatWord(mem_word word, int base) -{ - int width = 0; - switch (base) - { - case 10: width = WORD_WIDTH_10; break; - case 16: width = WORD_WIDTH_16; break; - default: width = WORD_WIDTH_DEFAULT; break; - } - QString str = QString::number(word, base); - str.remove(0, str.length() - width); // Negative hex number proceeded by 0xffffffff - - if (str[0] == '-') // decimal starting with a negative sign - return str.rightJustified(width, ' ').replace(QRegExp(" "), " "); // Don't zero pad - else - return str.rightJustified(width, '0'); -} - - -QString formatChar(int chr) -{ - if (chr == ' ') - { - return QString(" "); - } - else if (chr == '<') - { - return QString("<"); - } - else if (chr == '>') - { - return QString(">"); - } - else if (chr == '&') - { - return QString("&"); - } - else if (chr > ' ' && chr <= '~') // Printable ascii chars - { - return QString(QChar(chr)); - } - else - { - return QString(QChar('.')); - } -} - - -QString formatSegLabel(QString segName, mem_addr low, mem_addr high) -{ - return QString("
") % segName - % QString(" [") % formatAddress(low) % QString("]..[") % formatAddress(high) - % QString("]
"); -} - - -// -// Change memory value -// - -dataTextEdit::dataTextEdit() -{ - action_Context_ChangeValue = new QAction(this); - action_Context_ChangeValue->setObjectName("action_ChangeValue"); - action_Context_ChangeValue->setText("Change Memory Contents"); -} - - -void dataTextEdit::contextMenuEvent(QContextMenuEvent* event) -{ - QMenu *menu = createStandardContextMenu(); - menu->addSeparator(); - - menu->addAction(Window->ui->action_Data_DisplayBinary); - menu->addAction(Window->ui->action_Data_DisplayDecimal); - menu->addAction(Window->ui->action_Data_DisplayHex); - - menu->addSeparator(); - menu->addAction(action_Context_ChangeValue); - contextGlobalPos = event->globalPos(); - - menu->exec(event->globalPos()); -} - - -void dataTextEdit::changeValue() -{ - QTextCursor cursor; - mem_addr addr = addrFromPos(&cursor); - if (addr != 0) - { - int base = Window->DataDisplayBase(); - QString val = promptForNewValue("New value for " + formatAddress(addr), &base); - - bool ok; - int newMemVal = 0; - if (base == 10) { - newMemVal = val.toLong(&ok, base); // decimal is signed - } else - { - newMemVal = val.toULong(&ok, base); // hex is unsigned - } - - if (ok) - { - set_mem_word(addr, newMemVal); - } else - { - QMessageBox msgBox; - msgBox.setText(QString("Bad ") + (base == 16 ? "hex" : "decimal") + " memory value: " + val); - msgBox.exec(); - } - - Window->DisplayDataSegments(true); - } -} - - -int dataTextEdit::addrFromPos(QTextCursor* cursor) -{ - // Position of context menu is location user right-click. Find the line at this point - // and compute the address of the memory location the user clicked on. - // - QPoint mouseViewportPos = this->viewport()->mapFromGlobal(contextGlobalPos); - QTextCursor mouseCursor = this->cursorForPosition(mouseViewportPos); - *cursor = mouseCursor; - - cursor->select(QTextCursor::LineUnderCursor); - QString line = cursor->selectedText(); - - QRegExp rx("\\[([0-9a-fA-F]{8})\\]"); // Address of instruction - - rx.indexIn(line); - QString addrStr = rx.cap(1); - if (addrStr != "") - { - bool ok; - mem_addr addr = addrStr.toUInt(&ok, 16); - if (ok) - { - // [...]#### - // - int offset = mouseCursor.position() - cursor->anchor(); // Start of line to mouse location - line.truncate(offset); // Remove address - line.remove(0, 14); // Remove line after mouse position - - QRegExp rx2("^([0-9a-fA-F]+\\s*)?([0-9a-fA-F]+\\s*)?([0-9a-fA-F]+\\s*)?([0-9a-fA-F]+\\s*)?"); - rx2.indexIn(line, 0); - return addr - + (rx2.cap(1) == "" ? 0 : 0) - + (rx2.cap(2) == "" ? 0 : BYTES_PER_WORD) - + (rx2.cap(3) == "" ? 0 : BYTES_PER_WORD) - + (rx2.cap(4) == "" ? 0 : BYTES_PER_WORD); - } - } - return 0; -} - - -void dataTextEdit::closeEvent(QCloseEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - Window->ui->action_Win_DataSegment->setChecked(false); - } - event->accept(); -} - - -void dataTextEdit::hideEvent(QHideEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - Window->ui->action_Win_DataSegment->setChecked(false); - } - event->accept(); -} - - -void dataTextEdit::showEvent(QShowEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - Window->ui->action_Win_DataSegment->setChecked(true); - } - event->accept(); -} diff --git a/spim-qtbase/QtSpim/exception.qrc b/spim-qtbase/QtSpim/exception.qrc deleted file mode 100644 index 8400c1b..0000000 --- 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and the SPIM Simulator - - - - - - - - - - -

Appendix A from Patterson and Hennessey, Computer Organization - and Design: The Hardware/Software Interface, Third Edition. Copyright Morgan - Kaufmann Publishers. Used by permission.

- -
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machine language Binary representation - used for communication within a computer system.

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assembler A program that translates a - symbolic version of an instruction into the binary version.

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macro A pattern-matching and replacement - facility that provides a simple mechanism to name a frequently used sequence - of instructions.

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unresolved reference A reference that - requires more information from an outside source in order to be complete. -

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linker Also called link editor. A systems - program that combines independently assembled machine language programs and - resolves all undefined labels into an executable file.

-
-
-

Assembly language is the symbolic representation of a computer’s binary - encoding— machine language. Assembly language - is more readable than machine language because it uses symbols instead of bits. - The symbols in assembly language name commonly occurring bit patterns, such - as opcodes and register specifiers, so people can read and remember them. In - addition, assembly language permits programmers to use labels to identify - and name particular memory words that hold instructions or data.

-

Figure 1.1 The process that produces - an executable file. An assembler translates a file of assembly language into - an object file, which is linked with other files and libraries into an executable - file.

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A tool called an assembler translates assembly language - into binary instructions. Assemblers provide a friendlier representation than a - computer’s 0s and 1s that simplifies writing and reading programs. Symbolic names for - operations and locations are one facet of this representation. Another facet is - programming facilities that increase a program’s clarity. For - example, macros, discussed earlier, enable a programmer to - extend the assembly language by defining new operations.

-

An assembler reads a single assembly language source file and produces - an object file containing machine instructions and bookkeeping information - that helps combine several object files into a program. Figure 1.1 illustrates - how a program is built. Most programs consist of several files—also called - modules — that are written, compiled, and assembled independently. A program - may also use prewritten routines supplied in a program library . A module - typically contains references to subroutines and data defined in other - modules and in libraries. The code in a module cannot be executed when it contains - unresolved references to labels in other - object files or libraries. Another tool, called a linker, - combines a collection of object and library files into an executable - file, which a computer can run.

-

To see the advantage of assembly language, consider the following sequence - of figures, all of which contain a short subroutine that computes and prints - the sum of the squares of integers from 0 to 100. Figure 1.2 shows the machine - language that a MIPS computer executes. With considerable effort, you could - use the opcode and instruction format tables in Chapter 2 to translate the instructions - into a symbolic program similar to Figure 1.3. This form of the routine is - much easier to read because operations and operands are written with symbols, - rather than with bit patterns. However, this assembly language is still difficult - to follow because memory locations are named by their address, rather than by - a symbolic label.

- 
-       00100111101111011111111111100000 10101111101111110000000000010100 10101111101001000000000000100000
-       10101111101001010000000000100100 10101111101000000000000000011000 10101111101000000000000000011100
-       10001111101011100000000000011100 10001111101110000000000000011000 00000001110011100000000000011001
-       00100101110010000000000000000001 00101001000000010000000001100101 10101111101010000000000000011100
-       00000000000000000111100000010010 00000011000011111100100000100001 00010100001000001111111111110111
-       10101111101110010000000000011000 00111100000001000001000000000000 10001111101001010000000000011000
-       00001100000100000000000011101100 00100100100001000000010000110000 10001111101111110000000000010100
-       00100111101111010000000000100000 00000011111000000000000000001000 00000000000000000001000000100001
-
-

Figure 1.2 MIPS machine language code for a routine to compute and print - the sum of the squares of integers between 0 and 100.

-

Figure 1.4 shows assembly language that labels memory addresses with mnemonic - names. Most programmers prefer to read and write this form. Names that begin - with a period, for example .data and .globl, are assembler - directives that tell the assembler how to translate a program but - do not produce machine instructions. Names followed by a colon, such as str - or main, are labels that name the next memory location. This program is as readable - as most assembly language programs (except for a glaring lack of comments), - but it is still difficult to follow because many simple operations are required - to accomplish simple tasks and because assembly language’s lack of control flow - constructs provides few hints about the program’s operation.

-

By contrast, the C routine in Figure 1.5 is both shorter and clearer since - variables have mnemonic names and the loop is explicit rather than constructed - with branches. In fact, the C routine is the only one that we wrote. The other - forms of the program were produced by a C compiler and assembler.

-

In general, assembly language plays two roles (see Figure 1.6). The first - role is the output language of compilers. A compiler translates a program - written in a high-level language (such as C or Pascal) into an equivalent - program in machine or assembly language. The high-level language is called the - source language, and the compiler’s - output is its target language.

-
-
-

assembler directive An operation that - tells the assembler how to translate a program but does not produce machine - instructions; always begins with a period.

-
-
- 
-        addiu $29, $29, -32
-        sw $31, 20($29)
-        sw $4, 32($29)
-        sw $5, 36($29)
-        sw $0, 24($29)
-        sw $0, 28($29)
-        lw $14, 28($29)
-        lw $24, 24($29)
-        multu $14, $14
-        addiu $8, $14, 1
-        slti $1, $8, 101
-        sw $8, 28($29)
-        mflo $15
-        addu $25, $24, $15
-        bne $1, $0, -9
-        sw $25, 24($29)
-        lui $4, 4096
-        lw $5, 24($29)
-        jal 1048812
-        addiu $4, $4, 1072
-        lw $31, 20($29)
-        addiu $29, $29, 32
-        jr $31
-        move $2, $0
-
-
-
-

source language The high-level language - in which a program is originally written.

-
-
-

Figure 1.3 The same routine written in assembly language. However, - the code for the routine does not label registers or memory locations nor include - comments.

-

Assembly language’s other role is as a language in which to write programs. - This role used to be the dominant one. Today, however, because of larger main - memories and better compilers, most programmers write in a high-level language - and rarely, if ever, see the instructions that a computer executes. Nevertheless, - assembly language is still important to write programs in which speed or size - are critical or to exploit hardware features that have no analogues in high-level - languages.

-

Although this appendix focuses on MIPS assembly language, assembly programming - on most other machines is very similar. The additional instructions and address - modes in CISC machines, such as the VAX, can make assembly programs shorter - but do not change the process of assembling a program or provide assembly language - with the advantages of high-level languages such as type-checking and structured - control flow.

- 
-        .text
-        .align 2
-        .globl main
-main:
-        subu $sp, $sp, 32
-        sw $ra, 20($sp)
-        sd $a0, 32($sp)
-        sw $0, 24($sp)
-        sw $0, 28($sp)
-loop:
-        lw $t6, 28($sp)
-        mul $t7, $t6, $t6
-        lw $t8, 24($sp)
-        addu $t9, $t8, $t7
-        sw $t9, 24($sp)
-        addu $t0, $t6, 1
-        sw $t0, 28($sp)
-        ble $t0, 100, loop
-        la $a0, str
-        lw $a1, 24($sp)
-        jal printf
-        move $v0, $0
-        lw $ra, 20($sp)
-        addu $sp, $sp, 32
-        jr $ra
-        .data
-        .align 0
-str:
-        .asciiz "The sum from 0 .. 100 is %d\n"
-
-

Figure 1.4 The same routine written in assembly language with labels, but no - comments. The commands that start with periods are assembler - directives. .text indicates that succeeding lines contain instructions. .data - indicates that they contain data. .align n indicates that the items on the succeeding - lines should be aligned on a 2 n byte boundary. Hence, .align 2 means - the next item should be on a word boundary. .globl main declares that main is a global - symbol that should be visible to code stored in other files. Finally, .asciiz stores a - null-terminated string in memory. -

-

When to Use Assembly Language

-

The primary reason to program in assembly language, as opposed to an available - high-level language, is that the speed or size of a program is critically important. - For example, consider a computer that controls a piece of machinery, such as - a car’s brakes. A computer that is incorporated in another device, such as a - car, is called an embedded computer. This type of computer needs to respond - rapidly and predictably to events in the outside world. Because a compiler introduces - uncertainty about the time cost of operations, programmers may find it difficult - to ensure that a high-level language program responds within a definite time - inter-val—say, 1 millisecond after a sensor detects that a tire is skidding. - An assembly language programmer, on the other hand, has tight control over which - instructions execute. In addition, in embedded applications, reducing a program’s - size, so that it fits in fewer memory chips, reduces the cost of the embedded - computer.

- 
-        #include<stdio.h>
-        int
-        main (int argc, char *argv[])
-        {
-          int i; int sum = 0;
-          for (i = 0; i <= 100; i = i + 1) sum = sum + i * i;
-          printf ("The sum from 0 .. 100 is %d\n", sum);
-        }
-
-

Figure 1.5 The routine written in the C programming language.

-

Figure 1.6 Assembly language - either is written by a programmer or is the output of a compiler.

-

A hybrid approach, in which most of a program is written in a high-level language and - time-critical sections are written in assembly language, builds on the strengths of both - languages. Programs typically spend most of their time executing a small fraction of the - program’s source code. This observation is just the principle of locality that - underlies caches.

-

Program profiling measures where a program spends its time and can find the - time-critical parts of a program. In many cases, this portion of the program - can be made faster with better data structures or algorithms. Sometimes, however, - significant performance improvements only come from recoding a critical portion - of a program in assembly language.

-

This improvement is not necessarily an indication that the high-level language’s - compiler has failed. Compilers typically are better than programmers at producing - uniformly high-quality machine code across an entire program. Programmers, however, - understand a program’s algorithms and behavior at a deeper level than a compiler - and can expend considerable effort and ingenuity improving small sections of - the program. In particular, programmers often consider several procedures simultaneously - while writing their code. Compilers typically compile each procedure in isolation - and must follow strict conventions governing the use of registers at procedure - boundaries. By retaining commonly used values in registers, even across procedure - boundaries, programmers can make a program run faster.

-

Another major advantage of assembly language is the ability to exploit specialized - instructions, for example, string copy or pattern-matching instructions. Compilers, - in most cases, cannot determine that a program loop can be replaced by a single - instruction. However, the programmer who wrote the loop can replace it easily - with a single instruction.

-

Currently, a programmer’s advantage over a compiler has become difficult - to maintain as compilation techniques improve and machines’ pipelines increase - in complexity (Chapter 6).

-

The final reason to use assembly language is that no high-level language - is available on a particular computer. Many older or specialized computers do - not have a compiler, so a programmer’s only alternative is assembly language. -

-

Drawbacks of Assembly Language

-

Assembly language has many disadvantages that strongly argue against its - widespread use. Perhaps its major disadvantage is that programs written in assembly - language are inherently machine-specific and must be totally rewritten to run - on another computer architecture. The rapid evolution of computers discussed - in Chapter 1 means that architectures become obsolete. An assembly language - program remains tightly bound to its original architecture, even after the computer - is eclipsed by new, faster, and more cost-effective machines.

-

Another disadvantage is that assembly language programs are longer than the - equivalent programs written in a high-level language. For example, the C program - in Figure 1.5 is 11 lines long, while the assembly program in Figure 1.4 - is 31 lines long. In more complex programs, the ratio of assembly to high-level - language (its expansion factor ) can be much larger than the factor of - three in this example. Unfortunately, empirical studies have shown that programmers - write roughly the same number of lines of code per day in assembly as in high-level - languages. This means that programmers are roughly x times more productive - in a high-level language, where x is the assembly language expansion factor. -

-
-
-

external label Also called global label. - A label referring to an object that can be referenced from files other than - the one in which it is defined.

-

local label A label referring to an object - that can be used only within the file in which it is defined.

-
-
-

To compound the problem, longer programs are more difficult to read and understand - and they contain more bugs. Assembly language exacerbates the problem because - of its complete lack of structure. Common programming idioms, such as if-then - statements and loops, must be built from branches and jumps. The resulting - programs are hard to read because the reader must reconstruct every higher-level - construct from its pieces and each instance of a statement may be slightly different. - For example, look at Figure 1.4 and answer these questions: What type of loop - is used? What are its lower and upper bounds?

-
-
-

Elaboration:

-

Compilers can produce machine language directly instead of relying on an - assembler. These compilers typically execute much faster than those that invoke an - assembler as part of compilation. However, a compiler that generates machine language - must perform many tasks that an assembler normally handles, such as resolving addresses - and encoding instructions as binary numbers. The trade-off is between compilation speed - and compiler simplicity.

-

Elaboration:

-

Despite these considerations, some embedded applications are written in a high-level - language. Many of these applications are large and complex programs that must be - extremely reliable. Assembly language programs are longer and more difficult to write - and read than high-level language programs. This greatly increases the cost of writing - an assembly language program and makes it extremely difficult to verify the correctness - of this type of program. In fact, these considerations led the Department of Defense, - which pays for many complex embedded systems, to develop Ada, a new high-level language - for writing embedded systems.

-
-
-

Assemblers

-

An assembler translates a file of assembly language statements into a file - of binary machine instructions and binary data. The translation process has - two major parts. The first step is to find memory locations with labels so the - relationship between symbolic names and addresses is known when instructions - are translated. The second step is to translate each assembly statement by combining - the numeric equivalents of opcodes, register specifiers, and labels into a legal - instruction. As shown in Figure 1.1, the assembler produces an output file, - called an object file, which contains the machine instructions, data, - and bookkeeping information.

-

An object file typically cannot be executed because it references procedures - or data in other files. A label is - external (also called - global) if the labeled object can be referenced from files - other than the one in which it is defined. A label is local if the object can be - used only within the file in which it is defined. In most assemblers, labels are local - by default and must be explicitly declared global. Subroutines and global variables - require external labels since they are referenced from many files in a - program.Local labels hide names that should not be visible to - other modules—for example, static functions in C, which can only be called by other - functions in the same file. In addition, compiler-generated names—for example, a name - for the instruction at the beginning of a loop—are local so the compiler need not - produce unique names in every file.

-

Local and Global Labels

-

Consider the program in Figure 1.4. The subroutine has an external (global) label - main. It also contains two local labels—loop and str—that are only visible with - this assembly language file. Finally, the routine also contains an unresolved reference - to an external label printf, which is the library routine that prints values. Which - labels in Figure 1.4 could be referenced from another file?

-

Only global labels are visible outside of a file, so the only label that - could be referenced from another file is main.

-

Since the assembler processes each file in a program individually and in - isolation, it only knows the addresses of local labels. The assembler depends - on another tool, the linker, to combine a collection of object files and libraries - into an executable file by resolving external labels. The assembler assists - the linker by providing lists of labels and unresolved references.

-

However, even local labels present an interesting challenge to an assembler. - Unlike names in most high-level languages, assembly labels may be used before - they are defined. In the example, in Figure 1.4, the label str is used by - the la instruction before it is defined. The possibility of a - forward reference, like this forces an - assembler to translate a program in two steps: first find all labels is used - before it is defined. and then produce instructions. In the example, when the - assembler sees the la instruction, it does not know where the word labeled str - is located or even whether str labels an instruction or datum.

-
-
-

forward reference A label that is used - before it is defined.

-

symbol table A table that matches names - of labels to the addresses of the memory words that instructions occupy.

-
-
-

An assembler’s first pass reads each line of an assembly file and breaks - it into its component pieces. These pieces, which are called lexemes, - are individual words, numbers, and punctuation characters. For example, the - line

- 
-        ble $t0, 100, loop
-
-

contains six lexemes: the opcode ble, the register specifier $t0, a comma, - the number 100, a comma, and the symbol loop.

-

If a line begins with a label, the assembler records in its - symbol table the name of the label and the - address of the memory word that the instruction occupies. The assembler then - calculates how many words of memory the instruction on the current line will - occupy. By keeping track of the instructions’ sizes, the assembler can determine - where the next instruction goes. To compute the size of a variable-length instruction, - like those on the VAX, an assembler has to examine it in detail. Fixed-length - instructions, like those on MIPS, on the other hand, require only a cursory - examination. The assembler performs a similar calculation to compute the space - required for data statements. When the assembler reaches the end of an assembly - file, the symbol table records the location of each label defined in the file. -

-

The assembler uses the information in the symbol table during a second pass over the - file, which actually produces machine code. The assembler again examines each line in - the file. If the line contains an instruction, the assembler combines the binary - representations of its opcode and operands (register specifiers or memory address) into - a legal instruction. Instructions and data words that reference an external symbol - defined in another file cannot be completely assembled (they are unresolved) since the - symbol’s address is not in the symbol table. An assembler does not complain about - unresolved references since the corresponding label is likely to be defined in another - file

-

Assembly language is a programming language. Its principal difference from - high-level languages such as BASIC, Java, and C is that assembly language provides - only a few, simple types of data and control flow. Assembly language programs - do not specify the type of value held in a variable. Instead, a programmer must - apply the appropriate operations (e.g., integer or floating-point addition) - to a value. In addition, in assembly language, programs must implement all control - flow with go to s. Both factors make assembly language programming for - any machine—MIPS or 80x86—more difficult and error-prone than writing in a high-level - language.

-
-
-

Elaboration:

-

If an assembler’s speed is important, this two-step process can be done in one - pass over the assembly file with a technique known as back - patching. In its pass over the file, the assembler builds a (possibly incomplete) - binary representation of every instruction. If the instruction references a label that - has not yet been defined, the assembler records the label and instruction in a - table. When a label is defined, the assembler consults this table to find all - instructions that contain a forward reference to the label. The assembler goes back and - corrects their binary representation to incorporate the address of the - label. Backpatching speeds assembly because the assembler only reads its input - once. However, it requires an assembler to hold the entire binary representation of a - program in memory so instructions can be backpatched. This requirement can limit the - size of programs that can be assembled. The process is complicated by machines with - several types of branches that span different ranges of instructions. When the assembler - first sees an unresolved label in a branch instruction, it must either use the largest - possible branch or risk having to go back and readjust many instructions to make room - for a larger branch. -

-
-
-

Object File Format

-

Assemblers produce object files. An object file on UNIX contains six distinct - sections (see Figure 2.1):

-
    -
  • The object file header describes the size and position of the - other pieces of the file.
    • -
  • The text segment contains the machine - language code for routines in the source file. These routines may be unexecutable - because of unresolved references.
    • -
  • The data segment contains a binary - representation of the data in the source file. The data also may be incomplete - because of unresolved references to labels in other files.
    • -
  • The relocation information identifies - instructions and data words that depend on absolute - addresses. These references must change if portions of the program - are moved in memory.
    • -
  • The symbol table associates addresses with external labels in - the source file and lists unresolved references.
    • -
  • The debugging information contains a concise description of the - way in which the program was compiled, so a debugger can find which instruction - addresses correspond to lines in a source file and print the data structures - in readable form.
    • -
-

The assembler produces an object file that contains a binary representation of the - program and data and additional information to help link pieces of a program. This - relocation information is necessary because the assembler does not know which memory - locations a procedure or piece of data will occupy after it is linked with the rest of - the program. Procedures and data from a file are stored in a contiguous piece of memory, - but the assembler does not know where this memory will be located. The assembler also - passes some symbol table entries to the linker. In particular, the assembler must record - which external symbols are defined in a file and what unresolved references occur in a - file.

-
-
-

backpatching A method for translating - from assembly language to machine instructions in which the assembler builds - a (possibly incomplete) binary representation of every instruction in one pass - over a program and then returns to fill in previously undefined labels.

-

text segment The segment of a UNIX object - file that contains the machine language code for routines in the source file. -

-

data segment The segment of a UNIX object - or executable file that contains a binary representation of the initialized - data used by the program.

-

relocation information The segment of - a UNIX object file that identifies instructions and data words that depend on - absolute addresses.

-

absolute address A variable’s or routine’s - actual address in memory.

-
-
-

Figure 2.1 Object file. A UNIX - assembler produces an object file with six distinct sections.

-
-
-

Elaboration:

-

For convenience, assemblers assume each file starts at the same address (for example, - location 0) with the expectation that the linker will relocate the code and data - when they are assigned locations in memory. The assembler produces relocation - information, which contains an entry describing each instruction or data word in the - file that references an absolute address. On MIPS, only the subroutine call, - load, and store instructions reference absolute addresses. Instructions that - use PC-relative addressing, such as branches, need not be relocated.

-
-
-

Additional Facilities

-

Assemblers provide a variety of convenience features that help make assembler - programs short and easier to write, but do not fundamentally change assembly - language. For example, data layout directives allow a programmer to describe - data in a more concise and natural manner than its binary representation. -

-

In Figure 1.4, the directive

- 
-        .asciiz “The sum from 0 .. 100 is %d\n”
-
-

stores characters from the string in memory. Contrast this line with the - alternative of writing each character as its ASCII value (Figure 2.21 in Chapter - 2 describes the ASCII encoding for characters):

- 
-        .byte 84, 104, 101, 32, 115, 117, 109, 32
-        .byte 102, 114, 111, 109, 32, 48, 32, 46
-        .byte 46, 32, 49, 48, 48, 32, 105, 115
-        .byte 32, 37, 100, 10, 0
-
-

The .asciiz directive is easier to read because it represents characters as letters, - not binary numbers. An assembler can translate characters to their binary representation - much faster and more accurately than a human. Data layout - directives specify data in a human-readable form that the assembler translates to - binary.

-

String Directive

-

Define the sequence of bytes produced by this directive:

- 
-        .asciiz “The quick brown fox jumps over the lazy dog”
-
-        .byte 84, 104, 101, 32, 113, 117, 105, 99 .byte 107, 32, 98, 114, 111, 119,
-        110, 32 .byte 102, 111, 120, 32, 106, 117, 109, 112 .byte 115, 32, 111, 118,
-        101, 114, 32, 116 .byte 104, 101, 32, 108, 97, 122, 121, 32 .byte 100, 111,
-        103, 0
-
-

Macros are a pattern-matching and replacement facility that provide - a simple mechanism to name a frequently used sequence of instructions. Instead - of repeatedly typing the same instructions every time they are used, a programmer - invokes the macro and the assembler replaces the macro call with the corresponding - sequence of instructions. Macros, like subroutines, permit a programmer to create - and name a new abstraction for a common operation. Unlike subroutines, however, - macros do not cause a subroutine call and return when the program runs since - a macro call is replaced by the macro’s body when the program is assembled. - After this replacement, the resulting assembly is indistinguishable from the - equivalent program written without macros.

-

Macros

-

As an example, suppose that a programmer needs to print many numbers. The - library routine printf accepts a format string and one or more values to print - as its arguments. A programmer could print the integer in register $7 with the - following instructions:

- 
-        .data
-int_str: .asciiz“%d”
-        .text
-        la $a0, int_str         # Load string address into first arg
-        mov $a1, $7             # Load value into second arg
-        jal printf              # Call the printf routine
-
-
-
-

formal parameter A variable that is the - argument to a procedure or macro; replaced by that argument once the macro is - expanded.

-
-
-

The .data directive tells the assembler to store the string in the program’s - data segment, and the .text directive tells the assembler to store the instructions - in its text segment.

-

However, printing many numbers in this fashion is tedious and produces a - verbose program that is difficult to understand. An alternative is to introduce - a macro, print_int, to print an integer:

- 
-        int_str:.asciiz “%d”
-        .text
-        .macro print_int($arg)
-        la $a0, int_str         # Load string address into first arg
-        mov $a1, $arg           # Load macro’s parameter ($arg) into second arg
-        jal printf              # Call the printf routine
-        .end_macro
-
-        print_int($7)
-
-

The macro has a formal parameter, $arg, - that names the argument to the macro. When the macro is expanded, the argument - from a call is substituted for the formal parameter throughout the macro’s body. - Then the assembler replaces the call with the macro’s newly expanded body. In - the first call on print_int, the argument is $7, so the macro expands to the - code

- 
-        la $a0, int_str
-        mov $a1, $7
-        jal printf
-
-

In a second call on print_int, say, print_int($t0), the argument is $t0, - so the macro expands to

- 
-        la $a0, int_str
-        mov $a1, $t0
-        jal printf
-
-

What does the call print_int($a0) expand to?

- 
-        la $a0, int_str
-        mov $a1, $a0
-        jal printf
-
-

This example illustrates a drawback of macros. A programmer who uses this - macro must be aware that print_int uses register $a0 and so cannot correctly - print the value in that register.

- Hardware-Software Interface: -

Some assemblers also implement pseudoinstructions, which are instructions - provided by an assembler but not implemented in hardware. Chapter 2 contains many - examples of how the MIPS assembler synthesizes pseudoinstructions and addressing modes - from the spartan MIPS hardware instruction set. For example, The assembler synthesizes - the blt instruction from two other instructions: slt and bne. By extending the - instruction set, the MIPS assembler makes assembly language programming easier without - complicating the hardware. Many pseudoinstructions could also be simulated with macros, - but the MIPS assembler can generate better code for these instructions because it can - use a dedicated register ($at) and is able to optimize the generated code. -

-
-
-

Elaboration

- Assemblers conditionally assemble pieces of code, which permits a - programmer to include or exclude groups of instructions when a program is - assembled. This feature is particularly useful when several versions of - a program differ by a small amount. Rather than keep these programs in separate - files—which greatly complicates fixing bugs in the common code—programmers - typically merge the versions into a single file. Code particular to one - version is conditionally assembled, so it can be excluded when other versions - of the program are assembled. -

If macros and conditional assembly are useful, why do assemblers for - UNIX systems rarely, if ever, provide them? One reason is that most programmers - on these systems write programs in higher-level languages like C. Most of - the assembly code is produced by compilers, which find it more convenient - to repeat code rather than define macros. Another reason is that other tools - on UNIX—such as cpp, the C preprocessor, or m4, a general macro processor—can - provide macros and conditional assembly for assembly language programs. -

-
-
-

separate compilation Splitting a program - across many files, each of which can be compiled without knowledge of what is - in the other files.

-
-
-

Linkers

-

Separate compilation permits a program - to be split into pieces that are stored in different files. Each file contains - a logically related collection of subroutines and data structures that form - a module in a larger program. A file can be compiled and assembled independently - of other files, so changes to one module do not require recompiling the entire - program. As we discussed above, separate compilation necessitates the additional - step of linking to combine object files from separate modules and fix their - unresolved references.

-

The tool that merges these files is the linker (see Figure 3.1). - It performs three tasks:

-
    -
  • Searches the program libraries to find library routines used by the - program
    • -
  • Determines the memory locations that code from each module will occupy - and relocates its instructions by adjusting absolute references
    • -
  • Resolves references among files
    • -
-

A linker’s first task is to ensure that a program contains no undefined labels. - The linker matches the external symbols and unresolved references from a pro-gram’s - files. An external symbol in one file resolves a reference from another file - if both refer to a label with the same name. Unmatched references mean a symbol - was used, but not defined anywhere in the program.

-

Unresolved references at this stage in the linking process do not necessarily - mean a programmer made a mistake. The program could have referenced a library - routine whose code was not in the object files passed to the linker. After matching - symbols in the program, the linker searches the system’s program libraries to - find predefined subroutines and data structures that the program references. - The basic libraries contain routines that read and write data, allocate and - deallocate memory, and perform numeric operations. Other libraries contain routines - to access a database or manipulate terminal windows. A program that references - an unresolved symbol that is not in any library is erroneous and cannot be linked. - When the program uses a library routine, the linker extracts the routine’s code - from the library and incorporates it into the program text segment. This new - routine, in turn, may depend on other library routines, so the linker continues - to fetch other library routines until no external references are unresolved - or a routine cannot be found.

-

If all external references are resolved, the linker next determines the memory - locations that each module will occupy. Since the files were assembled in isolation, the - assembler could not know where a module’s instructions or data will be placed - relative to other modules. When the linker places a module in memory, all absolute - references must be relocated to reflect its true location. Since the linker has - relocation information that identifies all relocatable references, it can efficiently - find and backpatch these references.

-

Figure 3.1 The linker searches a - collection of object files and program libraries to find nonlocal routines used in a - program, combines them into a single executable file, and resolves references between - routines in different files.

-

The linker produces an executable file that can run on a computer. Typically, - this file has the same format as an object file, except that it contains no - unresolved references or relocation information.

-

Loading

-
-
-

static data The portion of memory that - contains data whose size is known to the compiler and whose lifetime is the - program’s entire execution.

-
-
-

A program that links without an error can be run. Before being run, the program - resides in a file on secondary storage, such as a disk. On UNIX systems, the operating - system kernel brings a program into memory and starts it running. To start a program, - the operating system performs the following steps:

-
    -
  1. Reads the executable file’s header to determine the size of the text - and data segments.
    2. -
  2. Creates a new address space for the program. This address space is large - enough to hold the text and data segments, along with a stack segment.
    3. -
  3. Copies instructions and data from the executable file into the new address - space.
    4. -
  4. Copies arguments passed to the program onto the stack.
    5. -
  5. Initializes the machine registers. In general, most registers are cleared, - but the stack pointer must be assigned the address of the first free stack - location.
    6. -
  6. Jumps to a start-up routine that copies the program’s arguments from - the stack to registers and calls the program’s main routine. If the main - routine returns, the start-up routine terminates the program with the exit - system call.
    7. -
-

Memory Usage

-

The next few sections elaborate the description of the MIPS architecture - presented earlier in the book. Earlier chapters focused primarily on hardware - and its relationship with low-level software. These sections focus primarily - on how assembly language programmers use MIPS hardware. These sections describe - a set of conventions followed on many MIPS systems. For the most part, the hardware - does not impose these conventions. Instead, they represent an agreement among - programmers to follow the same set of rules so that software written by different - people can work together and make effective use of MIPS hardware.

-

Systems based on MIPS processors typically divide memory into three parts - (see Figure 5.1). The first part, near the bottom of the address space (starting - at address 400000hex), is the text segment, which holds the program’s - instructions.

-

The second part, above the text segment, is the data segment, which - is further divided into two parts. - Static data (starting at address 10000000hex) contains objects - whose size is known to the compiler and whose lifetime—the interval during which a - program can access them—is the program’s entire execution. For example, in C, - global variables are statically allocated since they can be referenced anytime during a - program’s execution. The linker both assigns static objects to locations in the data - segment and resolves references to these objects.

-

Figure 5.1 Layout of memory.

-

Hardware-Software Interface

- Because the data segment begins far above the program at address 10000000 - hex , load and store instructions cannot directly reference data objects with - their16-bit offset fields. For example, to load the word in the data segment at address - 10010020 hex into register $v0 requires two instructions: - 
-        lui $s0, 0x1001 # 0x1001 means 1001 base 16
-        lw $v0, 0x0020($s0) # 0x10010000 + 0x0020 = 0x10010020
-
-

(The 0x before a number means that it is a hexadecimal value. For example, - 0x8000 is 8000hex or 32,768 ten .)

-

To avoid repeating the lui instruction at every load and store, MIPS systems - typically dedicate a register ($gp) as a global pointer to the static - data segment. This register contains address 10008000 hex, so load - and store instructions can use their signed 16-bit offset fields to access the - first 64 KB of the static data segment. With this global pointer, we can rewrite - the example as a single instruction:

- 
-        lw $v0, 0x8020($gp)
-
-

Of course, a global pointer register makes addressing locations 10000000 - hex – 10010000 hex faster than other heap locations. The - MIPS compiler usually stores global variables in this area because these - variables have fixed locations and fit better than other global data, such as - arrays.

-
-
-

stack segment The portion of memory used - by a program to hold procedure call frames.

-

register-use convention Also called - procedure call convention A software protocol - governing the use of registers by procedures.

-
-
-

Immediately above static data is dynamic data. This data, as its name implies, - is allocated by the program as it executes. In C programs, the malloc library routine - finds and returns a new block of memory. Since a compiler cannot predict how much memory - a program will allocate, the operating system expands the dynamic data area to meet - demand. As the upward arrow in the figure indicates, malloc expands the dynamic area - with the sbrk system call, which causes the operating system to add more pages to the - program’s virtual address space immediately above the dynamic data segment.

-

The third part, the program stack segment, - resides at the top of the virtual address space (starting at address 7fffffff - hex ). Like dynamic data, the maximum size of a pro-gram’s stack - is not known in advance. As the program pushes values on the stack, the operating - system expands the stack segment down, toward the data segment.

-

This three-part division of memory is not the only possible one. However, - it has two important characteristics: the two dynamically expandable segments - are as far apart as possible, and they can grow to use a program’s entire address - space.

-

Procedure Call Conventions

-

Conventions governing the use of registers are necessary when procedures - in a program are compiled separately. To compile a particular procedure, a compiler - must know which registers it may use and which registers are reserved for other - procedures. Rules for using registers are called register - use or procedure call conventions. - As the name implies, these rules are, for the most part, conventions - followed by software rather than rules enforced by hardware. However, most compilers - and programmers try very hard to follow these conventions because violating - them causes insidious bugs.

-

The calling convention described in this section is the one used by the gcc - compiler. The native MIPS compiler uses a more complex convention that is slightly - faster.

-

The MIPS CPU contains 32 general-purpose registers that are numbered 0–31. - Register $0 always contains the hardwired value 0.

-
    -
  • Registers $at (1), $k0 (26), and $k1 (27) are reserved for the assembler - and operating system and should not be used by user programs or compilers. -
    • -
  • Registers $a0–$a3 (4–7) are used to pass the first four arguments to - routines (remaining arguments are passed on the stack). Registers $v0 and - $v1 (2, 3) are used to return values from functions.
    • -
  • Registers $t0–$t9 (8–15, 24, 25) are caller-saved - registers that are used to hold temporary quantities that need not be - preserved across calls.
    • -
  • Registers $s0–$s7 (16–23) are callee-saved - registers that hold long-lived values that should be preserved - across calls.
    • -
  • Register $gp (28) is a global pointer that points to the middle of a - 64K block of memory in the static data segment.
    • -
  • Register $sp (29) is the stack pointer, which points to the last location - on the stack. Register $fp (30) is the frame pointer. The jal instruction - writes register $ra (31), the return address from a procedure call. These - two registers are explained in the next section.
    • -
-
-
-

caller-saved register A register saved - by the routine being called.

-

callee-saved register A register saved - by the routine making a procedure call.

-

procedure call frame A block of memory - that is used to hold values passed to a procedure as arguments, to save registers - that a procedure may modify but that the procedure’s caller does not want changed, - and to provide space for variables local to a procedure.

-
-
-

The two-letter abbreviations and names for these registers—for example, $sp - for the stack pointer—reflect the registers’ intended uses in the procedure - call convention. In describing this convention, we will use the names instead - of register numbers. Figure 6.1 lists the registers and describes their intended - uses.

-

Procedure Calls

-

This section describes the steps that occur when one procedure (the caller - ) invokes another procedure (the callee ). Programmers who write in - a high-level language (like C or Pascal) never see the details of how one procedure - calls another because the compiler takes care of this low-level bookkeeping. - However, assembly language programmers must explicitly implement every procedure - call and return.

-

Most of the bookkeeping associated with a call is centered around a block - of memory called a procedure call frame. - This memory is used for a variety of purposes:

-
    -
  • To hold values passed to a procedure as arguments
    • -
  • To save registers that a procedure may modify, but which the procedure’s - caller does not want changed
    • -
  • To provide space for variables local to a procedure
    • -
-

In most programming languages, procedure calls and returns follow a strict - last-in, first-out (LIFO) order, so this memory can be allocated and deallocated - on a stack, which is why these blocks of memory are sometimes called stack frames. -

-

Figure 6.2 shows a typical stack frame. The frame consists of the memory - between the frame pointer ($fp), which points to the first word of the frame, - and the stack pointer ($sp), which points to the last word of the frame. The - stack grows down from higher memory addresses, so the frame pointer points above - the stack pointer. The executing procedure uses the frame pointer to quickly - access values in its stack frame. For example, an argument in the stack frame - can be loaded into register $v0 with the instruction

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Register name Number Usage
$zero 0 constant 0
$at 1 reserved for assembler
$v0 2 expression evaluation and results of a - function
$v1 3 expression evaluation and results of a - function
$a0 4 argument 1
$a1 5 argument 2
$a2 6 argument 3
$a3 7 argument 4
$t0 8 temporary (not preserved across call) -
$t1 9 temporary (not preserved across call) -
$t2 10 temporary (not preserved across call) -
$t3 11 temporary (not preserved across call) -
$t4 12 temporary (not preserved across call) -
$t5 13 temporary (not preserved across call) -
$t6 14 temporary (not preserved across call) -
$t7 15 temporary (not preserved across call) -
$s0 16 saved temporary (preserved across call) -
$s1 17 saved temporary (preserved across call) -
$s2 18 saved temporary (preserved across call) -
$s3 19 saved temporary (preserved across call) -
$s4 20 saved temporary (preserved across call) -
$s5 21 saved temporary (preserved across call) -
$s6 22 saved temporary (preserved across call) -
$s7 23 saved temporary (preserved across call) -
$t8 24 temporary (not preserved across call) -
$t9 25 temporary (not preserved across call) -
$k0 26 reserved for OS kernel
$k1 27 reserved for OS kernel
$gp 28 pointer to global area
$sp 29 stack pointer
$fp 30 frame pointer
$ra 31 return address (used by function call) -
-

Figure 6.1 MIPS registers and usage convention.

- 
-        lw $v0, 0($fp)
-
-

Figure 6.2 Layout of a stack - frame. The frame pointer ($fp) points to the first word in the currently - executing procedure’s stack frame. The stack pointer ($sp) points to the last - word of frame. The first four arguments are passed in registers, so the fifth - argument is the first one stored on the stack.

-

A stack frame may be built in many different ways; however, the caller and - callee must agree on the sequence of steps. The steps below describe the calling - convention used on most MIPS machines. This convention comes into play at three - points during a procedure call: immediately before the caller invokes the callee, - just as the callee starts executing, and immediately before the callee returns - to the caller. In the first part, the caller puts the procedure call arguments - in standard places and invokes the callee to do the following:

-
    -
  1. Pass arguments. By convention, the first four arguments are passed in - registers $a0–$a3. Any remaining arguments are pushed on the stack and appear - at the beginning of the called procedure’s stack frame.
    2. -
  2. Save caller-saved registers. The called procedure can use these registers - ($a0–$a3 and $t0–$t9) without first saving their value. If the caller expects - to use one of these registers after a call, it must save its value before - the call.
    3. -
  3. Execute a jal instruction, which jumps to the callee’s first instruction - and saves the return address in register $ra.
    4. -
-

Before a called routine starts running, it must take the following steps - to set up its stack frame:

-
    -
  1. Allocate memory for the frame by subtracting the frame’s size from the - stack pointer.
    2. -
  2. Save callee-saved registers in the frame. A callee must save the values - in these registers ($s0–$s7, $fp, and $ra) before altering them since the - caller expects to find these registers unchanged after the call. Register - $fp is saved by every procedure that allocates a new stack frame. However, - register $ra only needs to be saved if the callee itself makes a call. The - other calleesaved registers that are used also must be saved.
    3. -
  3. Establish the frame pointer by adding the stack frame’s size minus 4 - to $sp and storing the sum in register $fp.
    4. -
-

Hardware-Software Interface

-

The MIPS register use convention provides callee- and caller-saved registers because - both types of registers are advantageous in different circumstances. Callee-saved - registers are better used to hold long-lived values, such as variables from a user’s - program. These registers are only saved during a procedure call if the callee expects to - use the register. On the other hand, caller-saved registers are better used to hold - short-lived quantities that do not persist across a call, such as immediate values in an - address calculation. During a call, the callee can also use these registers for - short-lived temporaries.

-

Finally, the callee returns to the caller by executing the following steps: -

-
    -
  1. If the callee is a function that returns a value, place the returned value - in register $v0.
    2. -
  2. Restore all callee-saved registers that were saved upon procedure entry. -
    3. -
  3. Pop the stack frame by adding the frame size to $sp.
    4. -
  4. Return by jumping to the address in register $ra.
    5. -
-
-
-

Elaboration:

-

A programming language that does not permit recursive - procedures— procedures that call themselves either directly or - indirectly through a chain of calls—need not allocate frames on a stack. In a - nonrecursive language, each procedure’s frame may be statically allocated - since only one invocation of a procedure can be active at a time. Older versions - of Fortran prohibited recursion because statically allocated frames produced - faster code on some older machines. However, on load-store architectures like - MIPS, stack frames may be just as fast because a frame pointer register points - directly to -

-
-
-

recursive procedures Procedures that - call themselves either directly or indirectly through a chain of calls.

-
-
-

the active stack frame, which permits a single load or store instruction - to access values in the frame. In addition, recursion is a valuable programming - technique.

-

Procedure Call Example

- 
-        main () {
-          printf ("The factorial of 10 is %d\n", fact (10));
-        }
-
-        int fact (int n) {
-          if (n < 1)
-            return (1);
-          else
-            return (n * fact (n - 1));
-        }
-
-

which computes and prints 10! (the factorial of 10, 10! = 10 × 9 × . . . - × 1). fact is a recursive routine that computes n ! by multiplying - n times ( n – 1)!. The assembly code for this routine illustrates how - programs manipulate stack frames.

-

Upon entry, the routine main creates its stack frame and saves the two calleesaved - registers it will modify: $fp and $ra. The frame is larger than required for - these two registers because the calling convention requires the minimum size - of a stack frame to be 24 bytes. This minimum frame can hold four argument registers - ($a0–$a3) and the return address $ra, padded to a double-word boundary (24 bytes). - Since main also needs to save $fp, its stack frame must be two words larger - (remember: the stack pointer is kept doubleword aligned).

- 
-        .text
-        .globl main
-main:
-        subu $sp,$sp,32         # Stack frame is 32 bytes long
-        sw $ra,20($sp)          # Save return address
-        sw $fp,16($sp)          # Save old frame pointer
-        addiu $fp,$sp,28        # Set up frame pointer
-
-

The routine main then calls the factorial routine and passes it the single - argument 10. After fact returns, main calls the library routine printf and passes - it both a format string and the result returned from fact:

- 
-        li $a0,10               # Put argument (10) in $a0
-        jal fact                # Call factorial function
-        la $a0,$LC              # Put format string in $a0
-        move $a1,$v0            # Move fact result to $a1
-        jal printf              # Call the print function
-
-

Finally, after printing the factorial, main returns. But first, it must restore - the registers it saved and pop its stack frame:

- 
-        lw $ra,20($sp)          # Restore return address
-        lw $fp,16($sp)          # Restore frame pointer
-        addiu $sp,$sp,32        # Pop stack frame
-        jr $ra                  # Return to caller
-        .rdata
-$LC:
-        .ascii “The factorial of 10 is %d\n\000”
-
-

The factorial routine is similar in structure to main. First, it creates - a stack frame and saves the callee-saved registers it will use. In addition - to saving $ra and $fp, fact also saves its argument ($a0), which it will use - for the recursive call:

- 
-        lw $ra,20($sp)          # Restore return address
-        lw $fp,16($sp)          # Restore frame pointer
-        addiu $sp,$sp,32        # Pop stack frame
-        jr $ra                  # Return to caller
-        .rdata
-$LC:
-        .ascii “The factorial of 10 is %d\n\000”
-
-

The heart of the fact routine performs the computation from the C program. - It tests if the argument is greater than 0. If not, the routine returns the - value 1. If the argument is greater than 0, the routine recursively calls itself - to compute fact(n-1) and multiplies that value times n:

- 
-        lw $v0,0($fp)           # Load n
-        bgtz $v0,$L2            # Branch if n > 0
-        li $v0,1                # Return 1
-        jr $L1                  # Jump to code to return
-$L2:
-        lw $v1,0($fp)           # Load n
-        subu $v0,$v1,1          # Compute n - 1
-        move $a0,$v0            # Move value to $a0
-        jal fact                # Call factorial function
-        lw $v1,0($fp)           # Load n
-        mul $v0,$v0,$v1         # Compute fact(n-1) * n
-
-

Finally, the factorial routine restores the callee-saved registers and returns - the value in register $v0:

- 
-        $L1:                    # Result is in $v0
-        lw $ra, 20($sp)         # Restore $ra
-        lw $fp, 16($sp)         # Restore $fp
-        addiu $sp, $sp, 32      # Pop stack
-        jr $ra                  # Return to caller
-
-

Stack in Recursive Procedure

-

Figure 6.3 shows the stack at the call fact(7). main runs first, so its - frame is deepest on the stack. main calls fact(10), whose stack frame is next - on the stack. Each invocation recursively invokes fact to compute the next-lowest - factorial. The stack frames parallel the LIFO order of these calls.

-

Figure 6.3 Stack frames during the call of fact(7).

-

What does the stack look like when the call to fact(10) returns?

- -
-
-

Elaboration:

-

The difference between the MIPS compiler and the gcc compiler is that the MIPS - compiler usually does not use a frame pointer, so this register is available as another - callee-saved register, $s8. This change saves a couple of instructions in the procedure - call and return sequence. However, it complicates code generation because a procedure - must access its stack frame with $sp, whose value can change during a procedure’s - execution if values are pushed on the stack.

-
-
-

Another Procedure Call Example

-

As another example, consider the following routine that computes the tak - function, which is a widely used benchmark created by Ikuo Takeuchi. This function - does not compute anything useful, but is a heavily recursive program that illustrates - the MIPS calling convention.

- 
-        int tak (int x, int y, int z) {
-          if (y < x)
-                return 1 + tak (tak (x - 1, y, z),
-                                tak (y - 1, z, x),
-                                tak (z - 1, x, y));
-          else
-                return z;
-        }
-
-        int main () {
-          tak(18, 12, 6);
-        }
-
-

The assembly code for this program is below. The tak function first saves its return - address in its stack frame and its arguments in callee-saved registers, since the - routine may make calls that need to use registers $a0–$a2 and $ra. The function uses - callee-saved registers since they hold values that persist over the lifetime of the - function, which includes several calls that could potentially modify registers.

- 
-        .text
-        .globl tak
-tak:
-        subu $sp, $sp, 40
-        sw $ra, 32($sp)
-        sw $s0, 16($sp)         # x
-        move $s0, $a0
-        sw $s1, 20($sp)         # y
-        move $s1, $a1
-        sw $s2, 24($sp)         # z
-        move $s2, $a2
-        sw $s3, 28($sp)         # temporary
-
-

The routine then begins execution by testing if y < x. If not, it branches - to label L1, which is below.

- 
-        bge $s1, $s0, L1 # if (y < x)
-
-

If y < x, then it executes the body of the routine, which contains four recursive - calls. The first call uses almost the same arguments as its parent:

- 
-        addiu $a0, $s0, -1
-        move $a1, $s1
-        move $a2, $s2
-        jal tak                 # tak (x - 1, y, z)
-        move $s3, $v0
-
-

Note that the result from the first recursive call is saved in register $s3, - so that it can be used later. The function now prepares arguments for the second - recursive call.

- 
-        addiu $a0, $s1, -1
-        move $a1, $s2
-        move $a2, $s0
-        jal tak                 # tak (y - 1, z, x)
-
-

In the instructions below, the result from this recursive call is saved in - register $s0. But, first we need to read, for the last time, the saved value - of the first argument from this register.

- 
-        addiu $a0, $s2, -1
-        move $a1, $s0
-        move $a2, $s1
-        move $s0, $v0
-        jal tak                 # tak (z - 1, x, y)
-
-

After the three inner recursive calls, we are ready for the final recursive - call. After the call, the function’s result is in $v0 and control jumps to the - function’s epilogue.

- 
-        move $a0, $s3
-        move $a1, $s0
-        move $a2, $v0
-        jal tak                 # tak (tak(...), tak(...), tak(...))
-        addiu $v0, $v0, 1
-        j L2
-
-

This code at label L1 is the consequent of the if-then-else statement. - It just moves the value of argument z into the return register and falls into - the function epilogue.

- 
-L1:
-        move $v0, $s2
-
-

The code below is the function epilogue, which restores the saved registers - and returns the function’s result to its caller.

- 
-L2:
-        lw $ra, 32($sp)
-        lw $s0, 16($sp)
-        lw $s1, 20($sp)
-        lw $s2, 24($sp)
-        lw $s3, 28($sp)
-        addiu $sp, $sp, 40
-        jr $ra
-
-

The main routine calls the tak function with its initial arguments, then - takes the computed result (7) and prints it using SPIM’s system call for printing - integers.

- 
-        .globl main
-main:
-        subu $sp, $sp, 24
-        sw $ra, 16($sp)
-        li $a0, 18
-        li $a1, 12
-        li $a2, 6
-        jal tak                 # tak(18, 12, 6)
-        move $a0, $v0
-        li $v0, 1               # print_int syscall
-        syscall
-        lw $ra, 16($sp)
-        addiu $sp, $sp, 24
-        jr $ra
-
-

Exceptions and Interrupts

-

The MIPS exception facility, which responds both to exceptions caused by errors - during an instruction’s execution and to external interrupts caused by I/O - devices. This section describes exception and interrupt - handling in more detail. - 1 In MIPS processors, a part of the CPU called coprocessor 0 - records the information that software needs to handle exceptions and interrupts. - The MIPS simulator SPIM does not implement all of coprocessor 0’s registers, - since many are not useful in a simulator or are part of the memory system, which - SPIM does not model. However, SPIM does provide the following coprocessor 0 - registers:

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Register nameRegister numberUsage
BadVAddr 8 memory address at which an offending memory reference - occurred
Count 9 timer
Compare 11 value compared against timer that causes interrupt - when they match
Status 12 interrupt mask and enable bits
Cause 13 exception type and pending interrupt bits
EPC 14 address of instruction that caused exception
Config 16 configuration of machine
-

1. This section discusses exceptions in the MIPS32 architecture, which is - what SPIM implementsin Version 7.0 and later. Earlier versions of SPIM implemented - the MIPS-I architecture, which handled exceptions slightly differently. Converting - programs from these versions to run on MIPS32 should not be difficult, as the - changes are limited to the Status and Cause register fields and the replacement - of the rfe instruction by the eret instruction.

-
-
-

interrupt handler A piece of code that - is run as a result of an exception or an interrupt.

-
-
-

These seven registers are part of coprocessor 0’s register set. They are - accessed by the mfc0 and mtc0 instructions. After an exception, register EPC - contains the address of the instruction that was executing when the exception - occurred. If the exception was caused by an external interrupt, then the instruction - will not have started executing. All other exceptions are caused by the execution - of the instruction at EPC, except when the offending instruction is in the delay - slot of a branch or jump. In that case, EPC points to the branch or jump instruction - and the BD bit is set in the Cause register. When that bit is set, the exception - handler must look at EPC + 4 for the offending instruction. However, in either - case, an exception handler properly resumes the program by returning to the - instruction at EPC.

-

If the instruction that caused the exception made a memory access, register - BadVAddr contains the referenced memory location’s address.

-

The Count register is a timer that increments at a fixed rate (by default, - every 10 milliseconds) while SPIM is running. When the value in the Count register - equals the value in the Compare register, a hardware interrupt at priority level - 5 occurs.

-

Figure 7.1 shows the subset of the Status register fields implemented by - the MIPS simulator SPIM. The interrupt mask field contains a bit for each of - the six hardware and two software interrupt levels. A mask bit that is 1 allows - interrupts at that level to interrupt the processor. A mask bit that is 0 disables - interrupts at that level. When an interrupt arrives, it sets its interrupt pending - bit in the Cause register, even if the mask bit is disabled. When an interrupt - is pending, it will interrupt the processor when its mask bit is subsequently - enabled.

-

The user mode bit is 0 if the processor is running in kernel mode and 1 if it is - running in user mode. On SPIM, this bit is fixed at 1, since the SPIM processor does not - implement kernel mode. The exception level bit is normally 0, but is set to 1 after an - exception occurs. When this bit is 1, interrupts are disabled and the EPC is not updated - if another exception occurs. This bit prevents an exception handler from being disturbed - by an interrupt or exception, but it should be reset when the handler finishes. If the - interrupt enable bit is 1, interrupts are allowed. If it is 0, they are disabled.

-

Figure 7.1 The Status register. -

-

Figure 7.2 The Cause register. -

-

Figure 7.2 shows the subset of Cause register fields that SPIM implements. - The branch delay bit is 1 if the last exception occurred in an instruction executed - in the delay slot of a branch. The interrupt pending bits become 1 when an interrupt - is raised at a given hardware or software level. The exception code register - describes the cause of an exception through the following codes:

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
NumberName Cause of exception
0 Int interrupt (hardware)
4 AdEL address error exception (load or instruction fetch) -
5 AdES address error exception (store)
6 IBE bus error on instruction fetch
7 DBE bus error on data load or store
8 Sys syscall exception
9 Bp breakpoint exception
10 RI reserved instruction exception
11 CpU coprocessor unimplemented
12 Ov arithmetic overflow exception
13 Tr trap
15 FPE floating point
-

Exceptions and interrupts cause a MIPS processor to jump to a piece of code, - at address 80000180 hex (in the kernel, not user address space), - called an exception handler. This code examines the exception’s cause - and jumps to an appropriate point in the operating system. The operating system - responds to an exception either by terminating the process that caused the exception - or by performing some action. A process that causes an error, such as executing - an unimplemented instruction, is killed by the operating system. On the other - hand, other exceptions such as page faults are requests from a process to the - operating system to perform a service, such as bringing in a page from disk. - The operating system processes these requests and resumes the process. The final - type of exceptions are interrupts from external devices. These generally cause - the operating system to move data to or from an I/O device and resume the interrupted - process.

-

The code in the example below is a simple exception handler, which invokes - a routine to print a message at each exception (but not interrupts). This code - is similar to the exception handler (exceptions.s) used by the SPIM simulator. -

-

Exception Handler

-

The exception handler first saves register $at, which is used in pseudo-instructions - in the handler code, then saves $a0 and $a1, which it later uses to pass arguments. - The exception handler cannot store the old values from these registers on the - stack, as would an ordinary routine, because the cause of the exception might - have been a memory reference that used a bad value (such as 0) in the stack - pointer. Instead, the exception handler stores these registers in an exception - handler register ($k1, since it can’t access memory without using $at) and two - memory locations (save0 and save1). If the exception routine itself could be - interrupted, two locations would not be enough since the second exception would - overwrite values saved during the first exception. However, this simple exception - handler finishes running before it enables interrupts, so the problem does not - arise.

- 
-        .ktext 0x80000180
-        mov $k1, $at            # Save $at register
-        sw $a0, save0           # Handler is not re-entrant and can’t use
-        sw $a1, save1           # stack to save $a0, $a1
-        # Don’t need to save $k0/$k1
-
-

The exception handler then moves the Cause and EPC registers into CPU registers. - The Cause and EPC registers are not part of the CPU register set. Instead, they - are registers in coprocessor 0, which is the part of the CPU that handles exceptions. - The instruction mfc0 $k0, $13 moves coprocessor 0’s register 13 (the Cause register) - into CPU register $k0. Note that the exception handler need not save registers - $k0 and $k1 because user programs are not supposed to use these registers. The - exception handler uses the value from the Cause register to test if the exception - was caused by an interrupt (see the preceding table). If so, the exception is - ignored. If the exception was not an interrupt, the handler calls print_excp - to print a message.

- 
-        mfc0 $k0, $13           # Move Cause into $k0
-        srl $a0, $k0, 2         # Extract ExcCode field
-        andi $a0, $a0, 0xf
-        bgtz $a0, done          # Branch if ExcCode is Int (0)
-        mov $a0, $k0            # Move Cause into $a0
-        mfc0 $a1, $14           # Move EPC into $a1
-        jal print_excp          # Print exception error messa
-
-

Before returning, the exception handler clears the Cause register; resets - the Status register to enable interrupts and clear the EXL bit, which allows - subsequent exceptions to change the EPC register; and restores registers $a0, - $a1, and $at. It then executes the eret (exception return) instruction, which - returns to the instruction pointed to by EPC. This exception handler returns - to the instruction following the one that caused the exception, so as to not - reexecute the faulting instruction and cause the same exception again.

- 
-        done: mfc0 $k0, $14     # Bump EPC
-        addiu $k0, $k0, 4       # Do not reexecute
-        # faulting instruction
-        mtc0 $k0, $14           # EPC
-        mtc0 $0, $13            # Clear Cause register
-        mfc0 $k0, $12           # Fix Status register
-        andi $k0, 0xfffd        # Clear EXL bit
-        ori $k0, 0x1            # Enable interrupts
-        mtc0 $k0, $12
-        lw $a0, save0           # Restore registers
-        lw $a1, save1
-        mov $at, $k1
-        eret                    # Return to EPC
-        .kdata
-save0:  .word 0
-save1:  .word 0
-
-
-
-

Elaboration:

-

On real MIPS processors, the return from an exception handler is more complex. The - exception handler cannot always jump to the instruction following EPC. For example, if - the instruction that caused the exception was in a branch instruction’s delay slot - (see Chapter 6), the next instruction to execute may not be the following instruction in - memory.

-
-
-

Input and Output

-

SPIM simulates one I/O device: a memory-mapped console on which a program - can read and write characters. When a program is running, SPIM connects its - own terminal (or a separate console window in the X-window version xspim or - the Windows version PCSpim) to the processor. A MIPS program running on SPIM - can read the characters that you type. In addition, if the MIPS program writes - characters to the terminal, they appear on SPIM’s terminal or console window. - One exception to this rule is control-C: this character is not passed to the - program, but instead causes SPIM to stop and return to command mode. When the - program stops running (for example, because you typed control-C or because the - program hit a breakpoint), the terminal is reconnected to SPIM so you can type - SPIM commands.

-

To use memory-mapped I/O (see below), spim or xspim must be started with - the -mapped_io flag. PCSpim can enable memory-mapped I/O through a command line - flag or the "Settings" dialog.

-

The terminal device consists of two independent units: a receiver - and a trans mitter. The receiver reads characters typed - on the keyboard. The transmitter display characters on the console. The two - units are completely independent. This means, for example, that characters typed - at the keyboard are not automatically echoed on the display. Instead, a program - echoes a character by reading it from the receiver and writing it to the transmitter. -

-

A program controls the terminal with four memory-mapped device registers, - as shown in Figure 8.1. “Memory-mapped’’ means that each register appears - as a special memory location. The Receiver Control register is at location - ffff0000 hex . Only two of its bits are actually used. Bit 0 is called - “ready’’: if it is 1, it means that a character has arrived from the keyboard - but has not yet been read from the Receiver Data register. The ready bit is - read-only: writes to it are ignored. The ready bit changes from 0 to 1 when - a character is typed at the keyboard, and it changes from 1 to 0 when the character - is read from the Receiver Data register.

-

Figure 8.1 The terminal is controlled - by four device registers, each of which appears as a memory location at the - given address. Only a few bits of these registers are actually used. The - others always read as 0s and are ignored on writes.

-

Bit 1 of the Receiver Control register is the keyboard “interrupt enable.” This - bit may be both read and written by a program. The interrupt enable is initially 0. If - it is set to 1 by a program, the terminal requests an interrupt at hardware level 1 - whenever a character is typed and the ready bit becomes 1. However, for the interrupt to - affect the processor, interrupts must also be enabled in the Status register. All other - bits of the Receiver Control register are unused.

-

The second terminal device register is the Receiver Data register - (at address ffff0004hex). The low-order 8 bits of this register contain the - last character typed at the keyboard. All other bits contain 0s. This register - is read-only and changes only when a new character is typed at the keyboard. - Reading the Receiver Data register resets the ready bit in the Receiver Control - register to 0. The value in this register is undefined if the Receiver Control - register is 0.

-

The third terminal device register is the Transmitter Control register - (at address ffff0008 hex ). Only the low-order 2 bits of this - register are used. They behave much like the corresponding bits of the Receiver - Control register. Bit 0 is called “ready’’ and is read-only. If this bit is - 1, the transmitter is ready to accept a new character for output. If it is 0, - the transmitter is still busy writing the previous character. Bit 1 is “interrupt - enable’’ and is readable and writable. If this bit is set to 1, then the terminal - requests an interrupt at hardware level 0 whenever the transmitter is ready - for a new character and the ready bit becomes 1.

-

The final device register is the Transmitter Data register (at address - ffff000c hex ). When a value is written into this location, its low-order - 8 bits (i.e., an ASCII character as in Figure 2.21 in Chapter 2) are sent to - the console. When the Transmitter Data register is written, the ready bit in - the Transmitter Control register is reset to

-

0. This bit stays 0 until enough time has elapsed to transmit the character - to the terminal; then the ready bit becomes 1 again. The Transmitter Data register - should only be written when the ready bit of the Transmitter Control register - is 1. If the transmitter is not ready, writes to the Transmitter Data register - are ignored (the write appears to succeed but the character is not output). -

-

Real computers require time to send characters to a console or terminal. - These time lags are simulated by SPIM. For example, after the transmitter starts - to write a character, the transmitter’s ready bit becomes 0 for a while. SPIM - measures time in instructions executed, not in real clock time. This means that - the transmitter does not become ready again until the processor executes a fixed - number of instructions. If you stop the machine and look at the ready bit, it - will not change. However, if you let the machine run, the bit eventually changes - back to 1.

-

SPIM

-

SPIM is a software simulator that runs assembly language programs written - for processors that implement the MIPS32 architecture, specifically Release - 1 of this architecture with a fixed memory mapping, no caches, and only coprocessors - 0 and 1.2 SPIM’s name is just MIPS spelled backwards. SPIM can read - and immediately execute assembly language files. SPIM is a self-contained system - for running MIPS programs. It contains a debugger and provides a few operating - system–like services. SPIM is much slower than a real computer (100 or more times). - However, its low cost and wide availability cannot be matched by - real hardware! -

-

Earlier versions of SPIM (before 7.0) implemented the MIPS-I architecture - used in the original MIPS R2000 processors. This architecture is almost a proper - subset of the MIPS32 architecture, with the difference being the manner in which - exceptions are handled. MIPS32 also introduced approximately 60 new instructions, - which are supported by SPIM. Programs that ran on the earlier versions of SPIM - and did not use exceptions should run unmodified on newer versions of SPIM. - Programs that used exceptions will require minor changes.

-

An obvious question is, Why use a simulator when most people have PCs that - contain processors that run significantly faster than SPIM? One reason is that - the processor in PCs are Intel 80x86s, whose architecture is far less regular - and far more complex to understand and program than MIPS processors. The MIPS - architecture may be the epitome of a simple, clean RISC machine.

-

In addition, simulators can provide a better environment for assembly programming - than an actual machine because they can detect more errors and provide a better - interface than an actual computer.

-

Finally, simulators are a useful tool in studying computers and the programs - that run on them. Because they are implemented in software, not silicon, simulators - can be examined and easily modified to add new instructions, build new systems - such as multiprocessors, or simply to collect data.

-

Simulation of a Virtual Machine

-

The basic MIPS architecture is difficult to program directly because of delayed - branches, delayed loads, and restricted address modes. This difficulty is tolerable - since these computers were designed to be programmed in high-level languages - and present an interface designed for compilers rather than assembly language - programmers. A good part of the programming complexity results from delayed - instructions. A delayed branch requires two cycles to execute. In the - second cycle, the instruction immediately following the branch executes. This - instruction can perform useful work that normally would have been done before - the branch. It can also be a nop (no operation) that does nothing. Similarly, - delayed loads require 2 cycles to bring a value from memory, so the instruction - immediately following a load cannot use the value.

-

MIPS wisely chose to hide this complexity by having its assembler implement - a virtual machine . This virtual computer - appears to have nondelayed branches and loads and a richer instruction set than - the actual hardware. The assembler reorga nizes (rearranges) - instructions to fill the delay slots. The virtual computer also provides - pseudoinstructions, which appear as real instructions in assembly language - programs. The hardware, however, knows nothing about pseudoinstructions, so - the assembler translates them into equivalent sequences of actual machine instructions. - For example, the MIPS hardware only provides instructions to branch when a register - is equal to or not equal to 0. Other conditional branches, such as one that - branches when one register is greater than another, are synthesized by comparing - the two registers and branching when the result of the comparison is true (nonzero). -

-
-
-

virtual machine A virtual computer that - appears to have nondelayed branches and loads and a richer instruction set than - the actual hardware.

-
-
-

By default, SPIM simulates the richer virtual machine, since this is the - machine that most programmers will find useful. However, SPIM can also simulate - the delayed branches and loads in the actual hardware. Below, we describe the - virtual machine and only mention in passing features that do not belong to the - actual hardware. In doing so, we follow the convention of MIPS assembly language - programmers (and compilers), who routinely use the extended machine as if it - was implemented in silicon.

-

Getting Started with SPIM

-

The rest of this appendix introduces SPIM and the MIPS R2000 Assembly language. - Many details should never concern you; however, the sheer volume of information - can sometimes obscure the fact that SPIM is a simple, easy-to-use program. This - section starts with a quick tutorial on using SPIM, which should enable you - to load, debug, and run simple MIPS programs.

-

SPIM comes in different versions for different types of computer systems. - The one constant is the simplest version, called spim, which is a command-line-driven - program that runs in a console window. It operates like most programs of this - type: you type a line of text, hit the return key, and spim executes your command. - Despite its lack of a fancy interface, spim can do everything that its fancy - cousins can do.

-

QtSpim is a version of the simulator with a window interface. It runs on Microsoft - Windows, Apple OS X, and Linux.

-

There are two older cousins to spim. The version that runs in the X-windows - environment of a UNIX or Linux system is called xspim. PCspim is a windowing - version of spim that runs on Microsoft Windows.

-

Surprising Features

-

Although SPIM faithfully simulates the MIPS computer, SPIM is a simulator - and certain things are not identical to an actual computer. The most obvious - differences are that instruction timing and the memory system are not identical. - SPIM does not simulate caches or memory latency, nor does it accurately reflect - float-ing-point operation or multiply and divide instruction delays. In addition, - the floating-point instructions do not detect many error conditions, which would - cause exceptions on a real machine.

-

Another surprise (which occurs on the real machine as well) is that a pseudoinstruction - expands to several machine instructions. When you single-step or examine memory, - the instructions that you see are different from the source program. The correspondence - between the two sets of instructions is fairly simple since SPIM does not reorganize - instructions to fill delay slots.

-

Byte Order

-

Processors can number bytes within a word so the byte with the lowest number - is either the leftmost or rightmost one. The convention used by a machine is - called its byte order. MIPS processors can operate with either big-endian - or little-endian byte order. For example, in a big-endian machine, - the directive .byte 0, 1, 2, 3 would result in a memory word containing

- - - - - - - - - - -
Byte #
0 1 2 3
-

while in a little-endian machine, the word would contain

- - - - - - - - - - -
Byte #
3 2 1 0
-

SPIM operates with both byte orders. SPIM’s byte order is the same as the - byte order of the underlying machine that runs the simulator. For example, on - a Intel 80x86, SPIM is little-endian, while on a Macintosh or Sun SPARC, SPIM - is bigendian.

-

System Calls

-

SPIM provides a small set of operating-system-like services through the system - call (syscall) instruction. To request a service, a program loads the system - call code (see Figure 9.1) into register $v0 and arguments into registers - $a0–$a3 (or $f12 for floating-point values). System calls that return values - put their results in register $v0 (or $f0 for floating-point results). For example, - the following code prints “the answer = 5’’:

- 
-        .data
-str:
-        .asciiz "the answer = "
-        .text
-        li $v0, 4               # system call code for print_str
-        la $a0, str             # address of string to print
-        syscall                 # print the string
-        li $v0, 1               # system call code for print_int
-        li $a0, 5               # integer to print
-        syscall                 # print it
-
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Service System call code Arguments Result
print_int 1 $a0 = integer  
print_float 2 $f12 = float  
print_double 3 $f12 = double  
print_string 4 $a0 = string  
read_int 5   integer (in $v0)
read_float 6   float (in $f0)
read_double 7   double (in $f0)
read_string 8 $a0 = buffer, $a1 = length  
sbrk 9 $a0 = amount address (in $v0)
exit 10    
print_char 11 $a0 = char  
read_char 12   char (in $v0)
open 13 $a0 = filename (string), $a1 = flags, $a2 - = mode file descriptor (in $v0) -
read 14 $a0 = file descriptor, $a1 = buffer, $a2 - = length num chars read (in $v0)
write 15 $a0 = file descriptor, $a1 = buffer, $a2 - = length num chars written (in $v0)
close 16 $a0 = file descriptor  
exit2 17 $a0 = result  
-

Figure 9.1 System services.

-

The print_int system call is passed an integer and prints it on the console. - print_float prints a single floating-point number; print_double prints a double - precision number; and print_string is passed a pointer to a null-ter-minated - string, which it writes to the console.

-

The system calls read_int, read_float, and read_double read an entire line - of input up to and including the newline. Characters following the number are - ignored. read_string has the same semantics as the UNIX library routine fgets. - It reads up to n – 1 characters into a buffer and terminates the string - with a null byte. If fewer than n – 1 characters are on the current line, - read_string reads up to and including the newline and again null-terminates - the string.

-

Warning: Programs that use these syscalls to read from the terminal should not - use memory-mapped I/O.

-

sbrk returns a pointer to a block of memory containing n additional - bytes. exit stops the program SPIM is running. exit2 terminates the SPIM program, - and the argument to exit2 becomes the value returned when the SPIM simulator - itself terminates.

-

print_char and read_char write and read a single character. open, read, write, - and close are the standard UNIX library calls.

-

MIPS R2000 Assembly Language

-

A MIPS processor consists of an integer processing unit (the CPU) and a collection - of coprocessors that perform ancillary tasks or operate on other types of data - such as floating-point numbers (see Figure 10.1). SPIM simulates two coprocessors. - Coprocessor 0 handles exceptions and interrupts. Coprocessor 1 is the float-ing-point - unit. SPIM simulates most aspects of this unit.

-

Addressing Modes

-

MIPS is a load-store architecture, which means that only load and store instructions - access memory. Computation instructions operate only on values in registers. - The bare machine provides only one memory-addressing mode: c(rx), which uses - the sum of the immediate c and register rx as the address. The virtual machine - provides the following addressing modes for load and store instructions:

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
FormatAddress computation
(register) contents of register
imm immediate
imm (register) immediate + contents of register
label address of label
label ± imm address of label + or – immediate
label ± imm (register) address of label + or – (immediate + contents of register) -
-

Most load and store instructions operate only on aligned data. A quantity - is aligned if its memory address is a multiple of its size in bytes. Therefore, - a half

-

Figure 10.1 MIPS R2000 CPU and - FPU.

-

word object must be stored at even addresses and a full word object must - be stored at addresses that are a multiple of four. However, MIPS provides some - instructions to manipulate unaligned data (lwl, lwr, swl, and swr).

-
-
-

Elaboration:

-

The MIPS assembler (and SPIM) synthesizes the more complex addressing modes by - producing one or more instructions before the load or store to compute a complex - address. For example, suppose that the label table referred to memory location - 0x10000004 and a program contained the instruction

- 
-                ld $a0, table + 4($a1)
-
-

The assembler would translate this instruction into the instructions

- 
-        lui $at, 4096
-        addu $at, $at, $a1
-        lw $a0, 8($at)
-
-

The first instruction loads the upper bits of the label’s address into register - $at, which is the register that the assembler reserves for its own use. The - second instruction adds the contents of register $a1 to the label’s partial - address. Finally, the load instruction uses the hardware address mode to add - the sum of the lower bits of the label’s address and the offset from the original - instruction to the value in register $at.

-
-
-

Assembler Syntax

-

Comments in assembler files begin with a sharp sign (#). Everything from the sharp - sign to the end of the line is ignored.

-

Identifiers are a sequence of alphanumeric characters, underbars (_), and dots (.) - that do not begin with a number. Instruction opcodes are reserved words - that cannot be used as identifiers. Labels are declared by putting them at the - beginning of a line followed by a colon, for example:

- 
-        lui $at, 4096
-        addu $at, $at, $a1
-        lw $a0, 8($at)
-
-

Numbers are base 10 by default. If they are preceded by 0x, they are - interpreted as hexadecimal. Hence, 256 and 0x100 denote the same value.

-

Strings are enclosed in doublequotes ("). Special characters in strings follow - the C convention:

-
    -
  • newline \n
    • -
  • tab \t
    • -
  • quote \"
    • -
-

SPIM supports a subset of the MIPS assembler directives:

- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
.align n Align the next datum on a 2 n byte boundary. For example, - .align 2 aligns the next value on a word boundary. .align 0 turns off automatic - alignment of .half, .word, .float, and .double directives until the next .data or - .kdata directive.
.ascii str Store the string str in memory, but do not null-terminate it.
.asciiz str Store the string str in memory and null-terminated it.
.byte b1,..., bn Store the n values in successive bytes of memory.
.data Subsequent items are stored in the data segment. If the optional - argument addr is present, subsequent items are stored starting at - address addr.
.double d1, ..., dn Store the n floating-point double precision numbers in successive memory - locations.
.extern sym size Declare that the datum stored at sym is size bytes and is a global - label. This directive enables assembler to store the datum in a portion of data - segment that is efficiently accessed via register $gp.
.float f1,..., fn Store the n floating-point single precision numbers in successive memory - locations.
.globl sym Declare that label sym is global and can be referenced from other - files.
.half h1, ..., hn Store the n 16-bit quantities in successive memory halfwords. -
.kdata Subsequent data items are stored in the kernel segment. If the optional - argument addr is present, subsequent items are stored starting at - address addr.
.ktext Subsequent items are put in the kernel text segment. In SPIM, these items may - only be instructions or words (see the .word directive below). If the optional - argument addr is present, subsequent items are stored starting at - address addr.
.set noat and .set at The first directive prevents SPIM from complaining about subsequent instructions - that use register $at. The second directive reenables the warning. Since - pseudoinstructions expand into code that uses register $at, programmers must be - very careful about leaving values in this register. -
.space n Allocate n bytes of space in the current segment - (which must be the data segment in SPIM).
.text <addr> Subsequent items are put in the user text segment. In SPIM, these items may only - be instructions or words (see the .word directive below). If the optional - argument addr is present, subsequent items are stored starting at - address addr.
.word w1,..., wn Store the n 32-bit quantities in successive memory words. -
-

SPIM does not distinguish various parts of the data segment (.data, .rdata, and - .sdata).

-

Encoding MIPS Instructions

-

Figure 10.2 explains how a MIPS instruction is encoded in a binary number. - Each column contains instruction encodings for a field (a contiguous group of - bits) from an instruction. The numbers at the left margin are values for a field. - For example, the j opcode has a value of 2 in the opcode field. The text at - the top of a column names a field and specifies which bits it occupies in an - instruction. For example, the op field is contained in bits 26–31 of an instruction. - This field encodes most instructions. However, some groups of instructions use - additional fields to distinguish related instructions. For example, the different - floating-point instructions are specified by bits 0–5. The arrows from the first - column show which opcodes use these additional fields.

-

Instruction Format

-

The rest of this appendix describes both the instructions implemented by - actual MIPS hardware and the pseudoinstructions provided by the MIPS assembler. - The two types of instructions are easily distinguished. Actual instructions - depict the fields in their binary representation. For example, in

-

Addition (with overflow)

- - - - - - - - - - - - - - - - - - - - - - - -
add rd, rs, rt
0 rs rt rd 0 0x20 value
6 5 5 5 5 6 width (bits)
-

The add instruction consists of six fields. Each field’s size in bits is - the small number below the field. This instruction begins with 6 bits of 0s. - Register specifiers begin with an r, so the next field is a 5-bit register - specifier called rs. This is the same register that is the second argument in - the symbolic assembly at the left of this line. Another common field is imm - 16 , which is a 16-bit immediate number.

-

Figure 10.2 MIPS opcode - map. The values of each field are shown to its left. The first column shows - the values in base 10 and the second shows base 16 for the op field (bits 31 - to 26) in the third column. This op field completely specifies the MIPS operation - except for 6 op values: 0, 1, 16, 17, 18, and 19. These operations are determined - by other fields, identified by pointers. The last field (funct) uses “ - f ” to mean “s” if rs = 16 and op = 17 or “d” if rs = 17 and op = - 17. The second field (rs) uses “ z ” to mean “0”, “1”, “2”, or - “3” if op = 16, 17, 18, or 19, respectively. If rs = 16, the operation is specified - elsewhere: if z = 0, the operations are specified in the fourth - field (bits 4 to 0); if z = 1, then the operations are in the last - field with f = s. If rs = 17 and z = 1, then the operations - are in the last field with f = d.

-

Pseudoinstructions follow roughly the same conventions, but omit instruction - encoding information. For example:

-

Multiply (without overflow)

- - - - -
mul rdest, rsrc1, src2 pseudoinstruction
-

In pseudoinstructions, rdest and rsrc1 are registers and src2 is either a - register or an immediate value. In general, the assembler and SPIM translate - a more general form of an instruction (e.g., add $v1, $a0, 0x55) to a specialized - form (e.g., addi $v1, $a0, 0x55).

-

Arithmetic and Logical Instructions

-

Absolute value

- - - - -
abs rdest, rsrc pseudoinstruction
-

Put the absolute value of register rsrc in register rdest.

-

Addition (with overflow)

- - - - - - - - - - - - - - - - - - - - - - -
add rd, rs, rt
0 rs rt rd 0 0x20 value
6 5 5 5 5 6 width (bits)
-

Addition (without overflow)

- - - - - - - - - - - - - - - - - - - - - - -
addu rd, rs, rt
0 rs rt rd 0 0x21 value
6 5 5 5 5 6 width (bits)
-

Put the sum of registers rs and rt into register rd.

-

Addition immediate (with overflow)

- - - - - - - - - - - - - - - - - - -
addi rt, rs, imm
8 rs rt imm value
6 5 5 16 width (bits)
-

Addition immediate (without overflow)

- - - - - - - - - - - - - - - - - - -
addiu rt, rs, imm
9 rs rt imm value
6 5 5 16 width (bits)
-

Put the sum of register rs and the sign-extended immediate into register rt.

-

AND

- - - - - - - - - - - - - - - - - - - - - - -
and rd, rs, rt
0 rs rt rd 0 0x24 value
6 5 5 5 5 6 width (bits)
-

Put the logical AND of registers rs and rt into register rd.

-

AND immediate

- - - - - - - - - - - - - - - - - - -
andi rt, rs, imm
0xc rs rt imm value
6 5 5 16 width (bits)
-

Put the logical AND of register rs and the zero-extended immediate into register rt.

-

Count leading ones

- - - - - - - - - - - - - - - - - - - - - - -
clo rd, rs
0x1c rs 0 rd 0 0x21 value
6 5 5 5 5 6 width (bits)
-

Count leading zeros

- - - - - - - - - - - - - - - - - - - - - - -
clz rd, rs
0x1c rs 0 rd 0 0x20 value
6 5 5 5 5 6 width (bits)
-

Count the number of leading ones (zeros) in the word in register rs and put - the result into register rd. If a word is all ones (zeros), the result is 32. -

-

Divide (with overflow)

- - - - - - - - - - - - - - - - - - - - - - -
div rs, rt
0 rs rt 0 0 0x1a value
6 5 5 5 5 6 width (bits)
-

Divide (without overflow)

- - - - - - - - - - - - - - - - - - - - - - -
divu rs, rt
0 rs rt 0 0 0x1b value
6 5 5 5 5 6 width (bits)
-

Divide register rs by register rt. Leave the quotient in register lo and - the remainder in register hi. Note that if an operand is negative, the remainder - is unspecified by the MIPS architecture and depends on the convention of the - machine on which SPIM is run.

-

Divide (with overflow)

- - - - -
div rdest, rsrc1, src2 pseudoinstruction
-

Divide (without overflow)

- - - - -
divu rdest, rsrc1, src2 pseudoinstruction
-

Put the quotient of register rsrc1 and src2 into register rdest.

-

Multiply

- - - - - - - - - - - - - - - - - - - - - - -
mult rs, rt
0 rs rt 0 0 0x18 value
6 5 5 5 5 6 width (bits)
-

Unsigned multiply

- - - - - - - - - - - - - - - - - - - - - - -
multu rs, rt
0 rs rt 0 0 0x19 value
6 5 5 5 5 6 width (bits)
-

Multiply registers rs and rt. Leave the low-order word of the product in - register lo and the high-order word in register hi.

-

Multiply (without overflow)

- - - - - - - - - - - - - - - - - - - - - - -
mul rd, rs, rt
0x1c rs rt 4d 0 2 value
6 5 5 5 5 6 width (bits)
-

Put the low-order 32 bits of the product of rs and rt into register rd. -

-

Multiply (with overflow)

- - - - -
mulo rdest, rsrc1, src2 pseudoinstruction
-

Unsigned multiply (with overflow)

- - - - -
mulou rdest, rsrc1, src2 pseudoinstruction
-

Put the low-order 32 bits of the product of register rsrc1 and src2 into register rdest.

-

Multiply add

- - - - - - - - - - - - - - - - - - - - - - -
madd rs, rt
0x1c rs rt 0 0 0 value
6 5 5 5 5 6 width (bits)
-

Unsigned multiply add

- - - - - - - - - - - - - - - - - - - - - - -
maddu rs, rt
0x1c rs rt 0 0 1 value
6 5 5 5 5 6 width (bits)
-

Multiply registers rs and rt and add the resulting 64-bit product to the - 64-bit value in the concatenated registers lo and hi.

-

Multiply subtract

- - - - - - - - - - - - - - - - - - - - - - -
msub rs, rt
0x1c rs rt 0 0 4 value
6 5 5 5 5 6 width (bits)
-

Unsigned multiply subtract

- - - - - - - - - - - - - - - - - - - - - - -
msubu rs, rt
0x1c rs rt 0 0 5 value
6 5 5 5 5 6 width (bits)
-

Multiply registers rs and rt and subtract the resulting 64-bit product from - the 64-bit value in the concatenated registers lo and hi.

-

Negate value (with overflow)

- - - - -
neg rdest, rsrc pseudoinstruction
-

Negate value (without overflow)

- - - - -
negu rdest, rsrc pseudoinstruction
-

Put the negative of register rsrc into register rdest.

-

NOR

- - - - - - - - - - - - - - - - - - - - - - -
nor rd, rs, rt
0 rs rt rd 0 0x27 value
6 5 5 5 5 6 width (bits)
-

Put the logical NOR of registers rs and rt into register rd.

-

NOT

- - - - -
not rdest, rsrc pseudoinstruction
-

Put the bitwise logical negation of register rsrc into register rdest.

-

OR

- - - - - - - - - - - - - - - - - - - - - - -
or rd, rs, rt
0 rs rt rd 0 0x25 value
6 5 5 5 5 6 width (bits)
-

Put the logical OR of registers rs and rt into register rd.

-

OR immediate

- - - - - - - - - - - - - - - - - - -
ori rt, rs, imm
0xd rs rt imm value
6 5 5 16 width (bits)
-

Put the logical OR of register rsand the zero-extended immediate into register rt.

-

Remainder

- - - - -
rem rdest, rsrc1, rsrc2 pseudoinstruction
-

Unsigned remainder

- - - - -
remu rdest, rsrc1, rsrc2 pseudoinstruction
-

Put the remainder of register rsrc1 divided by register rsrc2 into register - rdest. Note that if an operand is negative, the remainder is unspecified by - the MIPS architecture and depends on the convention of the machine on which - SPIM is run.

-

Shift left logical

- - - - - - - - - - - - - - - - - - - - - - -
sll rd, rt, shamt
0 0 rt rd shamt 0 value
6 5 5 5 5 6 width (bits)
-

Shift left logical variable

- - - - - - - - - - - - - - - - - - - - - - -
sllv rd, rt, rs
0 rs rt rd 0 4 value
6 5 5 5 5 6 width (bits)
-

Shift right arithmetic

- - - - - - - - - - - - - - - - - - - - - - -
sra rd, rt, shamt
0 0 rt rd shamt 3 value
6 5 5 5 5 6 width (bits)
-

Shift right arithmetic variable

- - - - - - - - - - - - - - - - - - - - - - -
srav rd, rt, rs
0 rs rt rd 0 7 value
6 5 5 5 5 6 width (bits)
-

Shift right logical

- - - - - - - - - - - - - - - - - - - - - - -
srl rd, rt, shamt
0 0 rt rd shamt 2 value
6 5 5 5 5 6 width (bits)
-

Shift right logical variable

- - - - - - - - - - - - - - - - - - - - - - -
srlv rd, rt, rs
0 rs rt rd 0 6 value
6 5 5 5 5 6 width (bits)
-

Shift register rt left (right) by the distance indicated by immediate shamt - or the register rs and put the result in register rd. Note that argument rs - is ignored for sll, sra, and srl.

-

Rotate left

- - - - -
rol rdest, rsrc1, rsrc2 pseudoinstruction
-

Rotate right

- - - - -
ror rdest, rsrc1, rsrc2 pseudoinstruction
-

Rotate register rsrc1 left (right) by the distance indicated by rsrc2 and put the result in register rdest.

-

Subtract (with overflow)

- - - - - - - - - - - - - - - - - - - - - - -
sub rd, rs, rt
0 rs rt rd 0 0x22 value
6 5 5 5 5 6 width (bits)
-

Subtract (without overflow)

- - - - - - - - - - - - - - - - - - - - - - -
sub rd, rs, rt
0 rs rt rd 0 0x23 value
6 5 5 5 5 6 width (bits)
-

Put the difference of registers rs and rt into register rd.

-

Exclusive OR

- - - - - - - - - - - - - - - - - - - - - - -
xor rd, rs, rt
0 rs rt rd 0 0x26 value
6 5 5 5 5 6 width (bits)
-

Put the logical XOR of registers rs and rt into register rd.

-

Exclusive OR immediate

- - - - - - - - - - - - - - - - - - -
xori rt, rs, imm
0xe rs rt imm value
6 5 5 16 width (bits)
-

Put the logical XOR of register rs and the zero-extended immediate into register - rt.

-

Constant-Manipulating Instructions

-

Load upper immediate

- - - - - - - - - - - - - - - - - - -
lui rt, imm
0xf 0rt imm value
6 5 5 16 width (bits)
-

Load the lower halfword of the immediate imm into the upper halfword of register - rt. The lower bits of the register are set to 0.

-

Load immediate

- - - - -
li rdest, imm pseudoinstruction
-

Move the immediate imm into register rdest.

-

Comparison Instructions

-

Set less than

- - - - - - - - - - - - - - - - - - - - - - -
slt rd, rs, rt
0 rs rt rd 0 0x2a value
6 5 5 5 5 6 width (bits)
-

Set less than unsigned

- - - - - - - - - - - - - - - - - - - - - - -
sltu rd, rs, rt
0 rs rt rd 0 0x2b value
6 5 5 5 5 6 width (bits)
-

Set register rd to 1 if register rs is less than rt, and to 0 otherwise.

-

Set less than immediate

- - - - - - - - - - - - - - - - - - -
slti rt, rs, imm
0xa rs rt imm value
6 5 5 16 width (bits)
-

Set less than unsigned immediate

- - - - - - - - - - - - - - - - - - -
sltiu rt, rs, imm
0xb rs rt imm value
6 5 5 16 width (bits)
-

Set register rt to 1 if register rs is less than the sign-extended immediate, - and to 0 otherwise.

-

Set equal

- - - - -
seq rdest, rsrc1, rsrc2 pseudoinstruction
-

Set register rdest to 1 if register rsrc1 equals rsrc2, and to 0 otherwise.

-

Set greater than equal

- - - - -
sge rdest, rsrc1, rsrc2 pseudoinstruction
-

Set greater than equal unsigned

- - - - -
sgeu rdest, rsrc1, rsrc2 pseudoinstruction
-

Set register rdest to 1 if register rsrc1 is greater than or equal to rsrc2, - and to 0 otherwise.

-

Set greater than

- - - - -
sgt rdest, rsrc1, rsrc2 pseudoinstruction
-

Set greater than unsigned

- - - - -
sgtu rdest, rsrc1, rsrc2 pseudoinstruction
-

Set register rdest to 1 if register rsrc1 is greater than rsrc2, and to 0 otherwise.

-

Set less than equal

- - - - -
sle rdest, rsrc1, rsrc2 pseudoinstruction
-

Set less than equal unsigned

- - - - -
sleu rdest, rsrc1, rsrc2 pseudoinstruction
-

Set register rdest to 1 if register rsrc1 is less than or equal to rsrc2, and to 0 otherwise.

-

Set not equal

- - - - -
sne rdest, rsrc1, rsrc2 pseudoinstruction
-

Set register rdestto 1 if register rsrc1is not equal to rsrc2, and to 0 otherwise.

-

Branch Instructions

-

Branch instructions use a signed 16-bit instruction offset field; hence - they can jump 2 15 - instructions (not bytes) forward or - 215 instructions backwards. The jump instruction contains a 26-bit address - field. In actual MIPS processors, branch instructions are delayed branches, - which do not transfer control until the instruction following the branch (its - "delay slot") has executed (see Chapter 6). Delayed branches affect the offset - calculation, since it must be computed relative to the address of the delay - slot instruction (PC + 4), which is when the branch occurs. SPIM does not simulate - this delay slot, unless the -bare or -delayed_branch flags are specified. -

-

In assembly code, offsets are pnot usually specified as numbers. Instead, - an instructions branch to a label, and the assembler computes the distance between - the branch and the target class="instformat" instructions.

-

In MIPS32, all actual (not pseudo) conditional branch instructions have a - "likely" variant (for example, beq’s likely variant is beql), which does - not execute the instruction in the branch’s delay slot if the branch is not - taken. Do not use these instructions; they may be removed in subsequent versions - of the architecture. SPIM implements these instructions, but they are not described - further.

-

Branch instruction

- - - - -
b label pseudoinstruction
-

Unconditionally branch to the instruction at the label.

-

Branch coprocessor false

- - - - - - - - - - - - - - - - - - - - -
bc1f cc, label
0x11 8 cc 0 offset value
6 5 3 2 16 width (bits)
-

Branch coprocessor true

- - - - - - - - - - - - - - - - - - - - -
bc1t cc, label
0x11 8 cc 1 offset value
6 5 3 2 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - the floating point coprocessor’s condition flag numbered cc is false (true). - If cc is omitted from the instruction, condition code flag 0 is assumed.

-

Branch on equal

- - - - - - - - - - - - - - - - - - -
beq rs, rt, label
4 rs rt offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs equals rt.

-

Branch on greater than equal zero

- - - - - - - - - - - - - - - - - - -
bgez rs, label
1 rs 1 offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs is greater than or equal to 0.

-

Branch on greater than equal zero and link

- - - - - - - - - - - - - - - - - - -
bgez rs, label
1 rs 11 offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs is greater than or equal to 0. Save the address of the next instruction - in register 31.

-

Branch on greater than zero

- - - - - - - - - - - - - - - - - - -
bgtz rs, label
7 rs 0 offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs is greater than 0.

-

Branch on less than equal zero

- - - - - - - - - - - - - - - - - - -
blez rs, label
6 rs 0 offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs is less than or equal to 0.

-

Branch on less than and link

- - - - - - - - - - - - - - - - - - -
bltzal rs, label
1 rs 0x10 offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs is less than 0. Save the address of the next instruction in register - 31.

-

Branch on less than zero

- - - - - - - - - - - - - - - - - - -
bltz rs, label
1 rs 0 offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs is less than 0.

-

Branch on not equal

- - - - - - - - - - - - - - - - - - -
bne rs, rt, label
5 rs rt offset value
6 5 5 16 width (bits)
-

Conditionally branch the number of instructions specified by the offset if - register rs is not equal to rt.

-

Branch on equal zero

- - - - -
beqz rsrc, label pseudoinstruction
-

Conditionally branch to the instruction at the label if rsrc equals 0.

-

Branch on greater than equal

- - - - -
bge rsrc1, rsrc2, label pseudoinstruction
-

Branch on greater than equal unsigned

- - - - -
bgeu rsrc1, rsrc2, label pseudoinstruction
-

Conditionally branch to the instruction at the label if register rsrc1 is - greater than or equal to rsrc2.

-

Branch on greater than

- - - - -
bgt rsrc1, src2, label pseudoinstruction
-

Branch on greater than unsigned

- - - - -
bgtu rsrc1, src2, label pseudoinstruction
-

Conditionally branch to the instruction at the label if register rsrc1 is - greater than src2.

-

Branch on less than equal

- - - - -
ble rsrc1, src2, label pseudoinstruction
-

Branch on less than equal unsigned

- - - - -
bleu rsrc1, src2, label pseudoinstruction
-

Conditionally branch to the instruction at the label if register rsrc1is - less than or equal to src2.

-

Branch on less than

- - - - -
blt rsrc1, rsrc2, label pseudoinstruction
-

Branch on less than unsigned

- - - - -
bltu rsrc1, rsrc2, label pseudoinstruction
-

Conditionally branch to the instruction at the label if register rsrc1is - less than rsrc2.

-

Branch on not equal zero

- - - - -
bnez rsrc, label pseudoinstruction
-

Conditionally branch to the instruction at the label if register rsrcis not - equal to 0.

-

Jump Instructions

-

Jump

- - - - - - - - - - - - - - -
j target
2 target value
6 26 width (bits)
-

Unconditionally jump to the instruction at target.

-

Jump and link

- - - - - - - - - - - - - - -
jal target
3 target value
6 26 width (bits)
-

Unconditionally jump to the instruction at target. Save the address of the - next instruction in register $ra.

-

Jump and link register

- - - - - - - - - - - - - - - - - - - - - - -
jalr rs, rd
0 rs 0 rd 0 9 value
6 5 5 5 5 6 width (bits)
-

Unconditionally jump to the instruction whose address is in register rs. - Save the address of the next instruction in register rd (which defaults to 31).

-

Jump register

- - - - - - - - - - - - - - - - - - - - - - -
jr rs
0 rs 0 0 0 8 value
6 5 5 5 5 6 width (bits)
-

Unconditionally jump to the instruction whose address is in register rs.

-

Trap Instructions

-

Trap if equal

- - - - - - - - - - - - - - - - - - - - -
teq rs, rt
0 rs rt 0 0x34 value
6 5 5 10 6 width (bits)
-

If register rs is equal to register rt, raise a Trap exception.

-

Trap if equal immediate

- - - - - - - - - - - - - - - - - - -
teqi rs, imm
1 rs 0xc imm value
6 5 5 16 width (bits)
-

If register rs is equal to the sign extended value imm, raise a Trap exception.

-

Trap if not equal

- - - - - - - - - - - - - - - - - - - - -
tne rs, rt
0 rs rt 0 0x36 value
6 5 5 10 6 width (bits)
-

If register rs is not equal to register rt, raise a Trap exception.

-

Trap if not equal immediate

- - - - - - - - - - - - - - - - - - -
tneqi rs, imm
1 rs 0xe imm value
6 5 5 16 width (bits)
-

If register rs is not equal to the sign extended value imm, - raise a Trap exception.

-

Trap if greater equal

- - - - - - - - - - - - - - - - - - - - -
tge rs, rt
0 rs rt 0 0x30 value
6 5 5 10 6 width (bits)
-

Unsigned trap if greater equal

- - - - - - - - - - - - - - - - - - - - -
tgeu rs, rt
0 rs rt 0 0x31 value
6 5 5 10 6 width (bits)
-

If register rs is greater than or equal to register rt, raise a Trap exception.

-

Trap if greater equal immediate

- - - - - - - - - - - - - - - - - - -
tgei rs, imm
1 rs 8 imm value
6 5 5 16 width (bits)
-

Unsigned trap if greater equal immediate

- - - - - - - - - - - - - - - - - - -
tgeiu rs, imm
1 rs 9 imm value
6 5 5 16 width (bits)
-

If register rs is greater than or equal to the sign extended value imm, raise - a Trap exception.

-

Trap if less than

- - - - - - - - - - - - - - - - - - - - -
tlt rs, rt
0 rs rt 0 0x32 value
6 5 5 10 6 width (bits)
-

Unsigned trap if less than

- - - - - - - - - - - - - - - - - - - - -
tltu rs, rt
0 rs rt 0 0x33 value
6 5 5 10 6 width (bits)
-

If register rs is less than register rt, raise a Trap exception.

-

Trap if less than immediate

- - - - - - - - - - - - - - - - - - -
tlti rs, imm
1 rs 0xa imm value
6 5 5 16 width (bits)
-

Unsigned trap if less than immediate

- - - - - - - - - - - - - - - - - - -
tltiu rs, imm
1 rs 0xb imm value
6 5 5 16 width (bits)
-

If register rs is less than the sign extended value imm, raise a Trap exception.

-

Load Instructions

-

Load address

- - - - -
la rdest, address pseudoinstruction
-

Load computed address —not the contents of the location—into register - rdest.

-

Load byte

- - - - - - - - - - - - - - - - - - -
lb rt, address
0x20 rs rt offset value
6 5 5 16 width (bits)
-

Load unsigned byte

- - - - - - - - - - - - - - - - - - -
lbu rt, address
0x24 rs rt offset value
6 5 5 16 width (bits)
-

Load the byte at address into register rt. The byte is sign-extended - by lb, but not by lbu.

-

Load halfword

- - - - - - - - - - - - - - - - - - -
lh rt, address
0x21 rs rt offset value
6 5 5 16 width (bits)
-

Load unsigned halfword

- - - - - - - - - - - - - - - - - - -
lhu rt, address
0x25 rs rt offset value
6 5 5 16 width (bits)
-

Load the 16-bit quantity (halfword) at address into register rt. The - halfword is sign-extended by lh, but not by lhu.

-

Load word

- - - - - - - - - - - - - - - - - - -
lw rt, address
0x23 rs rt offset value
6 5 5 16 width (bits)
-

Load the 32-bit quantity (word) at address into register rt.

-

Load word coprocessor 1

- - - - - - - - - - - - - - - - - - -
lwc1 ft, address
0x31 rs ft offset value
6 5 5 16 width (bits)
-

Load the word at address into register ft in the floating-point unit.

-

Load word left

- - - - - - - - - - - - - - - - - - -
lwl rt, address
0x22 rs rt offset value
6 5 5 16 width (bits)
-

Load word right

- - - - - - - - - - - - - - - - - - -
lwr rt, address
0x26 rs rt offset value
6 5 5 16 width (bits)
-

Load the left (right) bytes from the word at the possibly unaligned address - into register rt.

-

Load doubleword

- - - - -
ld rdest, address pseudoinstruction
-

Load the 64-bit quantity at address into registers rdest and rdest + 1.

-

Unaligned load halfword

- - - - -
ulh rdest, address pseudoinstruction
-

Unaligned load halfword unsigned

- - - - -
ulhu rdest, address pseudoinstruction
-

Load the 16-bit quantity (halfword) at the possibly unaligned address - into register rdest. The halfword is sign-extended by ulh, but not ulhu.

-

Unaligned load word

- - - - -
ulw rdest, address pseudoinstruction
-

Load the 32-bit quantity (word) at the possibly unaligned address - into register rdest.

-

Load linked

- - - - - - - - - - - - - - - - - - -
ll rt, address
0x30 rs rt offset value
6 5 5 16 width (bits)
-

Load the 32-bit quantity (word) at address into register rt and start - an atomic read-modify-write operation. This operation is completed by a store - conditional (sc) instruction, which will fail if another processor writes into - the block containing the loaded word. Since SPIM does not simulate multiple - processors, the store conditional operation always succeeds.

-

Store Instructions

-

Store byte

- - - - - - - - - - - - - - - - - - -
sb rt, address
0x28 rs rt offset value
6 5 5 16 width (bits)
-

Store the low byte from register rt at address.

-

Store halfword

- - - - - - - - - - - - - - - - - - -
sh rt, address
0x29 rs rt offset value
6 5 5 16 width (bits)
-

Store the low halfword from register rt at address.

-

Store word

- - - - - - - - - - - - - - - - - - -
sw rt, address
0x2b rs rt offset value
6 5 5 16 width (bits)
-

Store the word from register rt at address.

-

Store word coprocessor 1

- - - - - - - - - - - - - - - - - - -
swc1 ft, address
0x31 rs ft offset value
6 5 5 16 width (bits)
-

Store the floating-point value in register ft of floating-point coprocessor - at address.

-

Store double coprocessor 1

- - - - - - - - - - - - - - - - - - -
sdc1 ft, address
0x3d rs ft offset value
6 5 5 16 width (bits)
-

Store the double word floating-point value in registers ft and ft + 1 of - float-ing-point coprocessor at address. Register ft must be even numbered.

-

Store word left

- - - - - - - - - - - - - - - - - - -
swl rt, address
0x2a rs rt offset value
6 5 5 16 width (bits)
-

Store word right

- - - - - - - - - - - - - - - - - - - -
swr rt, address
0x2e rs rt offset value
6 5 5 16 width (bits)
-

Store the left (right) bytes from register rt at the possibly unaligned - address.

-

Store doubleword

- - - - -
sd rsrc, address pseudoinstruction
-

Store the 64-bit quantity in registers rsrc and rsrc + 1 at address .

-

Unaligned store halfword

- - - - -
ush rsrc, address pseudoinstruction
-

Store the low halfword from register rsrc at the possibly unaligned address .

-

Unaligned store word

- - - - -
usw rsrc, address pseudoinstruction
-

Store the word from register rsrc at the possibly unaligned address .

-

Store conditional

- - - - - - - - - - - - - - - - - - -
sc rt, address
0x38 rs rt offset value
6 5 5 16 width (bits)
-

Store the 32-bit quantity (word) in register rt into memory at address - and complete an atomic read-modify-write operation. If this atomic operation - is successful, the memory word is modified and register rt is set to 1. If the - atomic operation fails because another processor wrote to a location in the - block containing the addressed word, this instruction does not modify memory - and writes 0 into register rt. Since SPIM does not simulate multiple processors, - the instruction always succeeds.

-

Data Movement Instructions

-

Move

- - - - -
move rdest, rsrc pseudoinstruction
-

Move register rsrc to rdest.

-

Move from hi

- - - - - - - - - - - - - - - - - - - - - - -
mfhi rd
0 0 0 rd 0 0x10 value
6 5 5 5 5 6 width (bits)
-

Move from lo

- - - - - - - - - - - - - - - - - - - - - - -
mfl rd
0 0 0 rd 0 0x12 value
6 5 5 5 5 6 width (bits)
-

The pmultiply and divide unit produces its result in two additional registers, - hi and lo. These instructions move values to and from these registers. The multiply, - divide, and remainder pse class="instformat"udoinstructions that make this unit appear to operate - on the general registers move the result after the computation finishes.

-

Move the hi (lo) regist class="instformat"er to register rd.

-

Move to hi

- - - - - - - - - - - - - - - - - - - - - - -
mthi rs
0 rs 0 0 0 0x11 value
6 5 5 5 5 6 width (bits)
-

Move to lo

- - - - - - - - - - - - - - - - - - - - - - -
mli rs
0 rs 0 0 0 0x13 value
6 5 5 5 5 6 width (bits)
-

Move register rs to the hi (lo) register.

-

Move from coprocessor 0

- - - - - - - - - - - - - - - - - - - - - - -
mfc0 rt, rd
0x10 0 rt rd 0 0 value
6 5 5 5 5 6 width (bits)
-

Move from coprocessor 1

- - - - - - - - - - - - - - - - - - - - - - -
mfc1 rt, rd
0x11 0 rt rd 0 0 value
6 5 5 5 5 6 width (bits)
-

Coprocessors have their own register sets. These instructions move values - between these registers and the CPU’s registers.

-

Move register rd in a coprocessor (register pfs in the FPU) to CPU register - rt. The floating-point unit is coprocessor 1.

-

Move double from coprocessor 1

- - - - -
mfc1.d rdest, frsrc1 pseudoinstruction
-

Move floating-point registers frsrc1and frsrc1 + 1to CPU registers rdest - and rdest + 1.

-

Move to coprocessor 0

- - - - - - - - - - - - - - - - - - - - - - -
mtc0 rd, rt
0x10 4 rt rd 0 0 value
6 5 5 5 5 6 width (bits)
-

Move to coprocessor 1

- - - - - - - - - - - - - - - - - - - - - - -
mtc1 rt, rd
0x11 4 rt rd 0 0 value
6 5 5 5 5 6 width (bits)
-

Move CPU register rt to register rd in a coprocessor (register fs in the - FPU).

-

Move conditional not zero

- - - - - - - - - - - - - - - - - - - - - - -
movn rd, rs, rt
0 rs rt rd 0 0xb value
6 5 5 5 5 6 width (bits)
-

Move register rs to register rd if register rt is not 0.

-

Move conditional zero

- - - - - - - - - - - - - - - - - - - - - - -
movz rd, rs, rt
0 rs rt rd 0 0xa value
6 5 5 5 5 6 width (bits)
-

Move register rs to register rd if register rt is 0.

-

Move conditional on FP false

- - - - - - - - - - - - - - - - - - - - - - - - -
movf rd, rs, cc
0 rs cc 0 rd 0 1 value
6 5 3 2 5 5 6 width (bits)
-

Move CPU register rs to register rd if FPU condition code flag number - cc is 0. If cc is omitted from the instruction, condition code flag - 0 is assumed.

-

Move conditional on FP true

- - - - - - - - - - - - - - - - - - - - - - - - -
movt rd, rs, cc
0 rs cc 1 rd 0 1 value
6 5 3 2 5 5 6 width (bits)
-

Move CPU register rs to register rd if FPU condition code flag number - cc is 1. If cc is omitted from the instruction, condition code bit - 0 is assumed.

-

Floating-Point Instructions

-

The MIPS has a floating-point coprocessor (numbered 1) that operates on single - precision (32-bit) and double precision (64-bit) floating-point numbers. This - coprocessor has its own registers, which are numbered $f0–$f31. Because these - registers are only 32 bits wide, two of them are required to hold doubles, so - only floating-point registers with even numbers can hold double precision values. - The floating-point coprocessor also has 8 condition code ( cc ) flags, - numbered 0–7, which are set by compare instructions and tested by branch (bc1f - or bc1t) and conditional move instructions.

-

Values are moved in or out of these registers one word (32 bits) at a time - by lwc1, swc1, mtc1, and class="instformat"mfc1 instructions or one double (64 bits) at a time - by ldc1 and sdc1 described above, or pby the l.s, l.d, s.s, and s.d pseudoinstructions - described below.

-

In the actual instruct class="instformat"ions below, bits 21–26 are 0 for single precision and - 1 for double precision. In the pseudoinstructions below, fdest is a floating-point - register (e.g., $f2).

-

Floating-point absolute value double

- - - - - - - - - - - - - - - - - - - - - - -
abs.d fd, fs
0x11 1 0 fs fd 4 value
6 5 5 5 5 6 width (bits)
-

Floating-point absolute value single

- - - - - - - - - - - - - - - - - - - - - - -
abs.s fd, fs
0x11 1 0 fs fd 5 value
6 5 5 5 5 6 width (bits)
-

Compute the absolute value of the floating-point double (single) in register - fs and put it in register fd.

-

Floating-point addition double

- - - - - - - - - - - - - - - - - - - - - - -
add.d fd, fs, ft
0x11 0x11 ft fs fd 0 value
6 5 5 5 5 6 width (bits)
-

Floating-point addition single

- - - - - - - - - - - - - - - - - - - - - - -
add.s fd, fs, ft
0x11 0x10 ft fs fd 0 value
6 5 5 5 5 6 width (bits)
-

Compute the sum of the floating-point doubles (singles) in registers fs and - ft and put it in register fd.

-

Floating-point ceiling to word double

- - - - - - - - - - - - - - - - - - - - - - -
ceil.w.d fd, fs
0x11 0x11 0 fs fd 0xe value
6 5 5 5 5 6 width (bits)
-

Floating-point ceiling to word single

- - - - - - - - - - - - - - - - - - - - - - -
ceil.w.s fd, fs
0x11 0x10 0 fs fd 0xe value
6 5 5 5 5 6 width (bits)
-

Compute the ceiling of the floating-point double (single) in register fs, - convert to a 32-bit fixed-point value, and put the resulting word in register - fd.

-

Compare equal double

- - - - - - - - - - - - - - - - - - - - - - - - - - -
c.e.d cc, fs, ft
0x11 0x11 ft fs cc 0 fc 2 value
6 5 5 5 3 2 2 4 width (bits)
-

Compare equal single

- - - - - - - - - - - - - - - - - - - - - - - - - - -
c.e.s cc, fs, ft
0x11 0x10 ft fs cc 0 fc 2 value
6 5 5 5 3 2 2 4 width (bits)
-

Compare the floating-point double (single) in register fs against the one - in ft and set the floating-point condition flag cc to 1 if they are equal. - If cc is omitted, condition code flag 0 is assumed.

-

Compare less than equal double

- - - - - - - - - - - - - - - - - - - - - - - - - - -
c.le.d cc, fs, ft
0x11 0x11 ft fs cc 0 fc 0xe value
6 5 5 5 3 2 2 4 width (bits)
-

Compare less than equal single

- - - - - - - - - - - - - - - - - - - - - - - - - - -
c.le.s cc, fs, ft
0x11 0x10 ft fs cc 0 fc 0xe value
6 5 5 5 3 2 2 4 width (bits)
-

Compare the floating-point double (single) in register fs against the one - in ft and set the floating-point condition flag cc to 1 if the first is - less than or equal to the second. If cc is omitted, condition code flag - 0 is assumed.

-

Compare less than double

- - - - - - - - - - - - - - - - - - - - - - - - - - -
c.lt.d cc, fs, ft
0x11 0x11 ft fs cc 0 fc 0xc value
6 5 5 5 3 2 2 4 width (bits)
-

Compare less than single

- - - - - - - - - - - - - - - - - - - - - - - - - - -
c.lt.s cc, fs, ft
0x11 0x10 ft fs cc 0 fc 0xc value
6 5 5 5 3 2 2 4 width (bits)
-

Compare the floating-point double (single) in register fs against the one - in ft and set the condition flag cc to 1 if the first is less than the - second. If cc is omitted, condition code flag 0 is assumed.

-

Convert single to double

- - - - - - - - - - - - - - - - - - - - - - -
cvt.d.s fd, fs
0x11 0x10 0 fs fd 0x21 value
6 5 5 5 5 6 width (bits)
-

Convert integer to double

- - - - - - - - - - - - - - - - - - - - - - -
cvt.d.w fd, fs
0x11 0x14 0 fs fd 0x21 value
6 5 5 5 5 6 width (bits)
-

Convert the single precision floating-point number or integer in register - fs to a double (single) precision number and put it in register fd.

-

Convert double to single

- - - - - - - - - - - - - - - - - - - - - - -
cvt.s.d fd, fs
0x11 0x11 0 fs fd 0x20 value
6 5 5 5 5 6 width (bits)
-

Convert integer to single

- - - - - - - - - - - - - - - - - - - - - - -
cvt.s.w fd, fs
0x11 0x14 0 fs fd 0x20 value
6 5 5 5 5 6 width (bits)
-

Convert the double precision floating-point number or integer in register - fsto a single precision number and put it in register fd.

-

Convert double to integer

- - - - - - - - - - - - - - - - - - - - - - -
cvt.w.d fd, fs
0x11 0x11 0 fs fd 0x24 value
6 5 5 5 5 6 width (bits)
-

Convert single to integer

- - - - - - - - - - - - - - - - - - - - - - -
cvt.w.s fd, fs
0x11 0x10 0 fs fd 0x24 value
6 5 5 5 5 6 width (bits)
-

Convert the double or single precision floating-point number in register - fs to an integer and put it in register fd.

-

Floating-point divide double

- - - - - - - - - - - - - - - - - - - - - - -
div.d fd, fs, ft
0x11 0x101ft fs fd 3 value
6 5 5 5 5 6 width (bits)
-

Floating-point divide single

- - - - - - - - - - - - - - - - - - - - - - -
div.s fd, fs, ft
0x11 0x10 ft fs fd 3 value
6 5 5 5 5 6 width (bits)
-

Compute the quotient of the floating-point doubles (singles) in registers - fs and ft and put it in register fd.

-

Floating-point floor to word double

- - - - - - - - - - - - - - - - - - - - - - -
floor.w.d fd, fs
0x11 0x11 0 fs fd 0xf value
6 5 5 5 5 6 width (bits)
-

Floating-point floor to word single

- - - - - - - - - - - - - - - - - - - - - - -
floor.w.s fd, fs
0x11 0x10 0 fs fd 0xf value
6 5 5 5 5 6 width (bits)
-

Compute the floor of the floating-point double (single) in register fs and - put the resulting word in register fd.

-

Load floating-point double

- - - - -
l.d fdest, address pseudoinstruction
-

Load floating-point single

- - - - -
l.s fdest, address pseudoinstruction
-

Load the floating-point double (single) at address into register fdest.

-

Move floating-point double

- - - - - - - - - - - - - - - - - - - - - - -
mov.d fd, fs
0x11 0x11 0 fs fd 6 value
6 5 5 5 5 6 width (bits)
-

Move floating-point single

- - - - - - - - - - - - - - - - - - - - - - -
mov.s fd, fs
0x11 0x10 0 fs fd 6 value
6 5 5 5 5 6 width (bits)
-

Move the floating-point double (single) from register fs to register fd.

-

Move conditional floating-point double false

- - - - - - - - - - - - - - - - - - - - - - - - -
movf.d fd, fs, cc
0x11 0x11 cc 0 fs fd 0x11 value
6 5 3 2 5 5 6 width (bits)
-

Move conditional floating-point single false

- - - - - - - - - - - - - - - - - - - - - - - - -
movf.s fd, fs, cc
0x11 0x10 cc 0 fs fd 0x11 value
6 5 3 2 5 5 6 width (bits)
-

Move the floating-point double (single) from register fs to register fd if - condition code flag cc is 0. If cc is omitted, condition code flag - 0 is assumed.

-

Move conditional floating-point double true

- - - - - - - - - - - - - - - - - - - - - - - - -
movt.d fd, fs, cc
0x11 0x11 cc 1 fs fd 0x11 value
6 5 3 2 5 5 6 width (bits)
-

Move conditional floating-point single true

- - - - - - - - - - - - - - - - - - - - - - - - -
movt.s fd, fs, cc
0x11 0x10 cc 1 fs fd 0x11 value
6 5 3 2 5 5 6 width (bits)
-

Move the floating-point double (single) from register fs to register fd if - condition code flag cc is 1. If cc is omitted, condition code flag - 0 is assumed.

-

Move conditional floating-point double not zero

- - - - - - - - - - - - - - - - - - - - - - -
movn.d fd, fs, rt
0x11 0x11 rt fs fd 0x13 value
6 5 5 5 5 6 width (bits)
-

Move conditional floating-point single not zero

- - - - - - - - - - - - - - - - - - - - - - -
movn.s fd, fs, rt
0x11 0x10 rt fs fd 0x13 value
6 5 5 5 5 6 width (bits)
-

Move the floating-point double (single) from register fs to register fd if - processor register rt is not 0.

-

Move conditional floating-point double zero

- - - - - - - - - - - - - - - - - - - - - - -
movnzd fd, fs, rt
0x11 0x11 rt fs fd 0x12 value
6 5 5 5 5 6 width (bits)
-

Move conditional floating-point single zero

- - - - - - - - - - - - - - - - - - - - - - -
movz.s fd, fs, rt
0x11 0x10 rt fs fd 0x12 value
6 5 5 5 5 6 width (bits)
-

Move the floating-point double (single) from register fs to register fd if - processor register rt is 0.

-

Floating-point multiply double

- - - - - - - - - - - - - - - - - - - - - - -
mul.d fd, fs, ft
0x11 0x11 ft fs fd 2 value
6 5 5 5 5 6 width (bits)
-

Floating-point multiply single

- - - - - - - - - - - - - - - - - - - - - - -
mul.s fd, fs, ft
0x11 0x10 ft fs fd 2 value
6 5 5 5 5 6 width (bits)
-

Compute the product of the floating-point doubles (singles) in registers - fsand ft and put it in register fd.

-

Negate double

- - - - - - - - - - - - - - - - - - - - - - -
neg.d fd, fs
0x11 0x11 0 fs fd 7 value
6 5 5 5 5 6 width (bits)
-

Negate single

- - - - - - - - - - - - - - - - - - - - - - -
neg.s fd, fs
0x11 0x10 0 fs fd 7 value
6 5 5 5 5 6 width (bits)
-

Negate the floating-point double (single) in register fs and put it in register fd.

-

Floating-point round to word double

- - - - - - - - - - - - - - - - - - - - - - -
round.w.d fd, fs
0x11 0x11 0 fs fd 0xc value
6 5 5 5 5 6 width (bits)
-

Floating-point round to word single

- - - - - - - - - - - - - - - - - - - - - - -
round.w.s fd, fs
0x11 0x10 0 fs fd 0xc value
6 5 5 5 5 6 width (bits)
-

Round the floating-point double (single) value in register fs, convert to - a 32bit fixed-point value, and put the resulting word in register fd.

-

Square root double

- - - - - - - - - - - - - - - - - - - - - - -
sqrt.d fd, fs
0x11 0x11 0 fs fd 4 value
6 5 5 5 5 6 width (bits)
-

Square root single

-

Square root double

- - - - - - - - - - - - - - - - - - - - - - -
sqrt.s fd, fs
0x11 0x10 0 fs fd 4 value
6 5 5 5 5 6 width (bits)
-

Compute the square root of the the floating-point double (single) in register - fs and put it in register fd.

-

Store floating-point double

- - - - -
s.d fdest, address pseudoinstruction
-

Store floating-point single

- - - - -
s.s fdest, address pseudoinstruction
-

Store the floating-point double (single) in register fdest at address.

-

Floating-point subtract double

- - - - - - - - - - - - - - - - - - - - - - -
sub.d fd, fs, ft
0x11 0x10 ft fs fd 1 value
6 5 5 5 5 6 width (bits)
-

Floating-point subtract single

- - - - - - - - - - - - - - - - - - - - - - -
sub.s fd, fs, ft
0x11 0x10 ft fs fd 1 value
6 5 5 5 5 6 width (bits)
-

Compute the difference of the floating-point doubles (singles) in registers - fs and ft and put it in register fd.

-

Floating-point truncate to word double

- - - - - - - - - - - - - - - - - - - - - - -
trunc.w.d fd, fs
0x11 0x11 0 fs fd 0xd value
6 5 5 5 5 6 width (bits)
-

Floating-point truncate to word single

- - - - - - - - - - - - - - - - - - - - - - -
trunc.w.s fd, fs
0x11 0x10 0 fs fd 0xd value
6 5 5 5 5 6 width (bits)
-

Truncate the floating-point double (single) value in register fs, convert - to a 32bit fixed-point value, and put the resulting word in register fd.

-

Exception and Interrupt Instructions

-

Exception return

-

Floating-point truncate to word double

- - - - - - - - - - - - - - - - - - -
eret
0x10 1 0 0x18 value
6 1 19 6 width (bits)
-

Set the EXL bit in coprocessor 0’s Status register to 0 and return to the - instruction pointed to by coprocessor 0’s EPC register.

-

System call

- - - - - - - - - - - - - - - - -
syscall
0 0 0xc value
6 20 0xd width (bits)
-

Register $v0 contains the number of the system call (see Figure 9.1) provided by SPIM.

-

Break

- - - - - - - - - - - - - - - - -
break code
0 code 0xd value
6 20 0xd width (bits)
-

Cause exception code. Exception 1 is reserved for the debugger.

-

No operation

- - - - - - - - - - - - - - - - - - - - - - -
nop
0 0 0 0 0 0 value
6 5 5 5 5 6 width (bits)
-

Do nothing.

-

Concluding Remarks

-

Programming in assembly language requires a programmer to trade off helpful - features of high-level languages—such as data structures, type checking, and - control constructs—for complete control over the instructions that a computer - executes. External constraints on some applications, such as response time or - program size, require a programmer to pay close attention to every instruction. - However, the cost of this level of attention is assembly language programs that - are longer, more time-consuming to write, and more difficult to maintain than - high-level language programs.

-

Moreover, three trends are reducing the need to write programs in assembly - language. The first trend is toward the improvement of compilers. Modern compilers - produce code that is typically comparable to the best handwritten code— and - is sometimes better. The second trend is the introduction of new processors - that are not only faster, but in the case of processors that execute multiple - instructions simultaneously, also more difficult to program by hand. In addition, - the rapid evolution of the modern computer favors high-level language programs - that are not tied to a single architecture. Finally, we witness a trend toward - increasingly complex applications—characterized by complex graphic interfaces - and many more features than their predecessors. Large applications are written - by teams of programmers and require the modularity and semantic checking features - provided by high-level languages.

-

Further Reading

-

Aho, A., R. Sethi, and J. Ullman [1985].Compilers: Principles, Techniques, - and Tools, Reading, MA: Addison-Wesley.

-

Slightly dated and lacking in coverage of modern architectures, but still - the standard reference on compilers.

-

Sweetman, D. [1999].See MIPS Run, San Francisco CA: Morgan Kaufmann - Publishers.

-

A complete, detailed, and engaging introduction to the MIPS instruction - set and assembly language program ming on these machines.

-

MIPS, Inc. has excellent free documentation on the MIPS32 architecture on - their website - - http://www.mips.com/products/product-materials/processor/mips-architecture/: -

- -

Exercises

-
    -
  1. [5] <§A.5> Section A.5 described how memory is partitioned on - most MIPS systems. Propose another way of dividing memory that meets the - same goals.
    2. -
  2. [20] <§A.6> Rewrite the code for fact to use fewer instructions. -
    3. -
  3. [5] <§A.7> Is it ever safe for a user program to use registers - $k0 or $k1?
    4. -
  4. [25] <§A.7> Section A.7 contains code for a very simple exception - handler. One serious problem with this handler is that it disables interrupts - for a long time. This means that interrupts from a fast I/O device may be - lost. Write a better exception handler that is interruptable and enables - interrupts as quickly as possible.
    5. -
  5. [15] <§A.7> The simple exception handler always jumps back to - the instruction following the exception. This works fine unless the instruction - that causes the exception is in the delay slot of a branch. In that case, - the next instruction is the target of the branch. Write a better handler - that uses the EPC register to determine which instruction should be executed - after the exception.
    6. -
  6. [5] <§A.9> Using SPIM, write and test an adding machine program - that repeatedly reads in integers and adds them into a running sum. The - program should stop when it gets an input that is 0, printing out the sum - at that point. -
    7. -
  7. [5] <§A.9> Using SPIM , write and test a program that reads in - three integers and prints out the sum of the largest two of the three. You can - break ties arbitrarily.
    8. -
  8. [5] <§A.9> Using SPIM, write and test a program that reads in - a positive integer using the SPIM system calls. If the integer is not positive, - the program should terminate with the message “Invalid Entry”; otherwise - the program should print out the names of the digits of the integers, delimited - by exactly one space. For example, if the user entered “728,” the output - would be “Seven Two Eight.”
    9. -
  9. [25] <§A.9> Write and test a MIPS assembly language program to - compute and print the first 100 prime numbers. A number n is prime - if no numbers except 1 and n divide it evenly. You should implement - two routines: -
      -
    • test_prime (n) Return 1 if n is prime and 0 if n is - not prime.
      • -
    • main () Iterate over the integers, testing if each is prime. Print - the first 100 numbers that are prime.
      • -
    -
    10. -

    Test your programs by running them on SPIM.

    -

  10. A.10 [10] <§§A.6, A.9> Using SPIM, write and test a recursive program - for solving the classic mathematical recreation, the Towers of Hanoi puzzle. - (This will require the use of stack frames to support recursion.) The puzzle - consists of three pegs (1, 2, and 3) and n disks (the number n - can vary; typical values might be in the range from 1 to 8). Disk 1 is smaller - than disk 2, which is in turn smaller than disk 3, and so forth, with disk - n being the largest. Initially, all the disks are on peg 1, starting with - disk n on the bottom, disk n – 1 on top of that, and so forth, up to - disk 1 on the top. The goal is to move all the disks to peg 2. You may only move one - disk at a time, that is, the top disk from any of the three pegs onto the top of either - of the other two pegs. Moreover, there is a constraint: You must not place a larger disk - on top of a smaller disk.

    -

    The C program below can be used to help write your assembly language program. -

    - 
    -        /* move n smallest disks from start to finish using extra */
-        void hanoi(int n, int start, int finish, int extra) {
-          if (n != 0) {
-                hanoi(n-1, start, extra, finish);
-                print_string(“Move disk”);
-                print_int(n);
-                print_string(“from peg”);
-                print_int(start);
-                print_string(“to peg”);
-                print_int(finish);
-                print_string(“.\n”);
-                hanoi(n-1, extra, finish, start);
-          }
-        }
-
-        main () {
-          int n;
-          print_string(“Enter number of disks “);
-          n = read_int();
-          hanoi(n, 1, 2, 3);
-          return 0;
-        }
-
    -
    11. -
-
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program and display the processor's registers and memory. - - - - - - qtspim.qhp - qtspim.qch - - - - qtspim.qch - - - diff --git a/spim-qtbase/QtSpim/help/qtspim.qhp b/spim-qtbase/QtSpim/help/qtspim.qhp deleted file mode 100644 index 7665ca9..0000000 --- a/spim-qtbase/QtSpim/help/qtspim.qhp +++ /dev/null @@ -1,72 +0,0 @@ - - - org.larusstone.qtspim.1.0 - doc - - qtspim - -

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    - - - - - *.html - *.jpg - - - diff --git a/spim-qtbase/QtSpim/help/qtspim_help.html b/spim-qtbase/QtSpim/help/qtspim_help.html deleted file mode 100644 index 3f4810b..0000000 --- a/spim-qtbase/QtSpim/help/qtspim_help.html +++ /dev/null @@ -1,164 +0,0 @@ - - - - - -QtSpim MIPS Simulator - - - - - -

    QtSpim

    -

    QtSpim is a self-contained simulator that will run a MIPS32 -assembly program and display the processor's registers -and memory.

    - -

    QtSpim reads and executes programs written in assembly language for -a MIPS computer. -QtSpim does not execute binary (compiled) programs. To simplify -programming, QtSpim provides a simple debugger and -small set of operating system services.

    - -

    QtSpim implements most of the MIPS32 assembler-extended instruction -set. (It omits the floating point comparisons and rounding modes and the memory -system page tables.) The MIPS architecture has several variants that differ in various -ways (e.g., the MIPS64 architecture supports 64-bit integers and addresses), which -means that QtSpim will not run programs for all MIPS processors.

    - -

    Getting Started with QtSpim

    -

    When QtSpim starts up, it opens a window containing that looks like -the one below. (The features in the window look slightly different on Microsoft -Windows than on Linux or Mac OSX, but all the menus and buttons are in the same place and work -the same way).

    -

    -

    - -

    -QtSpim Main Window

    - -

    QtSpim's main window has three parts:

    -
      -
    1. The narrow pane on the left can display integer or floating-point - registers. Select the set of registers by clicking the tab at the - top of the pane.
      2. -
    2. The wide pane on the right can display the text segment, which contains - instructions, and the data segments. Choose between text and data by - clicking the tab at the top of the pane.
      3. -
    3. The small pane on the bottom is where QtSpim writes its messages.
      4. -
    -All of the panes are dockable, which means that you can grab a pane by its top bar and -drag it out of QtSpim's main window, to put on some other part of your -screen. - -

    QtSpim also opens another window called Console that displays output from your program.

    - -

    Loading a Program

    - -

    Your program should be stored in a file. Assembly code files usually have the extension ".s", as in -file1.s. -To load a file, go to the File menu and select Load File. The -screen will change as the file is loaded, to show the -instructions and data in your program.

    - -

    Another very useful command on the File men is Reinitialize and Load File. It first clears all changes made by a program, -including deleting all of its instructions, and then reloads the last file. This command -works well when debugging a program, as -you can change your program and quickly test it in a fresh computer without closing and restarting QtSpim.

    - -

    Running a Program

    - -

    To start a program running after you have loaded it, go to the Simulator menu and click -Run/Continue. Your program will run -until it finishes or until an error occurs. Either way, you will see the changes that your program -made to the MIPS registers and -memory, and the output your program writes will appear in the Console window.

    - -

    If your program does not work correctly, there are several things you can do. The easiest is to single step between instructions, -which lets you see the changes each instructions makes, one at a time. This command is also on the -Simulator menu and is named -Single Step.

    - -

    Sometimes, however, you need to run your program for a while before something goes wrong, and single stepping would -be too slow. -QtSpim lets you set a breakpoint at a specific instruction, which stops QtSpim before the instruction executes. -So, if you think your problem is in a specific function in your program, set a breakpoint at the first instruction in the function, -and QtSpim will stop everytime the function is invoked.

    -

    You set a breakpoint by right-clicking on the instruction where you -want to stop, and selecting Set Breakpoint. When you are done with the breakpoint, you can remove it by selecting -Clear Breakpoint -instead.

    -

    If you want to stop your program while it is running, go to the Simulator menu and click -Pause. This command stops your program, let you look around, and continue execution if you want. If you do not want to continue -running, click Stop instead.

    -

    When QtSpim stops, either because of an error in your program, a breakpoint, after clicking -Pause, or after single stepping, you can continue the -program running by clicking on Run/Continue (or you can continue single stepping by clicking -Single Step). If you click Stop, -instead of Pause, then clicking Run/Continue will restart your program from the beginning, instead of continuing from where -it stopped. (This is roughly the same way that a music player operates; you can -pause and restart a song, but if you stop the music, you need to start playing -at the beginning.)

    - -

    Display Options

    - -

    The three other menus -- Registers, Text Segment, and -Data Segment -- control QtSpim's displays. For example, the -Register menu controls the way QtSpim displays the contents of registers, -either in binary, base 8 (octal), base 10 (decimal), or base 16 (hexadecimal). -It is often quite convenient to flip between these representations to understand -your data.

    - -

    These menus also let you turn off the display of various parts of the machine, which can help reduce clutter on the screen and -let you concentrate on the parts of the program or data that really matter.

    - -

    Changing Registers and Memory

    -

    You can change the contents of either a register or memory location by -right-clicking on it and selecting Change Register Contents or -Change Memory Contents, respectively.

    -

    Settings

    - -

    The Simulator menu contains the Settings command, which brings up a dialog like this:

    - -

    QtSpim settings dialog

    - -

    The dialog has two tabs. The first, shown above, changes the visual aspects of QtSpim, such as the fonts. -The second looks like this:

    -

    -QtSpim Settings Dialog

    -

    It changes the way that QtSpim operates:

    -
      -
    • Bare machine make QtSpim simulate a bare MIPS - processor.
      • -
    • Accept pseudo instructions enables QtSpim to - accept assembly instructions that MIPS does not actually execute, to make - programming easier.
      • -
    • Enable delayed branches causes QtSpim to execute - the instruction immediateyafter a branch instruction before transfering - control and to calculate the new PC - from the address of this next instruction.
      • -
    • Enable delayed loads causes QtSpim to delay the - value loaded from memory for one instruction after the load - instructions.
      • -
    • Enable mapped IO turns on memory-mapped IO.
      • -
    -

    The button marked Simple Machine enables the most common options (Accept -Pseudo Instructions) that are what most people use. The button marked -Bare -Machine turns on the instructions corresponding to a real MIPS processor (Bare -Machine, Delayed Branches, Delayed Loads).

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deleted file mode 100644 index 29b8525..0000000 --- a/spim-qtbase/QtSpim/macinfo.plist +++ /dev/null @@ -1,22 +0,0 @@ - - - - - CFBundlePackageType - APPL - CFBundleIdentifier - com.larus.qtspim - CFBundleVersion - 9.1.23 - CFBundleSignature - ???? - CFBundleExecutable - QtSpim - NSPrincipalClass - NSApplication - NSHumanReadableCopyright - ???? - CFBundleIconFile - NewIcon - - diff --git a/spim-qtbase/QtSpim/main.cpp b/spim-qtbase/QtSpim/main.cpp deleted file mode 100644 index b9c676c..0000000 --- a/spim-qtbase/QtSpim/main.cpp +++ /dev/null @@ -1,268 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include "spimview.h" - -static QStringList parseCommandLine(QStringList args); - - -SpimView* Window; -QApplication* App; - - -int main(int argc, char *argv[]) -{ - QApplication a(argc, argv); - QCoreApplication::setOrganizationName("LarusStone"); - QCoreApplication::setOrganizationDomain("larusstone.org"); - QCoreApplication::setApplicationName("QtSpim"); - - App = &a; - SpimView win; - Window = &win; - - // Initialize Spim - // - message_out.i = 1; - console_out.i = 2; - - win.SpimConsole->show(); - win.show(); - - QStringList fileNames = parseCommandLine(a.arguments()); - - win.sim_ReinitializeSimulator(); - - for (int i = 0; i < fileNames.length(); i++) - { - if (fileNames[i] != "") - { - read_assembly_file(fileNames[i].toLocal8Bit().data()); - } - } - - win.DisplayTextSegments(true); - win.UpdateDataDisplay(); - - a.setStyleSheet( -" QTabWidget::pane { /* The tab widget frame */" -" border-top: 2px solid #C2C7CB;" -" }" -"" -" QTabWidget::tab-bar {" -" left: 5px; /* move to the right by 5px */" -" }" -"" -" /* Style the tab using the tab sub-control. Note that" -" it reads QTabBar _not_ QTabWidget */" -" QTabBar::tab {" -" background: qlineargradient(x1: 0, y1: 0, x2: 0, y2: 1," -" stop: 0 #E1E1E1, stop: 0.4 #DDDDDD," -" stop: 0.5 #D8D8D8, stop: 1.0 #D3D3D3);" -" border: 2px solid #C4C4C3;" -" border-bottom-color: #C2C7CB; /* same as the pane color */" -" border-top-left-radius: 4px;" -" border-top-right-radius: 4px;" -#ifdef _WIN32 -" min-width: 32ex;" -" padding: 2px;" -#else -" min-width: 8ex;" -" padding: 2px; padding-left:10px; padding-right:10px;" -#endif -" font: bold 12px" -" }" -"" -" QTabBar::tab:selected, QTabBar::tab:hover {" -" background: qlineargradient(x1: 0, y1: 0, x2: 0, y2: 1," -" stop: 0 #fafafa, stop: 0.4 #f4f4f4," -" stop: 0.5 #e7e7e7, stop: 1.0 #fafafa);" -" }" -"" -" QTabBar::tab:selected {" -" border: 2px solid #FF9933;" -" border-bottom-color: #C2C7CB; /* same as pane color */" -" }" -"" -" QTabBar::tab:!selected {" -" margin-top: 2px; /* make non-selected tabs look smaller */" -" }" - ); - - return a.exec(); -} - - -static QStringList parseCommandLine(QStringList args) -{ - for (int i = 1; i < args.length(); i++) - { -#ifdef WIN32 - if (args[i][0] == '/') - { - args[i][0] = '-'; - } -#endif - if ((args[i] == "-asm") || (args[i] == "-a")) - { - bare_machine = false; - delayed_branches = false; - delayed_loads = false; - } - else if ((args[i] == "-bare") || (args[i] == "-b")) - { - bare_machine = true; - delayed_branches = true; - delayed_loads = true; - quiet = true; - } - else if ((args[i] == "-delayed_branches") || (args[i] == "-db")) - { - delayed_branches = true; - } - else if ((args[i] == "-delayed_loads") || (args[i] == "-dl")) - { - delayed_loads = true; - } - else if ((args[i] == "-exception") || (args[i] == "-e")) - { - Window->SetExceptionHandler("", true); - } - else if ((args[i] == "-noexception") || (args[i] == "-ne")) - { - Window->SetExceptionHandler("", false); - } - else if ((args[i] == "-exception_file") || (args[i] == "-ef")) - { - Window->SetExceptionHandler(args[++i], true); - } - else if ((args[i] == "-mapped_io") || (args[i] == "-mio")) - { - mapped_io = true; - } - else if ((args[i] == "-nomapped_io") || (args[i] == "-nmio")) - { - mapped_io = false; - } - else if ((args[i] == "-pseudo") || (args[i] == "-p")) - { - accept_pseudo_insts = true; - } - else if ((args[i] == "-nopseudo") || (args[i] == "-np")) - { - accept_pseudo_insts = false; - } - else if ((args[i] == "-quiet") || (args[i] == "-q")) - { - quiet = true; - } - else if ((args[i] == "-noquiet") || (args[i] == "-nq")) - { - quiet = false; - } - else if ((args[i] == "-trap") || (args[i] == "-t")) - { - Window->SetExceptionHandler("", true); - } - else if ((args[i] == "-notrap") || (args[i] == "-nt")) - { - Window->SetExceptionHandler("", false); - } - else if ((args[i] == "-trap_file") || (args[i] == "-tf")) - { - Window->SetExceptionHandler(args[++i], true); - } - else if ((args[i] == "-stext") || (args[i] == "-st")) - { - initial_text_size = args[++i].toInt(); - } - else if ((args[i] == "-sdata") || (args[i] == "-sd")) - { - initial_data_size = args[++i].toInt(); - } - else if ((args[i] == "-ldata") || (args[i] == "-ld")) - { - initial_data_limit = args[++i].toInt(); - } - else if ((args[i] == "-sstack") || (args[i] == "-ss")) - { - initial_stack_size = args[++i].toInt(); - } - else if ((args[i] == "-lstack") || (args[i] == "-ls")) - { - initial_stack_limit = args[++i].toInt(); - } - else if ((args[i] == "-sktext") || (args[i] == "-skt")) - { - initial_k_text_size = args[++i].toInt(); - } - else if ((args[i] == "-skdata") || (args[i] == "-skd")) - { - initial_k_data_size = args[++i].toInt(); - } - else if ((args[i] == "-lkdata") || (args[i] == "-lkd")) - { - initial_k_data_limit = args[++i].toInt(); - } - else if ((args[i] == "-file") || (args[i] == "-f")) - { - return args.mid(i+1); - } - else if (args[i][0] != '-') - { - return args.mid(i); - } - else - { - error ("Unknown argument: %s (ignored)\n\n\ - Usage: QtSpim\n\ - -bare Bare machine (no pseudo-ops, delayed branches and loads)\n\ - -asm Extended machine (pseudo-ops, no delayed branches and loads) (default)\n\ - -delayed_branches Execute delayed branches\n\ - -delayed_loads Execute delayed loads\n\ - -exception Load exception handler (default)\n\ - -noexception Do not load exception handler\n\ - -exception_file Specify exception handler in place of default\n\ - -quiet Do not print warnings\n\ - -noquiet Print warnings (default)\n\ - -mapped_io Enable memory-mapped IO\n\ - -nomapped_io Do not enable memory-mapped IO (default)\n\ - -file ... Assembly code file(s)\n\ - \n\ - If argument does not start with a '-', it and all subsequent arguments are file names.\n", - args[i].toLocal8Bit().data()); - } - } - return QStringList(); -} diff --git a/spim-qtbase/QtSpim/menu.cpp b/spim-qtbase/QtSpim/menu.cpp deleted file mode 100644 index 6811bf1..0000000 --- a/spim-qtbase/QtSpim/menu.cpp +++ /dev/null @@ -1,875 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2017, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spimview.h" -#include "ui_savelogfile.h" -#include "ui_printwindows.h" -#include "ui_runparams.h" -#include "ui_settings.h" -#include "ui_breakpoint.h" -#include "spim_settings.h" -#include "version.h" - - -#include -#define QT_USE_FAST_CONCATENATION -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -// -// Menu functions -// - - - -// File menu -// - -void SpimView::file_LoadFile() -{ - QString file; - if (((QAction*)sender())->objectName() != "action_File_Load" - && ((QAction*)sender())->objectName() != "action_File_Reload") - { - file = ((QAction*)sender())->text(); // Recent file menu entry's names are file names - } - else - { - file = QFileDialog::getOpenFileName(this, - "Open Assembly Code", - st_recentFiles[0], - "Assembly (*.a *.s *.asm);;Text files (*.txt)"); - } - if (!file.isNull()) - { - read_assembly_file(file.toLocal8Bit().data()); - st_recentFiles.removeAll(file); - st_recentFiles.prepend(file); - rebuildRecentFilesMenu(); - - DisplayTextSegments(true); - DisplayDataSegments(false); - } -} - - -void SpimView::file_ReloadFile() -{ - sim_ReinitializeSimulator(); - file_LoadFile(); -} - - -void SpimView::rebuildRecentFilesMenu() -{ - ui->menuRecent_Files->clear(); - int i; - for (i = 0; i < st_recentFilesLength; i++) - { - QAction* action = ui->menuRecent_Files->addAction(st_recentFiles[i]); - QObject::connect(action, SIGNAL(triggered(bool)), this, SLOT(file_LoadFile())); - } -} - - -void SpimView::file_SaveLogFile() -{ - static QDialog* saveLogFileDialog; - static Ui::SaveLogFileDialog* slf; - - if (saveLogFileDialog == NULL) - { - saveLogFileDialog = new QDialog(); - slf = new Ui::SaveLogFileDialog(); - slf->setupUi(saveLogFileDialog); - - QFileDialog* fb = new QFileDialog(0, - "Save To Log File", - "", - "Text files (*.txt);; All (*)"); - QObject::connect(slf->saveFileToolButton, SIGNAL(clicked()), fb, SLOT(exec())); - QObject::connect(fb, SIGNAL(fileSelected(QString)), slf->SaveLineEdit, SLOT(setText(QString))); - } - - if (saveLogFileDialog->exec() == QDialog::Accepted) - { - if (!slf->SaveLineEdit->text().isNull()) - { - QFile file(slf->SaveLineEdit->text()); - file.open(QIODevice::WriteOnly | QIODevice::Truncate); - QTextStream outFile(&file); - - if (slf->RegsCheckBox->isChecked()) - { - outFile << ui->IntRegDockWidget->findChild("IntRegTextEdit")->toPlainText(); - outFile << "\n\n"; - } - if (slf->TextCheckBox->isChecked()) - { - outFile << ui->TextSegDockWidget->findChild("TextSegmentTextEdit")->toPlainText(); - outFile << "\n\n"; - } - if (slf->DataCheckBox->isChecked()) - { - outFile << ui->DataSegDockWidget->findChild("DataSegmentTextEdit")->toPlainText(); - outFile << "\n\n"; - } - if (slf->ConsoleCheckBox->isChecked()) - { - outFile << SpimConsole->toPlainText(); - } - - file.close(); - } - } -} - - -void SpimView::file_Print() -{ - static QDialog* printFileDialog; - static Ui::PrintWindowsDialog* pwd; - - if (printFileDialog == NULL) - { - printFileDialog = new QDialog(); - pwd = new Ui::PrintWindowsDialog(); - pwd->setupUi(printFileDialog); - } - - if (printFileDialog->exec() == QDialog::Accepted) - { - QPrinter printer; - QPrintDialog printDialog(&printer, this); - printDialog.setWindowTitle("Print Windows"); - - if (printDialog.exec() == QDialog::Accepted) - { - - if (pwd->RegsCheckBox->isChecked()) - { - ui->IntRegDockWidget->findChild("IntRegTextEdit")->print(&printer); - } - if (pwd->TextCheckBox->isChecked()) - { - ui->TextSegDockWidget->findChild("TextSegmentTextEdit")->print(&printer); - } - if (pwd->DataCheckBox->isChecked()) - { - ui->DataSegDockWidget->findChild("DataSegmentTextEdit")->print(&printer); - } - if (pwd->ConsoleCheckBox->isChecked()) - { - SpimConsole->print(&printer); - } - } - } -} - - -void SpimView::file_Exit() -{ -#if 0 - QMessageBox msgBox(QMessageBox::Question, "Exit", "Exit?", QMessageBox::Ok | QMessageBox::Cancel); - msgBox.setDefaultButton(QMessageBox::Ok); - if (msgBox.exec()) - { - this->SaveStateAndExit(0); - } -#endif - this->SaveStateAndExit(0); -} - - - -// Simulator menu -// - -void SpimView::sim_ClearRegisters() -{ - initialize_registers(); - - DisplayIntRegisters(); - DisplayFPRegisters(); -} - - -void SpimView::sim_ReinitializeSimulator() -{ - write_output(message_out, "
    Memory and registers cleared\n\n"); - InitializeWorld(); - SpimConsole->Clear(); - initStack(); - - SetOutputColor("green"); - write_startup_message(); - write_output(message_out, - "QtSPIM is linked to the Qt library, which is distributed under the GNU Lesser General Public License version 3 and version 2.1.\n"); - SetOutputColor("black"); - - CaptureIntRegisters(); - CaptureSFPRegisters(); - CaptureDFPRegisters(); - - DisplayTextSegments(true); - UpdateDataDisplay(); - - // Scroll to top of windows - // - regTextEdit* rte = ui->IntRegDockWidget->findChild("IntRegTextEdit"); - rte->verticalScrollBar()->setValue(rte->verticalScrollBar()->minimum()); - rte = ui->FPRegDockWidget->findChild("FPRegTextEdit"); - rte->verticalScrollBar()->setValue(rte->verticalScrollBar()->minimum()); - textTextEdit* tte = ui->TextSegDockWidget->findChild("TextSegmentTextEdit"); - tte->verticalScrollBar()->setValue(tte->verticalScrollBar()->minimum()); - dataTextEdit* dte = ui->DataSegDockWidget->findChild("DataSegmentTextEdit"); - dte->verticalScrollBar()->setValue(dte->verticalScrollBar()->minimum()); -} - - -void SpimView::sim_SetRunParameters() -{ - QDialog d; - Ui::SetRunParametersDialog srp; - srp.setupUi(&d); - - // Default values: - // - srp.addressLineEdit->setText(QString("0x") + formatAddress(st_startAddress)); - srp.argsLineEdit->setText(st_commandLine); - - if (d.exec() == QDialog::Accepted) - { - if (!srp.addressLineEdit->text().isNull()) - { - bool ok; - st_startAddress = srp.addressLineEdit->text().toInt(&ok, 0); - } - if (!srp.argsLineEdit->text().isNull()) - { - st_commandLine = srp.argsLineEdit->text(); - } - } -} - - -void SpimView::sim_Run() -{ - initializePCAndStack(); - - force_break = false; - updateStatus(RUNNING); - while (!force_break && programStatus == RUNNING) - { - executeProgram(PC, 100000, false, false); - App->processEvents(); // Check for events in midst of long computation - } - updateStatus(IDLE); - UpdateDataDisplay(); -} - - -void SpimView::sim_Pause() -{ - force_break = true; - updateStatus(PAUSED); - UpdateDataDisplay(); -} - - -void SpimView::sim_Stop() -{ - force_break = true; - updateStatus(STOPPED); - UpdateDataDisplay(); -} - - -void SpimView::sim_SingleStep() -{ - initializePCAndStack(); - - force_break = false; - updateStatus(SINGLESTEP); - executeProgram(PC, 1, false, false); - UpdateDataDisplay(); -} - - -void SpimView::initializePCAndStack() -{ - if ((programStatus == STOPPED && !force_break) || PC == 0) - { - if (st_startAddress == 0) - { - st_startAddress = starting_address(); - } - PC = st_startAddress; - initStack(); - } -} - - -void SpimView::initStack() -{ - // Prepend file name to arg list - // - initialize_stack((st_recentFiles[0] + " " + st_commandLine).toLocal8Bit().data()); -} - - -void SpimView::updateStatus(PROGSTATE status) -{ - programStatus = status; - switch (programStatus) - { - case IDLE: - Window->statusBar()->showMessage(""); - break; - - case STOPPED: - Window->statusBar()->showMessage("Stopped"); - break; - - case PAUSED: - Window->statusBar()->showMessage("Paused"); - break; - - case RUNNING: - Window->statusBar()->showMessage("Running"); - break; - - case SINGLESTEP: - Window->statusBar()->showMessage("Single Step"); - break; - - default: - Window->statusBar()->showMessage("?"); - break; - } -} - - -void SpimView::executeProgram(mem_addr pc, int steps, bool display, bool contBkpt) -{ - bool continuable; - bool breakpointEncountered = run_program(pc, steps, display, contBkpt, &continuable); - - highlightInstruction(PC); - - if (breakpointEncountered) - { - static QDialog* breakpointDialog; - static Ui::BreakpointDialog* bpd; - - if (bpd == NULL) - { - breakpointDialog = new QDialog(); - bpd = new Ui::BreakpointDialog(); - bpd->setupUi(breakpointDialog); - - connect(bpd->continuePushButton, SIGNAL(clicked()), this, SLOT(continueBreakpoint())); - connect(bpd->singleStepPushButton, SIGNAL(clicked()), this, SLOT(singleStepBreakpoint())); - connect(bpd->abortPushButton, SIGNAL(clicked()), this, SLOT(abortBreakpoint())); - } - bpd->label->setText("Execution stopped at breakpoint at " + QString("0x") + formatAddress(PC)); - breakpointDialog->show(); - } - else if (!continuable) - { - updateStatus(STOPPED); - } -} - - -void SpimView::continueBreakpoint() -{ - bool continuable; - run_program(PC, 1, false, true, &continuable); // Execute instruction replaced by breakpoint - highlightInstruction(PC); - UpdateDataDisplay(); - updateStatus((continuable == 1) ? RUNNING : STOPPED); -} - - -void SpimView::singleStepBreakpoint() -{ - bool continuable; - run_program(PC, 1, false, true, &continuable); // Execute instruction replaced by breakpoint - highlightInstruction(PC); - UpdateDataDisplay(); - updateStatus((continuable == 1) ? SINGLESTEP : STOPPED); -} - - -void SpimView::abortBreakpoint() -{ - updateStatus(STOPPED); -} - - -void SpimView::sim_DisplaySymbols() -{ - WriteOutput("
    "); - print_symbols(); -} - - -void SpimView::sim_Settings() -{ - QDialog d; - Ui::SpimSettingDialog sd; - sd.setupUi(&d); - - sd.bareMachineCheckBox->setChecked(bare_machine); - sd.pseudoInstCheckBox->setChecked(accept_pseudo_insts); - sd.delayedBranchCheckBox->setChecked(delayed_branches); - sd.delayedLoadCheckBox->setChecked(delayed_loads); - sd.mappedIOCheckBox->setChecked(mapped_io); - - QObject::connect(sd.simplePushButton, SIGNAL(clicked()), sd.bareMachineCheckBox, SLOT(unset())); - QObject::connect(sd.simplePushButton, SIGNAL(clicked()), sd.pseudoInstCheckBox, SLOT(set())); - QObject::connect(sd.simplePushButton, SIGNAL(clicked()), sd.delayedBranchCheckBox, SLOT(unset())); - QObject::connect(sd.simplePushButton, SIGNAL(clicked()), sd.delayedLoadCheckBox, SLOT(unset())); - QObject::connect(sd.barePushButton, SIGNAL(clicked()), sd.bareMachineCheckBox, SLOT(set())); - QObject::connect(sd.barePushButton, SIGNAL(clicked()), sd.pseudoInstCheckBox, SLOT(unset())); - QObject::connect(sd.barePushButton, SIGNAL(clicked()), sd.delayedBranchCheckBox, SLOT(set())); - QObject::connect(sd.barePushButton, SIGNAL(clicked()), sd.delayedLoadCheckBox, SLOT(set())); - - sd.loadExceptionHandlerCheckBox->setChecked(st_loadExceptionHandler); - sd.exceptionHandlerLineEdit->setText(st_exceptionHandlerFileName); - QFileDialog exceptionFileDialog(0, - "Open Exception File", - st_exceptionHandlerFileName, - "Assembly (*.a *.s *.asm);;Text files (*.txt)"); - QObject::connect(sd.exceptionHandlerToolButton, SIGNAL(clicked()), &exceptionFileDialog, SLOT(exec())); - - // Mapper from exceptionHandlerResetButton clicked() SIGNAL to exceptionHandlerLineEdit setText() SLOT - QSignalMapper *exceptionHandlerResetButtonMapper = new QSignalMapper(); - // Connect exceptionHandlerResetButtonMapper to exceptionHandlerLineEdit - QObject::connect(exceptionHandlerResetButtonMapper, SIGNAL(mapped(const QString&)), - sd.exceptionHandlerLineEdit, SLOT(setText(const QString&))); - // Connect exceptionHandlerResetButton to exceptionHandlerResetButtonMapper - QObject::connect(sd.exceptionHandlerResetButton, SIGNAL(clicked()), exceptionHandlerResetButtonMapper, SLOT(map())); - // Set QString signal to emit when exceptionHandlerResetButton clicked - exceptionHandlerResetButtonMapper->setMapping(sd.exceptionHandlerResetButton, stdExceptionHandler); - QObject::connect(&exceptionFileDialog, SIGNAL(fileSelected(QString)), - sd.exceptionHandlerLineEdit, SLOT(setText(QString))); - - sd.recentFilesLineEdit->setText(QString::number(st_recentFilesLength, 10)); - sd.quietCheckBox->setChecked(quiet); - - sd.regWinFontLineEdit->setText(st_regWinFont.family()); - QFontDialog* regWinFontDialog = new QFontDialog(st_regWinFont); - QObject::connect(sd.regWinFontToolButton, SIGNAL(clicked()), regWinFontDialog, SLOT(exec())); - QObject::connect(regWinFontDialog, SIGNAL(fontSelected(QFont)), &sd, SLOT(setRegWinFont(QFont))); - - sd.regWinFontColorLineEdit->setText(st_regWinFontColor.name()); - QColorDialog* regWinColorDialog = new QColorDialog(st_regWinFontColor); - QObject::connect(sd.regWinFontColorToolButton, SIGNAL(clicked()), regWinColorDialog, SLOT(exec())); - QObject::connect(regWinColorDialog, SIGNAL(colorSelected(QColor)), &sd, SLOT(setRegWinColor(QColor))); - - sd.regWinBackgroundLineEdit->setText(st_regWinBackgroundColor.name()); - QColorDialog* regWinBackgroundDialog = new QColorDialog(st_regWinBackgroundColor); - QObject::connect(sd.regWinBackgroundToolButton, SIGNAL(clicked()), regWinBackgroundDialog, SLOT(exec())); - QObject::connect(regWinBackgroundDialog, SIGNAL(colorSelected(QColor)), &sd, SLOT(setRegWinBackground(QColor))); - - sd.textWinFontLineEdit->setText(st_textWinFont.family()); - QFontDialog* textWinFontDialog = new QFontDialog(st_textWinFont); - QObject::connect(sd.textWinFontToolButton, SIGNAL(clicked()), textWinFontDialog, SLOT(exec())); - QObject::connect(textWinFontDialog, SIGNAL(fontSelected(QFont)), &sd, SLOT(setTextWinFont(QFont))); - - sd.textWinFontColorLineEdit->setText(st_textWinFontColor.name()); - QColorDialog* textWinColorDialog = new QColorDialog(st_textWinFontColor); - QObject::connect(sd.textWinFontColorToolButton, SIGNAL(clicked()), textWinColorDialog, SLOT(exec())); - QObject::connect(textWinColorDialog, SIGNAL(colorSelected(QColor)), &sd, SLOT(setTextWinColor(QColor))); - - sd.textWinBackgroundLineEdit->setText(st_textWinBackgroundColor.name()); - QColorDialog* textWinBackgroundDialog = new QColorDialog(st_textWinBackgroundColor); - QObject::connect(sd.textWinBackgroundToolButton, SIGNAL(clicked()), textWinBackgroundDialog, SLOT(exec())); - QObject::connect(textWinBackgroundDialog, SIGNAL(colorSelected(QColor)), &sd, SLOT(setTextWinBackground(QColor))); - - if (d.exec() == QDialog::Accepted) - { - bare_machine = sd.bareMachineCheckBox->isChecked(); - accept_pseudo_insts = sd.pseudoInstCheckBox->isChecked(); - delayed_branches = sd.delayedBranchCheckBox->isChecked(); - delayed_loads = sd.delayedLoadCheckBox->isChecked(); - mapped_io = sd.mappedIOCheckBox->isChecked(); - - st_loadExceptionHandler = sd.loadExceptionHandlerCheckBox->isChecked(); - st_exceptionHandlerFileName = sd.exceptionHandlerLineEdit->text(); - - st_recentFilesLength = sd.recentFilesLineEdit->text().toInt(); - quiet = sd.quietCheckBox->isChecked(); - if (st_recentFilesLength <= 0 || st_recentFilesLength > 20) - { - st_recentFilesLength = 4; - } - - if (sd.regWinFont != NULL) - { - st_regWinFont = *sd.regWinFont; - } - if (sd.regWinColor != NULL) - { - st_regWinFontColor = *sd.regWinColor; - } - if (sd.regWinBackground != NULL) - { - st_regWinBackgroundColor = *sd.regWinBackground; - } - - if (sd.textWinFont != NULL) - { - st_textWinFont = *sd.textWinFont; - } - if (sd.textWinColor != NULL) - { - st_textWinFontColor = *sd.textWinColor; - } - if (sd.textWinBackground != NULL) - { - st_textWinBackgroundColor = *sd.textWinBackground; - } - - DisplayTextSegments(true); - UpdateDataDisplay(); - } -} - - -// Registers menu -// - -void SpimView::reg_DisplayBinary() -{ - st_regDisplayBase = 2; - setCheckedRegBase(st_regDisplayBase); - DisplayIntRegisters(); - DisplayFPRegisters(); -} - - -void SpimView::reg_DisplayDecimal() -{ - st_regDisplayBase = 10; - setCheckedRegBase(st_regDisplayBase); - DisplayIntRegisters(); - DisplayFPRegisters(); -} - - -void SpimView::reg_DisplayHex() -{ - st_regDisplayBase = 16; - setCheckedRegBase(st_regDisplayBase); - DisplayIntRegisters(); - DisplayFPRegisters(); -} - - -int SpimView::setCheckedRegBase(int base) -{ - return setBaseInternal(base, - ui->action_Reg_DisplayBinary, - ui->action_Reg_DisplayDecimal, - ui->action_Reg_DisplayHex); -} - - -int SpimView::setBaseInternal(int base, QAction* actionBinary, QAction* actionDecimal, QAction* actionHex) -{ - actionBinary->setChecked(false); - actionDecimal->setChecked(false); - actionHex->setChecked(false); - - switch (base) - { - case 2: - actionBinary->setChecked(true); - return base; - - case 10: - actionDecimal->setChecked(true); - return base; - - case 16: - actionHex->setChecked(true); - return base; - - default: - actionHex->setChecked(true); - return 16; - } -} - - -// Text menu -// - -void SpimView::text_DisplayUserText() -{ - bool changed = st_showUserTextSegment == ui->action_Text_DisplayUserText->isChecked(); - st_showUserTextSegment = ui->action_Text_DisplayUserText->isChecked(); - DisplayTextSegments(changed); -} - - -void SpimView::text_DisplayKernelText() -{ - bool changed = st_showKernelTextSegment == ui->action_Text_DisplayKernelText->isChecked(); - st_showKernelTextSegment = ui->action_Text_DisplayKernelText->isChecked(); - DisplayTextSegments(changed); -} - - -void SpimView::text_DisplayComments() -{ - bool changed = st_showTextComments == ui->action_Text_DisplayComments->isChecked(); - st_showTextComments = ui->action_Text_DisplayComments->isChecked(); - DisplayTextSegments(changed); -} - - -void SpimView::text_DisplayInstructionValue() -{ - bool changed = st_showTextDisassembly == ui->action_Text_DisplayInstructionValue->isChecked(); - - st_showTextDisassembly = ui->action_Text_DisplayInstructionValue->isChecked(); - DisplayTextSegments(changed); -} - - - -// Data menu -// - -void SpimView::data_DisplayUserData() -{ - st_showUserDataSegment = ui->action_Data_DisplayUserData->isChecked(); - DisplayDataSegments(true); -} - - -void SpimView::data_DisplayUserStack() -{ - st_showUserStackSegment = ui->action_Data_DisplayUserStack->isChecked(); - DisplayDataSegments(true); -} - - -void SpimView::data_DisplayKernelData() -{ - st_showKernelDataSegment = ui->action_Data_DisplayKernelData->isChecked(); - DisplayDataSegments(true); -} - - -void SpimView::data_DisplayBinary() -{ - st_dataSegmentDisplayBase = 2; - setCheckedDataSegmentDisplayBase(st_dataSegmentDisplayBase); - DisplayDataSegments(true); -} - - -void SpimView::data_DisplayDecimal() -{ - st_dataSegmentDisplayBase = 10; - setCheckedDataSegmentDisplayBase(st_dataSegmentDisplayBase); - DisplayDataSegments(true); -} - - -void SpimView::data_DisplayHex() -{ - st_dataSegmentDisplayBase = 16; - setCheckedDataSegmentDisplayBase(st_dataSegmentDisplayBase); - DisplayDataSegments(true); -} - - -int SpimView::setCheckedDataSegmentDisplayBase(int base) -{ - return setBaseInternal(base, - ui->action_Data_DisplayBinary, - ui->action_Data_DisplayDecimal, - ui->action_Data_DisplayHex); -} - - -// Window menu -// - -void winUpDown(QObject* sender, QWidget* widget) -{ - QAction* act = (QAction*)sender; - if (act->isChecked()) - { - widget->show(); - } - else - { - widget->hide(); - } -} - - -void SpimView::win_IntRegisters() -{ - winUpDown(sender(), ui->IntRegDockWidget); -} - - -void SpimView::win_FPRegisters() -{ - winUpDown(sender(), ui->FPRegDockWidget); -} - - -void SpimView::win_TextSegment() -{ - winUpDown(sender(), ui->TextSegDockWidget); -} - - -void SpimView::win_DataSegment() -{ - winUpDown(sender(), ui->DataSegDockWidget); -} - - -void SpimView::win_Console() -{ - winUpDown(sender(), SpimConsole); -} - - -void SpimView::win_Tile() -{ - ui->IntRegDockWidget->show(); - ui->action_Win_IntRegisters->setChecked(true); - ui->FPRegDockWidget->show(); - ui->action_Win_FPRegisters->setChecked(true); - ui->TextSegDockWidget->show(); - ui->action_Win_TextSegment->setChecked(true); - ui->DataSegDockWidget->show(); - ui->action_Win_DataSegment->setChecked(true); - - ui->IntRegDockWidget->setFloating(false); - ui->FPRegDockWidget->setFloating(false); - tabifyDockWidget(ui->FPRegDockWidget, ui->IntRegDockWidget); - ui->TextSegDockWidget->setFloating(false); - ui->DataSegDockWidget->setFloating(false); - tabifyDockWidget(ui->DataSegDockWidget, ui->TextSegDockWidget); -} - - -// Help menu -// - -void SpimView::help_ViewHelp() -{ - QProcess *process = new QProcess; - QStringList args; - - QString helpFile[] = {qgetenv("PROGRAMFILES(x86)") + QString("/QtSpim/help/qtspim.qhc"), // Windows - QString("/Applications/QtSpim.app/Contents/Resources/doc/qtspim.qhc"), // Mac - QString("/usr/lib/qtspim/help/qtspim.qhc"), // Linux - 0}; - - int i; - for (i = 0; helpFile[i] != 0; i += 1) - { - QFileInfo fi1(helpFile[i]); - if (fi1.exists()) - { - args << QString("-collectionFile") << QString(helpFile[i]); - break; - } - } - - if (helpFile[i] == 0) - { - QMessageBox msgBox; - msgBox.setText("Cannot find QtSpim help file. Check installation."); - msgBox.exec(); - return; - } - - char* assistant[] = {"assistant", // Windows - "/Applications/QtSpim.app/Contents/MacOS/Assistant", // Mac - "/usr/lib/qtspim/bin/assistant", // Linux - 0}; - - process->start(QLatin1String(assistant[i]), args); - if (!process->waitForStarted()) - { - QMessageBox msgBox; - msgBox.setText("Cannot start help browser (Qt assistant). Check installation."); - msgBox.exec(); - } -} - - -void SpimView::help_AboutSPIM() -{ - QMessageBox box(QMessageBox::NoIcon, - "About QtSpim", - QString("" - "
    QtSpim
    " - "
    " - "") - + QString("

    ") + QString(SPIM_VERSION) + QString("

    ") - + QString ("

    SPIM is a simulator of the MIPS R3000 processor.

    " - "

    Copyright (c) 1990-2015, James R. Larus (larus@larusstone.org).

    " - "

    SPIM is distributed under a BSD license.

    " - "

    For more information, source code, and binaries:

    " - "

    https://sourceforge.net/projects/spimsimulator/

    " - "

    QtSPIM is linked to the Qt library, which is distributed under the GNU Lesser General Public License version 3 and GNU Lesser General Public License version 2.1.

    " -"

    GNU Lesser General Public License, version 2.1

    " -"

    GNU Lesser General Public License, version 3

    " -"    "), - QMessageBox::Ok); - box.exec(); -} diff --git a/spim-qtbase/QtSpim/printwindows.ui b/spim-qtbase/QtSpim/printwindows.ui deleted file mode 100644 index 97ece73..0000000 --- a/spim-qtbase/QtSpim/printwindows.ui +++ /dev/null @@ -1,150 +0,0 @@ - - - - - - - PrintWindowsDialog - - - - 0 - 0 - 297 - 174 - - - - Print Windows - - - - - 10 - 10 - 261 - 121 - - - - - - - Print windows - - - - - - - Registers - - - - - - - Text Segments - - - - - - - Data Segments - - - - - - - Console - - - - - - - - - -10 - 140 - 273 - 23 - - - - QDialogButtonBox::Cancel|QDialogButtonBox::Ok - - - true - - - - - - - buttonBox - accepted() - PrintWindowsDialog - accept() - - - 126 - 151 - - - 148 - 86 - - - - - buttonBox - rejected() - PrintWindowsDialog - reject() - - - 126 - 151 - - - 148 - 86 - - - - - diff --git a/spim-qtbase/QtSpim/qtspim.rc b/spim-qtbase/QtSpim/qtspim.rc deleted file mode 100644 index d862c43..0000000 --- a/spim-qtbase/QtSpim/qtspim.rc +++ /dev/null @@ -1 +0,0 @@ -IDI_ICON1 ICON DISCARDABLE "windows_images/NewIcon.ico" \ No newline at end of file diff --git a/spim-qtbase/QtSpim/regtextedit.h b/spim-qtbase/QtSpim/regtextedit.h deleted file mode 100644 index 9be4766..0000000 --- a/spim-qtbase/QtSpim/regtextedit.h +++ /dev/null @@ -1,61 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include - -class regTextEdit : public QPlainTextEdit -{ - Q_OBJECT - -public: - regTextEdit(); - void contextMenuEvent(QContextMenuEvent* event); - QAction* action_Context_ChangeValue; - - bool isIntRegs; - -protected: - virtual void closeEvent(QCloseEvent* event); - virtual void hideEvent(QHideEvent* event); - virtual void showEvent(QShowEvent* event); - -private: - QPoint contextGlobalPos; - int convertIntLiteral(QString val, int base, bool *ok); - int regAtPos(QString prefix); - QString strAtPos(QString pattern); - -public slots: - void changeValue(); -}; diff --git a/spim-qtbase/QtSpim/regwin.cpp b/spim-qtbase/QtSpim/regwin.cpp deleted file mode 100644 index baa4b28..0000000 --- a/spim-qtbase/QtSpim/regwin.cpp +++ /dev/null @@ -1,619 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spimview.h" -#include "ui_spimview.h" - -#include -#include -#include -#define QT_USE_FAST_CONCATENATION -#include -#include -#include "ui_changevalue.h" - -// -// Integer registers window -// - -void SpimView::DisplayIntRegisters() -{ - regTextEdit* te = ui->IntRegDockWidget->findChild("IntRegTextEdit"); - te->isIntRegs = true; - QString windowContents = windowFormattingStart(st_regWinFont, st_regWinFontColor, st_regWinBackgroundColor); - int scrollPosition = te->verticalScrollBar()->value(); - - windowContents += formatSpecialIntRegister(PC, "PC", PC != oldPC); - windowContents += formatSpecialIntRegister(CP0_EPC, "EPC", CP0_EPC != oldEPC); - windowContents += formatSpecialIntRegister(CP0_Cause, "Cause", CP0_Cause != oldCause); - windowContents += formatSpecialIntRegister(CP0_BadVAddr, "BadVAddr", CP0_BadVAddr != oldBadVAddr); - windowContents += formatSpecialIntRegister(CP0_Status, "Status", CP0_Status != oldStatus); - windowContents += "
    "; - windowContents += formatSpecialIntRegister(HI, "HI", HI != oldHI); - windowContents += formatSpecialIntRegister(LO, "LO", LO != oldLO); - - windowContents += "
    "; - - int i; - for (i = 0; i < 32; i++) { - windowContents += formatIntRegister(i, R[i], int_reg_names[i], R[i] != oldR[i]); - } - windowContents += windowFormattingEnd(); - - te->clear(); - te->appendHtml(windowContents); - ui->IntRegDockWidget->setWindowTitle(QString("Int Regs [") - + QString::number(st_regDisplayBase) - + QString("] ")); - - te->verticalScrollBar()->setValue(scrollPosition); - CaptureIntRegisters(); -} - - -QString SpimView::formatSpecialIntRegister(int value, char* name, bool changed) -{ - return formatReg(QString("") % QString(name) % nnbsp(8 - strlen(name)) % QString(""), - formatInt(value), - changed); -} - - -QString SpimView::formatIntRegister(int regNum, int value, char* name, bool changed) -{ - return formatReg(QString("R") % QString::number(regNum, 10) % (regNum < 10 ? " " : "") - % QString(" [") % QString(name) % QString("]"), - formatInt(value), - changed); -} - - -void SpimView::CaptureIntRegisters() -{ - int i; - for (i = 0; i < R_LENGTH; i++) - { - oldR[i] = R[i]; - } - oldPC = PC; - oldEPC = CP0_EPC; - oldCause = CP0_Cause; - oldBadVAddr = CP0_BadVAddr; - oldStatus = CP0_Status; - oldHI = HI; - oldLO = LO; -} - - - -// -// Floating point registers -// -void SpimView::DisplayFPRegisters() -{ - regTextEdit* te = ui->FPRegDockWidget->findChild("FPRegTextEdit"); - te->isIntRegs = false; - QString windowContents = windowFormattingStart(st_regWinFont, st_regWinFontColor, st_regWinBackgroundColor); - int scrollPosition = te->verticalScrollBar()->value(); - - windowContents += formatSFPRegisters() % formatDFPRegisters() % windowFormattingEnd(); - - te->clear(); - te->appendHtml(windowContents); - - te->verticalScrollBar()->setValue(scrollPosition); -} - - -// -// Single precision floating point registers window -// - -QString SpimView::formatSFPRegisters() -{ - QString windowContents = ""; - - windowContents += formatSpecialSFPRegister(FIR, "FIR", FIR != oldFIR); - windowContents += formatSpecialSFPRegister(FCSR, "FCSR", FCSR != oldFCSR); - - windowContents += "
    Single Precision
    "; - - int i; - for (i = 0; i < FGR_LENGTH; i++) { - windowContents += formatSFPRegister(i, FPR_S(i), FPR_S(i) != oldFPR_S[i]); - } - - CaptureSFPRegisters(); - - return windowContents; -} - - -void SpimView::CaptureSFPRegisters() -{ - int i; - for (i = 0; i < FGR_LENGTH; i++) - { - oldFPR_S[i] = FPR_S(i); - } - oldFIR = FIR; - oldFCSR = FCSR; -} - - -QString SpimView::formatSpecialSFPRegister(int value, char* name, bool changed) -{ - return formatReg(QString("") % QString(name) % nnbsp(7 - strlen(name)) % QString(""), - formatInt(value), - changed); -} - - -QString SpimView::formatSFPRegister(int regNum, float value, bool changed) -{ - return formatReg(QString("FG") % QString::number(regNum, 10) % (regNum < 10 ? " " : ""), - formatFloat(value), - changed); -} - - -// -// Double precision floating point registers window -// - -QString SpimView::formatDFPRegisters() -{ - QString windowContents = QString("
    Double Precision
    "); - - int i; - for (i = 0; i < FPR_LENGTH; i += 1) - { - windowContents += formatDFPRegister(2 * i, FPR_D(2 * i), FPR_D(2 * i) != oldFPR_D[i]); - } - - CaptureDFPRegisters(); - - return windowContents; -} - - -void SpimView::CaptureDFPRegisters() -{ - int i; - for (i = 0; i < FPR_LENGTH; i += 1) - { - oldFPR_D[i] = FPR_D(2 * i); - } -} - - -QString SpimView::formatDFPRegister(int regNum, double value, bool changed) -{ - return formatReg(QString("FP") % QString::number(regNum, 10) % (regNum < 10 ? " " : ""), - formatDouble(value), - changed); -} - - -// -// Common register functionality -// - -QString SpimView::formatInt(int value) -{ - QString str = QString::number(value, st_regDisplayBase); - - // Negative numbers are sign-extended to 64 bits in base 2 or 16; just return the non-sign - // extended 32 bit value. - if (st_regDisplayBase == 16) - { - str = str.right(8); - } - else if (st_regDisplayBase == 2) - { - str = str.right(32); - } - - return str; -} - - -QString SpimView::formatFloat(float value) -{ - int* ival = (int*)&value; - switch (st_regDisplayBase) { - case 2: - return QString::number(*ival, st_regDisplayBase).right(32); // number returns 64 bits - - case 16: - return QString::number(*ival, st_regDisplayBase).right(8); // number returns 16 digits - - default: - return QString::number(value, 'f', 6); - } -} - - -QString SpimView::formatDouble(double value) -{ - if (st_regDisplayBase == 16 || st_regDisplayBase == 2) - { - qlonglong* ival = (qlonglong*)&value; - return QString::number(*ival, st_regDisplayBase); - } - else - { - return QString::number(value, 'f', 6); - } -} - - -QString SpimView::formatReg(QString name, QString value, bool changed) -{ - return registerBefore(changed) - % name - % QString(" = ") - % value - % QString("
    ") - % registerAfter(changed); -} - - -QString SpimView::registerBefore(bool changed) -{ - return QString(changed && st_colorChangedRegisters - ? QString("") - : QString("")); -} - - -QString SpimView::registerAfter(bool changed) -{ - return QString(changed && st_colorChangedRegisters ? "" : ""); -} - - -QString SpimView::nnbsp(int n) -{ - QString str = ""; - int i; - for (i = 0; i < n; i++) - { - str += " "; - } - return str; -} - - -// -// Change register value -// - -regTextEdit::regTextEdit() -{ - action_Context_ChangeValue = new QAction(this); - action_Context_ChangeValue->setObjectName("action_ChangeValue"); - action_Context_ChangeValue->setText("Change Register Contents"); -} - - -void regTextEdit::contextMenuEvent(QContextMenuEvent* event) -{ - QMenu *menu = createStandardContextMenu(); - menu->addSeparator(); - - menu->addAction(Window->ui->action_Reg_DisplayBinary); - menu->addAction(Window->ui->action_Reg_DisplayDecimal); - menu->addAction(Window->ui->action_Reg_DisplayHex); - - menu->addSeparator(); - menu->addAction(action_Context_ChangeValue); - contextGlobalPos = event->globalPos(); - - menu->exec(event->globalPos()); -} - - -void regTextEdit::changeValue() -{ - int base = Window->RegDisplayBase(); - int reg = regAtPos("R"); - if (reg != -1) - { - QString val = promptForNewValue("New value for R" + QString::number(reg, 10), &base); - bool ok; - int newRegVal = convertIntLiteral(val, base, &ok); - - if (ok) - { - R[reg] = newRegVal; - } - } - else - { - int reg = regAtPos("FG"); - if (reg != -1) - { - QString val = promptForNewValue("New value for FG" + QString::number(reg, 10), &base); - bool ok; - float newRegVal; - if (base == 10) - { - newRegVal = val.toFloat(&ok); - } - else - { - int newIntRegVal = val.toULong(&ok, base); // Read as hex; treat bits -- not value -- as float - void* ptr = &newIntRegVal; - newRegVal = *(float*)ptr; - } - - if (ok) - { - FGR[reg] = newRegVal; - } else - { - QMessageBox msgBox; - msgBox.setText("Bad FP value: " + val); - msgBox.exec(); - } - } - else - { - int reg = regAtPos("FP"); - if (reg != -1) - { - QString val = promptForNewValue("New value for FP" + QString::number(reg, 10), &base); - bool ok; - float newRegVal; - if (base == 10) - { - newRegVal = val.toDouble(&ok); - } - else - { - qlonglong newIntRegVal = val.toULongLong(&ok, base); // Read as hex; treat bits -- not value -- as double - void* ptr = &newIntRegVal; - newRegVal = *(double*)ptr; - } - - if (ok) - { - FPR[reg] = newRegVal; - } else - { - QMessageBox msgBox; - msgBox.setText("Bad FP value: " + val); - msgBox.exec(); - } - } - else - { - QString reg = strAtPos("([A-Za-z]+)"); - if (reg != "") - { - QString val = promptForNewValue("New value for " + reg, &base); - bool ok; - int newRegVal = convertIntLiteral(val, base, &ok); - - if (ok) - { - if (reg == "PC") - { - PC = newRegVal; - } - else if (reg == "EPC") - { - CP0_EPC = newRegVal; - } - else if (reg == "Cause") - { - CP0_Cause = newRegVal; - } - else if (reg == "BadVAddr") - { - CP0_BadVAddr = newRegVal; - } - else if (reg == "Status") - { - CP0_Status = newRegVal; - } - else if (reg == "HI") - { - HI = newRegVal; - } - else if (reg == "LO") - { - LO = newRegVal; - } - else if (reg == "FIR") - { - FIR = newRegVal; - } - else if (reg == "FCSR") - { - FCSR = newRegVal; - } - } - } - } - } - } - Window->DisplayIntRegisters(); - Window->DisplayFPRegisters(); -} - - -int regTextEdit::convertIntLiteral(QString val, int base, bool *ok) -{ - int newRegVal = 0; - - if (base == 10) { - newRegVal = val.toLong(ok, base); // decimal is signed - } else - { - newRegVal = val.toULong(ok, base); // hex is unsigned - } - - if (!*ok) - { - QMessageBox msgBox; - msgBox.setText(QString("Bad ") + (base == 16 ? "hex" : "decimal") + " register value: " + val); - msgBox.exec(); - } - - return newRegVal; -} - - -int regTextEdit::regAtPos(QString prefix) -{ - QString regStr = strAtPos(prefix + "([0-9]+)"); // Register name - if (regStr != "") - { - return regStr.toInt(); - } - else - { - return -1; - } -} - - -QString regTextEdit::strAtPos(QString pattern) -{ - // Position of context menu is location user right-click. Find the line at this point - // and compute the address of the memory location the user clicked on. - // - QPoint mouseViewportPos = this->viewport()->mapFromGlobal(contextGlobalPos); - QTextCursor mouseCursor = this->cursorForPosition(mouseViewportPos); - - mouseCursor.select(QTextCursor::LineUnderCursor); - QString line = mouseCursor.selectedText(); - - QRegExp rx(pattern); - - rx.indexIn(line); - return rx.cap(1); -} - - -QString promptForNewValue(QString text, int* base) -{ - QDialog d; - Ui::ChangeValueDialog cvd; - cvd.setupUi(&d); - - cvd.label->setText(text); - if (*base == -1) - { - cvd.hexRadioButton->setVisible(false); - cvd.decimalRadioButton->setVisible(false); - } - else - { - cvd.hexRadioButton->setVisible(true); - cvd.decimalRadioButton->setVisible(true); - - cvd.hexRadioButton->setChecked(*base == 16); - cvd.decimalRadioButton->setChecked(*base == 10); - } - - if (d.exec() == QDialog::Accepted) - { - if (cvd.hexRadioButton->isChecked()) - { - *base = 16; - } - else if (cvd.decimalRadioButton->isChecked()) - { - *base = 10; - } - return cvd.answerLineEdit->text(); - } - else - { - return QString(""); - } -} - - -void regTextEdit::closeEvent(QCloseEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - if (isIntRegs) - { - Window->ui->action_Win_IntRegisters->setChecked(false); - } - else - { - Window->ui->action_Win_FPRegisters->setChecked(false); - } - } - event->accept(); -} - - -void regTextEdit::hideEvent(QHideEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - if (isIntRegs) - { - Window->ui->action_Win_IntRegisters->setChecked(false); - } - else - { - Window->ui->action_Win_FPRegisters->setChecked(false); - } - } - event->accept(); -} - - -void regTextEdit::showEvent(QShowEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - if (isIntRegs) - { - Window->ui->action_Win_IntRegisters->setChecked(true); - } - else - { - Window->ui->action_Win_FPRegisters->setChecked(true); - } - } - event->accept(); -} diff --git a/spim-qtbase/QtSpim/runparams.ui b/spim-qtbase/QtSpim/runparams.ui deleted file mode 100644 index d4f52e7..0000000 --- a/spim-qtbase/QtSpim/runparams.ui +++ /dev/null @@ -1,172 +0,0 @@ - - - - - - - SetRunParametersDialog - - - - 0 - 0 - 318 - 207 - - - - Set Run Parameters - - - - - 10 - 10 - 298 - 187 - - - - - - - Address or label to start running program - - - - - - - - 0 - 0 - - - - - - - - Qt::Horizontal - - - - 40 - 20 - - - - - - - - Command-line arguments to pass to program - - - - - - - - 0 - 0 - - - - - - - - QDialogButtonBox::Cancel|QDialogButtonBox::Ok - - - true - - - - - - - Qt::Vertical - - - QSizePolicy::Fixed - - - - 20 - 20 - - - - - - - - - - - buttonBox - accepted() - SetRunParametersDialog - accept() - - - 158 - 173 - - - 158 - 90 - - - - - buttonBox - rejected() - SetRunParametersDialog - reject() - - - 158 - 173 - - - 158 - 90 - - - - - diff --git a/spim-qtbase/QtSpim/savelogfile.ui b/spim-qtbase/QtSpim/savelogfile.ui deleted file mode 100644 index a6baa6b..0000000 --- a/spim-qtbase/QtSpim/savelogfile.ui +++ /dev/null @@ -1,224 +0,0 @@ - - - SaveLogFileDialog - - - - 0 - 0 - 370 - 286 - - - - - 50 - false - - - - Save Windows To Log File - - - - - 10 - 10 - 350 - 235 - - - - - 75 - true - - - - - - - - 0 - 0 - - - - - 75 - true - - - - Select windows to write to log file - - - - - - - - 50 - false - - - - Registers - - - - - - - - 50 - false - - - - Text Segments - - - - - - - - 50 - false - - - - Data Segments - - - - - - - - 50 - false - - - - Console - - - - - - - - 50 - false - - - - Save to file - - - - - - - - 75 - true - - - - - - - - - 75 - true - - - - ... - - - - - - - - 75 - true - - - - Qt::Vertical - - - QSizePolicy::Fixed - - - - 20 - 20 - - - - - - - - - - 110 - 250 - 156 - 23 - - - - - 50 - false - - - - QDialogButtonBox::Cancel|QDialogButtonBox::Ok - - - - - - - buttonBox - accepted() - SaveLogFileDialog - accept() - - - 187 - 261 - - - 184 - 142 - - - - - buttonBox - rejected() - SaveLogFileDialog - reject() - - - 187 - 261 - - - 184 - 142 - - - - - diff --git a/spim-qtbase/QtSpim/settablecheckbox.h b/spim-qtbase/QtSpim/settablecheckbox.h deleted file mode 100644 index 725a220..0000000 --- a/spim-qtbase/QtSpim/settablecheckbox.h +++ /dev/null @@ -1,47 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include - -class settableCheckBox : public QCheckBox -{ -Q_OBJECT - -public: - settableCheckBox(QWidget* w) : QCheckBox(w) {}; - -public slots: - void set() {setChecked(true);} - void unset() {setChecked(false);} -}; diff --git a/spim-qtbase/QtSpim/settings.ui b/spim-qtbase/QtSpim/settings.ui deleted file mode 100644 index a8430c3..0000000 --- a/spim-qtbase/QtSpim/settings.ui +++ /dev/null @@ -1,616 +0,0 @@ - - - SettingDialog - - - - 0 - 0 - 600 - 466 - - - - QtSpim Settings - - - - - 10 - 0 - 580 - 421 - - - - 1 - - - - MIPS - - - - - 20 - 10 - 531 - 371 - - - - - - - Exception Handler - - - - - 20 - 20 - 481 - 72 - - - - - - - - - - 1 - 0 - - - - Qt::AlignCenter - - - - - - - - 0 - 0 - - - - Load Exception Handler - - - - - - - - 0 - 0 - - - - File - - - - - - - - 26 - 22 - - - - ... - - - - - - - Qt::Horizontal - - - - 20 - 20 - - - - - - - - - - - 200 - 32 - - - - Use default exception handler - - - - - - - - - - - MIPS Simulation Settings - - - - - 20 - 30 - 481 - 141 - - - - - - - - - Bare Machine - - - - - - - Enable Delayed Branches - - - - - - - Enable Delayed Loads - - - - - - - Enable Mapped IO - - - - - - - Accept Pseudo Instructions - - - - - - - - - - - - 239 - 32 - - - - Simple Machine - - - - - - - - 238 - 32 - - - - Bare Machine - - - - - - - - - - - - - - - QtSpim - - - - - 20 - 10 - 531 - 371 - - - - - - - Simulator - - - - - 20 - 20 - 491 - 91 - - - - - - - - - Length of Recent File list - - - - - - - - 0 - 0 - - - - - - - - Qt::Horizontal - - - - 0 - 0 - - - - - - - - - - - - Quiet - - - - - - - - - - - - - Register Windows - - - - - 20 - 20 - 491 - 91 - - - - - - - - 0 - 0 - - - - - - - - - 0 - 0 - - - - - - - - Background Color - - - Qt::AlignRight|Qt::AlignTrailing|Qt::AlignVCenter - - - - - - - - 26 - 22 - - - - ... - - - - - - - Font - - - - - - - - - - - 26 - 22 - - - - ... - - - - - - - Color - - - - - - - - 26 - 22 - - - - ... - - - - - - - - - - - Text and Data Windows - - - - - 20 - 20 - 491 - 91 - - - - - - - - 26 - 22 - - - - ... - - - - - - - - - - - 0 - 0 - - - - - - - - Background Color - - - - - - - - 26 - 22 - - - - ... - - - - - - - Color - - - - - - - Font - - - - - - - - 26 - 22 - - - - ... - - - - - - - - 0 - 0 - - - - - - - - - - - - - - - - 210 - 430 - 180 - 23 - - - - - 180 - 23 - - - - QDialogButtonBox::Cancel|QDialogButtonBox::Ok - - - true - - - - - - settableCheckBox - QCheckBox -
    settablecheckbox.h
    -     -     - - tabWidget - bareMachineCheckBox - pseudoInstCheckBox - delayedBranchCheckBox - delayedLoadCheckBox - mappedIOCheckBox - simplePushButton - barePushButton - loadExceptionHandlerCheckBox - exceptionHandlerLineEdit - exceptionHandlerToolButton - exceptionHandlerResetButton - buttonBox - recentFilesLineEdit - regWinFontLineEdit - regWinFontToolButton - regWinFontColorLineEdit - regWinFontColorToolButton - regWinBackgroundLineEdit - regWinBackgroundToolButton - textWinFontLineEdit - textWinFontToolButton - textWinFontColorLineEdit - textWinFontColorToolButton - textWinBackgroundLineEdit - textWinBackgroundToolButton - - - - - buttonBox - accepted() - SettingDialog - accept() - - - 317 - 441 - - - 299 - 235 - - - - - buttonBox - rejected() - SettingDialog - reject() - - - 317 - 441 - - - 299 - 235 - - - - -     diff --git a/spim-qtbase/QtSpim/spim_settings.h b/spim-qtbase/QtSpim/spim_settings.h deleted file mode 100644 index 3ae1712..0000000 --- a/spim-qtbase/QtSpim/spim_settings.h +++ /dev/null @@ -1,110 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef SPIM_SETTING_DIALOG_H -#define SPIM_SETTING_DIALOG_H - -#include -#include -#include - -#include "ui_settings.h" - -namespace Ui{ - - class SpimSettingDialog : public QObject, public SettingDialog -{ -Q_OBJECT - -public: - SpimSettingDialog() : SettingDialog() - { - regWinFont = NULL; - regWinColor = NULL; - regWinBackground = NULL; - - textWinFont = NULL; - textWinColor = NULL; - textWinBackground = NULL; - } - - QFont* regWinFont; - QColor* regWinColor; - QColor* regWinBackground; - - QFont* textWinFont; - QColor* textWinColor; - QColor* textWinBackground; - - -public slots: - void setRegWinFont(QFont f) - { - regWinFont = new QFont(f); - regWinFontLineEdit->setText(f.family()); - } - - void setRegWinColor(QColor c) - { - regWinColor = new QColor(c); - regWinFontColorLineEdit->setText(c.name()); - } - - void setRegWinBackground(QColor c) - { - regWinBackground = new QColor(c); - regWinBackgroundLineEdit->setText(c.name()); - } - - - void setTextWinFont(QFont f) - { - textWinFont = new QFont(f); - textWinFontLineEdit->setText(f.family()); - } - - void setTextWinColor(QColor c) - { - textWinColor = new QColor(c); - textWinFontColorLineEdit->setText(c.name()); - } - - void setTextWinBackground(QColor c) - { - textWinBackground = new QColor(c); - textWinBackgroundLineEdit->setText(c.name()); - } -}; - -} -#endif // SPIM_SETTING_DIALOG_H diff --git a/spim-qtbase/QtSpim/spim_support.cpp b/spim-qtbase/QtSpim/spim_support.cpp deleted file mode 100644 index c143d89..0000000 --- a/spim-qtbase/QtSpim/spim_support.cpp +++ /dev/null @@ -1,172 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include - -#include "spimview.h" -#include "ui_spimview.h" - -#include - - -// SPIM globals -// -bool bare_machine; /* => simulate bare machine */ -bool accept_pseudo_insts; /* => parse pseudo instructions */ -bool delayed_branches; /* => simulate delayed branches */ -bool delayed_loads; /* => simulate delayed loads */ -bool quiet; /* => no warning messages */ -char* exception_file_name = 0; /* The path from which to load the exception handler, if desired */ -bool mapped_io; /* => activate memory-mapped IO */ -int spim_return_value; /* Value returned when spim exits */ - -port message_out; -port console_out; - - -#define BIG_BUF_SIZE 10000 - -int console_input_available() -{ - return Window->SpimConsole->InputAvailable(); - -} - - -void error(char *fmt, ...) -{ - va_list args; - va_start (args, fmt); - - char buf[BIG_BUF_SIZE]; - qvsnprintf(buf, BIG_BUF_SIZE, fmt, args); - va_end(args); - - Window->Error(buf, 0); -} - - -void run_error (char *fmt, ...) -{ - va_list args; - va_start (args, fmt); - - char buf[BIG_BUF_SIZE]; - qvsnprintf(buf, BIG_BUF_SIZE, fmt, args); - va_end(args); - - Window->Error(buf, 0); -} - - -void fatal_error(char *fmt, ...) -{ - va_list args; - va_start (args, fmt); - - char buf[BIG_BUF_SIZE]; - qvsnprintf(buf, BIG_BUF_SIZE, fmt, args); - va_end(args); - - Window->Error(buf, 1); -} - - -char get_console_char() -{ - QString c = Window->SpimConsole->ReadChar(); - if (c != "") - { - char ac = c[0].toLatin1(); - if (ac == '\r') - { - return '\n'; - } - return ac; - } - else - { - return 0; // FIXME - } -} - - -void put_console_char(char c) -{ - Window->SpimConsole->WriteOutput(QString(c)); - Window->SpimConsole->raise(); -} - - -void read_input(char *str, int str_size) -{ - while ((1 < str_size) && (!force_break)) - { - char ch = get_console_char(); - - *str = ch; - str += 1; - str_size -= 1; - - if (ch == '\n') - { - break; - } - } - - if (0 < str_size) - { - *str = '\0'; - } -} - - -void write_output (port fp, char *fmt, ...) -{ - va_list args; - va_start (args, fmt); - - char buf[BIG_BUF_SIZE]; - qvsnprintf(buf, BIG_BUF_SIZE, fmt, args); - va_end(args); - - if (fp.i == message_out.i) - { - Window->WriteOutput(buf); - } - else if (fp.i == console_out.i) - { - Window->SpimConsole->WriteOutput(QString(buf)); - Window->SpimConsole->raise(); - } -} diff --git a/spim-qtbase/QtSpim/spimview.cpp b/spim-qtbase/QtSpim/spimview.cpp deleted file mode 100644 index 93f07ed..0000000 --- a/spim-qtbase/QtSpim/spimview.cpp +++ /dev/null @@ -1,280 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spimview.h" -#include "ui_spimview.h" - -#include -#define QT_USE_FAST_CONCATENATION -#include -#include -#include - - -SpimView::SpimView(QWidget *parent) : - QMainWindow(parent), - ui(new Ui::SpimView), - settings("LarusStone", "QtSpim") -{ - // Open windows - // - ui->setupUi(this); - SpimConsole = new Console(0); - - stdExceptionHandler = QString("<>"); - - // Set style parameters for docking widgets - // - setCorner(Qt::TopLeftCorner, Qt::LeftDockWidgetArea); - setCorner(Qt::BottomLeftCorner, Qt::LeftDockWidgetArea); - setCorner(Qt::TopRightCorner, Qt::RightDockWidgetArea); - setCorner(Qt::BottomRightCorner, Qt::RightDockWidgetArea); - - // Dock widgets - // - win_Tile(); - - // Wire up the menu and context menu commands - // - wireCommands(); - - // Restore program settings and window positions - // - readSettings(); - - // Create a console - // - ui->action_Win_Console->setChecked(true); - - programStatus = IDLE; -} - - -void SpimView::closeEvent(QCloseEvent *) -{ - writeSettings(false); - qApp->exit(0); -} - - -void SpimView::wireCommands() -{ - QObject::connect(ui->action_File_Load, SIGNAL(triggered(bool)), this, SLOT(file_LoadFile())); - QObject::connect(ui->action_File_Reload, SIGNAL(triggered(bool)), this, SLOT(file_ReloadFile())); - QObject::connect(ui->action_File_SaveLog, SIGNAL(triggered(bool)), this, SLOT(file_SaveLogFile())); - QObject::connect(ui->action_File_Print, SIGNAL(triggered(bool)), this, SLOT(file_Print())); - QObject::connect(ui->action_File_Exit, SIGNAL(triggered(bool)), this, SLOT(file_Exit())); - - QObject::connect(ui->action_Sim_ClearRegisters, SIGNAL(triggered(bool)), this, SLOT(sim_ClearRegisters())); - QObject::connect(ui->action_Sim_Reinitialize, SIGNAL(triggered(bool)), this, SLOT(sim_ReinitializeSimulator())); - QObject::connect(ui->action_Sim_SetRunParameters, SIGNAL(triggered(bool)), this, SLOT(sim_SetRunParameters())); - QObject::connect(ui->action_Sim_Run, SIGNAL(triggered(bool)), this, SLOT(sim_Run())); - QObject::connect(ui->action_Sim_Pause, SIGNAL(triggered(bool)), this, SLOT(sim_Pause())); - QObject::connect(ui->action_Sim_Stop, SIGNAL(triggered(bool)), this, SLOT(sim_Stop())); - QObject::connect(ui->action_Sim_SingleStep, SIGNAL(triggered(bool)), this, SLOT(sim_SingleStep())); - QObject::connect(ui->action_Sim_DisplaySymbols, SIGNAL(triggered(bool)), this, SLOT(sim_DisplaySymbols())); - QObject::connect(ui->action_Sim_Settings, SIGNAL(triggered(bool)), this, SLOT(sim_Settings())); - - QObject::connect(ui->action_Reg_DisplayBinary, SIGNAL(triggered(bool)), this, SLOT(reg_DisplayBinary())); - QObject::connect(ui->action_Reg_DisplayHex, SIGNAL(triggered(bool)), this, SLOT(reg_DisplayHex())); - QObject::connect(ui->action_Reg_DisplayDecimal, SIGNAL(triggered(bool)), this, SLOT(reg_DisplayDecimal())); - - QObject::connect(ui->action_Text_DisplayUserText, SIGNAL(triggered(bool)), this, SLOT(text_DisplayUserText())); - QObject::connect(ui->action_Text_DisplayKernelText, SIGNAL(triggered(bool)), this, SLOT(text_DisplayKernelText())); - QObject::connect(ui->action_Text_DisplayComments, SIGNAL(triggered(bool)), this, SLOT(text_DisplayComments())); - QObject::connect(ui->action_Text_DisplayInstructionValue, SIGNAL(triggered(bool)), this, SLOT(text_DisplayInstructionValue())); - - QObject::connect(ui->action_Data_DisplayUserData, SIGNAL(triggered(bool)), this, SLOT(data_DisplayUserData())); - QObject::connect(ui->action_Data_DisplayUserStack, SIGNAL(triggered(bool)), this, SLOT(data_DisplayUserStack())); - QObject::connect(ui->action_Data_DisplayKernelData, SIGNAL(triggered(bool)), this, SLOT(data_DisplayKernelData())); - QObject::connect(ui->action_Data_DisplayBinary, SIGNAL(triggered(bool)), this, SLOT(data_DisplayBinary())); - QObject::connect(ui->action_Data_DisplayHex, SIGNAL(triggered(bool)), this, SLOT(data_DisplayHex())); - QObject::connect(ui->action_Data_DisplayDecimal, SIGNAL(triggered(bool)), this, SLOT(data_DisplayDecimal())); - - QObject::connect(ui->action_Win_IntRegisters, SIGNAL(triggered(bool)), this, SLOT(win_IntRegisters())); - QObject::connect(ui->action_Win_FPRegisters, SIGNAL(triggered(bool)), this, SLOT(win_FPRegisters())); - QObject::connect(ui->action_Win_TextSegment, SIGNAL(triggered(bool)), this, SLOT(win_TextSegment())); - QObject::connect(ui->action_Win_DataSegment, SIGNAL(triggered(bool)), this, SLOT(win_DataSegment())); - QObject::connect(ui->action_Win_Console, SIGNAL(triggered(bool)), this, SLOT(win_Console())); - QObject::connect(ui->action_Win_Tile, SIGNAL(triggered(bool)), this, SLOT(win_Tile())); - QObject::connect(ui->action_Win_Restore, SIGNAL(triggered(bool)), this, SLOT(win_Restore())); - - QObject::connect(ui->action_Help_ViewHelp, SIGNAL(triggered(bool)), this, SLOT(help_ViewHelp())); - QObject::connect(ui->action_Help_AboutSPIM, SIGNAL(triggered(bool)), this, SLOT(help_AboutSPIM())); - - QObject::connect(ui->TextSegmentTextEdit->action_Context_SetBreakpoint, SIGNAL(triggered(bool)), - ui->TextSegmentTextEdit, SLOT(setBreakpoint())); - QObject::connect(ui->TextSegmentTextEdit->action_Context_ClearBreakpoint, SIGNAL(triggered(bool)), - ui->TextSegmentTextEdit, SLOT(clearBreakpoint())); - - - QObject::connect(ui->IntRegTextEdit->action_Context_ChangeValue, SIGNAL(triggered(bool)), - ui->IntRegTextEdit, SLOT(changeValue())); - QObject::connect(ui->FPRegTextEdit->action_Context_ChangeValue, SIGNAL(triggered(bool)), - ui->FPRegTextEdit, SLOT(changeValue())); - QObject::connect(ui->DataSegmentTextEdit->action_Context_ChangeValue, SIGNAL(triggered(bool)), - ui->DataSegmentTextEdit, SLOT(changeValue())); -} - - -QString SpimView::windowFormattingStart(QFont font, QColor fontColor, QColor backgroundColor) -{ - return QString(""); -} - - -QString SpimView::windowFormattingEnd() -{ - return ""; -} - - -void SpimView::InitializeWorld() -{ - if (st_loadExceptionHandler) - { - if ((st_exceptionHandlerFileName != stdExceptionHandler) - && !QFile::exists(st_exceptionHandlerFileName)) - { - QMessageBox msgBox; - msgBox.setText(QString("%1: exception handler file not found.\n\nUsing default exception handler.") - .arg(st_exceptionHandlerFileName)); - msgBox.exec(); - st_exceptionHandlerFileName = stdExceptionHandler; - } - if (st_exceptionHandlerFileName == stdExceptionHandler) - { - // Standard exception handler is a resource in this executable. Write it to a - // temporary file and use that for initialization. - // - QResource exRes(":exceptions.s"); - QTemporaryFile tmpFile; - tmpFile.open(); - tmpFile.write((char*)exRes.data()); - tmpFile.close(); - initialize_world(tmpFile.fileName().toLocal8Bit().data(), false); - } - else - { - // Use the file name supplied by the user. - // - initialize_world(st_exceptionHandlerFileName.toLocal8Bit().data(), true); - } - } - else - { - // No exception handler. - // - initialize_world(NULL, true); - } -} - - -void SpimView::SetExceptionHandler(QString fileName, bool loadHandler) -{ - if (fileName != "") - { - st_exceptionHandlerFileName = fileName; - } - st_loadExceptionHandler = loadHandler; -} - - -void SpimView::UpdateDataDisplay() -{ - // Text segment rarely changes -- update manually - // - if (text_modified){ - DisplayTextSegments(true); - } - DisplayIntRegisters(); - DisplayFPRegisters(); - DisplayDataSegments(false); -} - - -void SpimView::SaveStateAndExit(int val) -{ - writeSettings(false); - exit(val); -} - - -QString SpimView::WriteOutput(QString message) -{ - if (message.endsWith("\n")) - { - message.chop(1); // Appending adds a
    , so avoid doubling last newline - } - message.replace("\n", "
    "); - message.replace(" ", " "); - - Window->ui->centralWidget->append(QString("") + message + QString("")); - Window->ui->centralWidget->ensureCursorVisible(); - - return message; -} - - -void SpimView::SetOutputColor(QString color) -{ - outputColor = color; -} - - -void SpimView::Error(QString message, bool fatal) -{ - WriteOutput(message); - - if (fatal) - { - QMessageBox::critical(0, "Error", message, QMessageBox::Ok | QMessageBox::Abort, QMessageBox::Ok); - SaveStateAndExit(1); - } - else - { - QMessageBox::StandardButton b = QMessageBox::information(0, - "Error", - message, - QMessageBox::Ok | QMessageBox::Abort, - QMessageBox::Ok); - if (b == QMessageBox::Abort) - { - force_break = true; - } - } -} diff --git a/spim-qtbase/QtSpim/spimview.h b/spim-qtbase/QtSpim/spimview.h deleted file mode 100644 index a59bf96..0000000 --- a/spim-qtbase/QtSpim/spimview.h +++ /dev/null @@ -1,306 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2020, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef SPIMVIEW_H -#define SPIMVIEW_H - -#include -#include -#include -#include - -#include "ui_spimview.h" -#include "console.h" - -#include "../CPU/spim.h" -#include "../CPU/string-stream.h" -#include "../CPU/spim-utils.h" -#include "../CPU/inst.h" -#include "../CPU/reg.h" -#include "../CPU/mem.h" -#include "../CPU/sym-tbl.h" -#include "../CPU/version.h" - -namespace Ui { - class SpimView; -} - -class SpimView : public QMainWindow -{ -Q_OBJECT - - public: - explicit SpimView(QWidget *parent = 0); - - virtual void closeEvent(QCloseEvent *); - - QString WriteOutput(QString message); - void Error(QString message, bool fatal); - - void SaveStateAndExit(int val); - - void InitializeWorld(); - void SetExceptionHandler(QString fileName, bool loadHandler); - - void CaptureIntRegisters(); - void CaptureSFPRegisters(); - void CaptureDFPRegisters(); - - void DisplayIntRegisters(); - void DisplayFPRegisters(); - void DisplayTextSegments(bool force); - void DisplayDataSegments(bool force); - void UpdateDataDisplay(); - - int RegDisplayBase() { return st_regDisplayBase;} - int DataDisplayBase() { return st_dataSegmentDisplayBase;} - - Ui::SpimView *ui; - - void SetOutputColor(QString color); - - private: - - QString outputColor; - - // - // Program state - // - QSettings settings; - void readSettings(); - void writeSettings(bool omitWindowState); - QString stdExceptionHandler; - - // File menu - // - int st_recentFilesLength; - QList st_recentFiles; - void rebuildRecentFilesMenu(); - - // Simulator menu - // - bool st_loadExceptionHandler; - QString st_exceptionHandlerFileName; - int st_startAddress; - QString st_commandLine; - - // Register window - // - bool st_colorChangedRegisters; - QString st_changedRegisterColor; - int st_regDisplayBase; - QFont st_regWinFont; - QColor st_regWinFontColor; - QColor st_regWinBackgroundColor; - - // Text window - // - bool st_showUserTextSegment; - bool st_showKernelTextSegment; - bool st_showTextComments; - bool st_showTextDisassembly; - QFont st_textWinFont; - QColor st_textWinFontColor; - QColor st_textWinBackgroundColor; - - // Data window - // - bool st_showUserDataSegment; - bool st_showUserStackSegment; - bool st_showKernelDataSegment; - int st_dataSegmentDisplayBase; - - // - // End of state - - // - // Methods: - // - - // Establish text formatting for a window - // - QString windowFormattingStart(QFont font, QColor fontColor, QColor backgroundColor); - QString windowFormattingEnd(); - - - // Integer registers window - // - QString formatSpecialIntRegister(int value, char* name, bool changed); - QString formatIntRegister(int regNum, int value, char* name, bool changed); - - // Value in register at previous call on displayIntRegister, so changed values - // can be highlighted. - // - reg_word oldR[R_LENGTH]; - mem_addr oldPC; - reg_word oldEPC; - reg_word oldCause; - reg_word oldBadVAddr; - reg_word oldStatus; - reg_word oldHI; - reg_word oldLO; - - - // Single precision FP registers window - // - QString formatSFPRegisters(); - QString formatSpecialSFPRegister(int value, char* name, bool changed); - QString formatSFPRegister(int regNum, float value, bool changed); - - float oldFPR_S[FGR_LENGTH]; - reg_word oldFIR; - reg_word oldFCSR; - - - // Double precision FP registers window - // - QString formatDFPRegisters(); - QString formatDFPRegister(int regNum, double value, bool changed); - - double oldFPR_D[FPR_LENGTH]; - - - // Common register methods - // - QString formatInt(int value); - QString formatFloat(float value); - QString formatDouble(double value); - QString formatReg(QString reg, QString value, bool changed); - QString registerBefore(bool changed); - QString registerAfter(bool changed); - QString nnbsp(int n); - - - // Text segment window - // - QString formatUserTextSeg(); - QString formatKernelTextSeg(); - QString formatInstructions(mem_addr from, mem_addr to); - void highlightInstruction(mem_addr pc); - - - // Data segment window - // - QString formatUserDataSeg(); - QString formatUserStack(); - QString formatKernelDataSeg(); - QString formatMemoryContents(mem_addr from, mem_addr to); - QString formatPartialQuadWord(mem_addr from, mem_addr to); - QString formatAsChars(mem_addr from, mem_addr to); - - - // - // Menu functions - // - void wireCommands(); - void initStack(); - void executeProgram(mem_addr pc, int steps, bool display, bool contBkpt); - void initializePCAndStack(); - enum PROGSTATE {IDLE, STOPPED, PAUSED, RUNNING, SINGLESTEP} programStatus; - void updateStatus(PROGSTATE status); - - - // - // Console - // - public: - Console* SpimConsole; - - - public slots: - void file_LoadFile(); - void file_ReloadFile(); - void file_SaveLogFile(); - void file_Print(); - void file_Exit(); - - void sim_ClearRegisters(); - void sim_ReinitializeSimulator(); - void sim_SetRunParameters(); - void sim_Run(); - void sim_Pause(); - void sim_Stop(); - void sim_SingleStep(); - void sim_DisplaySymbols(); - void sim_Settings(); - - void reg_DisplayBinary(); - void reg_DisplayHex(); - void reg_DisplayDecimal(); - int setCheckedRegBase(int base); - int setBaseInternal(int base, QAction* actionBinary, QAction* actionDecimal, QAction* actionHex); - - void text_DisplayUserText(); - void text_DisplayKernelText(); - void text_DisplayComments(); - void text_DisplayInstructionValue(); - - void data_DisplayUserData(); - void data_DisplayUserStack(); - void data_DisplayKernelData(); - void data_DisplayBinary(); - void data_DisplayHex(); - void data_DisplayDecimal(); - int setCheckedDataSegmentDisplayBase(int base); - - void win_IntRegisters(); - void win_FPRegisters(); - void win_TextSegment(); - void win_DataSegment(); - void win_Console(); - void win_Tile(); - void win_Restore(); - - void help_ViewHelp(); - void help_AboutSPIM(); - - void continueBreakpoint(); - void singleStepBreakpoint(); - void abortBreakpoint(); -}; - -extern SpimView* Window; -extern QApplication* App; - - -// Format SPIM abstractions for display -// -QString formatAddress(mem_addr addr); -QString formatWord(mem_word word, int base); -QString formatChar(int chr); -QString formatSegLabel(QString segName, mem_addr low, mem_addr high); - -QString promptForNewValue(QString text, int* base); - - -#endif // SPIMVIEW_H diff --git a/spim-qtbase/QtSpim/spimview.ui b/spim-qtbase/QtSpim/spimview.ui deleted file mode 100644 index 54dab74..0000000 --- a/spim-qtbase/QtSpim/spimview.ui +++ /dev/null @@ -1,593 +0,0 @@ - - - - - - - SpimView - - - - 0 - 0 - 1172 - 770 - - - - QtSpim - - - QMainWindow::AnimatedDocks|QMainWindow::ForceTabbedDocks|QMainWindow::VerticalTabs - - - - false - - - true - - - - - - 0 - 0 - 1172 - 21 - - - - - &File - - - - Recent Files - - - - - - - - - - - - - - - &Simulator - - - - - - - - - - - - - - - - - &Registers - - - - - - - - &Text Segment - - - - - - - - - - &Data Segment - - - - - - - - - - - - - &Window - - - - - - - - - - - - - &Help - - - - - - - - - - - - - - - - Qt::TopDockWidgetArea - - - Int Regs - - - 4 - - - - - 200 - 600 - - - - false - - - true - - - - - - Qt::TopDockWidgetArea - - - FP Regs - - - 4 - - - - false - - - true - - - - - - - 0 - 0 - - - - Qt::BottomDockWidgetArea|Qt::TopDockWidgetArea - - - Text - - - 4 - - - - - 800 - 600 - - - - false - - - true - - - - - - Qt::TopDockWidgetArea - - - Data - - - 4 - - - - false - - - true - - - - - - toolBar - - - TopToolBarArea - - - - - - - - - - - - - - - - - - - - - :/icons/LoadFile.png:/icons/LoadFile.png - - - &Load File - - - - - - :/icons/SaveLog.png:/icons/SaveLog.png - - - &Save Log File - - - - - &Exit - - - - - - :/icons/ClearRegs.png:/icons/ClearRegs.png - - - &Clear Registers - - - - - - :/icons/Reinit.png:/icons/Reinit.png - - - Re&initialize Simulator - - - - - - :/icons/ReloadFile.png:/icons/ReloadFile.png - - - Re&initialize and Load File - - - - - Run &Parameters - - - - - - :/icons/Run.png:/icons/Run.png - - - &Run/Continue - - - F5 - - - - - - :/icons/Pause.png:/icons/Pause.png - - - &Pause - - - - - - :/icons/Stop.png:/icons/Pause.png - - - &Stop - - - Shift-F5 - - - - - - :/icons/SingleStep.png:/icons/SingleStep.png - - - &Single Step - - - F10 - - - - - &Display Symbols - - - - - - :/icons/Settings.png:/icons/Settings.png - - - Settings - - - - - true - - - Binary - - - - - true - - - Hex - - - - - true - - - Decimal - - - - - true - - - User Text - - - - - true - - - Kernel Text - - - - - true - - - Comments - - - - - true - - - Instruction Value - - - - - true - - - User Data - - - - - true - - - User Stack - - - - - true - - - Kernel Data - - - - - true - - - Binary - - - - - true - - - Hex - - - - - true - - - Decimal - - - - - true - - - Integer Registers - - - - - true - - - FP Registers - - - - - true - - - Text Segment - - - - - true - - - Data Segment - - - - - true - - - Console - - - - - Tile - - - - - Restore to default - - - - - - :/icons/Help.png:/icons/Help.png - - - View Help - - - - - About QtSpim - - - - - - :/icons/Print.png:/icons/Print.png - - - Print - - - - - - - textTextEdit - QWidget -
    texttextedit.h
    -     - - dataTextEdit - QWidget -
    datatextedit.h
    -     -     - - - - -     diff --git a/spim-qtbase/QtSpim/state.cpp b/spim-qtbase/QtSpim/state.cpp deleted file mode 100644 index 5d2ae8c..0000000 --- a/spim-qtbase/QtSpim/state.cpp +++ /dev/null @@ -1,232 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#include -#include - -#include "spimview.h" -#include "ui_spimview.h" - - -// -// Restore program settings and window positions -// - -void SpimView::readSettings() -{ - settings.beginGroup("MainWin"); - restoreGeometry(settings.value("Geometry").toByteArray()); - restoreState(settings.value("WindowState").toByteArray(), 1); - settings.endGroup(); - - // If the size of the restored window exceeds the current screen size, resize the window. - // - const QRect availGeo = App->desktop()->availableGeometry(this); - const QRect& curFGeo = this->frameGeometry(); - if (!availGeo.contains(curFGeo)) - { - this->adjustSize(); - } - - settings.beginGroup("RegWin"); - st_colorChangedRegisters = settings.value("ColorChangedRegs", true).toBool(); - st_changedRegisterColor = settings.value("ChangedRegColor", "red").toString(); - st_regDisplayBase = settings.value("RegisterDisplayBase", 16).toInt(); - st_regDisplayBase = setCheckedRegBase(st_regDisplayBase); - - st_regWinFont = settings.value("Font", QFont("Courier", 10)).value(); - st_regWinFontColor = settings.value("FontColor", QColor("black")).value(); - st_regWinBackgroundColor = settings.value("BackgroundColor", QColor("white")).value(); - - ui->action_Win_IntRegisters->setChecked(!ui->IntRegDockWidget->isHidden()); - ui->action_Win_FPRegisters->setChecked(!ui->FPRegDockWidget->isHidden()); - settings.endGroup(); - - - settings.beginGroup("TextWin"); - st_showUserTextSegment = settings.value("ShowUserTextSeg", true).toBool(); - ui->action_Text_DisplayUserText->setChecked(st_showUserTextSegment); - st_showKernelTextSegment = settings.value("ShowKernelTextSeg", true).toBool(); - ui->action_Text_DisplayKernelText->setChecked(st_showKernelTextSegment); - st_showTextComments = settings.value("ShowTextComments", true).toBool(); - ui->action_Text_DisplayComments->setChecked(st_showTextComments); - st_showTextDisassembly = settings.value("ShowInstDisassembly", true).toBool(); - ui->action_Text_DisplayInstructionValue->setChecked(st_showTextDisassembly); - - st_textWinFont = settings.value("Font", QFont("Courier", 10)).value(); - st_textWinFontColor = settings.value("FontColor", QColor("black")).value(); - st_textWinBackgroundColor = settings.value("BackgroundColor", QColor("white")).value(); - - ui->action_Win_TextSegment->setChecked(!ui->TextSegDockWidget->isHidden()); - settings.endGroup(); - - - settings.beginGroup("DataWin"); - st_showUserDataSegment = settings.value("ShowUserDataSeg", true).toBool(); - ui->action_Data_DisplayUserData->setChecked(st_showUserDataSegment); - st_showUserStackSegment = settings.value("ShowUserStackSeg", true).toBool(); - ui->action_Data_DisplayUserStack->setChecked(st_showUserStackSegment); - st_showKernelDataSegment = settings.value("ShowKernelDataSeg", true).toBool(); - ui->action_Data_DisplayKernelData->setChecked(st_showKernelDataSegment); - st_dataSegmentDisplayBase = settings.value("DataSegmentDisplayBase", 16).toInt(); - st_dataSegmentDisplayBase = setCheckedDataSegmentDisplayBase(st_dataSegmentDisplayBase); - - ui->action_Win_DataSegment->setChecked(!ui->DataSegDockWidget->isHidden()); - settings.endGroup(); - - - settings.beginGroup("FileMenu"); - st_recentFilesLength = settings.value("RecentFilesLength", 4).toInt(); - st_recentFiles.clear(); - int i; - for (i = 0; i < st_recentFilesLength; i++) - { - QString file = settings.value("RecentFile" + QString(i), "").toString(); - st_recentFiles.append(file); - } - rebuildRecentFilesMenu(); - settings.endGroup(); - - - settings.beginGroup("Spim"); - quiet = settings.value("Quiet", false).toBool(); - - bare_machine = settings.value("BareMachine", 0).toBool(); - accept_pseudo_insts = settings.value("AcceptPseudoInsts", 1).toBool(); - delayed_branches = settings.value("DelayedBranches", 0).toBool(); - delayed_loads = settings.value("DelayedLoads", 0).toBool(); - mapped_io = settings.value("MappedIO", 0).toBool(); - - st_loadExceptionHandler = settings.value("LoadExceptionHandler", true).toBool(); - st_exceptionHandlerFileName = settings.value("ExceptionHandlerFileName", - stdExceptionHandler).toString(); - st_startAddress = settings.value("StartingAddress", starting_address()).toInt(); - st_commandLine = settings.value("CommandLineArguments", "").toString(); - settings.endGroup(); -} - - -void SpimView::writeSettings(bool omitWindowState) -{ - if (!omitWindowState){ - settings.beginGroup("MainWin"); - settings.setValue("Geometry", saveGeometry()); - settings.setValue("WindowState", saveState(1)); - settings.endGroup(); - } - - - settings.beginGroup("RegWin"); - settings.setValue("ColorChangedRegs", st_colorChangedRegisters); - settings.setValue("ChangedRegColor", st_changedRegisterColor); - settings.setValue("RegisterDisplayBase", st_regDisplayBase); - - settings.setValue("Font", st_regWinFont); - settings.setValue("FontColor", st_regWinFontColor); - settings.setValue("BackgroundColor", st_regWinBackgroundColor); - settings.endGroup(); - - - settings.beginGroup("TextWin"); - settings.setValue("ShowUserTextSeg", st_showUserTextSegment); - settings.setValue("ShowKernelTextSeg", st_showKernelTextSegment); - settings.setValue("ShowTextComments", st_showTextComments); - settings.setValue("ShowInstDisassembly", st_showTextDisassembly); - - settings.setValue("Font", st_textWinFont); - settings.setValue("FontColor", st_textWinFontColor); - settings.setValue("BackgroundColor", st_textWinBackgroundColor); - settings.endGroup(); - - - settings.beginGroup("DataWin"); - settings.setValue("ShowUserDataSeg", st_showUserDataSegment); - settings.setValue("ShowUserStackSeg", st_showUserStackSegment); - settings.setValue("ShowKernelDataSeg", st_showKernelDataSegment); - settings.setValue("DataSegmentDisplayBase", st_dataSegmentDisplayBase); - settings.endGroup(); - - settings.beginGroup("FileMenu"); - settings.setValue("RecentFilesLength", st_recentFilesLength); - int i; - for (i = 0; i < st_recentFilesLength; i++) - { - if (i < st_recentFiles.length()) - { - settings.setValue("RecentFile" + QString(i), st_recentFiles[i]); - } - else - { - settings.setValue("RecentFile" + QString(i), ""); - } - } - settings.endGroup(); - - - settings.beginGroup("Spim"); - settings.setValue("Quiet", quiet); - - settings.setValue("BareMachine", bare_machine); - settings.setValue("AcceptPseudoInsts", accept_pseudo_insts); - settings.setValue("DelayedBranches", delayed_branches); - settings.setValue("DelayedLoads", delayed_loads); - settings.setValue("MappedIO", mapped_io); - - settings.setValue("LoadExceptionHandler", st_loadExceptionHandler); - settings.setValue("ExceptionHandlerFileName", st_exceptionHandlerFileName); - settings.setValue("StartingAddress", st_startAddress); - settings.setValue("CommandLine", st_commandLine); - settings.endGroup(); - - settings.sync(); -} - - -// Restore windows to initial, default configuration. -// - -void SpimView::win_Restore() -{ - QMessageBox msgBox; - msgBox.setText("QtSpim will now exit. Restart QtSpim and the windows will be restored to default configuration."); - msgBox.setStandardButtons(QMessageBox::Ok | QMessageBox::Abort); - msgBox.setDefaultButton(QMessageBox::Ok); - if (msgBox.exec() == QMessageBox::Ok) { - settings.beginGroup("MainWin"); - settings.remove("Geometry"); // Remove current window configuration - settings.remove("WindowState"); - settings.endGroup(); - - writeSettings(true); // Write settings without window config, so next startup will revert to default configuration - exit(1); - } -} diff --git a/spim-qtbase/QtSpim/texttextedit.h b/spim-qtbase/QtSpim/texttextedit.h deleted file mode 100644 index 492ea81..0000000 --- a/spim-qtbase/QtSpim/texttextedit.h +++ /dev/null @@ -1,59 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include - -class textTextEdit : public QTextEdit -{ - Q_OBJECT - -public: - textTextEdit(); - void contextMenuEvent(QContextMenuEvent* event); - QAction* action_Context_SetBreakpoint; - QAction* action_Context_ClearBreakpoint; - -protected: - virtual void closeEvent(QCloseEvent* event); - virtual void hideEvent(QHideEvent* event); - virtual void showEvent(QShowEvent* event); - -private: - QPoint contextGlobalPos; - -public slots: - void setBreakpoint(); - void clearBreakpoint(); - int pcFromPos(QTextCursor* cursor); -}; diff --git a/spim-qtbase/QtSpim/textwin.cpp b/spim-qtbase/QtSpim/textwin.cpp deleted file mode 100644 index 7939db2..0000000 --- a/spim-qtbase/QtSpim/textwin.cpp +++ /dev/null @@ -1,290 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spimview.h" -#include "ui_spimview.h" -# - -#include -#include -#include -#define QT_USE_FAST_CONCATENATION - - -// -// Text segment window -// - -void SpimView::DisplayTextSegments(bool force) -{ - if (force || text_modified) - { - textTextEdit* te = ui->TextSegDockWidget->findChild("TextSegmentTextEdit"); - - te->clear(); - QString windowContents = windowFormattingStart(st_textWinFont, st_textWinFontColor, st_textWinBackgroundColor) - % formatUserTextSeg() - % formatKernelTextSeg() - % windowFormattingEnd(); - te->insertHtml(windowContents); - highlightInstruction(PC); - } - text_modified = false; -} - - -QString SpimView::formatUserTextSeg() -{ - if (st_showUserTextSegment) - { - return formatSegLabel("User Text Segment", TEXT_BOT, text_top) - % formatInstructions(TEXT_BOT, text_top); - } - else - { - return QString(""); - } -} - - -QString SpimView::formatKernelTextSeg() -{ - if (st_showKernelTextSegment) - { - return formatSegLabel("Kernel Text Segment", K_TEXT_BOT, k_text_top) - % formatInstructions(K_TEXT_BOT, k_text_top); - } - else - { - return QString(""); - } -} - - -QString breakpointMark() -{ - return QString("N "); -} - - -QString SpimView::formatInstructions(mem_addr from, mem_addr to) -{ - str_stream ss; - mem_addr a; - QString windowContents; - - ss_init(&ss); - for (a = from; a < to; a += 4) - { - instruction *inst = read_mem_inst(a); - if (inst != NULL) - { - format_an_inst(&ss, inst, a); - - char* pc = ss_to_string(&ss); - char* binInst = pc + 14; - char* disassembly = binInst + 11; - char* comment = NULL; - - pc += 3; - pc[8] = '\0'; - binInst += 1; - binInst[8] = '\0'; - comment = strstr(disassembly, ";"); - if (comment != NULL) - { - char* s; - for (s = comment - 1; *s == ' '; s--) - ; - *(s + 1) = '\0'; - } - if (inst_is_breakpoint(a)) - { - windowContents += QString(breakpointMark()); - } - windowContents += QString("[") % QString(pc) % QString("] ") - % (st_showTextDisassembly ? QString(binInst) : QString("")) - % nnbsp(2) % QString("") % QString(disassembly) % QString("") - % nnbsp(25 - strlen(disassembly)) - % (comment != NULL && st_showTextComments - ? QString("") % QString(comment) % QString("") - : QString("")) - % QString("
    "); - ss_clear(&ss); - } - } - - return windowContents; -} - - -void SpimView::highlightInstruction(mem_addr pc) -{ - QTextEdit* te = ui->TextSegDockWidget->findChild("TextSegmentTextEdit"); - QTextCursor cursor(te->document()); - - QRegExp rx("\\[" + formatAddress(pc) + "\\]"); // Start of specific line - cursor = te->document()->find(rx, cursor); - if (!cursor.isNull()) - { - cursor.select(QTextCursor::LineUnderCursor); - QString l = cursor.selectedText(); - - QTextCharFormat format; - format.setBackground(QBrush(Qt::cyan)); - - QTextEdit::ExtraSelection es; - es.cursor = cursor; - es.format = format; - QList ess; - ess << es; - te->setExtraSelections(ess); - - te->setTextCursor(cursor); - te->ensureCursorVisible(); - } -} - - -// -// Breakpoint -// - -textTextEdit::textTextEdit() -{ - action_Context_SetBreakpoint = new QAction(this); - action_Context_SetBreakpoint->setObjectName("action_SetBreakpoint"); - action_Context_SetBreakpoint->setText("Set Breakpoint"); - - action_Context_ClearBreakpoint = new QAction(this); - action_Context_ClearBreakpoint->setObjectName("action_ClearBreakpoint"); - action_Context_ClearBreakpoint->setText("Clear Breakpoint"); -} - - -void textTextEdit::contextMenuEvent(QContextMenuEvent* event) -{ - QMenu *menu = createStandardContextMenu(); - menu->addSeparator(); - menu->addAction(action_Context_SetBreakpoint); - menu->addAction(action_Context_ClearBreakpoint); - contextGlobalPos = event->globalPos(); - - menu->exec(event->globalPos()); -} - - -void textTextEdit::setBreakpoint() -{ - QTextCursor cursor; - mem_addr pc = pcFromPos(&cursor); - if (pc != 0 && !inst_is_breakpoint(pc)) - { - add_breakpoint(pc); - - cursor.setPosition(cursor.anchor()); - cursor.insertHtml(breakpointMark()); - update(); - } -} - - -void textTextEdit::clearBreakpoint() -{ - QTextCursor cursor; - mem_addr pc = pcFromPos(&cursor); - if (pc != 0 && inst_is_breakpoint(pc)) - { - delete_breakpoint(pc); - - cursor.setPosition(cursor.anchor()); - cursor.movePosition(QTextCursor::NextCharacter, QTextCursor::KeepAnchor, 2); - cursor.removeSelectedText(); - update(); - } -} - - -int textTextEdit::pcFromPos(QTextCursor* cursor) -{ - // Position of context menu is location user right-click. Find the line at this point - // extract the pc. - // - QPoint mouseViewportPos = this->viewport()->mapFromGlobal(contextGlobalPos); - - *cursor = this->cursorForPosition(mouseViewportPos); - cursor->select(QTextCursor::LineUnderCursor); - QString line = cursor->selectedText(); - - QRegExp rx("\\[([0-9a-fA-F]{8})\\]"); // Address of instruction - - rx.indexIn(line); - QString pcStr = rx.cap(1); - if (pcStr != "") - { - bool ok; - mem_addr pc = pcStr.toUInt(&ok, 16); - return (ok ? pc : 0); - } - return 0; -} - - -void textTextEdit::closeEvent(QCloseEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - Window->ui->action_Win_TextSegment->setChecked(false); - } - event->accept(); -} - - -void textTextEdit::hideEvent(QHideEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - Window->ui->action_Win_TextSegment->setChecked(false); - } - event->accept(); -} - - -void textTextEdit::showEvent(QShowEvent* event) -{ - if (Window != NULL) // Event can occur while window is being constructed; ignore in that case - { - Window->ui->action_Win_TextSegment->setChecked(true); - } - event->accept(); -} diff --git a/spim-qtbase/QtSpim/windows_images.qrc b/spim-qtbase/QtSpim/windows_images.qrc deleted file mode 100644 index 9f31b58..0000000 --- a/spim-qtbase/QtSpim/windows_images.qrc +++ /dev/null @@ -1,51 +0,0 @@ - - - - - - windows_images/ClearRegs.png - windows_images/Help.png - windows_images/LoadFile.png - windows_images/Pause.png - windows_images/Print.png - windows_images/Reinit.png - windows_images/ReloadFile.png - windows_images/Run.png - windows_images/SaveLog.png - windows_images/Settings.png - windows_images/SingleStep.png - windows_images/Stop.png - windows_images/qtspim.png - - diff --git a/spim-qtbase/README b/spim-qtbase/README deleted file mode 100644 index 645e645..0000000 --- a/spim-qtbase/README +++ /dev/null @@ -1,49 +0,0 @@ - README FILE FOR SPIM - ==================== - -This directory contains part of SPIM--an assembly language MIPS R2000/R3000 -simulator. It contains the terminal interface to SPIM. - -SPIM is covered by a BSD license. - -Copyright (c) 1990-2010, James R. Larus. -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -Redistributions of source code must retain the above copyright notice, -this list of conditions and the following disclaimer. - -Redistributions in binary form must reproduce the above copyright notice, -this list of conditions and the following disclaimer in the documentation and/or -other materials provided with the distribution. - -Neither the name of the James R. Larus nor the names of its contributors may be -used to endorse or promote products derived from this software without specific -prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - - -The files in this directory are: - -README - This file. - -Makefile - Makefile to build the terminal version of spim. This Makefile works - for Unix and on Microsoft Windows under Cygwin. - -spim.c - Terminal interface to spim. diff --git a/spim-qtbase/Tests/read.s b/spim-qtbase/Tests/read.s deleted file mode 100644 index d5d4e6b..0000000 --- a/spim-qtbase/Tests/read.s +++ /dev/null @@ -1,50 +0,0 @@ -# Read a string -# -# -# Copyright (c) 1990-2011, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - .data -m1: .asciiz "Read next line\n" - .text - .globl main -main: - - li $v0 4 # syscall 4 (print_str) - la $a0 m1 - syscall - - li $v0 8 # syscall 8 (read_string) - syscall - - li $v0 4 # syscall 4 (print_str) - syscall - - jr $ra - diff --git a/spim-qtbase/Tests/time.s b/spim-qtbase/Tests/time.s deleted file mode 100644 index e3962c9..0000000 --- a/spim-qtbase/Tests/time.s +++ /dev/null @@ -1,57 +0,0 @@ -# Simple loop to test execution speed -# -# -# Copyright (c) 1990-2011, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - .data -m1: .asciiz "Hit return to start timing\n" -m2: .asciiz "Done with timing\n" - .text - .globl main -main: - - li $v0 4 # syscall 4 (print_str) - la $a0 m1 - syscall - - li $v0 5 # syscall 5 (read_int) - syscall - - li $t0 10000000 -loop: xor $t1 $t1 $t1 - sub $t0 1 - bnez $t0 loop - - li $v0 4 # syscall 4 (print_str) - la $a0 m2 - syscall - - jr $ra - diff --git a/spim-qtbase/Tests/timer.s b/spim-qtbase/Tests/timer.s deleted file mode 100644 index f1a3982..0000000 --- a/spim-qtbase/Tests/timer.s +++ /dev/null @@ -1,50 +0,0 @@ - .text - .globl main -main: - # allow hardware interrupts - mfc0 $t0, $12 # get status register - ori $t0, $t0, 0xff01 - mtc0 $t0, $12 - - # set up a timer - li $t0, 5 # get a timer interrupt every second - mtc0 $t0, $11 # set up compare register - mtc0 $zero, $9 - -forever: - addi $s0, $s0, 1 # 1,2,3,4,... - j forever - - jr $ra - -#--- END MAIN - - - .kdata -save0: .word 0 -save1: .word 0 - -msg: .asciiz "\nGot a timer interrupt\n" - - .ktext 0x80000180 -timer_handler: - sw $a0 save0 - sw $v0 save1 - - li $v0, 4 # print a message - la $a0, msg - syscall - - # reset timer - li $t0, 100 # get a timer interrupt every second - mtc0 $t0, $11 # set up compare register - mtc0 $zero, $9 - - lw $a0 save0 - lw $v0 save1 - - mtc0 $zero $13 # Clear Cause register - mfc0 $k0 $12 # Set Status register - ori $k0 0x1 # Interrupts enabled - mtc0 $k0 $12 - eret diff --git a/spim-qtbase/Tests/tt.alu.bare.s b/spim-qtbase/Tests/tt.alu.bare.s deleted file mode 100755 index 30bb78d..0000000 --- a/spim-qtbase/Tests/tt.alu.bare.s +++ /dev/null @@ -1,1852 +0,0 @@ -# SPIM S20 MIPS simulator. -# A torture test for the ALU instructions in the bare SPIM simulator. -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - -# Adapted by Anne Rogers from tt.le.s. -# Run -bare -notrap. - -# IMPORTANT!!! -# This file only works on little-endian machines. -# - -# Test ALU instructions. - -# WARNING: This code is not relocatable. DO NOT add instructions without -# changing test code for JAL, JALR, BGEZAL, BLTZAL. Add new "data" statements -# only at after "Passed all tests\n". - - - .data -saved_ret_pc: .word 0 # Holds PC to return from main -sm: .asciiz "Failed " - .text -# Standard startup code. Invoke the routine main with no arguments. - .globl __start -__start: jal main - addu $0 $0 $0 # Nop - addiu $2 $0 10 - syscall # syscall 10 (exit) - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - - .globl main -main: - lui $4 0x1000 - sw $31 0($4) - -# -# Try modifying R0 -# - addi $0 $0 1 - -# -# Now, test each instruction -# - - .data -add_: .asciiz "Testing ADD\n" - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 add_ - lui $a0, 0x1000 - ori $a0 $a0 0xd - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - add $4 $0 $0 - bne $4 $0 fail - addu $0 $0 $0 # Nop - add $4 $0 $2 - bne $4 $2 fail - addu $0 $0 $0 # Nop - add $4 $4 $3 - bne $4 $0 fail - addu $0 $0 $0 # Nop - - .data -addi_: .asciiz "Testing ADDI\n" - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 addi_ - lui $a0, 0x1000 - ori $a0 $a0 0x1a - syscall - - addi $2 $0 1 - - addi $4 $0 0 - bne $4 $0 fail - addu $0 $0 $0 # Nop - addi $4 $0 1 - bne $4 $2 fail - addu $0 $0 $0 # Nop - addi $4 $4 -1 - bne $4 $0 fail - - - .data -addiu_: .asciiz "Testing ADDIU\n" - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 addiu_ - lui $a0, 0x1000 - ori $a0 $a0 0x28 - syscall - - addi $2 $0 1 - addiu $4 $0 0 - bne $4 $0 fail - addu $0 $0 $0 # Nop - addiu $4 $0 1 - bne $4 $2 fail - addu $0 $0 $0 # Nop - addiu $4 $4 -1 - bne $4 $0 fail - addu $0 $0 $0 # Nop - - lui $2 0x3fff - ori $2 $2 0xffff - addiu $2 $2 101 - - - .data -addu_: .asciiz "Testing ADDU\n" - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 addu_ - lui $a0, 0x1000 - ori $a0 $a0 0x37 - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - addu $4 $0 $0 - bne $4 $0 fail - addu $0 $0 $0 # Nop - addu $4 $0 $2 - bne $4 $2 fail - addu $0 $0 $0 # Nop - addu $4 $4 $3 - bne $4 $0 fail - addu $0 $0 $0 # Nop - - - lui $2 0x3fff - ori $2 $2 0xffff - addu $2 $2 $2 - - - .data -and_: .asciiz "Testing AND\n" - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 and_ - lui $a0, 0x1000 - ori $a0 $a0 0x37 - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - and $4 $0 $0 - bne $4 $0 fail - addu $0 $0 $0 # Nop - and $4 $2 $2 - beq $4 $0 fail - addu $0 $0 $0 # Nop - and $4 $2 $3 - bne $4 $2 fail - - - .data -andi_: .asciiz "Testing ANDI\n" - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 andi_ - lui $a0, 0x1000 - ori $a0 $a0 0x52 - syscall - - addi $2 $0 1 - addi $3 $0 -1 - addi $5 $0 -1 - - andi $4 $0 0 - bne $4 $0 fail - addu $0 $0 $0 # Nop - and $4 $2 1 - beq $4 $0 fail - addu $0 $0 $0 # Nop - and $4 $2 $5 - bne $4 $2 fail - addu $0 $0 $0 # Nop - and $4 $3 $5 - bne $4 $3 fail - addu $0 $0 $0 # Nop - - - .data -beq_: .asciiz "Testing BEQ\n" - .text - add $v0 $0 4 # syscall 4 (print_str) -# la $a0 beq_ - lui $a0, 0x1000 - ori $a0 $a0 0x60 - syscall - - add $2 $0 -1 - add $3 $0 1 - - beq $0 $0 l1 -# j fail - addu $0 $0 $0 # Nop -l1: beq $2 $2 l2 -# j fail - addu $0 $0 $0 # Nop -l2: beq $3 $2 fail - addu $0 $0 $0 # Nop - - addi $2 $0 3 -l2_1: sub $2 $2 $3 - bne $2 $0 l2_1 - addu $0 $0 $0 # Nop - - - .data -bgez_: .asciiz "Testing BGEZ\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 bgez_ - lui $a0, 0x1000 - ori $a0 $a0 0x6d - - syscall - - addi $2 $0 -1 - addi $3 $0 1 - - bgez $0 l3 - addu $0 $0 $0 # Nop - j fail -l3: bgez $3 l4 - addu $0 $0 $0 # Nop - j fail -l4: bgez $2 fail - addu $0 $0 $0 # Nop - - .data -bgtz_: .asciiz "Testing BGTZ\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 bgtz_ - lui $a0, 0x1000 - ori $a0 $a0 0x7b - syscall - - addi $2 $0 -1 - addi $3 $0 1 - - bgtz $0 fail - addu $0 $0 $0 # Nop -l7: bgtz $3 l8 - addu $0 $0 $0 # Nop - j fail -l8: bgtz $2 fail - addu $0 $0 $0 # Nop - - .data -blez_: .asciiz "Testing BLEZ\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 blez_ - lui $a0, 0x1000 - ori $a0 $a0 0x89 - syscall - - addi $2 $0 -1 - addi $3 $0 1 - - blez $0 l9 - addu $0 $0 $0 # Nop - j fail -l9: blez $2 l10 - addu $0 $0 $0 # Nop - j fail -l10: blez $3 fail - addu $0 $0 $0 # Nop - - .data -bltz_: .asciiz "Testing BLTZ\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 bltz_ - lui $a0, 0x1000 - ori $a0 $a0 0x97 - - syscall - - addi $2 $0 -1 - addi $3 $0 1 - - bltz $0 fail - addu $0 $0 $0 # Nop -l11: bltz $2 l12 - addu $0 $0 $0 # Nop - j fail -l12: bltz $3 fail - addu $0 $0 $0 # Nop - - .data -bne_: .asciiz "Testing BNE\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 bne_ - lui $a0, 0x1000 - ori $a0 $a0 0xa5 - syscall - - addi $2 $0 -1 - addi $3 $0 1 - - bne $0 $0 fail - addu $0 $0 $0 # Nop - bne $2 $2 fail - addu $0 $0 $0 # Nop - bne $3 $2 l16 - addu $0 $0 $0 # Nop -l16: - addu $0 $0 $0 # Nop - - .data -j_: .asciiz "Testing J\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 j_ - lui $a0, 0x1000 - ori $a0 $a0 0xb2 - syscall - - j l17 - j fail -l17: addu $0 $0 $0 # Nop - - - .data -lb_: .asciiz "Testing LB\n" -# lb2_: .asciiz "Expect a address error exceptions:\n " -lbd_: .byte 1, -1, 0, 128 -lbd1_: .word 0x76543210, 0xfedcba98 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lb_ - lui $a0, 0x1000 - ori $a0 $a0 0xbd - - syscall - -# la $2 lbd_ - lui $2, 0x1000 - ori $2 $2 0xc9 - lb $3 0($2) - addu $4 $0 1 - bne $3 $4 fail - lb $3 1($2) - addi $4 $0 -1 - bne $3 $4 fail - lb $3 2($2) - addu $0 $0 $0 # Nop - bne $3 $0 fail - lb $3 3($2) - lui $4 0xffff - ori $4 0xff80 - bne $3 $4 fail - -# la $t0 lbd1_ - lui $t0, 0x1000 - ori $t0 $t0 0xd0 - lb $t1 0($t0) - addi $4 $0 0x10 - bne $t1 $4 fail - lb $t1 1($t0) - addi $4 $0 0x32 - bne $t1 $4 fail - lb $t1 2($t0) - addi $4 $0 0x54 - bne $t1 $4 fail - lb $t1 3($t0) - addi $4 $0 0x76 - bne $t1 $4 fail - lb $t1 4($t0) - lui $4 0xffff - addi $4 $0 0xff98 - bne $t1 $4 fail - lb $t1 5($t0) - lui $4 0xffff - addi $4 $0 0xffba - bne $t1 $4 fail - lb $t1 6($t0) - lui $4 0xffff - addi $4 $0 0xffdc - bne $t1 $4 fail - lb $t1 7($t0) - lui $4 0xffff - addi $4 $0 0xfffe - bne $t1 $4 fail - -# li $v0 4 # syscall 4 (print_str) -# la $a0 lb2_ -# syscall -# -# lb $3 1000000($sp) - - - .data -lbu_: .asciiz "Testing LBU\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lbu_ - lui $a0, 0x1000 - ori $a0 $a0 0xd8 - syscall - -# la $2 lbd_ - lui $2, 0x1000 - ori $2 $2 0xc9 - - lbu $3 0($2) - addi $4 $0 1 - bne $3 $4 fail - lbu $3 1($2) - addi $4 $0 0xff - bne $3 $4 fail - lbu $3 2($2) - addu $0 $0 $0 # Nop - bne $3 $0 fail - lbu $3 3($2) - addu $4 $0 128 - bne $3 $4 fail - -# la $t0 lbd1_ - lui $t0, 0x1000 - ori $t0 $t0 0xd0 - - lbu $t1 0($t0) - addi $4 $0 0x10 - bne $t1 $4 fail - lbu $t1 1($t0) - addi $4 $0 0x32 - bne $t1 $4 fail - lbu $t1 2($t0) - addi $4 $0 0x54 - bne $t1 $4 fail - lbu $t1 3($t0) - addi $4 $0 0x76 - bne $t1 $4 fail - lbu $t1 4($t0) - addi $4 $0 0x98 - bne $t1 $4 fail - lbu $t1 5($t0) - addi $4 $0 0xba - bne $t1 $4 fail - lbu $t1 6($t0) - addi $4 $0 0xdc - bne $t1 $4 fail - lbu $t1 7($t0) - addi $4 $0 0xfe - bne $t1 $4 fail - addu $0 $0 $0 # Nop - -# Causes an exception -- do later. -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lb2_ -# syscall -# -# lbu $3 1000000($sp) - - - .data -lh_: .asciiz "Testing LH\n" -#lh2_: .asciiz "Expect two address error exceptions:\n " -lhd_: .half 1, -1, 0, 0x8000 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lh_ - lui $a0, 0x1000 - ori $a0 $a0 0xe5 - syscall - -# la $2 lhd_ - lui $2, 0x1000 - ori $2 $2 0xf2 - lh $3 0($2) - addi $4 $0 1 - bne $3 $4 fail - lh $3 2($2) - addi $4 $0 -1 - bne $3 $4 fail - lh $3 4($2) - addi $4 $0 0 - bne $3 $4 fail - lh $3 6($2) - lui $4 0xffff - ori $4 $4 0x8000 - bne $3 $4 fail - addu $0 $0 $0 # Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lh2_ -# syscall -# -# lh $3 1000000($sp) -# lh $3 1000001($sp) - - .data -lhu_: .asciiz "Testing LHU\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lhu_ - lui $a0, 0x1000 - ori $a0 $a0 0xfa - syscall - -# la $2 lhd_ - lui $2, 0x1000 - ori $2 $2 0xf2 - lhu $3 0($2) - addi $4 $0 1 - bne $3 $4 fail - lhu $3 2($2) - ori $4 $0 0xffff - bne $3 $4 fail - lhu $3 4($2) - addi $4 $0 0 - bne $3 $4 fail - lhu $3 6($2) - ori $4 $0 0x8000 - bne $3 $4 fail - addu $0 $0 $0 #Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lh2_ -# syscall -# -# lhu $3 1000000($sp) -# lhu $3 1000001($sp) - - - .data -lui_: .asciiz "Testing LUI\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lui_ - lui $a0, 0x1000 - ori $a0 $a0 0x107 - syscall - - lui $2 0 - bne $2 $0 fail - lui $2 1 - srl $2 $2 16 - addiu $2 $2 -1 # Don't do compare directly since it uses LUI - bne $2 $0 fail - lui $2 1 - andi $2 $2 0xffff - bne $2 $0 fail - lui $2 -1 - srl $2 $2 16 - addiu $2 $2 1 - andi $2 $2 0xffff - bne $2 $0 fail - addu $0 $0 $0 #Nop - - .data -lw_: .asciiz "Testing LW\n" -lwd_: .word 1, -1, 0, 0x8000000 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lw_ - lui $a0, 0x1000 - ori $a0 $a0 0x114 - syscall - -# la $2 lwd_ - lui $2, 0x1000 - ori $2 $2 0x120 - lw $3 0($2) - addi $4 $0 1 - bne $3 $4 fail - lw $3 4($2) - addi $4 $0 -1 - bne $3 $4 fail - lw $3 8($2) - addi $4 $0 0 - bne $3 $4 fail - lw $3 12($2) - lui $4 0x800 - ori $4 $4 0x0000 - bne $3 $4 fail - - add $2 $2 12 - lw $3 -12($2) - addi $4 $0 1 - bne $3 $4 fail - lw $3 -8($2) - addi $4 $0 -1 - bne $3 $4 fail - lw $3 -4($2) - addi $4 $0 0 - bne $3 $4 fail - lw $3 0($2) - lui $4 0x800 - ori $4 $4 0x0000 - bne $3 $4 fail - addu $0 $0 $0 #Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lh2_ -# syscall -# -# lw $3 1000000($sp) -# lw $3 1000001($sp) - - .data -lwl_: .asciiz "Testing LWL\n" - .align 2 -lwld_: .byte 0 1 2 3 4 5 6 7 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lwl_ - lui $a0, 0x1000 - ori $a0 $a0 0x130 - syscall - -# la $2 lwld_ - lui $2, 0x1000 - ori $2 $2 0x140 - addu $3 $0 $0 # Move $3 $0 - lwl $3 0($2) - addi $4 $0 0 - bne $3 $4 fail - addu $3 $0 $0 # Move $3 $0 - lwl $3 1($2) - lui $4 0x0100 - ori $4 $4 0x0000 - bne $3 $4 fail - addi $3 $0 5 - lwl $3 1($2) - lui $4 0x0100 - ori $4 $4 0x0005 - bne $3 $4 fail - addu $3 $0 $0 # Move $3 $0 - lwl $3 2($2) - lui $4 0x0201 - ori $4 $4 0x0000 - bne $3 $4 fail - addi $3 $0 5 - lwl $3 2($2) - lui $4 0x0201 - ori $4 $4 0x0005 - bne $3 $4 fail - addu $3 $0 $0 # Move $3 $0 - lwl $3 3($2) - lui $4 0x0302 - ori $4 $4 0x0100 - bne $3 $4 fail - addi $3 $0 5 - lwl $3 3($2) - lui $4 0x0302 - ori $4 $4 0x0100 - bne $3 $4 fail - addu $0 $0 $0 # Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lh2_ -# syscall -# -# lwl $3 1000000($sp) -# lwl $3 1000001($sp) - - - - .data -lwr_: .asciiz "Testing LWR\n" - .align 2 -lwrd_: .byte 0 1 2 3 4 5 6 7 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lwr_ - lui $a0, 0x1000 - ori $a0 $a0 0x148 - syscall - -# la $2 lwrd_ - lui $2, 0x1000 - ori $2 $2 0x158 - - lui $3 0x0000 - ori $3 $3 0x0500 - lwr $3 0($2) - lui $4 0x0302 - ori $4 $4 0x0100 - bne $3 $4 fail - addu $3 $0 $0 # Move $3 $0 - lwr $3 1($2) - lui $4 0x0003 - ori $4 $4 0x0201 - bne $3 $4 fail - lui $3 0x5000 - ori $3 $3 0x0000 - lwr $3 1($2) - lui $4 0x5003 - ori $4 $4 0x0201 - bne $3 $4 fail - addu $3 $0 $0 # Move $3 $0 - lwr $3 2($2) - ori $4 $0 0x0302 - bne $3 $4 fail - lui $3 0x5000 - ori $3 $3 0x0000 - lwr $3 2($2) - lui $4 0x5000 - ori $4 $4 0x0302 - bne $3 $4 fail - addu $0 $0 $0 # Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lh2_ -# syscall -# -# lwr $3 1000000($sp) -# lwr $3 1000001($sp) - - .data -nor_: .asciiz "Testing NOR\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 nor_ - lui $a0, 0x1000 - ori $a0 $a0 0x160 - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - nor $4 $0 $0 - addi $5 $0 -1 - bne $4 $5 fail - nor $4 $2 $2 - lui $5 0xffff - ori $5 $5 0xfffe - bne $4 $5 fail - nor $4 $2 $3 - bne $4 $0 fail - addu $0 $0 $0 #Nop - - .data -or_: .asciiz "Testing OR\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 or_ - lui $a0, 0x1000 - ori $a0 $a0 0x16d - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - or $4 $0 $0 - bne $4 $0 fail - or $4 $2 $2 - addi $5 $0 1 - bne $4 $5 fail - or $4 $2 $3 - addi $5 $0 -1 - bne $4 $5 fail - addu $0 $0 $0 #Nop - - - .data -ori_: .asciiz "Testing ORI\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 ori_ - lui $a0, 0x1000 - ori $a0 $a0 0x179 - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - ori $4 $0 0 - bne $4 $0 fail - ori $4 $2 1 - addi $5 $0 1 - bne $4 $5 fail - ori $4 $3 -1 - lui $5 0xffff - ori $5 $5 0xffff - bne $4 $5 fail - addu $0 $0 $0 #Nop - - .data -sb_: .asciiz "Testing SB\n" -#sb2_: .asciiz "Expect a address error exceptions:\n " - .align 2 -sbd_: .byte 0, 0, 0, 0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sb_ - lui $a0, 0x1000 - ori $a0 $a0 0x186 - syscall - - addi $3 $0, 1 -# la $2 sbd_ - lui $2, 0x1000 - ori $2 $2 0x194 - sb $3 0($2) - lw $4 0($2) - ori $5 $0 0x1 - bne $4 $5 fail - addi $3 $0 2 - sb $3 1($2) - lw $4 0($2) - ori $5 $0 0x201 - bne $4 $5 fail - addi $3 $0 3 - sb $3 2($2) - lw $4 0($2) - lui $5 0x3 - ori $5 $5 0x0201 - bne $4 $5 fail - addi $3 $0 4 - sb $3 3($2) - lw $4 0($2) - lui $5 0x0403 - ori $5 $5 0x0201 - bne $4 $5 fail - addu $0 $0 $0 #Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sb2_ -# syscall -# -# sb $3 1000000($sp) - - -# RFE tested previously - - .data -sh_: .asciiz "Testing SH\n" -#sh2_: .asciiz "Expect two address error exceptions:\n " - .align 2 -shd_: .byte 0, 0, 0, 0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sh_ - lui $a0, 0x1000 - ori $a0 $a0 0x198 - syscall - - addi $3 $0, 1 -# la $2 shd_ - lui $2, 0x1000 - ori $2 $2 0x1a4 - - sh $3 0($2) - lw $4 0($2) - ori $5 $0 0x1 - bne $4 $5 fail - addi $3 $0 2 - sh $3 2($2) - lw $4 0($2) - lui $5 0x2 - ori $5 $5 0x0001 - bne $4 $5 fail - addu $0 $0 $0 #Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sh2_ -# syscall -# -# sh $3 1000000($sp) -# sh $3 1000001($sp) - - .data -sll_: .asciiz "Testing SLL\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sll_ - lui $a0, 0x1000 - ori $a0 $a0 0x1a8 - syscall - - addi $2 $0 1 - - sll $3 $2 0 - ori $4 $0 1 - bne $3 $4 fail - sll $3 $2 1 - ori $4 $0 2 - bne $3 $4 fail - sll $3 $2 16 - lui $4 0x1 - ori $4 $4 0x0000 - bne $3 $4 fail - sll $3 $2 32 - ori $4 $0 1 - bne $3 $4 fail - addu $0 $0 $0 # Nop - - .data -sllv_: .asciiz "Testing SLLV\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sllv_ - lui $a0, 0x1000 - ori $a0 $a0 0x1b5 - syscall - - addi $2 $0 1 - addi $4 $0 0 - sllv $3 $2 $4 - ori $5 $0 1 - bne $3 $5 fail - addi $4 $0 1 - sllv $3 $2 $4 - ori $5 $0 2 - bne $3 $5 fail - addi $4 $0 16 - sllv $3 $2 $4 - lui $5 0x1 - ori $5 $5 0x0000 - bne $3 $5 fail - addi $4 $0 32 - sllv $3 $2 $4 - ori $5 $0 1 - bne $3 $5 fail - addu $0 $0 $0 # Nop - - .data -slt_: .asciiz "Testing SLT\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 slt_ - lui $a0, 0x1000 - ori $a0 $a0 0x1c3 - syscall - - ori $5 $0 1 - - slt $3 $0 $0 - bne $3 $0 fail - addi $2 $0 1 - slt $3 $2 $0 - bne $3 $0 fail - slt $3 $0 $2 - bne $3 $5 fail - addi $2 $0 -1 - slt $3 $2 $0 - bne $3 $5 fail - slt $3 $0 $2 - bne $3 $0 fail - addi $2 $0 -1 - addi $4 $0 1 - slt $3 $2 $4 - bne $3 $5 fail - addu $0 $0 $0 # Nop - - .data -slti_: .asciiz "Testing SLTI\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 slti_ - lui $a0, 0x1000 - ori $a0 $a0 0x1d0 - syscall - - ori $5 $0 1 - - slti $3 $0 0 - bne $3 $0 fail - addi $2 $0 1 - slti $3 $2 0 - bne $3 $0 fail - slti $3 $0 1 - bne $3 $5 fail - addi $2 $0 -1 - slti $3 $2 0 - bne $3 $5 fail - slti $3 $0 -1 - bne $3 $0 fail - addi $2 $0 -1 - addi $4 $0 1 - slti $3 $2 1 - bne $3 $5 fail - slti $3 $4 -1 - bne $3 $0 fail - addu $0 $0 $0 # Nop - - - .data -sltiu_: .asciiz "Testing SLTIU\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sltiu_ - lui $a0, 0x1000 - ori $a0 $a0 0x1de - syscall - - ori $5 $0 1 - - sltiu $3 $0 0 - bne $3 $0 fail - addi $2 $0 1 - sltiu $3 $2 0 - bne $3 $0 fail - sltiu $3 $0 1 - bne $3 $5 fail - addi $2 $0 -1 - sltiu $3 $2 0 - bne $3 $0 fail - sltiu $3 $0 -1 - bne $3 $5 fail - addi $2 $0 -1 - addi $4 $0 1 - sltiu $3 $2 1 - bne $3 $0 fail - sltiu $3 $4 -1 - bne $3 $5 fail - addu $0 $0 $0 # Nop - - - .data -sltu_: .asciiz "Testing SLTU\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sltu_ - lui $a0, 0x1000 - ori $a0 $a0 0x1ed - syscall - - ori $5 $0 1 - - sltu $3 $0 $0 - bne $3 $0 fail - addi $2 $0 1 - sltu $3 $2 $0 - bne $3 $0 fail - sltu $3 $0 $2 - bne $3 $5 fail - addi $2 $0 -1 - sltu $3 $2 $0 - bne $3 $0 fail - sltu $3 $0 $2 - bne $3 $5 fail - addi $2 $0 -1 - addi $4 $0 1 - sltu $3 $2 $4 - bne $3 $0 fail - addu $0 $0 $0 # Nop - - .data -sra_: .asciiz "Testing SRA\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sra_ - lui $a0, 0x1000 - ori $a0 $a0 0x1fb - syscall - - addi $2 $0 1 - sra $3 $2 0 - ori $5 $0 1 - bne $3 $5 fail - sra $3 $2 1 - bne $3 $0 fail - addi $2 $0 0x1000 - sra $3 $2 4 - ori $5 $0 0x100 - bne $3 $5 fail - lui $5 0x8000 - ori $5 $5 0x0000 - add $2 $0 $5 - sra $3 $2 4 - lui $5 0xf800 - ori $5 $5 0x0000 - bne $3 $5 fail - addu $0 $0 $0 # Nop - - .data -srav_: .asciiz "Testing SRAV\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 srav_ - lui $a0, 0x1000 - ori $a0 $a0 0x208 - syscall - - addi $2 $0 1 - addi $4 $0 0 - srav $3 $2 $4 - ori $5 $0 1 - bne $3 $5 fail - addi $4 $0 1 - srav $3 $2 $4 - bne $3 $0 fail - addi $2 $0 0x1000 - addi $4 $0 4 - srav $3 $2 $4 - ori $5 $0 0x100 - bne $3 $5 fail - lui $5 0x8000 - ori $5 $5 0x0000 - add $2 $0 $5 - addi $4 $0 4 - srav $3 $2 $4 - lui $5 0xf800 - ori $5 $5 0x0000 - bne $3 $5 fail - addu $0 $0 $0 # Nop - - - - .data -srl_: .asciiz "Testing SRL\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 srl_ - lui $a0, 0x1000 - ori $a0 $a0 0x216 - syscall - - addi $2 $0 1 - srl $3 $2 0 - ori $5 $0 1 - bne $3 $5 fail - srl $3 $2 1 - bne $3 $0 fail - addi $2 $0 0x1000 - srl $3 $2 4 - ori $5 $0 0x100 - bne $3 $5 fail - lui $5 0x8000 - ori $5 $0 0x0000 - add $2 $0 $5 - srl $3 $2 4 - lui $5 0x0800 - ori $5 $0 0x0000 - bne $3 $5 fail - addu $0 $0 $0 #Nop - - - .data -srlv_: .asciiz "Testing SRLV\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 srlv_ - lui $a0, 0x1000 - ori $a0 $a0 0x223 - syscall - - addi $2 $0 1 - addi $4 $0 0 - srlv $3 $2 $4 - ori $5 $0 1 - bne $3 $5 fail - addi $4 $0 1 - srlv $3 $2 $4 - bne $3 $0 fail - addi $2 $0 0x1000 - addi $4 $0 4 - srlv $3 $2 $4 - ori $5 $0 0x100 - bne $3 $5 fail - lui $5 0x8000 - ori $5 $5 0x0000 - add $2 $0 $5 - addi $4 $0 4 - srlv $3 $2 $4 - lui $5 0x0800 - ori $5 $5 0x0000 - bne $3 $5 fail - addu $0 $0 $0 # Nop - - - .data -sub_: .asciiz "Testing SUB\n" -# sub1_: .asciiz "Expect an overflow exceptions:\n " - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sub_ - lui $a0, 0x1000 - ori $a0 $a0 0x231 - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - sub $4, $0, $0 - bne $4 $0 fail - sub $4, $0, $2 - addi $5 $0 -1 - bne $4 $5 fail - sub $4, $2, $0 - ori $5 $0 1 - bne $4, $5 fail - sub $4, $2, $3 - ori $5 $0 2 - bne $4, $5 fail - sub $4, $3, $2 - addi $5 $0 -2 - bne $4, $5 fail - addu $0 $0 $0 # Nop - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sub1_ -# syscall -# addi $2 $0 0x80000000 -# addi $3 $0 1 -# sub $4, $3, $2 - - .data -subu_: .asciiz "Testing SUBU\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 subu_ - lui $a0, 0x1000 - ori $a0 $a0 0x23e - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - subu $4, $0, $0 - bne $4 $0 fail - subu $4, $0, $2 - addi $5 $0 -1 - bne $4 $5 fail - subu $4, $2, $0 - addi $5 $0 1 - bne $4, $5 fail - subu $4, $2, $3 - addi $5 $0 2 - bne $4, $5 fail - subu $4, $3, $2 - addi $5 $0 -2 - bne $4, $5 fail - - lui $5 0x8000 - ori $5 $5 0x0000 - add $2 $0 $5 - addi $3 $0 1 - subu $4, $3, $2 - - .data -sw_: .asciiz "Testing SW\n" -#sw2_: .asciiz "Expect two address error exceptions:\n " - .align 2 -swd_: .byte 0, 0, 0, 0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sw_ - lui $a0, 0x1000 - ori $a0 $a0 0x24c - syscall - -# addi $3 $0, 0x7f7f7f7f - lui $3 0x7f7f - ori $3 $3 0x7f7f -# la $2 swd_ - lui $2, 0x1000 - ori $2 $2 0x258 - sw $3 0($2) - lw $4 0($2) - lui $5 0x7f7f - ori $5 $5 0x7f7f - bne $4 $5 fail - -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sw2_ -# syscall -# -# sw $3 1000000($sp) -# sw $3 1000001($sp) - - - .data -swl_: .asciiz "Testing SWL\n" - .align 2 -swld_: .word 0 0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 swl_ - lui $a0, 0x1000 - ori $a0 $a0 0x25c - syscall - -# la $2 swld_ - lui $2, 0x1000 - ori $2 $2 0x26c -# addi $3 $0 0x01000000 - lui $3 0x0100 - ori $3 $3 0x0000 - swl $3 0($2) - lw $4 0($2) - ori $5 $0 0x1 - bne $4 $5 fail - -# addi $3 $0 0x01020000 - lui $3 0x0102 - ori $3 $3 0x0000 - swl $3 1($2) - lw $4 0($2) - ori $5 $0 0x0102 - bne $4 $5 fail - -# addi $3 $0 0x01020300 - lui $3 0x0102 - ori $3 $3 0x0300 - swl $3 2($2) - lw $4 0($2) - lui $5 0x01 - ori $5 $5 0x0203 - bne $4 $5 fail - -# addi $3 $0 0x01020304 - lui $3 0x0102 - ori $3 $3 0x0304 - swl $3 3($2) - lw $4 0($2) - lui $5 0x0102 - ori $5 $5 0x0304 - bne $4 $5 fail - addu $0 $0 $0 # Nop - - - .data -swr_: .asciiz "Testing SWR\n" - .align 2 -swrd_: .word 0 0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 swr_ - lui $a0, 0x1000 - ori $a0 $a0 0x274 - syscall - -# la $2 swrd_ - lui $2, 0x1000 - ori $2 $2 0x284 - addi $3 $0 1 - swr $3 0($2) - lw $4 0($2) - ori $5 $0 1 - bne $4 $5 fail - - addi $3 $0 0x0102 - swr $3 1($2) - lw $4 0($2) - lui $5 0x1 - ori $5 $5 0x0201 - bne $4 $5 fail - -# addi $3 $0 0x010203 - lui $3 0x01 - ori $3 $3 0x0203 - swr $3 2($2) - lw $4 0($2) - lui $5 0x203 - ori $5 $5 0x0201 - bne $4 $5 fail - -# addi $3 $0 0x01020304 - lui $3 0x0102 - ori $3 $3 0x0304 - swr $3 3($2) - lw $4 0($2) - lui $5 0x403 - ori $5 $5 0x0201 - bne $4 $5 fail - addu $0 $0 $0 #Nop - - - .data -xor_: .asciiz "Testing XOR\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 xor_ - lui $a0, 0x1000 - ori $a0 $a0 0x28c - syscall - - addi $2 $0 1 - addi $3 $0 -1 - - xor $4 $0 $0 - bne $4 $0 fail - xor $4 $3 $3 - bne $4 $0 fail - xor $4 $2 $3 - lui $5 0xffff - ori $5 $5 0xfffe - bne $4 $5 fail - addu $0 $0 $0 #Nop - - .data -xori_: .asciiz "Testing XORI\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 xori_ - lui $a0, 0x1000 - ori $a0 $a0 0x299 - syscall - - addi $2 $0 1 - ori $3 $0 -1 - - xori $4 $0 0 - bne $4 $0 fail - xori $4 $3 -1 - bne $4 $0 fail - xori $4 $2 -1 -# lui $5 0xffff - ori $5 $0 0xfffe - bne $4 $5 fail - - .data -jal_: .asciiz "Testing JAL\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 jal_ - lui $a0, 0x1000 - ori $a0 $a0 0x2a7 - syscall - - jal l18 - addu $0 $0 $0 # Nop -l19: j l20 # 0x00400ea0 - addu $0 $0 $0 # Nop -l18: lui $4 0x0040 # to replace la $4 l19 - ori $4 $4 0x0eb0 # bare machine has a delay slot. - bne $31 $4 fail - addu $0 $0 $0 #Nop - jr $31 - addu $0 $0 $0 #Nop -l20: addu $0 $0 $0 #Nop -- 0x00400ebc - - - .data -jalr_: .asciiz "Testing JALR\n" -#jalr2_: .asciiz "Expect an non-word boundary exception:\n " - .text - addi $v0 $0 4 # syscall 4 (print_str) 0x00400ec0 -# la $a0 jalr_ - lui $a0, 0x1000 - ori $a0 $a0 0x2b4 - syscall - -# la $2 l21 - lui $2 0x0040 # 0x00400ed0 - ori $2 $2 0x0ef4 - addu $4 $0 $2 - jalr $3, $2 - addu $0 $0 $0 #Nop -- 00400ee0 -l23: j l22 -l21: addu $0 $0 $0 # la $4 l21 -- delay slot. - bne $3 $4 fail - addu $0 $0 $0 # Nop -- 00400ef0 - jr $3 -l22: addu $0 $0 $0 # Nop - -# li $v0 4 # syscall 4 (print_str) -# la $a0 jalr2_ -# syscall -# la $2 l24 -# add $2 $2 2 -# l24: jalr $3 $2 - - - .data -bgezal_:.asciiz "Testing BGEZAL\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 bgezal_ - lui $a0, 0x1000 # 00400f00 - ori $a0 $a0 0x2c2 - syscall - - addi $2 $0 -1 - addi $3 $0 1 # 00400f10 - - bgezal $0 l5 - addu $0 $0 $0 # Nop - j fail - addu $0 $0 $0 # Nop -- 00400f20 -l5: bgezal $2 fail - addu $0 $0 $0 # Nop - bgezal $3 l6 - addu $0 $0 $0 # Nop -- 00400f30 -l55: j fail - addu $0 $0 $0 # Nop -l6: lui $4 0x0040 # la $4 l55 - ori $4 $4 0x0f48 # 00400f40 - bne $31 $4 fail - addu $0 $0 $0 # Nop - - .data -bltzal_:.asciiz "Testing BLTZAL\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 bltzal_ - lui $a0, 0x1000 # 00400f50 - ori $a0 $a0 0x2d2 - syscall - - addi $2 $0 -1 - addi $3 $0 1 # 00400f60 - - bltzal $0 fail - addu $0 $0 $0 # Nop - bltzal $3 fail - addu $0 $0 $0 # Nop -- 00400f70 -l13: bltzal $2 l15 - addu $0 $0 $0 # Nop -l14: j fail - addu $0 $0 $0 # Nop -- 00400f80 -l15: lui $4 0x0040 # la $4 l14 - ori $4 $4 0x0f90 - bne $31 $4 fail - addu $0 $0 $0 # Nop -- 00400f90 - -# Testing the exceptions - - .data -break_: .asciiz "Testing BREAK\nExpect an exception message:\n " -# .text -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 break_ -# lui $a0, 0x1000 -# ori $a0 $a0 0x2e2 -# syscall - -# break 3 - - - .data -ccp_: .asciiz "Testing move to/from coprocessor control z\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 ccp_ - lui $a0, 0x1000 - ori $a0 $a0 0x310 - syscall - -# li $2 0x7f7f - addi $2 $0 0x7f7f - ctc0 $2 $3 - addu $0 $0 $0 #Nop - cfc0 $4 $3 - addu $0 $0 $0 #Nop - bne $2 $4 fail -# li $2 0x7f7f -# Skip floating point stuff for now. -# addi $2 $0 0x7f7f -# ctc1 $2 $3 -# addu $0 $0 $0 #Nop -# cfc1 $4 $3 -# addu $0 $0 $0 #Nop -# bne $2 $4 fail -# li $2 0x7f7f - addi $2 $0 0x7f7f - ctc2 $2 $3 - addu $0 $0 $0 #Nop - cfc2 $4 $3 - addu $0 $0 $0 #Nop - bne $2 $4 fail -# li $2 0x7f7f - addi $2 $0 0x7f7f - ctc3 $2 $3 - addu $0 $0 $0 #Nop - cfc3 $4 $3 - addu $0 $0 $0 #Nop - bne $2 $4 fail - addu $0 $0 $0 # Nop - - - .data -mcp_: .asciiz "Testing move to/from coprocessor z\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 mcp_ - lui $a0, 0x1000 - ori $a0 $a0 0x33c - syscall - -# li $2 0x7f7f - addi $2 $0 0x7f7f - mtc0 $2 $3 - addu $0 $0 $0 # Nop - mfc0 $4 $3 - addu $0 $0 $0 # Nop - bne $2 $4 fail -# Skip FP for now. -# li $2 0x7f7f -# addi $2 $0 0x7f7f -# mtc1 $2 $3 -# addu $0 $0 $0 # Nop -# mfc1 $4 $f3 -# addu $0 $0 $0 # Nop -# bne $2 $4 fail - -# li $2 0x7f7f -# addi $2 $0 0x7f7f -# li $3 0xf7f7 -# addi $3 $0 0x7f7f -# mtc1.d $2 $4 -# mfc1.d $6 $4 -# bne $2 $6 fail -# bne $3 $7 fail - -# li $2 0x7f7f - addi $2 $0 0x7f7f - mtc2 $2 $3 - addu $0 $0 $0 # Nop - mfc2 $4 $3 - addu $0 $0 $0 # Nop - bne $2 $4 fail -# li $2 0x7f7f - addi $2 $0 0x7f7f - mtc3 $2 $3 - addu $0 $0 $0 # Nop - mfc3 $4 $3 - addu $0 $0 $0 # Nop - bne $2 $4 fail - addu $0 $0 $0 # Nop - - - .data -hilo_: .asciiz "Testing move to/from HI/LO\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 hilo_ - lui $a0, 0x1000 - ori $a0 $a0 0x360 - syscall - - mthi $0 - mfhi $2 - bne $2 $0 fail - mtlo $0 - mflo $2 - bne $2 $0 fail -# li $2 1 - addi $2 $0 1 - mthi $2 - mfhi $3 - bne $3 $2 fail -# li $2 1 - addi $2 $0 1 - mtlo $2 - mflo $3 - bne $3 $2 fail -# li $2 -1 - addi $2 $0 -1 - mthi $2 - mfhi $3 - bne $3 $2 fail -# li $2 -1 - addi $2 $0 1 - mtlo $2 - mflo $3 - bne $3 $2 fail - addu $0 $0 $0 # Nop - - .data -lswc_: .asciiz "Testing load/store word coprocessor z\n" - .align 2 -lswcd_: .byte 0, 0, 0, 0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 lswc_ - lui $a0, 0x1000 - ori $a0 $a0 0x37c - syscall - -# li $3, 0x7f7f7f7f - lui $3 0x7f7f - ori $3 $3 0x7f7f -# la $2 lswcd_ - lui $2, 0x1000 - ori $2 $2 0x3a4 - mtc0 $3, $0 - addu $0 $0 $0 #Nop - swc0 $0 0($2) - lw $4 0($2) - addu $0 $0 $0 #Nop - bne $4 $3 fail - lwc0 $1 0($2) - addu $0 $0 $0 #Nop - mfc0 $5, $1 - addu $0 $0 $0 #Nop - bne $5 $3 fail - addu $0 $0 $0 #Nop - -# li $3, 0x7f7f7f7f -# lui $3 0x7f7f -# ori $3 $3 0x7f7f -# la $2 lswcd_ -# lui $2, 0x1000 -# ori $2 $2 0x3a4 -# mtc1 $3, $0 -# addu $0 $0 $0 #Nop -# swc1 $f0 0($2) -# lw $4 0($2) -# addu $0 $0 $0 #Nop -# bne $4 $3 fail -# lwc1 $f1 0($2) -# addu $0 $0 $0 #Nop -# mfc1 $5, $f1 -# addu $0 $0 $0 #Nop -# bne $5 $3 fail - -# li $3, 0x7f7f7f7f - lui $3 0x7f7f - ori $3 $3 0x7f7f -# la $2 lswcd_ - lui $2, 0x1000 - ori $2 $2 0x3a4 - mtc2 $3, $0 - addu $0 $0 $0 #Nop - swc2 $0 0($2) - lw $4 0($2) - addu $0 $0 $0 #Nop - bne $4 $3 fail - lwc2 $1 0($2) - addu $0 $0 $0 #Nop - mfc2 $5, $1 - addu $0 $0 $0 #Nop - bne $5 $3 fail - addu $0 $0 $0 #Nop - -# li $3, 0x7f7f7f7f - lui $3 0x7f7f - ori $3 $3 0x7f7f -# la $2 lswcd_ - lui $2, 0x1000 - ori $2 $2 0x3a4 - mtc3 $3, $0 - addu $0 $0 $0 #Nop - swc3 $0 0($2) - lw $4 0($2) - addu $0 $0 $0 #Nop - bne $4 $3 fail - addu $0 $0 $0 #Nop - lwc3 $1 0($2) - addu $0 $0 $0 #Nop - mfc3 $5, $1 - addu $0 $0 $0 #Nop - bne $5 $3 fail - addu $0 $0 $0 #Nop - - -# Done !!! - .data -pt: .asciiz "Passed all tests\n" - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 sm - lui $a0, 0x1000 - ori $a0 $a0 0x3a8 - syscall - lui $4 0x1000 - lw $31 0($4) - addu $0 $0 $0 # Nop - jr $31 # Return from main - - - - -# .data -#fm: .asciiz "Failed test\n" - .text -fail: addi $2 $0 4 # syscall 4 (print_str) -# la $a0 fm - lui $a0, 0x1000 - ori $a0 $a0 0x4 - syscall - addi $2 $0 10 # syscall 10 (exit) - syscall - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - - - - - -# Define the exception handling code. This must go first! -# Duplicate of standard trap handler. - - .data - .globl __m1_ -__m1_: .asciiz " Exception " - .globl __m2_ -__m2_: .asciiz " occurred\n" - .ktext 0x80000080 - mfc0 $26 $13 # Cause - mfc0 $27 $14 # EPC - addiu $v0, $0, 4 # syscall 4 (print_str) -# la $a0 __m1_ - lui $a0, 0x1000 - ori $a0 $a0 0x03e5 - syscall - addiu $v0, $0, 1 # syscall 1 (print_int) - addu $a0 $0 $26 - syscall - addiu $v0, $0, 4 # syscall 4 (print_str) -# la $a0 __m2_ - lui $a0, 0x1000 - ori $a0, $a0, 0x03f1 - syscall - mtc0 $0, $13 # Clear Cause register - rfe # Return from exception handler - addiu $27 $27 4 # Return to next instruction - jr $27 - - - - diff --git a/spim-qtbase/Tests/tt.bare.s b/spim-qtbase/Tests/tt.bare.s deleted file mode 100755 index 0567507..0000000 --- a/spim-qtbase/Tests/tt.bare.s +++ /dev/null @@ -1,519 +0,0 @@ -# SPIM S20 MIPS simulator. -# A simple torture test for the bare SPIM simulator. -# Run with -notrap -delayed_branches -delayed_load flags (not -bare, -# as file uses pseudo ops). -# -# Copyright (c) 1990-2020, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - -# Define the exception handling code. This must go first! -# Duplicate of standard trap handler. - - .data - .globl __m1_ -__m1_: .asciiz " Exception " - .globl __m2_ -__m2_: .asciiz " occurred\n" - .ktext 0x80000080 - mfc0 $26 $13 # Cause - mfc0 $27 $14 # EPC - addiu $v0 $0 4 # syscall 4 (print_str) - la $a0 __m1_ - syscall - addiu $v0 $0 1 # syscall 1 (print_int) - addu $a0 $0 $26 - syscall - addiu $v0 $0 4 # syscall 4 (print_str) - la $a0 __m2_ - syscall - mtc0 $0 $13 # Clear Cause register - rfe # Return from exception handler - addiu $27 $27 4 # Return to next instruction - jr $27 - nop - -# Standard startup code. Invoke the routine main with no arguments. - - .text - .globl __start -__start: jal main - nop - addiu $v0 $0 10 - syscall # syscall 10 (exit) - - - .globl main -main: - addu $20 $0 $31 # Save return PC - -# Test delayed branches: - - .data -bc1fl_: .asciiz "Testing BC1FL and BC1TL\n" -fp_s1: .float 1.0 -fp_s1p5:.float 1.5 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bc1fl_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.eq.s $f0 $f2 - bc1fl fail - nop - c.eq.s $f0 $f2 - bc1fl fail - j fail - - c.eq.s $f0 $f4 - bc1tl fail - nop - c.eq.s $f0 $f4 - bc1tl fail - j fail - bc1fl l010 - j fail - nop -l010: - - -# BC2FL BC2TL should be tested if CoProcessor 2 exists - - - .data -beq_: .asciiz "Testing BEQ and BEQL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 beq_ - syscall - - addiu $2 $0 0 - beq $0 $0 l020 - addiu $2 $0 1 # Delayed instruction -l020: addiu $3 $0 1 - bne $2 $3 fail - nop - - li $2 1 - li $3 1 - li $4 2 - li $5 0 - - beq $2 $4 fail - nop - - beq $2 $4 l021 - addu $5 $0 5 # Delay slot -l021: bne $5 5 fail - nop - - beql $2 $3 l022 - j fail - nop - -l022: li $5 0 - beql $2 $3 l023 - addu $5 $0 5 # Delay slot -l023: bne $5 5 fail - nop - - -# BGEZAL and BGEZALL should be tested - - - .data -bgez_: .asciiz "Testing BGEZ and BGEZL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgez_ - syscall - - addiu $2 $0 0 - bgez $0 l030 - addiu $2 $0 1 # Delayed instruction -l030: addiu $3 $0 1 - bne $2 $3 fail - nop - - li $2 1 - li $3 -1 - li $4 2 - li $5 0 - - bgez $3 fail - nop - - bgez $2 l031 - addu $5 $0 5 # Delay slot -l031: bne $5 5 fail - nop - - bgezl $2 l032 - j fail - nop - -l032: li $5 0 - bgezl $2 l033 - addu $5 $0 5 # Delay slot -l033: bne $5 5 fail - nop - - - .data -bgtz_: .asciiz "Testing BGTZ and BGTZL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgtz_ - syscall - - addiu $2 $0 0 - bgtz $0 l040 - addiu $2 $0 1 # Delayed instruction - addiu $2 $0 2 -l040: addiu $3 $0 2 - bne $2 $3 fail - nop - - li $2 1 - li $3 -1 - li $4 2 - li $5 0 - - bgtz $3 fail - nop - - bgtz $2 l041 - addu $5 $0 5 # Delay slot -l041: bne $5 5 fail - nop - - bgtzl $2 l042 - j fail - nop - -l042: li $5 0 - bgtzl $2 l043 - addu $5 $0 5 # Delay slot -l043: bne $5 5 fail - nop - - - .data -blez_: .asciiz "Testing BLEZ and BLEZL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 blez_ - syscall - - addiu $2 $0 0 - blez $0 l050 - addiu $2 $0 1 # Delayed instruction -l050: addiu $3 $0 1 - bne $2 $3 fail - nop - - li $2 1 - li $3 -1 - li $4 2 - li $5 0 - - blez $2 fail - nop - - blez $3 l051 - addu $5 $0 5 # Delay slot -l051: bne $5 5 fail - nop - - blezl $3 l052 - j fail - nop - -l052: li $5 0 - blezl $3 l053 - addu $5 $0 5 # Delay slot -l053: bne $5 5 fail - nop - - - .data -bltz_: .asciiz "Testing BLTZ and BLTZL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bltz_ - syscall - - addiu $2 $0 0 - bltz $0 l060 - addiu $2 $0 1 # Delayed instruction - addiu $2 $0 2 -l060: addiu $3 $0 2 - bne $2 $3 fail - nop - - li $2 1 - li $3 -1 - li $4 2 - li $5 0 - - bltz $2 fail - nop - - bltz $3 l061 - addu $5 $0 5 # Delay slot -l061: bne $5 5 fail - nop - - bltzl $3 l062 - j fail - nop - -l062: li $5 0 - bltzl $3 l063 - addu $5 $0 5 # Delay slot -l063: bne $5 5 fail - nop - - -# BLTZAL and BLTZALL should be tested - - - .data -bne_: .asciiz "Testing BNE and BNEL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bne_ - syscall - - addiu $2 $0 0 - bne $0 $0 l070 - addiu $2 $0 1 # Delayed instruction -l070: addiu $3 $0 1 - bne $2 $3 fail - nop - - li $2 1 - li $3 1 - li $4 2 - li $5 0 - - bne $2 $3 fail - nop - - bne $2 $4 l071 - addu $5 $0 5 # Delay slot -l071: bne $5 5 fail - nop - - bnel $2 $3 l072 - j fail - nop - -l072: li $5 0 - bnel $2 $3 l073 - addu $5 $0 5 # Delay slot -l073: bne $5 0 fail - nop - - -# Test delayed loads: - - .data - .globl d -d: .word 101 -ld_: .asciiz "Testing LD\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ld_ - syscall - - addiu $3 $0 0 - la $4 d - lw $3 d - addu $3 $0 5 # Delayed instruction - bne $3 101 fail - nop - - -# Test ABS pseduo instruction: - - .data -abs_: .asciiz "Testing ABS\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 abs_ - syscall - - li $8 5 - abs $9 $8 - bne $9 5 fail - nop - li $8 -5 - abs $9 $8 - bne $9 5 fail - nop - - -# Test DIV pseduo instruction: - - .data -div_: .asciiz "Testing DIV\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 div_ - syscall - - li $8 5 - li $9 7 - div $10 $9 $8 - bne $10 1 fail - nop - - -# Test MUL pseduo instruction: - - .data -mul_: .asciiz "Testing MUL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mul_ - syscall - - li $8 5 - li $9 7 - mul $10 $9 $8 - bne $10 35 fail - nop - li $8 0x80000000 - li $9 0x80000000 - mul $10 $9 $8 - bne $10 0 fail - nop - li $8 0x80000001 - li $9 0x80000001 - mul $10 $9 $8 - bne $10 1 fail - nop - - -# Test SLE pseduo instruction: - - .data -sle_: .asciiz "Testing SLE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sle_ - syscall - - li $8 5 - li $9 7 - sle $10 $9 $8 - bne $10 0 fail - nop - li $8 7 - li $9 5 - sle $10 $9 $8 - bne $10 1 fail - nop - li $8 7 - sle $10 $8 $8 - bne $10 1 fail - nop - - -# Test SGE pseduo instruction: - - .data -sge_: .asciiz "Testing SGE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sge_ - syscall - - li $8 5 - li $9 7 - sge $10 $9 $8 - bne $10 1 fail - nop - li $8 7 - li $9 5 - sge $10 $9 $8 - bne $10 0 fail - nop - li $8 7 - sge $10 $8 $8 - bne $10 1 fail - nop - - -# Test SEQ pseduo instruction: - - .data -seq_: .asciiz "Testing SEQ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 seq_ - syscall - - li $8 5 - li $9 7 - seq $10 $9 $8 - bne $10 0 fail - nop - li $8 7 - sge $10 $8 $8 - bne $10 1 fail - nop - - -# Done !!! - .data - .globl sm -sm: .asciiz "\nPassed all tests\n" - .text - addiu $v0 $0 4 # syscall 4 (print_str) - la $a0 sm - syscall - addu $31 $0 $20 # Return PC - jr $31 # Return from main - nop - - - .data - .globl fm -fm: .asciiz "Failed test\n" - .text -fail: addiu $v0 $0 4 # syscall 4 (print_str) - la $a0 fm - syscall - addiu $v0 $0 10 # syscall 10 (exit) - syscall diff --git a/spim-qtbase/Tests/tt.be.s b/spim-qtbase/Tests/tt.be.s deleted file mode 100755 index 26a6f60..0000000 --- a/spim-qtbase/Tests/tt.be.s +++ /dev/null @@ -1,556 +0,0 @@ -# SPIM S20 MIPS simulator. -# A torture test for the SPIM simulator. -# Tests for big-endian systems. -# Run in conjunction with tt.core.s -# -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - - .data -saved_ret_pc: .word 0 # Holds PC to return from main -m3: .asciiz "The next few lines should contain exception error messages\n" -m4: .asciiz "Done with exceptions\n\n" -m5: .asciiz "Expect an address error exception:\n " -m6: .asciiz "Expect two address error exceptions:\n" - .text - .globl main - -main: - sw $31 saved_ret_pc - - .data -lb_: .asciiz "Testing LB\n" -lbd_: .byte 1, -1, 0, 128 -lbd1_: .word 0x76543210, 0xfedcba98 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lb_ - syscall - - la $2 lbd_ - lb $3 0($2) - bne $3 1 fail - lb $3 1($2) - bne $3 -1 fail - lb $3 2($2) - bne $3 0 fail - lb $3 3($2) - bne $3 0xffffff80 fail - - la $t0 lbd1_ - lb $t1 0($t0) - bne $t1 0x76 fail - lb $t1 1($t0) - bne $t1 0x54 fail - lb $t1 2($t0) - bne $t1 0x32 fail - lb $t1 3($t0) - bne $t1 0x10 fail - lb $t1 4($t0) - bne $t1 0xfffffffe fail - lb $t1 5($t0) - bne $t1 0xffffffdc fail - lb $t1 6($t0) - bne $t1 0xffffffba fail - lb $t1 7($t0) - bne $t1 0xffffff98 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m5 - syscall - - li $t5 0x7fffffff - lb $3 1000($t5) - - - .data -lbu_: .asciiz "Testing LBU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lbu_ - syscall - - la $2 lbd_ - lbu $3 0($2) - bne $3 1 fail - lbu $3 1($2) - bne $3 0xff fail - lbu $3 2($2) - bne $3 0 fail - lbu $3 3($2) - bne $3 128 fail - - la $t0 lbd1_ - lbu $t1 0($t0) - bne $t1 0x76 fail - lbu $t1 1($t0) - bne $t1 0x54 fail - lbu $t1 2($t0) - bne $t1 0x32 fail - lbu $t1 3($t0) - bne $t1 0x10 fail - lbu $t1 4($t0) - bne $t1 0xfe fail - lbu $t1 5($t0) - bne $t1 0xdc fail - lbu $t1 6($t0) - bne $t1 0xba fail - lbu $t1 7($t0) - bne $t1 0x98 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m5 - syscall - - li $t5 0x7fffffff - lbu $3 1000($t5) - - - .data -lwl_: .asciiz "Testing LWL\n" - .align 2 -lwld_: .byte 0 1 2 3 4 5 6 7 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lwl_ - syscall - - la $2 lwld_ - move $3 $0 - lwl $3 0($2) - bne $3 0x10203 fail - move $3 $0 - lwl $3 1($2) - bne $3 0x1020300 fail - li $3 5 - lwl $3 1($2) - bne $3 0x1020305 fail - move $3 $0 - lwl $3 2($2) - bne $3 0x2030000 fail - li $3 5 - lwl $3 2($2) - bne $3 0x2030005 fail - move $3 $0 - lwl $3 3($2) - bne $3 0x3000000 fail - li $3 5 - lwl $3 3($2) - bne $3 0x3000005 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m6 - syscall - - li $t5 0x7fffffff - lwl $3 1000($t5) - lwl $3 1001($t5) - - - .data -lwr_: .asciiz "Testing LWR\n" - .align 2 -lwrd_: .byte 0 1 2 3 4 5 6 7 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lwr_ - syscall - - la $2 lwrd_ - li $3 0x0505 - lwr $3 0($2) - bne $3 0x0500 fail - move $3 $0 - lwr $3 1($2) - bne $3 0x01 fail - li $3 0x505 - lwr $3 1($2) - bne $3 0x01 fail - move $3 $0 - lwr $3 2($2) - bne $3 0x0102 fail - li $3 0x050505 - lwr $3 2($2) - bne $3 0x0102 fail - move $3 $0 - lwr $3 3($2) - bne $3 0x010203 fail - li $3 0x05050505 - lwr $3 3($2) - bne $3 0x010203 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m6 - syscall - - li $t5 0x7fffffff - lwr $3 1000($t5) - lwr $3 1001($t5) - - - .data -sb_: .asciiz "Testing SB\n" - .align 2 -sbd_: .byte 0, 0, 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sb_ - syscall - - li $3, 1 - la $2 sbd_ - sb $3 0($2) - lw $4 0($2) - bne $4 0x1000000 fail - li $3 2 - sb $3 1($2) - lw $4 0($2) - bne $4 0x1020000 fail - li $3 3 - sb $3 2($2) - lw $4 0($2) - bne $4 0x1020300 fail - li $3 4 - sb $3 3($2) - lw $4 0($2) - bne $4 0x1020304 fail - - - li $v0 4 # syscall 4 (print_str) - la $a0 m5 - syscall - - li $t5 0x7fffffff - sb $3 1000($t5) - - - .data -sh_: .asciiz "Testing SH\n" -sh2_: .asciiz "Expect two address error exceptions:\n" - .align 2 -shd_: .byte 0, 0, 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sh_ - syscall - - li $3, 1 - la $2 shd_ - sh $3 0($2) - lw $4 0($2) - bne $4 0x10000 fail - li $3 2 - sh $3 2($2) - lw $4 0($2) - bne $4 0x10002 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 sh2_ - syscall - - li $t5 0x7fffffff - sh $3 1000($t5) - sh $3 1001($t5) - - - .data -swl_: .asciiz "Testing SWL\n" - .align 2 -swld_: .word 0 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 swl_ - syscall - - la $2 swld_ - - li $3 0x01020304 - swl $3 0($2) - lw $4 0($2) - bne $4 0x01020304 fail - - li $3 0x01020300 - swl $3 1($2) - lw $4 0($2) - bne $4 0x1010203 fail - - li $3 0x01020000 - swl $3 2($2) - lw $4 0($2) - bne $4 0x1010102 fail - - li $3 0x01000000 - swl $3 3($2) - lw $4 0($2) - bne $4 0x1010101 fail - - - .data -swr_: .asciiz "Testing SWR\n" - .align 2 -swrd_: .word 0 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 swr_ - syscall - - la $2 swrd_ - - li $3 0x01020304 - swr $3 0($2) - lw $4 0($2) - bne $4 0x4000000 fail - - li $3 0x01020304 - swr $3 1($2) - lw $4 0($2) - bne $4 0x3040000 fail - - li $3 0x01020304 - swr $3 2($2) - lw $4 0($2) - bne $4 0x2030400 fail - - li $3 0x01020304 - swr $3 3($2) - lw $4 0($2) - bne $4 0x1020304 fail - - - - .data -ulh_: .asciiz "Testing ULH\n" -ulh1_: .byte 1 2 3 4 5 6 7 8 -ulh2_: .byte 0xff 0xff - .text - - li $v0 4 # syscall 4 (print_str) - la $a0 ulh_ - syscall - la $2 ulh1_ - ulh $3 0($2) - bne $3 0x0102 fail - ulh $3 1($2) - bne $3 0x0203 fail - ulh $3 2($2) - bne $3 0x0304 fail - ulh $3 3($2) - bne $3 0x0405 fail - ulh $3 4($2) - bne $3 0x0506 fail - la $2 ulh2_ - ulh $3 0($2) - bne $3 -1 fail - - - .data -ulhu_: .asciiz "Testing ULHU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ulhu_ - syscall - - li $v0 4 # syscall 4 (print_str) - la $a0 ulhu_ - syscall - la $2 ulh1_ - ulhu $3 0($2) - bne $3 0x0102 fail - ulhu $3 1($2) - bne $3 0x0203 fail - ulhu $3 2($2) - bne $3 0x0304 fail - ulhu $3 3($2) - bne $3 0x0405 fail - ulhu $3 4($2) - bne $3 0x0506 fail - la $2 ulh2_ - ulhu $3 0($2) - bne $3 0xffff fail - - - .data -ulw_: .asciiz "Testing ULW\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ulw_ - syscall - - la $2 ulh1_ - ulw $3 0($2) - bne $3 0x1020304 fail - ulw $3 1($2) - bne $3 0x2030405 fail - ulw $3 2($2) - bne $3 0x3040506 fail - ulw $3 3($2) - bne $3 0x4050607 fail - - - .data -ush_: .asciiz "Testing USH\n" -ushd: .word 0 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ush_ - syscall - - la $2 ushd - sw $0 0($2) - sw $0 4($2) - li $3 -1 - ush $3 0($2) - lw $4 0($2) - bne $4 0xffff0000 fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - ush $3 1($2) - lw $4 0($2) - bne $4 0xffff00 fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - ush $3 2($2) - lw $4 0($2) - bne $4 0xffff fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - ush $3 3($2) - lw $4 0($2) - bne $4 0xff fail - lw $4 4($2) - bne $4 0xff000000 fail - - - .data -usw_: .asciiz "Testing USW\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 usw_ - syscall - - la $2 ushd - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 0($2) - lw $4 0($2) - bne $4 -1 fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 1($2) - lw $4 0($2) - bne $4 0xffffff fail - lw $4 4($2) - bne $4 0xff000000 fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 2($2) - lw $4 0($2) - bne $4 0xffff fail - lw $4 4($2) - bne $4 0xffff0000 fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 3($2) - lw $4 0($2) - bne $4 0xff fail - lw $4 4($2) - bne $4 0xffffff00 fail - - .data -word_: .asciiz "Testing .WORD\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 word_ - syscall - - .data - .align 0 -wordd: .byte 0x1 - .word 0x87654320 - .word 0xfedcba90 - .text - la $2 wordd - lwr $3 1($2) - lwl $3 0($2) - bne $3 0x01876543 fail - lwr $3 5($2) - lwl $3 4($2) - bne $3 0x20fedcba fail - - .data - .byte 0 -x: .word OK # Forward reference in unaligned data! - .text - lw $8 x - beq $8 $0 fail -OK: - - -# Done !!! - .data -sm: .asciiz "\nPassed all tests\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sm - syscall - lw $31 saved_ret_pc - jr $31 # Return from main - - - .data -fm: .asciiz "Failed test\n" - .text -fail: li $v0 4 # syscall 4 (print_str) - la $a0 fm - syscall - li $v0, 10 # syscall 10 (exit) - syscall - diff --git a/spim-qtbase/Tests/tt.core.s b/spim-qtbase/Tests/tt.core.s deleted file mode 100755 index cc3c1f7..0000000 --- a/spim-qtbase/Tests/tt.core.s +++ /dev/null @@ -1,4862 +0,0 @@ -# SPIM S20 MIPS simulator. -# A torture test for the SPIM simulator. -# Core tests for instructions that do not differ on big and little endian systems. -# -# Copyright (c) 1990-2020, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - - .data -saved_ret_pc: .word 0 # Holds PC to return from main -m3: .asciiz "The next few lines should contain exception error messages\n" -m4: .asciiz "Done with exceptions\n\n" - .text - .globl main -main: - sw $31 saved_ret_pc - -# -# The first thing to do is to test the exceptions: -# - li $v0 4 # syscall 4 (print_str) - la $a0 m3 - syscall - -# Exception 1 (INT) -- Not implemented yet -# Exception 4 (ADEL) - li $t0 0x400000 - lw $3 1($t0) -# Exception 5 (ADES) - sw $3 1($t0) -# Exception 6 (IBUS) -- Can't test and continue -# Exception 7 (DBUS) - lw $3 10000000($t0) -# Exception 8 (SYSCALL) -- Not implemented -# Exception 9 (BKPT) - break 0 -# Exception 10 (RI) -- Not implemented (can't enter bad instructions) -# Exception 12 (overflow) - li $t0 0x7fffffff - add $t0 $t0 $t0 - li $v0 4 # syscall 4 (print_str) - la $a0 m4 - syscall - -# -# Try modifying R0 -# - add $0, $0, 1 - bnez $0 fail - - -# -# Test the timer: -# - .data -timer_: .asciiz "Testing timer\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 timer_ - syscall - - mtc0 $0 $9 # Clear count register -timer1_: - mfc0 $9 $9 - bne $9 10 timer1_# Count up to 10 - - -# -# Test .ASCIIZ -# - .data -asciiz_:.asciiz "Testing .asciiz\n" -str0: .asciiz "" -str1: .asciiz "a" -str2: .asciiz "bb" -str3: .asciiz "ccc" -str4: .asciiz "dddd" -str5: .asciiz "eeeee" -str06: .asciiz "", "a", "bb", "ccc", "dddd", "eeeee" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 asciiz_ - syscall - - la $a0 str0 - li $a1 6 - jal ck_strings - - la $a0 str06 - li $a1 6 - jal ck_strings - - j over_strlen - - -ck_strings: - move $s0 $a0 - move $s1 $ra - li $s2 0 - -l_asciiz1: - move $a0 $s0 - jal strlen - - bne $v0 $s2 fail - - add $s0 $s0 $v0 # skip string - add $s0 $s0 1 # skip null byte - - add $s2 1 - blt $s2 $a1 l_asciiz1 - - move $ra $s1 - jal $ra - - -strlen: - li $v0 0 # num chars - move $t0 $a0 # str pointer - -l_strlen1: - lb $t1 0($t0) - add $t0 1 - add $v0 1 - bnez $t1 l_strlen1 - - sub $v0 $v0 1 # don't count null byte - jr $31 - -over_strlen: - -# -# Now, test each instruction -# - - .data -add_: .asciiz "Testing ADD\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 add_ - syscall - - li $2 1 - li $3 -1 - - add $4, $0, $0 - bnez $4 fail - add $4, $0, $2 - bne $4 1 fail - add $4, $4, $3 - bnez $4 fail - - - .data -addi_: .asciiz "Testing ADDI\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 addi_ - syscall - - addi $4, $0, 0 - bnez $4 fail - addi $4, $0, 1 - bne $4 1 fail - addi $4, $4, -1 - bnez $4 fail - - - .data -addiu_: .asciiz "Testing ADDIU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 addiu_ - syscall - - addiu $4, $0, 0 - bnez $4 fail - addiu $4, $0, 1 - bne $4 1 fail - addiu $4, $4, -1 - bnez $4 fail - - li $2 0x7fffffff - addiu $2 $2 2 # should not trap - bne $2 0x80000001 fail - - - .data -addu_: .asciiz "Testing ADDU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 addu_ - syscall - - li $2 1 - li $3 -1 - - addu $4, $0, $0 - bnez $4 fail - addu $4, $0, $2 - bne $4 1 fail - addu $4, $4, $3 - bnez $4 fail - - li $2 0x7fffffff - addu $2 $2 $2 # should not trap - bne $2 -2 fail - - - .data -and_: .asciiz "Testing AND\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 and_ - syscall - - li $2 1 - li $3 -1 - - and $4 $0 $0 - bnez $4 fail - and $4 $2 $2 - beqz $4 fail - and $4 $2 $3 - bne $4 1 fail - - - .data -andi_: .asciiz "Testing ANDI\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 andi_ - syscall - - li $2 1 - li $3 -1 - - andi $4 $0 0 - bnez $4 fail - and $4 $2 1 - beqz $4 fail - and $4 $2 -1 - bne $4 1 fail - and $4 $3 -1 - bne $4 $3 fail - - - .data -beq_: .asciiz "Testing BEQ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 beq_ - syscall - - li $2 -1 - li $3 1 - - beq $0 $0 l1 - j fail -l1: beq $2 $2 l2 - j fail -l2: beq $3 $2 fail - - beq $2 $2 far_away # Check long branch - j fail -come_back: - - li $2 3 -l2_1: sub $2 $2 1 - bnez $2, l2_1 - - - .data -bgez_: .asciiz "Testing BGEZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgez_ - syscall - - li $2 -1 - li $3 1 - - bgez $0 l3 - j fail -l3: bgez $3 l4 - j fail -l4: bgez $2 fail - - - .data -bgezal_:.asciiz "Testing BGEZAL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgezal_ - syscall - - li $2 -1 - li $3 1 - - bgezal $0 l5 - j fail - bgezal $2 fail -l5: bgezal $3 l6 -l55: j fail -l6: la $4 l55 - bne $31 $4 fail - - - .data -bgtz_: .asciiz "Testing BGTZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgtz_ - syscall - - li $2 -1 - li $3 1 - - bgtz $0 fail -l7: bgtz $3 l8 - j fail -l8: bgtz $2 fail - - - .data -blez_: .asciiz "Testing BLEZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 blez_ - syscall - - li $2 -1 - li $3 1 - - blez $0 l9 - j fail -l9: blez $2 l10 - j fail -l10: blez $3 fail - - - .data -bltz_: .asciiz "Testing BLTZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bltz_ - syscall - - li $2 -1 - li $3 1 - - bltz $0 fail -l11: bltz $2 l12 - j fail -l12: bltz $3 fail - - - .data -bltzal_:.asciiz "Testing BLTZAL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bltzal_ - syscall - - li $2 -1 - li $3 1 - - bltzal $0 fail - bltzal $3 fail -l13: bltzal $2 l15 -l14: j fail -l15: la $4 l14 - bne $31 $4 fail - - - .data -bne_: .asciiz "Testing BNE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bne_ - syscall - - li $2 -1 - li $3 1 - - bne $0 $0 fail - bne $2 $2 fail - bne $3 $2 l16 -l16: - - - .data -break_: .asciiz "Testing BREAK\nExpect a exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 break_ - syscall - - break 3 - - -# COPz is not checked - - - .data -ccp_: .asciiz "Testing move to/from coprocessor control 0/1\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ccp_ - syscall - - li $2 0x7f7f - ctc0 $2 $3 - cfc0 $4 $3 - bne $2 $4 fail - li $2 0x7f7f - ctc1 $2 $3 - cfc1 $4 $3 - bne $2 $4 fail - - - .data -clo_: .asciiz "Testing CLO\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 clo_ - syscall - - li $2 0 - clo $3 $2 - bne $3 0 fail - - li $2 0xffffffff - clo $3 $2 - bne $3 32 fail - - li $2 0xf0000000 - clo $3 $2 - bne $3 4 fail - - - .data -clz_: .asciiz "Testing CLZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 clz_ - syscall - - li $2 0 - clz $3 $2 - bne $3 32 fail - - li $2 0xffffffff - clz $3 $2 - bne $3 0 fail - - li $2 0x0fff0000 - clz $3 $2 - bne $3 4 fail - - - .data -div_: .asciiz "Testing DIV\n" -div2_: .asciiz "Expect exception caused by divide by 0:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 div_ - syscall - - li $2 4 - li $3 2 - li $4 -2 - - div $5 $2 $3 - bne $5 2 fail - mfhi $5 - bne $5 0 fail - - div $5 $2 $4 - bne $5 -2 fail - mfhi $5 - bne $5 0 fail - - li $2 0x80000000 - li $4 0xffffffff - div $5 $2 $4 # Overflows, but should not cause overflow - - li $2 1 - li $4 0xffffffff - div $5 $2 $4 - bne $5 -1 fail - mfhi $5 - bne $5 0 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 div2_ - syscall - div $5 $2 $0 - - - .data -divu_: .asciiz "Testing DIVU\n" -divu2_: .asciiz "Expect exception caused by divide by 0:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 divu_ - syscall - - li $2 4 - li $3 2 - li $4 -2 - - divu $5 $2 $3 - bne $5 2 fail - mfhi $5 - bne $5 0 fail - - divu $0 $2 $3 - mflo $5 - bne $5 2 fail - mfhi $5 - bne $5 0 fail - - divu $5 $2 $4 - bne $5 0 fail - mfhi $5 - bne $5 4 fail - - li $2 0x80000000 - li $4 0xffffffff - divu $5 $2 $4 # Overflows, but should not cause overflow - - li $2 1 - li $4 0xffffffff - divu $5 $2 $4 - bne $5 0 fail - mfhi $5 - bne $5 1 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 divu2_ - syscall - divu $5 $2 $0 - - - .data -j_: .asciiz "Testing J\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 j_ - syscall - - j l17 - j fail - - .ktext - nop # These instructions aren't executed, but - j l17a # cause parser errors since high 4 bits -l17a: # don't match - j l17b - - .text -l17b: nop - j l17a # Correctly flagged as error here. - -l17: - - - .data -jal_: .asciiz "Testing JAL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 jal_ - syscall - - jal l18 -l19: j l20 -l18: la $4 l19 - bne $31 $4 fail - jr $31 -l20: - - - .data -jalr_: .asciiz "Testing JALR\n" -jalr2_: .asciiz "Expect an non-word boundary exception:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 jalr_ - syscall - - la $2 l21 - jalr $3, $2 -l23: j l22 -l21: la $4 l23 - bne $3 $4 fail - jr $3 - -l22: la $2 l21a - jalr $2 -l23a: j l22a -l21a: la $4 l23a - bne $31 $4 fail - jr $31 - -l22a: li $v0 4 # syscall 4 (print_str) - la $a0 jalr2_ - syscall - la $2 l24 - add $2 $2 2 -l24: jalr $3 $2 - - - .data -jr_: .asciiz "Testing JR\n" -jr2_: .asciiz "Expect an non-word boundary exception:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 jr_ - syscall - - la $2 l25 - jr $2 - j fail -l25: li $v0 4 # syscall 4 (print_str) - la $a0 jr2_ - syscall - la $2 l27 - add $2 $2 2 -l27: jr $2 - - - .data -la_: .asciiz "Testing LA\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 la_ - syscall - - # Simple cases already tested - li $4 101 - la $5 10($4) - bne $5 111 fail - - -# LB is endian-specific - - -# LBU is endian-specific - - - .data -ld_: .asciiz "Testing LD\n" -ld2_: .asciiz "Expect four address error exceptions:\n" -ldd_: .word 1, -1, 0, 0x8000000 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ld_ - syscall - - la $2 ldd_ - ld $3 0($2) - bne $3 1 fail - bne $4 -1 fail - ld $3 8($2) - bne $3 0 fail - bne $4 0x8000000 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 ld2_ - syscall - - li $t5 0x7fffffff - ld $3 1000($t5) - ld $3 1001($t5) - - -# LDC2 not tested - -# LWC2 not tested - - .data -lh_: .asciiz "Testing LH\n" -lh2_: .asciiz "Expect two address error exceptions:\n" -lhd_: .half 1, -1, 0, 0x8000 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lh_ - syscall - - la $2 lhd_ - lh $3 0($2) - bne $3 1 fail - lh $3 2($2) - bne $3 -1 fail - lh $3 4($2) - bne $3 0 fail - lh $3 6($2) - bne $3 0xffff8000 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 lh2_ - syscall - - li $t5 0x7fffffff - lh $3 1000($t5) - lh $3 1001($t5) - - .data -lhu_: .asciiz "Testing LHU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lhu_ - syscall - - la $2 lhd_ - lhu $3 0($2) - bne $3 1 fail - lhu $3 2($2) - bne $3 0xffff fail - lhu $3 4($2) - bne $3 0 fail - lhu $3 6($2) - bne $3 0x8000 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 lh2_ - syscall - - li $t5 0x7fffffff - lhu $3 1000($t5) - lhu $3 1001($t5) - - - .data -ll_: .asciiz "Testing LL\n" -ll1: .word 10 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ll_ - syscall - - ll $2 ll1 - bne $2 10 fail - add $2 $2 1 - sc $2 ll1 - lw $3 ll1 - bne $2 $3 fail - - .data -lui_: .asciiz "Testing LUI\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lui_ - syscall - - lui $2 0 - bne $2 $0 fail - lui $2 1 - srl $2 $2 16 - addiu $2 $2 -1 # Don't do compare directly since it uses LUI - bne $2 $0 fail - lui $2 1 - andi $2 $2 0xffff - bne $2 $0 fail - lui $2 0xffff - srl $2 $2 16 - addiu $2 $2 1 - andi $2 $2 0xffff - bne $2 $0 fail - - - .data -lw_: .asciiz "Testing LW\n" -lwd_: .word 1, -1, 0, 0x8000000 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lw_ - syscall - - la $2 lwd_ - lw $3 0($2) - bne $3 1 fail - lw $3 4($2) - bne $3 -1 fail - lw $3 8($2) - bne $3 0 fail - lw $3 12($2) - bne $3 0x8000000 fail - - li $2, 0 - lw $3 lwd_($2) - bne $3 1 fail - addi $2, $2, 4 - lw $3 lwd_($2) - bne $3 -1 fail - addi $2, $2, 4 - lw $3 lwd_($2) - bne $3 0 fail - addi $2, $2, 4 - lw $3 lwd_($2) - bne $3 0x8000000 fail - - la $2 lwd_ - add $2 $2 12 - lw $3 -12($2) - bne $3 1 fail - lw $3 -8($2) - bne $3 -1 fail - lw $3 -4($2) - bne $3 0 fail - lw $3 0($2) - bne $3 0x8000000 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 lh2_ - syscall - - li $t5 0x7fffffff - lw $3 1000($t5) - lw $3 1001($t5) - - -# LWL is endian-specific - - -# LWR is endian-specific - - - .data -madd_: .asciiz "Testing MADD\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 madd_ - syscall - - mthi $0 - mtlo $0 - madd $0, $0 - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - mtlo $0 - mthi $0 - li $4, 1 - madd $4, $4 - mfhi $3 - bnez $3 fail - mflo $3 - bne $3 1 fail - - li $3, 1 - mtlo $3 - mthi $0 - li $4, -1 - madd $3, $4 - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - mtlo $0 - mthi $0 - li $3, 1 - li $4, -1 - madd $3, $4 - mfhi $3 - bne $3 0xffffffff fail - mflo $3 - bne $3 0xffffffff fail - - li $t0 1 - mtlo $t0 - mthi $0 - li $t0 2 - li $t1 -1 - madd $t0, $t1 - mfhi $3 - bne $3 0xffffffff fail - mflo $3 - bne $3 0xffffffff fail - - mtlo $0 - mthi $0 - li $4, 0x10000 - madd $4, $4 - mfhi $3 - bne $3 1 fail - mflo $3 - bne $3 0 fail - - li $4, 0x10000 - madd $4 $4 - mfhi $3 - bne $3 2 fail - mflo $3 - bne $3 0 fail - - .data -maddu_: .asciiz "Testing MADDU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 maddu_ - syscall - - mthi $0 - mtlo $0 - - maddu $0 $0 - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - li $4, 1 - maddu $4 $4 - mfhi $3 - bnez $3 fail - mflo $3 - bne $3 1 fail - - li $4, -1 - maddu $4 $4 - mfhi $3 - bne $3 0xfffffffe fail - mflo $3 - bne $3 2 fail - - .data -mcp_: .asciiz "Testing move to/from coprocessor z\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mcp_ - syscall - - li $2 0x7f7f - mtc0 $2 $3 - mfc0 $4 $3 - bne $2 $4 fail - li $2 0x7f7f - mtc1 $2 $3 - mfc1 $4 $f3 - bne $2 $4 fail - li $2 0x7f7f - li $3 0xf7f7 - mtc1.d $2 $4 - mfc1.d $6 $4 - bne $2 $6 fail - bne $3 $7 fail - - - .data -hilo_: .asciiz "Testing move to/from HI/LO\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 hilo_ - syscall - - mthi $0 - mfhi $2 - bnez $2 fail - mtlo $0 - mflo $2 - bnez $2 fail - li $2 1 - mthi $2 - mfhi $3 - bne $3 $2 fail - li $2 1 - mtlo $2 - mflo $3 - bne $3 $2 fail - li $2 -1 - mthi $2 - mfhi $3 - bne $3 $2 fail - li $2 -1 - mtlo $2 - mflo $3 - bne $3 $2 fail - - - .data -movf_: .asciiz "Testing MOVF\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movf_ - syscall - - ctc1 $0, $31 # clear cc's - - li $2 1 - li $3 0 - li $4 2 - movf $3 $2 1 - bne $3 1 fail - movf $3 $4 6 - bne $3 2 fail - - - .data -movn_: .asciiz "Testing MOVN\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movn_ - syscall - - li $2 2 - li $3 3 - li $4 4 - movn $4 $3 $0 - bne $4 4 fail - movn $4 $3 $2 - bne $4 3 fail - - - .data -movt_: .asciiz "Testing MOVT\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movt_ - syscall - - li $2 0xfe800000 - ctc1 $2 $31 # set ccs - - li $2 1 - li $3 0 - li $4 2 - movt $3 $2 1 - bne $3 1 fail - movt $3 $4 6 - bne $3 2 fail - - - .data -movz_: .asciiz "Testing MOVZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movz_ - syscall - - li $2 2 - li $3 3 - li $4 4 - movz $4 $3 $2 - bne $4 4 fail - movz $4 $3 $0 - bne $4 3 fail - - - .data -msub_: .asciiz "Testing MSUB\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 msub_ - syscall - - mthi $0 - mtlo $0 - msub $0 $0 - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - mthi $0 - mtlo $0 - li $4, 1 - msub $4 $4 - mfhi $3 - bne $3 0xffffffff fail - mflo $3 - bne $3 0xffffffff fail - - li $4, 1 - msub $3 $4 - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - mthi $0 - mtlo $0 - li $4, 0x10000 - msub $4 $4 - mfhi $3 - bne $3 0xffffffff fail - mflo $3 - bne $3 0 fail - - mtlo $0 - mthi $0 - li $4, 1 - li $5, -1 - msub $5, $4 - mfhi $3 - bne $3 0 fail - mflo $3 - bne $3 1 fail - - .data -msubu_: .asciiz "Testing MSUBU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 msubu_ - syscall - - mthi $0 - mtlo $0 - msubu $0 $0 - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - mthi $0 - mtlo $0 - li $4, 1 - msubu $4 $4 - mfhi $3 - bne $3 0xffffffff fail - mflo $3 - bne $3 0xffffffff fail - - mtlo $0 - mthi $0 - li $4, 1 - li $5, -1 - msubu $5, $4 - mfhi $3 - bne $3 0xffffffff fail - mflo $3 - bne $3 1 fail - - .data -mul_: .asciiz "Testing MUL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mul_ - syscall - - li $2, 1 - mul $3, $2, 0 - bnez $3 fail - mul $3, $2, 1 - bne $3 1 fail - mul $3, $2, 10 - bne $3 10 fail - - mul $2 $0 $0 - bnez $2 fail - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - li $4, 1 - mul $2 $4 $4 - bne $2 1 fail - mfhi $3 - bnez $3 fail - mflo $3 - bne $3 1 fail - - li $4, -1 - mul $2 $4 $4 - bne $2 1 fail - mfhi $3 - bnez $3 fail - mflo $3 - bne $3 1 fail - - li $4, -1 - li $5, 1 - mul $2 $4 $5 - bne $2 -1 fail - mfhi $3 - bne $3 -1 fail - mflo $3 - bne $3 -1 fail - - li $4, 0x10000 - mul $2 $4 $4 - bne $2 0 fail - mfhi $3 - bne $3 1 fail - mflo $3 - bne $3 0 fail - - li $4, 0x80000000 - mul $2 $4 $4 - bne $2 0 fail - mfhi $3 - bne $3 0x40000000 fail - mflo $3 - bne $3 0 fail - - - .data -multu_: .asciiz "Testing MULTU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 multu_ - syscall - - multu $0 $0 - mfhi $3 - bnez $3 fail - mflo $3 - bnez $3 fail - - li $4, 1 - multu $4 $4 - mfhi $3 - bnez $3 fail - mflo $3 - bne $3 1 fail - - li $4, -1 - multu $4 $4 - mfhi $3 - bne $3 0xfffffffe fail - mflo $3 - bne $3 1 fail - - li $4, -1 - li $5, 0 - multu $4 $5 - mfhi $3 - bne $3 0 fail - mflo $3 - bne $3 0 fail - - li $4, -1 - li $5, 1 - multu $4 $5 - mfhi $3 - bne $3 0 fail - mflo $3 - bne $3 -1 fail - - li $4, 0x10000 - multu $4 $4 - mfhi $3 - bne $3 1 fail - mflo $3 - bne $3 0 fail - - li $4, 0x80000000 - multu $4 $4 - mfhi $3 - bne $3 0x40000000 fail - mflo $3 - bne $3 0 fail - - li $3, 0xcecb8f27 - li $4, 0xfd87b5f2 - multu $3 $4 - mfhi $3 - bne $3 0xcccccccb fail - mflo $3 - bne $3 0x7134e5de fail - - - .data -mulo_: .asciiz "Testing MULO\n" -mulo1_: .asciiz "Expect an exception:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mulo_ - syscall - - mulo $2 $0 $0 - bne $2 0 fail - - li $4, 1 - mulo $2 $4 $4 - bne $2 1 fail - - li $4, -1 - mulo $2 $4 $4 - bne $2 1 fail - - li $4, -1 - li $5, 1 - mulo $2 $4 $5 - bne $2 -1 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 mulo1_ - syscall - - li $4, 0x10000 - mulo $2 $4 $4 - bne $2 0 fail - - - .data -nor_: .asciiz "Testing NOR\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 nor_ - syscall - - li $2 1 - li $3 -1 - - nor $4 $0 $0 - bne $4 -1 fail - nor $4 $2 $2 - bne $4 0xfffffffe fail - nor $4 $2 $3 - bne $4 0 fail - - - .data -or_: .asciiz "Testing OR\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 or_ - syscall - - li $2 1 - li $3 -1 - - or $4 $0 $0 - bne $4 0 fail - or $4 $2 $2 - bne $4 1 fail - or $4 $2 $3 - bne $4 -1 fail - - - .data -ori_: .asciiz "Testing ORI\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ori_ - syscall - - li $2 1 - li $3 -1 - - ori $4 $0 0 - bne $4 0 fail - ori $4 $2 1 - bne $4 1 fail - ori $4 $2 0xffff - bne $4 0x0000ffff fail - - -# RFE tested previously - - - .data -sp_: .asciiz "Testing .space\n" -spd_: .space 100000 -spde_: .word 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sd_ - syscall - - la $2 spde_ - sub $2 $2 4 - lw $3 0($2) # look for exception - - -# SB is endian-specific - - - .data -sd_: .asciiz "Testing SD\n" -sd2_: .asciiz "Expect two address error exceptions:\n" - .align 2 -sdd_: .word 0, 0, 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sd_ - syscall - - li $3, 0x7f7f7f7f - li $4, 0xf7f7f7f7 - la $2 sdd_ - sd $3 0($2) - ld $5 0($2) - bne $3 $5 fail - bne $4 $4 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 sd2_ - syscall - - li $t5 0x7fffffff - sd $3 1000($t5) - sd $3 1001($t5) - - - .data -swc1_: .asciiz "Testing SWC1\n" - .align 2 -swc1d_: .word 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 swc1_ - syscall - - li $3, 0x7f7f7f7f - la $2 swc1d_ - mtc1 $3, $0 - swc1 $f0 0($2) - lw $5 0($2) - bne $5 $3 fail - - - .data -s.s_: .asciiz "Testing S.S\n" - .align 2 -s.sd_: .word 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 s.s_ - syscall - - li $3, 0x7f7f7f7f - la $2 s.sd_ - mtc1 $3, $0 - s.s $f0 0($2) - lw $5 0($2) - bne $5 $3 fail - - - .data -sdc1_: .asciiz "Testing SDC1\n" - .align 2 -sdc1d_: .word 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sdc1_ - syscall - - li $3, 0x7f7f7f7f - li $4, 0xf7f7f7f7 - la $2 sdc1d_ - mtc1 $3, $0 - mtc1 $4, $1 - sdc1 $f0 0($2) - lw $5 0($2) - bne $5 $3 fail - lw $5 4($2) - bne $5 $4 fail - - - .data -s.d_: .asciiz "Testing S.D\n" - .align 2 -s.dd_: .word 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 s.d_ - syscall - - li $3, 0x7f7f7f7f - li $4, 0xf7f7f7f7 - la $2 s.dd_ - mtc1 $3, $0 - mtc1 $4, $1 - s.d $f0 0($2) - lw $5 0($2) - bne $5 $3 fail - lw $5 4($2) - bne $5 $4 fail - - -# SDC2 not tested - - .data -sll_: .asciiz "Testing SLL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sll_ - syscall - - li $2 1 - - sll $3 $2 0 - bne $3 1 fail - sll $3 $2 1 - bne $3 2 fail - sll $3 $2 16 - bne $3 0x10000 fail - sll $3 $2 31 - bne $3 0x80000000 fail - - - .data -sllv_: .asciiz "Testing SLLV\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sllv_ - syscall - - li $2 1 - li $4 0 - sllv $3 $2 $4 - bne $3 1 fail - li $4 1 - sllv $3 $2 $4 - bne $3 2 fail - li $4 16 - sllv $3 $2 $4 - bne $3 0x10000 fail - li $4 32 - sllv $3 $2 $4 - bne $3 1 fail - - - .data -slt_: .asciiz "Testing SLT\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 slt_ - syscall - - slt $3 $0 $0 - bne $3 0 fail - li $2 1 - slt $3 $2 $0 - bne $3 0 fail - slt $3 $0 $2 - bne $3 1 fail - li $2 -1 - slt $3 $2 $0 - bne $3 1 fail - slt $3 $0 $2 - bne $3 0 fail - li $2 -1 - li $4 1 - slt $3 $2 $4 - bne $3 1 fail - - - .data -slti_: .asciiz "Testing SLTI\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 slti_ - syscall - - slti $3 $0 0 - bne $3 0 fail - li $2 1 - slti $3 $2 0 - bne $3 0 fail - slti $3 $0 1 - bne $3 1 fail - li $2 -1 - slti $3 $2 0 - bne $3 1 fail - slti $3 $0 -1 - bne $3 0 fail - li $2 -1 - li $4 1 - slti $3 $2 1 - bne $3 1 fail - slti $3 $4 -1 - bne $3 0 fail - - - .data -sltiu_: .asciiz "Testing SLTIU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sltiu_ - syscall - - sltiu $3 $0 0 - bne $3 0 fail - li $2 1 - sltiu $3 $2 0 - bne $3 0 fail - sltiu $3 $0 1 - bne $3 1 fail - li $2 -1 - sltiu $3 $2 0 - bne $3 0 fail - sltiu $3 $0 -1 - bne $3 1 fail - li $2 -1 - li $4 1 - sltiu $3 $2 1 - bne $3 0 fail - sltiu $3 $4 -1 - bne $3 1 fail - - - .data -sltu_: .asciiz "Testing SLTU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sltu_ - syscall - - sltu $3 $0 $0 - bne $3 0 fail - li $2 1 - sltu $3 $2 $0 - bne $3 0 fail - sltu $3 $0 $2 - bne $3 1 fail - li $2 -1 - sltu $3 $2 $0 - bne $3 0 fail - sltu $3 $0 $2 - bne $3 1 fail - li $2 -1 - li $4 1 - sltu $3 $2 $4 - bne $3 0 fail - - - .data -sra_: .asciiz "Testing SRA\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sra_ - syscall - - li $2 1 - sra $3 $2 0 - bne $3 1 fail - sra $3 $2 1 - bne $3 0 fail - li $2 0x1000 - sra $3 $2 4 - bne $3 0x100 fail - li $2 0x80000000 - sra $3 $2 4 - bne $3 0xf8000000 fail - - - .data -srav_: .asciiz "Testing SRAV\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 srav_ - syscall - - li $2 1 - li $4 0 - srav $3 $2 $4 - bne $3 1 fail - li $4 1 - srav $3 $2 $4 - bne $3 0 fail - li $2 0x1000 - li $4 4 - srav $3 $2 $4 - bne $3 0x100 fail - li $2 0x80000000 - li $4 4 - srav $3 $2 $4 - bne $3 0xf8000000 fail - - - .data -srl_: .asciiz "Testing SRL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 srl_ - syscall - - li $2 1 - srl $3 $2 0 - bne $3 1 fail - srl $3 $2 1 - bne $3 0 fail - li $2 0x1000 - srl $3 $2 4 - bne $3 0x100 fail - li $2 0x80000000 - srl $3 $2 4 - bne $3 0x08000000 fail - - - .data -srlv_: .asciiz "Testing SRLV\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 srlv_ - syscall - - li $2 1 - li $4 0 - srlv $3 $2 $4 - bne $3 1 fail - li $4 1 - srlv $3 $2 $4 - bne $3 0 fail - li $2 0x1000 - li $4 4 - srlv $3 $2 $4 - bne $3 0x100 fail - li $2 0x80000000 - li $4 4 - srlv $3 $2 $4 - bne $3 0x08000000 fail - - - .data -ssnop_: .asciiz "Testing SSNOP\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 nop_ - syscall - - ssnop # How do we test it?? - - - .data -sub_: .asciiz "Testing SUB\n" -sub1_: .asciiz "Expect an overflow exceptions:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sub_ - syscall - - li $2 1 - li $3 -1 - - sub $4, $0, $0 - bnez $4 fail - sub $4, $0, $2 - bne $4 -1 fail - sub $4, $2, $0 - bne $4, 1 fail - sub $4, $2, $3 - bne $4, 2 fail - sub $4, $3, $2 - bne $4, -2 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 sub1_ - syscall - li $2 0x80000000 - li $3 1 - sub $4, $3, $2 - - - .data -subu_: .asciiz "Testing SUBU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 subu_ - syscall - - li $2 1 - li $3 -1 - - subu $4, $0, $0 - bnez $4 fail - subu $4, $0, $2 - bne $4 -1 fail - subu $4, $2, $0 - bne $4, 1 fail - subu $4, $2, $3 - bne $4, 2 fail - subu $4, $3, $2 - bne $4, -2 fail - - li $2 0x80000000 - li $3 1 - subu $4, $3, $2 - - - .data -sw_: .asciiz "Testing SW\n" -sw2_: .asciiz "Expect two address error exceptions:\n" - .align 2 -swd_: .byte 0, 0, 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sw_ - syscall - - li $3, 0x7f7f7f7f - la $2 swd_ - sw $3 0($2) - lw $4 0($2) - bne $4 0x7f7f7f7f fail - - li $2, 4 - sw $3 swd_($2) - lw $4 swd_($2) - bne $4 0x7f7f7f7f fail - - li $v0 4 # syscall 4 (print_str) - la $a0 sw2_ - syscall - - li $t5 0x7fffffff - sw $3 1000($t5) - sw $3 1001($t5) - - lw $t0 far_away - sw $0 far_away - lw $t1 far_away - bne $t1 $0 fail - - -# SWL is endian-specific - - -# SWR is endian-specific - - - .data -sync_: .asciiz "Testing SYNC\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 nop_ - syscall - - sync - - - .data -syscall_:.asciiz "Testing SYSCALL\n" -syscall1_:.asciiz "The next line should contain: -1, -1.000000, -2.000000\n" -syscall2_:.asciiz ", " -fp_sm1: .float -1.0 -fp_dm2: .double -2.0 -fp_c1: .float 17.18 -fp_c2: .float 1700.18 -fp_c3: .double 17.18e10 -fp_c4: .double 1700.18e10 -syscall5_:.asciiz "\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 syscall_ - syscall - - li $v0 4 # syscall 4 (print_str) - la $a0 syscall1_ - syscall - - li $v0 1 # syscall 1 (print_int) - li $a0 -1 - syscall - - li $v0 4 # syscall 4 (print_str) - la $a0 syscall2_ - syscall - - lwc1 $f12 fp_sm1# syscall 2 (print_float) - li $v0 2 - syscall - - li $v0 4 # syscall 4 (print_str) - la $a0 syscall2_ - syscall - - lwc1 $f12 fp_dm2# syscall 3 (print_double) - lwc1 $f13 fp_dm2+4 - li $v0 3 - syscall - - li $v0 4 # syscall 4 (print_str) - la $a0 syscall5_ - syscall - - li $v0 5 # syscall 5 (read_int) - syscall - bne $v0 17 fail - - li $v0 5 # syscall 5 (read_int) - syscall - bne $v0 1717 fail - - li $v0 6 # syscall 6 (read_float) - syscall - lwc1 $f2 fp_c1 - c.eq.s $f0, $f2 - bc1f fail - - li $v0 6 # syscall 6 (read_float) - syscall - lwc1 $f2 fp_c2 - c.eq.s $f0, $f2 - bc1f fail - - li $v0 7 # syscall 7 (read_double) - syscall - lwc1 $f2 fp_c3 - lwc1 $f3 fp_c3+4 - c.eq.d $f0, $f2 - bc1f fail - - li $v0 7 # syscall 7 (read_double) - syscall - lwc1 $f2 fp_c4 - lwc1 $f3 fp_c4+4 - c.eq.d $f0, $f2 - bc1f fail - - - .data -teq_: .asciiz "Testing TEQ\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 teq_ - syscall - - li $2 1 - teq $0 $2 - teq $0 $0 - - - .data -teqi_: .asciiz "Testing TEQI\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 teqi_ - syscall - - teqi $0 4 - teqi $0 0 - - - .data -tge_: .asciiz "Testing TGE\nExpect two exception messages:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tge_ - syscall - - li $2 1 - li $3 2 - tge $2 $3 - tge $0 $0 - tge $3 $2 - - - .data -tgei_: .asciiz "Testing TGEI\nExpect two exception messages:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tgei_ - syscall - - li $2 8 - tgei $0 4 - tgei $0 0 - tgei $2 1 - - - .data -tgeiu_: .asciiz "Testing TGEIU\nExpect two exception messages:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tgeiu_ - syscall - - li $2 -4 - tgeiu $0 4 - tgeiu $0 0 - tgeiu $2 1 - - - .data -tgeu_: .asciiz "Testing TGEU\nExpect two exception messages:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tgeu_ - syscall - - li $2 1 - li $3 -4 - tgeu $2 $3 - tgeu $0 $0 - tgeu $3 $2 - - - .data -tlb_: .asciiz "Testing TLB operations:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tlb_ - syscall - tlbp - tlbr - tlbwi - tlbr - - - .data -tlt_: .asciiz "Testing TLT\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tlt_ - syscall - - li $2 1 - li $3 2 - tlt $2 $3 - tlt $0 $0 - tlt $3 $2 - - - .data -tlti_: .asciiz "Testing TLTI\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tlti_ - syscall - - li $2 8 - tlti $0 4 - tlti $0 0 - tlti $2 1 - - - .data -tltiu_: .asciiz "Testing TLTIU\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tltiu_ - syscall - - li $2 -4 - tltiu $0 4 - tltiu $0 0 - tltiu $2 1 - - - .data -tltu_: .asciiz "Testing TLTU\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tltu_ - syscall - - li $2 1 - li $3 -4 - tltu $2 $3 - tltu $0 $0 - tltu $3 $2 - - - .data -tne_: .asciiz "Testing TNE\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tne_ - syscall - - li $2 1 - tne $0 $2 - tne $0 $0 - - - .data -tnei_: .asciiz "Testing TNEI\nExpect one exception message:\n " - .text - li $v0 4 # syscall 4 (print_str) - la $a0 tnei_ - syscall - - tnei $0 4 - tnei $0 0 - - - .data -xor_: .asciiz "Testing XOR\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 xor_ - syscall - - li $2 1 - li $3 -1 - - xor $4 $0 $0 - bne $4 0 fail - xor $4 $3 $3 - bne $4 0 fail - xor $4 $2 $3 - bne $4 0xfffffffe fail - - .data -xori_: .asciiz "Testing XORI\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 xori_ - syscall - - li $2 1 - li $3 -1 - - xori $4 $0 0 - bne $4 0 fail - xori $4 $3 0xffff - bne $4 0xffff0000 fail - xori $4 $2 0xffff - bne $4 0x0000fffe fail - - -# -# Testing Floating Point Ops -# - - .data -abs.s_:.asciiz "Testing ABS.S\n" -fp_s100:.float 100.0 -fp_sm100:.float -100.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 abs.s_ - syscall - - lw $4 fp_s100 - lwc1 $f0 fp_s100 - abs.s $f2 $f0 - mfc1 $5 $f2 - bne $4 $5 fail - - lwc1 $f0 fp_sm100 - abs.s $f2 $f0 - mfc1 $5 $f2 - bne $4 $5 fail - - - .data -abs.d_:.asciiz "Testing ABS.D\n" -fp_d100:.double 100.0 -fp_dm100:.double -100.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 abs.d_ - syscall - - lw $4 fp_d100 - lw $5 fp_d100+4 - lwc1 $f0 fp_d100 - lwc1 $f1 fp_d100+4 - abs.d $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lwc1 $f0 fp_dm100 - lwc1 $f1 fp_dm100+4 - abs.d $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - - .data -add.s_: .asciiz "Testing ADD.S\n" -fp_s0: .float 0.0 -fp_s1: .float 1.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 add.s_ - syscall - - lw $4 fp_s0 - lwc1 $f0 fp_s0 - add.s $f2 $f0 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_s1 - lwc1 $f0 fp_s0 - lwc1 $f2 fp_s1 - add.s $f4 $f0 $f2 - mfc1 $6 $f4 - bne $4 $6 fail - - lw $4 fp_s0 - lwc1 $f0 fp_s1 - lwc1 $f2 fp_sm1 - add.s $f4 $f0 $f2 - mfc1 $6 $f4 - bne $4 $6 fail - - - .data -add.d_: .asciiz "Testing ADD.D\n" -fp_d0: .double 0.0 -fp_d1: .double 1.0 -fp_dm1: .double -1.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 add.d_ - syscall - - lw $4 fp_d0 - lw $5 fp_d0+4 - lwc1 $f0 fp_d0 - lwc1 $f1 fp_d0+4 - add.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d1 - lw $5 fp_d1+4 - lwc1 $f0 fp_d0 - lwc1 $f1 fp_d0+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - add.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d0 - lw $5 fp_d0+4 - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_dm1 - lwc1 $f3 fp_dm1+4 - add.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - - - .data -bc1f_: .asciiz "Testing BC1F and BC1T\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bc1f_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.eq.s $f0 $f2 - bc1f fail - bc1t l205 - j fail -l205: c.eq.s $f0 $f4 - bc1t fail - bc1f l206 - j fail -l206: - - - - -# ToDo: Check order/unordered exception in floating point comparison. - - .data -c.eq.d_: .asciiz "Testing C.EQ.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.eq.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.eq.d $f0 $f2 - bc1f fail - bc1t l200 - j fail -l200: c.eq.d $f0 $f4 - bc1t fail - bc1f l201 - j fail -l201: - - - .data -c.eq.s_: .asciiz "Testing C.EQ.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.eq.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.eq.s $f0 $f2 - bc1f fail - bc1t l210 - j fail -l210: c.eq.s $f0 $f4 - bc1t fail - bc1f l211 - j fail -l211: - - - .data -c.f.d_: .asciiz "Testing C.F.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.f.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.f.d $f0 $f2 - bc1t fail - bc1f l220 - j fail -l220: c.f.d $f0 $f4 - bc1t fail - bc1f l221 - j fail -l221: - - - .data -c.f.s_: .asciiz "Testing C.F.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.f.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.f.s $f0 $f2 - bc1t fail - bc1f l230 - j fail -l230: c.f.s $f0 $f4 - bc1t fail - bc1f l231 - j fail -l231: - - - .data -c.le.d_: .asciiz "Testing C.LE.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.le.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - lwc1 $f4 fp_dm2 - lwc1 $f5 fp_dm2+4 - c.le.d $f0 $f2 - bc1f fail - bc1t l240 - j fail -l240: c.le.d $f2 $f0 - bc1t fail - bc1f l241 - j fail -l241: c.le.d $f0 $f0 - bc1f fail - bc1t l242 - j fail -l242: c.le.d $f4 $f0 - bc1f fail - bc1t l243 - j fail -l243: - - - .data -c.le.s_: .asciiz "Testing C.LE.S\n" -fp_sm2: .float -2.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.le.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1p5 - lwc1 $f4 fp_sm2 - c.le.s $f0 $f2 - bc1f fail - bc1t l250 - j fail -l250: c.le.s $f2 $f0 - bc1t fail - bc1f l251 - j fail -l251: c.le.s $f0 $f0 - bc1f fail - bc1t l252 - j fail -l252: c.le.s $f4 $f0 - bc1f fail - bc1t l253 - j fail -l253: - - .data -c.le.s_1_: .asciiz "Testing C.LE.S CC=1\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.le.s_1_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1p5 - lwc1 $f4 fp_sm2 - c.le.s 1 $f0 $f2 - bc1f 1 fail - bc1t 1 l250_1 - j fail -l250_1: c.le.s 1 $f2 $f0 - bc1t 1 fail - bc1f 1 l251_1 - j fail -l251_1: c.le.s 1 $f0 $f0 - bc1f 1 fail - bc1t 1 l252_1 - j fail -l252_1: c.le.s 1 $f4 $f0 - bc1f 1 fail - bc1t 1 l253_1 - j fail -l253_1: - - .data -c.lt.d_: .asciiz "Testing C.LT.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.lt.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - lwc1 $f4 fp_dm2 - lwc1 $f5 fp_dm2+4 - c.lt.d $f0 $f2 - bc1f fail - bc1t l260 - j fail -l260: c.lt.d $f2 $f0 - bc1t fail - bc1f l261 - j fail -l261: c.lt.d $f0 $f0 - bc1t fail - bc1f l262 - j fail -l262: c.lt.d $f4 $f0 - bc1f fail - bc1t l263 - j fail -l263: - - .data -c.lt.d_7_: .asciiz "Testing C.LT.D CC=7\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.lt.d_7_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - lwc1 $f4 fp_dm2 - lwc1 $f5 fp_dm2+4 - c.lt.d 7 $f0 $f2 - bc1f 7 fail - bc1t 7 l260_7 - j fail -l260_7: c.lt.d 7 $f2 $f0 - bc1t 7 fail - bc1f 7 l261_7 - j fail -l261_7: c.lt.d 7 $f0 $f0 - bc1t 7 fail - bc1f 7 l262_7 - j fail -l262_7: c.lt.d 7 $f4 $f0 - bc1f 7 fail - bc1t 7 l263_7 - j fail -l263_7: - - .data -c.lt.s_: .asciiz "Testing C.LT.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.lt.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1p5 - lwc1 $f4 fp_sm2 - c.lt.s $f0 $f2 - bc1f fail - bc1t l270 - j fail -l270: c.lt.s $f2 $f0 - bc1t fail - bc1f l271 - j fail -l271: c.lt.s $f0 $f0 - bc1t fail - bc1f l272 - j fail -l272: c.lt.s $f4 $f0 - bc1f fail - bc1t l273 - j fail -l273: - - - .data -c.nge.d_: .asciiz "Testing C.NGE.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.nge.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - lwc1 $f4 fp_dm2 - lwc1 $f5 fp_dm2+4 - c.nge.d $f0 $f2 - bc1f fail - bc1t l280 - j fail -l280: c.nge.d $f2 $f0 - bc1t fail - bc1f l281 - j fail -l281: c.nge.d $f0 $f0 - bc1t fail - bc1f l282 - j fail -l282: c.nge.d $f4 $f0 - bc1f fail - bc1t l283 - j fail -l283: - - - .data -c.nge.s_: .asciiz "Testing C.NGE.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.nge.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1p5 - lwc1 $f4 fp_sm2 - c.nge.s $f0 $f2 - bc1f fail - bc1t l290 - j fail -l290: c.nge.s $f2 $f0 - bc1t fail - bc1f l291 - j fail -l291: c.nge.s $f0 $f0 - bc1t fail - bc1f l292 - j fail -l292: c.nge.s $f4 $f0 - bc1f fail - bc1t l293 - j fail -l293: - - - .data -c.ngle.d_: .asciiz "Testing C.NGLE.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ngle.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.ngle.d $f0 $f2 - bc1t fail -l300: c.ngle.d $f0 $f4 - bc1t fail -l301: - - - .data -c.ngle.s_: .asciiz "Testing C.NGLE.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ngle.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.ngle.s $f0 $f2 - bc1t fail -l310: c.ngle.s $f0 $f4 - bc1t fail -l311: - - - .data -c.ngl.d_: .asciiz "Testing C.NGL.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ngl.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.ngl.d $f0 $f2 - bc1f fail - bc1t l320 - j fail -l320: c.ngl.d $f0 $f4 - bc1t fail - bc1f l321 - j fail -l321: - - - .data -c.ngl.s_: .asciiz "Testing C.NGL.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ngl.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.ngl.s $f0 $f2 - bc1f fail - bc1t l330 - j fail -l330: c.ngl.s $f0 $f4 - bc1t fail - bc1f l331 - j fail -l331: - - - .data -c.ngt.d_: .asciiz "Testing C.NGT.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ngt.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - lwc1 $f4 fp_dm2 - lwc1 $f5 fp_dm2+4 - c.ngt.d $f0 $f2 - bc1f fail - bc1t l340 - j fail -l340: c.ngt.d $f2 $f0 - bc1t fail - bc1f l341 - j fail -l341: c.ngt.d $f0 $f0 - bc1f fail - bc1t l342 - j fail -l342: c.ngt.d $f4 $f0 - bc1f fail - bc1t l343 - j fail -l343: - - - .data -c.ngt.s_: .asciiz "Testing C.NGT.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ngt.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1p5 - lwc1 $f4 fp_sm2 - c.ngt.s $f0 $f2 - bc1f fail - bc1t l350 - j fail -l350: c.ngt.s $f2 $f0 - bc1t fail - bc1f l351 - j fail -l351: c.ngt.s $f0 $f0 - bc1f fail - bc1t l352 - j fail -l352: c.ngt.s $f4 $f0 - bc1f fail - bc1t l353 - j fail -l353: - - - .data -c.ole.d_: .asciiz "Testing C.OLE.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ole.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - lwc1 $f4 fp_dm2 - lwc1 $f5 fp_dm2+4 - c.ole.d $f0 $f2 - bc1f fail - bc1t l360 - j fail -l360: c.ole.d $f2 $f0 - bc1t fail - bc1f l361 - j fail -l361: c.ole.d $f0 $f0 - bc1f fail - bc1t l362 - j fail -l362: c.ole.d $f4 $f0 - bc1f fail - bc1t l363 - j fail -l363: - - - .data -c.ole.s_: .asciiz "Testing C.OLE.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ole.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1p5 - lwc1 $f4 fp_sm2 - c.ole.s $f0 $f2 - bc1f fail - bc1t l370 - j fail -l370: c.ole.s $f2 $f0 - bc1t fail - bc1f l371 - j fail -l371: c.ole.s $f0 $f0 - bc1f fail - bc1t l372 - j fail -l372: c.ole.s $f4 $f0 - bc1f fail - bc1t l373 - j fail -l373: - - - .data -c.seq.d_: .asciiz "Testing C.SEQ.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.seq.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.seq.d $f0 $f2 - bc1f fail - bc1t l380 - j fail -l380: c.seq.d $f0 $f4 - bc1t fail - bc1f l381 - j fail -l381: - - - .data -c.seq.s_: .asciiz "Testing C.SEQ.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.seq.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.seq.s $f0 $f2 - bc1f fail - bc1t l390 - j fail -l390: c.seq.s $f0 $f4 - bc1t fail - bc1f l391 - j fail -l391: - - - .data -c.sf.d_: .asciiz "Testing C.SF.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.sf.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.sf.d $f0 $f2 - bc1t fail -l400: c.sf.d $f0 $f4 - bc1t fail -l401: - - - .data -c.sf.s_: .asciiz "Testing C.SF.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.sf.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.sf.s $f0 $f2 - bc1t fail -l410: c.sf.s $f0 $f4 - bc1t fail -l411: - - - .data -c.ueq.d_: .asciiz "Testing C.UEQ.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ueq.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.ueq.d $f0 $f2 - bc1f fail - bc1t l420 - j fail -l420: c.ueq.d $f0 $f4 - bc1t fail - bc1f l421 - j fail -l421: - - - .data -c.ueq.s_: .asciiz "Testing C.UEQ.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ueq.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.ueq.s $f0 $f2 - bc1f fail - bc1t l430 - j fail -l430: c.ueq.s $f0 $f4 - bc1t fail - bc1f l431 - j fail -l431: - - - .data -c.ule.d_: .asciiz "Testing C.ULE.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ule.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - lwc1 $f4 fp_dm2 - lwc1 $f5 fp_dm2+4 - c.ule.d $f0 $f2 - bc1f fail - bc1t l440 - j fail -l440: c.ule.d $f2 $f0 - bc1t fail - bc1f l441 - j fail -l441: c.ule.d $f0 $f0 - bc1f fail - bc1t l442 - j fail -l442: c.ule.d $f4 $f0 - bc1f fail - bc1t l443 - j fail -l443: - - - .data -c.ule.s_: .asciiz "Testing C.ULE.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.ule.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1p5 - lwc1 $f4 fp_sm2 - c.ule.s $f0 $f2 - bc1f fail - bc1t l450 - j fail -l450: c.ule.s $f2 $f0 - bc1t fail - bc1f l451 - j fail -l451: c.ule.s $f0 $f0 - bc1f fail - bc1t l452 - j fail -l452: c.ule.s $f4 $f0 - bc1f fail - bc1t l453 - j fail -l453: - - - .data -c.un.d_: .asciiz "Testing C.UN.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.un.d_ - syscall - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d1p5 - lwc1 $f5 fp_d1p5+4 - c.un.d $f0 $f2 - bc1t fail - bc1f l460 - j fail -l460: c.un.d $f0 $f4 - bc1t fail - bc1f l461 - j fail -l461: - - - .data -c.un.s_: .asciiz "Testing C.UN.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 c.un.s_ - syscall - - lwc1 $f0 fp_s1 - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s1p5 - c.un.s $f0 $f2 - bc1t fail - bc1f l470 - j fail -l470: c.un.s $f0 $f4 - bc1t fail - bc1f l471 - j fail -l471: - - -# CFC1 and CTC1 tested previously - - - .data -ceil.w.d_: .asciiz "Testing CEIL.W.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ceil.w.d_ - syscall - - lwc1 $f2 fp_d0 - lwc1 $f3 fp_d0+4 - ceil.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - ceil.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - ceil.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 2 fail - - - .data -ceil.w.s_: .asciiz "Testing CEIL.W.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ceil.w.s_ - syscall - - lwc1 $f2 fp_s0 - ceil.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_s1 - ceil.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_s1p5 - ceil.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 2 fail - - - .data -cvt.d.s_: .asciiz "Testing CVT.D.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 cvt.d.s_ - syscall - - lw $4 fp_d0 - lw $5 fp_d0+4 - lwc1 $f0 fp_s0 - cvt.d.s $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d1 - lw $5 fp_d1+4 - lwc1 $f0 fp_s1 - cvt.d.s $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_dm1 - lw $5 fp_dm1+4 - lwc1 $f0 fp_sm1 - cvt.d.s $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - - .data -cvt.d.w_: .asciiz "Testing CVT.D.W\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 cvt.d.w_ - syscall - - lw $4 fp_d0 - lw $5 fp_d0+4 - mtc1 $0 $0 - cvt.d.w $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d1 - lw $5 fp_d1+4 - li $t1 1 - mtc1 $t1 $0 - cvt.d.w $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_dm1 - lw $5 fp_dm1+4 - li $t1 -1 - mtc1 $t1 $0 - cvt.d.w $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - - .data -cvt.s.d_: .asciiz "Testing CVT.S.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 cvt.s.d_ - syscall - - lw $4 fp_s0 - lwc1 $f0 fp_d0 - lwc1 $f1 fp_d0+4 - cvt.s.d $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_s1 - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - cvt.s.d $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_sm1 - lwc1 $f0 fp_dm1 - lwc1 $f1 fp_dm1+4 - cvt.s.d $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - - .data -cvt.s.w_: .asciiz "Testing CVT.S.W\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 cvt.s.w_ - syscall - - lw $4 fp_s0 - mtc1 $0 $0 - cvt.s.w $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_s1 - li $t1 1 - mtc1 $t1 $0 - cvt.s.w $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_sm1 - li $t1 -1 - mtc1 $t1 $0 - cvt.s.w $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - - .data -cvt.w.d_: .asciiz "Testing CVT.W.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 cvt.w.d_ - syscall - - lwc1 $f0 fp_d0 - lwc1 $f1 fp_d0+4 - cvt.w.d $f2 $f0 - mfc1 $6 $f2 - bne $0 $6 fail - - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - cvt.w.d $f2 $f0 - mfc1 $6 $f2 - li $4 1 - bne $4 $6 fail - - lwc1 $f0 fp_dm1 - lwc1 $f1 fp_dm1+4 - cvt.w.d $f2 $f0 - mfc1 $6 $f2 - li $4 -1 - bne $4 $6 fail - - - .data -cvt.w.s_: .asciiz "Testing CVT.W.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 cvt.w.s_ - syscall - - lwc1 $f0 fp_s0 - cvt.w.s $f2 $f0 - mfc1 $6 $f2 - bne $0 $6 fail - - lwc1 $f0 fp_s1 - cvt.w.s $f2 $f0 - mfc1 $6 $f2 - li $4 1 - bne $4 $6 fail - - lwc1 $f0 fp_sm1 - cvt.w.s $f2 $f0 - mfc1 $6 $f2 - li $4 -1 - bne $4 $6 fail - - - .data -div.s_: .asciiz "Testing DIV.S\n" -fp_s2: .float 2.0 -fp_s3: .float 3.0 -fp_s1p5:.float 1.5 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 div.s_ - syscall - - lw $4 fp_s1 - lwc1 $f0 fp_s1 - div.s $f2 $f0 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_s1p5 - lwc1 $f0 fp_s3 - lwc1 $f2 fp_s2 - div.s $f4 $f0 $f2 - mfc1 $6 $f4 - bne $4 $6 fail - - - .data -div.d_: .asciiz "Testing DIV.D\n" -fp_d2: .double 2.0 -fp_d3: .double 3.0 -fp_d1p5:.double 1.5 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 div.d_ - syscall - - lw $4 fp_d1 - lw $5 fp_d1+4 - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - div.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d1p5 - lw $5 fp_d1p5+4 - lwc1 $f0 fp_d3 - lwc1 $f1 fp_d3+4 - lwc1 $f2 fp_d2 - lwc1 $f3 fp_d2+4 - div.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - - - .data -floor.w.d_: .asciiz "Testing FLOOR.W.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 floor.w.d_ - syscall - - lwc1 $f2 fp_d0 - lwc1 $f3 fp_d0+4 - floor.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - floor.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_d1p5 - lwc1 $f3 fp_d1p5+4 - floor.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - - .data -floor.w.s_: .asciiz "Testing FLOOR.W.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 floor.w.s_ - syscall - - lwc1 $f2 fp_s0 - floor.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_s1 - floor.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_s1p5 - floor.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - - .data -ldc1_: .asciiz "Testing LDC1\n" - .align 2 -ldc1d_: .word 0x7f7f7f7f, 0xf7f7f7f7 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ldc1_ - syscall - - la $2 ldc1d_ - ldc1 $f0 0($2) - mfc1 $3, $f0 - mfc1 $4, $f1 - lw $5 0($2) - bne $5 $3 fail - lw $5 4($2) - bne $5 $4 fail - - - .data -l.d_: .asciiz "Testing L.D\n" - .align 2 -l.dd_: .word 0x7f7f7f7f, 0xf7f7f7f7 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 l.d_ - syscall - - la $2 l.dd_ - l.d $f0 0($2) - mfc1 $3, $f0 - mfc1 $4, $f1 - lw $5 0($2) - bne $5 $3 fail - lw $5 4($2) - bne $5 $4 fail - - - .data -lwc1_: .asciiz "Testing LWC1\n" - .align 2 -lwc1d_: .word 0x7f7f7f7f - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lwc1_ - syscall - - la $2 lwc1d_ - lwc1 $f0 0($2) - mfc1 $3 $f0 - lw $4 0($2) - bne $4 $3 fail - - - .data -l.s_: .asciiz "Testing L.S\n" - .align 2 -l.sd_: .word 0x7f7f7f7f - .text - li $v0 4 # syscall 4 (print_str) - la $a0 l.s_ - syscall - - la $2 l.sd_ - l.s $f0 0($2) - mfc1 $3 $f0 - lw $4 0($2) - bne $4 $3 fail - - -# MFC1 tested previously - - - .data -mov.s_: .asciiz "Testing MOV.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mov.s_ - syscall - - lw $4 fp_s1 - lwc1 $f2 fp_s1 - mov.s $f4 $f2 - mov.s $f6 $f4 - mfc1 $6 $f6 - bne $4 $6 fail - - .data -mov.d_: .asciiz "Testing MOV.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mov.d_ - syscall - - lw $4 fp_d1 - lw $5 fp_d1+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - mov.d $f4 $f2 - mov.d $f6 $f4 - mfc1 $6 $f6 - mfc1 $7 $f7 - bne $4 $6 fail - bne $5 $7 fail - - .data -movf.d_:.asciiz "Testing MOVF.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movf.d_ - syscall - - li $2 0xfe000000 - ctc1 $2 $31 # clear cc0, set others - - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d2 - lwc1 $f5 fp_d2+4 - lwc1 $f6 fp_d1 - lwc1 $f7 fp_d1+4 - movf.d $f4 $f2 0 - movf.d $f6 $f4 7 - c.eq.d $f2 $f4 - bc1f fail - c.eq.d $f2 $f6 - bc1f fail - - .data -movf.s_:.asciiz "Testing MOVF.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movf.s_ - syscall - - li $2 0xfe000000 - ctc1 $2 $31 # clear cc0, set others - - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s2 - lwc1 $f6 fp_s1 - movf.s $f4 $f2 0 - movf.s $f6 $f4 7 - c.eq.s $f2 $f4 - bc1f fail - c.eq.s $f2 $f6 - bc1f fail - - .data -movn.d_:.asciiz "Testing MOVN.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movn.d_ - syscall - - li $2 2 - lw $4 fp_d1 - lw $5 fp_d1+4 - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - movn.d $f2 $f0 $2 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $6 $4 fail - bne $7 $5 fail - - lwc1 $f0 fp_d1p5 - lwc1 $f1 fp_d1p5+4 - movn.d $f2 $f0 $0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $6 $4 fail - bne $7 $5 fail - - - .data -movn.s_:.asciiz "Testing MOVN.s\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movn.s_ - syscall - - li $2 2 - lw $4 fp_s1 - lwc1 $f0 fp_s1 - movn.s $f2 $f0 $2 - mfc1 $6 $f2 - bne $6 $4 fail - - lwc1 $f0 fp_s1p5 - movn.s $f2 $f0 $0 - mfc1 $6 $f2 - bne $6 $4 fail - - - .data -movt.d_:.asciiz "Testing MOVT.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movt.d_ - syscall - - li $2 0xfe000000 - ctc1 $2 $31 # clear cc0, set others - - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - lwc1 $f4 fp_d2 - lwc1 $f5 fp_d2+4 - lwc1 $f6 fp_d1 - lwc1 $f7 fp_d1+4 - movt.d $f4 $f2 0 - movt.d $f6 $f4 7 - c.eq.d $f2 $f4 - bc1t fail - c.eq.d $f2 $f6 - bc1t fail - - .data -movt.s_:.asciiz "Testing MOVT.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movt.s_ - syscall - - li $2 0xfe000000 - ctc1 $2 $31 # clear cc0, set others - - lwc1 $f2 fp_s1 - lwc1 $f4 fp_s2 - lwc1 $f6 fp_s1 - movt.s $f4 $f2 0 - movt.s $f6 $f4 7 - c.eq.s $f2 $f4 - bc1t fail - c.eq.s $f2 $f6 - bc1t fail - - - .data -movz.d_:.asciiz "Testing MOVZ.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movz.d_ - syscall - - li $2 2 - lw $4 fp_d1 - lw $5 fp_d1+4 - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - movz.d $f2 $f0 $0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $6 $4 fail - bne $7 $5 fail - - lwc1 $f0 fp_d1p5 - lwc1 $f1 fp_d1p5+4 - movz.d $f2 $f0 $2 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $6 $4 fail - bne $7 $5 fail - - - .data -movz.s_:.asciiz "Testing MOVZ.s\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 movz.s_ - syscall - - li $2 2 - lw $4 fp_s1 - lwc1 $f0 fp_s1 - movz.s $f2 $f0 $0 - mfc1 $6 $f2 - bne $6 $4 fail - - lwc1 $f0 fp_s1p5 - movz.s $f2 $f0 $2 - mfc1 $6 $f2 - bne $6 $4 fail - - -# MTC1 tested previously - - .data -mul.s_: .asciiz "Testing MUL.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mul.s_ - syscall - - lw $4 fp_s1 - lwc1 $f0 fp_s1 - mul.s $f2 $f0 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_s3 - lwc1 $f0 fp_s1p5 - lwc1 $f2 fp_s2 - mul.s $f4 $f0 $f2 - mfc1 $6 $f4 - bne $4 $6 fail - - - .data -mul.d_: .asciiz "Testing MUL.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 mul.d_ - syscall - - lw $4 fp_d1 - lw $5 fp_d1+4 - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - mul.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d3 - lw $5 fp_d3+4 - lwc1 $f0 fp_d1p5 - lwc1 $f1 fp_d1p5+4 - lwc1 $f2 fp_d2 - lwc1 $f3 fp_d2+4 - mul.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - - - .data -neg.s_: .asciiz "Testing NEG.S\n" -fp_sm3: .float -3.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 neg.s_ - syscall - - lw $4 fp_sm1 - lwc1 $f0 fp_s1 - neg.s $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_s3 - lwc1 $f0 fp_sm3 - neg.s $f2 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - - .data -neg.d_: .asciiz "Testing NEG.D\n" -fp_dm3: .double -3.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 neg.d_ - syscall - - lw $4 fp_dm1 - lw $5 fp_dm1+4 - lwc1 $f0 fp_d1 - lwc1 $f1 fp_d1+4 - neg.d $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d3 - lw $5 fp_d3+4 - lwc1 $f0 fp_dm3 - lwc1 $f1 fp_dm3+4 - neg.d $f4 $f0 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - - - .data -round.w.d_: .asciiz "Testing ROUND.W.D\n" -fp_d1p6:.double 1.6 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 round.w.d_ - syscall - - lwc1 $f2 fp_d0 - lwc1 $f3 fp_d0+4 - round.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - round.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_d1p6 - lwc1 $f3 fp_d1p6+4 - round.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 2 fail - - - .data -round.w.s_: .asciiz "Testing ROUND.W.S\n" -fp_s1p6:.float 1.6 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 round.w.s_ - syscall - - lwc1 $f2 fp_s0 - round.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_s1 - round.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_s1p6 - round.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 2 fail - - - .data -sqrt.d_:.asciiz "Testing SQRT.D\n" -fp_d9: .double 9.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sqrt.d_ - syscall - - ldc1 $f2 fp_d9 - sqrt.d $f0 $f2 - mul.d $f4 $f0 $f0 - c.eq.d $f2 $f4 - bc1f 0 fail - - - .data -sqrt.s_:.asciiz "Testing SQRT.S\n" -fp_s9: .float 9.0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sqrt.s_ - syscall - - ldc1 $f2 fp_s9 - sqrt.s $f0 $f2 - mul.s $f4 $f0 $f0 - c.eq.s $f2 $f4 - bc1f 0 fail - - - .data -sub.s_: .asciiz "Testing SUB.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sub.s_ - syscall - - lw $4 fp_s0 - lwc1 $f0 fp_s0 - sub.s $f2 $f0 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 fp_sm1 - lw $5 fp_s1 - lwc1 $f0 fp_s0 - lwc1 $f2 fp_s1 - sub.s $f4 $f0 $f2 - mfc1 $6 $f4 - bne $4 $6 fail - sub.s $f4 $f2 $f0 - mfc1 $6 $f4 - bne $5 $6 fail - - lw $4 fp_s1p5 - lwc1 $f0 fp_s1p5 - lwc1 $f2 fp_s3 - sub.s $f4 $f2 $f0 - mfc1 $6 $f4 - bne $4 $6 fail - - - .data -sub.d_: .asciiz "Testing SUB.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sub.d_ - syscall - - lw $4 fp_d0 - lw $5 fp_d0+4 - lwc1 $f0 fp_d0 - lwc1 $f1 fp_d0+4 - sub.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_dm1 - lw $5 fp_dm1+4 - lwc1 $f0 fp_d0 - lwc1 $f1 fp_d0+4 - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - sub.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - lw $4 fp_d1 - lw $5 fp_d1+4 - sub.d $f4 $f2 $f0 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - - lw $4 fp_d1p5 - lw $5 fp_d1p5+4 - lwc1 $f0 fp_d1p5 - lwc1 $f1 fp_d1p5+4 - lwc1 $f2 fp_d3 - lwc1 $f3 fp_d3+4 - sub.d $f4 $f2 $f0 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - bne $5 $7 fail - - - .data -trunc.w.d_: .asciiz "Testing TRUNC.W.D\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 trunc.w.d_ - syscall - - lwc1 $f2 fp_d0 - lwc1 $f3 fp_d0+4 - trunc.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_d1 - lwc1 $f3 fp_d1+4 - trunc.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_d1p6 - lwc1 $f3 fp_d1p6+4 - trunc.w.d $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - - .data -trunc.w.s_: .asciiz "Testing TRUNC.W.S\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 trunc.w.s_ - syscall - - lwc1 $f2 fp_s0 - trunc.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 0 fail - - lwc1 $f2 fp_s1 - trunc.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - lwc1 $f2 fp_s1p6 - trunc.w.s $f0 $f2 - mfc1 $6 $f0 - bne $6 1 fail - - -# -# Testing Pseudo Ops -# - - .data -abs_: .asciiz "Testing ABS\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 abs_ - syscall - - li $2 1 - abs $3 $2 - bne $3 1 fail - - li $2 -1 - abs $2 $2 - bne $2 1 fail - - li $2 0 - abs $2 $2 - bne $2 0 fail - - - .data -b_: .asciiz "Testing B\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 b_ - syscall - - - b l101 - b fail -l101: - - - .data -bal_: .asciiz "Testing BAL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bal_ - syscall - - bal l102 -l103: j l104 -l102: la $4 l103 - bne $31 $4 fail - jr $31 -l104: - - - .data -beqz_: .asciiz "Testing BEQZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 beqz_ - syscall - - beqz $0 l105 - j fail -l105: li $2 1 - beqz $2 fail - - - .data -bge_: .asciiz "Testing BGE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bge_ - syscall - - bge $0 $0 l106 - j fail -l106: li $2 1 - bge $0 $2 fail - bge $2 $0 l107 - j fail -l107: li $3 -1 - bge $3 $2 fail - bge $2 $3 l108 - j fail -l108: - - bge $0 0 l109 - j fail -l109: li $2 1 - bge $0 1 fail - bge $2 0 l110 - j fail -l110: li $3 -1 - bge $3 1 fail - bge $2 -1 l111 - j fail -l111: - - - .data -bgeu_: .asciiz "Testing BGEU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgeu_ - syscall - - bgeu $0 $0 l112 - j fail -l112: li $2 1 - bgeu $0 $2 fail - bgeu $2 $0 l113 - j fail -l113: li $3 -1 - bgeu $2 $3 fail - bgeu $3 $2 l114 - j fail -l114: - - bgeu $0 0 l115 - j fail -l115: li $2 1 - bgeu $0 1 fail - bgeu $2 0 l116 - j fail -l116: li $3 -1 - bgeu $2 -1 fail - bgeu $3 1 l117 - j fail -l117: - - - .data -bgt_: .asciiz "Testing BGT\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgt_ - syscall - - bgt $0 $0 fail -l120: li $2 1 - bgt $0 $2 fail - bgt $2 $0 l121 - j fail -l121: li $3 -1 - bgt $3 $2 fail - bgt $2 $3 l122 - j fail -l122: - - bgt $0 0 fail -l123: li $2 1 - bgt $0 1 fail - bgt $2 0 l124 - j fail -l124: li $3 -1 - bgt $3 1 fail - bgt $2 -1 l125 - j fail -l125: - - - .data -bgtu_: .asciiz "Testing BGTU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bgtu_ - syscall - - bgtu $0 $0 fail -l132: li $2 1 - bgtu $0 $2 fail - bgtu $2 $0 l133 - j fail -l133: li $3 -1 - bgtu $2 $3 fail - bgtu $3 $2 l134 - j fail -l134: - - bgtu $0 0 fail -l135: li $2 1 - bgtu $0 1 fail - bgtu $2 0 l136 - j fail -l136: li $3 -1 - bgtu $2 -1 fail - bgtu $3 1 l137 - j fail -l137: - - - .data -ble_: .asciiz "Testing BLE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ble_ - syscall - - ble $0 $0 l140 - j fail -l140: li $2 1 - ble $2 $0 fail - ble $0 $2 l141 - j fail -l141: li $3 -1 - ble $2 $3 fail - ble $3 $2 l142 - j fail -l142: - - ble $0 0 l143 - j fail -l143: li $2 1 - ble $2 0 fail - ble $0 1 l144 - j fail -l144: li $3 -1 - ble $2 -1 fail - ble $3 1 l145 - j fail -l145: - - - .data -bleu_: .asciiz "Testing BLEU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bleu_ - syscall - - bleu $0 $0 l152 - j fail -l152: li $2 1 - bleu $2 $0 fail - bleu $0 $2 l153 - j fail -l153: li $3 -1 - bleu $3 $2 fail - bleu $2 $3 l154 - j fail -l154: - - bleu $0 0 l155 - j fail -l155: li $2 1 - bleu $2 0 fail - bleu $0 1 l156 - j fail -l156: li $3 -1 - bleu $3 1 fail - bleu $2 -1 l157 - j fail -l157: - - - .data -blt_: .asciiz "Testing BLT\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 blt_ - syscall - - blt $0 $0 fail -l160: li $2 1 - blt $2 $0 fail - blt $0 $2 l161 - j fail -l161: li $3 -1 - blt $2 $3 fail - blt $3 $2 l162 - j fail -l162: - - blt $0 0 fail -l163: li $2 1 - blt $2 0 fail - blt $0 1 l164 - j fail -l164: li $3 -1 - blt $2 -1 fail - blt $3 1 l165 - j fail -l165: - - - .data -bltu_: .asciiz "Testing BLTU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bltu_ - syscall - - bltu $0 $0 fail -l172: li $2 1 - bltu $2 $0 fail - bltu $0 $2 l173 - j fail -l173: li $3 -1 - bltu $3 $2 fail - bltu $2 $3 l174 - j fail -l174: - - bltu $0 0 fail -l175: li $2 1 - bltu $2 0 fail - bltu $0 1 l176 - j fail -l176: li $3 -1 - bltu $3 1 fail - bltu $2 -1 l177 - j fail -l177: - - - .data -bnez_: .asciiz "Testing BNEZ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 bnez_ - syscall - - bnez $0 fail - li $2 1 - bnez $2 l180 - j fail -l180: - - -# DIV and DIVU checked previously - - -# LA better work or nothing above will work - - - .data -li_: .asciiz "Testing LI\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 li_ - syscall - - li $2 0xfffffff - bne $2 0xfffffff fail - li $2 0xffffffe - bne $2 0xffffffe fail - li $2 0 - bnez $2 fail - li $2 0x7fffffff - bne $2 0x7fffffff fail - li $2 32767 - bne $2 32767 fail - li $2 32768 - bne $2 32768 fail - li $2 65535 - bne $2 65535 fail - li $2 65536 - bne $2 65536 fail - - - .data -li.d_: .asciiz "Testing LI.d\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 li.d_ - syscall - - li.d $f0 1.0 - mfc1 $2, $f0 - mfc1 $3, $f1 - lw $4, fp_d1 - lw $5, fp_d1+4 - bne $2 $4 fail - bne $3 $5 fail - - li.d $f0 -1.0 - mfc1 $2, $f0 - mfc1 $3, $f1 - lw $4, fp_dm1 - lw $5, fp_dm1+4 - bne $2 $4 fail - bne $3 $5 fail - - - .data -li.s_: .asciiz "Testing LI.s\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 li.s_ - syscall - - li.s $f0 1.0 - mfc1 $2, $f0 - lw $3, fp_s1 - bne $2 $3 fail - - li.s $f0 -1.0 - mfc1 $2, $f0 - lw $3, fp_sm1 - bne $2 $3 fail - - - .data -move_: .asciiz "Testing MOVE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 move_ - syscall - - li $2 0xfffffff - move $3 $2 - bne $2 $3 fail - - -# MUL and MULO and MULOU were tested previously - - - .data -neg_: .asciiz "Testing NEG\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 neg_ - syscall - - li $2 -101 - neg $3 $2 - bne $3 101 fail - li $2 101 - neg $2 $2 - bne $2 -101 fail - neg $2 $0 - bne $2 0 fail - - - .data -negu_: .asciiz "Testing NEGU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 negu_ - syscall - - li $2 -101 - negu $3 $2 - bne $3 101 fail - li $2 101 - negu $2 $2 - bne $2 -101 fail - negu $2 $0 - bne $2 0 fail - - - .data -nop_: .asciiz "Testing NOP\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 nop_ - syscall - - nop # How do we test it?? - - - .data -not_: .asciiz "Testing NOT\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 not_ - syscall - - not $2 $0 - bne $2 0xffffffff fail - li $2 0 - not $3 $2 - bne $3 0xffffffff fail - li $2 0xffffffff - not $3 $2 - bne $3 0 fail - - - .data -rem_: .asciiz "Testing REM\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 rem_ - syscall - - li $2 5 - li $3 2 - li $4 -2 - - rem $5 $2 $3 - bne $5 1 fail - - rem $5 $2 $4 - bne $5 1 fail - - .data -remu_: .asciiz "Testing REMU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 remu_ - syscall - - li $2 5 - li $3 2 - li $4 -2 - - remu $5 $2 $3 - bne $5 1 fail - - remu $5 $2 $4 - bne $5 5 fail - - - .data -rol_: .asciiz "Testing ROL\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 rol_ - syscall - li $2 5 - li $3 5 - rol $4 $2 $3 - bne $4 0xa0 fail - li $2 5 - li $3 -5 - rol $4 $2 $3 - bne $4 0x28000000 fail - li $2 5 - rol $4 $2 5 - bne $4 0xa0 fail - - - .data -ror_: .asciiz "Testing ROR\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ror_ - syscall - li $2 5 - li $3 5 - ror $4 $2 $3 - bne $4 0x28000000 fail - li $2 5 - li $3 -5 - ror $4 $2 $3 - bne $4 0xa0 fail - li $2 5 - ror $4 $2 5 - bne $4 0x28000000 fail - - - .data -seq_: .asciiz "Testing SEQ\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 seq_ - syscall - - li $2 -1 - li $3 1 - - seq $4 $0 $0 - beqz $4 fail - seq $4 $2 $3 - bnez $4 fail - - seq $4 $0 0 - beqz $4 fail - seq $4 $3 2 - bnez $4 fail - - - .data -sge_: .asciiz "Testing SGE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sge_ - syscall - - sge $4 $0 $0 - beqz $4 fail - li $2 1 - sge $4 $0 $2 - bnez $4 fail - sge $4 $2 $0 - beqz $4 fail - li $2 -1 - sge $4 $0 $2 - beqz $4 fail - sge $4 $2 $0 - bnez $4 fail - - li $2 1 - sge $2 $0 $2 - bnez $2 fail - li $2 1 - sge $2 $2 $0 - beqz $2 fail - li $2 -1 - sge $2 $0 $2 - beqz $2 fail - li $2 -1 - sge $2 $2 $0 - bnez $2 fail - - sge $4 $0 0 - beqz $4 fail - li $2 1 - sge $4 $0 1 - bnez $4 fail - sge $4 $2 0 - beqz $4 fail - li $2 -1 - sge $4 $0 -1 - beqz $4 fail - sge $4 $2 0 - bnez $4 fail - - - .data -sgeu_: .asciiz "Testing SGEU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sgeu_ - syscall - - sgeu $4 $0 $0 - beqz $4 fail - li $2 1 - sgeu $4 $0 $2 - bnez $4 fail - sgeu $4 $2 $0 - beqz $4 fail - li $2 -1 - sgeu $4 $0 $2 - bnez $4 fail - sgeu $4 $2 $0 - beqz $4 fail - - sgeu $4 $0 0 - beqz $4 fail - li $2 1 - sgeu $4 $0 1 - bnez $4 fail - sgeu $4 $2 0 - beqz $4 fail - li $2 -1 - sgeu $4 $0 -1 - bnez $4 fail - sgeu $4 $2 0 - beqz $4 fail - - - .data -sgt_: .asciiz "Testing SGT\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sgt_ - syscall - - sgt $4 $0 $0 - bnez $4 fail - li $2 1 - sgt $4 $0 $2 - bnez $4 fail - sgt $4 $2 $0 - beqz $4 fail - li $2 -1 - sgt $4 $0 $2 - beqz $4 fail - sgt $4 $2 $0 - bnez $4 fail - - sgt $4 $0 0 - bnez $4 fail - sgt $4 $0 1 - bnez $4 fail - li $2 1 - sgt $4 $2 0 - beqz $4 fail - sgt $4 $0 -1 - beqz $4 fail - li $2 -1 - sgt $4 $2 0 - bnez $4 fail - - .data -sgtu_: .asciiz "Testing SGTU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sgtu_ - syscall - - sgtu $4 $0 $0 - bnez $4 fail - li $2 1 - sgtu $4 $0 $2 - bnez $4 fail - sgtu $4 $2 $0 - beqz $4 fail - li $2 -1 - sgtu $4 $0 $2 - bnez $4 fail - sgtu $4 $2 $0 - beqz $4 fail - - sgtu $4 $0 0 - bnez $4 fail - sgtu $4 $0 1 - bnez $4 fail - li $2 1 - sgtu $4 $2 0 - beqz $4 fail - sgtu $4 $0 -1 - bnez $4 fail - li $2 -1 - sgtu $4 $2 0 - beqz $4 fail - - - .data -sle_: .asciiz "Testing SLE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sle_ - syscall - - sle $4 $0 $0 - beqz $4 fail - li $2 1 - sle $4 $0 $2 - beqz $4 fail - sle $4 $2 $0 - bnez $4 fail - li $2 -1 - sle $4 $0 $2 - bnez $4 fail - sle $4 $2 $0 - beqz $4 fail - - li $2 1 - sle $2 $0 $2 - beqz $2 fail - li $2 1 - sle $2 $2 $0 - bnez $2 fail - li $2 -1 - sle $2 $0 $2 - bnez $2 fail - li $2 -1 - sle $2 $2 $0 - beqz $2 fail - - sle $4 $0 0 - beqz $4 fail - li $2 1 - sle $4 $0 1 - beqz $4 fail - sle $4 $2 0 - bnez $4 fail - li $2 -1 - sle $4 $0 -1 - bnez $4 fail - sle $4 $2 0 - beqz $4 fail - - - .data -sleu_: .asciiz "Testing SLEU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sleu_ - syscall - - sleu $4 $0 $0 - beqz $4 fail - li $2 1 - sleu $4 $0 $2 - beqz $4 fail - sleu $4 $2 $0 - bnez $4 fail - li $2 -1 - sleu $4 $0 $2 - beqz $4 fail - sleu $4 $2 $0 - bnez $4 fail - - sleu $4 $0 0 - beqz $4 fail - li $2 1 - sleu $4 $0 1 - beqz $4 fail - sleu $4 $2 0 - bnez $4 fail - li $2 -1 - sleu $4 $0 -1 - beqz $4 fail - sleu $4 $2 0 - bnez $4 fail - - - .data -sne_: .asciiz "Testing SNE\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sne_ - syscall - - li $2 -1 - li $3 1 - - sne $4 $0 $0 - bnez $4 fail - sne $4 $2 $3 - beqz $4 fail - - sne $4 $0 0 - bnez $4 fail - sne $4 $3 2 - beqz $4 fail - - -# ULH is endian-specific - - -# ULHU is endian-specific - - -# ULW is endian-specific - - -# USH is endian-specific - - -# USW is endian-specific - - -# .WORD is endian-specific - - -OK: - - -# Done !!! - .data -sm: .asciiz "\nPassed all tests\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sm - syscall - lw $31 saved_ret_pc - jr $31 # Return from main - - - .data -fm: .asciiz "Failed test\n" - .text -fail: li $v0 4 # syscall 4 (print_str) - la $a0 fm - syscall - li $v0, 10 # syscall 10 (exit) - syscall - - - .text 0x408000 -far_away: - beq $0, $0, come_back diff --git a/spim-qtbase/Tests/tt.dir.s b/spim-qtbase/Tests/tt.dir.s deleted file mode 100644 index 592745f..0000000 --- a/spim-qtbase/Tests/tt.dir.s +++ /dev/null @@ -1,167 +0,0 @@ -# SPIM S20 MIPS simulator. -# A torture test for the SPIM simulator. -# Test assembler directives. -# -# Copyright (c) 2021, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - - - .data -saved_ret_pc: .word 0 # Holds PC to return from main -m1: .asciiz "Tests 1\n" - .data - .align 2 -l1: .byte 0xff -l2: .half 0xffff -l3: .word 0xffff -l4: .float 1.0 -l5: .double 1.0 - -m2: .asciiz "Tests 2\n" - .data - .align 2 -l12: .byte 0xff -l22: .half 0xffff - .byte 0xff -l32: .word 0xffff - .byte 0xff -l42: .float 1.0 - .byte 0xff -l52: .double 1.0 - -m3: .asciiz "Tests 3\n" - .data - .align 0 -l13: .byte 0xff -l23: .half 0xffff -l33: .word 0xffff -l43: .float 1.0 -l53: .double 1.0 - - .text - .globl main -main: - sw $31 saved_ret_pc - - - li $v0 4 # syscall 4 (print_str) - la $a0 m1 - syscall - - la $t0 l1 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l2 - and $t0 $t0 0x3 - bne $t0 0x2 fail - - la $t0 l3 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l4 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l5 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - - li $v0 4 # syscall 4 (print_str) - la $a0 m2 - syscall - - la $t0 l12 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l22 - and $t0 $t0 0x3 - bne $t0 0x2 fail - - la $t0 l32 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l42 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l52 - and $t0 $t0 0x7 - bne $t0 0x0 fail - - -li $v0 4 # syscall 4 (print_str) - la $a0 m3 - syscall - - la $t0 l13 - and $t0 $t0 0x3 - bne $t0 0x1 fail - - la $t0 l23 - and $t0 $t0 0x3 - bne $t0 0x2 fail - - la $t0 l33 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l43 - and $t0 $t0 0x3 - bne $t0 0x0 fail - - la $t0 l53 - and $t0 $t0 0x3 - bne $t0 0x0 fail - -# Done !!! - .data -sm: .asciiz "\nPassed all tests\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sm - syscall - lw $31 saved_ret_pc - jr $31 # Return from main - - - .data -fm: .asciiz "Failed test\n" - .text -fail: li $v0 4 # syscall 4 (print_str) - la $a0 fm - syscall - li $v0, 10 # syscall 10 (exit) - syscall - diff --git a/spim-qtbase/Tests/tt.fpu.bare.s b/spim-qtbase/Tests/tt.fpu.bare.s deleted file mode 100755 index b5de6a9..0000000 --- a/spim-qtbase/Tests/tt.fpu.bare.s +++ /dev/null @@ -1,2239 +0,0 @@ -# SPIM S20 MIPS simulator. -# A torture test for the FPU instructions in the bare SPIM simulator. -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - -# Adapted by Anne Rogers from tt.le.s. -# Run -bare -notrap. - - -# Test floating point instructions. Warning: This code is not relocatable. -# New data statements should be added after "Testing C.UN.S\n". - - .data -saved_ret_pc: .word 0 # Holds PC to return from main -sm: .asciiz "Failed " -pt: .asciiz "Passed all tests\n" - - .text -# Standard startup code. Invoke the routine main with no arguments. - .globl __start -__start: jal main - addu $0 $0 $0 # Nop - addiu $2 $0 10 - syscall # syscall 10 (exit) - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - - .globl main -main: - lui $4 0x1000 - sw $31 0($4) - - - .data -abs.s_:.asciiz "Testing ABS.S\n" -fp_s100:.float 100.0 -fp_sm100:.float -100.0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 abs.s_ - lui $a0, 0x1000 - ori $a0 $a0 0x1f - syscall - - lui $2 0x1000 - ori $2 $2 0x30 - lwc1 $f0 0($2) - addu $0 $0 $0 - lw $4 0($2) - addu $0 $0 $0 - mfc1 $5 $f0 - addu $0 $0 $0 - bne $5 $4 fail - addu $0 $0 $0 - abs.s $f2 $f0 - mfc1 $5 $f2 - addu $0 $0 $0 #Nop - bne $4 $5 fail - - lwc1 $f0 4($2) - abs.s $f2 $f0 - mfc1 $5 $f2 - addu $0 $0 $0 #Nop - bne $4 $5 fail - addu $0 $0 $0 #Nop - - .data -abs.d_:.asciiz "Testing ABS.D\n" -fp_d100:.double 100.0 -fp_dm100:.double -100.0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 abs.d_ - lui $a0, 0x1000 - ori $a0 $a0 0x38 - syscall - -# la $2 fp_d100 - lui $2, 0x1000 - ori $2 $2 0x48 - lw $4 0($2) - lw $5 4($2) - lwc1 $f0 0($2) - lwc1 $f1 4($2) - addu $0 $0 $0 #Nop - abs.d $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 #Nop - bne $4 $6 fail - addu $0 $0 $0 #Nop - bne $5 $7 fail - - lwc1 $f0 8($2) - lwc1 $f1 12($2) - addu $0 $0 $0 #Nop - abs.d $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 #Nop - bne $4 $6 fail - addu $0 $0 $0 #Nop - bne $5 $7 fail - - - .data -add.s_: .asciiz "Testing ADD.S\n" -fp_s0: .float 0.0 -fp_s1: .float 1.0 -fp_sm1: .float -1.0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 add.s_ - lui $a0 0x1000 - ori $a0 $a0 0x58 - syscall - - lui $2, 0x1000 - ori $2 $2 0x68 - lw $4 0($2) - lwc1 $f0 0($2) - addu $0 $0 $0 # Nop - add.s $f2 $f0 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - lw $4 4($2) - lwc1 $f0 0($2) - lwc1 $f2 4($2) - addu $0 $0 $0 # Nop - add.s $f4 $f0 $f2 - mfc1 $6 $f4 - addu $0 $0 $0 # Nop - bne $4 $6 fail - - lw $4 0($2) - lwc1 $f0 4($2) - lwc1 $f2 8($2) - addu $0 $0 $0 # Nop - add.s $f4 $f0 $f2 - mfc1 $6 $f4 - addu $0 $0 $0 # Nop - bne $4 $6 fail - - .data -add.d_: .asciiz "Testing ADD.D\n" -fp_d0: .double 0.0 -fp_d1: .double 1.0 -fp_dm1: .double -1.0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 add.d_ - lui $a0 0x1000 - ori $a0 $a0 0x74 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lw $4 0($1) - lw $5 4($1) - lwc1 $f0 0($1) - lwc1 $f1 4($1) - addu $0 $0 $0 # Nop - add.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - - lw $4 8($1) - lw $5 12($1) - lwc1 $f0 0($1) - lwc1 $f1 4($1) - lwc1 $f2 8($1) - lwc1 $f3 12($1) - addu $0 $0 $0 # Nop - add.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - - lw $4 0($1) - lw $5 4($1) - lwc1 $f0 8($1) - lwc1 $f1 12($1) - lwc1 $f2 16($1) - lwc1 $f3 20($1) - addu $0 $0 $0 # Nop - add.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - .data -cvt.d.s_: .asciiz "Testing CVT.D.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 cvt.d.s_ - lui $a0 0x1000 - ori $a0 $a0 0xa0 - syscall - - - lui $1 0x1000 - ori $1 $1 0x88 - lw $4 0($1) #fp_d0 - lw $5 4($1) #fp_d0+4 - lui $2, 0x1000 - ori $2 $2 0x68 - lwc1 $f0 0($2) #fp_s0 - addu $0 $0 $0 # Nop - cvt.d.s $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lw $4 8($1) # fp_d1 - lw $5 12($1) # fp_d1+4 - lwc1 $f0 4($2) # fp_s1 - addu $0 $0 $0 # Nop - cvt.d.s $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lw $4 16($1) # fp_dm1 - lw $5 20($1) # fp_dm1+4 - lwc1 $f0 8($2) # fp_sm1 - addu $0 $0 $0 # Nop - cvt.d.s $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - .data -cvt.d.w_: .asciiz "Testing CVT.D.W\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 cvt.d.w_ - lui $a0 0x1000 - ori $a0 $a0 0xb1 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lw $4 0($1) # fp_d0 - lw $5 4($1) # fp_d0+4 - mtc1 $0 $0 - addu $0 $0 $0 # Nop - cvt.d.w $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lw $4 8($1) # fp_d1 - lw $5 12 ($1) # fp_d1+4 - addi $9 $0 1 - mtc1 $9 $0 - addu $0 $0 $0 # Nop - cvt.d.w $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lw $4 16($1) # fp_dm1 - lw $5 20($1) # fp_dm1+4 - addi $9 $0 -1 - mtc1 $9 $0 - addu $0 $0 $0 # Nop - cvt.d.w $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - .data -cvt.s.d_: .asciiz "Testing CVT.S.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 cvt.s.d_ - lui $a0 0x1000 - ori $a0 $a0 0xc2 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lw $4 0($1) # fp_s0 - lui $2 0x1000 - ori $2 $2 0x88 - lwc1 $f0 0($2) # fp_d0 - lwc1 $f1 4($2) # fp_d0+4 - addu $0 $0 $0 #Nop - cvt.s.d $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 - bne $4 $6 fail - addu $0 $0 $0 - - lw $4 4($1) # fp_s1 - lwc1 $f0 8($2) # fp_d1 - lwc1 $f1 12($2) # fp_d1+4 - addu $0 $0 $0 #Nop - cvt.s.d $f2 $f0 - addu $0 $0 $0 - mfc1 $6 $f2 - addu $0 $0 $0 - bne $4 $6 fail - addu $0 $0 $0 - - lw $4 8($1) # fp_sm1 - lwc1 $f0 16($2) # fp_dm1 - lwc1 $f1 20 ($2) # fp_dm1+4 - addu $0 $0 $0 #Nop - cvt.s.d $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 - bne $4 $6 fail - addu $0 $0 $0 - - - .data -cvt.s.w_: .asciiz "Testing CVT.S.W\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 cvt.s.w_ - lui $a0 0x1000 - ori $a0 $a0 0xd3 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lw $4 0($1) # fp_s0 - mtc1 $0 $0 - cvt.s.w $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 - bne $4 $6 fail - addu $0 $0 $0 - - lw $4 4($1) # fp_s1 - addi $9 $0 1 - mtc1 $9 $0 - cvt.s.w $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 - bne $4 $6 fail - addu $0 $0 $0 - - lw $4 8($1) # fp_sm1 - addi $9 $0 -1 - mtc1 $9 $0 - cvt.s.w $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 - bne $4 $6 fail - addu $0 $0 $0 - - - .data -cvt.w.d_: .asciiz "Testing CVT.W.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 cvt.w.d_ - lui $a0 0x1000 - ori $a0 $a0 0xe4 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lwc1 $f0 0($1) # fp_d0 - lwc1 $f1 4($1) # fp_d0+4 - addu $0 $0 $0 # Nop - cvt.w.d $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 # Nop - bne $0 $6 fail - addu $0 $0 $0 # Nop - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - addu $0 $0 $0 # Nop - cvt.w.d $f2 $f0 - mfc1 $6 $f2 - addi $4 $0 1 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - lwc1 $f0 16($1) # fp_dm1 - lwc1 $f1 20($1) # fp_dm1+4 - addu $0 $0 $0 #Nop - cvt.w.d $f2 $f0 - mfc1 $6 $f2 - addi $4 $0 -1 - bne $4 $6 fail - addu $0 $0 $0 # Nop - - - .data -cvt.w.s_: .asciiz "Testing CVT.W.S\n" - .text -# addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 cvt.w.s_ - lui $a0 0x1000 - ori $a0 $a0 0xf5 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lwc1 $f0 0($1) # fp_s0 - addu $0 $0 $0 #Nop - cvt.w.s $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 # Nop - bne $0 $6 fail - addu $0 $0 $0 # Nop - - lwc1 $f0 4($1) # fp_s1 - addu $0 $0 $0 #Nop - cvt.w.s $f2 $f0 - mfc1 $6 $f2 - addi $4 $0 1 - bne $4 $6 fail - addu $0 $0 $0 # Nop - - lwc1 $f0 8($1) # fp_sm1 - addu $0 $0 $0 #Nop - cvt.w.s $f2 $f0 - mfc1 $6 $f2 - addi $4 $0 -1 - bne $4 $6 fail - addu $0 $0 $0 # Nop - - - .data -div.s_: .asciiz "Testing DIV.S\n" -fp_s2: .float 2.0 -fp_s3: .float 3.0 -fp_s1p5:.float 1.5 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 div.s_ - lui $a0 0x1000 - ori $a0 $a0 0x106 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lw $4 4($1) # fp_s1 - lwc1 $f0 4($1) # fp_s1 - addu $0 $0 $0 #Nop - div.s $f2 $f0 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - lui $2 0x1000 - ori $2 $2 0x118 - lw $4 8($2) # fp_s1p5 - lwc1 $f0 4($2) # fp_s3 - lwc1 $f2 0($2) # fp_s2 - addu $0 $0 $0 #Nop - div.s $f4 $f0 $f2 - mfc1 $6 $f4 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - - .data -div.d_: .asciiz "Testing DIV.D\n" -# EOS = 132...align to 138 -fp_d2: .double 2.0 -fp_d3: .double 3.0 -fp_d1p5:.double 1.5 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 div.d_ - lui $a0 0x1000 - ori $a0 $a0 0x124 - syscall - - lui $1 0x1000 - ori $1 $1 0x90 - lw $4 0($1) # fp_d1 - lw $5 4($1) # fp_d1+4 - lwc1 $f0 0($1) # fp_d1 - lwc1 $f1 4($1) # fp_d1+4 - addu $0 $0 $0 #Nop - div.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - - lui $2 0x1000 - ori $2 $2 0x138 # Nop - lw $4 16($2) # fp_d1p5 - lw $5 20($2) # fp_d1p5+4 - lwc1 $f0 8($2) # fp_d3 - lwc1 $f1 12($2) # fp_d3+4 - lwc1 $f2 0($2) # fp_d2 - lwc1 $f3 4($2) # fp_d2+4 - addu $0 $0 $0 # Nop - div.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - .data -mov.s_: .asciiz "Testing MOV.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 mov.s_ - lui $a0 0x1000 - ori $a0 $a0 0x150 - syscall - - - lui $1 0x1000 - ori $1 $1 0x68 - lw $4 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - addu $0 $0 $0 # Nop - mov.s $f4 $f2 - mov.s $f6 $f4 - mfc1 $6 $f6 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - .data -mov.d_: .asciiz "Testing MOV.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 mov.d_ - lui $a0 0x1000 - ori $a0 $a0 0x15f - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lw $4 8($1) # fp_d1 - lw $5 12($1) # fp_d1+4 - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # fp_d1+4 - addu $0 $0 $0 # Nop - mov.d $f4 $f2 - mov.d $f6 $f4 - mfc1 $6 $f6 - mfc1 $7 $f7 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - - .data -mul.s_: .asciiz "Testing MUL.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 mul.s_ - lui $a0 0x1000 - ori $a0 $a0 0x16e - - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lw $4 4($1) # fp_s1 - lwc1 $f0 4($1) # fp_s1 - addu $0 $0 $0 #Nop - mul.s $f2 $f0 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - lui $2 0x1000 - ori $2 $2 0x118 - lw $4 4($2) # fp_s3 - lwc1 $f0 8($2) # fp_s1p5 - lwc1 $f2 0($2) # fp_s2 - addu $0 $0 $0 #Nop - mul.s $f4 $f0 $f2 - mfc1 $6 $f4 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - .data -mul.d_: .asciiz "Testing MUL.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 mul.d_ - lui $a0 0x1000 - ori $a0 $a0 0x17d - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lw $4 0($1) # fp_d1 - lw $5 4($1) # fp_d1+4 - lwc1 $f0 0($1) # fp_d1 - lwc1 $f1 4($1) # fp_d1+4 - addu $0 $0 $0 #Nop - mul.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lui $2 0x1000 - ori $2 $2 0x138 # Nop - lw $4 8($2) # fp_d3 - lw $5 12($2) # fp_d3+4 - lwc1 $f0 16($2) # fp_d1p5 - lwc1 $f1 20($2) # fp_d1p5+4 - lwc1 $f2 0($2) # fp_d2 - lwc1 $f3 4($2) # fp_d2+4 - addu $0 $0 $0 #Nop - mul.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - - .data -neg.s_: .asciiz "Testing NEG.S\n" -# 0x19b..0x19c -fp_sm3: .float -3.0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 neg.s_ - lui $a0 0x1000 - ori $a0 $a0 0x18c - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lw $4 8($1) # fp_sm1 - lwc1 $f0 4($1) # fp_s1 - addu $0 $0 $0 #Nop - neg.s $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - lui $2 0x1000 - ori $2 $2 0x118 - lw $4 4($2) # fp_s3 - lui $1 0x1000 - ori $1 $1 0x19c - lwc1 $f0 0($1) # fp_sm3 - addu $0 $0 $0 #Nop - neg.s $f2 $f0 - mfc1 $6 $f2 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - .data -neg.d_: .asciiz "Testing NEG.D\n" -fp_dm3: .double -3.0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 neg.d_ - lui $a0 0x1000 - ori $a0 $a0 0x1a0 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lw $4 16($1) # fp_dm1 - lw $5 20($1) # fp_dm1+4 - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - addu $0 $0 $0 #Nop - neg.d $f2 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lui $2 0x1000 - ori $2 $2 0x138 # Nop - lw $4 8($2) # fp_d3 - lw $5 12($2) # fp_d3+4 - lui $1 0x1000 - ori $1 $1 0x1b0 - lwc1 $f0 0($1) # fp_dm3 - lwc1 $f1 4($1) # fp_dm3+4 - addu $0 $0 $0 #Nop - neg.d $f4 $f0 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - - .data -sub.s_: .asciiz "Testing SUB.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sub.s_ - lui $a0 0x1000 - ori $a0 $a0 0x1b8 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lw $4 0($1) # fp_s0 - lwc1 $f0 0($1) # fp_s0 - addu $0 $0 $0 #Nop - sub.s $f2 $f0 $f0 - mfc1 $6 $f2 - bne $4 $6 fail - - lw $4 8($1) # fp_sm1 - lw $5 4($1) # fp_s1 - lwc1 $f0 0($1) # fp_s0 - lwc1 $f2 4($1) # fp_s1 - addu $0 $0 $0 #Nop - sub.s $f4 $f0 $f2 - mfc1 $6 $f4 - addu $0 $0 $0 # Nop - bne $4 $6 fail - sub.s $f4 $f2 $f0 - mfc1 $6 $f4 - addu $0 $0 $0 # Nop - bne $5 $6 fail - addu $0 $0 $0 # Nop - - lui $2 0x1000 - ori $2 $2 0x118 - lw $4 8($2) # fp_s1p5 - lwc1 $f0 8($2) # fp_s1p5 - lwc1 $f2 4($2) # fp_s3 - addu $0 $0 $0 #Nop - sub.s $f4 $f2 $f0 - mfc1 $6 $f4 - addu $0 $0 $0 # Nop - bne $4 $6 fail - addu $0 $0 $0 # Nop - - .data -sub.d_: .asciiz "Testing SUB.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 sub.d_ - lui $a0 0x1000 - ori $a0 $a0 0x1c7 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lw $4 0($1) # fp_d0 - lw $5 4($1) # fp_d0+4 - lwc1 $f0 0($1) # fp_d0 - lwc1 $f1 4($1) # fp_d0+4 - addu $0 $0 $0 #Nop - sub.d $f2 $f0 $f0 - mfc1 $6 $f2 - mfc1 $7 $f3 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lw $4 16($1) # fp_dm1 - lw $5 20($1) # fp_dm1+4 - lwc1 $f0 0($1) # fp_d0 - lwc1 $f1 4($1) # fp_d0+4 - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # fp_d1+4 - addu $0 $0 $0 #Nop - sub.d $f4 $f0 $f2 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - lw $4 8($1) # fp_d1 - lw $5 12($1) # fp_d1+4 - sub.d $f4 $f2 $f0 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - lui $2 0x1000 - ori $2 $2 0x138 # Nop - lw $4 16($2) # fp_d1p5 - lw $5 20($2) # fp_d1p5+4 - lwc1 $f0 16($2) # fp_d1p5 - lwc1 $f1 20($2) # fp_d1p5+4 - lwc1 $f2 8($2) # fp_d3 - lwc1 $f3 12($2) # fp_d3+4 - addu $0 $0 $0 #Nop - sub.d $f4 $f2 $f0 - mfc1 $6 $f4 - mfc1 $7 $f5 - bne $4 $6 fail - addu $0 $0 $0 # Nop - bne $5 $7 fail - addu $0 $0 $0 # Nop - - - .data -c.eq.d_: .asciiz "Testing C.EQ.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.eq.d_ - lui $a0 0x1000 - ori $a0 $a0 0x1d6 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # fp_d1+4 - lui $2 0x1000 - ori $2 $2 0x138 - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - addu $0 $0 $0 # Nop - c.eq.d $f0 $f2 - addu $0 $0 $0 - addu $0 $0 $0 - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l200 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l200: c.eq.d $f0 $f4 - addu $0 $2 $2 - addu $0 $3 $3 - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l201 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $4 $4 # Nop Delay slot -l201: addu $0 $5 $5 - - - .data -c.eq.s_: .asciiz "Testing C.EQ.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.eq.s_ - lui $a0 0x1000 - ori $a0 $a0 0x1e6 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lui $2 0x1000 - ori $2 $2 0x118 - lwc1 $f4 8($2) # fp_s1p5 - addu $0 $0 $0 # Nop Delay slot - c.eq.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l210 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l210: c.eq.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l211 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l211: addu $0 $0 $0 # Nop Delay slot - - - - .data -c.f.d_: .asciiz "Testing C.F.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.f.d_ - lui $a0 0x1000 - ori $a0 $a0 0x1f6 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # fp_d1+4 - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - c.f.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l220 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l220: c.f.d $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l221 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l221: addu $0 $0 $0 # Nop Delay slot - - .data -c.f.s_: .asciiz "Testing C.F.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.f.s_ - lui $a0 0x1000 - ori $a0 $a0 0x205 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lwc1 $f4 8($2) # fp_s1p5 - c.f.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l230 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l230: c.f.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l231 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l231: addu $0 $0 $0 # Nop Delay slot - - - .data -c.le.d_: .asciiz "Testing C.LE.D\n" -fp_dm2: .double -2.0 - - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.le.d_ - lui $a0 0x1000 - ori $a0 $a0 0x214 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - lwc1 $f2 16($2) # fp_d1p5 - lwc1 $f3 20($2) # fp_d1p5+4 - lui $3 0x1000 - ori $3 $3 0x228 - lwc1 $f4 0($3) # fp_dm2 - lwc1 $f5 4($3) # fp_dm2+4 - c.le.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l240 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l240: c.le.d $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l241 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l241: c.le.d $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l242 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l242: c.le.d $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l243 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l243: addu $0 $0 $0 # Nop Delay slot - - - - .data -c.le.s_: .asciiz "Testing C.LE.S\n" -fp_sm2: .float -2.0 - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.le.s_ - lui $a0 0x1000 - ori $a0 $a0 0x230 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 8($2) # fp_s1p5 - lui $3 0x1000 - ori $3 $3 0x240 - lwc1 $f4 0($3) # fp_sm2 - c.le.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l250 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l250: c.le.s $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l251 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l251: c.le.s $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l252 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l252: c.le.s $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l253 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l253: addu $0 $0 $0 # Nop Delay slot - - - - - - .data -c.lt.d_: .asciiz "Testing C.LT.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.lt.d_ - lui $a0 0x1000 - ori $a0 $a0 0x244 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - lwc1 $f2 16($2) # fp_d1p5 - lwc1 $f3 20($2) # fp_d1p5+4 - lui $3 0x1000 - ori $3 $3 0x220 - lwc1 $f4 0($3) # fp_dm2 - lwc1 $f5 4($3) # fp_dm2+4 - c.lt.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l260 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l260: c.lt.d $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l261 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l261: c.lt.d $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l262 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l262: c.lt.d $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l263 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l263: - - - .data -c.lt.s_: .asciiz "Testing C.LT.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.lt.s_ - lui $a0 0x1000 - ori $a0 $a0 0x254 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 8($2) # fp_s1p5 - lui $3 0x1000 - ori $3 $3 0x240 - lwc1 $f4 0($3) # fp_sm2 - c.lt.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l270 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l270: c.lt.s $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l271 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l271: c.lt.s $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l272 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l272: c.lt.s $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l273 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l273: - - - .data -c.nge.d_: .asciiz "Testing C.NGE.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.nge.d_ - lui $a0 0x1000 - ori $a0 $a0 0x264 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - lwc1 $f2 16($2) # fp_d1p5 - lwc1 $f3 20($2) # fp_d1p5+4 - lui $3 0x1000 - ori $3 $3 0x220 - lwc1 $f4 0($3) # fp_dm2 - lwc1 $f5 4($3) # fp_dm2+4 - c.nge.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l280 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l280: c.nge.d $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l281 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l281: c.nge.d $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l282 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l282: c.nge.d $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l283 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l283: - - - .data -c.nge.s_: .asciiz "Testing C.NGE.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.nge.s_ - lui $a0 0x1000 - ori $a0 $a0 0x275 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 8($2) # fp_s1p5 - lui $3 0x1000 - ori $3 $3 0x240 - lwc1 $f4 0($3) # fp_sm2 - c.nge.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l290 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l290: c.nge.s $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l291 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l291: c.nge.s $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l292 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l292: c.nge.s $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l293 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l293: - - - .data -c.ngle.d_: .asciiz "Testing C.NGLE.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ngle.d_ - lui $a0 0x1000 - ori $a0 $a0 0x286 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # fp_d1+4 - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # fp_d1+4 - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - c.ngle.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l300: c.ngle.d $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l301: - - - .data -c.ngle.s_: .asciiz "Testing C.NGLE.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ngle.s_ - lui $a0 0x1000 - ori $a0 $a0 0x298 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lwc1 $f4 8($2) # fp_s1p5 - c.ngle.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l310: c.ngle.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l311: - - - .data -c.ngl.d_: .asciiz "Testing C.NGL.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ngl.d_ - lui $a0 0x1000 - ori $a0 $a0 0x2aa - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # Nop - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - c.ngl.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l320 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l320: c.ngl.d $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l321 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l321: - - - .data -c.ngl.s_: .asciiz "Testing C.NGL.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ngl.s_ - lui $a0 0x1000 - ori $a0 $a0 0x2bb - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lwc1 $f4 8($2) # fp_s1p5 - c.ngl.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot bc1f fail - bc1t l330 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l330: c.ngl.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l331 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l331: - - - .data -c.ngt.d_: .asciiz "Testing C.NGT.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ngt.d_ - lui $a0 0x1000 - ori $a0 $a0 0x2cc - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 16($2) # fp_d1p5 - lwc1 $f3 20($2) # fp_d1p5+4 - lui $3 0x1000 - ori $3 $3 0x220 - lwc1 $f4 0($3) # fp_dm2 - lwc1 $f5 4($3) # Nop - c.ngt.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l340 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l340: c.ngt.d $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l341 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l341: c.ngt.d $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l342 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l342: c.ngt.d $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l343 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l343: - - - .data -c.ngt.s_: .asciiz "Testing C.NGT.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ngt.s_ - lui $a0 0x1000 - ori $a0 $a0 0x2dd - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 8($2) # fp_s1p5 - lui $3 0x1000 - ori $3 $3 0x240 - lwc1 $f4 0($3) # fp_sm2 - c.ngt.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l350 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l350: c.ngt.s $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l351 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l351: c.ngt.s $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l352 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l352: c.ngt.s $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l353 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l353: - - - .data -c.ole.d_: .asciiz "Testing C.OLE.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ole.d_ - lui $a0 0x1000 - ori $a0 $a0 0x2ee - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 16($2) # fp_d1p5 - lwc1 $f3 20($2) # fp_d1p5+4 - lui $3 0x1000 - ori $3 $3 0x220 - lwc1 $f4 0($3) # fp_dm2 - lwc1 $f5 4($3) # Nop - c.ole.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l360 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l360: c.ole.d $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l361 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l361: c.ole.d $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l362 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l362: c.ole.d $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l363 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l363: - - - .data -c.ole.s_: .asciiz "Testing C.OLE.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ole.s_ - lui $a0 0x1000 - ori $a0 $a0 0x2ff - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 8($2) # fp_s1p5 - lui $3 0x1000 - ori $3 $3 0x240 - lwc1 $f4 0($3) # fp_sm2 - c.ole.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l370 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l370: c.ole.s $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l371 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l371: c.ole.s $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l372 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l372: c.ole.s $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l373 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l373: - - - .data -c.seq.d_: .asciiz "Testing C.SEQ.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.seq.d_ - lui $a0 0x1000 - ori $a0 $a0 0x310 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # Nop - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - c.seq.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l380 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l380: c.seq.d $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l381 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l381: - - - .data -c.seq.s_: .asciiz "Testing C.SEQ.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.seq.s_ - lui $a0 0x1000 - ori $a0 $a0 0x321 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lwc1 $f4 8($2) # fp_s1p5 - c.seq.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l390 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l390: c.seq.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l391 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l391: - - - .data -c.sf.d_: .asciiz "Testing C.SF.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.sf.d_ - lui $a0 0x1000 - ori $a0 $a0 0x332 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # Nop - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - c.sf.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l400: c.sf.d $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l401: - - - .data -c.sf.s_: .asciiz "Testing C.SF.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.sf.s_ - lui $a0 0x1000 - ori $a0 $a0 0x342 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lwc1 $f4 8($2) # fp_s1p5 - c.sf.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l410: c.sf.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot -l411: - - - .data -c.ueq.d_: .asciiz "Testing C.UEQ.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ueq.d_ - lui $a0 0x1000 - ori $a0 $a0 0x352 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # Nop - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - c.ueq.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l420 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l420: c.ueq.d $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l421 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l421: - - - .data -c.ueq.s_: .asciiz "Testing C.UEQ.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ueq.s_ - lui $a0 0x1000 - ori $a0 $a0 0x363 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lwc1 $f4 8($2) # fp_s1p5 - c.ueq.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l430 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l430: c.ueq.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l431 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l431: - - - .data -c.ule.d_: .asciiz "Testing C.ULE.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ule.d_ - lui $a0 0x1000 - ori $a0 $a0 0x374 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 16($2) # fp_d1p5 - lwc1 $f3 20($2) # fp_d1p5+4 - lui $3 0x1000 - ori $3 $3 0x220 - lwc1 $f4 0($3) # fp_dm2 - lwc1 $f5 4($3) # Nop - c.ule.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l440 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l440: c.ule.d $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l441 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l441: c.ule.d $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l442 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l442: c.ule.d $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l443 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l443: - - - .data -c.ule.s_: .asciiz "Testing C.ULE.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.ule.s_ - lui $a0 0x1000 - ori $a0 $a0 0x385 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 8($2) # fp_s1p5 - lui $3 0x1000 - ori $3 $3 0x240 - lwc1 $f4 0($3) # fp_sm2 - c.ule.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l450 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l450: c.ule.s $f2 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l451 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l451: c.ule.s $f0 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l452 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l452: c.ule.s $f4 $f0 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1f fail - addu $0 $0 $0 # Nop Delay slot - bc1t l453 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l453: - - - .data -c.un.d_: .asciiz "Testing C.UN.D\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.un.d_ - lui $a0 0x1000 - ori $a0 $a0 0x396 - syscall - - lui $1 0x1000 - ori $1 $1 0x88 - lui $2 0x1000 - ori $2 $2 0x138 - - lwc1 $f0 8($1) # fp_d1 - lwc1 $f1 12($1) # Nop - lwc1 $f2 8($1) # fp_d1 - lwc1 $f3 12($1) # Nop - lwc1 $f4 16($2) # fp_d1p5 - lwc1 $f5 20($2) # fp_d1p5+4 - c.un.d $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l460 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l460: c.un.d $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l461 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l461: - - - .data -c.un.s_: .asciiz "Testing C.UN.S\n" - .text - addi $v0 $0 4 # syscall 4 (print_str) -# la $a0 c.un.s_ - lui $a0 0x1000 - ori $a0 $a0 0x3a6 - syscall - - lui $1 0x1000 - ori $1 $1 0x68 - lui $2 0x1000 - ori $2 $2 0x118 - - lwc1 $f0 4($1) # fp_s1 - lwc1 $f2 4($1) # fp_s1 - lwc1 $f4 8($2) # fp_s1p5 - c.un.s $f0 $f2 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l470 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l470: c.un.s $f0 $f4 - addu $0 $0 $0 # Nop Delay slot - addu $0 $0 $0 # Nop Delay slot - bc1t fail - addu $0 $0 $0 # Nop Delay slot - bc1f l471 - addu $0 $0 $0 # Nop Delay slot - j fail - addu $0 $0 $0 # Nop Delay slot -l471: - - - -# Done !!! - .text - addi $2 $0 4 # syscall 4 (print_str) -# la $a0 pt - lui $a0, 0x1000 - ori $a0 $a0 0xd - syscall - lui $4 0x1000 - lw $31 0($4) - addu $0 $0 $0 # Nop - jr $31 # Return from main - - - - -# .data -#fm: .asciiz "Failed test\n" - .text -fail: addi $2 $0 4 # syscall 4 (print_str) -# la $a0 fm - lui $a0, 0x1000 - ori $a0 $a0 0x4 - syscall - addi $2 $0 10 # syscall 10 (exit) - syscall - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - addu $0 $0 $0 # Nop - diff --git a/spim-qtbase/Tests/tt.in b/spim-qtbase/Tests/tt.in deleted file mode 100755 index 587b092..0000000 --- a/spim-qtbase/Tests/tt.in +++ /dev/null @@ -1,6 +0,0 @@ -17 -1717 -17.18 -1700.18 -17.18e10 -1700.18e10 diff --git a/spim-qtbase/Tests/tt.io.s b/spim-qtbase/Tests/tt.io.s deleted file mode 100755 index 00166ad..0000000 --- a/spim-qtbase/Tests/tt.io.s +++ /dev/null @@ -1,209 +0,0 @@ -# SPIM S20 MIPS simulator. -# Test of memory mapped IO. -# -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - - .data -prompt: .asciiz "SPIM IO Test.\nOnly runs with -mapped_io flag.\nPlease type 6 input lines:\n" -nl: .asciiz "\n" - - .text - .globl main -main: - li $v0 4 - la $a0 prompt - syscall - - -# Register usage: -# s0 loop counter -# t0 address of recv_ctrl -# t1 address of recv_buffer -# t2 address of trans_ctrl -# t3 address of trans_buffer -# t4, t5 temporaries -# t6 char read from input -# t7 1 => char in t6 - - li $s0 3 # loop counter - - - li $t0 0xffff0000 # recv ctrl - li $t1 0xffff0004 # recv buf - li $t2 0xffff0008 # trans ctrl - li $t3 0xffff000c # trans buf - -# First, read and echo 3 lines of input by polling the IO registers, not through -# interrupts: - - mtc0 $0 $12 # Clear IE bit in Status reg to disable interrupts - -l1: - lw $t4 0($t0) # Wait for receiver ready - and $t4 $t4 1 - beq $t4 0 l1 - - lw $t6 0($t1) # Read character - -l2: - lw $t4 0($t2) # Wait for transmitter ready - and $t4 $t4 1 - beq $t4 0 l2 - - sw $t6 0($t3) # Write character - - beq $t6 0xa decr # New line (nl) - bne $t6 0xd l1 # Carriage return (cr) - -decr: - add $s0 $s0 -1 # Decrement line counter - bne $s0 0 l1 # If not zero, get another line - - -# Second, read and echo 3 lines of input by through interrupts: - - mfc0 $t4 $13 - and $t4 0xffff00ff # Clear IP bits in Cause register - mtc0 $t4 $13 - - li $s0 3 # loop counter - - li $t4 0x2 # Enable device interrupts - sw $t4 0($t0) - sw $t4 0($t2) - - mfc0 $t4 $12 # Enable interrupts and mask in Status reg - ori $t4 $t4 0xff01 - mtc0 $t4 $12 - - -l3: b l3 # Loop waiting for interrupts - - -# Trap handler. Replaces the standard SPIM handler. - - .ktext 0x80000180 - mfc0 $t4 $13 # Get ExcCode field from Cause reg - srl $t5 $t4 2 - and $t5 $t5 0x1f # ExcCode field - bne $t5 0 exception - -# An interrupt: - and $t5 $t4 0x800 # Check for IP3 (HW 1) - beq $t5 0 check_trans - -# Receiver interrupt: - lw $t5 0($t0) # Check receiver ready - and $t5 $t5 1 - beq $t5 0 no_recv_ready # Error if receiver is not ready - - lw $t6 0($t1) # Read character - li $t7 1 - - beq $t6 0xa decr2 # New line (nl) - bne $t6 0xd next # Carriage return (cr) - -decr2: - add $s0 $s0 -1 # Decrement line counter - -next: - mfc0 $t4 $13 # Get Cause register - and $t4 0xfffff7ff # Clear IP3 bit - mtc0 $t4 $13 - -check_trans: - beq $t7 0 ret_handler # No char to write yet - - and $t5 $t4 0x400 # Check for IP2 (HW 0) - beq $t5 0 check_loop - -# Transmitter interrupt: - lw $t5 0($t2) # Check transmitter ready - and $t5 $t5 1 - beq $t5 0 no_trans_ready - - sw $t6 0($t3) # Write character - li $t7 0 - - mfc0 $t4 $13 # Get Cause register - and $t4 0xfffffbff # Clear IP2 bit - mtc0 $t4 $13 - -check_loop: - bne $s0 0 ret_handler # If line counter not zero, get another line - -# Done echoing, so terminate program. - li $v0 10 - syscall # syscall 10 (exit) - -# Return from handler. -ret_handler: - mfc0 $t4 $12 # Enable interrupts and mask in Status reg - ori $t4 $t4 0xff01 - mtc0 $t4 $12 - - eret # return to interrupted instruction - - -exception: - li $v0 4 # Non-interrupt exception - la $a0 other_str # Print message and ignore - syscall - b ret_handler - -no_recv_ready: - li $v0 4 # Receiver was not ready after interrupt - la $a0 no_recv_str # Print message and ignore - syscall - b ret_handler - -bad_int: - li $v0 4 # Interrupt was not from recv or trans - la $a0 bad_int_str # Print message and ignore - syscall - b ret_handler - -no_trans_ready: - li $v0 4 # Transmitter was not ready after interrupt - la $a0 no_trans_str # Print message and ignore - syscall - b ret_handler - - .data -other_str: - .asciiz "Non-interrupt exception\n" -no_recv_str: - .asciiz "Receiver not ready\n" -no_trans_str: - .asciiz "Transmitter not ready\n" -bad_int_str: - .asciiz "Unknown interrupt\n" - diff --git a/spim-qtbase/Tests/tt.le.s b/spim-qtbase/Tests/tt.le.s deleted file mode 100755 index be5747b..0000000 --- a/spim-qtbase/Tests/tt.le.s +++ /dev/null @@ -1,546 +0,0 @@ -# SPIM S20 MIPS simulator. -# A torture test for the SPIM simulator. -# Tests for little-endian systems. -# Run in conjunction with tt.core.s -# -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - - .data -saved_ret_pc: .word 0 # Holds PC to return from main -m3: .asciiz "The next few lines should contain exception error messages\n" -m4: .asciiz "Done with exceptions\n\n" -m5: .asciiz "Expect an address error exception:\n " -m6: .asciiz "Expect two address error exceptions:\n" - .text - .globl main -main: - sw $31 saved_ret_pc - - .data -lb_: .asciiz "Testing LB\n" -lbd_: .byte 1, -1, 0, 128 -lbd1_: .word 0x76543210, 0xfedcba98 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lb_ - syscall - - la $2 lbd_ - lb $3 0($2) - bne $3 1 fail - lb $3 1($2) - bne $3 -1 fail - lb $3 2($2) - bne $3 0 fail - lb $3 3($2) - bne $3 0xffffff80 fail - - la $t0 lbd1_ - lb $t1 0($t0) - bne $t1 0x10 fail - lb $t1 1($t0) - bne $t1 0x32 fail - lb $t1 2($t0) - bne $t1 0x54 fail - lb $t1 3($t0) - bne $t1 0x76 fail - lb $t1 4($t0) - bne $t1 0xffffff98 fail - lb $t1 5($t0) - bne $t1 0xffffffba fail - lb $t1 6($t0) - bne $t1 0xffffffdc fail - lb $t1 7($t0) - bne $t1 0xfffffffe fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m5 - syscall - - li $t5 0x7fffffff - lb $3 1000($t5) - - - .data -lbu_: .asciiz "Testing LBU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lbu_ - syscall - - la $2 lbd_ - lbu $3 0($2) - bne $3 1 fail - lbu $3 1($2) - bne $3 0xff fail - lbu $3 2($2) - bne $3 0 fail - lbu $3 3($2) - bne $3 128 fail - - la $t0 lbd1_ - lbu $t1 0($t0) - bne $t1 0x10 fail - lbu $t1 1($t0) - bne $t1 0x32 fail - lbu $t1 2($t0) - bne $t1 0x54 fail - lbu $t1 3($t0) - bne $t1 0x76 fail - lbu $t1 4($t0) - bne $t1 0x98 fail - lbu $t1 5($t0) - bne $t1 0xba fail - lbu $t1 6($t0) - bne $t1 0xdc fail - lbu $t1 7($t0) - bne $t1 0xfe fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m5 - syscall - - li $t5 0x7fffffff - lbu $3 1000($t5) - - - .data -lwl_: .asciiz "Testing LWL\n" - .align 2 -lwld_: .byte 0 1 2 3 4 5 6 7 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lwl_ - syscall - - la $2 lwld_ - move $3 $0 - lwl $3 0($2) - bne $3 0 fail - move $3 $0 - lwl $3 1($2) - bne $3 0x01000000 fail - li $3 5 - lwl $3 1($2) - bne $3 0x01000005 fail - move $3 $0 - lwl $3 2($2) - bne $3 0x02010000 fail - li $3 5 - lwl $3 2($2) - bne $3 0x02010005 fail - move $3 $0 - lwl $3 3($2) - bne $3 0x03020100 fail - li $3 5 - lwl $3 3($2) - bne $3 0x03020100 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m6 - syscall - - li $t5 0x7fffffff - lwl $3 1000($t5) - lwl $3 1001($t5) - - - .data -lwr_: .asciiz "Testing LWR\n" - .align 2 -lwrd_: .byte 0 1 2 3 4 5 6 7 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 lwr_ - syscall - - la $2 lwrd_ - li $3 0x00000500 - lwr $3 0($2) - bne $3 0x3020100 fail - move $3 $0 - lwr $3 1($2) - bne $3 0x30201 fail - li $3 0x50000000 - lwr $3 1($2) - bne $3 0x50030201 fail - move $3 $0 - lwr $3 2($2) - bne $3 0x0302 fail - li $3 0x50000000 - lwr $3 2($2) - bne $3 0x50000302 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 m6 - syscall - - li $t5 0x7fffffff - lwr $3 1000($t5) - lwr $3 1001($t5) - - - .data -sb_: .asciiz "Testing SB\n" - .align 2 -sbd_: .byte 0, 0, 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sb_ - syscall - - li $3, 1 - la $2 sbd_ - sb $3 0($2) - lw $4 0($2) - bne $4 0x1 fail - li $3 2 - sb $3 1($2) - lw $4 0($2) - bne $4 0x201 fail - li $3 3 - sb $3 2($2) - lw $4 0($2) - bne $4 0x30201 fail - li $3 4 - sb $3 3($2) - lw $4 0($2) - bne $4 0x4030201 fail - - - li $v0 4 # syscall 4 (print_str) - la $a0 m5 - syscall - - li $t5 0x7fffffff - sb $3 1000($t5) - - - .data -sh_: .asciiz "Testing SH\n" -sh2_: .asciiz "Expect two address error exceptions:\n" - .align 2 -shd_: .byte 0, 0, 0, 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sh_ - syscall - - li $3, 1 - la $2 shd_ - sh $3 0($2) - lw $4 0($2) - bne $4 0x1 fail - li $3 2 - sh $3 2($2) - lw $4 0($2) - bne $4 0x20001 fail - - li $v0 4 # syscall 4 (print_str) - la $a0 sh2_ - syscall - - li $t5 0x7fffffff - sh $3 1000($t5) - sh $3 1001($t5) - - - .data -swl_: .asciiz "Testing SWL\n" - .align 2 -swld_: .word 0 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 swl_ - syscall - - la $2 swld_ - li $3 0x01000000 - swl $3 0($2) - lw $4 0($2) - bne $4 0x1 fail - - li $3 0x01020000 - swl $3 1($2) - lw $4 0($2) - bne $4 0x0102 fail - - li $3 0x01020300 - swl $3 2($2) - lw $4 0($2) - bne $4 0x010203 fail - - li $3 0x01020304 - swl $3 3($2) - lw $4 0($2) - bne $4 0x01020304 fail - - - .data -swr_: .asciiz "Testing SWR\n" - .align 2 -swrd_: .word 0 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 swr_ - syscall - - la $2 swrd_ - li $3 1 - swr $3 0($2) - lw $4 0($2) - bne $4 1 fail - - li $3 0x0102 - swr $3 1($2) - lw $4 0($2) - bne $4 0x10201 fail - - li $3 0x010203 - swr $3 2($2) - lw $4 0($2) - bne $4 0x2030201 fail - - li $3 0x01020304 - swr $3 3($2) - lw $4 0($2) - bne $4 0x4030201 fail - - - .data -ulh_: .asciiz "Testing ULH\n" -ulh1_: .byte 1 2 3 4 5 6 7 8 -ulh2_: .byte 0xff 0xff - .text - - li $v0 4 # syscall 4 (print_str) - la $a0 ulh_ - syscall - la $2 ulh1_ - ulh $3 0($2) - bne $3 0x0201 fail - ulh $3 1($2) - bne $3 0x0302 fail - ulh $3 2($2) - bne $3 0x0403 fail - ulh $3 3($2) - bne $3 0x0504 fail - ulh $3 4($2) - bne $3 0x0605 fail - la $2 ulh2_ - ulh $3 0($2) - bne $3 -1 fail - - - .data -ulhu_: .asciiz "Testing ULHU\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ulhu_ - syscall - - li $v0 4 # syscall 4 (print_str) - la $a0 ulhu_ - syscall - la $2 ulh1_ - ulhu $3 0($2) - bne $3 0x0201 fail - ulhu $3 1($2) - bne $3 0x0302 fail - ulhu $3 2($2) - bne $3 0x0403 fail - ulhu $3 3($2) - bne $3 0x0504 fail - ulhu $3 4($2) - bne $3 0x0605 fail - la $2 ulh2_ - ulhu $3 0($2) - bne $3 0xffff fail - - - .data -ulw_: .asciiz "Testing ULW\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ulw_ - syscall - - la $2 ulh1_ - ulw $3 0($2) - bne $3 0x04030201 fail - ulw $3 1($2) - bne $3 0x05040302 fail - ulw $3 2($2) - bne $3 0x06050403 fail - ulw $3 3($2) - bne $3 0x07060504 fail - - - .data -ush_: .asciiz "Testing USH\n" -ushd: .word 0 0 - .text - li $v0 4 # syscall 4 (print_str) - la $a0 ush_ - syscall - - la $2 ushd - sw $0 0($2) - sw $0 4($2) - li $3 0x01020304 - ush $3 0($2) - lw $4 0($2) - bne $4 0x0304 fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 0x01020304 - ush $3 1($2) - lw $4 0($2) - bne $4 0x030400 fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 0x01020304 - ush $3 2($2) - lw $4 0($2) - bne $4 0x03040000 fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 0x01020304 - ush $3 3($2) - lw $4 0($2) - bne $4 0x04000000 fail - lw $4 4($2) - bne $4 0x03 fail - - - .data -usw_: .asciiz "Testing USW\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 usw_ - syscall - - la $2 ushd - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 0($2) - lw $4 0($2) - bne $4 -1 fail - lw $4 4($2) - bne $4 0 fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 1($2) - lw $4 0($2) - bne $4 0xffffff00 fail - lw $4 4($2) - bne $4 0xff fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 2($2) - lw $4 0($2) - bne $4 0xffff0000 fail - lw $4 4($2) - bne $4 0xffff fail - - sw $0 0($2) - sw $0 4($2) - li $3 -1 - usw $3 3($2) - lw $4 0($2) - bne $4 0xff000000 fail - lw $4 4($2) - bne $4 0xffffff fail - - - .data -word_: .asciiz "Testing .WORD\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 word_ - syscall - - .data - .align 0 -wordd: .byte 0x1 - .word 0x2345678 - .word 0x9abcdef - .text - la $2 wordd - lwr $3 1($2) - lwl $3 4($2) - bne $3 0x2345678 fail - lwr $3 5($2) - lwl $3 8($2) - bne $3 0x9abcdef fail - - .data - .byte 0 -x: .word OK # Forward reference in unaligned data! - .text - lw $8 x - beq $8 $0 fail -OK: - - -# Done !!! - .data -sm: .asciiz "\nPassed all tests\n" - .text - li $v0 4 # syscall 4 (print_str) - la $a0 sm - syscall - lw $31 saved_ret_pc - jr $31 # Return from main - - - .data -fm: .asciiz "Failed test\n" - .text -fail: li $v0 4 # syscall 4 (print_str) - la $a0 fm - syscall - li $v0, 10 # syscall 10 (exit) - syscall diff --git a/spim-qtbase/helloworld.s b/spim-qtbase/helloworld.s deleted file mode 100644 index db91489..0000000 --- a/spim-qtbase/helloworld.s +++ /dev/null @@ -1,45 +0,0 @@ -# helloworld.s -# -# Print out "Hello World" -# -# Copyright (c) 2013, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - - .data -msg: .asciiz "Hello World" - .extern foobar 4 - - .text - .globl main -main: li $v0, 4 # syscall 4 (print_str) - la $a0, msg # argument: string - syscall # print the string - lw $t1, foobar - - jr $ra # retrun to caller diff --git a/spim-qtbase/spim.cpp b/spim-qtbase/spim.cpp deleted file mode 100755 index 3c8bd72..0000000 --- a/spim-qtbase/spim.cpp +++ /dev/null @@ -1,1277 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef WIN32 -#include -#endif -#include -#include -#include -#include -#include - - -#ifdef RS -/* This is problem on HP Snakes, which define RS in syscall.h */ -#undef RS -#endif - -#include -#include - -#ifdef _AIX -#ifndef NBBY -#define NBBY 8 -#endif -#endif - - -#ifndef WIN32 -#include -#ifdef NEED_TERMIOS -#include -#include -#else -#include -#endif -#endif - -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "parser.h" -#include "sym-tbl.h" -#include "scanner.h" -#include "parser_yacc.h" -#include "data.h" - - -/* Internal functions: */ - -static void console_to_program (); -static void console_to_spim (); -static void control_c_seen (int /*arg*/); -static void flush_to_newline (); -static int get_opt_int (); -static bool parse_spim_command (bool redo); -static void print_reg (int reg_no); -static int print_fp_reg (int reg_no); -static int print_reg_from_string (char *reg); -static void print_all_regs (int hex_flag); -static int read_assembly_command (); -static int str_prefix (char *s1, char *s2, int min_match); -static void top_level (); -static int read_token (); -static bool write_assembled_code(char* program_name); -static void dump_data_seg (bool kernel_also); -static void dump_text_seg (bool kernel_also); - - -/* Exported Variables: */ - -/* Not local, but not export so all files don't need setjmp.h */ -jmp_buf spim_top_level_env; /* For ^C */ - -bool bare_machine; /* => simulate bare machine */ -bool delayed_branches; /* => simulate delayed branches */ -bool delayed_loads; /* => simulate delayed loads */ -bool accept_pseudo_insts; /* => parse pseudo instructions */ -bool quiet; /* => no warning messages */ -bool assemble; /* => assemble, write to stdout and exit */ -char *exception_file_name = DEFAULT_EXCEPTION_HANDLER; -port message_out, console_out, console_in; -bool mapped_io; /* => activate memory-mapped IO */ -int pipe_out; -int spim_return_value; /* Value returned when spim exits */ - - -/* Local variables: */ - -/* => load standard exception handler */ -static bool load_exception_handler = true; -static int console_state_saved; -#ifdef NEED_TERMIOS -static struct sgttyb saved_console_state; -#else -static struct termios saved_console_state; -#endif -static int program_argc; -static char** program_argv; -static bool dump_user_segments = false; -static bool dump_all_segments = false; - - - -int -main (int argc, char **argv) -{ - int i; - bool assembly_file_loaded = false; - int print_usage_msg = 0; - - console_out.f = stdout; - message_out.f = stdout; - - bare_machine = false; - delayed_branches = false; - delayed_loads = false; - accept_pseudo_insts = true; - quiet = false; - assemble = false; - spim_return_value = 0; - - /* Input comes directly (not through stdio): */ - console_in.i = 0; - mapped_io = false; - - // write_startup_message (); - - if (getenv ("SPIM_EXCEPTION_HANDLER") != NULL) - exception_file_name = getenv ("SPIM_EXCEPTION_HANDLER"); - - for (i = 1; i < argc; i++) - { -#ifdef WIN32 - if (argv [i][0] == '/') { argv [i][0] = '-'; } -#endif - if (streq (argv [i], "-asm") - || streq (argv [i], "-a")) - { - bare_machine = false; - delayed_branches = false; - delayed_loads = false; - } - else if (streq (argv [i], "-bare") - || streq (argv [i], "-b")) - { - bare_machine = true; - delayed_branches = true; - delayed_loads = true; - quiet = true; - } - else if (streq (argv [i], "-delayed_branches") - || streq (argv [i], "-db")) - { - delayed_branches = true; - } - else if (streq (argv [i], "-delayed_loads") - || streq (argv [i], "-dl")) - { - delayed_loads = true; - } - else if (streq (argv [i], "-exception") - || streq (argv [i], "-e")) - { load_exception_handler = true; } - else if (streq (argv [i], "-noexception") - || streq (argv [i], "-ne")) - { load_exception_handler = false; } - else if (streq (argv [i], "-exception_file") - || streq (argv [i], "-ef")) - { - exception_file_name = argv[++i]; - load_exception_handler = true; - } - else if (streq (argv [i], "-mapped_io") - || streq (argv [i], "-mio")) - { mapped_io = true; } - else if (streq (argv [i], "-nomapped_io") - || streq (argv [i], "-nmio")) - { mapped_io = false; } - else if (streq (argv [i], "-pseudo") - || streq (argv [i], "-p")) - { accept_pseudo_insts = true; } - else if (streq (argv [i], "-nopseudo") - || streq (argv [i], "-np")) - { accept_pseudo_insts = false; } - else if (streq (argv [i], "-quiet") - || streq (argv [i], "-q")) - { quiet = true; } - else if (streq (argv [i], "-noquiet") - || streq (argv [i], "-nq")) - { quiet = false; } - else if (streq (argv [i], "-trap") - || streq (argv [i], "-t")) - { load_exception_handler = true; } - else if (streq (argv [i], "-notrap") - || streq (argv [i], "-nt")) - { load_exception_handler = false; } - else if (streq (argv [i], "-trap_file") - || streq (argv [i], "-tf")) - { - exception_file_name = argv[++i]; - load_exception_handler = true; - } - else if (streq (argv [i], "-stext") - || streq (argv [i], "-st")) - { initial_text_size = atoi (argv[++i]); } - else if (streq (argv [i], "-sdata") - || streq (argv [i], "-sd")) - { initial_data_size = atoi (argv[++i]); } - else if (streq (argv [i], "-ldata") - || streq (argv [i], "-ld")) - { initial_data_limit = atoi (argv[++i]); } - else if (streq (argv [i], "-sstack") - || streq (argv [i], "-ss")) - { initial_stack_size = atoi (argv[++i]); } - else if (streq (argv [i], "-lstack") - || streq (argv [i], "-ls")) - { initial_stack_limit = atoi (argv[++i]); } - else if (streq (argv [i], "-sktext") - || streq (argv [i], "-skt")) - { initial_k_text_size = atoi (argv[++i]); } - else if (streq (argv [i], "-skdata") - || streq (argv [i], "-skd")) - { initial_k_data_size = atoi (argv[++i]); } - else if (streq (argv [i], "-lkdata") - || streq (argv [i], "-lkd")) - { initial_k_data_limit = atoi (argv[++i]); } - else if (((streq (argv [i], "-file") - || streq (argv [i], "-f")) - && (i + 1 < argc)) - /* Assume this argument is a file name and everything following are - arguments for program */ - || (argv [i][0] != '-')) - { - program_argc = argc - (i + 1); - program_argv = &argv[i + 1]; /* Everything following is argv */ - - if (!assembly_file_loaded) - { - initialize_world (load_exception_handler ? exception_file_name : NULL, !quiet); - initialize_run_stack (program_argc, program_argv); - } - assembly_file_loaded = read_assembly_file (argv[++i]) || assembly_file_loaded; - break; - } - else if (streq (argv [i], "-assemble")) - { assemble = true; } - else if (streq (argv [i], "-dump")) - { dump_user_segments = true; } - else if (streq (argv [i], "-full_dump")) - { dump_all_segments = true; } - else - { - error ("\nUnknown argument: %s (ignored)\n", argv[i]); - print_usage_msg = 1; - } - } - - if (print_usage_msg) - { - error ("Usage: spim\n\ - -bare Bare machine (no pseudo-ops, delayed branches and loads)\n\ - -asm Extended machine (pseudo-ops, no delayed branches and loads) (default)\n\ - -delayed_branches Execute delayed branches\n\ - -delayed_loads Execute delayed loads\n\ - -exception Load exception handler (default)\n\ - -noexception Do not load exception handler\n\ - -exception_file Specify exception handler in place of default\n\ - -quiet Do not print warnings\n\ - -noquiet Print warnings (default)\n\ - -mapped_io Enable memory-mapped IO\n\ - -nomapped_io Do not enable memory-mapped IO (default)\n\ - -file Assembly code file and arguments to program\n\ - -assemble Write assembled code to standard output\n\ - -dump Write user data and text segments into files\n\ - -full_dump Write user and kernel data and text into files.\n"); - } - - - if (!assembly_file_loaded) - { - initialize_world (load_exception_handler ? exception_file_name : NULL, !quiet); - initialize_run_stack (program_argc, program_argv); - top_level (); - } - else /* assembly_file_loaded */ - { - if (assemble) - { - return write_assembled_code (program_argv[0]); - } - else if (dump_user_segments) - { - dump_data_seg (false); - dump_text_seg (false); - } - else if (dump_all_segments) - { - dump_data_seg (true); - dump_text_seg (true); - } - else - { - bool continuable; - console_to_program (); - initialize_run_stack (program_argc, program_argv); - if (!setjmp (spim_top_level_env)) - { - char *undefs = undefined_symbol_string (); - if (undefs != NULL) - { - write_output (message_out, "The following symbols are undefined:\n"); - write_output (message_out, undefs); - write_output (message_out, "\n"); - free (undefs); - } - run_program (find_symbol_address (DEFAULT_RUN_LOCATION), DEFAULT_RUN_STEPS, false, false, &continuable); - } - console_to_spim (); - } - } - - return (spim_return_value); -} - - - -/* Top-level read-eval-print loop for SPIM. */ - -static void -top_level () -{ - bool redo = false; /* => reexecute last command */ - - (void)signal (SIGINT, control_c_seen); - initialize_scanner (stdin); - initialize_parser (""); - while (1) - { - if (!redo) - write_output (message_out, "(spim) "); - if (!setjmp (spim_top_level_env)) - redo = parse_spim_command (redo); - else - redo = false; - fflush (stdout); - fflush (stderr); - } -} - - -static void -control_c_seen (int /*arg*/) -{ - console_to_spim (); - write_output (message_out, "\nExecution interrupted\n"); - longjmp (spim_top_level_env, 1); -} - - -/* SPIM commands */ - -enum { - UNKNOWN_CMD = 0, - EXIT_CMD, - READ_CMD, - RUN_CMD, - STEP_CMD, - PRINT_CMD, - PRINT_SYM_CMD, - PRINT_ALL_REGS_CMD, - REINITIALIZE_CMD, - ASM_CMD, - REDO_CMD, - NOP_CMD, - HELP_CMD, - CONTINUE_CMD, - SET_BKPT_CMD, - DELETE_BKPT_CMD, - LIST_BKPT_CMD, - DUMPNATIVE_TEXT_CMD, - DUMP_TEXT_CMD -}; - - -/* Parse a SPIM command from the currently open file and execute it. - If REDO is true, don't read a new command; just rexecute the - previous one. Return true if the command was to redo the previous - command. */ - -static bool -parse_spim_command (bool redo) -{ - static int prev_cmd = NOP_CMD; /* Default redo */ - static int prev_token; - int cmd; - - switch (cmd = (redo ? prev_cmd : read_assembly_command ())) - { - case EXIT_CMD: - console_to_spim (); - exit (0); - - case READ_CMD: - { - int token = (redo ? prev_token : read_token ()); - - if (!redo) flush_to_newline (); - if (token == Y_STR) - { - read_assembly_file ((char *) yylval.p); - pop_scanner(); - } - else - error ("Must supply a filename to read\n"); - prev_cmd = READ_CMD; - return (0); - } - - case RUN_CMD: - { - static mem_addr addr; - bool continuable; - - addr = (redo ? addr : get_opt_int ()); - if (addr == 0) - addr = starting_address (); - - initialize_run_stack (program_argc, program_argv); - console_to_program (); - if (addr != 0) - { - char *undefs = undefined_symbol_string (); - if (undefs != NULL) - { - write_output (message_out, "The following symbols are undefined:\n"); - write_output (message_out, undefs); - write_output (message_out, "\n"); - free (undefs); - } - - if (run_program (addr, DEFAULT_RUN_STEPS, false, false, &continuable)) - write_output (message_out, "Breakpoint encountered at 0x%08x\n", PC); - } - console_to_spim (); - - prev_cmd = RUN_CMD; - return (0); - } - - case CONTINUE_CMD: - { - if (PC != 0) - { - bool continuable; - console_to_program (); - if (run_program (PC, DEFAULT_RUN_STEPS, false, true, &continuable)) - write_output (message_out, "Breakpoint encountered at 0x%08x\n", PC); - console_to_spim (); - } - prev_cmd = CONTINUE_CMD; - return (0); - } - - case STEP_CMD: - { - static int steps; - mem_addr addr; - - steps = (redo ? steps : get_opt_int ()); - addr = PC == 0 ? starting_address () : PC; - - if (steps == 0) - steps = 1; - if (addr != 0) - { - bool continuable; - console_to_program (); - if (run_program (addr, steps, true, true, &continuable)) - write_output (message_out, "Breakpoint encountered at 0x%08x\n", PC); - console_to_spim (); - } - - prev_cmd = STEP_CMD; - return (0); - } - - case PRINT_CMD: - { - int token = (redo ? prev_token : read_token ()); - static int loc; - - if (token == Y_REG) - { - if (redo) loc += 1; - else loc = yylval.i; - print_reg (loc); - } - else if (token == Y_FP_REG) - { - if (redo) loc += 2; - else loc = yylval.i; - print_fp_reg (loc); - } - else if (token == Y_INT) - { - if (redo) loc += 4; - else loc = yylval.i; - print_mem (loc); - } - else if (token == Y_ID) - { - if (!print_reg_from_string ((char *) yylval.p)) - { - if (redo) loc += 4; - else loc = find_symbol_address ((char *) yylval.p); - - if (loc != 0) - print_mem (loc); - else - error ("Unknown label: %s\n", yylval.p); - } - } - else - error ("Print what?\n"); - if (!redo) flush_to_newline (); - prev_cmd = PRINT_CMD; - prev_token = token; - return (0); - } - - case PRINT_SYM_CMD: - print_symbols (); - if (!redo) flush_to_newline (); - prev_cmd = NOP_CMD; - return (0); - - case PRINT_ALL_REGS_CMD: - { - int hex_flag = 0; - int token = (redo ? prev_token : read_token ()); - if (token == Y_ID && streq((char*)yylval.p, "hex")) - hex_flag = 1; - print_all_regs (hex_flag); - if (!redo) flush_to_newline (); - prev_cmd = NOP_CMD; - return (0); - } - - case REINITIALIZE_CMD: - flush_to_newline (); - initialize_world (load_exception_handler ? exception_file_name : NULL, !quiet); - initialize_run_stack (program_argc, program_argv); - write_startup_message (); - prev_cmd = NOP_CMD; - return (0); - - case ASM_CMD: - yyparse (); - prev_cmd = ASM_CMD; - return (0); - - case REDO_CMD: - return (1); - - case NOP_CMD: - prev_cmd = NOP_CMD; - return (0); - - case HELP_CMD: - if (!redo) flush_to_newline (); - write_output (message_out, "\nSPIM is a MIPS32 simulator.\n"); - write_output (message_out, "Its top-level commands are:\n"); - write_output (message_out, "exit -- Exit the simulator\n"); - write_output (message_out, "quit -- Exit the simulator\n"); - write_output (message_out, - "read \"FILE\" -- Read FILE containing assembly code into memory\n"); - write_output (message_out, - "load \"FILE\" -- Same as read\n"); - write_output (message_out, - "run -- Start the program at (optional) ADDRESS\n"); - write_output (message_out, - "step -- Step the program for N instructions (default 1)\n"); - write_output (message_out, - "continue -- Continue program execution without stepping\n"); - write_output (message_out, "print $N -- Print register N\n"); - write_output (message_out, - "print $fN -- Print floating point register N\n"); - write_output (message_out, - "print ADDR -- Print contents of memory at ADDRESS\n"); - write_output (message_out, - "print_symbols -- Print all global symbols\n"); - write_output (message_out, - "print_all_regs -- Print all MIPS registers\n"); - write_output (message_out, - "print_all_regs hex -- Print all MIPS registers in hex\n"); - write_output (message_out, - "reinitialize -- Clear the memory and registers\n"); - write_output (message_out, - "breakpoint -- Set a breakpoint at address ADDR\n"); - write_output (message_out, - "delete -- Delete breakpoint at address ADDR\n"); - write_output (message_out, "list -- List all breakpoints\n"); - write_output (message_out, "dump [ \"FILE\" ] -- Dump binary code to spim.dump or FILE in network byte order\n"); - write_output (message_out, "dumpnative [ \"FILE\" ] -- Dump binary code to spim.dump or FILE in host byte order\n"); - write_output (message_out, - ". -- Rest of line is assembly instruction to execute\n"); - write_output (message_out, " -- Newline reexecutes previous command\n"); - write_output (message_out, "? -- Print this message\n"); - - write_output (message_out, - "\nMost commands can be abbreviated to their unique prefix\n"); - write_output (message_out, "e.g., ex(it), re(ad), l(oad), ru(n), s(tep), p(rint)\n\n"); - prev_cmd = HELP_CMD; - return (0); - - case SET_BKPT_CMD: - case DELETE_BKPT_CMD: - { - int token = (redo ? prev_token : read_token ()); - static mem_addr addr; - - if (!redo) flush_to_newline (); - if (token == Y_INT) - addr = redo ? addr + 4 : (mem_addr)yylval.i; - else if (token == Y_ID) - addr = redo ? addr + 4 : find_symbol_address ((char *) yylval.p); - else - error ("Must supply an address for breakpoint\n"); - if (cmd == SET_BKPT_CMD) - add_breakpoint (addr); - else - delete_breakpoint (addr); - prev_cmd = cmd; - - return (0); - } - - case LIST_BKPT_CMD: - if (!redo) flush_to_newline (); - list_breakpoints (); - prev_cmd = LIST_BKPT_CMD; - return (0); - - case DUMPNATIVE_TEXT_CMD: - case DUMP_TEXT_CMD: - { - int token = (redo ? prev_token : read_token ()); - - FILE *fp = NULL; - char *filename = NULL; - - int words = 0; - mem_addr addr; - mem_addr dump_start; - mem_addr dump_end; - - if (token == Y_STR) - filename = (char *) yylval.p; - else if (token == Y_NL) - filename = "spim.dump"; - else - { - fprintf (stderr, "usage: %s [ \"filename\" ]\n", - (cmd == DUMP_TEXT_CMD ? "dump" : "dumpnative")); - return (0); - } - - fp = fopen (filename, "wbt"); - if (fp == NULL) - { - perror (filename); - return (0); - } - - user_kernel_text_segment (false); - dump_start = find_symbol_address (END_OF_TRAP_HANDLER_SYMBOL); - dump_end = current_text_pc (); - - for (addr = dump_start; addr < dump_end; addr += BYTES_PER_WORD) - { - int32 code = inst_encode (read_mem_inst (addr)); - if (cmd == DUMP_TEXT_CMD) - code = (int32)htonl ((unsigned long)code); /* dump in network byte order */ - (void)fwrite (&code, 1, sizeof(code), fp); - words += 1; - } - - fclose (fp); - fprintf (stderr, "Dumped %d words starting at 0x%08x to file %s\n", - words, (unsigned int)dump_start, filename); - - prev_cmd = cmd; - return (0); - } - - default: - while (read_token () != Y_NL) ; - error ("Unknown spim command\n"); - return (0); - } -} - - -/* Read a SPIM command with the scanner and return its ennuemerated - value. */ - -static int -read_assembly_command () -{ - int token = read_token (); - - if (token == Y_NL) /* Blank line means redo */ - return (REDO_CMD); - else if (token != Y_ID) /* Better be a string */ - return (UNKNOWN_CMD); - else if (str_prefix ((char *) yylval.p, "exit", 2)) - return (EXIT_CMD); - else if (str_prefix ((char *) yylval.p, "quit", 2)) - return (EXIT_CMD); - else if (str_prefix ((char *) yylval.p, "print", 1)) - return (PRINT_CMD); - else if (str_prefix ((char *) yylval.p, "print_symbols", 7)) - return (PRINT_SYM_CMD); - else if (str_prefix ((char *) yylval.p, "print_all_regs", 7)) - return (PRINT_ALL_REGS_CMD); - else if (str_prefix ((char *) yylval.p, "run", 2)) - return (RUN_CMD); - else if (str_prefix ((char *) yylval.p, "read", 2)) - return (READ_CMD); - else if (str_prefix ((char *) yylval.p, "load", 2)) - return (READ_CMD); - else if (str_prefix ((char *) yylval.p, "reinitialize", 6)) - return (REINITIALIZE_CMD); - else if (str_prefix ((char *) yylval.p, "step", 1)) - return (STEP_CMD); - else if (str_prefix ((char *) yylval.p, "help", 1)) - return (HELP_CMD); - else if (str_prefix ((char *) yylval.p, "continue", 1)) - return (CONTINUE_CMD); - else if (str_prefix ((char *) yylval.p, "breakpoint", 2)) - return (SET_BKPT_CMD); - else if (str_prefix ((char *) yylval.p, "delete", 1)) - return (DELETE_BKPT_CMD); - else if (str_prefix ((char *) yylval.p, "list", 2)) - return (LIST_BKPT_CMD); - else if (str_prefix ((char *) yylval.p, "dumpnative", 5)) - return (DUMPNATIVE_TEXT_CMD); - else if (str_prefix ((char *) yylval.p, "dump", 4)) - return (DUMP_TEXT_CMD); - else if (*(char *) yylval.p == '?') - return (HELP_CMD); - else if (*(char *) yylval.p == '.') - return (ASM_CMD); - else - return (UNKNOWN_CMD); -} - - -/* Return non-nil if STRING1 is a (proper) prefix of STRING2. */ - -static int -str_prefix (char *s1, char *s2, int min_match) -{ - for ( ; *s1 == *s2 && *s1 != '\0'; s1 ++, s2 ++) min_match --; - return (*s1 == '\0' && min_match <= 0); -} - - -/* Read and return an integer from the current line of input. If the - line doesn't contain an integer, return 0. In either case, flush the - rest of the line, including the newline. */ - -static int -get_opt_int () -{ - int token; - - if ((token = read_token ()) == Y_INT) - { - flush_to_newline (); - return (yylval.i); - } - else if (token == Y_NL) - return (0); - else - { - flush_to_newline (); - return (0); - } -} - - -/* Flush the rest of the input line up to and including the next newline. */ - -static void -flush_to_newline () -{ - while (read_token () != Y_NL) ; -} - - -/* Print register number N. */ - -static void -print_reg (int reg_no) -{ - write_output (message_out, "Reg %d = 0x%08x (%d)\n", reg_no, R[reg_no], R[reg_no]); -} - - -static int -print_fp_reg (int reg_no) -{ - if ((reg_no & 1) == 0) - write_output (message_out, "FP reg %d = %g (double)\n", reg_no, FPR_D (reg_no)); - write_output (message_out, "FP reg %d = %g (single)\n", reg_no, FPR_S (reg_no)); - return (1); -} - - -static int -print_reg_from_string (char* reg_num) -{ - char s[100]; - char *s1 = s; - - /* Conver to lower case */ - while (*reg_num != '\0' && s1 - s < 100) - *s1++ = tolower (*reg_num++); - *s1 = '\0'; - /* Drop leading $ */ - if (s[0] == '$') - s1 = s + 1; - else - s1 = s; - - if (streq (s1, "pc")) - write_output (message_out, "PC = 0x%08x (%d)\n", PC, PC); - else if (streq (s1, "hi")) - write_output (message_out, "HI = 0x%08x (%d)\n", HI, HI); - else if (streq (s1, "lo")) - write_output (message_out, "LO = 0x%08x (%d)\n", LO, LO); - else if (streq (s1, "fpcond")) - write_output (message_out, "FCSR = 0x%08x (%d)\n", FCSR, FCSR); - else if (streq (s1, "cause")) - write_output (message_out, "Cause = 0x%08x (%d)\n", CP0_Cause, CP0_Cause); - else if (streq (s1, "epc")) - write_output (message_out, "EPC = 0x%08x (%d)\n", CP0_EPC, CP0_EPC); - else if (streq (s1, "status")) - write_output (message_out, "Status = 0x%08x (%d)\n", CP0_Status, CP0_Status); - else if (streq (s1, "badvaddr")) - write_output (message_out, "BadVAddr = 0x%08x (%d)\n", CP0_BadVAddr, CP0_BadVAddr); - else - return (0); - - return (1); -} - - -static void -print_all_regs (int hex_flag) -{ - static str_stream ss; - - ss_clear (&ss); - format_registers (&ss, hex_flag, hex_flag); - write_output (message_out, "%s\n", ss_to_string (&ss)); -} - - -static bool -write_assembled_code(char* program_name) -{ - if (parse_error_occurred) - { - return (parse_error_occurred); - } - - FILE *fp = NULL; - char *filename = NULL; - - mem_addr addr; - mem_addr dump_start; - mem_addr dump_end; - - filename = (char*) xmalloc(strlen(program_name) + 5); - strcpy(filename, program_name); - strcat(filename, ".out"); - - fp = fopen (filename, "wt"); - if (fp == NULL) - { - perror (filename); - return (true); - } - - /* dump text segment */ - user_kernel_text_segment (false); - dump_start = find_symbol_address (END_OF_TRAP_HANDLER_SYMBOL); - dump_end = current_text_pc (); - - (void)fprintf (fp, ".text # 0x%x .. 0x%x\n.word ", dump_start, dump_end); - for (addr = dump_start; addr < dump_end; addr += BYTES_PER_WORD) - { - int32 code = inst_encode (read_mem_inst (addr)); - (void)fprintf (fp, "0x%x%s", code, addr != (dump_end - BYTES_PER_WORD) ? ", " : ""); - } - (void)fprintf (fp, "\n"); - - /* dump data segment */ - user_kernel_data_segment (false); - if (bare_machine) - { - dump_start = 0; - } - else - { - dump_start = DATA_BOT; - } - dump_end = current_data_pc (); - - if (dump_end > dump_start) - { - (void)fprintf (fp, ".data # 0x%x .. 0x%x\n.word ", dump_start, dump_end); - for (addr = dump_start; addr < dump_end; addr += BYTES_PER_WORD) - { - int32 code = read_mem_word (addr); - (void)fprintf (fp, "0x%x%s", code, addr != (dump_end - BYTES_PER_WORD) ? ", " : ""); - } - (void)fprintf (fp, "\n"); - } - - fclose (fp); - return (false); -} - - - -/* Print an error message. */ - -void -error (char *fmt, ...) -{ - va_list args; - - va_start (args, fmt); - -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stderr); -#else - vfprintf (stderr, fmt, args); -#endif - va_end (args); -} - - -/* Print the error message then exit. */ - -void -fatal_error (char *fmt, ...) -{ - va_list args; - va_start (args, fmt); - fmt = va_arg (args, char *); - -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stderr); -#else - vfprintf (stderr, fmt, args); -#endif - exit (-1); -} - - -/* Print an error message and return to top level. */ - -void -run_error (char *fmt, ...) -{ - va_list args; - - va_start (args, fmt); - - console_to_spim (); - -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stderr); -#else - vfprintf (stderr, fmt, args); -#endif - va_end (args); - longjmp (spim_top_level_env, 1); -} - - - -/* IO facilities: */ - -void -write_output (port fp, char *fmt, ...) -{ - va_list args; - FILE *f; - int restore_console_to_program = 0; - - va_start (args, fmt); - f = fp.f; - - if (console_state_saved) - { - restore_console_to_program = 1; - console_to_spim (); - } - - if (f != 0) - { -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, f); -#else - vfprintf (f, fmt, args); -#endif - fflush (f); - } - else - { -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stdout); -#else - vfprintf (stdout, fmt, args); -#endif - fflush (stdout); - } - va_end (args); - - if (restore_console_to_program) - console_to_program (); -} - - -/* Simulate the semantics of fgets (not gets) on Unix file. */ - -void -read_input (char *str, int str_size) -{ - char *ptr; - int restore_console_to_program = 0; - - if (console_state_saved) - { - restore_console_to_program = 1; - console_to_spim (); - } - - ptr = str; - - while (1 < str_size) /* Reserve space for null */ - { - char buf[1]; - if (read ((int) console_in.i, buf, 1) <= 0) /* Not in raw mode! */ - break; - - *ptr ++ = buf[0]; - str_size -= 1; - - if (buf[0] == '\n') - break; - } - - if (0 < str_size) - *ptr = '\0'; /* Null terminate input */ - - if (restore_console_to_program) - console_to_program (); -} - - -/* Give the console to the program for IO. */ - -static void -console_to_program () -{ - if (mapped_io && !console_state_saved) - { -#ifdef NEED_TERMIOS - int flags; - ioctl ((int) console_in.i, TIOCGETP, (char *) &saved_console_state); - flags = saved_console_state.sg_flags; - saved_console_state.sg_flags = (flags | RAW) & ~(CRMOD|ECHO); - ioctl ((int) console_in.i, TIOCSETP, (char *) &saved_console_state); - saved_console_state.sg_flags = flags; -#else - struct termios params; - - tcgetattr (console_in.i, &saved_console_state); - params = saved_console_state; - params.c_iflag &= ~(ISTRIP|INLCR|ICRNL|IGNCR|IXON|IXOFF|INPCK|BRKINT|PARMRK); - - /* Translate CR -> NL to canonicalize input. */ - params.c_iflag |= IGNBRK|IGNPAR|ICRNL; - params.c_oflag = OPOST|ONLCR; - params.c_cflag &= ~PARENB; - params.c_cflag |= CREAD|CS8; - params.c_lflag = 0; - params.c_cc[VMIN] = 1; - params.c_cc[VTIME] = 1; - - tcsetattr (console_in.i, TCSANOW, ¶ms); -#endif - console_state_saved = 1; - } -} - - -/* Return the console to SPIM. */ - -static void -console_to_spim () -{ - if (mapped_io && console_state_saved) -#ifdef NEED_TERMIOS - ioctl ((int) console_in.i, TIOCSETP, (char *) &saved_console_state); -#else - tcsetattr (console_in.i, TCSANOW, &saved_console_state); -#endif - console_state_saved = 0; -} - - -int -console_input_available () -{ - fd_set fdset; - struct timeval timeout; - - if (mapped_io) - { - timeout.tv_sec = 0; - timeout.tv_usec = 0; - FD_ZERO (&fdset); - FD_SET ((int) console_in.i, &fdset); - return (select (sizeof (fdset) * 8, &fdset, NULL, NULL, &timeout)); - } - else - return (0); -} - - -char -get_console_char () -{ - char buf; - - read ((int) console_in.i, &buf, 1); - - if (buf == 3) /* ^C */ - control_c_seen (0); - return (buf); -} - - -void -put_console_char (char c) -{ - putc (c, console_out.f); - fflush (console_out.f); -} - - -static int -read_token () -{ - int token = yylex (); - - if (token == 0) /* End of file */ - { - console_to_spim (); - exit (0); - } - else - { - return (token); - } -} - - -/* - * Writes the contents of the (user and optionally kernel) data segment into data.asm file. - * If data.asm already exists, it's replaced. - */ - -static void -dump_data_seg(bool kernel_also) -{ - static str_stream ss; - ss_clear (&ss); - - if (kernel_also) - { - format_data_segs (&ss); - } - else - { - ss_printf (&ss, "\tDATA\n"); - format_mem (&ss, DATA_BOT, data_top); - } - - FILE *fp; - fp = fopen ("data.asm", "w"); - fprintf (fp, "%s", ss_to_string (&ss)); - fclose (fp); -} - - -/* - * Writes the contents of the (user and optionally kernel) text segment in text.asm file. - * If data.asm already exists, it's replaced. - */ - -static void -dump_text_seg(bool kernel_also) -{ - static str_stream ss; - ss_clear (&ss); - - if (kernel_also) - { - format_insts (&ss, TEXT_BOT, text_top); - ss_printf (&ss, "\n\tKERNEL\n"); - format_insts (&ss, K_TEXT_BOT, k_text_top); - } - else - { - ss_printf (&ss, "\n\tUSER TEXT SEGMENT\n"); - format_insts (&ss, TEXT_BOT, text_top); - } - - FILE *fp; - fp = fopen ("text.asm", "w"); - fprintf (fp, "%s", ss_to_string (&ss)); - fclose (fp); -} diff --git a/spim-qtspimbot/CPU/data.cpp b/spim-qtspimbot/CPU/data.cpp deleted file mode 100755 index 5359e3d..0000000 --- a/spim-qtspimbot/CPU/data.cpp +++ /dev/null @@ -1,336 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to manipulate data segment directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser.h" -#include "run.h" -#include "data.h" - - -/* The first 64K of the data segment are dedicated to small data - segment, which is pointed to by $gp. This register points to the - middle of the segment, so we can use the full offset field in an - instruction. */ - -#define DATA_PC (reg_images[current_image].in_kernel ? reg_images[current_image].next_k_data_pc : reg_images[current_image].next_data_pc) - -/* If TO_KERNEL is true, subsequent data will be placed in the - kernel data segment. If false, data will go to the user's data - segment.*/ - -void -user_kernel_data_segment (bool to_kernel) -{ - reg_images[current_image].in_kernel = to_kernel; -} - - -void -end_of_assembly_file () -{ - reg_images[current_image].in_kernel = false; - reg_images[current_image].auto_alignment = true; -} - - -/* Set the point at which the first datum is stored to be ADDRESS + - 64K. The 64K increment allocates an area pointed to by register - $gp, which is initialized. */ - -void -data_begins_at_point (size_t context, mem_addr addr) -{ - if (bare_machine) - reg_images[context].next_data_pc = addr; - else - { - reg_images[context].next_gp_item_addr = addr; - mem_images[context].gp_midpoint = addr + 32*K; - reg_images[context].R[REG_GP] = mem_images[context].gp_midpoint; - reg_images[context].next_data_pc = addr + 64*K; - } -} - - -/* Set the point at which the first datum is stored in the kernel's - data segment. */ - -void -k_data_begins_at_point (size_t context, mem_addr addr) -{ - reg_images[context].next_k_data_pc = addr; -} - - -/* Arrange that the next datum is stored on a memory boundary with its - low ALIGNMENT bits equal to 0. If argument is 0, disable automatic - alignment.*/ - -void -align_data (int alignment) -{ - if (alignment == 0) - reg_images[current_image].auto_alignment = false; - else if (reg_images[current_image].in_kernel) - { - reg_images[current_image].next_k_data_pc = - (reg_images[current_image].next_k_data_pc + (1 << alignment) - 1) & (-1 << alignment); - fix_current_label_address (reg_images[current_image].next_k_data_pc); - } - else - { - reg_images[current_image].next_data_pc = (reg_images[current_image].next_data_pc + (1 << alignment) - 1) & (-1 << alignment); - fix_current_label_address (reg_images[current_image].next_data_pc); - } -} - - -void -set_data_alignment (int alignment) -{ - if (reg_images[current_image].auto_alignment) - align_data (alignment); -} - - -void -enable_data_alignment () -{ - reg_images[current_image].auto_alignment = true; -} - - -/* Set the location (in user or kernel data space) for the next datum. */ - -void -set_data_pc (mem_addr addr) -{ - if (reg_images[current_image].in_kernel) - reg_images[current_image].next_k_data_pc = addr; - else - reg_images[current_image].next_data_pc = addr; -} - - -/* Return the address at which the next datum will be stored. */ - -mem_addr -current_data_pc () -{ - return (DATA_PC); -} - - -/* Bump the address at which the next data will be stored by DELTA - bytes. */ - -void -increment_data_pc (int delta) -{ - if (reg_images[current_image].in_kernel) - { - reg_images[current_image].next_k_data_pc += delta; - if (mem_images[current_image].k_data_top <= reg_images[current_image].next_k_data_pc) - expand_k_data(current_image, ROUND_UP(reg_images[current_image].next_k_data_pc - mem_images[current_image].k_data_top + 1, 64*K)); - } - else - { - reg_images[current_image].next_data_pc += delta; - if (mem_images[current_image].data_top <= reg_images[current_image].next_data_pc) - expand_data(current_image, ROUND_UP(reg_images[current_image].next_data_pc - mem_images[current_image].data_top + 1, 64*K)); - } -} - - -/* Process a .extern NAME SIZE directive. */ - -void -extern_directive (char *name, int size) -{ - label *sym = make_label_global (name); - - if (!bare_machine - && !sym->gp_flag // Not already a global symbol - && size > 0 && size <= SMALL_DATA_SEG_MAX_SIZE - && reg_images[current_image].next_gp_item_addr + size < mem_images[current_image].gp_midpoint + 32*K) - { - sym->gp_flag = 1; - sym->addr = reg_images[current_image].next_gp_item_addr; - reg_images[current_image].next_gp_item_addr += size; - } -} - - -/* Process a .lcomm NAME SIZE directive. */ - -void -lcomm_directive (char *name, int size) -{ - if (!bare_machine - && size > 0 && size <= SMALL_DATA_SEG_MAX_SIZE - && reg_images[current_image].next_gp_item_addr + size < mem_images[current_image].gp_midpoint + 32*K) - { - label *sym = record_label (name, reg_images[current_image].next_gp_item_addr, 1); - sym->gp_flag = 1; - - reg_images[current_image].next_gp_item_addr += size; - /* Don't need to initialize since memory starts with 0's */ - } - else - { - (void)record_label (name, reg_images[current_image].next_data_pc, 1); - - for ( ; size > 0; size --) - { - store_byte (0); - } - } -} - - -/* Process a .ascii STRING or .asciiz STRING directive. */ - -void -store_string (char *string, int length, bool null_terminate) -{ - for ( ; length > 0; string ++, length --) { - store_byte (*string); - } - if (null_terminate) - { - store_byte (0); - } -} - - -/* Process a .byte EXPR directive. */ - -void -store_byte (int value) -{ - set_mem_byte (current_image, DATA_PC, value); - increment_data_pc (1); -} - - -/* Process a .half EXPR directive. */ - -void -store_half (int value) -{ - if ((DATA_PC & 0x1) != 0) - { -#ifdef SPIM_BIGENDIAN - store_byte ((value >> 8) & 0xff); - store_byte (value & 0xff); -#else - store_byte (value & 0xff); - store_byte ((value >> 8) & 0xff); -#endif - } - else - { - set_mem_half (current_image, DATA_PC, value); - increment_data_pc (BYTES_PER_WORD / 2); - } -} - - -/* Process a .word EXPR directive. */ - -void -store_word (int value) -{ - if ((DATA_PC & 0x3) != 0) - { -#ifdef SPIM_BIGENDIAN - store_half ((value >> 16) & 0xffff); - store_half (value & 0xffff); -#else - store_half (value & 0xffff); - store_half ((value >> 16) & 0xffff); -#endif - } - else - { - set_mem_word (current_image, DATA_PC, value); - increment_data_pc (BYTES_PER_WORD); - } -} - - -/* Process a .double EXPR directive. */ - -void -store_double (double *value) -{ - if ((DATA_PC & 0x7) != 0) - { - store_word (* ((mem_word *) value)); - store_word (* (((mem_word *) value) + 1)); - } - else - { - set_mem_word (current_image, DATA_PC, *((mem_word *) value)); - increment_data_pc (BYTES_PER_WORD); - set_mem_word (current_image, DATA_PC, *(((mem_word *) value) + 1)); - increment_data_pc (BYTES_PER_WORD); - } -} - - -/* Process a .float EXPR directive. */ - -void -store_float (double *value) -{ - float val = (float)*value; - float *vp = &val; - - if ((DATA_PC & 0x3) != 0) - { - store_half (*(mem_word *) vp & 0xffff); - store_half ((*(mem_word *) vp >> 16) & 0xffff); - } - else - { - set_mem_word (current_image, DATA_PC, *((mem_word *) vp)); - increment_data_pc (BYTES_PER_WORD); - } -} diff --git a/spim-qtspimbot/CPU/data.h b/spim-qtspimbot/CPU/data.h deleted file mode 100755 index 0c1ccdc..0000000 --- a/spim-qtspimbot/CPU/data.h +++ /dev/null @@ -1,54 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to code to manipulate data segment directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -void align_data (int alignment); -mem_addr current_data_pc (); -void data_begins_at_point (size_t context, mem_addr addr); -void enable_data_alignment (); -void end_of_assembly_file (); -void extern_directive (char *name, int size); -void increment_data_pc (int value); -void k_data_begins_at_point (size_t context, mem_addr addr); -void lcomm_directive (char *name, int size); -void set_data_alignment (int); -void set_data_pc (mem_addr addr); -void set_text_pc (mem_addr addr); -void store_byte (int value); -void store_double (double *value); -void store_float (double *value); -void store_half (int value); -void store_string (char *string, int length, bool null_terminate); -void store_word (int value); -void user_kernel_data_segment (bool to_kernel); diff --git a/spim-qtspimbot/CPU/display-utils.cpp b/spim-qtspimbot/CPU/display-utils.cpp deleted file mode 100755 index 6160afe..0000000 --- a/spim-qtspimbot/CPU/display-utils.cpp +++ /dev/null @@ -1,295 +0,0 @@ -/* SPIM S20 MIPS simulator. - Utilities for displaying machine contents. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "data.h" -#include "reg.h" -#include "mem.h" -#include "run.h" -#include "sym-tbl.h" - - -char* int_reg_names[32] = - {"r0", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra"}; - - -static mem_addr format_partial_line (str_stream *ss, mem_addr addr); - - -/* Write to the stream the contents of the machine's registers, in a wide - variety of formats. */ - -void -format_registers (str_stream *ss, int print_gpr_hex, int print_fpr_hex) -{ - reg_image_t ®_image = reg_images[0]; - - int i; - char *grstr, *fpstr; - char *grfill, *fpfill; - - ss_printf (ss, " PC = %08x ", reg_image.PC); - ss_printf (ss, "EPC = %08x ", CP0_EPC(reg_image)); - ss_printf (ss, " Cause = %08x ", CP0_Cause(reg_image)); - ss_printf (ss, " BadVAddr= %08x\n", CP0_BadVAddr(reg_image)); - ss_printf (ss, " Status = %08x ", CP0_Status(reg_image)); - ss_printf (ss, "HI = %08x ", reg_image.HI); - ss_printf (ss, " LO = %08x\n", reg_image.LO); - - if (print_gpr_hex) - grstr = "R%-2d (%2s) = %08x", grfill = " "; - else - grstr = "R%-2d (%2s) = %-10d", grfill = " "; - - ss_printf (ss, "\t\t\t\t General Registers\n"); - for (i = 0; i < 8; i++) - { - ss_printf (ss, grstr, i, int_reg_names[i], reg_image.R[i]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+8, int_reg_names[i+8], reg_image.R[i+8]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+16, int_reg_names[i+16], reg_image.R[i+16]); - ss_printf (ss, grfill); - ss_printf (ss, grstr, i+24, int_reg_names[i+24], reg_image.R[i+24]); - ss_printf (ss, "\n"); - } - - ss_printf (ss, "\n FIR = %08x ", FIR(reg_image)); - ss_printf (ss, " FCSR = %08x ", FCSR(reg_image)); - ss_printf (ss, " FCCR = %08x ", FCCR(reg_image)); - ss_printf (ss, " FEXR = %08x\n", FEXR(reg_image)); - ss_printf (ss, " FENR = %08x\n", FENR(reg_image)); - - ss_printf (ss, "\t\t\t Double Floating Point Registers\n"); - - if (print_fpr_hex) - fpstr = "FP%-2d=%08x,%08x", fpfill = " "; - else - fpstr = "FP%-2d = %#-13.6g", fpfill = " "; - - if (print_fpr_hex) - for (i = 0; i < 4; i += 1) - { - int *r1, *r2; - - /* Use pointers to cast to ints without invoking float->int conversion - so we can just print the bits. */ - r1 = (int *)®_image.FPR[i]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)®_image.FPR[i+4]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+8, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)®_image.FPR[i+8]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+16, *r1, *r2); - ss_printf (ss, fpfill); - - r1 = (int *)®_image.FPR[i+12]; r2 = r1 + 1; - ss_printf (ss, fpstr, 2*i+24, *r1, *r2); - ss_printf (ss, "\n"); - } - else for (i = 0; i < 4; i += 1) - { - ss_printf (ss, fpstr, 2*i, reg_image.FPR[i]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+8, reg_image.FPR[i+4]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+16, reg_image.FPR[i+8]); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, 2*i+24, reg_image.FPR[i+12]); - ss_printf (ss, "\n"); - } - - if (print_fpr_hex) - fpstr = "FP%-2d=%08x", fpfill = " "; - else - fpstr = "FP%-2d = %#-13.6g", fpfill = " "; - - ss_printf (ss, "\t\t\t Single Floating Point Registers\n"); - - if (print_fpr_hex) - for (i = 0; i < 8; i += 1) - { - /* Use pointers to cast to ints without invoking float->int conversion - so we can just print the bits. */ - ss_printf (ss, fpstr, i, *(int *)&FPR_S(reg_image, i)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+8, *(int *)&FPR_S(reg_image, i+8)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+16, *(int *)&FPR_S(reg_image, i+16)); - ss_printf (ss, fpfill); - - ss_printf (ss, fpstr, i+24, *(int *)&FPR_S(reg_image, i+24)); - ss_printf (ss, "\n"); - } - else for (i = 0; i < 8; i += 1) - { - ss_printf (ss, fpstr, i, FPR_S(reg_image, i)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+8, FPR_S(reg_image, i+8)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+16, FPR_S(reg_image, i+16)); - ss_printf (ss, fpfill); - ss_printf (ss, fpstr, i+24, FPR_S(reg_image, i+24)); - ss_printf (ss, "\n"); - } -} - - - -/* Write to the stream a printable representation of the instructions in - memory addresses: FROM...TO. */ - -void -format_insts (str_stream *ss, mem_addr from, mem_addr to) -{ - instruction *inst; - mem_addr i; - - for (i = from; i < to; i += 4) - { - inst = read_mem_inst (0, i); - if (inst != NULL) - { - format_an_inst (ss, inst, i); - } - } -} - - -/* Write to the stream a printable representation of the data and stack - segments. */ - -void -format_data_segs (str_stream *ss) -{ - reg_image_t ®_image = reg_images[0]; - mem_image_t &mem_image = mem_images[0]; - - ss_printf (ss, "\tDATA\n"); - format_mem (ss, DATA_BOT, mem_image.data_top); - - ss_printf (ss, "\n\tSTACK\n"); - format_mem (ss, ROUND_DOWN (reg_image.R[29], BYTES_PER_WORD), STACK_TOP); - - ss_printf (ss, "\n\tKERNEL DATA\n"); - format_mem (ss, K_DATA_BOT, mem_image.k_data_top); -} - - -#define BYTES_PER_LINE (4*BYTES_PER_WORD) - - -/* Write to the stream a printable representation of the data in memory - address: FROM...TO. */ - -void -format_mem (str_stream *ss, mem_addr from, mem_addr to) -{ - mem_word val; - mem_addr i = ROUND_UP (from, BYTES_PER_WORD); - int j; - - i = format_partial_line (ss, i); - - for ( ; i < to; ) - { - /* Count consecutive zero words */ - for (j = 0; (i + (uint32) j * BYTES_PER_WORD) < to; j += 1) - { - val = read_mem_word (0, i + (uint32) j * BYTES_PER_WORD); - if (val != 0) - { - break; - } - } - - if (j >= 4) - { - /* Block of 4 or more zero memory words: */ - ss_printf (ss, "[0x%08x]...[0x%08x] 0x00000000\n", - i, - i + (uint32) j * BYTES_PER_WORD); - - i = i + (uint32) j * BYTES_PER_WORD; - i = format_partial_line (ss, i); - } - else - { - /* Fewer than 4 zero words, print them on a single line: */ - ss_printf (ss, "[0x%08x] ", i); - do - { - val = read_mem_word (0, i); - ss_printf (ss, " 0x%08x", (unsigned int)val); - i += BYTES_PER_WORD; - } - while (i % BYTES_PER_LINE != 0); - - ss_printf (ss, "\n"); - } - } -} - - -/* Write to the stream a text line containing a fraction of a - quadword. Return the address after the last one written. */ - -static mem_addr -format_partial_line (str_stream *ss, mem_addr addr) -{ - if ((addr % BYTES_PER_LINE) != 0) - { - ss_printf (ss, "[0x%08x] ", addr); - - for (; (addr % BYTES_PER_LINE) != 0; addr += BYTES_PER_WORD) - { - mem_word val = read_mem_word (0, addr); - ss_printf (ss, " 0x%08x", (unsigned int)val); - } - - ss_printf (ss, "\n"); - } - - return addr; -} diff --git a/spim-qtspimbot/CPU/dump_ops.cpp b/spim-qtspimbot/CPU/dump_ops.cpp deleted file mode 100644 index 873acf3..0000000 --- a/spim-qtspimbot/CPU/dump_ops.cpp +++ /dev/null @@ -1,129 +0,0 @@ -/* SPIM S20 MIPS simulator. - Dump the op.h file in a readable format to allow checking of encodings. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include - -typedef struct inst_t -{ - char *opcode; - - union - { - unsigned int x; - struct - { - unsigned int funct:6; - unsigned int pad:10; - unsigned int rt:5; - unsigned int rs:5; - unsigned int op:6; - } f; - }; -} inst; - - -#define OP(a, b, c, d) {a, d}, - -inst ops [] = { -#include "op.h" -}; - - -int -compare_ops (inst *p1, inst *p2) -{ - if (p1->f.op < p2->f.op) - return (-1); - else if (p1->f.op > p2->f.op) - return (1); - else - { - if (p1->f.rs < p2->f.rs) - return (-1); - else if (p1->f.rs > p2->f.rs) - return (1); - else - { - if (p1->f.rt < p2->f.rt) - return (-1); - else if (p1->f.rt > p2->f.rt) - return (1); - else - { - if (p1->f.funct < p2->f.funct) - return (-1); - else if (p1->f.funct > p2->f.funct) - return (1); - else - return 0; - } - } - } -} - - -main (int argc, char** argv) -{ - /* Remove pseudo ops (opcode == -1) from table */ - int empty, next; - for (empty = 0, next = 0; next < (sizeof(ops) / sizeof(ops[0])); next += 1) - { - if (-1 == ops[next].x) - { - } - else - { - ops[empty] = ops[next]; - empty += 1; - } - } - - /* Radix sort instructions by field: op, rs, rt, funct */ - qsort (ops, empty, sizeof(ops[0]), compare_ops); - - /* Print related instructions in groups */ - int i; - for (i = 0; i < empty; i += 1) - { - if (0 < i && ops[i - 1].f.op != ops[i].f.op) - printf ("\n"); - - printf ("%10s op=%2d rs=%2d rt=%2d funct=%02x 0x%08x\n", - ops[i].opcode, - ops[i].f.op, - ops[i].f.rs, - ops[i].f.rt, - ops[i].f.funct, - ops[i].x); - } -} diff --git a/spim-qtspimbot/CPU/exceptions.s b/spim-qtspimbot/CPU/exceptions.s deleted file mode 100755 index c88334d..0000000 --- a/spim-qtspimbot/CPU/exceptions.s +++ /dev/null @@ -1,195 +0,0 @@ -# SPIM S20 MIPS simulator. -# The default exception handler for spim. -# -# Copyright (c) 1990-2010, James R. Larus. -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without modification, -# are permitted provided that the following conditions are met: -# -# Redistributions of source code must retain the above copyright notice, -# this list of conditions and the following disclaimer. -# -# Redistributions in binary form must reproduce the above copyright notice, -# this list of conditions and the following disclaimer in the documentation and/or -# other materials provided with the distribution. -# -# Neither the name of the James R. Larus nor the names of its contributors may be -# used to endorse or promote products derived from this software without specific -# prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -# Define the exception handling code. This must go first! - - .kdata -__m1_: .asciiz " Exception " -__m2_: .asciiz " occurred and ignored\n" -__e0_: .asciiz " [Interrupt] " -__e1_: .asciiz " [TLB]" -__e2_: .asciiz " [TLB]" -__e3_: .asciiz " [TLB]" -__e4_: .asciiz " [Address error in inst/data fetch] " -__e5_: .asciiz " [Address error in store] " -__e6_: .asciiz " [Bad instruction address] " -__e7_: .asciiz " [Bad data address] " -__e8_: .asciiz " [Error in syscall] " -__e9_: .asciiz " [Breakpoint] " -__e10_: .asciiz " [Reserved instruction] " -__e11_: .asciiz "" -__e12_: .asciiz " [Arithmetic overflow] " -__e13_: .asciiz " [Trap] " -__e14_: .asciiz "" -__e15_: .asciiz " [Floating point] " -__e16_: .asciiz "" -__e17_: .asciiz "" -__e18_: .asciiz " [Coproc 2]" -__e19_: .asciiz "" -__e20_: .asciiz "" -__e21_: .asciiz "" -__e22_: .asciiz " [MDMX]" -__e23_: .asciiz " [Watch]" -__e24_: .asciiz " [Machine check]" -__e25_: .asciiz "" -__e26_: .asciiz "" -__e27_: .asciiz "" -__e28_: .asciiz "" -__e29_: .asciiz "" -__e30_: .asciiz " [Cache]" -__e31_: .asciiz "" -__excp: .word __e0_, __e1_, __e2_, __e3_, __e4_, __e5_, __e6_, __e7_, __e8_, __e9_ - .word __e10_, __e11_, __e12_, __e13_, __e14_, __e15_, __e16_, __e17_, __e18_, - .word __e19_, __e20_, __e21_, __e22_, __e23_, __e24_, __e25_, __e26_, __e27_, - .word __e28_, __e29_, __e30_, __e31_ -s1: .word 0 -s2: .word 0 - -# This is the exception handler code that the processor runs when -# an exception occurs. It only prints some information about the -# exception, but can server as a model of how to write a handler. -# -# Because we are running in the kernel, we can use $k0/$k1 without -# saving their old values. - -# This is the exception vector address for MIPS-1 (R2000): -# .ktext 0x80000080 -# This is the exception vector address for MIPS32: - .ktext 0x80000180 -# Select the appropriate one for the mode in which SPIM is compiled. - .set noat - move $k1 $at # Save $at - .set at - sw $v0 s1 # Not re-entrant and we can't trust $sp - sw $a0 s2 # But we need to use these registers - - mfc0 $k0 $13 # Cause register - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - - # Print information about exception. - # - li $v0 4 # syscall 4 (print_str) - la $a0 __m1_ - syscall - - li $v0 1 # syscall 1 (print_int) - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - syscall - - li $v0 4 # syscall 4 (print_str) - andi $a0 $k0 0x3c - lw $a0 __excp($a0) - nop - syscall - - bne $k0 0x18 ok_pc # Bad PC exception requires special checks - nop - - mfc0 $a0 $14 # EPC - andi $a0 $a0 0x3 # Is EPC word-aligned? - beq $a0 0 ok_pc - nop - - li $v0 10 # Exit on really bad PC - syscall - -ok_pc: - li $v0 4 # syscall 4 (print_str) - la $a0 __m2_ - syscall - - srl $a0 $k0 2 # Extract ExcCode Field - andi $a0 $a0 0x1f - bne $a0 0 ret # 0 means exception was an interrupt - nop - -# Interrupt-specific code goes here! -# Don't skip instruction at EPC since it has not executed. - - -ret: -# Return from (non-interrupt) exception. Skip offending instruction -# at EPC to avoid infinite loop. -# - mfc0 $k0 $14 # Bump EPC register - addiu $k0 $k0 4 # Skip faulting instruction - # (Need to handle delayed branch case here) - mtc0 $k0 $14 - - -# Restore registers and reset procesor state -# - lw $v0 s1 # Restore other registers - lw $a0 s2 - - .set noat - move $at $k1 # Restore $at - .set at - - mtc0 $0 $13 # Clear Cause register - - mfc0 $k0 $12 # Set Status register - ori $k0 0x1 # Interrupts enabled - mtc0 $k0 $12 - -# Return from exception on MIPS32: - eret - -# Return sequence for MIPS-I (R2000): -# rfe # Return from exception handler - # Should be in jr's delay slot -# jr $k0 -# nop - - - -# Standard startup code. Invoke the routine "main" with arguments: -# main(argc, argv, envp) -# - .text - .globl __start -__start: - lw $a0 0($sp) # argc - addiu $a1 $sp 4 # argv - addiu $a2 $a1 4 # envp - sll $v0 $a0 2 - addu $a2 $a2 $v0 - jal main - nop - - li $v0 10 - syscall # syscall 10 (exit) - - .globl __eoth -__eoth: diff --git a/spim-qtspimbot/CPU/inst.cpp b/spim-qtspimbot/CPU/inst.cpp deleted file mode 100755 index df97aaa..0000000 --- a/spim-qtspimbot/CPU/inst.cpp +++ /dev/null @@ -1,1606 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to build assembly instructions and resolve symbolic labels. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser.h" -#include "scanner.h" -#include "parser_yacc.h" -#include "data.h" - - -/* Local functions: */ - -static int compare_pair_value (name_val_val *p1, name_val_val *p2); -static void format_imm_expr (str_stream *ss, imm_expr *expr, int base_reg); -static void i_type_inst_full_word (int opcode, int rt, int rs, imm_expr *expr, - int value_known, int32 value); -static void inst_cmp (instruction *inst1, instruction *inst2); -static instruction *make_r_type_inst (int opcode, int rd, int rs, int rt); -static instruction *mk_i_inst (int32 value, int opcode, int rs, int rt, int offset); -static instruction *mk_j_inst (int32, int opcode, int target); -static instruction *mk_r_inst (int32, int opcode, int rs, int rt, int rd, int shamt); -static void produce_immediate (imm_expr *expr, int rt, int value_known, int32 value); -static void sort_a_opcode_table (); -static void sort_i_opcode_table (); -static void sort_name_table (); - - -/* Instruction used as breakpoint by SPIM: */ - -static instruction *break_inst = NULL; - - -#define INST_PC (reg_images[current_image].in_kernel ? reg_images[current_image].next_k_text_pc : reg_images[current_image].next_text_pc) - - - -/* Set ADDRESS at which the next instruction is stored. */ - -void -text_begins_at_point (size_t context, mem_addr addr) -{ - reg_images[context].next_text_pc = addr; -} - - -void -k_text_begins_at_point (size_t context, mem_addr addr) -{ - reg_images[context].next_k_text_pc = addr; -} - - -/* Set the location (in user or kernel text space) for the next instruction. */ - -void -set_text_pc (mem_addr addr) -{ - if (reg_images[current_image].in_kernel) - reg_images[current_image].next_k_text_pc = addr; - else - reg_images[current_image].next_text_pc = addr; -} - - -/* Return address for next instruction, in appropriate text segment. */ - -mem_addr -current_text_pc () -{ - return (INST_PC); -} - - -/* Increment the current text segement PC. */ - -void -increment_text_pc (int delta) -{ - if (reg_images[current_image].in_kernel) - { - reg_images[current_image].next_k_text_pc += delta; - if (mem_images[current_image].k_text_top <= reg_images[current_image].next_k_text_pc) - run_error("Can't expand kernel text segment\n"); - } - else - { - reg_images[current_image].next_text_pc += delta; - if (mem_images[current_image].text_top <= reg_images[current_image].next_text_pc) - run_error("Can't expand text segment\n"); - } -} - - -/* If FLAG is true, next instruction goes to kernel text segment, - otherwise it goes to user segment. */ - -void -user_kernel_text_segment (bool to_kernel) -{ - reg_images[current_image].in_kernel = to_kernel; -} - - -/* Store an INSTRUCTION in memory at the next location. */ - -void -store_instruction (instruction *inst) -{ - if (data_dir) - { - store_word (inst_encode (inst)); - free_inst (inst); - } - else if (text_dir) - { - reg_images[current_image].exception_occurred = 0; - set_mem_inst (current_image, INST_PC, inst); - if (reg_images[current_image].exception_occurred) - error ("Invalid address (0x%08x) for instruction\n", INST_PC); - else - increment_text_pc (BYTES_PER_WORD); - if (inst != NULL) - { - SET_SOURCE (inst, source_line ()); - if (ENCODING (inst) == 0) - SET_ENCODING (inst, inst_encode (inst)); - } - } -} - - - -void -i_type_inst_free (int opcode, int rt, int rs, imm_expr *expr) -{ - i_type_inst (opcode, rt, rs, expr); - free (expr); -} - - -/* Produce an immediate instruction with the OPCODE, RT, RS, and IMM - fields. NB, because the immediate value may not fit in the field, - this routine may produce more than one instruction. On the bare - machine, we resolve symbolic address, but they better produce values - that fit into instruction's immediate field. */ - -void -i_type_inst (int opcode, int rt, int rs, imm_expr *expr) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_EXPR (inst, copy_imm_expr (expr)); - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* Evaluate the instruction's expression. */ - int32 value = eval_imm_expr (expr); - - if (!bare_machine - && (((opcode == Y_ADDI_OP - || opcode == Y_ADDIU_OP - || opcode == Y_SLTI_OP - || opcode == Y_SLTIU_OP - || opcode == Y_TEQI_OP - || opcode == Y_TGEI_OP - || opcode == Y_TGEIU_OP - || opcode == Y_TLTI_OP - || opcode == Y_TLTIU_OP - || opcode == Y_TNEI_OP - || (opcode_is_load_store (opcode) && expr->bits == 0)) - // Sign-extended immediate values: - ? ((value & 0xffff8000) != 0 && (value & 0xffff8000) != 0xffff8000) - // Not sign-extended: - : (value & 0xffff0000) != 0))) - { - // Non-immediate value - free_inst (inst); - i_type_inst_full_word (opcode, rt, rs, expr, 1, value); - return; - } - else - resolve_a_label (expr->symbol, inst); - } - else if (bare_machine || expr->bits != 0) - /* Don't know expression's value, but only needed upper/lower 16-bits - anyways. */ - record_inst_uses_symbol (inst, expr->symbol); - else - { - /* Don't know the expressions's value and want all of its bits, - so assume that it will not produce a small result and generate - sequence for 32 bit value. */ - free_inst (inst); - - i_type_inst_full_word (opcode, rt, rs, expr, 0, 0); - return; - } - - store_instruction (inst); -} - - -/* The immediate value for an instruction will (or may) not fit in 16 bits. - Build the value from its piece with separate instructions. */ - -static void -i_type_inst_full_word (int opcode, int rt, int rs, imm_expr *expr, - int value_known, int32 value) -{ - if (opcode_is_load_store (opcode)) - { - int32 offset; - - if (expr->symbol != NULL - && expr->symbol->gp_flag - && rs == 0 - && (int32)IMM_MIN <= (offset = expr->symbol->addr + expr->offset) - && offset <= (int32)IMM_MAX) - { - i_type_inst_free (opcode, rt, REG_GP, make_imm_expr (offset, NULL, false)); - } - else if (value_known) - { - int low, high; - - high = (value >> 16) & 0xffff; - low = value & 0xffff; - - if (!(high == 0 && !(low & 0x8000)) && - !(high == 0xffff && (low & 0x8000))) - { - /* Some of high 16 bits are non-zero */ - if (low & 0x8000) - { - /* Adjust high 16, since load sign-extends low 16*/ - high += 1; - } - - i_type_inst_free (Y_LUI_OP, 1, 0, const_imm_expr (high)); - if (rs != 0) /* Base register */ - { - r_type_inst (Y_ADDU_OP, 1, 1, rs); - } - i_type_inst_free (opcode, rt, 1, lower_bits_of_expr (const_imm_expr (low))); - } - else - { - /* Special case, sign-extension of low 16 bits sets high to 0xffff */ - i_type_inst_free (opcode, rt, rs, const_imm_expr (low)); - } - } - else - { - /* Use $at */ - /* Need to adjust if lower bits are negative */ - i_type_inst_free (Y_LUI_OP, 1, 0, upper_bits_of_expr (expr)); - if (rs != 0) /* Base register */ - { - r_type_inst (Y_ADDU_OP, 1, 1, rs); - } - i_type_inst_free (opcode, rt, 1, lower_bits_of_expr (expr)); - } - } - else if (opcode_is_branch (opcode)) - { - /* This only allows branches +/- 32K, which is not correct! */ - i_type_inst_free (opcode, rt, rs, lower_bits_of_expr (expr)); - } - else - /* Computation instruction */ - { - int offset; - - if (expr->symbol != NULL - && expr->symbol->gp_flag && rs == 0 - && (int32)IMM_MIN <= (offset = expr->symbol->addr + expr->offset) - && offset <= (int32)IMM_MAX) - { - i_type_inst_free ((opcode == Y_LUI_OP ? Y_ADDIU_OP : opcode), - rt, REG_GP, make_imm_expr (offset, NULL, false)); - } - else - { - /* Use $at */ - if ((opcode == Y_ORI_OP - || opcode == Y_ADDI_OP - || opcode == Y_ADDIU_OP - || opcode == Y_LUI_OP) - && rs == 0) - { - produce_immediate(expr, rt, value_known, value); - } - else - { - produce_immediate(expr, 1, value_known, value); - r_type_inst (imm_op_to_op (opcode), rt, rs, 1); - } - } - } -} - - -static void -produce_immediate (imm_expr *expr, int rt, int value_known, int32 value) -{ - if (value_known && (value & 0xffff) == 0) - { - i_type_inst_free (Y_LUI_OP, rt, 0, upper_bits_of_expr (expr)); - } - else if (value_known && (value & 0xffff0000) == 0) - { - i_type_inst_free (Y_ORI_OP, rt, 0, lower_bits_of_expr (expr)); - } - else - { - i_type_inst_free (Y_LUI_OP, 1, 0, upper_bits_of_expr (expr)); - i_type_inst_free (Y_ORI_OP, rt, 1, lower_bits_of_expr(expr)); - } -} - - -/* Return a jump-type instruction with the given OPCODE and TARGET - fields. NB, even the immediate value may not fit in the field, this - routine will not produce more than one instruction. */ - -void -j_type_inst (int opcode, imm_expr *target) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE(inst, opcode); - target->offset = 0; /* Not PC relative */ - target->pc_relative = false; - SET_EXPR (inst, copy_imm_expr (target)); - if (target->symbol == NULL || SYMBOL_IS_DEFINED (target->symbol)) - resolve_a_label (target->symbol, inst); - else - record_inst_uses_symbol (inst, target->symbol); - store_instruction (inst); -} - - -/* Return a register-type instruction with the given OPCODE, RD, RS, and RT - fields. */ - -static instruction * -make_r_type_inst (int opcode, int rd, int rs, int rt) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE(inst, opcode); - SET_RS(inst, rs); - SET_RT(inst, rt); - SET_RD(inst, rd); - SHAMT(inst) = 0; - return (inst); -} - - -/* Return a register-type instruction with the given OPCODE, RD, RS, and RT - fields. */ - -void -r_type_inst (int opcode, int rd, int rs, int rt) -{ - store_instruction (make_r_type_inst (opcode, rd, rs, rt)); -} - - -/* Return a register-type instruction with the given OPCODE, FD, FS, and FT - fields. */ - -void -r_co_type_inst (int opcode, int fd, int fs, int ft) -{ - instruction *inst = make_r_type_inst (opcode, fs, 0, ft); - SET_FD (inst, fd); - store_instruction (inst); -} - - -/* Return a register-shift instruction with the given OPCODE, RD, RT, and - SHAMT fields.*/ - -void -r_sh_type_inst (int opcode, int rd, int rt, int shamt) -{ - instruction *inst = make_r_type_inst (opcode, rd, 0, rt); - SET_SHAMT(inst, shamt & 0x1f); - store_instruction (inst); -} - - -/* Return a floating-point compare instruction with the given OPCODE, - FS, FT, and CC fields.*/ - -void -r_cond_type_inst (int opcode, int fs, int ft, int cc) -{ - instruction *inst = make_r_type_inst (opcode, fs, 0, ft); - SET_FD(inst, cc << 2); - switch (opcode) - { - case Y_C_EQ_D_OP: - case Y_C_EQ_S_OP: - { - SET_COND(inst, COND_EQ); - break; - } - - case Y_C_LE_D_OP: - case Y_C_LE_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_EQ); - break; - } - - case Y_C_LT_D_OP: - case Y_C_LT_S_OP: - { - SET_COND(inst, COND_IN | COND_LT); - break; - } - - case Y_C_NGE_D_OP: - case Y_C_NGE_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_UN); - break; - } - - case Y_C_NGLE_D_OP: - case Y_C_NGLE_S_OP: - { - SET_COND(inst, COND_IN | COND_UN); - break; - } - - case Y_C_NGL_D_OP: - case Y_C_NGL_S_OP: - { - SET_COND(inst, COND_IN | COND_EQ | COND_UN); - break; - } - - case Y_C_NGT_D_OP: - case Y_C_NGT_S_OP: - { - SET_COND(inst, COND_IN | COND_LT | COND_EQ | COND_UN); - break; - } - - case Y_C_OLT_D_OP: - case Y_C_OLT_S_OP: - { - SET_COND(inst, COND_LT); - break; - } - - case Y_C_OLE_D_OP: - case Y_C_OLE_S_OP: - { - SET_COND(inst, COND_LT | COND_EQ); - break; - } - - case Y_C_SEQ_D_OP: - case Y_C_SEQ_S_OP: - { - SET_COND(inst, COND_IN | COND_EQ); - break; - } - - case Y_C_SF_D_OP: - case Y_C_SF_S_OP: - { - SET_COND(inst, COND_IN); - break; - } - - case Y_C_F_D_OP: - case Y_C_F_S_OP: - { - SET_COND(inst, 0); - break; - } - - case Y_C_UEQ_D_OP: - case Y_C_UEQ_S_OP: - { - SET_COND(inst, COND_EQ | COND_UN); - break; - } - - case Y_C_ULT_D_OP: - case Y_C_ULT_S_OP: - { - SET_COND(inst, COND_LT | COND_UN); - break; - } - - case Y_C_ULE_D_OP: - case Y_C_ULE_S_OP: - { - SET_COND(inst, COND_LT | COND_EQ | COND_UN); - break; - } - - case Y_C_UN_D_OP: - case Y_C_UN_S_OP: - { - SET_COND(inst, COND_UN); - break; - } - } - store_instruction (inst); -} - - -/* Make and return a deep copy of INST. */ - -instruction * -copy_inst (instruction *inst) -{ - instruction *new_inst = (instruction *) xmalloc (sizeof (instruction)); - - *new_inst = *inst; - /*memcpy ((void*)new_inst, (void*)inst , sizeof (instruction));*/ - SET_EXPR (new_inst, copy_imm_expr (EXPR (inst))); - return (new_inst); -} - - -void -free_inst (instruction *inst) -{ - if (inst != break_inst) - /* Don't free the breakpoint insructions since we only have one. */ - { - if (EXPR (inst)) - free (EXPR (inst)); - free (inst); - } -} - - - -/* Maintain a table mapping from opcode to instruction name and - instruction type. - - Table must be sorted before first use since its entries are - alphabetical on name, not ordered by opcode. */ - - -/* Sort all instruction table before first use. */ - -void -initialize_inst_tables () -{ - sort_name_table (); - sort_i_opcode_table (); - sort_a_opcode_table (); -} - - -/* Map from opcode -> name/type. */ - -static name_val_val name_tbl [] = { -#undef OP -#define OP(NAME, OPCODE, TYPE, R_OPCODE) {NAME, OPCODE, TYPE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the opcode value). */ - -static void -sort_name_table () -{ - qsort (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - -/* Compare the VALUE1 field of two NAME_VAL_VAL entries in the format - required by qsort. */ - -static int -compare_pair_value (name_val_val *p1, name_val_val *p2) -{ - if (p1->value1 < p2->value1) - return (-1); - else if (p1->value1 > p2->value1) - return (1); - else - return (0); -} - - -/* Print the instruction stored at the memory ADDRESS. */ - -void -print_inst (mem_addr addr) -{ - char* inst_str = inst_to_string (addr); - write_output (message_out, inst_str); - free (inst_str); -} - - -char* -inst_to_string(mem_addr addr) -{ - reg_image_t ®_image = reg_images[0]; - - str_stream ss; - instruction *inst; - - reg_image.exception_occurred = 0; - inst = read_mem_inst (0, addr); - - if (reg_image.exception_occurred) - { - error ("Can't print instruction not in text segment (0x%08x)\n", addr); - return ""; - } - - ss_init (&ss); - format_an_inst (&ss, inst, addr); - return ss_to_string (&ss); -} - - -void -format_an_inst (str_stream *ss, instruction *inst, mem_addr addr) -{ - name_val_val *entry; - int line_start = ss_length (ss); - - if (inst_is_breakpoint (addr)) - { - delete_breakpoint (addr); - ss_printf (ss, "*"); - format_an_inst (ss, read_mem_inst (0, addr), addr); - add_breakpoint (addr); - return; - } - - ss_printf (ss, "[0x%08x]\t", addr); - if (inst == NULL) - { - ss_printf (ss, "\n"); - return; - } - - entry = map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - OPCODE (inst)); - if (entry == NULL) - { - ss_printf (ss, "\n", OPCODE (inst)); - return; - } - - ss_printf (ss, "0x%08x %s", (uint32)ENCODING (inst), entry->name); - switch (entry->value2) - { - case BC_TYPE_INST: - ss_printf (ss, "%d %d", CC (inst), IDISP (inst)); - break; - - case B1_TYPE_INST: - ss_printf (ss, " $%d %d", RS (inst), IDISP (inst)); - break; - - case I1s_TYPE_INST: - ss_printf (ss, " $%d, %d", RS (inst), IMM (inst)); - break; - - case I1t_TYPE_INST: - ss_printf (ss, " $%d, %d", RT (inst), IMM (inst)); - break; - - case I2_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RT (inst), RS (inst), IMM (inst)); - break; - - case B2_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RS (inst), RT (inst), IDISP (inst)); - break; - - case I2a_TYPE_INST: - ss_printf (ss, " $%d, %d($%d)", RT (inst), IMM (inst), BASE (inst)); - break; - - case R1s_TYPE_INST: - ss_printf (ss, " $%d", RS (inst)); - break; - - case R1d_TYPE_INST: - ss_printf (ss, " $%d", RD (inst)); - break; - - case R2td_TYPE_INST: - ss_printf (ss, " $%d, $%d", RT (inst), RD (inst)); - break; - - case R2st_TYPE_INST: - ss_printf (ss, " $%d, $%d", RS (inst), RT (inst)); - break; - - case R2ds_TYPE_INST: - ss_printf (ss, " $%d, $%d", RD (inst), RS (inst)); - break; - - case R2sh_TYPE_INST: - if (ENCODING (inst) == 0) - { - ss_erase (ss, 3); /* zap sll */ - ss_printf (ss, "nop"); - } - else - ss_printf (ss, " $%d, $%d, %d", RD (inst), RT (inst), SHAMT (inst)); - break; - - case R3_TYPE_INST: - ss_printf (ss, " $%d, $%d, $%d", RD (inst), RS (inst), RT (inst)); - break; - - case R3sh_TYPE_INST: - ss_printf (ss, " $%d, $%d, $%d", RD (inst), RT (inst), RS (inst)); - break; - - case FP_I2a_TYPE_INST: - ss_printf (ss, " $f%d, %d($%d)", FT (inst), IMM (inst), BASE (inst)); - break; - - case FP_R2ds_TYPE_INST: - ss_printf (ss, " $f%d, $f%d", FD (inst), FS (inst)); - break; - - case FP_R2ts_TYPE_INST: - ss_printf (ss, " $%d, $f%d", RT (inst), FS (inst)); - break; - - case FP_CMP_TYPE_INST: - if (FD (inst) == 0) - ss_printf (ss, " $f%d, $f%d", FS (inst), FT (inst)); - else - ss_printf (ss, " %d, $f%d, $f%d", FD (inst) >> 2, FS (inst), FT (inst)); - break; - - case FP_R3_TYPE_INST: - ss_printf (ss, " $f%d, $f%d, $f%d", FD (inst), FS (inst), FT (inst)); - break; - - case MOVC_TYPE_INST: - ss_printf (ss, " $%d, $%d, %d", RD (inst), RS (inst), RT (inst) >> 2); - break; - - case FP_MOVC_TYPE_INST: - ss_printf (ss, " $f%d, $f%d, %d", FD (inst), FS (inst), CC (inst)); - break; - - case J_TYPE_INST: - ss_printf (ss, " 0x%08x", TARGET (inst) << 2); - break; - - case NOARG_TYPE_INST: - break; - - default: - fatal_error ("Unknown instruction type in print_inst\n"); - } - - if (EXPR (inst) != NULL && EXPR (inst)->symbol != NULL) - { - ss_printf (ss, " ["); - if (opcode_is_load_store (OPCODE (inst))) - format_imm_expr (ss, EXPR (inst), BASE (inst)); - else - format_imm_expr (ss, EXPR (inst), -1); - ss_printf (ss, "]"); - } - - if (SOURCE (inst) != NULL) - { - /* Comment is source line text of current line. */ - int gap_length = 57 - (ss_length (ss) - line_start); - for ( ; 0 < gap_length; gap_length -= 1) - { - ss_printf (ss, " "); - } - - ss_printf (ss, "; "); - ss_printf (ss, "%s", SOURCE (inst)); - } - - ss_printf (ss, "\n"); -} - - - -/* Return true if SPIM OPCODE (e.g. Y_...) represents a conditional - branch. */ - -bool -opcode_is_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1F_OP: - case Y_BC1FL_OP: - case Y_BC1T_OP: - case Y_BC1TL_OP: - case Y_BC2F_OP: - case Y_BC2FL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - case Y_BEQ_OP: - case Y_BEQL_OP: - case Y_BEQZ_POP: - case Y_BGE_POP: - case Y_BGEU_POP: - case Y_BGEZ_OP: - case Y_BGEZAL_OP: - case Y_BGEZALL_OP: - case Y_BGEZL_OP: - case Y_BGT_POP: - case Y_BGTU_POP: - case Y_BGTZ_OP: - case Y_BGTZL_OP: - case Y_BLE_POP: - case Y_BLEU_POP: - case Y_BLEZ_OP: - case Y_BLEZL_OP: - case Y_BLT_POP: - case Y_BLTU_POP: - case Y_BLTZ_OP: - case Y_BLTZAL_OP: - case Y_BLTZALL_OP: - case Y_BLTZL_OP: - case Y_BNE_OP: - case Y_BNEL_OP: - case Y_BNEZ_POP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE represents a nullified (e.g., Y_...L_OP) - conditional branch. */ - -bool -opcode_is_nullified_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1FL_OP: - case Y_BC1TL_OP: - case Y_BC2FL_OP: - case Y_BC2TL_OP: - case Y_BEQL_OP: - case Y_BGEZALL_OP: - case Y_BGEZL_OP: - case Y_BGTZL_OP: - case Y_BLEZL_OP: - case Y_BLTZALL_OP: - case Y_BLTZL_OP: - case Y_BNEL_OP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE (e.g. Y_...) represents a conditional - branch on a true condition. */ - -bool -opcode_is_true_branch (int opcode) -{ - switch (opcode) - { - case Y_BC1T_OP: - case Y_BC1TL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - return true; - - default: - return false; - } -} - - -/* Return true if SPIM OPCODE (e.g. Y_...) is a direct unconditional - branch (jump). */ - -bool -opcode_is_jump (int opcode) -{ - switch (opcode) - { - case Y_J_OP: - case Y_JAL_OP: - return true; - - default: - return false; - } -} - -/* Return true if SPIM OPCODE (e.g. Y_...) is a load or store. */ - -bool -opcode_is_load_store (int opcode) -{ - switch (opcode) - { - case Y_LB_OP: - case Y_LBU_OP: - case Y_LH_OP: - case Y_LHU_OP: - case Y_LL_OP: - case Y_LDC1_OP: - case Y_LDC2_OP: - case Y_LW_OP: - case Y_LWC1_OP: - case Y_LWC2_OP: - case Y_LWL_OP: - case Y_LWR_OP: - case Y_SB_OP: - case Y_SC_OP: - case Y_SH_OP: - case Y_SDC1_OP: - case Y_SDC2_OP: - case Y_SW_OP: - case Y_SWC1_OP: - case Y_SWC2_OP: - case Y_SWL_OP: - case Y_SWR_OP: - return true; - - default: - return false; - } -} - - -/* Return true if a breakpoint is set at ADDR. */ - -bool -inst_is_breakpoint (mem_addr addr) -{ - bkpt *trav = bkpts; - while (trav != NULL) { - if (trav->addr == addr) { - return 1; - } - trav = trav->next; - } - return false; -} - - -/* An immediate expression has the form: SYMBOL +/- IOFFSET, where either - part may be omitted. */ - -/* Make and return a new immediate expression */ - -imm_expr * -make_imm_expr (int offs, char *sym, bool is_pc_relative) -{ - imm_expr *expr = (imm_expr *) xmalloc (sizeof (imm_expr)); - - expr->offset = offs; - expr->bits = 0; - expr->pc_relative = is_pc_relative; - if (sym != NULL) - expr->symbol = lookup_label (sym); - else - expr->symbol = NULL; - return (expr); -} - - -/* Return a shallow copy of the EXPRESSION. */ - -imm_expr * -copy_imm_expr (imm_expr *old_expr) -{ - imm_expr *expr = (imm_expr *) xmalloc (sizeof (imm_expr)); - - *expr = *old_expr; - /*memcpy ((void*)expr, (void*)old_expr, sizeof (imm_expr));*/ - return (expr); -} - - -/* Return a shallow copy of an EXPRESSION that only uses the upper - sixteen bits of the expression's value. */ - -imm_expr * -upper_bits_of_expr (imm_expr *old_expr) -{ - imm_expr *expr = copy_imm_expr (old_expr); - - expr->bits = 1; - return (expr); -} - - -/* Return a shallow copy of the EXPRESSION that only uses the lower - sixteen bits of the expression's value. */ - -imm_expr * -lower_bits_of_expr (imm_expr *old_expr) -{ - imm_expr *expr = copy_imm_expr (old_expr); - - expr->bits = -1; - return (expr); -} - - -/* Return an instruction expression for a constant VALUE. */ - -imm_expr * -const_imm_expr (int32 value) -{ - return (make_imm_expr (value, NULL, false)); -} - - -/* Return a shallow copy of the EXPRESSION with the offset field - incremented by the given amount. */ - -imm_expr * -incr_expr_offset (imm_expr *expr, int32 value) -{ - imm_expr *new_expr = copy_imm_expr (expr); - - new_expr->offset += value; - return (new_expr); -} - - -/* Return the value of the EXPRESSION. */ - -int32 -eval_imm_expr (imm_expr *expr) -{ - int32 value; - - if (expr->symbol == NULL) - value = expr->offset; - else if (SYMBOL_IS_DEFINED (expr->symbol)) - { - value = expr->offset + expr->symbol->addr; - } - else - { - error ("Evaluated undefined symbol: %s\n", expr->symbol->name); - value = 0; - } - if (expr->bits > 0) - return ((value >> 16) & 0xffff); /* Use upper bits of result */ - else if (expr->bits < 0) - return (value & 0xffff); /* Use lower bits */ - else - return (value); -} - - -/* Print the EXPRESSION. */ - -static void -format_imm_expr (str_stream *ss, imm_expr *expr, int base_reg) -{ - if (expr->symbol != NULL) - { - ss_printf (ss, "%s", expr->symbol->name); - } - - if (expr->pc_relative) - ss_printf (ss, "-0x%08x", (unsigned int)-expr->offset); - else if (expr->offset < -10) - ss_printf (ss, "-%d (-0x%08x)", -expr->offset, (unsigned int)-expr->offset); - else if (expr->offset > 10) - ss_printf (ss, "+%d (0x%08x)", expr->offset, (unsigned int)expr->offset); - - if (base_reg != -1 && expr->symbol != NULL && - (expr->offset > 10 || expr->offset < -10)) - { - if (expr->offset == 0 && base_reg != 0) - ss_printf (ss, "+0"); - - if (expr->offset != 0 || base_reg != 0) - ss_printf (ss, "($%d)", base_reg); - } -} - - -/* Return true if the EXPRESSION is a constant 0. */ - -bool -is_zero_imm (imm_expr *expr) -{ - return (expr->offset == 0 && expr->symbol == NULL); -} - - - -/* Return an address expression of the form SYMBOL +/- IOFFSET (REGISTER). - Any of the three parts may be omitted. */ - -addr_expr * -make_addr_expr (int offs, char *sym, int reg_no) -{ - addr_expr *expr = (addr_expr *) xmalloc (sizeof (addr_expr)); - label *lab; - - if (reg_no == 0 && sym != NULL && (lab = lookup_label (sym))->gp_flag) - { - expr->reg_no = REG_GP; - expr->imm = make_imm_expr (offs + lab->addr - mem_images[current_image].gp_midpoint, NULL, false); - } - else - { - expr->reg_no = (unsigned char)reg_no; - expr->imm = make_imm_expr (offs, (sym ? str_copy (sym) : sym), false); - } - return (expr); -} - - -imm_expr * -addr_expr_imm (addr_expr *expr) -{ - return (expr->imm); -} - - -int -addr_expr_reg (addr_expr *expr) -{ - return (expr->reg_no); -} - - - -/* Map between a SPIM instruction and the binary representation of the - instruction. */ - - -/* Maintain a table mapping from internal opcode (i_opcode) to actual - opcode (a_opcode). Table must be sorted before first use since its - entries are alphabetical on name, not ordered by opcode. */ - - -/* Map from internal opcode -> real opcode */ - -static name_val_val i_opcode_tbl [] = { -#undef OP -#define OP(NAME, I_OPCODE, TYPE, A_OPCODE) {NAME, I_OPCODE, (int)A_OPCODE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the interal opcode value). */ - -static void -sort_i_opcode_table () -{ - qsort (i_opcode_tbl, - sizeof (i_opcode_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - -#define REGS(R,O) (((R) & 0x1f) << O) - - -int32 -inst_encode (instruction *inst, bool correct_branches) -{ - int32 a_opcode = 0; - name_val_val *entry; - - if (inst == NULL) - return (0); - - entry = map_int_to_name_val_val (i_opcode_tbl, - sizeof (i_opcode_tbl) / sizeof (name_val_val), - OPCODE (inst)); - if (entry == NULL) - return 0; - - a_opcode = entry->value2; - entry = map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - OPCODE (inst)); - - switch (entry->value2) - { - case BC_TYPE_INST: - return (a_opcode - | REGS (CC (inst) << 2, 16) - | ((IOFFSET (inst) - correct_branches) & 0xffff)); - - case B1_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | ((IOFFSET (inst) - correct_branches) & 0xffff)); - - case I1s_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | (IMM (inst) & 0xffff)); - - case I1t_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | (IMM (inst) & 0xffff)); - - case I2_TYPE_INST: - case B2_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | ((IOFFSET (inst) - correct_branches) & 0xffff)); - - case I2a_TYPE_INST: - return (a_opcode - | REGS (BASE (inst), 21) - | REGS (RT (inst), 16) - | (IOFFSET (inst) & 0xffff)); - - case R1s_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21)); - - case R1d_TYPE_INST: - return (a_opcode - | REGS (RD (inst), 11)); - - case R2td_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case R2st_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16)); - - case R2ds_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RD (inst), 11)); - - case R2sh_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (RD (inst), 11) - | REGS (SHAMT (inst), 6)); - - case R3_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case R3sh_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case FP_I2a_TYPE_INST: - return (a_opcode - | REGS (BASE (inst), 21) - | REGS (RT (inst), 16) - | (IOFFSET (inst) & 0xffff)); - - case FP_R2ds_TYPE_INST: - return (a_opcode - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case FP_R2ts_TYPE_INST: - return (a_opcode - | REGS (RT (inst), 16) - | REGS (FS (inst), 11)); - - case FP_CMP_TYPE_INST: - return (a_opcode - | REGS (FT (inst), 16) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6) - | COND (inst)); - - case FP_R3_TYPE_INST: - return (a_opcode - | REGS (FT (inst), 16) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case MOVC_TYPE_INST: - return (a_opcode - | REGS (RS (inst), 21) - | REGS (RT (inst), 16) - | REGS (RD (inst), 11)); - - case FP_MOVC_TYPE_INST: - return (a_opcode - | REGS (CC (inst), 18) - | REGS (FS (inst), 11) - | REGS (FD (inst), 6)); - - case J_TYPE_INST: - return (a_opcode - | TARGET (inst)); - - case NOARG_TYPE_INST: - return (a_opcode); - - default: - fatal_error ("Unknown instruction type in inst_encoding\n"); - return (0); /* Not reached */ - } -} - - -/* Maintain a table mapping from actual opcode to interal opcode. - Table must be sorted before first use since its entries are - alphabetical on name, not ordered by opcode. */ - - -/* Map from internal opcode -> real opcode */ - -static name_val_val a_opcode_tbl [] = { -#undef OP -#define OP(NAME, I_OPCODE, TYPE, A_OPCODE) {NAME, (int)A_OPCODE, (int)I_OPCODE}, -#include "op.h" -}; - - -/* Sort the opcode table on their key (the interal opcode value). */ - -static void -sort_a_opcode_table () -{ - qsort (a_opcode_tbl, - sizeof (a_opcode_tbl) / sizeof (name_val_val), - sizeof (name_val_val), - (QSORT_FUNC) compare_pair_value); -} - - - -instruction * -inst_decode (int32 val) -{ - int32 a_opcode = val & 0xfc000000; - name_val_val *entry; - int32 i_opcode; - - /* Field classes: (opcode is continued in other part of instruction): */ - if (a_opcode == 0 || a_opcode == 0x70000000) /* SPECIAL or SPECIAL2 */ - a_opcode |= (val & 0x3f); - else if (a_opcode == 0x04000000) /* REGIMM */ - a_opcode |= (val & 0x001f0000); - else if (a_opcode == 0x40000000) /* COP0 */ - a_opcode |= (val & 0x03e00000) | (val & 0x1f); - else if (a_opcode == 0x44000000) /* COP1 */ - { - a_opcode |= (val & 0x03e00000); - if ((val & 0xff000000) == 0x45000000) - a_opcode |= (val & 0x00010000); /* BC1f/t */ - else - a_opcode |= (val & 0x3f); - } - else if (a_opcode == 0x48000000 /* COPz */ - || a_opcode == 0x4c000000) - a_opcode |= (val & 0x03e00000); - - - entry = map_int_to_name_val_val (a_opcode_tbl, - sizeof (a_opcode_tbl) / sizeof (name_val_val), - a_opcode); - if (entry == NULL) - return (mk_r_inst (val, 0, 0, 0, 0, 0)); /* Invalid inst */ - - i_opcode = entry->value2; - - switch (map_int_to_name_val_val (name_tbl, - sizeof (name_tbl) / sizeof (name_val_val), - i_opcode)->value2) - { - case BC_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case B1_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), 0, val & 0xffff)); - - case I1s_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), 0, val & 0xffff)); - - case I1t_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case I2_TYPE_INST: - case B2_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case I2a_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), - val & 0xffff)); - - case R1s_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), 0, 0, 0)); - - case R1d_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, 0, BIN_RD(val), 0)); - - case R2td_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_RD(val), 0)); - - case R2st_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), 0, 0)); - - case R2ds_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), 0, BIN_RD(val), 0)); - - case R2sh_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_RD(val), BIN_SA(val))); - - case R3_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case R3sh_TYPE_INST: - return(mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case FP_I2a_TYPE_INST: - return (mk_i_inst (val, i_opcode, BIN_BASE(val), BIN_FT(val), val & 0xffff)); - - case FP_R2ds_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_FS(val), 0, BIN_FD(val), 0)); - - case FP_R2ts_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, BIN_RT(val), BIN_FS(val), 0)); - - case FP_CMP_TYPE_INST: - { - instruction *inst = mk_r_inst (val, i_opcode, BIN_FS (val), BIN_FT (val), BIN_FD(val), 0); - SET_COND (inst, val & 0xf); - return (inst); - } - - case FP_R3_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_FS(val), BIN_FT(val), BIN_FD(val), 0)); - - case MOVC_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_RS(val), BIN_RT(val), BIN_RD(val), 0)); - - case FP_MOVC_TYPE_INST: - return (mk_r_inst (val, i_opcode, BIN_FS(val), BIN_RT(val), BIN_FD(val), 0)); - - case J_TYPE_INST: - return (mk_j_inst (val, i_opcode, val & 0x2ffffff)); - - - case NOARG_TYPE_INST: - return (mk_r_inst (val, i_opcode, 0, 0, 0, 0)); - - default: - return (mk_r_inst (val, 0, 0, 0, 0, 0)); /* Invalid inst */ - } -} - - -static instruction * -mk_r_inst (int32 val, int opcode, int rs, int rt, int rd, int shamt) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_RD (inst, rd); - SET_SHAMT (inst, shamt); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - - -static instruction * -mk_i_inst (int32 val, int opcode, int rs, int rt, int offset) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_RS (inst, rs); - SET_RT (inst, rt); - SET_IOFFSET (inst, offset); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - -static instruction * -mk_j_inst (int32 val, int opcode, int target) -{ - instruction *inst = (instruction *) zmalloc (sizeof (instruction)); - - SET_OPCODE (inst, opcode); - SET_TARGET (inst, target); - SET_ENCODING (inst, val); - SET_EXPR (inst, NULL); - return (inst); -} - - - -/* Code to test encode/decode of instructions. */ - -void -test_assembly (instruction *inst) -{ - instruction *new_inst = inst_decode (inst_encode (inst)); - - inst_cmp (inst, new_inst); - free_inst (new_inst); -} - - -static void -inst_cmp (instruction *inst1, instruction *inst2) -{ - static str_stream ss; - - ss_clear (&ss); - if (memcmp (inst1, inst2, sizeof (instruction) - 4) != 0) - { - ss_printf (&ss, "=================== Not Equal ===================\n"); - format_an_inst (&ss, inst1, 0); - format_an_inst (&ss, inst2, 0); - ss_printf (&ss, "=================== Not Equal ===================\n"); - } -} diff --git a/spim-qtspimbot/CPU/inst.h b/spim-qtspimbot/CPU/inst.h deleted file mode 100755 index d848f39..0000000 --- a/spim-qtspimbot/CPU/inst.h +++ /dev/null @@ -1,280 +0,0 @@ -/* SPIM S20 MIPS simulator. - Description of a SPIM S20 instruction. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef INST_H -#define INST_H - -#include "spim.h" -#include "string-stream.h" - - -/* Represenation of the expression that produce a value for an instruction's - immediate field. Immediates have the form: label +/- offset. */ - -typedef struct immexpr -{ - int offset; /* Offset from symbol */ - struct lab *symbol; /* Symbolic label */ - short bits; /* > 0 => 31..16, < 0 => 15..0 */ - bool pc_relative; /* => offset from label in code */ -} imm_expr; - - -/* Representation of the expression that produce an address for an - instruction. Address have the form: label +/- offset (register). */ - -typedef struct addrexpr -{ - unsigned char reg_no; /* Register number */ - imm_expr *imm; /* The immediate part */ -} addr_expr; - - - -/* Representation of an instruction. Store the instruction fields in an - overlapping manner similar to the real encoding (but not identical, to - speed decoding in C code, as opposed to hardware).. */ - -typedef struct inst_s -{ - short opcode; - - union - { - /* R-type or I-type: */ - struct - { - unsigned char rs; - unsigned char rt; - - union - { - short imm; - - struct - { - unsigned char rd; - unsigned char shamt; - } r; - } r_i; - } r_i; - - /* J-type: */ - mem_addr target; - } r_t; - - int32 encoding; - imm_expr *expr; - char *source_line; -} instruction; - - -#define OPCODE(INST) (INST)->opcode -#define SET_OPCODE(INST, VAL) (INST)->opcode = (short)(VAL) - - -#define RS(INST) (INST)->r_t.r_i.rs -#define SET_RS(INST, VAL) (INST)->r_t.r_i.rs = (unsigned char)(VAL) - -#define RT(INST) (INST)->r_t.r_i.rt -#define SET_RT(INST, VAL) (INST)->r_t.r_i.rt = (unsigned char)(VAL) - -#define RD(INST) (INST)->r_t.r_i.r_i.r.rd -#define SET_RD(INST, VAL) (INST)->r_t.r_i.r_i.r.rd = (unsigned char)(VAL) - - -#define FS(INST) RD(INST) -#define SET_FS(INST, VAL) SET_RD(INST, VAL) - -#define FT(INST) RT(INST) -#define SET_FT(INST, VAL) SET_RT(INST, VAL) - -#define FD(INST) SHAMT(INST) -#define SET_FD(INST, VAL) SET_SHAMT(INST, VAL) - - -#define SHAMT(INST) (INST)->r_t.r_i.r_i.r.shamt -#define SET_SHAMT(INST, VAL) (INST)->r_t.r_i.r_i.r.shamt = (unsigned char)(VAL) - -#define IMM(INST) (INST)->r_t.r_i.r_i.imm -#define SET_IMM(INST, VAL) (INST)->r_t.r_i.r_i.imm = (short)(VAL) - - -#define BASE(INST) RS(INST) -#define SET_BASE(INST, VAL) SET_RS(INST, VAL) - -#define IOFFSET(INST) IMM(INST) -#define SET_IOFFSET(INST, VAL) SET_IMM(INST, VAL) -#define IDISP(INST) (SIGN_EX (IOFFSET (INST) << 2)) - - -#define COND(INST) RS(INST) -#define SET_COND(INST, VAL) SET_RS(INST, VAL) - -#define CC(INST) (RT(INST) >> 2) -#define ND(INST) ((RT(INST) & 0x2) >> 1) -#define TF(INST) (RT(INST) & 0x1) - - -#define TARGET(INST) (INST)->r_t.target -#define SET_TARGET(INST, VAL) (INST)->r_t.target = (mem_addr)(VAL) - -#define ENCODING(INST) (INST)->encoding -#define SET_ENCODING(INST, VAL) (INST)->encoding = (int32)(VAL) - -#define EXPR(INST) (INST)->expr -#define SET_EXPR(INST, VAL) (INST)->expr = (imm_expr*)(VAL) - -#define SOURCE(INST) (INST)->source_line -#define SET_SOURCE(INST, VAL) (INST)->source_line = (char *)(VAL) - - -#define COND_UN 0x1 -#define COND_EQ 0x2 -#define COND_LT 0x4 -#define COND_IN 0x8 - -/* Minimum and maximum values that fit in instruction's imm field */ -#define IMM_MIN 0xffff8000 -#define IMM_MAX 0x00007fff - -#define UIMM_MIN (unsigned)0 -#define UIMM_MAX ((unsigned)((1<<16)-1)) - -#define RAISE_EXCEPTION(REGIMAGE, CAUSE, MISC) \ - { \ - if (((CAUSE) != ExcCode_Int) && spimbot_tournament) { \ - robots[(REGIMAGE).context].done = 1; \ - } else { \ - raise_exception((REGIMAGE).context, (CAUSE)); \ - MISC; \ - } \ - } \ - - -#define RAISE_INTERRUPT(REGIMAGE, LEVEL) \ - { \ - /* Set IP (pending) bit for interrupt level. */ \ - CP0_Cause(REGIMAGE) |= (1 << ((LEVEL) + 8)); \ - } \ - -#define CLEAR_INTERRUPT(REGIMAGE, LEVEL) \ - { \ - /* Clear IP (pending) bit for interrupt level. */ \ - CP0_Cause(REGIMAGE) &= ~(1 << ((LEVEL) + 8)); \ - } \ - -/* Recognized exceptions: */ - -#define ExcCode_Int 0 /* Interrupt */ -#define ExcCode_Mod 1 /* TLB modification (not implemented) */ -#define ExcCode_TLBL 2 /* TLB exception (not implemented) */ -#define ExcCode_TLBS 3 /* TLB exception (not implemented) */ -#define ExcCode_AdEL 4 /* Address error (load/fetch) */ -#define ExcCode_AdES 5 /* Address error (store) */ -#define ExcCode_IBE 6 /* Bus error, instruction fetch */ -#define ExcCode_DBE 7 /* Bus error, data reference */ -#define ExcCode_Sys 8 /* Syscall exception */ -#define ExcCode_Bp 9 /* Breakpoint exception */ -#define ExcCode_RI 10 /* Reserve instruction */ -#define ExcCode_CpU 11 /* Coprocessor unusable */ -#define ExcCode_Ov 12 /* Arithmetic overflow */ -#define ExcCode_Tr 13 /* Trap */ -#define ExcCode_FPE 15 /* Floating point */ -#define ExcCode_C2E 18 /* Coprocessor 2 (not impelemented) */ -#define ExcCode_MDMX 22 /* MDMX unusable (not implemented) */ -#define ExcCode_WATCH 23 /* Reference to Watch (not impelemented) */ -#define ExcCode_MCheck 24 /* Machine check (not implemented) */ -#define ExcCode_CacheErr 30 /* Cache error (not impelemented) */ - -#define LAST_REAL_EXCEPT ExcCode_CacheErr - - - -/* Fields in binary representation of instructions: */ - -#define BIN_REG(V,O) (((V) >> O) & 0x1f) -#define BIN_RS(V) (BIN_REG(V, 21)) -#define BIN_RT(V) (BIN_REG(V, 16)) -#define BIN_RD(V) (BIN_REG(V, 11)) -#define BIN_SA(V) (BIN_REG(V, 6)) - -#define BIN_BASE(V) (BIN_REG(V, 21)) -#define BIN_FT(V) (BIN_REG(V, 16)) -#define BIN_FS(V) (BIN_REG(V, 11)) -#define BIN_FD(V) (BIN_REG(V, 6)) - - - -/* Exported functions: */ - -imm_expr *addr_expr_imm (addr_expr *expr); -int addr_expr_reg (addr_expr *expr); -imm_expr *const_imm_expr (int32 value); -imm_expr *copy_imm_expr (imm_expr *old_expr); -instruction *copy_inst (instruction *inst); -mem_addr current_text_pc (); -int32 eval_imm_expr (imm_expr *expr); -void format_an_inst (str_stream *ss, instruction *inst, mem_addr addr); -void free_inst (instruction *inst); -void i_type_inst (int opcode, int rt, int rs, imm_expr *expr); -void i_type_inst_free (int opcode, int rt, int rs, imm_expr *expr); -void increment_text_pc (int delta); -imm_expr *incr_expr_offset (imm_expr *expr, int32 value); -void initialize_inst_tables (); -instruction *inst_decode (int32 value); -int32 inst_encode (instruction *inst, bool correct_branches = false); -bool inst_is_breakpoint (mem_addr addr); -void j_type_inst (int opcode, imm_expr *target); -void k_text_begins_at_point (size_t context, mem_addr addr); -imm_expr *lower_bits_of_expr (imm_expr *old_expr); -addr_expr *make_addr_expr (int offs, char *sym, int reg_no); -imm_expr *make_imm_expr (int offs, char *sym, bool is_pc_relative); -bool opcode_is_branch (int opcode); -bool opcode_is_nullified_branch (int opcode); -bool opcode_is_true_branch (int opcode); -bool opcode_is_jump (int opcode); -bool opcode_is_load_store (int opcode); -void print_inst (mem_addr addr); -char* inst_to_string (mem_addr addr); -void r_co_type_inst (int opcode, int fd, int fs, int ft); -void r_cond_type_inst (int opcode, int fs, int ft, int cc); -void r_sh_type_inst (int opcode, int rd, int rt, int shamt); -void r_type_inst (int opcode, int rd, int rs, int rt); -void raise_exception(size_t context, int excode); -void store_instruction (instruction *inst); -void text_begins_at_point (size_t context, mem_addr addr); -imm_expr *upper_bits_of_expr (imm_expr *old_expr); -void user_kernel_text_segment (bool to_kernel); -bool is_zero_imm (imm_expr *expr); - -#endif diff --git a/spim-qtspimbot/CPU/mem.cpp b/spim-qtspimbot/CPU/mem.cpp deleted file mode 100755 index 5e0cae0..0000000 --- a/spim-qtspimbot/CPU/mem.cpp +++ /dev/null @@ -1,882 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to create, maintain and access memory. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" - -#include "../Spimbot/robot.h" - -extern char* prof_file_name; - -/* Exported Variables: */ - -mem_image_t mem_images[2]; - - -/* Local functions: */ - -static mem_word bad_mem_read (size_t context, mem_addr addr, int mask); -static void bad_mem_write (size_t context, mem_addr addr, mem_word value, int mask); -static instruction *bad_text_read (size_t context, mem_addr addr); -static void bad_text_write (size_t context, mem_addr addr, instruction *inst); -static void free_instructions (instruction **inst, int n); - - -/* Local variables: */ - -static int32 data_size_limit, stack_size_limit, k_data_size_limit; - - - -/* Memory is allocated in five chunks: - text, data, stack, kernel text, and kernel data. - - The arrays are independent and have different semantics. - - text is allocated from 0x400000 up and only contains INSTRUCTIONs. - It does not expand. - - data is allocated from 0x10000000 up. It can be extended by the - SBRK system call. Programs can only read and write this segment. - - stack grows from 0x7fffefff down. It is automatically extended. - Programs can only read and write this segment. - - k_text is like text, except its is allocated from 0x80000000 up. - - k_data is like data, but is allocated from 0x90000000 up. - - Both kernel text and kernel data can only be accessed in kernel mode. -*/ - -/* The text segments contain pointers to instructions, not actual - instructions, so they must be allocated large enough to hold as many - pointers as there would be instructions (the two differ on machines in - which pointers are not 32 bits long). The following calculations round - up in case size is not a multiple of BYTES_PER_WORD. */ - -#define BYTES_TO_INST(N) (((N) + BYTES_PER_WORD - 1) / BYTES_PER_WORD * sizeof(instruction*)) - - -void -make_memory (size_t context, int text_size, int data_size, int data_limit, - int stack_size, int stack_limit, int k_text_size, - int k_data_size, int k_data_limit) -{ - mem_image_t &mem_image = mem_images[context]; - - if (data_size <= 65536) - data_size = 65536; - data_size = ROUND_UP(data_size, BYTES_PER_WORD); /* Keep word aligned */ - - if (mem_image.text_seg == NULL) { - mem_image.text_seg = (instruction **) xmalloc (BYTES_TO_INST(text_size)); - mem_image.text_prof = (unsigned *) xmalloc(text_size); - } - else - { - free_instructions (mem_image.text_seg, (mem_image.text_top - TEXT_BOT) / BYTES_PER_WORD); - mem_image.text_seg = (instruction **) realloc (mem_image.text_seg, BYTES_TO_INST(text_size)); - mem_image.text_prof = (unsigned *)realloc(mem_image.text_prof,text_size); - } - memclr (mem_image.text_seg, BYTES_TO_INST(text_size)); - memclr(mem_image.text_prof,text_size); - mem_image.text_top = TEXT_BOT + text_size; - - data_size = ROUND_UP(data_size, BYTES_PER_WORD); /* Keep word aligned */ - if (mem_image.data_seg == NULL) - mem_image.data_seg = (mem_word *) xmalloc (data_size); - else - mem_image.data_seg = (mem_word *) realloc (mem_image.data_seg, data_size); - memclr (mem_image.data_seg, data_size); - mem_image.data_seg_b = (BYTE_TYPE *) mem_image.data_seg; - mem_image.data_seg_h = (short *) mem_image.data_seg; - mem_image.data_top = DATA_BOT + data_size; - data_size_limit = data_limit; - - stack_size = ROUND_UP(stack_size, BYTES_PER_WORD); /* Keep word aligned */ - if (mem_image.stack_seg == NULL) - mem_image.stack_seg = (mem_word *) xmalloc (stack_size); - else - mem_image.stack_seg = (mem_word *) realloc (mem_image.stack_seg, stack_size); - memclr (mem_image.stack_seg, stack_size); - mem_image.stack_seg_b = (BYTE_TYPE *) mem_image.stack_seg; - mem_image.stack_seg_h = (short *) mem_image.stack_seg; - mem_image.stack_bot = STACK_TOP - stack_size; - stack_size_limit = stack_limit; - - if (mem_image.special_seg == NULL) { - mem_image.special_seg = (mem_word *) xmalloc (SPECIAL_TOP - SPECIAL_BOT); - mem_image.special_seg_b = (BYTE_TYPE *) mem_image.special_seg; - mem_image.special_seg_h = (short *) mem_image.special_seg; - } - memclr (mem_image.special_seg, (SPECIAL_TOP - SPECIAL_BOT)); - - if (mem_image.k_text_seg == NULL){ - mem_image.k_text_seg = (instruction **) xmalloc (BYTES_TO_INST(k_text_size)); - mem_image.k_text_prof = (unsigned *) xmalloc(k_text_size); - } - else - { - free_instructions (mem_image.k_text_seg, - (mem_image.k_text_top - K_TEXT_BOT) / BYTES_PER_WORD); - mem_image.k_text_seg = (instruction **) realloc(mem_image.k_text_seg, - BYTES_TO_INST(k_text_size)); - mem_image.k_text_prof = (unsigned *) realloc(mem_image.k_text_prof, k_text_size); - } - memclr (mem_image.k_text_seg, BYTES_TO_INST(k_text_size)); - memclr (mem_image.k_text_prof, k_text_size); - mem_image.k_text_top = K_TEXT_BOT + k_text_size; - - k_data_size = ROUND_UP(k_data_size, BYTES_PER_WORD); /* Keep word aligned */ - if (mem_image.k_data_seg == NULL) - mem_image.k_data_seg = (mem_word *) xmalloc (k_data_size); - else - mem_image.k_data_seg = (mem_word *) realloc (mem_image.k_data_seg, k_data_size); - memclr (mem_image.k_data_seg, k_data_size); - mem_image.k_data_seg_b = (BYTE_TYPE *) mem_image.k_data_seg; - mem_image.k_data_seg_h = (short *) mem_image.k_data_seg; - mem_image.k_data_top = K_DATA_BOT + k_data_size; - k_data_size_limit = k_data_limit; - - mem_image.text_modified = true; - mem_image.data_modified = true; -} - - -void mem_dump_profile() { - mem_image_t &mem_image = mem_images[0]; - - str_stream ss; - ss_init(&ss); - FILE *file = NULL; - - if ((prof_file_name == NULL) || (prof_file_name[0] == 0)) { - return; - } - file = fopen(prof_file_name, "w"); - if (file == NULL) { - printf("failed to open profile file: %s\n", prof_file_name); - return; - } - - int text_size = (mem_image.text_top - TEXT_BOT)/4; - for (int i = 0 ; i < text_size ; ++ i) { - instruction *inst = mem_image.text_seg[i]; - if (inst == NULL) { - continue; - } - unsigned prof_count = mem_image.text_prof[i]; - mem_addr addr = TEXT_BOT + (i << 2); - fprintf(file, "%9d ", prof_count - 1); - format_an_inst(&ss, inst, addr); - //print_inst_internal (&buf[10], sizeof(buf)-12, inst, addr); - fprintf(file, "%s", ss_to_string(&ss)); - ss_clear(&ss); - fflush(file); - } - - fprintf(file, "\n\nkernel text segment\n\n"); - - int k_text_size = (mem_image.k_text_top - K_TEXT_BOT)/4; - for (int i = 0 ; i < k_text_size ; ++ i) { - instruction *inst = mem_image.k_text_seg[i]; - if (inst == NULL) { - continue; - } - unsigned prof_count = mem_image.k_text_prof[i]; - mem_addr addr = K_TEXT_BOT + (i << 2); - fprintf(file, "%9d ", prof_count - 1); - format_an_inst(&ss, inst, addr); - //print_inst_internal (&buf[10], sizeof(buf)-12, inst, addr); - fprintf(file, "%s", ss_to_string(&ss)); - ss_clear(&ss); - } - - fclose(file); -} - - -/* Free the storage used by the old instructions in memory. */ - -static void -free_instructions (instruction **inst, int n) -{ - for ( ; n > 0; n --, inst ++) - if (*inst) - free_inst (*inst); -} - - -/* Expand the data segment by adding N bytes. */ - -void -expand_data (size_t context, int addl_bytes) -{ - mem_image_t &mem_image = mem_images[context]; - - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = mem_image.data_top - DATA_BOT; - int new_size = old_size + delta; - BYTE_TYPE *p; - - if ((addl_bytes < 0) || (new_size > data_size_limit)) - { - error ("Can't expand data segment by %d bytes to %d bytes\n", - addl_bytes, new_size); - run_error ("Use -ldata # with # > %d\n", new_size); - } - mem_image.data_seg = (mem_word *) realloc (mem_image.data_seg, new_size); - if (mem_image.data_seg == NULL) - fatal_error ("realloc failed in expand_data\n"); - - mem_image.data_seg_b = (BYTE_TYPE *) mem_image.data_seg; - mem_image.data_seg_h = (short *) mem_image.data_seg; - mem_image.data_top += delta; - - /* Zero new memory */ - for (p = mem_image.data_seg_b + old_size; p < mem_image.data_seg_b + new_size; ) - *p ++ = 0; -} - - -/* Expand the stack segment by adding N bytes. Can't use REALLOC - since it copies from bottom of memory blocks and stack grows down from - top of its block. */ - -void -expand_stack (size_t context, int addl_bytes) -{ - mem_image_t &mem_image = mem_images[context]; - - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = STACK_TOP - mem_image.stack_bot; - int new_size = old_size + MAX (delta, old_size); - mem_word *new_seg; - mem_word *po, *pn; - - if ((addl_bytes < 0) || (new_size > stack_size_limit)) - { - run_error ("Can't expand stack segment by %d bytes to %d bytes.\nUse -lstack # with # > %d\n", - addl_bytes, new_size, new_size); - } - - new_seg = (mem_word *) xmalloc (new_size); - memset(new_seg, 0, new_size); - - po = mem_image.stack_seg + (old_size / BYTES_PER_WORD - 1); - pn = new_seg + (new_size / BYTES_PER_WORD - 1); - for ( ; po >= mem_image.stack_seg ; ) *pn -- = *po --; - - free (mem_image.stack_seg); - mem_image.stack_seg = new_seg; - mem_image.stack_seg_b = (BYTE_TYPE *) mem_image.stack_seg; - mem_image.stack_seg_h = (short *) mem_image.stack_seg; - mem_image.stack_bot -= (new_size - old_size); -} - - -/* Expand the kernel data segment by adding N bytes. */ - -void -expand_k_data (size_t context, int addl_bytes) -{ - mem_image_t &mem_image = mem_images[context]; - - int delta = ROUND_UP(addl_bytes, BYTES_PER_WORD); /* Keep word aligned */ - int old_size = mem_image.k_data_top - K_DATA_BOT; - int new_size = old_size + delta; - BYTE_TYPE *p; - - if ((addl_bytes < 0) || (new_size > k_data_size_limit)) - { - run_error ("Can't expand kernel data segment by %d bytes to %d bytes.\nUse -lkdata # with # > %d\n", - addl_bytes, new_size, new_size); - } - mem_image.k_data_seg = (mem_word *) realloc (mem_image.k_data_seg, new_size); - if (mem_image.k_data_seg == NULL) - fatal_error ("realloc failed in expand_k_data\n"); - - mem_image.k_data_seg_b = (BYTE_TYPE *) mem_image.k_data_seg; - mem_image.k_data_seg_h = (short *) mem_image.k_data_seg; - mem_image.k_data_top += delta; - - /* Zero new memory */ - for (p = mem_image.k_data_seg_b + old_size / BYTES_PER_WORD; - p < mem_image.k_data_seg_b + new_size / BYTES_PER_WORD; ) - *p ++ = 0; -} - - - -/* Access memory */ - -void* -mem_reference(size_t context, mem_addr addr) -{ - mem_image_t &mem_image = mem_images[context]; - - if ((addr >= TEXT_BOT) && (addr < mem_image.text_top)) - return addr - TEXT_BOT + (char*) mem_image.text_seg; - else if ((addr >= DATA_BOT) && (addr < mem_image.data_top)) - return addr - DATA_BOT + (char*) mem_image.data_seg; - else if ((addr >= mem_image.stack_bot) && (addr < STACK_TOP)) - return addr - mem_image.stack_bot + (char*) mem_image.stack_seg; - else if ((addr >= K_TEXT_BOT) && (addr < mem_image.k_text_top)) - return addr - K_TEXT_BOT + (char*) mem_image.k_text_seg; - else if ((addr >= K_DATA_BOT) && (addr < mem_image.k_data_top)) - return addr - K_DATA_BOT + (char*) mem_image.k_data_seg; - else - { - run_error ("Memory address out of bounds\n"); - return NULL; - } -} - - -instruction* -read_mem_inst(size_t context, mem_addr addr) -{ - mem_image_t &mem_image = mem_images[context]; - - if ((addr >= TEXT_BOT) && (addr < mem_image.text_top) && !(addr & 0x3)) { - ++ mem_image.text_prof[(addr - TEXT_BOT) >> 2]; - return mem_image.text_seg [(addr - TEXT_BOT) >> 2]; - } - else if ((addr >= K_TEXT_BOT) && (addr < mem_image.k_text_top) && !(addr & 0x3)) { - ++ mem_image.k_text_prof[(addr - K_TEXT_BOT) >> 2]; - return mem_image.k_text_seg [(addr - K_TEXT_BOT) >> 2]; - } - else - return bad_text_read (context, addr); -} - - -reg_word -read_mem_byte(size_t context, mem_addr addr) -{ - mem_image_t &mem_image = mem_images[context]; - - if ((addr >= DATA_BOT) && (addr < mem_image.data_top)) - return mem_image.data_seg_b [addr - DATA_BOT]; - else if ((addr >= mem_image.stack_bot) && (addr < STACK_TOP)) - return mem_image.stack_seg_b [addr - mem_image.stack_bot]; - else if ((addr >= K_DATA_BOT) && (addr < mem_image.k_data_top)) - return mem_image.k_data_seg_b [addr - K_DATA_BOT]; - else if ((addr >= SPECIAL_BOT) && (addr < SPECIAL_TOP)) - return mem_image.special_seg_b [addr - SPECIAL_BOT]; - else - return bad_mem_read (context, addr, 0); -} - - -reg_word -read_mem_half(size_t context, mem_addr addr) -{ - mem_image_t &mem_image = mem_images[context]; - - if ((addr >= DATA_BOT) && (addr < mem_image.data_top) && !(addr & 0x1)) - return mem_image.data_seg_h [(addr - DATA_BOT) >> 1]; - else if ((addr >= mem_image.stack_bot) && (addr < STACK_TOP) && !(addr & 0x1)) - return mem_image.stack_seg_h [(addr - mem_image.stack_bot) >> 1]; - else if ((addr >= K_DATA_BOT) && (addr < mem_image.k_data_top) && !(addr & 0x1)) - return mem_image.k_data_seg_h [(addr - K_DATA_BOT) >> 1]; - else if ((addr >= SPECIAL_BOT) && (addr < SPECIAL_TOP) && !(addr & 0x1)) - return mem_image.special_seg_h [(addr - SPECIAL_BOT) >> 1]; - else - return bad_mem_read (context, addr, 0x1); -} - - -reg_word -read_mem_word(size_t context, mem_addr addr) -{ - mem_image_t &mem_image = mem_images[context]; - - if ((addr >= DATA_BOT) && (addr < mem_image.data_top) && !(addr & 0x3)) - return mem_image.data_seg [(addr - DATA_BOT) >> 2]; - else if ((addr >= mem_image.stack_bot) && (addr < STACK_TOP) && !(addr & 0x3)) - return mem_image.stack_seg [(addr - mem_image.stack_bot) >> 2]; - else if ((addr >= K_DATA_BOT) && (addr < mem_image.k_data_top) && !(addr & 0x3)) - return mem_image.k_data_seg [(addr - K_DATA_BOT) >> 2]; - else if ((addr >= SPECIAL_BOT) && (addr < SPECIAL_TOP) && !(addr & 0x3)) - return mem_image.special_seg [(addr - SPECIAL_BOT) >> 2]; - else - return bad_mem_read (context, addr, 0x3); -} - - -void -set_mem_inst(size_t context, mem_addr addr, instruction* inst) -{ - mem_image_t &mem_image = mem_images[context]; - - mem_image.text_modified = true; - if ((addr >= TEXT_BOT) && (addr < mem_image.text_top) && !(addr & 0x3)) - mem_image.text_seg [(addr - TEXT_BOT) >> 2] = inst; - else if ((addr >= K_TEXT_BOT) && (addr < mem_image.k_text_top) && !(addr & 0x3)) - mem_image.k_text_seg [(addr - K_TEXT_BOT) >> 2] = inst; - else - bad_text_write (context, addr, inst); -} - - -void -set_mem_byte(size_t context, mem_addr addr, reg_word value) -{ - mem_image_t &mem_image = mem_images[context]; - - mem_image.data_modified = true; - if ((addr >= DATA_BOT) && (addr < mem_image.data_top)) - mem_image.data_seg_b [addr - DATA_BOT] = (BYTE_TYPE) value; - else if ((addr >= mem_image.stack_bot) && (addr < STACK_TOP)) - mem_image.stack_seg_b [addr - mem_image.stack_bot] = (BYTE_TYPE) value; - else if ((addr >= K_DATA_BOT) && (addr < mem_image.k_data_top)) - mem_image.k_data_seg_b [addr - K_DATA_BOT] = (BYTE_TYPE) value; - else if ((addr >= SPECIAL_BOT) && (addr < SPECIAL_TOP)) - mem_image.special_seg_b [addr - SPECIAL_BOT] = (BYTE_TYPE) value; - else - bad_mem_write (context, addr, value, 0); -} - - -void -set_mem_half(size_t context, mem_addr addr, reg_word value) -{ - mem_image_t &mem_image = mem_images[context]; - - mem_image.data_modified = true; - if ((addr >= DATA_BOT) && (addr < mem_image.data_top) && !(addr & 0x1)) - mem_image.data_seg_h [(addr - DATA_BOT) >> 1] = (short) value; - else if ((addr >= mem_image.stack_bot) && (addr < STACK_TOP) && !(addr & 0x1)) - mem_image.stack_seg_h [(addr - mem_image.stack_bot) >> 1] = (short) value; - else if ((addr >= K_DATA_BOT) && (addr < mem_image.k_data_top) && !(addr & 0x1)) - mem_image.k_data_seg_h [(addr - K_DATA_BOT) >> 1] = (short) value; - else if ((addr >= SPECIAL_BOT) && (addr < SPECIAL_TOP) && !(addr & 0x1)) - mem_image.special_seg_h [(addr - SPECIAL_BOT) >> 1] = (short) value; - else - bad_mem_write (context, addr, value, 0x1); -} - - -void -set_mem_word(size_t context, mem_addr addr, reg_word value) -{ - mem_image_t &mem_image = mem_images[context]; - - mem_image.data_modified = true; - if ((addr >= DATA_BOT) && (addr < mem_image.data_top) && !(addr & 0x3)) - mem_image.data_seg [(addr - DATA_BOT) >> 2] = (mem_word) value; - else if ((addr >= mem_image.stack_bot) && (addr < STACK_TOP) && !(addr & 0x3)) - mem_image.stack_seg [(addr - mem_image.stack_bot) >> 2] = (mem_word) value; - else if ((addr >= K_DATA_BOT) && (addr < mem_image.k_data_top) && !(addr & 0x3)) - mem_image.k_data_seg [(addr - K_DATA_BOT) >> 2] = (mem_word) value; - else if ((addr >= SPECIAL_BOT) && (addr < SPECIAL_TOP) && !(addr & 0x3)) - mem_image.special_seg [(addr - SPECIAL_BOT) >> 2] = (mem_word) value; - else - bad_mem_write (context, addr, value, 0x3); -} - - -/* Handle the infrequent and erroneous cases in memory accesses. */ - -static instruction * -bad_text_read (size_t context, mem_addr addr) -{ - reg_image_t ®_image = reg_images[context]; - - RAISE_EXCEPTION (reg_image, ExcCode_IBE, CP0_BadVAddr(reg_image) = addr); - return (inst_decode (0)); -} - - -static void -bad_text_write (size_t context, mem_addr addr, instruction *inst) -{ - reg_image_t ®_image = reg_images[context]; - - RAISE_EXCEPTION (reg_image, ExcCode_IBE, CP0_BadVAddr(reg_image) = addr); - set_mem_word (context, addr, ENCODING (inst)); -} - - -static mem_word -bad_mem_read (size_t context, mem_addr addr, int mask) -{ - reg_image_t ®_image = reg_images[context]; - mem_image_t &mem_image = mem_images[context]; - - mem_word tmp; - - if ((addr & mask) != 0) - RAISE_EXCEPTION (reg_image, ExcCode_AdEL, CP0_BadVAddr(reg_image) = addr) - else if (addr >= TEXT_BOT && addr < mem_image.text_top) - switch (mask) - { - case 0x0: - tmp = ENCODING (mem_image.text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = (unsigned)tmp >> (8 * (3 - (addr & 0x3))); -#else - tmp = (unsigned)tmp >> (8 * (addr & 0x3)); -#endif - return (0xff & tmp); - - case 0x1: - tmp = ENCODING (mem_image.text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = (unsigned)tmp >> (8 * (2 - (addr & 0x2))); -#else - tmp = (unsigned)tmp >> (8 * (addr & 0x2)); -#endif - return (0xffff & tmp); - - case 0x3: - { - instruction *inst = mem_image.text_seg [(addr - TEXT_BOT) >> 2]; - if (inst == NULL) - return 0; - else - return (ENCODING (inst)); - } - - default: - run_error ("Bad mask (0x%x) in bad_mem_read\n", mask); - } - else if (addr > mem_image.data_top - && addr < mem_image.stack_bot - /* If more than 16 MB below stack, probably is bad data ref */ - && addr > mem_image.stack_bot - 16*K*K) - { - /* Grow stack segment */ - expand_stack (context,mem_image.stack_bot - addr + 4); - return (0); - } - else if (SPIMBOT_IO_BOT <= addr && addr <= SPIMBOT_IO_TOP) - return (read_spimbot_IO (context, addr)); - else - /* Address out of range */ - RAISE_EXCEPTION (reg_image, ExcCode_DBE, CP0_BadVAddr(reg_image) = addr) - return (0); -} - - -static void -bad_mem_write (size_t context, mem_addr addr, mem_word value, int mask) -{ - reg_image_t ®_image = reg_images[context]; - mem_image_t &mem_image = mem_images[context]; - - mem_word tmp; - - if ((addr & mask) != 0) - /* Unaligned address fault */ - RAISE_EXCEPTION (reg_image, ExcCode_AdES, CP0_BadVAddr(reg_image) = addr) - else if (addr >= TEXT_BOT && addr < mem_image.text_top) - { - switch (mask) - { - case 0x0: - tmp = ENCODING (mem_image.text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = ((tmp & ~(0xff << (8 * (3 - (addr & 0x3))))) - | (value & 0xff) << (8 * (3 - (addr & 0x3)))); -#else - tmp = ((tmp & ~(0xff << (8 * (addr & 0x3)))) - | (value & 0xff) << (8 * (addr & 0x3))); -#endif - break; - - case 0x1: - tmp = ENCODING (mem_image.text_seg [(addr - TEXT_BOT) >> 2]); -#ifdef SPIM_BIGENDIAN - tmp = ((tmp & ~(0xffff << (8 * (2 - (addr & 0x2))))) - | (value & 0xffff) << (8 * (2 - (addr & 0x2)))); -#else - tmp = ((tmp & ~(0xffff << (8 * (addr & 0x2)))) - | (value & 0xffff) << (8 * (addr & 0x2))); -#endif - break; - - case 0x3: - tmp = value; - break; - - default: - tmp = 0; - run_error ("Bad mask (0x%x) in bad_mem_read\n", mask); - } - - if (mem_image.text_seg [(addr - TEXT_BOT) >> 2] != NULL) - { - free_inst (mem_image.text_seg[(addr - TEXT_BOT) >> 2]); - } - mem_image.text_seg [(addr - TEXT_BOT) >> 2] = inst_decode (tmp); - - mem_image.text_modified = true; - } - else if (addr > mem_image.data_top - && addr < mem_image.stack_bot - /* If more than 16 MB below stack, probably is bad data ref */ - && addr > mem_image.stack_bot - 16*K*K) - { - /* Grow stack segment */ - expand_stack (context,mem_image.stack_bot - addr + 4); - if (addr >= mem_image.stack_bot) - { - if (mask == 0) - mem_image.stack_seg_b [addr - mem_image.stack_bot] = (char)value; - else if (mask == 1) - mem_image.stack_seg_h [(addr - mem_image.stack_bot) >> 1] = (short)value; - else - mem_image.stack_seg [(addr - mem_image.stack_bot) >> 2] = value; - } - else - RAISE_EXCEPTION (reg_image, ExcCode_DBE, CP0_BadVAddr(reg_image) = addr) - - mem_image.data_modified = true; - } - else if (SPIMBOT_IO_BOT <= addr && addr <= SPIMBOT_IO_TOP) - write_spimbot_IO (context, addr, value); - else - /* Address out of range */ - RAISE_EXCEPTION (reg_image, ExcCode_DBE, CP0_BadVAddr(reg_image) = addr) -} - - - -/* Memory-mapped IO routines. */ - -static int recv_control = 0; /* No input */ -static int recv_buffer; -static int recv_buffer_full_timer = 0; - -static int trans_control = TRANS_READY; /* Ready to write */ -// static int trans_buffer; -static int trans_buffer_full_timer = 0; - - -/* Check if input is available and output is possible. If so, update the - memory-mapped control registers and buffers. */ - -void -check_memory_mapped_IO (size_t context) -{ - reg_image_t ®_image = reg_images[context]; - - if (recv_buffer_full_timer > 0) - { - /* Do not check for more input until this interval expires. */ - recv_buffer_full_timer -= 1; - } - else if (console_input_available ()) - { - /* Read new char into the buffer and raise an interrupt, if interrupts - are enabled for device. */ - /* assert(recv_buffer_full_timer == 0); */ - recv_buffer = get_console_char (); - recv_control |= RECV_READY; - recv_buffer_full_timer = RECV_INTERVAL; - if (recv_control & RECV_INT_ENABLE) - { - RAISE_INTERRUPT (reg_image, RECV_INT_LEVEL); - } - } - - if (trans_buffer_full_timer > 0) - { - /* Do not allow output until this interval expires. */ - trans_buffer_full_timer -= 1; - } - else if (!(trans_control & TRANS_READY)) - { - /* Done writing: empty the buffer and raise an interrupt, if interrupts - are enabled for device. */ - /* assert(trans_buffer_full_timer == 0); */ - trans_control |= TRANS_READY; - if (trans_control & TRANS_INT_ENABLE) - { - RAISE_INTERRUPT (reg_image, TRANS_INT_LEVEL); - } - } -} - - -/* Invoked on a write to the memory-mapped IO area. */ -// SPIMBOT: we over-ride these functions with our own I/O routines - -// static void -// write_memory_mapped_IO (mem_addr addr, mem_word value) -// { -// reg_image_t ®_image = reg_images[0]; -// -// switch (addr) -// { -// case TRANS_CTRL_ADDR: -// /* Program can only set the interrupt enable, not ready, bit. */ -// if ((value & TRANS_INT_ENABLE) != 0) -// { -// /* Enable interrupts: */ -// trans_control |= TRANS_INT_ENABLE; -// if (trans_control & TRANS_READY) -// { -// /* Raise interrupt on enabling a ready transmitter */ -// RAISE_INTERRUPT (reg_image, TRANS_INT_LEVEL); -// } -// } -// else -// { -// /* Disable interrupts: */ -// trans_control &= ~TRANS_INT_ENABLE; -// CLEAR_INTERRUPT (reg_image, TRANS_INT_LEVEL); /* Clear IP bit in Cause */ -// } -// break; -// -// case TRANS_BUFFER_ADDR: -// /* Ignore write if device is not ready. */ -// if ((trans_control & TRANS_READY) != 0) -// { -// /* Write char: */ -// trans_buffer = value & 0xff; -// put_console_char ((char)trans_buffer); -// /* Device is busy for a while: */ -// trans_control &= ~TRANS_READY; -// trans_buffer_full_timer = TRANS_LATENCY; -// CLEAR_INTERRUPT (reg_image, TRANS_INT_LEVEL); /* Clear IP bit in Cause */ -// } -// break; -// -// case RECV_CTRL_ADDR: -// /* Program can only set the interrupt enable, not ready, bit. */ -// if ((value & RECV_INT_ENABLE) != 0) -// { -// /* Enable interrupts: */ -// recv_control |= RECV_INT_ENABLE; -// if (recv_control & RECV_READY) -// { -// /* Raise interrupt on enabling a ready receiver */ -// RAISE_INTERRUPT (reg_image, RECV_INT_LEVEL); -// } -// } -// else -// { -// /* Disable interrupts: */ -// recv_control &= ~RECV_INT_ENABLE; -// CLEAR_INTERRUPT (reg_image, RECV_INT_LEVEL); /* Clear IP bit in Cause */ -// } -// break; -// -// case RECV_BUFFER_ADDR: -// /* Nop: program can't change buffer. */ -// break; -// -// default: -// run_error ("Write to unused memory-mapped IO address (0x%x)\n", addr); -// } -// } -// -// -// /* Invoked on a read in the memory-mapped IO area. */ -// -// static mem_word -// read_memory_mapped_IO (mem_addr addr) -// { -// reg_image_t ®_image = reg_images[0]; -// -// switch (addr) -// { -// case TRANS_CTRL_ADDR: -// return (trans_control); -// -// case TRANS_BUFFER_ADDR: -// return (trans_buffer & 0xff); -// -// case RECV_CTRL_ADDR: -// return (recv_control); -// -// case RECV_BUFFER_ADDR: -// recv_control &= ~RECV_READY; /* Buffer now empty */ -// recv_buffer_full_timer = 0; -// CLEAR_INTERRUPT (reg_image, RECV_INT_LEVEL); /* Clear IP bit in Cause */ -// return (recv_buffer & 0xff); -// -// default: -// run_error ("Read from unused memory-mapped IO address (0x%x)\n", addr); -// return (0); -// } -// } - - - -/* Misc. routines */ - -void -print_mem (size_t context, mem_addr addr) -{ - mem_image_t &mem_image = mem_images[context]; - - mem_word value; - - if ((addr & 0x3) != 0) - addr &= ~0x3; /* Address must be word-aligned */ - - if (TEXT_BOT <= addr && addr < mem_image.text_top) - print_inst (addr); - else if (DATA_BOT <= addr && addr < mem_image.data_top) - { - value = read_mem_word (context, addr); - write_output (message_out, "Data seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else if (mem_image.stack_bot <= addr && addr < STACK_TOP) - { - value = read_mem_word (context, addr); - write_output (message_out, "Stack seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else if (K_TEXT_BOT <= addr && addr < mem_image.k_text_top) - print_inst (addr); - else if (K_DATA_BOT <= addr && addr < mem_image.k_data_top) - { - value = read_mem_word (context, addr); - write_output (message_out, - "Kernel Data seg @ 0x%08x (%d) = 0x%08x (%d)\n", - addr, addr, value, value); - } - else - error ("Address 0x%08x (%d) to print_mem is out of bounds\n", addr, addr); -} diff --git a/spim-qtspimbot/CPU/mem.h b/spim-qtspimbot/CPU/mem.h deleted file mode 100755 index 94cde81..0000000 --- a/spim-qtspimbot/CPU/mem.h +++ /dev/null @@ -1,158 +0,0 @@ -/* SPIM S20 MIPS simulator. - Macros for accessing memory. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef MEM_H -#define MEM_H - -#include "reg.h" - - -/* A note on directions: "Bottom" of memory is the direction of - decreasing addresses. "Top" is the direction of increasing addresses.*/ - - -/* Type of contents of a memory word. */ - -typedef int32 /*@alt unsigned int @*/ mem_word; - -#define BYTE_TYPE signed char - -typedef struct memimage { - /* The text segment. */ - instruction **text_seg; - unsigned *text_prof; - int text_modified; /* => text segment was written */ - mem_addr text_top; - - /* The data segment. */ - mem_word *data_seg; - bool data_modified; /* => a data segment was written */ - short *data_seg_h; /* Points to same vector as DATA_SEG */ - BYTE_TYPE *data_seg_b; /* Ditto */ - mem_addr data_top; - mem_addr gp_midpoint; /* Middle of $gp area */ - - /* The stack segment. */ - mem_word *stack_seg; - short *stack_seg_h; /* Points to same vector as STACK_SEG */ - BYTE_TYPE *stack_seg_b; /* Ditto */ - mem_addr stack_bot; - - /* Used for SPIMbot stuff. */ - mem_word *special_seg; - short *special_seg_h; - BYTE_TYPE *special_seg_b; - - /* The kernel text segment. */ - instruction **k_text_seg; - unsigned *k_text_prof; - mem_addr k_text_top; - - /* The kernel data segment. */ - mem_word *k_data_seg; - short *k_data_seg_h; - BYTE_TYPE *k_data_seg_b; - mem_addr k_data_top; - -} mem_image_t; - -extern mem_image_t mem_images[2]; - -/* The text boundaries. */ -#define TEXT_BOT ((mem_addr) 0x400000) -/* Amount to grow text segment when we run out of space for instructions. */ -#define TEXT_CHUNK_SIZE 4096 - -/* The data boundaries. */ -#define DATA_BOT ((mem_addr) 0x10000000) - -/* The stack boundaries. */ -/* Exclusive, but include 4K at top of stack. */ -#define STACK_TOP ((mem_addr) 0x80000000) - -/* The kernel text boundaries. */ -#define K_TEXT_BOT ((mem_addr) 0x80000000) - -/* The Kernel data boundaries. */ -#define K_DATA_BOT ((mem_addr) 0x90000000) - -/* Memory-mapped IO area: */ -#define MM_IO_BOT ((mem_addr) 0xffff0000) -#define MM_IO_TOP ((mem_addr) 0xffffffff) - -#define SPECIAL_BOT ((mem_addr) 0xfffe0000) -#define SPECIAL_TOP ((mem_addr) 0xffff0000) - -/* Read from console: */ -#define RECV_CTRL_ADDR ((mem_addr) 0xffff0000) -#define RECV_BUFFER_ADDR ((mem_addr) 0xffff0004) - -#define RECV_READY 0x1 -#define RECV_INT_ENABLE 0x2 - -#define RECV_INT_LEVEL 3 /* HW Interrupt 1 */ - - -/* Write to console: */ -#define TRANS_CTRL_ADDR ((mem_addr) 0xffff0008) -#define TRANS_BUFFER_ADDR ((mem_addr) 0xffff000c) - -#define TRANS_READY 0x1 -#define TRANS_INT_ENABLE 0x2 - -#define TRANS_INT_LEVEL 2 /* HW Interrupt 0 */ - - - - -/* Exported functions: */ - -void check_memory_mapped_IO (size_t context); -void expand_data (size_t context, int addl_bytes); -void expand_k_data (size_t context, int addl_bytes); -void expand_stack (size_t context, int addl_bytes); -void make_memory (size_t context, int text_size, int data_size, int data_limit, - int stack_size, int stack_limit, int k_text_size, - int k_data_size, int k_data_limit); -void mem_dump_profile(); -void* mem_reference(size_t context, mem_addr addr); -void print_mem (mem_addr addr); -instruction* read_mem_inst(size_t context, mem_addr addr); -reg_word read_mem_byte(size_t context, mem_addr addr); -reg_word read_mem_half(size_t context, mem_addr addr); -reg_word read_mem_word(size_t context, mem_addr addr); -void set_mem_inst(size_t context, mem_addr addr, instruction* inst); -void set_mem_byte(size_t context, mem_addr addr, reg_word value); -void set_mem_half(size_t context, mem_addr addr, reg_word value); -void set_mem_word(size_t context, mem_addr addr, reg_word value); - -#endif diff --git a/spim-qtspimbot/CPU/op.h b/spim-qtspimbot/CPU/op.h deleted file mode 100755 index 4b46df5..0000000 --- a/spim-qtspimbot/CPU/op.h +++ /dev/null @@ -1,525 +0,0 @@ -/* SPIM S20 MIPS simulator. - This file describes the MIPS instructions, the assembler pseudo - instructions, the assembler pseudo-ops, and the spim commands. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Type of each entry: */ - -#define ASM_DIR 0 -#define PSEUDO_OP 1 - -#define BC_TYPE_INST 10 -#define B1_TYPE_INST 11 -#define I1s_TYPE_INST 12 -#define I1t_TYPE_INST 13 -#define I2_TYPE_INST 14 -#define B2_TYPE_INST 15 -#define I2a_TYPE_INST 16 - -#define R1s_TYPE_INST 20 -#define R1d_TYPE_INST 21 -#define R2st_TYPE_INST 22 -#define R2ds_TYPE_INST 23 -#define R2td_TYPE_INST 24 -#define R2sh_TYPE_INST 25 -#define R3_TYPE_INST 26 -#define R3sh_TYPE_INST 27 - -#define FP_I2a_TYPE_INST 30 -#define FP_R2ds_TYPE_INST 31 -#define FP_R2ts_TYPE_INST 32 -#define FP_CMP_TYPE_INST 33 -#define FP_R3_TYPE_INST 34 -#define FP_R4_TYPE_INST 35 -#define FP_MOVC_TYPE_INST 36 -#define MOVC_TYPE_INST 37 - -#define J_TYPE_INST 40 -#define NOARG_TYPE_INST 42 - - -/* Information on each keyword token that can be read by spim. Must be - sorted in alphabetical order. */ - -OP(".alias", Y_ALIAS_DIR, ASM_DIR, -1) -OP(".align", Y_ALIGN_DIR, ASM_DIR, -1) -OP(".ascii", Y_ASCII_DIR, ASM_DIR, -1) -OP(".asciiz", Y_ASCIIZ_DIR, ASM_DIR, -1) -OP(".asm0", Y_ASM0_DIR, ASM_DIR, -1) -OP(".bgnb", Y_BGNB_DIR, ASM_DIR, -1) -OP(".byte", Y_BYTE_DIR, ASM_DIR, -1) -OP(".comm", Y_COMM_DIR, ASM_DIR, -1) -OP(".data", Y_DATA_DIR, ASM_DIR, -1) -OP(".double", Y_DOUBLE_DIR, ASM_DIR, -1) -OP(".end", Y_END_DIR, ASM_DIR, -1) -OP(".endb", Y_ENDB_DIR, ASM_DIR, -1) -OP(".endr", Y_ENDR_DIR, ASM_DIR, -1) -OP(".ent", Y_ENT_DIR, ASM_DIR, -1) -OP(".err", Y_ERR_DIR, ASM_DIR, -1) -OP(".extern", Y_EXTERN_DIR, ASM_DIR, -1) -OP(".file", Y_FILE_DIR, ASM_DIR, -1) -OP(".float", Y_FLOAT_DIR, ASM_DIR, -1) -OP(".fmask", Y_FMASK_DIR, ASM_DIR, -1) -OP(".frame", Y_FRAME_DIR, ASM_DIR, -1) -OP(".globl", Y_GLOBAL_DIR, ASM_DIR, -1) -OP(".half", Y_HALF_DIR, ASM_DIR, -1) -OP(".kdata", Y_K_DATA_DIR, ASM_DIR, -1) -OP(".ktext", Y_K_TEXT_DIR, ASM_DIR, -1) -OP(".lab", Y_LABEL_DIR, ASM_DIR, -1) -OP(".lcomm", Y_LCOMM_DIR, ASM_DIR, -1) -OP(".livereg", Y_LIVEREG_DIR, ASM_DIR, -1) -OP(".loc", Y_LOC_DIR, ASM_DIR, -1) -OP(".mask", Y_MASK_DIR, ASM_DIR, -1) -OP(".noalias", Y_NOALIAS_DIR, ASM_DIR, -1) -OP(".option", Y_OPTIONS_DIR, ASM_DIR, -1) -OP(".rdata", Y_RDATA_DIR, ASM_DIR, -1) -OP(".repeat", Y_REPEAT_DIR, ASM_DIR, -1) -OP(".sdata", Y_SDATA_DIR, ASM_DIR, -1) -OP(".set", Y_SET_DIR, ASM_DIR, -1) -OP(".space", Y_SPACE_DIR, ASM_DIR, -1) -OP(".struct", Y_STRUCT_DIR, ASM_DIR, -1) -OP(".text", Y_TEXT_DIR, ASM_DIR, -1) -OP(".verstamp",Y_VERSTAMP_DIR, ASM_DIR, -1) -OP(".vreg", Y_VREG_DIR, ASM_DIR, -1) -OP(".word", Y_WORD_DIR, ASM_DIR, -1) - -OP("abs", Y_ABS_POP, PSEUDO_OP, -1) -OP("abs.d", Y_ABS_D_OP, FP_R2ds_TYPE_INST, 0x46200005) -OP("abs.ps", Y_ABS_PS_OP, FP_R2ds_TYPE_INST, 0x46600005) /* MIPS32 Rev 2 */ -OP("abs.s", Y_ABS_S_OP, FP_R2ds_TYPE_INST, 0x46000005) - -OP("add", Y_ADD_OP, R3_TYPE_INST, 0x00000020) -OP("add.d", Y_ADD_D_OP, FP_R3_TYPE_INST, 0x46200000) -OP("add.ps", Y_ADD_PS_OP, FP_R3_TYPE_INST, 0x46600000) /* MIPS32 Rev 2 */ -OP("add.s", Y_ADD_S_OP, FP_R3_TYPE_INST, 0x46000000) -OP("addi", Y_ADDI_OP, I2_TYPE_INST, 0x20000000) -OP("addiu", Y_ADDIU_OP, I2_TYPE_INST, 0x24000000) -OP("addu", Y_ADDU_OP, R3_TYPE_INST, 0x00000021) - -OP("alnv.ps", Y_ALNV_PS_OP, FP_R4_TYPE_INST, 0x4c00001e) /* MIPS32 Rev 2 */ - -OP("and", Y_AND_OP, R3_TYPE_INST, 0x00000024) -OP("andi", Y_ANDI_OP, I2_TYPE_INST, 0x30000000) - -OP("b", Y_B_POP, PSEUDO_OP, -1) -OP("bal", Y_BAL_POP, PSEUDO_OP, -1) - -OP("bc1f", Y_BC1F_OP, BC_TYPE_INST, 0x45000000) -OP("bc1fl", Y_BC1FL_OP, BC_TYPE_INST, 0x45020000) /* MIPS32 */ -OP("bc1t", Y_BC1T_OP, BC_TYPE_INST, 0x45010000) -OP("bc1tl", Y_BC1TL_OP, BC_TYPE_INST, 0x45030000) /* MIPS32 */ - -OP("bc2f", Y_BC2F_OP, BC_TYPE_INST, 0x49000000) -OP("bc2fl", Y_BC2FL_OP, BC_TYPE_INST, 0x49020000) /* MIPS32 */ -OP("bc2t", Y_BC2T_OP, BC_TYPE_INST, 0x49010000) -OP("bc2tl", Y_BC2TL_OP, BC_TYPE_INST, 0x49030000) /* MIPS32 */ - -OP("beq", Y_BEQ_OP, B2_TYPE_INST, 0x10000000) -OP("beql", Y_BEQL_OP, B2_TYPE_INST, 0x50000000) /* MIPS32 */ -OP("beqz", Y_BEQZ_POP, PSEUDO_OP, -1) -OP("bge", Y_BGE_POP, PSEUDO_OP, -1) -OP("bgeu", Y_BGEU_POP, PSEUDO_OP, -1) -OP("bgez", Y_BGEZ_OP, B1_TYPE_INST, 0x04010000) -OP("bgezal", Y_BGEZAL_OP, B1_TYPE_INST, 0x04110000) -OP("bgezall", Y_BGEZALL_OP, B1_TYPE_INST, 0x04130000) /* MIPS32 */ -OP("bgezl", Y_BGEZL_OP, B1_TYPE_INST, 0x04030000) /* MIPS32 */ -OP("bgt", Y_BGT_POP, PSEUDO_OP, -1) -OP("bgtu", Y_BGTU_POP, PSEUDO_OP, -1) -OP("bgtz", Y_BGTZ_OP, B1_TYPE_INST, 0x1c000000) -OP("bgtzl", Y_BGTZL_OP, B1_TYPE_INST, 0x5c000000) /* MIPS32 */ -OP("ble", Y_BLE_POP, PSEUDO_OP, -1) -OP("bleu", Y_BLEU_POP, PSEUDO_OP, -1) -OP("blez", Y_BLEZ_OP, B1_TYPE_INST, 0x18000000) -OP("blezl", Y_BLEZL_OP, B1_TYPE_INST, 0x58000000) /* MIPS32 */ -OP("blt", Y_BLT_POP, PSEUDO_OP, -1) -OP("bltu", Y_BLTU_POP, PSEUDO_OP, -1) -OP("bltz", Y_BLTZ_OP, B1_TYPE_INST, 0x04000000) -OP("bltzal", Y_BLTZAL_OP, B1_TYPE_INST, 0x04100000) -OP("bltzall", Y_BLTZALL_OP, B1_TYPE_INST, 0x04120000) /* MIPS32 */ -OP("bltzl", Y_BLTZL_OP, B1_TYPE_INST, 0x04020000) /* MIPS32 */ -OP("bne", Y_BNE_OP, B2_TYPE_INST, 0x14000000) -OP("bnel", Y_BNEL_OP, B2_TYPE_INST, 0x54000000) /* MIPS32 */ -OP("bnez", Y_BNEZ_POP, PSEUDO_OP, -1) - -OP("break", Y_BREAK_OP, NOARG_TYPE_INST, 0x0000000d) - -OP("c.eq.d", Y_C_EQ_D_OP, FP_CMP_TYPE_INST, 0x46200032) -OP("c.eq.ps", Y_C_EQ_PS_OP, FP_CMP_TYPE_INST, 0x46600032) /* MIPS32 Rev 2 */ -OP("c.eq.s", Y_C_EQ_S_OP, FP_CMP_TYPE_INST, 0x46000032) -OP("c.f.d", Y_C_F_D_OP, FP_CMP_TYPE_INST, 0x46200030) -OP("c.f.ps", Y_C_F_PS_OP, FP_CMP_TYPE_INST, 0x46600030) /* MIPS32 Rev 2 */ -OP("c.f.s", Y_C_F_S_OP, FP_CMP_TYPE_INST, 0x46000030) -OP("c.le.d", Y_C_LE_D_OP, FP_CMP_TYPE_INST, 0x4620003e) -OP("c.le.ps", Y_C_LE_PS_OP, FP_CMP_TYPE_INST, 0x4660003e) /* MIPS32 Rev 2 */ -OP("c.le.s", Y_C_LE_S_OP, FP_CMP_TYPE_INST, 0x4600003e) -OP("c.lt.d", Y_C_LT_D_OP, FP_CMP_TYPE_INST, 0x4620003c) -OP("c.lt.ps", Y_C_LT_PS_OP, FP_CMP_TYPE_INST, 0x4660003c) /* MIPS32 Rev 2 */ -OP("c.lt.s", Y_C_LT_S_OP, FP_CMP_TYPE_INST, 0x4600003c) -OP("c.nge.d", Y_C_NGE_D_OP, FP_CMP_TYPE_INST, 0x4620003d) -OP("c.nge.ps", Y_C_NGE_PS_OP, FP_CMP_TYPE_INST, 0x4660003d) /* MIPS32 Rev 2 */ -OP("c.nge.s", Y_C_NGE_S_OP, FP_CMP_TYPE_INST, 0x4600003d) -OP("c.ngl.d", Y_C_NGL_D_OP, FP_CMP_TYPE_INST, 0x4620003b) -OP("c.ngl.ps", Y_C_NGL_PS_OP, FP_CMP_TYPE_INST, 0x4660003b) /* MIPS32 Rev 2 */ -OP("c.ngl.s", Y_C_NGL_S_OP, FP_CMP_TYPE_INST, 0x4600003b) -OP("c.ngle.d", Y_C_NGLE_D_OP, FP_CMP_TYPE_INST, 0x46200039) -OP("c.ngle.ps", Y_C_NGLE_PS_OP, FP_CMP_TYPE_INST, 0x46600039) /* MIPS32 Rev 2 */ -OP("c.ngle.s", Y_C_NGLE_S_OP, FP_CMP_TYPE_INST, 0x46000039) -OP("c.ngt.d", Y_C_NGT_D_OP, FP_CMP_TYPE_INST, 0x4620003f) -OP("c.ngt.ps", Y_C_NGT_PS_OP, FP_CMP_TYPE_INST, 0x4660003f) /* MIPS32 Rev 2 */ -OP("c.ngt.s", Y_C_NGT_S_OP, FP_CMP_TYPE_INST, 0x4600003f) -OP("c.ole.d", Y_C_OLE_D_OP, FP_CMP_TYPE_INST, 0x46200036) -OP("c.ole.ps", Y_C_OLE_PS_OP, FP_CMP_TYPE_INST, 0x46600036) /* MIPS32 Rev 2 */ -OP("c.ole.s", Y_C_OLE_S_OP, FP_CMP_TYPE_INST, 0x46000036) -OP("c.olt.d", Y_C_OLT_D_OP, FP_CMP_TYPE_INST, 0x46200034) -OP("c.olt.ps", Y_C_OLT_PS_OP, FP_CMP_TYPE_INST, 0x46600034) /* MIPS32 Rev 2 */ -OP("c.olt.s", Y_C_OLT_S_OP, FP_CMP_TYPE_INST, 0x46000034) -OP("c.seq.d", Y_C_SEQ_D_OP, FP_CMP_TYPE_INST, 0x4620003a) -OP("c.seq.ps", Y_C_SEQ_PS_OP, FP_CMP_TYPE_INST, 0x4660003a) /* MIPS32 Rev 2 */ -OP("c.seq.s", Y_C_SEQ_S_OP, FP_CMP_TYPE_INST, 0x4600003a) -OP("c.sf.d", Y_C_SF_D_OP, FP_CMP_TYPE_INST, 0x46200038) -OP("c.sf.ps", Y_C_SF_PS_OP, FP_CMP_TYPE_INST, 0x46600038) /* MIPS32 Rev 2 */ -OP("c.sf.s", Y_C_SF_S_OP, FP_CMP_TYPE_INST, 0x46000038) -OP("c.ueq.d", Y_C_UEQ_D_OP, FP_CMP_TYPE_INST, 0x46200033) -OP("c.ueq.ps", Y_C_UEQ_PS_OP, FP_CMP_TYPE_INST, 0x46600033) /* MIPS32 Rev 2 */ -OP("c.ueq.s", Y_C_UEQ_S_OP, FP_CMP_TYPE_INST, 0x46000033) -OP("c.ule.d", Y_C_ULE_D_OP, FP_CMP_TYPE_INST, 0x46200037) -OP("c.ule.ps", Y_C_ULE_PS_OP, FP_CMP_TYPE_INST, 0x46600037) /* MIPS32 Rev 2 */ -OP("c.ule.s", Y_C_ULE_S_OP, FP_CMP_TYPE_INST, 0x46000037) -OP("c.ult.d", Y_C_ULT_D_OP, FP_CMP_TYPE_INST, 0x46200035) -OP("c.ult.ps", Y_C_ULT_PS_OP, FP_CMP_TYPE_INST, 0x46600035) /* MIPS32 Rev 2 */ -OP("c.ult.s", Y_C_ULT_S_OP, FP_CMP_TYPE_INST, 0x46000035) -OP("c.un.d", Y_C_UN_D_OP, FP_CMP_TYPE_INST, 0x46200031) -OP("c.un.ps", Y_C_UN_PS_OP, FP_CMP_TYPE_INST, 0x46600031) /* MIPS32 Rev 2 */ -OP("c.un.s", Y_C_UN_S_OP, FP_CMP_TYPE_INST, 0x46000031) - -OP("cache", Y_CACHE_OP, I2_TYPE_INST, 0xbc000000) /* MIPS32 */ - -OP("ceil.l.d", Y_CEIL_L_D_OP, FP_R2ds_TYPE_INST, 0x4620000a) /* MIPS32 Rev 2 */ -OP("ceil.l.s", Y_CEIL_L_S_OP, FP_R2ds_TYPE_INST, 0x4600000a) /* MIPS32 Rev 2 */ -OP("ceil.w.d", Y_CEIL_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000e) /* MIPS32 */ -OP("ceil.w.s", Y_CEIL_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000e) /* MIPS32 */ - -OP("cfc0", Y_CFC0_OP, FP_R2ts_TYPE_INST, 0x40400000) -OP("cfc1", Y_CFC1_OP, FP_R2ts_TYPE_INST, 0x44400000) -OP("cfc2", Y_CFC2_OP, FP_R2ts_TYPE_INST, 0x48400000) - -OP("clo", Y_CLO_OP, R3_TYPE_INST, 0x70000021) -OP("clz", Y_CLZ_OP, R3_TYPE_INST, 0x70000020) - -OP("cop2", Y_COP2_OP, J_TYPE_INST, 0x4a000000) - -OP("ctc0", Y_CTC0_OP, FP_R2ts_TYPE_INST, 0x40c00000) -OP("ctc1", Y_CTC1_OP, FP_R2ts_TYPE_INST, 0x44c00000) -OP("ctc2", Y_CTC2_OP, FP_R2ts_TYPE_INST, 0x48c00000) - -OP("cvt.d.l", Y_CVT_D_L_OP, FP_R2ds_TYPE_INST, 0x46b00021) /* MIPS32 Rev 2 */ -OP("cvt.d.s", Y_CVT_D_S_OP, FP_R2ds_TYPE_INST, 0x46000021) -OP("cvt.d.w", Y_CVT_D_W_OP, FP_R2ds_TYPE_INST, 0x46200021) -OP("cvt.l.d", Y_CVT_L_D_OP, FP_R2ds_TYPE_INST, 0x46200025) /* MIPS32 Rev 2 */ -OP("cvt.l.s", Y_CVT_L_S_OP, FP_R2ds_TYPE_INST, 0x46000025) /* MIPS32 Rev 2 */ -OP("cvt.ps.s", Y_CVT_PS_S_OP, FP_R2ds_TYPE_INST, 0x46000026) /* MIPS32 Rev 2 */ -OP("cvt.s.d", Y_CVT_S_D_OP, FP_R2ds_TYPE_INST, 0x46200020) -OP("cvt.s.l", Y_CVT_S_L_OP, FP_R2ds_TYPE_INST, 0x46b00020) /* MIPS32 Rev 2 */ -OP("cvt.s.pl", Y_CVT_S_PL_OP, FP_R2ds_TYPE_INST, 0x46c00024) /* MIPS32 Rev 2 */ -OP("cvt.s.pu", Y_CVT_S_PU_OP, FP_R2ds_TYPE_INST, 0x46c00020) /* MIPS32 Rev 2 */ -OP("cvt.s.w", Y_CVT_S_W_OP, FP_R2ds_TYPE_INST, 0x46800020) -OP("cvt.w.d", Y_CVT_W_D_OP, FP_R2ds_TYPE_INST, 0x46200024) -OP("cvt.w.s", Y_CVT_W_S_OP, FP_R2ds_TYPE_INST, 0x46000024) - -OP("deret", Y_DERET_OP, NOARG_TYPE_INST, 0x4200001f) /* MIPS32 Rev 2 */ -OP("di", Y_DI_OP, I1t_TYPE_INST, 0x41606000) /* MIPS32 Rev 2 */ - -OP("div", Y_DIV_OP, R2st_TYPE_INST, 0x0000001a) -OP("div.d", Y_DIV_D_OP, FP_R3_TYPE_INST, 0x46200003) -OP("div.s", Y_DIV_S_OP, FP_R3_TYPE_INST, 0x46000003) -OP("divu", Y_DIVU_OP, R2st_TYPE_INST, 0x0000001b) - -OP("ehb", Y_EHB_OP, NOARG_TYPE_INST, 0x000000c0) /* MIPS32 Rev 2 */ -OP("ei", Y_EI_OP, I1t_TYPE_INST, 0x41606020) /* MIPS32 Rev 2 */ -OP("eret", Y_ERET_OP, NOARG_TYPE_INST, 0x42000018) /* MIPS32 */ -OP("ext", Y_EXT_OP, FP_R2ds_TYPE_INST, 0x7c000000) /* MIPS32 Rev 2 */ - -OP("floor.l.d", Y_FLOOR_L_D_OP, FP_R2ds_TYPE_INST, 0x4620000b) /* MIPS32 Rev 2 */ -OP("floor.l.s", Y_FLOOR_L_S_OP, FP_R2ds_TYPE_INST, 0x4600000b) /* MIPS32 Rev 2 */ -OP("floor.w.d", Y_FLOOR_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000f) /* MIPS32 */ -OP("floor.w.s", Y_FLOOR_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000f) /* MIPS32 */ - -OP("ins", Y_INS_OP, FP_R2ds_TYPE_INST, 0x7c000004) /* MIPS32 Rev 2 */ - -OP("j", Y_J_OP, J_TYPE_INST, 0x08000000) -OP("jal", Y_JAL_OP, J_TYPE_INST, 0x0c000000) -OP("jalr", Y_JALR_OP, R2ds_TYPE_INST, 0x00000009) -OP("jalr.hb", Y_JALR_HB_OP, R2ds_TYPE_INST, 0x00000409) /* MIPS32 Rev 2 */ - -OP("jr", Y_JR_OP, R1s_TYPE_INST, 0x00000008) -OP("jr.hb", Y_JR_HB_OP, R1s_TYPE_INST, 0x00000408) /* MIPS32 Rev 2 */ - -OP("l.d", Y_L_D_POP, PSEUDO_OP, -1) -OP("l.s", Y_L_S_POP, PSEUDO_OP, -1) - -OP("la", Y_LA_POP, PSEUDO_OP, -1) -OP("lb", Y_LB_OP, I2a_TYPE_INST, 0x80000000) -OP("lbu", Y_LBU_OP, I2a_TYPE_INST, 0x90000000) -OP("ld", Y_LD_POP, PSEUDO_OP, -1) -OP("ldc1", Y_LDC1_OP, FP_I2a_TYPE_INST, 0xd4000000) /* MIPS32 */ -OP("ldc2", Y_LDC2_OP, I2a_TYPE_INST, 0xd8000000) /* MIPS32 */ -OP("ldxc1", Y_LDXC1_OP, FP_R3_TYPE_INST, 0x4c000001) /* MIPS32 Rev 2 */ -OP("lh", Y_LH_OP, I2a_TYPE_INST, 0x84000000) -OP("lhu", Y_LHU_OP, I2a_TYPE_INST, 0x94000000) - -OP("li", Y_LI_POP, PSEUDO_OP, -1) -OP("li.d", Y_LI_D_POP, PSEUDO_OP, -1) -OP("li.s", Y_LI_S_POP, PSEUDO_OP, -1) - -OP("ll", Y_LL_OP, I2a_TYPE_INST, 0xc0000000) /* MIPS32 */ - -OP("lui", Y_LUI_OP, I1t_TYPE_INST, 0x3c000000) -OP("luxc1", Y_LUXC1_OP, FP_R3_TYPE_INST, 0x4c000005) /* MIPS32 Rev 2 */ - -OP("lw", Y_LW_OP, I2a_TYPE_INST, 0x8c000000) -OP("lwc1", Y_LWC1_OP, FP_I2a_TYPE_INST, 0xc4000000) -OP("lwc2", Y_LWC2_OP, I2a_TYPE_INST, 0xc8000000) -OP("lwl", Y_LWL_OP, I2a_TYPE_INST, 0x88000000) -OP("lwr", Y_LWR_OP, I2a_TYPE_INST, 0x98000000) -OP("lwxc1", Y_LWXC1_OP, FP_R3_TYPE_INST, 0x4c000000) /* MIPS32 Rev 2 */ - -OP("madd", Y_MADD_OP, R2st_TYPE_INST, 0x70000000) /* MIPS32 */ -OP("madd.d", Y_MADD_D_OP, FP_R4_TYPE_INST, 0x4c000001) /* MIPS32 Rev 2 */ -OP("madd.ps", Y_MADD_PS_OP, FP_R4_TYPE_INST, 0x4c000006) /* MIPS32 Rev 2 */ -OP("madd.s", Y_MADD_S_OP, FP_R4_TYPE_INST, 0x4c000000) /* MIPS32 Rev 2 */ -OP("maddu", Y_MADDU_OP, R2st_TYPE_INST, 0x70000001) /* MIPS32 */ - -OP("mfc0", Y_MFC0_OP, R2td_TYPE_INST, 0x40000000) -OP("mfc1", Y_MFC1_OP, FP_R2ts_TYPE_INST, 0x44000000) -OP("mfc1.d", Y_MFC1_D_POP, PSEUDO_OP, -1) -OP("mfc2", Y_MFC2_OP, R2td_TYPE_INST, 0x48000000) -OP("mfhc1", Y_MFHC1_OP, FP_R2ts_TYPE_INST, 0x44600000) /* MIPS32 Rev 2 */ -OP("mfhc2", Y_MFHC2_OP, R2td_TYPE_INST, 0x48600000) /* MIPS32 Rev 2 */ -OP("mfhi", Y_MFHI_OP, R1d_TYPE_INST, 0x00000010) -OP("mflo", Y_MFLO_OP, R1d_TYPE_INST, 0x00000012) - -OP("mov.d", Y_MOV_D_OP, FP_R2ds_TYPE_INST, 0x46200006) -OP("mov.ps", Y_MOV_PS_OP, FP_R2ds_TYPE_INST, 0x46c00006) /* MIPS32 Rev 2 */ -OP("mov.s", Y_MOV_S_OP, FP_R2ds_TYPE_INST, 0x46000006) -OP("move", Y_MOVE_POP, PSEUDO_OP, -1) - -OP("movf", Y_MOVF_OP, MOVC_TYPE_INST, 0x00000001) /* MIPS32 */ -OP("movf.d", Y_MOVF_D_OP, FP_MOVC_TYPE_INST, 0x46200011) /* MIPS32 */ -OP("movf.ps", Y_MOVF_PS_OP, FP_MOVC_TYPE_INST, 0x46c00011) /* MIPS32 Rev 2 */ -OP("movf.s", Y_MOVF_S_OP, FP_MOVC_TYPE_INST, 0x46000011) /* MIPS32 */ - -OP("movn", Y_MOVN_OP, R3_TYPE_INST, 0x0000000b) /* MIPS32 */ -OP("movn.d", Y_MOVN_D_OP, FP_MOVC_TYPE_INST, 0x46200013) /* MIPS32 */ -OP("movn.ps", Y_MOVN_PS_OP, FP_MOVC_TYPE_INST, 0x46c00013) /* MIPS32 Rev 2 */ -OP("movn.s", Y_MOVN_S_OP, FP_MOVC_TYPE_INST, 0x46000013) /* MIPS32 */ - -OP("movt", Y_MOVT_OP, MOVC_TYPE_INST, 0x00010001) /* MIPS32 */ -OP("movt.d", Y_MOVT_D_OP, FP_MOVC_TYPE_INST, 0x46210011) /* MIPS32 */ -OP("movt.ps", Y_MOVT_PS_OP, FP_MOVC_TYPE_INST, 0x46c10011) /* MIPS32 Rev 2 */ -OP("movt.s", Y_MOVT_S_OP, FP_MOVC_TYPE_INST, 0x46010011) /* MIPS32 */ - -OP("movz", Y_MOVZ_OP, R3_TYPE_INST, 0x0000000a) /* MIPS32 */ -OP("movz.d", Y_MOVZ_D_OP, FP_MOVC_TYPE_INST, 0x46200012) /* MIPS32 */ -OP("movz.ps", Y_MOVZ_PS_OP, FP_MOVC_TYPE_INST, 0x46c00012) /* MIPS32 Rev 2 */ -OP("movz.s", Y_MOVZ_S_OP, FP_MOVC_TYPE_INST, 0x46000012) /* MIPS32 */ - -OP("msub", Y_MSUB_OP, R2st_TYPE_INST, 0x70000004) /* MIPS32 */ -OP("msub.d", Y_MSUB_D_OP, FP_R4_TYPE_INST, 0x4c000021) /* MIPS32 Rev 2 */ -OP("msub.ps", Y_MSUB_PS_OP, FP_R4_TYPE_INST, 0x4c000026) /* MIPS32 Rev 2 */ -OP("msub.s", Y_MSUB_S_OP, FP_R4_TYPE_INST, 0x4c000020) /* MIPS32 Rev 2 */ -OP("msubu", Y_MSUBU_OP, R2st_TYPE_INST, 0x70000005) /* MIPS32 */ - -OP("mtc0", Y_MTC0_OP, R2td_TYPE_INST, 0x40800000) -OP("mtc1", Y_MTC1_OP, FP_R2ts_TYPE_INST, 0x44800000) -OP("mtc1.d", Y_MTC1_D_POP, PSEUDO_OP, -1) -OP("mtc2", Y_MTC2_OP, R2td_TYPE_INST, 0x48800000) -OP("mthc1", Y_MTHC1_OP, FP_R2ts_TYPE_INST, 0x44e00000) /* MIPS32 Rev 2 */ -OP("mthc2", Y_MTHC2_OP, R2td_TYPE_INST, 0x48e00000) /* MIPS32 Rev 2 */ - -OP("mthi", Y_MTHI_OP, R1s_TYPE_INST, 0x00000011) -OP("mtlo", Y_MTLO_OP, R1s_TYPE_INST, 0x00000013) - -OP("mul", Y_MUL_OP, R3_TYPE_INST, 0x70000002) /* MIPS32 */ -OP("mul.d", Y_MUL_D_OP, FP_R3_TYPE_INST, 0x46200002) -OP("mul.ps", Y_MUL_PS_OP, FP_R3_TYPE_INST, 0x46c00002) /* MIPS32 Rev 2 */ -OP("mul.s", Y_MUL_S_OP, FP_R3_TYPE_INST, 0x46000002) -OP("mulo", Y_MULO_POP, PSEUDO_OP, -1) -OP("mulou", Y_MULOU_POP, PSEUDO_OP, -1) -OP("mult", Y_MULT_OP, R2st_TYPE_INST, 0x00000018) -OP("multu", Y_MULTU_OP, R2st_TYPE_INST, 0x00000019) - -OP("neg", Y_NEG_POP, PSEUDO_OP, -1) -OP("neg.d", Y_NEG_D_OP, FP_R2ds_TYPE_INST, 0x46200007) -OP("neg.ps", Y_NEG_PS_OP, FP_R2ds_TYPE_INST, 0x46c00007) /* MIPS32 Rev 2 */ -OP("neg.s", Y_NEG_S_OP, FP_R2ds_TYPE_INST, 0x46000007) -OP("negu", Y_NEGU_POP, PSEUDO_OP, -1) - -OP("nmadd.d", Y_NMADD_D_OP, FP_R4_TYPE_INST, 0x4c000031) /* MIPS32 Rev 2 */ -OP("nmadd.ps", Y_NMADD_PS_OP, FP_R4_TYPE_INST, 0x4c000036) /* MIPS32 Rev 2 */ -OP("nmadd.s", Y_NMADD_S_OP, FP_R4_TYPE_INST, 0x4c000030) /* MIPS32 Rev 2 */ -OP("nmsub.d", Y_NMSUB_D_OP, FP_R4_TYPE_INST, 0x4c000039) /* MIPS32 Rev 2 */ -OP("nmsub.ps", Y_NMSUB_PS_OP, FP_R4_TYPE_INST, 0x4c00003e) /* MIPS32 Rev 2 */ -OP("nmsub.s", Y_NMSUB_S_OP, FP_R4_TYPE_INST, 0x4c000038) /* MIPS32 Rev 2 */ - -OP("nop", Y_NOP_POP, PSEUDO_OP, -1) -OP("nor", Y_NOR_OP, R3_TYPE_INST, 0x00000027) -OP("not", Y_NOT_POP, PSEUDO_OP, -1) -OP("or", Y_OR_OP, R3_TYPE_INST, 0x00000025) -OP("ori", Y_ORI_OP, I2_TYPE_INST, 0x34000000) - -OP("pll.ps", Y_PLL_PS_OP, FP_R3_TYPE_INST, 0x46c0002c) /* MIPS32 Rev 2 */ -OP("plu.ps", Y_PLU_PS_OP, FP_R3_TYPE_INST, 0x46c0002d) /* MIPS32 Rev 2 */ - -OP("pref", Y_PREF_OP, I2_TYPE_INST, 0xcc000000) /* MIPS32 */ -OP("prefx", Y_PREFX_OP, R2st_TYPE_INST, 0x4600000f) /* MIPS32 Rev 2 */ -OP("pul.ps", Y_PUL_PS_OP, FP_R3_TYPE_INST, 0x46c0002e) /* MIPS32 Rev 2 */ -OP("puu.ps", Y_PUU_PS_OP, FP_R3_TYPE_INST, 0x46c0002f) /* MIPS32 Rev 2 */ - -OP("rdhwr", Y_RDHWR_OP, R3_TYPE_INST, 0x7c00003b) /* MIPS32 Rev 2 */ -OP("rdpgpr", Y_RDPGPR_OP, R2td_TYPE_INST, 0x41400000) /* MIPS32 Rev 2 */ - -OP("recip.d", Y_RECIP_D_OP, FP_R2ds_TYPE_INST, 0x46200015) /* MIPS32 Rev 2 */ -OP("recip.s", Y_RECIP_S_OP, FP_R2ds_TYPE_INST, 0x46000015) /* MIPS32 Rev 2 */ - -OP("rem", Y_REM_POP, PSEUDO_OP, -1) -OP("remu", Y_REMU_POP, PSEUDO_OP, -1) - -OP("rfe", Y_RFE_OP, NOARG_TYPE_INST, 0x42000010) - -OP("rol", Y_ROL_POP, PSEUDO_OP, -1) -OP("ror", Y_ROR_POP, PSEUDO_OP, -1) -OP("rotr", Y_ROTR_OP, R2sh_TYPE_INST, 0x00200002) /* MIPS32 Rev 2 */ -OP("rotrv", Y_ROTRV_OP, R2sh_TYPE_INST, 0x00200003) /* MIPS32 Rev 2 */ - -OP("round.l.d", Y_ROUND_L_D_OP, FP_R2ds_TYPE_INST, 0x46200008) /* MIPS32 Rev 2 */ -OP("round.l.s", Y_ROUND_L_S_OP, FP_R2ds_TYPE_INST, 0x46000008) /* MIPS32 Rev 2 */ -OP("round.w.d", Y_ROUND_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000c) /* MIPS32 */ -OP("round.w.s", Y_ROUND_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000c) /* MIPS32 */ - -OP("rsqrt.d", Y_RSQRT_D_OP, FP_R2ds_TYPE_INST, 0x46200016) /* MIPS32 Rev 2 */ -OP("rsqrt.s", Y_RSQRT_S_OP, FP_R2ds_TYPE_INST, 0x46000016) /* MIPS32 Rev 2 */ - -OP("s.d", Y_S_D_POP, PSEUDO_OP, -1) -OP("s.s", Y_S_S_POP, PSEUDO_OP, -1) - -OP("sb", Y_SB_OP, I2a_TYPE_INST, 0xa0000000) -OP("sc", Y_SC_OP, I2a_TYPE_INST, 0xe0000000) /* MIPS32 */ -OP("sd", Y_SD_POP, PSEUDO_OP, -1) -OP("sdbbp", Y_SDBBP_OP, NOARG_TYPE_INST, 0x7000003f) /* MIPS32 Rev 2*/ -OP("sdc1", Y_SDC1_OP, FP_I2a_TYPE_INST, 0xf4000000) /* MIPS32 */ -OP("sdc2", Y_SDC2_OP, I2a_TYPE_INST, 0xf8000000) /* MIPS32 */ -OP("sdxc1", Y_SDXC1_OP, FP_R3_TYPE_INST, 0x46000009) /* MIPS32 Rev 2 */ - -OP("seb", Y_SEB_OP, R2td_TYPE_INST, 0x7c000420) /* MIPS32 Rev 2 */ -OP("seh", Y_SEH_OP, R2td_TYPE_INST, 0x7c000620) /* MIPS32 Rev 2 */ -OP("seq", Y_SEQ_POP, PSEUDO_OP, -1) -OP("sge", Y_SGE_POP, PSEUDO_OP, -1) -OP("sgeu", Y_SGEU_POP, PSEUDO_OP, -1) -OP("sgt", Y_SGT_POP, PSEUDO_OP, -1) -OP("sgtu", Y_SGTU_POP, PSEUDO_OP, -1) - -OP("sh", Y_SH_OP, I2a_TYPE_INST, 0xa4000000) -OP("sle", Y_SLE_POP, PSEUDO_OP, -1) -OP("sleu", Y_SLEU_POP, PSEUDO_OP, -1) -OP("sll", Y_SLL_OP, R2sh_TYPE_INST, 0x00000000) -OP("sllv", Y_SLLV_OP, R3sh_TYPE_INST, 0x00000004) - -OP("slt", Y_SLT_OP, R3_TYPE_INST, 0x0000002a) -OP("slti", Y_SLTI_OP, I2_TYPE_INST, 0x28000000) -OP("sltiu", Y_SLTIU_OP, I2_TYPE_INST, 0x2c000000) -OP("sltu", Y_SLTU_OP, R3_TYPE_INST, 0x0000002b) -OP("sne", Y_SNE_POP, PSEUDO_OP, -1) - -OP("sqrt.d", Y_SQRT_D_OP, FP_R2ds_TYPE_INST, 0x46200004) /* MIPS32 */ -OP("sqrt.s", Y_SQRT_S_OP, FP_R2ds_TYPE_INST, 0x46000004) /* MIPS32 */ - -OP("sra", Y_SRA_OP, R2sh_TYPE_INST, 0x00000003) -OP("srav", Y_SRAV_OP, R3sh_TYPE_INST, 0x00000007) -OP("srl", Y_SRL_OP, R2sh_TYPE_INST, 0x00000002) -OP("srlv", Y_SRLV_OP, R3sh_TYPE_INST, 0x00000006) - -OP("ssnop", Y_SSNOP_OP, R2sh_TYPE_INST, 0x00000040) /* MIPS32 */ - -OP("sub", Y_SUB_OP, R3_TYPE_INST, 0x00000022) -OP("sub.d", Y_SUB_D_OP, FP_R3_TYPE_INST, 0x46200001) -OP("sub.ps", Y_SUB_PS_OP, FP_R3_TYPE_INST, 0x46600001) /* MIPS32 Rev 2 */ -OP("sub.s", Y_SUB_S_OP, FP_R3_TYPE_INST, 0x46000001) -OP("subu", Y_SUBU_OP, R3_TYPE_INST, 0x00000023) - -OP("suxc1", Y_SUXC1_OP, FP_R3_TYPE_INST, 0x4600000d) /* MIPS32 Rev 2 */ - -OP("sw", Y_SW_OP, I2a_TYPE_INST, 0xac000000) -OP("swc1", Y_SWC1_OP, FP_I2a_TYPE_INST, 0xe4000000) -OP("swc2", Y_SWC2_OP, I2a_TYPE_INST, 0xe8000000) -OP("swl", Y_SWL_OP, I2a_TYPE_INST, 0xa8000000) -OP("swr", Y_SWR_OP, I2a_TYPE_INST, 0xb8000000) -OP("swxc1", Y_SWXC1_OP, FP_R3_TYPE_INST, 0x46000008) /* MIPS32 Rev 2 */ - -OP("sync", Y_SYNC_OP, NOARG_TYPE_INST, 0x0000000f) /* MIPS32 */ -OP("synci", Y_SYNCI_OP, I2_TYPE_INST, 0x04140000) /* MIPS32 Rev 2 */ -OP("syscall", Y_SYSCALL_OP, NOARG_TYPE_INST, 0x0000000c) - -OP("teq", Y_TEQ_OP, R2st_TYPE_INST, 0x00000034) /* MIPS32 */ -OP("teqi", Y_TEQI_OP, I1s_TYPE_INST, 0x040c0000) /* MIPS32 */ -OP("tge", Y_TGE_OP, R2st_TYPE_INST, 0x00000030) /* MIPS32 */ -OP("tgei", Y_TGEI_OP, I1s_TYPE_INST, 0x04080000) /* MIPS32 */ -OP("tgeiu", Y_TGEIU_OP, I1s_TYPE_INST, 0x04090000) /* MIPS32 */ -OP("tgeu", Y_TGEU_OP, R2st_TYPE_INST, 0x00000031) /* MIPS32 */ - -OP("tlbp", Y_TLBP_OP, NOARG_TYPE_INST, 0x42000008) -OP("tlbr", Y_TLBR_OP, NOARG_TYPE_INST, 0x42000001) -OP("tlbwi", Y_TLBWI_OP, NOARG_TYPE_INST, 0x42000002) -OP("tlbwr", Y_TLBWR_OP, NOARG_TYPE_INST, 0x42000006) - -OP("tlt", Y_TLT_OP, R2st_TYPE_INST, 0x00000032) /* MIPS32 */ -OP("tlti", Y_TLTI_OP, I1s_TYPE_INST, 0x040a0000) /* MIPS32 */ -OP("tltiu", Y_TLTIU_OP, I1s_TYPE_INST, 0x040b0000) /* MIPS32 */ -OP("tltu", Y_TLTU_OP, R2st_TYPE_INST, 0x00000033) /* MIPS32 */ -OP("tne", Y_TNE_OP, R2st_TYPE_INST, 0x00000036) /* MIPS32 */ -OP("tnei", Y_TNEI_OP, I1s_TYPE_INST, 0x040e0000) /* MIPS32 */ - -OP("trunc.l.d", Y_TRUNC_L_D_OP, FP_R2ds_TYPE_INST, 0x46200009) /* MIPS32 Rev 2 */ -OP("trunc.l.s", Y_TRUNC_L_S_OP, FP_R2ds_TYPE_INST, 0x46000009) /* MIPS32 Rev 2 */ -OP("trunc.w.d", Y_TRUNC_W_D_OP, FP_R2ds_TYPE_INST, 0x4620000d) /* MIPS32 */ -OP("trunc.w.s", Y_TRUNC_W_S_OP, FP_R2ds_TYPE_INST, 0x4600000d) /* MIPS32 */ - -OP("ulh", Y_ULH_POP, PSEUDO_OP, -1) -OP("ulhu", Y_ULHU_POP, PSEUDO_OP, -1) -OP("ulw", Y_ULW_POP, PSEUDO_OP, -1) -OP("ush", Y_USH_POP, PSEUDO_OP, -1) -OP("usw", Y_USW_POP, PSEUDO_OP, -1) - -OP("wrpgpr", Y_WRPGPR_OP, R2td_TYPE_INST, 0x41c00000) /* MIPS32 Rev 2 */ -OP("wsbh", Y_WSBH_OP, R2td_TYPE_INST, 0x7c0000a0) /* MIPS32 Rev 2 */ - -OP("xor", Y_XOR_OP, R3_TYPE_INST, 0x00000026) -OP("xori", Y_XORI_OP, I2_TYPE_INST, 0x38000000) diff --git a/spim-qtspimbot/CPU/parser.h b/spim-qtspimbot/CPU/parser.h deleted file mode 100755 index 0e120f8..0000000 --- a/spim-qtspimbot/CPU/parser.h +++ /dev/null @@ -1,50 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to parser for instructions and assembler directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -void fix_current_label_address (mem_addr new_addr); -int imm_op_to_op (int opcode); -void initialize_parser (char *file_name); -int op_to_imm_op (int opcode); -void yyerror (char *s); -int yyparse (); - - -/* Exported Variables: */ - -extern bool data_dir; /* => item in data segment */ - -extern bool text_dir; /* => item in text segment */ - -extern bool parse_error_occurred; /* => parse resulted in error */ diff --git a/spim-qtspimbot/CPU/parser.y b/spim-qtspimbot/CPU/parser.y deleted file mode 100755 index 62b98c5..0000000 --- a/spim-qtspimbot/CPU/parser.y +++ /dev/null @@ -1,2957 +0,0 @@ -/* SPIM S20 MIPS simulator. - Parser for instructions and assembler directives. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -%expect 25 /* Supress warning about 25 shift-reduce conflicts */ - -%start LINE - -%token Y_EOF - -%token Y_NL -%token Y_INT -%token Y_ID -%token Y_REG -%token Y_FP_REG -%token Y_STR -%token Y_FP - -/* MIPS instructions op codes: */ - -%token Y_ABS_D_OP -%token Y_ABS_PS_OP -%token Y_ABS_S_OP -%token Y_ADD_D_OP -%token Y_ADD_OP -%token Y_ADD_PS_OP -%token Y_ADD_S_OP -%token Y_ADDI_OP -%token Y_ADDIU_OP -%token Y_ADDU_OP -%token Y_ALNV_PS_OP -%token Y_AND_OP -%token Y_ANDI_OP -%token Y_BC1F_OP -%token Y_BC1FL_OP -%token Y_BC1T_OP -%token Y_BC1TL_OP -%token Y_BC2F_OP -%token Y_BC2FL_OP -%token Y_BC2T_OP -%token Y_BC2TL_OP -%token Y_BEQ_OP -%token Y_BEQL_OP -%token Y_BGEZ_OP -%token Y_BGEZAL_OP -%token Y_BGEZALL_OP -%token Y_BGEZL_OP -%token Y_BGTZ_OP -%token Y_BGTZL_OP -%token Y_BLEZ_OP -%token Y_BLEZL_OP -%token Y_BLTZ_OP -%token Y_BLTZAL_OP -%token Y_BLTZALL_OP -%token Y_BLTZL_OP -%token Y_BNE_OP -%token Y_BNEL_OP -%token Y_BREAK_OP -%token Y_C_EQ_D_OP -%token Y_C_EQ_PS_OP -%token Y_C_EQ_S_OP -%token Y_C_F_D_OP -%token Y_C_F_PS_OP -%token Y_C_F_S_OP -%token Y_C_LE_D_OP -%token Y_C_LE_PS_OP -%token Y_C_LE_S_OP -%token Y_C_LT_D_OP -%token Y_C_LT_PS_OP -%token Y_C_LT_S_OP -%token Y_C_NGE_D_OP -%token Y_C_NGE_PS_OP -%token Y_C_NGE_S_OP -%token Y_C_NGL_D_OP -%token Y_C_NGL_PS_OP -%token Y_C_NGL_S_OP -%token Y_C_NGLE_D_OP -%token Y_C_NGLE_PS_OP -%token Y_C_NGLE_S_OP -%token Y_C_NGT_D_OP -%token Y_C_NGT_PS_OP -%token Y_C_NGT_S_OP -%token Y_C_OLE_D_OP -%token Y_C_OLE_PS_OP -%token Y_C_OLE_S_OP -%token Y_C_OLT_D_OP -%token Y_C_OLT_PS_OP -%token Y_C_OLT_S_OP -%token Y_C_SEQ_D_OP -%token Y_C_SEQ_PS_OP -%token Y_C_SEQ_S_OP -%token Y_C_SF_D_OP -%token Y_C_SF_PS_OP -%token Y_C_SF_S_OP -%token Y_C_UEQ_D_OP -%token Y_C_UEQ_PS_OP -%token Y_C_UEQ_S_OP -%token Y_C_ULE_D_OP -%token Y_C_ULE_PS_OP -%token Y_C_ULE_S_OP -%token Y_C_ULT_D_OP -%token Y_C_ULT_PS_OP -%token Y_C_ULT_S_OP -%token Y_C_UN_D_OP -%token Y_C_UN_PS_OP -%token Y_C_UN_S_OP -%token Y_CACHE_OP -%token Y_CEIL_L_D_OP -%token Y_CEIL_L_S_OP -%token Y_CEIL_W_D_OP -%token Y_CEIL_W_S_OP -%token Y_CFC0_OP -%token Y_CFC1_OP -%token Y_CFC2_OP -%token Y_CLO_OP -%token Y_CLZ_OP -%token Y_COP2_OP -%token Y_CTC0_OP -%token Y_CTC1_OP -%token Y_CTC2_OP -%token Y_CVT_D_L_OP -%token Y_CVT_D_S_OP -%token Y_CVT_D_W_OP -%token Y_CVT_L_D_OP -%token Y_CVT_L_S_OP -%token Y_CVT_PS_S_OP -%token Y_CVT_S_D_OP -%token Y_CVT_S_L_OP -%token Y_CVT_S_PL_OP -%token Y_CVT_S_PU_OP -%token Y_CVT_S_W_OP -%token Y_CVT_W_D_OP -%token Y_CVT_W_S_OP -%token Y_DERET_OP -%token Y_DI_OP -%token Y_DIV_D_OP -%token Y_DIV_OP -%token Y_DIV_S_OP -%token Y_DIVU_OP -%token Y_EHB_OP -%token Y_EI_OP -%token Y_ERET_OP -%token Y_EXT_OP -%token Y_FLOOR_L_D_OP -%token Y_FLOOR_L_S_OP -%token Y_FLOOR_W_D_OP -%token Y_FLOOR_W_S_OP -%token Y_INS_OP -%token Y_J_OP -%token Y_JAL_OP -%token Y_JALR_HB_OP -%token Y_JALR_OP -%token Y_JR_HB_OP -%token Y_JR_OP -%token Y_LB_OP -%token Y_LBU_OP -%token Y_LDC1_OP -%token Y_LDC2_OP -%token Y_LDXC1_OP -%token Y_LH_OP -%token Y_LHU_OP -%token Y_LL_OP -%token Y_LUI_OP -%token Y_LUXC1_OP -%token Y_LW_OP -%token Y_LWC1_OP -%token Y_LWC2_OP -%token Y_LWL_OP -%token Y_LWR_OP -%token Y_LWXC1_OP -%token Y_MADD_D_OP -%token Y_MADD_OP -%token Y_MADD_PS_OP -%token Y_MADD_S_OP -%token Y_MADDU_OP -%token Y_MFC0_OP -%token Y_MFC1_OP -%token Y_MFC2_OP -%token Y_MFHC1_OP -%token Y_MFHC2_OP -%token Y_MFHI_OP -%token Y_MFLO_OP -%token Y_MOV_D_OP -%token Y_MOV_PS_OP -%token Y_MOV_S_OP -%token Y_MOVF_D_OP -%token Y_MOVF_OP -%token Y_MOVF_PS_OP -%token Y_MOVF_S_OP -%token Y_MOVN_D_OP -%token Y_MOVN_OP -%token Y_MOVN_PS_OP -%token Y_MOVN_S_OP -%token Y_MOVT_D_OP -%token Y_MOVT_OP -%token Y_MOVT_PS_OP -%token Y_MOVT_S_OP -%token Y_MOVZ_D_OP -%token Y_MOVZ_OP -%token Y_MOVZ_PS_OP -%token Y_MOVZ_S_OP -%token Y_MSUB_D_OP -%token Y_MSUB_OP -%token Y_MSUB_PS_OP -%token Y_MSUB_S_OP -%token Y_MSUBU_OP -%token Y_MTC0_OP -%token Y_MTC1_OP -%token Y_MTC2_OP -%token Y_MTHC1_OP -%token Y_MTHC2_OP -%token Y_MTHI_OP -%token Y_MTLO_OP -%token Y_MUL_D_OP -%token Y_MUL_PS_OP -%token Y_MUL_S_OP -%token Y_MUL_OP -%token Y_MULT_OP -%token Y_MULTU_OP -%token Y_NEG_D_OP -%token Y_NEG_PS_OP -%token Y_NEG_S_OP -%token Y_NMADD_D_OP -%token Y_NMADD_PS_OP -%token Y_NMADD_S_OP -%token Y_NMSUB_D_OP -%token Y_NMSUB_PS_OP -%token Y_NMSUB_S_OP -%token Y_NOR_OP -%token Y_OR_OP -%token Y_ORI_OP -%token Y_PFW_OP -%token Y_PLL_PS_OP -%token Y_PLU_PS_OP -%token Y_PREF_OP -%token Y_PREFX_OP -%token Y_PUL_PS_OP -%token Y_PUU_PS_OP -%token Y_RDHWR_OP -%token Y_RDPGPR_OP -%token Y_RECIP_D_OP -%token Y_RECIP_S_OP -%token Y_RFE_OP -%token Y_ROTR_OP -%token Y_ROTRV_OP -%token Y_ROUND_L_D_OP -%token Y_ROUND_L_S_OP -%token Y_ROUND_W_D_OP -%token Y_ROUND_W_S_OP -%token Y_RSQRT_D_OP -%token Y_RSQRT_S_OP -%token Y_SB_OP -%token Y_SC_OP -%token Y_SDBBP_OP -%token Y_SDC1_OP -%token Y_SDC2_OP -%token Y_SDXC1_OP -%token Y_SEB_OP -%token Y_SEH_OP -%token Y_SH_OP -%token Y_SLL_OP -%token Y_SLLV_OP -%token Y_SLT_OP -%token Y_SLTI_OP -%token Y_SLTIU_OP -%token Y_SLTU_OP -%token Y_SQRT_D_OP -%token Y_SQRT_S_OP -%token Y_SRA_OP -%token Y_SRAV_OP -%token Y_SRL_OP -%token Y_SRLV_OP -%token Y_SSNOP_OP -%token Y_SUB_D_OP -%token Y_SUB_OP -%token Y_SUB_PS_OP -%token Y_SUB_S_OP -%token Y_SUBU_OP -%token Y_SUXC1_OP -%token Y_SW_OP -%token Y_SWC1_OP -%token Y_SWC2_OP -%token Y_SWL_OP -%token Y_SWR_OP -%token Y_SWXC1_OP -%token Y_SYNC_OP -%token Y_SYNCI_OP -%token Y_SYSCALL_OP -%token Y_TEQ_OP -%token Y_TEQI_OP -%token Y_TGE_OP -%token Y_TGEI_OP -%token Y_TGEIU_OP -%token Y_TGEU_OP -%token Y_TLBP_OP -%token Y_TLBR_OP -%token Y_TLBWI_OP -%token Y_TLBWR_OP -%token Y_TLT_OP -%token Y_TLTI_OP -%token Y_TLTIU_OP -%token Y_TLTU_OP -%token Y_TNE_OP -%token Y_TNEI_OP -%token Y_TRUNC_L_D_OP -%token Y_TRUNC_L_S_OP -%token Y_TRUNC_W_D_OP -%token Y_TRUNC_W_S_OP -%token Y_WRPGPR_OP -%token Y_WSBH_OP -%token Y_XOR_OP -%token Y_XORI_OP - - -/* Assembler pseudo operations op codes: */ - -%token Y_ABS_POP -%token Y_B_POP -%token Y_BAL_POP -%token Y_BEQZ_POP -%token Y_BGE_POP -%token Y_BGEU_POP -%token Y_BGT_POP -%token Y_BGTU_POP -%token Y_BLE_POP -%token Y_BLEU_POP -%token Y_BLT_POP -%token Y_BLTU_POP -%token Y_BNEZ_POP -%token Y_LA_POP -%token Y_LD_POP -%token Y_L_D_POP -%token Y_L_S_POP -%token Y_LI_D_POP -%token Y_LI_POP -%token Y_LI_S_POP -%token Y_MFC1_D_POP -%token Y_MOVE_POP -%token Y_MTC1_D_POP -%token Y_MULO_POP -%token Y_MULOU_POP -%token Y_NEG_POP -%token Y_NEGU_POP -%token Y_NOP_POP -%token Y_NOT_POP -%token Y_REM_POP -%token Y_REMU_POP -%token Y_ROL_POP -%token Y_ROR_POP -%token Y_S_D_POP -%token Y_S_S_POP -%token Y_SD_POP -%token Y_SEQ_POP -%token Y_SGE_POP -%token Y_SGEU_POP -%token Y_SGT_POP -%token Y_SGTU_POP -%token Y_SLE_POP -%token Y_SLEU_POP -%token Y_SNE_POP -%token Y_ULH_POP -%token Y_ULHU_POP -%token Y_ULW_POP -%token Y_USH_POP -%token Y_USW_POP - -/* Assembler directives: */ - -%token Y_ALIAS_DIR -%token Y_ALIGN_DIR -%token Y_ASCII_DIR -%token Y_ASCIIZ_DIR -%token Y_ASM0_DIR -%token Y_BGNB_DIR -%token Y_BYTE_DIR -%token Y_COMM_DIR -%token Y_DATA_DIR -%token Y_DOUBLE_DIR -%token Y_END_DIR -%token Y_ENDB_DIR -%token Y_ENDR_DIR -%token Y_ENT_DIR -%token Y_ERR_DIR -%token Y_EXTERN_DIR -%token Y_FILE_DIR -%token Y_FLOAT_DIR -%token Y_FMASK_DIR -%token Y_FRAME_DIR -%token Y_GLOBAL_DIR -%token Y_HALF_DIR -%token Y_K_DATA_DIR -%token Y_K_TEXT_DIR -%token Y_LABEL_DIR -%token Y_LCOMM_DIR -%token Y_LIVEREG_DIR -%token Y_LOC_DIR -%token Y_MASK_DIR -%token Y_NOALIAS_DIR -%token Y_OPTIONS_DIR -%token Y_RDATA_DIR -%token Y_REPEAT_DIR -%token Y_SDATA_DIR -%token Y_SET_DIR -%token Y_SPACE_DIR -%token Y_STRUCT_DIR -%token Y_TEXT_DIR -%token Y_VERSTAMP_DIR -%token Y_VREG_DIR -%token Y_WORD_DIR - -%{ -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "data.h" -#include "scanner.h" -#include "parser.h" - -#define YYDEBUG 1 - -/* return (0) */ -#define LINE_PARSE_DONE YYACCEPT - -/* return (1) */ -#define FILE_PARSE_DONE YYABORT - -typedef struct ll -{ - label *head; - struct ll *tail; -} label_list; - - -/* Exported Variables: */ - -bool data_dir; /* => item in data segment */ - -bool text_dir; /* => item in text segment */ - -bool parse_error_occurred; /* => parse resulted in error */ - - -/* Local functions: */ - -static imm_expr *branch_offset (int n_inst); -static int cc_to_rt (int cc, int nd, int tf); -static void check_imm_range (imm_expr*, int32, int32); -static void check_uimm_range (imm_expr*, uint32, uint32); -static void clear_labels (); -static label_list *cons_label (label *head, label_list *tail); -static void div_inst (int op, int rd, int rs, int rt, int const_divisor); -static void mips32_r2_inst (); -static void mult_inst (int op, int rd, int rs, int rt); -static void nop_inst (); -static void set_eq_inst (int op, int rd, int rs, int rt); -static void set_ge_inst (int op, int rd, int rs, int rt); -static void set_gt_inst (int op, int rd, int rs, int rt); -static void set_le_inst (int op, int rd, int rs, int rt); -static void store_word_data (int value); -static void trap_inst (); -static void yywarn (char*); - - -/* Local variables: */ - -static bool null_term; /* => string terminate by \0 */ - -static void (*store_op) (void*); /* Function to store items in an EXPR_LST */ - -static label_list *this_line_labels = NULL; /* List of label for curent line */ - -static bool noat_flag = 0; /* => program can use $1 */ - -static char *input_file_name; /* Name of file being parsed */ - -%} - - - -%% - -LINE: {parse_error_occurred = false; scanner_start_line (); } LBL_CMD ; - -LBL_CMD: OPT_LBL CMD - | CMD - ; - - -OPT_LBL: ID ':' { - /* Call outside of cons_label, since an error sets that variable to NULL. */ - label* l = record_label ((char*)$1.p, - text_dir ? current_text_pc () : current_data_pc (), - 0); - this_line_labels = cons_label (l, this_line_labels); - free ((char*)$1.p); - } - - | ID '=' EXPR - { - label *l = record_label ((char*)$1.p, (mem_addr)$3.i, 1); - free ((char*)$1.p); - - l->const_flag = 1; - clear_labels (); - } - ; - - -CMD: ASM_CODE - { - clear_labels (); - } - TERM - - | ASM_DIRECTIVE - { - clear_labels (); - } - TERM - - | TERM - ; - - -TERM: Y_NL - { - LINE_PARSE_DONE; - } - - | Y_EOF - { - clear_labels (); - FILE_PARSE_DONE; - } - ; - - - -ASM_CODE: LOAD_OPS DEST ADDRESS - { - i_type_inst ($1.i == Y_LD_POP ? Y_LW_OP : $1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - if ($1.i == Y_LD_POP) - i_type_inst_free (Y_LW_OP, - $2.i + 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 4)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADC_OPS COP_REG ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADFP_OPS F_SRC1 ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - | LOADI_OPS DEST UIMM16 - { - i_type_inst_free ($1.i, $2.i, 0, (imm_expr *)$3.p); - } - - - | Y_LA_POP DEST ADDRESS - { - if (addr_expr_reg ((addr_expr *)$3.p)) - i_type_inst (Y_ADDI_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - else - i_type_inst (Y_ORI_OP, $2.i, 0, - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_LI_POP DEST IMM32 - { - i_type_inst_free (Y_ORI_OP, $2.i, 0, (imm_expr *)$3.p); - } - - - | Y_LI_D_POP F_DEST Y_FP - { - int *x = (int *) $3.p; - - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*x)); - r_co_type_inst (Y_MTC1_OP, 0, $2.i, 1); - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*(x+1))); - r_co_type_inst (Y_MTC1_OP, 0, $2.i + 1, 1); - } - - - | Y_LI_S_POP F_DEST Y_FP - { - float x = (float) *((double *) $3.p); - int *y = (int *) &x; - - i_type_inst (Y_ORI_OP, 1, 0, const_imm_expr (*y)); - r_co_type_inst (Y_MTC1_OP, 0, $2.i, 1); - } - - - | Y_ULW_POP DEST ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (Y_LWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_LWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); -#else - i_type_inst_free (Y_LWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); - i_type_inst (Y_LWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | ULOADH_POPS DEST ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (($1.i == Y_ULH_POP ? Y_LB_OP : Y_LBU_OP), - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_LBU_OP, 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); -#else - i_type_inst_free (($1.i == Y_ULH_POP ? Y_LB_OP : Y_LBU_OP), - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); - i_type_inst (Y_LBU_OP, 1, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - r_sh_type_inst (Y_SLL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | LOADFP_INDEX_OPS F_DEST ADDRESS - { - mips32_r2_inst (); - } - - - | STORE_OPS SRC1 ADDRESS - { - i_type_inst ($1.i == Y_SD_POP ? Y_SW_OP : $1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - if ($1.i == Y_SD_POP) - i_type_inst_free (Y_SW_OP, $2.i + 1, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 4)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREC_OPS COP_REG ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_USW_POP SRC1 ADDRESS - { -#ifdef SPIM_BIGENDIAN - i_type_inst (Y_SWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - i_type_inst_free (Y_SWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); -#else - i_type_inst_free (Y_SWL_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 3)); - i_type_inst (Y_SWR_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); -#endif - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | Y_USH_POP SRC1 ADDRESS - { - i_type_inst (Y_SB_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - - /* ROL SRC, SRC, 8 */ - r_sh_type_inst (Y_SLL_OP, 1, $2.i, 24); - r_sh_type_inst (Y_SRL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - - i_type_inst_free (Y_SB_OP, $2.i, - addr_expr_reg ((addr_expr *)$3.p), - incr_expr_offset (addr_expr_imm ((addr_expr *)$3.p), - 1)); - /* ROR SRC, SRC, 8 */ - r_sh_type_inst (Y_SRL_OP, 1, $2.i, 24); - r_sh_type_inst (Y_SLL_OP, $2.i, $2.i, 8); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREFP_OPS F_SRC1 ADDRESS - { - i_type_inst ($1.i, - $2.i, - addr_expr_reg ((addr_expr *)$3.p), - addr_expr_imm ((addr_expr *)$3.p)); - free (((addr_expr *)$3.p)->imm); - free ((addr_expr *)$3.p); - } - - - | STOREFP_INDEX_OPS F_DEST ADDRESS - { - mips32_r2_inst (); - } - - - | SYS_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | PREFETCH_OPS ADDRESS - { - mips32_r2_inst (); - } - - - | CACHE_OPS Y_INT ADDRESS - { - i_type_inst_free ($1.i, $2.i, 0, (imm_expr *)$3.p); - } - - - | TLB_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | Y_SYNC_OP - { - r_type_inst ($1.i, 0, 0, 0); - } - - | Y_SYNC_OP Y_INT - { - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | Y_BREAK_OP Y_INT - { - if ($2.i == 1) - yyerror ("Breakpoint 1 is reserved for debugger"); - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | Y_NOP_POP - { - nop_inst (); - } - - - | Y_SSNOP_OP - { - r_sh_type_inst (Y_SLL_OP, 0, 0, 1); /* SLL r0 r0 1 */ - } - - - | Y_ABS_POP DEST SRC1 - { - if ($2.i != $3.i) - r_type_inst (Y_ADDU_OP, $2.i, 0, $3.i); - - i_type_inst_free (Y_BGEZ_OP, 0, $3.i, branch_offset (2)); - r_type_inst (Y_SUB_OP, $2.i, 0, $3.i); - } - - - | Y_NEG_POP DEST SRC1 - { - r_type_inst (Y_SUB_OP, $2.i, 0, $3.i); - } - - - | Y_NEGU_POP DEST SRC1 - { - r_type_inst (Y_SUBU_OP, $2.i, 0, $3.i); - } - - - | Y_NOT_POP DEST SRC1 - { - r_type_inst (Y_NOR_OP, $2.i, $3.i, 0); - } - - - | Y_MOVE_POP DEST SRC1 - { - r_type_inst (Y_ADDU_OP, $2.i, 0, $3.i); - } - - - | NULLARY_OPS - { - r_type_inst ($1.i, 0, 0, 0); - } - - - | NULLARY_OPS_REV2 - { - mips32_r2_inst (); - } - - - | COUNT_LEADING_OPS DEST SRC1 - { - /* RT must be equal to RD */ - r_type_inst ($1.i, $2.i, $3.i, $2.i); - } - - - | UNARY_OPS_REV2 DEST - { - mips32_r2_inst (); - } - - - | BINARYI_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | BINARYI_OPS DEST SRC1 IMM32 - { - i_type_inst_free (op_to_imm_op ($1.i), $2.i, $3.i, - (imm_expr *)$4.p); - } - - | BINARYI_OPS DEST IMM32 - { - i_type_inst_free (op_to_imm_op ($1.i), $2.i, $2.i, - (imm_expr *)$3.p); - } - - - | BINARYIR_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $4.i, $3.i); - } - - | BINARYIR_OPS DEST SRC1 Y_INT - { - r_sh_type_inst (op_to_imm_op ($1.i), $2.i, $3.i, $4.i); - } - - | BINARYIR_OPS DEST Y_INT - { - r_sh_type_inst (op_to_imm_op ($1.i), $2.i, $2.i, $3.i); - } - - - | BINARY_ARITHI_OPS DEST SRC1 IMM16 - { - i_type_inst_free ($1.i, $2.i, $3.i, (imm_expr *)$4.p); - } - - | BINARY_ARITHI_OPS DEST IMM16 - { - i_type_inst_free ($1.i, $2.i, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_LOGICALI_OPS DEST SRC1 UIMM16 - { - i_type_inst_free ($1.i, $2.i, $3.i, (imm_expr *)$4.p); - } - - | BINARY_LOGICALI_OPS DEST UIMM16 - { - i_type_inst_free ($1.i, $2.i, $2.i, (imm_expr *)$3.p); - } - - - | SHIFT_OPS DEST SRC1 Y_INT - { - if (($4.i < 0) || (31 < $4.i)) - yywarn ("Shift distance can only be in the range 0..31"); - r_sh_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SHIFT_OPS DEST SRC1 SRC2 - { - r_type_inst (imm_op_to_op ($1.i), $2.i, $4.i, $3.i); - } - - - | SHIFT_OPS_REV2 DEST SRC1 Y_INT - { - mips32_r2_inst (); - } - - | SHIFTV_OPS_REV2 DEST SRC1 SRC2 - { - mips32_r2_inst (); - } - - - | BINARY_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | BINARY_OPS DEST SRC1 IMM32 - { - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - r_type_inst ($1.i, - $2.i, - $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - } - free ((imm_expr *)$4.p); - } - - | BINARY_OPS DEST IMM32 - { - check_uimm_range ((imm_expr *)$3.p, UIMM_MIN, UIMM_MAX); - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (!is_zero_imm ((imm_expr *)$3.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - r_type_inst ($1.i, - $2.i, - $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1)); - } - free ((imm_expr *)$3.p); - } - - - | BINARY_OPS_REV2 DEST SRC1 - { - mips32_r2_inst (); - } - - - | SUB_OPS DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SUB_OPS DEST SRC1 IMM32 - { - int val = eval_imm_expr ((imm_expr *)$4.p); - - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - i_type_inst ($1.i == Y_SUB_OP ? Y_ADDI_OP - : $1.i == Y_SUBU_OP ? Y_ADDIU_OP - : (fatal_error ("Bad SUB_OP\n"), 0), - $2.i, - $3.i, - make_imm_expr (-val, NULL, false)); - free ((imm_expr *)$4.p); - } - - | SUB_OPS DEST IMM32 - { - int val = eval_imm_expr ((imm_expr *)$3.p); - - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - i_type_inst ($1.i == Y_SUB_OP ? Y_ADDI_OP - : $1.i == Y_SUBU_OP ? Y_ADDIU_OP - : (fatal_error ("Bad SUB_OP\n"), 0), - $2.i, - $2.i, - make_imm_expr (-val, NULL, false)); - free ((imm_expr *)$3.p); - } - - - | DIV_POPS DEST SRC1 - { - /* The hardware divide operation (ignore 1st arg) */ - if ($1.i != Y_DIV_OP && $1.i != Y_DIVU_OP) - yyerror ("REM requires 3 arguments"); - else - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - | DIV_POPS DEST SRC1 SRC2 - { - /* Pseudo divide operations */ - div_inst ($1.i, $2.i, $3.i, $4.i, 0); - } - - | DIV_POPS DEST SRC1 IMM32 - { - if (is_zero_imm ((imm_expr *)$4.p)) - yyerror ("Divide by zero"); - else - { - /* Use $at */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - div_inst ($1.i, $2.i, $3.i, 1, 1); - } - } - - - | MUL_POPS DEST SRC1 SRC2 - { - mult_inst ($1.i, $2.i, $3.i, $4.i); - } - - | MUL_POPS DEST SRC1 IMM32 - { - if (is_zero_imm ((imm_expr *)$4.p)) - /* Optimize: n * 0 == 0 */ - i_type_inst_free (Y_ORI_OP, $2.i, 0, (imm_expr *)$4.p); - else - { - /* Use $at */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - mult_inst ($1.i, $2.i, $3.i, 1); - } - } - - - | MULT_OPS SRC1 SRC2 - { - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - - | MULT_OPS3 DEST SRC1 SRC2 - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - | MULT_OPS3 DEST SRC1 IMM32 - { - /* Special case, for backward compatibility with pseudo-op - MULT instruction */ - i_type_inst_free (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); /* Use $at */ - r_type_inst ($1.i, $2.i, $3.i, 1); - } - - - | Y_ROR_POP DEST SRC1 SRC2 - { - r_type_inst (Y_SUBU_OP, 1, 0, $4.i); - r_type_inst (Y_SLLV_OP, 1, 1, $3.i); - r_type_inst (Y_SRLV_OP, $2.i, $4.i, $3.i); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - } - - - | Y_ROL_POP DEST SRC1 SRC2 - { - r_type_inst (Y_SUBU_OP, 1, 0, $4.i); - r_type_inst (Y_SRLV_OP, 1, 1, $3.i); - r_type_inst (Y_SLLV_OP, $2.i, $4.i, $3.i); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - } - - - | Y_ROR_POP DEST SRC1 IMM32 - { - long dist = eval_imm_expr ((imm_expr *)$4.p); - - check_imm_range ((imm_expr *)$4.p, 0, 31); - r_sh_type_inst (Y_SLL_OP, 1, $3.i, -dist); - r_sh_type_inst (Y_SRL_OP, $2.i, $3.i, dist); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free ((imm_expr *)$4.p); - } - - - | Y_ROL_POP DEST SRC1 IMM32 - { - long dist = eval_imm_expr ((imm_expr *)$4.p); - - check_imm_range ((imm_expr *)$4.p, 0, 31); - r_sh_type_inst (Y_SRL_OP, 1, $3.i, -dist); - r_sh_type_inst (Y_SLL_OP, $2.i, $3.i, dist); - r_type_inst (Y_OR_OP, $2.i, $2.i, 1); - free ((imm_expr *)$4.p); - } - - - | BF_OPS_REV2 F_DEST F_SRC2 Y_INT Y_INT - { - mips32_r2_inst (); - } - - - | SET_LE_POPS DEST SRC1 SRC2 - { - set_le_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_LE_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_le_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | SET_GT_POPS DEST SRC1 SRC2 - { - set_gt_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_GT_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_gt_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - - | SET_GE_POPS DEST SRC1 SRC2 - { - set_ge_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_GE_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_ge_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | SET_EQ_POPS DEST SRC1 SRC2 - { - set_eq_inst ($1.i, $2.i, $3.i, $4.i); - } - - | SET_EQ_POPS DEST SRC1 IMM32 - { - if (!is_zero_imm ((imm_expr *)$4.p)) - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$4.p); - set_eq_inst ($1.i, $2.i, $3.i, - (is_zero_imm ((imm_expr *)$4.p) ? 0 : 1)); - free ((imm_expr *)$4.p); - } - - - | BR_COP_OPS LABEL - { - /* RS and RT fields contain information on test */ - int nd = opcode_is_nullified_branch ($1.i) ? 1 : 0; - int tf = opcode_is_true_branch ($1.i) ? 1 : 0; - i_type_inst_free ($1.i, - cc_to_rt (0, nd, tf), - BIN_RS ($1.i), - (imm_expr *)$2.p); - } - - | BR_COP_OPS CC_REG LABEL - { - /* RS and RT fields contain information on test */ - int nd = opcode_is_nullified_branch ($1.i) ? 1 : 0; - int tf = opcode_is_true_branch ($1.i) ? 1 : 0; - i_type_inst_free ($1.i, - cc_to_rt ($2.i, nd, tf), - BIN_RS ($1.i), - (imm_expr *)$3.p); - } - - - | UNARY_BR_OPS SRC1 LABEL - { - i_type_inst_free ($1.i, 0, $2.i, (imm_expr *)$3.p); - } - - - | UNARY_BR_POPS SRC1 LABEL - { - i_type_inst_free ($1.i == Y_BEQZ_POP ? Y_BEQ_OP : Y_BNE_OP, - 0, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_BR_OPS SRC1 SRC2 LABEL - { - i_type_inst_free ($1.i, $3.i, $2.i, (imm_expr *)$4.p); - } - - | BINARY_BR_OPS SRC1 BR_IMM32 LABEL - { - if (bare_machine && !accept_pseudo_insts) - yyerror ("Immediate form not allowed in bare machine"); - else - { - if (is_zero_imm ((imm_expr *)$3.p)) - i_type_inst ($1.i, $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1), - (imm_expr *)$4.p); - else - { - /* Use $at */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst ($1.i, $2.i, - (is_zero_imm ((imm_expr *)$3.p) ? 0 : 1), - (imm_expr *)$4.p); - } - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | BR_GT_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BGT_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $3.i, $2.i); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_GT_POPS SRC1 BR_IMM32 LABEL - { - if ($1.i == Y_BGT_POP) - { - /* Use $at */ - i_type_inst_free (Y_SLTI_OP, 1, $2.i, - incr_expr_offset ((imm_expr *)$3.p, 1)); - i_type_inst (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - else - { - /* Use $at */ - /* Can't add 1 to immediate since 0xffffffff+1 = 0 < 1 */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst_free (Y_BEQ_OP, $2.i, 1, branch_offset (3)); - r_type_inst (Y_SLTU_OP, 1, $2.i, 1); - i_type_inst (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | BR_GE_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BGE_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $2.i, $3.i); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_GE_POPS SRC1 BR_IMM32 LABEL - { - i_type_inst ($1.i == Y_BGE_POP ? Y_SLTI_OP : Y_SLTIU_OP, - 1, $2.i, (imm_expr *)$3.p); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - free ((imm_expr *)$3.p); - } - - - | BR_LT_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BLT_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $2.i, $3.i); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_LT_POPS SRC1 BR_IMM32 LABEL - { - i_type_inst ($1.i == Y_BLT_POP ? Y_SLTI_OP : Y_SLTIU_OP, - 1, $2.i, (imm_expr *)$3.p); /* Use $at */ - i_type_inst_free (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - free ((imm_expr *)$3.p); - } - - - | BR_LE_POPS SRC1 SRC2 LABEL - { - r_type_inst ($1.i == Y_BLE_POP ? Y_SLT_OP : Y_SLTU_OP, - 1, $3.i, $2.i); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, (imm_expr *)$4.p); - } - - | BR_LE_POPS SRC1 BR_IMM32 LABEL - { - if ($1.i == Y_BLE_POP) - { - /* Use $at */ - i_type_inst_free (Y_SLTI_OP, 1, $2.i, - incr_expr_offset ((imm_expr *)$3.p, 1)); - i_type_inst (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - else - { - /* Use $at */ - /* Can't add 1 to immediate since 0xffffffff+1 = 0 < 1 */ - i_type_inst (Y_ORI_OP, 1, 0, (imm_expr *)$3.p); - i_type_inst (Y_BEQ_OP, $2.i, 1, (imm_expr *)$4.p); - r_type_inst (Y_SLTU_OP, 1, $2.i, 1); - i_type_inst (Y_BNE_OP, 0, 1, (imm_expr *)$4.p); - } - free ((imm_expr *)$3.p); - free ((imm_expr *)$4.p); - } - - - | J_OPS LABEL - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - j_type_inst (Y_J_OP, (imm_expr *)$2.p); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - j_type_inst (Y_JAL_OP, (imm_expr *)$2.p); - free ((imm_expr *)$2.p); - } - - | J_OPS SRC1 - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - r_type_inst (Y_JR_OP, 0, $2.i, 0); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - r_type_inst (Y_JALR_OP, 31, $2.i, 0); - } - - | J_OPS DEST SRC1 - { - if (($1.i == Y_J_OP) || ($1.i == Y_JR_OP)) - r_type_inst (Y_JR_OP, 0, $3.i, 0); - else if (($1.i == Y_JAL_OP) || ($1.i == Y_JALR_OP)) - r_type_inst (Y_JALR_OP, $2.i, $3.i, 0); - } - - - | B_OPS LABEL - { - i_type_inst_free (($1.i == Y_BAL_POP ? Y_BGEZAL_OP : Y_BGEZ_OP), - 0, 0, (imm_expr *)$2.p); - } - - - | BINARYI_TRAP_OPS SRC1 IMM16 - { - i_type_inst_free ($1.i, 0, $2.i, (imm_expr *)$3.p); - } - - - | BINARY_TRAP_OPS SRC1 SRC2 - { - r_type_inst ($1.i, 0, $2.i, $3.i); - } - - - | FP_MOVE_OPS F_DEST F_SRC1 - { - r_co_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_MOVE_OPS_REV2 F_DEST F_SRC1 - { - mips32_r2_inst (); - } - - - | MOVEC_OPS DEST SRC1 REG - { - r_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | MOVECC_OPS DEST SRC1 Y_INT - { - r_type_inst ($1.i, - $2.i, - $3.i, - (($4.i & 0x7) << 2)); - } - - - | FP_MOVEC_OPS F_DEST F_SRC1 REG - { - r_co_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | FP_MOVEC_OPS_REV2 F_DEST F_SRC1 REG - { - mips32_r2_inst (); - } - - - | FP_MOVECC_OPS F_DEST F_SRC1 - { - r_co_type_inst ($1.i, $2.i, $3.i, cc_to_rt (0, 0, 0)); - } - - - | FP_MOVECC_OPS F_DEST F_SRC1 CC_REG - { - r_co_type_inst ($1.i, $2.i, $3.i, cc_to_rt ($4.i, 0, 0)); - } - - - | FP_MOVECC_OPS_REV2 F_DEST F_SRC1 CC_REG - { - mips32_r2_inst (); - } - - - | MOVE_FROM_HILO_OPS REG - { - r_type_inst ($1.i, $2.i, 0, 0); - } - - - | MOVE_TO_HILO_OPS REG - { - r_type_inst ($1.i, 0, $2.i, 0); - } - - - - | MOVE_COP_OPS REG COP_REG - { - if ($1.i == Y_MFC1_D_POP) - { - r_co_type_inst (Y_MFC1_OP, 0, $3.i, $2.i); - r_co_type_inst (Y_MFC1_OP, 0, $3.i + 1, $2.i + 1); - } - else if ($1.i == Y_MTC1_D_POP) - { - r_co_type_inst (Y_MTC1_OP, 0, $3.i, $2.i); - r_co_type_inst (Y_MTC1_OP, 0, $3.i + 1, $2.i + 1); - } - else - r_co_type_inst ($1.i, 0, $3.i, $2.i); - } - - - | MOVE_COP_OPS_REV2 REG COP_REG - { - mips32_r2_inst (); - } - - - | CTL_COP_OPS REG COP_REG - { - r_co_type_inst ($1.i, 0, $3.i, $2.i); - } - - - | FP_UNARY_OPS F_DEST F_SRC2 - { - r_co_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_UNARY_OPS_REV2 F_DEST F_SRC2 - { - mips32_r2_inst (); - } - - - | FP_BINARY_OPS F_DEST F_SRC1 F_SRC2 - { - r_co_type_inst ($1.i, $2.i, $3.i, $4.i); - } - - - | FP_BINARY_OPS_REV2 F_DEST F_SRC1 F_SRC2 - { - mips32_r2_inst (); - } - - - | FP_TERNARY_OPS_REV2 F_DEST F_SRC1 F_SRC2 FP_REGISTER - { - mips32_r2_inst (); - } - - - | FP_CMP_OPS F_SRC1 F_SRC2 - { - r_cond_type_inst ($1.i, $2.i, $3.i, 0); - } - - - | FP_CMP_OPS CC_REG F_SRC1 F_SRC2 - { - r_cond_type_inst ($1.i, $3.i, $4.i, $2.i); - } - - - | FP_CMP_OPS_REV2 F_SRC1 F_SRC2 - { - mips32_r2_inst (); - } - - - | Y_COP2_OP IMM32 - { - i_type_inst_free ($1.i, 0, 0, (imm_expr *)$2.p); - } - ; - - - -LOAD_OPS: Y_LB_OP - | Y_LBU_OP - | Y_LH_OP - | Y_LHU_OP - | Y_LL_OP - | Y_LW_OP - | Y_LWL_OP - | Y_LWR_OP - | Y_PFW_OP - | Y_LD_POP - ; - -LOADI_OPS: Y_LUI_OP - ; - -ULOADH_POPS: Y_ULH_POP - | Y_ULHU_POP - ; - -LOADC_OPS: Y_LDC2_OP - | Y_LWC2_OP - ; - -LOADFP_OPS: Y_LDC1_OP - | Y_LWC1_OP - | Y_L_D_POP { $$.i = Y_LDC1_OP; } - | Y_L_S_POP { $$.i = Y_LWC1_OP; } - ; - -LOADFP_INDEX_OPS: Y_LDXC1_OP - | Y_LUXC1_OP - | Y_LWXC1_OP - ; - -STORE_OPS: Y_SB_OP - | Y_SC_OP - | Y_SH_OP - | Y_SW_OP - | Y_SWL_OP - | Y_SWR_OP - | Y_SD_POP - ; - -STOREC_OPS: Y_SWC2_OP - | Y_SDC2_OP - | Y_S_D_POP { $$.i = Y_SDC1_OP; } - | Y_S_S_POP { $$.i = Y_SWC1_OP; } - ; - -STOREFP_OPS: Y_SWC1_OP - | Y_SDC1_OP - ; - -STOREFP_INDEX_OPS: Y_SDXC1_OP - | Y_SUXC1_OP - | Y_SWXC1_OP - ; - -SYS_OPS: Y_RFE_OP - { -#ifdef MIPS1 - yywarn ("RFE should only be used when SPIM is compiled as a MIPS-I processor"); -#endif - } - | Y_SYSCALL_OP - ; - -PREFETCH_OPS: Y_PREFX_OP - | Y_SYNCI_OP - ; - -CACHE_OPS: Y_CACHE_OP - | Y_PREF_OP - ; - -TLB_OPS: Y_TLBP_OP - | Y_TLBR_OP - | Y_TLBWI_OP - | Y_TLBWR_OP - ; - -NULLARY_OPS: Y_ERET_OP - { -#ifdef MIPS1 - yywarn ("ERET should only be used when SPIM is compiled as a MIPS32 processor"); -#endif - } - ; - -NULLARY_OPS_REV2: Y_DERET_OP - | Y_EHB_OP - | Y_SDBBP_OP - ; - -COUNT_LEADING_OPS: Y_CLO_OP - | Y_CLZ_OP - ; - -UNARY_OPS_REV2: Y_DI_OP - | Y_EI_OP - ; - -/* These binary operations have immediate analogues. */ - -BINARYI_OPS: Y_ADD_OP - | Y_ADDU_OP - | Y_AND_OP - | Y_XOR_OP - | Y_OR_OP - | Y_SLT_OP - | Y_SLTU_OP - ; - -BINARYIR_OPS: Y_SLLV_OP - | Y_SRAV_OP - | Y_SRLV_OP - ; - -BINARY_ARITHI_OPS: Y_ADDI_OP - | Y_ADDIU_OP - | Y_SLTI_OP - | Y_SLTIU_OP - ; - -BINARY_LOGICALI_OPS: Y_ANDI_OP - | Y_ORI_OP - | Y_XORI_OP - ; - -SHIFT_OPS: Y_SLL_OP - | Y_SRA_OP - | Y_SRL_OP - ; - -SHIFT_OPS_REV2: Y_ROTR_OP - ; - -SHIFTV_OPS_REV2: Y_ROTRV_OP - ; - - -/* These binary operations do not have immediate analogues. */ - -BINARY_OPS: Y_NOR_OP - ; - -BINARY_OPS_REV2: Y_RDHWR_OP - | Y_RDPGPR_OP - | Y_SEB_OP - | Y_SEH_OP - | Y_WRPGPR_OP - | Y_WSBH_OP - ; - -SUB_OPS: Y_SUB_OP - | Y_SUBU_OP - ; - -DIV_POPS: Y_DIV_OP - | Y_DIVU_OP - | Y_REM_POP - | Y_REMU_POP - ; - -MUL_POPS: Y_MULO_POP - | Y_MULOU_POP - ; - -SET_LE_POPS: Y_SLE_POP - | Y_SLEU_POP - ; - -SET_GT_POPS: Y_SGT_POP - | Y_SGTU_POP - ; - -SET_GE_POPS: Y_SGE_POP - | Y_SGEU_POP - ; - -SET_EQ_POPS: Y_SEQ_POP - | Y_SNE_POP - ; - -MULT_OPS: Y_MULT_OP - | Y_MULTU_OP - | Y_MADD_OP - | Y_MADDU_OP - | Y_MSUB_OP - | Y_MSUBU_OP - ; - -MULT_OPS3: Y_MUL_OP - ; - -BF_OPS_REV2: Y_EXT_OP - | Y_INS_OP - ; - -BR_COP_OPS: Y_BC1F_OP - | Y_BC1FL_OP - | Y_BC1T_OP - | Y_BC1TL_OP - | Y_BC2F_OP - | Y_BC2FL_OP - | Y_BC2T_OP - | Y_BC2TL_OP - ; - -UNARY_BR_OPS: Y_BGEZ_OP - | Y_BGEZL_OP - | Y_BGEZAL_OP - | Y_BGEZALL_OP - | Y_BGTZ_OP - | Y_BGTZL_OP - | Y_BLEZ_OP - | Y_BLEZL_OP - | Y_BLTZ_OP - | Y_BLTZL_OP - | Y_BLTZAL_OP - | Y_BLTZALL_OP - ; - -UNARY_BR_POPS: Y_BEQZ_POP - | Y_BNEZ_POP - ; - -BINARY_BR_OPS: Y_BEQ_OP - | Y_BEQL_OP - | Y_BNE_OP - | Y_BNEL_OP - ; - -BR_GT_POPS: Y_BGT_POP - | Y_BGTU_POP - -BR_GE_POPS: Y_BGE_POP - | Y_BGEU_POP - -BR_LT_POPS: Y_BLT_POP - | Y_BLTU_POP - -BR_LE_POPS: Y_BLE_POP - | Y_BLEU_POP - ; - -J_OPS: Y_J_OP - | Y_JR_OP - | Y_JR_HB_OP { yywarn ("Warning:IPS32 Rev 2 '.HB' extension is not implemented and is ignored"); } - | Y_JAL_OP - | Y_JALR_OP - | Y_JALR_HB_OP { yywarn ("Warning:IPS32 Rev 2 '.HB' extension is not implemented and is ignored"); } - ; - -B_OPS: Y_B_POP - | Y_BAL_POP - ; - - -BINARYI_TRAP_OPS: Y_TEQI_OP - | Y_TGEI_OP - | Y_TGEIU_OP - | Y_TLTI_OP - | Y_TLTIU_OP - | Y_TNEI_OP - ; - -BINARY_TRAP_OPS: Y_TEQ_OP - | Y_TGE_OP - | Y_TGEU_OP - | Y_TLT_OP - | Y_TLTU_OP - | Y_TNE_OP - ; - - -MOVE_FROM_HILO_OPS: Y_MFHI_OP - | Y_MFLO_OP - ; - -MOVE_TO_HILO_OPS: Y_MTHI_OP - | Y_MTLO_OP - ; - -MOVEC_OPS: Y_MOVN_OP - | Y_MOVZ_OP - ; - -MOVE_COP_OPS: Y_MFC0_OP - | Y_MFC1_OP - | Y_MFC1_D_POP - | Y_MFC2_OP - | Y_MTC0_OP - | Y_MTC1_OP - | Y_MTC1_D_POP - | Y_MTC2_OP - ; - -MOVE_COP_OPS_REV2: Y_MFHC1_OP - | Y_MFHC2_OP - | Y_MTHC1_OP - | Y_MTHC2_OP - ; - -CTL_COP_OPS: Y_CFC0_OP - | Y_CFC1_OP - | Y_CFC2_OP - | Y_CTC0_OP - | Y_CTC1_OP - | Y_CTC2_OP - ; - -/* Floating point operations */ - -FP_MOVE_OPS: Y_MOV_S_OP - | Y_MOV_D_OP - ; - -FP_MOVE_OPS_REV2: Y_MOV_PS_OP - ; - - -MOVECC_OPS: Y_MOVF_OP - | Y_MOVT_OP - ; - - -FP_MOVEC_OPS: Y_MOVN_D_OP - | Y_MOVN_S_OP - | Y_MOVZ_D_OP - | Y_MOVZ_S_OP - ; - -FP_MOVEC_OPS_REV2: Y_MOVN_PS_OP - | Y_MOVZ_PS_OP - ; - - -FP_MOVECC_OPS: Y_MOVF_D_OP - | Y_MOVF_S_OP - | Y_MOVT_D_OP - | Y_MOVT_S_OP - ; - -FP_MOVECC_OPS_REV2: Y_MOVF_PS_OP - | Y_MOVT_PS_OP - ; - -FP_UNARY_OPS: Y_ABS_S_OP - | Y_ABS_D_OP - | Y_CEIL_W_D_OP - | Y_CEIL_W_S_OP - | Y_CVT_D_S_OP - | Y_CVT_D_W_OP - | Y_CVT_S_D_OP - | Y_CVT_S_W_OP - | Y_CVT_W_D_OP - | Y_CVT_W_S_OP - | Y_FLOOR_W_D_OP - | Y_FLOOR_W_S_OP - | Y_NEG_S_OP - | Y_NEG_D_OP - | Y_ROUND_W_D_OP - | Y_ROUND_W_S_OP - | Y_SQRT_D_OP - | Y_SQRT_S_OP - | Y_TRUNC_W_D_OP - | Y_TRUNC_W_S_OP - ; - -FP_UNARY_OPS_REV2: Y_ABS_PS_OP - | Y_CEIL_L_D_OP - | Y_CEIL_L_S_OP - | Y_CVT_D_L_OP - | Y_CVT_L_D_OP - | Y_CVT_L_S_OP - | Y_CVT_PS_S_OP - | Y_CVT_S_L_OP - | Y_CVT_S_PL_OP - | Y_CVT_S_PU_OP - | Y_FLOOR_L_D_OP - | Y_FLOOR_L_S_OP - | Y_NEG_PS_OP - | Y_RECIP_D_OP - | Y_RECIP_S_OP - | Y_ROUND_L_D_OP - | Y_ROUND_L_S_OP - | Y_RSQRT_D_OP - | Y_RSQRT_S_OP - | Y_TRUNC_L_D_OP - | Y_TRUNC_L_S_OP - ; - -FP_BINARY_OPS: Y_ADD_S_OP - | Y_ADD_D_OP - | Y_DIV_S_OP - | Y_DIV_D_OP - | Y_MUL_S_OP - | Y_MUL_D_OP - | Y_SUB_S_OP - | Y_SUB_D_OP - ; - -FP_BINARY_OPS_REV2: Y_ADD_PS_OP - | Y_MUL_PS_OP - | Y_PLL_PS_OP - | Y_PLU_PS_OP - | Y_PUL_PS_OP - | Y_PUU_PS_OP - ; - -FP_TERNARY_OPS_REV2: Y_ALNV_PS_OP - | Y_MADD_D_OP - | Y_MADD_PS_OP - | Y_MADD_S_OP - | Y_MSUB_D_OP - | Y_MSUB_PS_OP - | Y_MSUB_S_OP - | Y_NMADD_D_OP - | Y_NMADD_PS_OP - | Y_NMADD_S_OP - | Y_NMSUB_D_OP - | Y_NMSUB_PS_OP - | Y_NMSUB_S_OP - ; - -FP_CMP_OPS: Y_C_F_S_OP - | Y_C_UN_S_OP - | Y_C_EQ_S_OP - | Y_C_UEQ_S_OP - | Y_C_OLT_S_OP - | Y_C_OLE_S_OP - | Y_C_ULT_S_OP - | Y_C_ULE_S_OP - | Y_C_SF_S_OP - | Y_C_NGLE_S_OP - | Y_C_SEQ_S_OP - | Y_C_NGL_S_OP - | Y_C_LT_S_OP - | Y_C_NGE_S_OP - | Y_C_LE_S_OP - | Y_C_NGT_S_OP - | Y_C_F_D_OP - | Y_C_UN_D_OP - | Y_C_EQ_D_OP - | Y_C_UEQ_D_OP - | Y_C_OLT_D_OP - | Y_C_OLE_D_OP - | Y_C_ULT_D_OP - | Y_C_ULE_D_OP - | Y_C_SF_D_OP - | Y_C_NGLE_D_OP - | Y_C_SEQ_D_OP - | Y_C_NGL_D_OP - | Y_C_LT_D_OP - | Y_C_NGE_D_OP - | Y_C_LE_D_OP - | Y_C_NGT_D_OP - ; - -FP_CMP_OPS_REV2: Y_C_EQ_PS_OP - | Y_C_F_PS_OP - | Y_C_LT_PS_OP - | Y_C_LE_PS_OP - | Y_C_NGE_PS_OP - | Y_C_NGL_PS_OP - | Y_C_NGLE_PS_OP - | Y_C_NGT_PS_OP - | Y_C_OLE_PS_OP - | Y_C_OLT_PS_OP - | Y_C_SEQ_PS_OP - | Y_C_SF_PS_OP - | Y_C_UEQ_PS_OP - | Y_C_ULE_PS_OP - | Y_C_ULT_PS_OP - | Y_C_UN_PS_OP - ; - - - -ASM_DIRECTIVE: Y_ALIAS_DIR Y_REG Y_REG - - | Y_ALIGN_DIR EXPR - { - align_data ($2.i); - } - - | Y_ASCII_DIR {null_term = false;} STR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - | Y_ASCIIZ_DIR {null_term = true;} STR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_ASM0_DIR - - | Y_BGNB_DIR Y_INT - - - | Y_BYTE_DIR - {store_op = (void(*)(void*))store_byte;} - EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_COMM_DIR ID EXPR - { - align_data (2); - if (lookup_label ((char*)$2.p)->addr == 0) - { - (void)record_label ((char*)$2.p, current_data_pc (), 1); - free ((char*)$2.p); - } - increment_data_pc ($3.i); - } - - - | Y_DATA_DIR - {user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_DATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_K_DATA_DIR - { - user_kernel_data_segment (true); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_K_DATA_DIR Y_INT - { - user_kernel_data_segment (true); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_DOUBLE_DIR - { - store_op = (void(*)(void*))store_double; - if (data_dir) set_data_alignment (3); - } - FP_EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_END_DIR OPTIONAL_ID - - | Y_ENDB_DIR Y_INT - - | Y_ENDR_DIR - - | Y_ENT_DIR ID - - | Y_ENT_DIR ID Y_INT - - - | Y_EXTERN_DIR ID EXPR - { - extern_directive ((char*)$2.p, $3.i); - } - - - | Y_ERR_DIR - { - fatal_error ("File contains an .err directive\n"); - } - - - | Y_FILE_DIR Y_INT Y_STR - - - | Y_FLOAT_DIR - { - store_op = (void(*)(void*))store_float; - if (data_dir) set_data_alignment (2); - } - FP_EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_FMASK_DIR Y_INT Y_INT - - | Y_FRAME_DIR REGISTER Y_INT REGISTER - - - | Y_GLOBAL_DIR ID - { - (void)make_label_global ((char*)$2.p); - free ((char*)$2.p); - } - - - | Y_HALF_DIR - { - store_op = (void(*)(void*))store_half; - if (data_dir) set_data_alignment (1); - } - EXPR_LST - { - if (text_dir) - yyerror ("Can't put data in text segment"); - } - - - | Y_LABEL_DIR ID - { - (void)record_label ((char*)$2.p, - text_dir ? current_text_pc () : current_data_pc (), - 1); - free ((char*)$2.p); - } - - - | Y_LCOMM_DIR ID EXPR - { - lcomm_directive ((char*)$2.p, $3.i); - } - - - /* Produced by cc 2.10 */ - | Y_LIVEREG_DIR Y_INT Y_INT - - - | Y_LOC_DIR Y_INT Y_INT - - | Y_MASK_DIR Y_INT Y_INT - - | Y_NOALIAS_DIR Y_REG Y_REG - - | Y_OPTIONS_DIR ID - - | Y_REPEAT_DIR EXPR - { - yyerror ("Warning: repeat directive ignored"); - } - - - | Y_RDATA_DIR - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_RDATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_SDATA_DIR - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - } - - | Y_SDATA_DIR Y_INT - { - user_kernel_data_segment (false); - data_dir = true; text_dir = false; - enable_data_alignment (); - set_data_pc ($2.i); - } - - - | Y_SET_DIR ID - { - if (streq ((char*)$2.p, "noat")) - noat_flag = true; - else if (streq ((char*)$2.p, "at")) - noat_flag = false; - } - - - | Y_SPACE_DIR EXPR - { - if (data_dir) - increment_data_pc ($2.i); - else if (text_dir) - increment_text_pc ($2.i); - } - - - | Y_STRUCT_DIR EXPR - { - yyerror ("Warning: struct directive ignored"); - } - - - | Y_TEXT_DIR - { - user_kernel_text_segment (false); - data_dir = false; text_dir = true; - enable_data_alignment (); - } - - | Y_TEXT_DIR Y_INT - { - user_kernel_text_segment (false); - data_dir = false; text_dir = true; - enable_data_alignment (); - set_text_pc ($2.i); - } - - - | Y_K_TEXT_DIR - { - user_kernel_text_segment (true); - data_dir = false; text_dir = true; - enable_data_alignment (); - } - - | Y_K_TEXT_DIR Y_INT - { - user_kernel_text_segment (true); - data_dir = false; text_dir = true; - enable_data_alignment (); - set_text_pc ($2.i); - } - - - | Y_VERSTAMP_DIR Y_INT Y_INT - - | Y_VREG_DIR REGISTER Y_INT Y_INT - - - | Y_WORD_DIR - { - store_op = (void(*)(void*))store_word_data; - if (data_dir) set_data_alignment (2); - } - EXPR_LST - - ; - - - -ADDRESS: {only_id = 1;} ADDR {only_id = 0; $$ = $2;} - -ADDR: '(' REGISTER ')' - { - $$.p = make_addr_expr (0, NULL, $2.i); - } - - | ABS_ADDR - { - $$.p = make_addr_expr ($1.i, NULL, 0); - } - - | ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr ($1.i, NULL, $3.i); - } - - | Y_ID - { - $$.p = make_addr_expr (0, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | Y_ID '(' REGISTER ')' - { - $$.p = make_addr_expr (0, (char*)$1.p, $3.i); - free ((char*)$1.p); - } - - | Y_ID '+' ABS_ADDR - { - $$.p = make_addr_expr ($3.i, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | ABS_ADDR '+' ID - { - $$.p = make_addr_expr ($1.i, (char*)$3.p, 0); - } - - | Y_ID '-' ABS_ADDR - { - $$.p = make_addr_expr (- $3.i, (char*)$1.p, 0); - free ((char*)$1.p); - } - - | Y_ID '+' ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr ($3.i, (char*)$1.p, $5.i); - free ((char*)$1.p); - } - - | Y_ID '-' ABS_ADDR '(' REGISTER ')' - { - $$.p = make_addr_expr (- $3.i, (char*)$1.p, $5.i); - free ((char*)$1.p); - } - ; - - -BR_IMM32: {only_id = 1;} IMM32 {only_id = 0; $$ = $2;} - -IMM16: IMM32 - { - check_imm_range ((imm_expr*)$1.p, IMM_MIN, IMM_MAX); - $$ = $1; - } - -UIMM16: IMM32 - { - check_uimm_range ((imm_expr*)$1.p, UIMM_MIN, UIMM_MAX); - $$ = $1; - } - - -IMM32: ABS_ADDR - { - $$.p = make_imm_expr ($1.i, NULL, false); - } - - | '(' ABS_ADDR ')' '>' '>' Y_INT - { - $$.p = make_imm_expr ($2.i >> $6.i, NULL, false); - } - - | ID - { - $$.p = make_imm_expr (0, (char*)$1.p, false); - } - - | Y_ID '+' ABS_ADDR - { - $$.p = make_imm_expr ($3.i, (char*)$1.p, false); - free ((char*)$1.p); - } - - | Y_ID '-' ABS_ADDR - { - $$.p = make_imm_expr (- $3.i, (char*)$1.p, false); - free ((char*)$1.p); - } - ; - - -ABS_ADDR: Y_INT - - | Y_INT '+' Y_INT - {$$.i = $1.i + $3.i;} - - | Y_INT Y_INT - { - /* This is actually: Y_INT '-' Y_INT, since the binary - subtract operator gets scanned as a unary negation - operator. */ - if ($2.i >= 0) yyerror ("Syntax error"); - $$.i = $1.i - -$2.i; - } - ; - -SRC1: REGISTER ; - -SRC2: REGISTER ; - -DEST: REGISTER ; - -REG: REGISTER ; - -REGISTER: Y_REG - { - if ($1.i < 0 || $1.i > 31) - yyerror ("Register number out of range"); - if ($1.i == 1 && !bare_machine && !noat_flag) - yyerror ("Register 1 is reserved for assembler"); - $$ = $1; - } - -F_DEST: FP_REGISTER ; - -F_SRC1: FP_REGISTER ; - -F_SRC2: FP_REGISTER ; - -FP_REGISTER: Y_FP_REG - { - if ($1.i < 0 || $1.i > 31) - yyerror ("FP register number out of range"); - $$ = $1; - } - - -CC_REG: Y_INT - { - if ($1.i < 0 || $1.i > 7) - yyerror ("CC register number out of range"); - $$ = $1; - } - - -COP_REG: Y_REG - - | Y_FP_REG - - ; - - -LABEL: ID - { - $$.p = make_imm_expr (-(int)current_text_pc (), (char*)$1.p, true); - } - - -STR_LST: STR_LST STR - | STR - ; - - -STR: Y_STR - { - store_string ((char*)$1.p, strlen((char*)$1.p), null_term); - free ((char*)$1.p); - } - | Y_STR ':' Y_INT - { - int i; - - for (i = 0; i < $3.i; i ++) - store_string ((char*)$1.p, strlen((char*)$1.p), null_term); - free ((char*)$1.p); - } - ; - - -EXPRESSION: {only_id = 1;} EXPR {only_id = 0; $$ = $2;} - -EXPR: - TRM - | - EXPR '+' TRM - { $$.i = $1.i + $3.i; } - | - EXPR '-' TRM - { $$.i = $1.i - $3.i; } - ; - -TRM: - FACTOR - | - TRM '*' FACTOR - { $$.i = $1.i * $3.i; } - | - TRM '/' FACTOR - { $$.i = $1.i / $3.i; } - ; - -FACTOR: Y_INT - - | '(' EXPR ')' - { $$.i = $2.i; } - - | ID - { - label *l = lookup_label ((char*)$1.p); - if (l->addr == 0) - { - record_data_uses_symbol (current_data_pc (), l); - $$.p = NULL; - } - else - $$.i = l->addr; - } - - -EXPR_LST: EXPR_LST EXPRESSION - { - store_op ($2.p); - } - | EXPRESSION - { - store_op ($1.p); - } - | EXPRESSION ':' EXPR - { - int i; - - for (i = 0; i < $3.i; i ++) - store_op ($1.p); - } - ; - - -FP_EXPR_LST: FP_EXPR_LST Y_FP - { - store_op ($2.p); - } - | Y_FP - { - store_op ($1.p); - } - ; - - -OPTIONAL_ID: {only_id = 1;} OPT_ID {only_id = 0; $$ = $2;} - -OPT_ID: ID - | {$$.p = (void*)NULL;} - ; - - -ID: {only_id = 1;} Y_ID {only_id = 0; $$ = $2;} - - -%% - -/* Maintain and update the address of labels for the current line. */ - -void -fix_current_label_address (mem_addr new_addr) -{ - label_list *l; - - for (l = this_line_labels; l != NULL; l = l->tail) - { - l->head->addr = new_addr; - } - clear_labels (); -} - - -static label_list * -cons_label (label *head, label_list *tail) -{ - label_list *c = (label_list *) malloc (sizeof (label_list)); - - c->head = head; - c->tail = tail; - return (c); -} - - -static void -clear_labels () -{ - label_list *n; - - for ( ; this_line_labels != NULL; this_line_labels = n) - { - resolve_label_uses (this_line_labels->head); - n = this_line_labels->tail; - free (this_line_labels); - } - this_line_labels = NULL; -} - - -/* Operations on op codes. */ - -int -op_to_imm_op (int opcode) -{ - switch (opcode) - { - case Y_ADD_OP: return (Y_ADDI_OP); - case Y_ADDU_OP: return (Y_ADDIU_OP); - case Y_AND_OP: return (Y_ANDI_OP); - case Y_OR_OP: return (Y_ORI_OP); - case Y_XOR_OP: return (Y_XORI_OP); - case Y_SLT_OP: return (Y_SLTI_OP); - case Y_SLTU_OP: return (Y_SLTIU_OP); - case Y_SLLV_OP: return (Y_SLL_OP); - case Y_SRAV_OP: return (Y_SRA_OP); - case Y_SRLV_OP: return (Y_SRL_OP); - default: fatal_error ("Can't convert op to immediate op\n"); return (0); - } -} - - -int -imm_op_to_op (int opcode) -{ - switch (opcode) - { - case Y_ADDI_OP: return (Y_ADD_OP); - case Y_ADDIU_OP: return (Y_ADDU_OP); - case Y_ANDI_OP: return (Y_AND_OP); - case Y_ORI_OP: return (Y_OR_OP); - case Y_XORI_OP: return (Y_XOR_OP); - case Y_SLTI_OP: return (Y_SLT_OP); - case Y_SLTIU_OP: return (Y_SLTU_OP); - case Y_J_OP: return (Y_JR_OP); - case Y_LUI_OP: return (Y_ADDU_OP); - case Y_SLL_OP: return (Y_SLLV_OP); - case Y_SRA_OP: return (Y_SRAV_OP); - case Y_SRL_OP: return (Y_SRLV_OP); - default: fatal_error ("Can't convert immediate op to op\n"); return (0); - } -} - - -static void -nop_inst () -{ - r_type_inst (Y_SLL_OP, 0, 0, 0); /* = 0 */ -} - - -static void -trap_inst () -{ - r_type_inst (Y_BREAK_OP, 0, 0, 0); -} - - -static imm_expr * -branch_offset (int n_inst) -{ - return (const_imm_expr (n_inst << 2)); /* Later shifted right 2 places */ -} - - -static void -div_inst (int op, int rd, int rs, int rt, int const_divisor) -{ - if (rd != 0 && !const_divisor) - { - i_type_inst_free (Y_BNE_OP, 0, rt, branch_offset (2)); - trap_inst (); - } - - if (op == Y_DIV_OP || op == Y_REM_POP) - r_type_inst (Y_DIV_OP, 0, rs, rt); - else - r_type_inst (Y_DIVU_OP, 0, rs, rt); - - if (rd != 0) - { - if (op == Y_DIV_OP || op == Y_DIVU_OP) - /* Quotient */ - r_type_inst (Y_MFLO_OP, rd, 0, 0); - else - /* Remainder */ - r_type_inst (Y_MFHI_OP, rd, 0, 0); - } -} - - -static void -mult_inst (int op, int rd, int rs, int rt) -{ - if (op == Y_MULOU_POP) - r_type_inst (Y_MULTU_OP, 0, rs, rt); - else - r_type_inst (Y_MULT_OP, 0, rs, rt); - if (op == Y_MULOU_POP && rd != 0) - { - r_type_inst (Y_MFHI_OP, 1, 0, 0); /* Use $at */ - i_type_inst_free (Y_BEQ_OP, 0, 1, branch_offset (2)); - trap_inst (); - } - else if (op == Y_MULO_POP && rd != 0) - { - r_type_inst (Y_MFHI_OP, 1, 0, 0); /* use $at */ - r_type_inst (Y_MFLO_OP, rd, 0, 0); - r_sh_type_inst (Y_SRA_OP, rd, rd, 31); - i_type_inst_free (Y_BEQ_OP, rd, 1, branch_offset (2)); - trap_inst (); - } - if (rd != 0) - r_type_inst (Y_MFLO_OP, rd, 0, 0); -} - - -static void -set_le_inst (int op, int rd, int rs, int rt) -{ - i_type_inst_free (Y_BNE_OP, rs, rt, branch_offset (3)); - i_type_inst_free (Y_ORI_OP, rd, 0, const_imm_expr (1)); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (2)); - r_type_inst ((op == Y_SLE_POP ? Y_SLT_OP : Y_SLTU_OP), rd, rs, rt); -} - - -static void -set_gt_inst (int op, int rd, int rs, int rt) -{ - r_type_inst (op == Y_SGT_POP ? Y_SLT_OP : Y_SLTU_OP, rd, rt, rs); -} - - -static void -set_ge_inst (int op, int rd, int rs, int rt) -{ - i_type_inst_free (Y_BNE_OP, rs, rt, branch_offset (3)); - i_type_inst_free (Y_ORI_OP, rd, 0, const_imm_expr (1)); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (2)); - r_type_inst (op == Y_SGE_POP ? Y_SLT_OP : Y_SLTU_OP, rd, rt, rs); -} - - -static void -set_eq_inst (int op, int rd, int rs, int rt) -{ - imm_expr *if_eq, *if_neq; - - if (op == Y_SEQ_POP) - if_eq = const_imm_expr (1), if_neq = const_imm_expr (0); - else - if_eq = const_imm_expr (0), if_neq = const_imm_expr (1); - - i_type_inst_free (Y_BEQ_OP, rs, rt, branch_offset (3)); - /* RD <- 0 (if not equal) */ - i_type_inst_free (Y_ORI_OP, rd, 0, if_neq); - i_type_inst_free (Y_BEQ_OP, 0, 0, branch_offset (2)); /* Branch always */ - /* RD <- 1 */ - i_type_inst_free (Y_ORI_OP, rd, 0, if_eq); -} - - -/* Store the value either as a datum or instruction. */ - -static void -store_word_data (int value) -{ - if (data_dir) - store_word (value); - else if (text_dir) - store_instruction (inst_decode (value)); -} - - - -void -initialize_parser (char *file_name) -{ - input_file_name = file_name; - only_id = 0; - data_dir = false; - text_dir = true; -} - - -static void -check_imm_range (imm_expr* expr, int32 min, int32 max) -{ - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* If expression can be evaluated, compare its value against the limits - and complain if the value is out of bounds. */ - int32 value = eval_imm_expr (expr); - - if (value < min || max < value) - { - char str[200]; - sprintf (str, "immediate value (%d) out of range (%d .. %d)", - value, min, max); - yywarn (str); - } - } -} - - -static void -check_uimm_range (imm_expr* expr, uint32 min, uint32 max) -{ - if (expr->symbol == NULL || SYMBOL_IS_DEFINED (expr->symbol)) - { - /* If expression can be evaluated, compare its value against the limits - and complain if the value is out of bounds. */ - uint32 value = (uint32)eval_imm_expr (expr); - - if (value < min || max < value) - { - char str[200]; - sprintf (str, "immediate value (%d) out of range (%d .. %d)", - (int32)value, (int32)min, (int32)max); - yywarn (str); - } - } -} - -void -yyerror (char *s) -{ - parse_error_occurred = true; - clear_labels (); - yywarn (s); -} - - -void -yywarn (char *s) -{ - error ("spim: (parser) %s on line %d of file %s\n%s", s, line_no, input_file_name, erroneous_line ()); -} - - -static void -mips32_r2_inst () -{ - yyerror ("Warning: MIPS32 Rev 2 instruction is not implemented. Instruction ignored."); -} - - -static int -cc_to_rt (int cc, int nd, int tf) -{ - return (cc << 2) | (nd << 1) | tf; -} diff --git a/spim-qtspimbot/CPU/reg.h b/spim-qtspimbot/CPU/reg.h deleted file mode 100755 index 9034c8a..0000000 --- a/spim-qtspimbot/CPU/reg.h +++ /dev/null @@ -1,268 +0,0 @@ -/* SPIM S20 MIPS simulator. - Declarations of registers and code for accessing them. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef REG_H -#define REG_H - - -typedef int32 /*@alt unsigned int @*/ reg_word; -typedef uint32 u_reg_word; - - -/* General purpose registers: */ - -#define R_LENGTH 32 - -typedef struct regimage { - int context; - - int RFE_cycle; - - /* General purpose registers: */ - reg_word R[R_LENGTH]; - reg_word HI, LO; - mem_addr PC, nPC; - - /* Floating Point Coprocessor (1) registers: */ - double *FPR; /* Dynamically allocate so overlay */ - float *FGR; /* is possible */ - int *FWR; /* is possible */ - - /* Coprocessor registers: */ - reg_word CCR[4][32], CPR[4][32]; - - int exception_occurred; - - bool in_kernel; /* => data goes to kdata, not data */ - - mem_addr next_text_pc; - mem_addr next_k_text_pc; - mem_addr next_data_pc; /* Location for next datum in user process */ - mem_addr next_k_data_pc; /* Location for next datum in kernel */ - mem_addr next_gp_item_addr; /* Address of next item accessed off $gp */ - bool auto_alignment; -} reg_image_t; - -extern int cycle; -extern reg_image_t reg_images[2]; -extern size_t num_contexts; - -/* Argument passing registers */ - -#define REG_V0 2 -#define REG_A0 4 -#define REG_A1 5 -#define REG_A2 6 -#define REG_A3 7 -#define REG_FA0 12 -#define REG_SP 29 - - -/* Result registers */ - -#define REG_RES 2 -#define REG_FRES 0 - - -/* $gp registers */ - -#define REG_GP 28 - -extern char *int_reg_names[]; - - - -/* Exeception handling registers (Coprocessor 0): */ - -/* BadVAddr register: */ -#define CP0_BadVAddr_Reg 8 -#define CP0_BadVAddr(REGIMAGE) (REGIMAGE.CPR[0][CP0_BadVAddr_Reg]) - -/* Count register: */ -#define CP0_Count_Reg 9 -#define CP0_Count(REGIMAGE) (REGIMAGE.CPR[0][CP0_Count_Reg]) /* ToDo */ - -/* Compare register: */ -#define CP0_Compare_Reg 11 -#define CP0_Compare(REGIMAGE) (REGIMAGE.CPR[0][CP0_Compare_Reg]) /* ToDo */ - -/* Status register: */ -#define CP0_Status_Reg 12 -#define CP0_Status(REGIMAGE) (REGIMAGE.CPR[0][CP0_Status_Reg]) -/* Implemented fields: */ -#define CP0_Status_CU 0xf0000000 -#define CP0_Status_IM 0x0000ff00 -#define CP0_Status_IM7 0x00008000 /* HW Int 5 */ -#define CP0_Status_IM6 0x00004000 /* HW Int 4 */ -#define CP0_Status_IM5 0x00002000 /* HW Int 3 */ -#define CP0_Status_IM4 0x00001000 /* HW Int 2 */ -#define CP0_Status_IM3 0x00000800 /* HW Int 1 */ -#define CP0_Status_IM2 0x00000400 /* HW Int 0 */ -#define CP0_Status_IM1 0x00000200 /* SW Int 1 */ -#define CP0_Status_IM0 0x00000100 /* SW Int 0 */ -#define CP0_Status_UM 0x00000010 -#define CP0_Status_EXL 0x00000002 -#define CP0_Status_IE 0x00000001 -#define CP0_Status_Mask (CP0_Status_CU \ - | CP0_Status_UM \ - | CP0_Status_IM \ - | CP0_Status_EXL \ - | CP0_Status_IE) - -/* Cause register: */ -#define CP0_Cause_Reg 13 -#define CP0_Cause(REGIMAGE) (REGIMAGE.CPR[0][CP0_Cause_Reg]) -/* Implemented fields: */ -#define CP0_Cause_BD 0x80000000 -#define CP0_Cause_IP 0x0000ff00 -#define CP0_Cause_IP7 0x00008000 /* HW Int 5 */ -#define CP0_Cause_IP6 0x00004000 /* HW Int 4 */ -#define CP0_Cause_IP5 0x00002000 /* HW Int 3 */ -#define CP0_Cause_IP4 0x00001000 /* HW Int 2 */ -#define CP0_Cause_IP3 0x00000800 /* HW Int 1 */ -#define CP0_Cause_IP2 0x00000400 /* HW Int 0 */ -#define CP0_Cause_IP1 0x00000200 /* SW Int 1 */ -#define CP0_Cause_IP0 0x00000100 /* SW Int 0 */ -#define CP0_Cause_ExcCode 0x0000007c -#define CP0_Cause_Mask (CP0_Cause_BD \ - | CP0_Cause_IP \ - | CP0_Cause_IP7 \ - | CP0_Cause_IP6 \ - | CP0_Cause_IP5 \ - | CP0_Cause_IP4 \ - | CP0_Cause_IP3 \ - | CP0_Cause_IP2 \ - | CP0_Cause_ExcCode) -#define CP0_ExCode(REGIMAGE) ((CP0_Cause(REGIMAGE) & CP0_Cause_ExcCode) >> 2) - -/* EPC register: */ -#define CP0_EPC_Reg 14 -#define CP0_EPC(REGIMAGE) (REGIMAGE.CPR[0][CP0_EPC_Reg]) - -/* Config register: */ -#define CP0_Config_Reg 16 -#define CP0_Config(REGIMAGE) (REGIMAGE.CPR[0][CP0_Config_Reg]) -/* Implemented fields: */ -#define CP0_Config_BE 0x000080000 -#define CP0_Config_AT 0x000060000 -#define CP0_Config_AR 0x00001c000 -#define CP0_Config_MT 0x000000380 -#define CP0_Config_Mask (CP0_Config_BE \ - | CP0_Config_AT \ - | CP0_Config_AR \ - | CP0_Config_MT) - - - -/* Floating Point Coprocessor (1) registers. - - This is the MIPS32, Revision 1 FPU register set. It contains 32, 32-bit - registers (either 32 single or 16 double precision), as in the R2010. - The MIPS32, Revision 2 or MIPS64 register set has 32 of each type of - register. */ - -#define FGR_LENGTH 32 -#define FPR_LENGTH 16 - -#define FPR_S(REGIMAGE, REGNO) (REGIMAGE.FGR[REGNO]) - -#define FPR_D(REGIMAGE, REGNO) (((REGNO) & 0x1) \ - ? (run_error ("Odd FP double register number\n") , 0.0) \ - : REGIMAGE.FPR[(REGNO) / 2]) - -#define FPR_W(REGIMAGE, REGNO) (REGIMAGE.FWR[REGNO]) - -#define SET_FPR_S(REGIMAGE, REGNO, VALUE) {REGIMAGE.FGR[REGNO] = (float) (VALUE);} - -#define SET_FPR_D(REGIMAGE, REGNO, VALUE) {if ((REGNO) & 0x1) \ - run_error ("Odd FP double register number\n"); \ - else REGIMAGE.FPR[(REGNO) / 2] = (double) (VALUE);} - -#define SET_FPR_W(REGIMAGE, REGNO, VALUE) {REGIMAGE.FWR[REGNO] = (int32) (VALUE);} - - -/* Floating point control registers: */ - -#define FCR(REGIMAGE) (REGIMAGE.CPR[1]) - - -#define FIR_REG 0 -#define FIR(REGIMAGE) (FCR(REGIMAGE)[FIR_REG]) -/* Implemented fields: */ -#define FIR_W 0x0008000 -#define FIR_D 0x0001000 -#define FIR_S 0x0000800 -#define FIR_MASK (FIR_W | FIR_D | FIR_S) - -#define FCCR_REG 25 -#define FCCR(REGIMAGE) (FCR(REGIMAGE)[FCCR_REG]) -/* Implemented fields: */ -#define FCCR_FCC 0x000000ff -#define FCCR_MASK (FCCR_FCC) - -#define FEXR_REG 26 -#define FEXR(REGIMAGE) (FCR(REGIMAGE)[FEXR_REG]) -/* No implemented fields */ - -#define FENR_REG 28 -#define FENR(REGIMAGE) (FCR(REGIMAGE)[FENR_REG]) -/* No implemented fields */ - -#define FCSR_REG 31 -#define FCSR(REGIMAGE) (FCR(REGIMAGE)[FCSR_REG]) -/* Implemented fields: */ -#define FCSR_FCC 0xfe800000 -#define FCSR_MASK (FCSR_FCC) -/* Floating point Cause (not implemented): */ -#define FCSR_Cause_E 0x00020000 -#define FCSR_Cause_V 0x00010000 -#define FCSR_Cause_Z 0x00008000 -#define FCSR_Cause_O 0x00004000 -#define FCSR_Cause_U 0x00002000 -#define FCSR_Cause_I 0x00001000 -/* Floating point Enables (not implemented): */ -#define FCSR_Enable_V 0x00000800 -#define FCSR_Enable_Z 0x00000400 -#define FCSR_Enable_O 0x00000200 -#define FCSR_Enable_U 0x00000100 -#define FCSR_Enable_I 0x00000080 -/* Floating point Flags (not implemented): */ -#define FCSR_Flag_V 0x00000040 -#define FCSR_Flag_Z 0x00000020 -#define FCSR_Flag_O 0x00000010 -#define FCSR_Flag_U 0x00000008 -#define FCSR_Flag_I 0x00000004 - -#define INTERRUPTS_ON(REGIMAGE) (CP0_Status(REGIMAGE) & CP0_Status_IE) -#define IN_INTERRUPT_HANDLER(REGIMAGE) (CP0_Status(REGIMAGE) & CP0_Status_EXL) - -#endif diff --git a/spim-qtspimbot/CPU/run.cpp b/spim-qtspimbot/CPU/run.cpp deleted file mode 100755 index 2eb875c..0000000 --- a/spim-qtspimbot/CPU/run.cpp +++ /dev/null @@ -1,1731 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM instructions. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifdef mips -#define _IEEE 1 -#include -#else -#define NaN(X) ((X) != (X)) -#endif - -#include -#include - -#ifdef _WIN32 -#define VC_EXTRALEAN -#include -#else -#include -#include -#include -#include -#endif - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "parser_yacc.h" -#include "syscall.h" -#include "run.h" -#include "../Spimbot/robot.h" - -bool force_break = false; /* For the execution env. to force an execution break */ - -#ifdef _MSC_BUILD -/* Disable MS VS warning about constant predicate in conditional. */ -#pragma warning(disable: 4127) -#endif - - -/* Local functions: */ - -static void set_fpu_cc (size_t context, int cond, int cc, int less, int equal, int unordered); -static void signed_multiply (size_t context, reg_word v1, reg_word v2); -static void unsigned_multiply (size_t context, reg_word v1, reg_word v2); - - -#define SIGN_BIT(X) ((X) & 0x80000000) - -#define ARITH_OVFL(RESULT, OP1, OP2) (SIGN_BIT (OP1) == SIGN_BIT (OP2) \ - && SIGN_BIT (OP1) != SIGN_BIT (RESULT)) - - - -/* True when delayed_branches is true and instruction is executing in delay -slot of another instruction. */ -static int running_in_delay_slot = 0; - - -/* Executed delayed branch and jump instructions by running the - instruction from the delay slot before transfering control. Note, - in branches that don't jump, the instruction in the delay slot is - executed by falling through normally. - - We take advantage of the MIPS architecture, which leaves undefined - the result of executing a delayed instruction in a delay slot. Here - we execute the second branch. */ - -#define BRANCH_INST(TEST, TARGET, NULLIFY) \ - { \ - if (TEST) \ - { \ - mem_addr target = (TARGET); \ - if (delayed_branches) \ - { \ - /* +4 since jump in delay slot */ \ - target += BYTES_PER_WORD; \ - } \ - JUMP_INST(target) \ - } \ - else if (NULLIFY) \ - { \ - /* If test fails and nullify bit set, skip\ - instruction in delay slot. */ \ - reg_image.PC += BYTES_PER_WORD; \ - } \ - } - - -#define JUMP_INST(TARGET) \ - { \ - if (delayed_branches) \ - { \ - running_in_delay_slot = 1; \ - run_spim (context, display); \ - running_in_delay_slot = 0; \ - } \ - /* -4 since PC is bumped after this inst */ \ - reg_image.PC = (TARGET) - BYTES_PER_WORD; \ - } - - -/* If the delayed_load flag is false, the result from a load is available - immediate. If the delayed_load flag is true, the result from a load is - not available until the subsequent instruction has executed (as in the - real machine). We need a two element shift register for the value and its - destination, as the instruction following the load can itself be a load - instruction. */ - -#define LOAD_INST(DEST_A, LD, MASK) \ - { \ - LOAD_INST_BASE (DEST_A, (LD & (MASK))) \ - } - - -#define LOAD_INST_BASE(DEST_A, VALUE) \ - { \ - if (delayed_loads) \ - { \ - delayed_load_addr1 = (DEST_A); \ - delayed_load_value1 = (VALUE); \ - } \ - else \ - { \ - *(DEST_A) = (VALUE); \ - } \ - } - - -#define DO_DELAYED_UPDATE() \ - if (delayed_loads) \ - { \ - /* Check for delayed updates */ \ - if (delayed_load_addr2 != NULL) \ - { \ - *delayed_load_addr2 = delayed_load_value2; \ - } \ - delayed_load_addr2 = delayed_load_addr1; \ - delayed_load_value2 = delayed_load_value1; \ - delayed_load_addr1 = NULL; \ - } - - - -/* Run the program stored in memory, starting at address PC for - STEPS_TO_RUN instruction executions. If flag DISPLAY is true, print - each instruction before it executes. Return true if program's - execution can continue. */ - -bool -run_spim (size_t context, bool display) -{ - reg_image_t ®_image = reg_images[context]; - - instruction *inst; - static reg_word *delayed_load_addr1 = NULL, delayed_load_value1; - static reg_word *delayed_load_addr2 = NULL, delayed_load_value2; - - reg_image.R[0] = 0; /* Maintain invariant value */ - - inst = read_mem_inst (context, reg_image.PC); - if (reg_image.exception_occurred) - { - reg_image.exception_occurred = 0; - handle_exception (reg_image); - return true; - } - else if (inst == NULL) - { - run_error ("Attempt to execute non-instruction at 0x%08x\n", reg_image.PC); - return false; - } - else if (EXPR (inst) != NULL - && EXPR (inst)->symbol != NULL - && EXPR (inst)->symbol->addr == 0) - { - run_error ("Instruction references undefined symbol at 0x%08x\n %s", reg_image.PC, inst_to_string(reg_image.PC)); - return false; - } - - if (display) - print_inst (reg_image.PC); - -#ifdef TEST_ASM - test_assembly (inst); -#endif - - DO_DELAYED_UPDATE (); - - switch (OPCODE (inst)) - { - case Y_ADD_OP: - { - reg_word vs = reg_image.R[RS (inst)], vt = reg_image.R[RT (inst)]; - reg_word sum = vs + vt; - - if (ARITH_OVFL (sum, vs, vt)) - RAISE_EXCEPTION (reg_image, ExcCode_Ov, break); - reg_image.R[RD (inst)] = sum; - break; - } - - case Y_ADDI_OP: - { - reg_word vs = reg_image.R[RS (inst)], imm = (short) IMM (inst); - reg_word sum = vs + imm; - - if (ARITH_OVFL (sum, vs, imm)) - RAISE_EXCEPTION (reg_image, ExcCode_Ov, break); - reg_image.R[RT (inst)] = sum; - break; - } - - case Y_ADDIU_OP: - reg_image.R[RT (inst)] = reg_image.R[RS (inst)] + (short) IMM (inst); - break; - - case Y_ADDU_OP: - reg_image.R[RD (inst)] = reg_image.R[RS (inst)] + reg_image.R[RT (inst)]; - break; - - case Y_AND_OP: - reg_image.R[RD (inst)] = reg_image.R[RS (inst)] & reg_image.R[RT (inst)]; - break; - - case Y_ANDI_OP: - reg_image.R[RT (inst)] = reg_image.R[RS (inst)] & (0xffff & IMM (inst)); - break; - - case Y_BC2F_OP: - case Y_BC2FL_OP: - case Y_BC2T_OP: - case Y_BC2TL_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_BEQ_OP: - BRANCH_INST (reg_image.R[RS (inst)] == reg_image.R[RT (inst)], - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BEQL_OP: - BRANCH_INST (reg_image.R[RS (inst)] == reg_image.R[RT (inst)], - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BGEZ_OP: - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) == 0, - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BGEZL_OP: - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) == 0, - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BGEZAL_OP: - reg_image.R[31] = reg_image.PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) == 0, - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BGEZALL_OP: - reg_image.R[31] = reg_image.PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) == 0, - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BGTZ_OP: - BRANCH_INST (reg_image.R[RS (inst)] != 0 && SIGN_BIT (reg_image.R[RS (inst)]) == 0, - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BGTZL_OP: - BRANCH_INST (reg_image.R[RS (inst)] != 0 && SIGN_BIT (reg_image.R[RS (inst)]) == 0, - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BLEZ_OP: - BRANCH_INST (reg_image.R[RS (inst)] == 0 || SIGN_BIT (reg_image.R[RS (inst)]) != 0, - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BLEZL_OP: - BRANCH_INST (reg_image.R[RS (inst)] == 0 || SIGN_BIT (reg_image.R[RS (inst)]) != 0, - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BLTZ_OP: - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) != 0, - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BLTZL_OP: - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) != 0, - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BLTZAL_OP: - reg_image.R[31] = reg_image.PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) != 0, - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BLTZALL_OP: - reg_image.R[31] = reg_image.PC + (delayed_branches ? 2 * BYTES_PER_WORD : BYTES_PER_WORD); - BRANCH_INST (SIGN_BIT (reg_image.R[RS (inst)]) != 0, - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BNE_OP: - BRANCH_INST (reg_image.R[RS (inst)] != reg_image.R[RT (inst)], - reg_image.PC + IDISP (inst), - 0); - break; - - case Y_BNEL_OP: - BRANCH_INST (reg_image.R[RS (inst)] != reg_image.R[RT (inst)], - reg_image.PC + IDISP (inst), - 1); - break; - - case Y_BREAK_OP: - if (RD (inst) == 1) - /* Debugger breakpoint */ - RAISE_EXCEPTION (reg_image, ExcCode_Bp, return true) - else - RAISE_EXCEPTION (reg_image, ExcCode_Bp, break); - - case Y_CACHE_OP: - break; /* Memory details not implemented */ - - case Y_CFC0_OP: - reg_image.R[RT (inst)] = reg_image.CCR[0][RD (inst)]; - break; - - case Y_CFC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_CLO_OP: - { - reg_word val = reg_image.R[RS (inst)]; - int i; - for (i = 31; 0 <= i; i -= 1) - if (((val >> i) & 0x1) == 0) break; - - reg_image.R[RD (inst) ] = 31 - i; - break; - } - - case Y_CLZ_OP: - { - reg_word val = reg_image.R[RS (inst)]; - int i; - for (i = 31; 0 <= i; i -= 1) - if (((val >> i) & 0x1) == 1) break; - - reg_image.R[RD (inst) ] = 31 - i; - break; - } - - case Y_COP2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_CTC0_OP: - reg_image.CCR[0][RD (inst)] = reg_image.R[RT (inst)]; - break; - - case Y_CTC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_DIV_OP: - /* The behavior of this instruction is undefined on divide by - zero or overflow. */ - if (reg_image.R[RT (inst)] != 0 - && !(reg_image.R[RS (inst)] == (reg_word)0x80000000 - && reg_image.R[RT (inst)] == (reg_word)0xffffffff)) - { - reg_image.LO = (reg_word) reg_image.R[RS (inst)] / (reg_word) reg_image.R[RT (inst)]; - reg_image.HI = (reg_word) reg_image.R[RS (inst)] % (reg_word) reg_image.R[RT (inst)]; - } - break; - - case Y_DIVU_OP: - /* The behavior of this instruction is undefined on divide by - zero or overflow. */ - if (reg_image.R[RT (inst)] != 0 - && !(reg_image.R[RS (inst)] == (reg_word)0x80000000 - && reg_image.R[RT (inst)] == (reg_word)0xffffffff)) - { - reg_image.LO = (u_reg_word) reg_image.R[RS (inst)] / (u_reg_word) reg_image.R[RT (inst)]; - reg_image.HI = (u_reg_word) reg_image.R[RS (inst)] % (u_reg_word) reg_image.R[RT (inst)]; - } - break; - - case Y_ERET_OP: - { - CP0_Status(reg_image) &= ~CP0_Status_EXL; /* Clear EXL bit */ - JUMP_INST (CP0_EPC(reg_image)); /* Jump to EPC */ - } - break; - - case Y_J_OP: - JUMP_INST (((reg_image.PC & 0xf0000000) | TARGET (inst) << 2)); - break; - - case Y_JAL_OP: - if (delayed_branches) - reg_image.R[31] = reg_image.PC + 2 * BYTES_PER_WORD; - else - reg_image.R[31] = reg_image.PC + BYTES_PER_WORD; - JUMP_INST (((reg_image.PC & 0xf0000000) | (TARGET (inst) << 2))); - break; - - case Y_JALR_OP: - { - mem_addr tmp = reg_image.R[RS (inst)]; - - if (delayed_branches) - reg_image.R[RD (inst)] = reg_image.PC + 2 * BYTES_PER_WORD; - else - reg_image.R[RD (inst)] = reg_image.PC + BYTES_PER_WORD; - JUMP_INST (tmp); - } - break; - - case Y_JR_OP: - { - mem_addr tmp = reg_image.R[RS (inst)]; - - JUMP_INST (tmp); - } - break; - - case Y_LB_OP: - LOAD_INST (®_image.R[RT (inst)], - read_mem_byte (context, reg_image.R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LBU_OP: - LOAD_INST (®_image.R[RT (inst)], - read_mem_byte (context, reg_image.R[BASE (inst)] + IOFFSET (inst)), - 0xff); - break; - - case Y_LH_OP: - LOAD_INST (®_image.R[RT (inst)], - read_mem_half (context, reg_image.R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LHU_OP: - LOAD_INST (®_image.R[RT (inst)], - read_mem_half (context, reg_image.R[BASE (inst)] + IOFFSET (inst)), - 0xffff); - break; - - case Y_LL_OP: - /* Uniprocess, so this instruction is just a load */ - LOAD_INST (®_image.R[RT (inst)], - read_mem_word (context, reg_image.R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LUI_OP: - reg_image.R[RT (inst)] = (IMM (inst) << 16) & 0xffff0000; - break; - - case Y_LW_OP: - LOAD_INST (®_image.R[RT (inst)], - read_mem_word (context, reg_image.R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_LDC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_LWC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_LWL_OP: - { - mem_addr addr = reg_image.R[BASE (inst)] + IOFFSET (inst); - reg_word word; /* Can't be register */ - int byte = addr & 0x3; - reg_word reg_val = reg_image.R[RT (inst)]; - - word = read_mem_word (context, addr & 0xfffffffc); - if (!reg_image.exception_occurred) -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - word = word; - break; - - case 1: - word = ((word & 0xffffff) << 8) | (reg_val & 0xff); - break; - - case 2: - word = ((word & 0xffff) << 16) | (reg_val & 0xffff); - break; - - case 3: - word = ((word & 0xff) << 24) | (reg_val & 0xffffff); - break; - } -#else - switch (byte) - { - case 0: - word = ((word & 0xff) << 24) | (reg_val & 0xffffff); - break; - - case 1: - word = ((word & 0xffff) << 16) | (reg_val & 0xffff); - break; - - case 2: - word = ((word & 0xffffff) << 8) | (reg_val & 0xff); - break; - - case 3: - break; - } -#endif - LOAD_INST_BASE (®_image.R[RT (inst)], word); - break; - } - - case Y_LWR_OP: - { - mem_addr addr = reg_image.R[BASE (inst)] + IOFFSET (inst); - reg_word word; /* Can't be register */ - int byte = addr & 0x3; - reg_word reg_val = reg_image.R[RT (inst)]; - - word = read_mem_word (context, addr & 0xfffffffc); - if (!reg_image.exception_occurred) -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - word = (reg_val & 0xffffff00) | ((unsigned)(word & 0xff000000) >> 24); - break; - - case 1: - word = (reg_val & 0xffff0000) | ((unsigned)(word & 0xffff0000) >> 16); - break; - - case 2: - word = (reg_val & 0xff000000) | ((unsigned)(word & 0xffffff00) >> 8); - break; - - case 3: - word = word; - break; - } -#else - switch (byte) - { - case 0: - break; - - case 1: - word = (reg_val & 0xff000000) | ((word & 0xffffff00) >> 8); - break; - - case 2: - word = (reg_val & 0xffff0000) | ((word & 0xffff0000) >> 16); - break; - - case 3: - word = (reg_val & 0xffffff00) | ((word & 0xff000000) >> 24); - break; - } -#endif - LOAD_INST_BASE (®_image.R[RT (inst)], word); - break; - } - - case Y_MADD_OP: - case Y_MADDU_OP: - { - reg_word lo = reg_image.LO, hi = reg_image.HI; - reg_word tmp; - if (OPCODE (inst) == Y_MADD_OP) - { - signed_multiply(context, reg_image.R[RS (inst)], reg_image.R[RT (inst)]); - } - else /* Y_MADDU_OP */ - { - unsigned_multiply(context, reg_image.R[RS (inst)], reg_image.R[RT (inst)]); - } - tmp = lo + reg_image.LO; - if ((unsigned)tmp < (unsigned)reg_image.LO || (unsigned)tmp < (unsigned)lo) - { - /* Addition of low-order word overflows */ - hi += 1; - } - reg_image.LO = tmp; - reg_image.HI = hi + reg_image.HI; - break; - } - - case Y_MFC0_OP: - reg_image.R[RT (inst)] = reg_image.CPR[0][FS (inst)]; - break; - - case Y_MFC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_MFHI_OP: - reg_image.R[RD (inst)] = reg_image.HI; - break; - - case Y_MFLO_OP: - reg_image.R[RD (inst)] = reg_image.LO; - break; - - case Y_MOVN_OP: - if (reg_image.R[RT (inst)] != 0) - reg_image.R[RD (inst)] = reg_image.R[RS (inst)]; - break; - - case Y_MOVZ_OP: - if (reg_image.R[RT (inst)] == 0) - reg_image.R[RD (inst)] = reg_image.R[RS (inst)]; - break; - - case Y_MSUB_OP: - case Y_MSUBU_OP: - { - reg_word lo = reg_image.LO, hi = reg_image.HI; - reg_word tmp; - - if (OPCODE (inst) == Y_MSUB_OP) - { - signed_multiply(context, reg_image.R[RS (inst)], reg_image.R[RT (inst)]); - } - else /* Y_MSUBU_OP */ - { - unsigned_multiply(context, reg_image.R[RS (inst)], reg_image.R[RT (inst)]); - } - - tmp = lo - reg_image.LO; - if ((unsigned)reg_image.LO > (unsigned)lo) - { - /* Subtraction of low-order word borrows */ - hi -= 1; - } - reg_image.LO = tmp; - reg_image.HI = hi - reg_image.HI; - break; - } - - case Y_MTC0_OP: - reg_image.CPR[0][FS (inst)] = reg_image.R[RT (inst)]; - switch (FS (inst)) - { - case CP0_Compare_Reg: - CP0_Cause(reg_image) &= ~CP0_Cause_IP7; /* Writing clears HW interrupt 5 */ - break; - - case CP0_Status_Reg: - CP0_Status(reg_image) &= CP0_Status_Mask; - CP0_Status(reg_image) |= ((CP0_Status_CU & 0x30000000) | CP0_Status_UM); - break; - - case CP0_Cause_Reg: - reg_image.CPR[0][FS (inst)] &= CP0_Cause_Mask; - break; - - case CP0_Config_Reg: - reg_image.CPR[0][FS (inst)] &= CP0_Config_Mask; - break; - - default: - break; - } - break; - - case Y_MTC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_MTHI_OP: - reg_image.HI = reg_image.R[RS (inst)]; - break; - - case Y_MTLO_OP: - reg_image.LO = reg_image.R[RS (inst)]; - break; - - case Y_MUL_OP: - signed_multiply(context, reg_image.R[RS (inst)], reg_image.R[RT (inst)]); - reg_image.R[RD (inst)] = reg_image.LO; - break; - - case Y_MULT_OP: - signed_multiply(context, reg_image.R[RS (inst)], reg_image.R[RT (inst)]); - break; - - case Y_MULTU_OP: - unsigned_multiply (context, reg_image.R[RS (inst)], reg_image.R[RT (inst)]); - break; - - case Y_NOR_OP: - reg_image.R[RD (inst)] = ~ (reg_image.R[RS (inst)] | reg_image.R[RT (inst)]); - break; - - case Y_OR_OP: - reg_image.R[RD (inst)] = reg_image.R[RS (inst)] | reg_image.R[RT (inst)]; - break; - - case Y_ORI_OP: - reg_image.R[RT (inst)] = reg_image.R[RS (inst)] | (0xffff & IMM (inst)); - break; - - case Y_PREF_OP: - break; /* Memory details not implemented */ - - case Y_RFE_OP: -#ifdef MIPS1 - /* This is MIPS-I, not compatible with MIPS32 or the - definition of the bits in the CP0 Status register in that - architecture. */ - CP0_Status(reg_image) = (CP0_Status(reg_image) & 0xfffffff0) | ((CP0_Status(reg_image) & 0x3c) >> 2); -#else - RAISE_EXCEPTION (reg_image, ExcCode_RI, {}); /* Not MIPS32 instruction */ -#endif - break; - - case Y_SB_OP: - set_mem_byte (context, reg_image.R[BASE (inst)] + IOFFSET (inst), reg_image.R[RT (inst)]); - break; - - case Y_SC_OP: - /* Uniprocessor, so instruction is just a store */ - set_mem_word (context, reg_image.R[BASE (inst)] + IOFFSET (inst), reg_image.R[RT (inst)]); - break; - - case Y_SDC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_SH_OP: - set_mem_half (context, reg_image.R[BASE (inst)] + IOFFSET (inst), reg_image.R[RT (inst)]); - break; - - case Y_SLL_OP: - { - int shamt = SHAMT (inst); - - if (shamt >= 0 && shamt < 32) - reg_image.R[RD (inst)] = reg_image.R[RT (inst)] << shamt; - else - reg_image.R[RD (inst)] = reg_image.R[RT (inst)]; - break; - } - - case Y_SLLV_OP: - { - int shamt = (reg_image.R[RS (inst)] & 0x1f); - - if (shamt >= 0 && shamt < 32) - reg_image.R[RD (inst)] = reg_image.R[RT (inst)] << shamt; - else - reg_image.R[RD (inst)] = reg_image.R[RT (inst)]; - break; - } - - case Y_SLT_OP: - if (reg_image.R[RS (inst)] < reg_image.R[RT (inst)]) - reg_image.R[RD (inst)] = 1; - else - reg_image.R[RD (inst)] = 0; - break; - - case Y_SLTI_OP: - if (reg_image.R[RS (inst)] < (short) IMM (inst)) - reg_image.R[RT (inst)] = 1; - else - reg_image.R[RT (inst)] = 0; - break; - - case Y_SLTIU_OP: - { - int x = (short) IMM (inst); - - if ((u_reg_word) reg_image.R[RS (inst)] < (u_reg_word) x) - reg_image.R[RT (inst)] = 1; - else - reg_image.R[RT (inst)] = 0; - break; - } - - case Y_SLTU_OP: - if ((u_reg_word) reg_image.R[RS (inst)] < (u_reg_word) reg_image.R[RT (inst)]) - reg_image.R[RD (inst)] = 1; - else - reg_image.R[RD (inst)] = 0; - break; - - case Y_SRA_OP: - { - int shamt = SHAMT (inst); - reg_word val = reg_image.R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - reg_image.R[RD (inst)] = val >> shamt; - else - reg_image.R[RD (inst)] = val; - break; - } - - case Y_SRAV_OP: - { - int shamt = reg_image.R[RS (inst)] & 0x1f; - reg_word val = reg_image.R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - reg_image.R[RD (inst)] = val >> shamt; - else - reg_image.R[RD (inst)] = val; - break; - } - - case Y_SRL_OP: - { - int shamt = SHAMT (inst); - u_reg_word val = reg_image.R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - reg_image.R[RD (inst)] = val >> shamt; - else - reg_image.R[RD (inst)] = val; - break; - } - - case Y_SRLV_OP: - { - int shamt = reg_image.R[RS (inst)] & 0x1f; - u_reg_word val = reg_image.R[RT (inst)]; - - if (shamt >= 0 && shamt < 32) - reg_image.R[RD (inst)] = val >> shamt; - else - reg_image.R[RD (inst)] = val; - break; - } - - case Y_SUB_OP: - { - reg_word vs = reg_image.R[RS (inst)], vt = reg_image.R[RT (inst)]; - reg_word diff = vs - vt; - - if (SIGN_BIT (vs) != SIGN_BIT (vt) - && SIGN_BIT (vs) != SIGN_BIT (diff)) - RAISE_EXCEPTION (reg_image, ExcCode_Ov, break); - reg_image.R[RD (inst)] = diff; - break; - } - - case Y_SUBU_OP: - reg_image.R[RD (inst)] = (u_reg_word)reg_image.R[RS (inst)]-(u_reg_word)reg_image.R[RT (inst)]; - break; - - case Y_SW_OP: - set_mem_word (context, reg_image.R[BASE (inst)] + IOFFSET (inst), reg_image.R[RT (inst)]); - break; - - case Y_SWC2_OP: - RAISE_EXCEPTION (reg_image, ExcCode_CpU, {}); /* No Coprocessor 2 */ - break; - - case Y_SWL_OP: - { - mem_addr addr = reg_image.R[BASE (inst)] + IOFFSET (inst); - mem_word data; - reg_word reg = reg_image.R[RT (inst)]; - int byte = addr & 0x3; - - data = read_mem_word (context, addr & 0xfffffffc); -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - data = reg; - break; - - case 1: - data = (data & 0xff000000) | (reg >> 8 & 0xffffff); - break; - - case 2: - data = (data & 0xffff0000) | (reg >> 16 & 0xffff); - break; - - case 3: - data = (data & 0xffffff00) | (reg >> 24 & 0xff); - break; - } -#else - switch (byte) - { - case 0: - data = (data & 0xffffff00) | (reg >> 24 & 0xff); - break; - - case 1: - data = (data & 0xffff0000) | (reg >> 16 & 0xffff); - break; - - case 2: - data = (data & 0xff000000) | (reg >> 8 & 0xffffff); - break; - - case 3: - data = reg; - break; - } -#endif - set_mem_word (context, addr & 0xfffffffc, data); - break; - } - - case Y_SWR_OP: - { - mem_addr addr = reg_image.R[BASE (inst)] + IOFFSET (inst); - mem_word data; - reg_word reg = reg_image.R[RT (inst)]; - int byte = addr & 0x3; - - data = read_mem_word (context, addr & 0xfffffffc); -#ifdef SPIM_BIGENDIAN - switch (byte) - { - case 0: - data = ((reg << 24) & 0xff000000) | (data & 0xffffff); - break; - - case 1: - data = ((reg << 16) & 0xffff0000) | (data & 0xffff); - break; - - case 2: - data = ((reg << 8) & 0xffffff00) | (data & 0xff) ; - break; - - case 3: - data = reg; - break; - } -#else - switch (byte) - { - case 0: - data = reg; - break; - - case 1: - data = ((reg << 8) & 0xffffff00) | (data & 0xff) ; - break; - - case 2: - data = ((reg << 16) & 0xffff0000) | (data & 0xffff); - break; - - case 3: - data = ((reg << 24) & 0xff000000) | (data & 0xffffff); - break; - } -#endif - set_mem_word (context, addr & 0xfffffffc, data); - break; - } - - case Y_SYNC_OP: - break; /* Memory details not implemented */ - - case Y_SYSCALL_OP: - if (!do_syscall (context)) - return false; - break; - - case Y_TEQ_OP: - if (reg_image.R[RS (inst)] == reg_image.R[RT (inst)]) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TEQI_OP: - if (reg_image.R[RS (inst)] == IMM (inst)) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TGE_OP: - if (reg_image.R[RS (inst)] >= reg_image.R[RT (inst)]) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TGEI_OP: - if (reg_image.R[RS (inst)] >= IMM (inst)) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TGEIU_OP: - if ((u_reg_word)reg_image.R[RS (inst)] >= (u_reg_word)IMM (inst)) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TGEU_OP: - if ((u_reg_word)reg_image.R[RS (inst)] >= (u_reg_word)reg_image.R[RT (inst)]) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TLBP_OP: - RAISE_EXCEPTION(reg_image, ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBR_OP: - RAISE_EXCEPTION(reg_image, ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBWI_OP: - RAISE_EXCEPTION(reg_image, ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLBWR_OP: - RAISE_EXCEPTION(reg_image, ExcCode_RI, {}); /* TLB not implemented */ - break; - - case Y_TLT_OP: - if (reg_image.R[RS (inst)] < reg_image.R[RT (inst)]) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TLTI_OP: - if (reg_image.R[RS (inst)] < IMM (inst)) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TLTIU_OP: - if ((u_reg_word)reg_image.R[RS (inst)] < (u_reg_word)IMM (inst)) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TLTU_OP: - if ((u_reg_word)reg_image.R[RS (inst)] < (u_reg_word)reg_image.R[RT (inst)]) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TNE_OP: - if (reg_image.R[RS (inst)] != reg_image.R[RT (inst)]) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_TNEI_OP: - if (reg_image.R[RS (inst)] != IMM (inst)) - RAISE_EXCEPTION(reg_image, ExcCode_Tr, {}); - break; - - case Y_XOR_OP: - reg_image.R[RD (inst)] = reg_image.R[RS (inst)] ^ reg_image.R[RT (inst)]; - break; - - case Y_XORI_OP: - reg_image.R[RT (inst)] = reg_image.R[RS (inst)] ^ (0xffff & IMM (inst)); - break; - - - /* FPA Operations */ - - case Y_ABS_S_OP: - SET_FPR_S (reg_image, FD (inst), fabs (FPR_S (reg_image, FS (inst)))); - break; - - case Y_ABS_D_OP: - SET_FPR_D (reg_image, FD (inst), fabs (FPR_D (reg_image, FS (inst)))); - break; - - case Y_ADD_S_OP: - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst)) + FPR_S (reg_image, FT (inst))); - /* Should trap on inexact/overflow/underflow */ - break; - - case Y_ADD_D_OP: - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst)) + FPR_D (reg_image, FT (inst))); - /* Should trap on inexact/overflow/underflow */ - break; - - case Y_BC1F_OP: - case Y_BC1FL_OP: - case Y_BC1T_OP: - case Y_BC1TL_OP: - { - int cc = CC (inst); - int nd = ND (inst); /* 1 => nullify */ - int tf = TF (inst); /* 0 => BC1F, 1 => BC1T */ - BRANCH_INST ((FCCR(reg_image) & (1 << cc)) == (tf << cc), - reg_image.PC + IDISP (inst), - nd); - break; - } - - case Y_C_F_S_OP: - case Y_C_UN_S_OP: - case Y_C_EQ_S_OP: - case Y_C_UEQ_S_OP: - case Y_C_OLT_S_OP: - case Y_C_OLE_S_OP: - case Y_C_ULT_S_OP: - case Y_C_ULE_S_OP: - case Y_C_SF_S_OP: - case Y_C_NGLE_S_OP: - case Y_C_SEQ_S_OP: - case Y_C_NGL_S_OP: - case Y_C_LT_S_OP: - case Y_C_NGE_S_OP: - case Y_C_LE_S_OP: - case Y_C_NGT_S_OP: - { - float v1 = FPR_S (reg_image, FS (inst)), v2 = FPR_S (reg_image, FT (inst)); - double dv1 = v1, dv2 = v2; - int cond = COND (inst); - int cc = FD (inst); - - if (NaN (dv1) || NaN (dv2)) - { - if (cond & COND_IN) - { - RAISE_EXCEPTION (reg_image, ExcCode_FPE, break); - } - set_fpu_cc (context, cond, cc, 0, 0, 1); - } - else - { - set_fpu_cc (context, cond, cc, v1 < v2, v1 == v2, 0); - } - } - break; - - case Y_C_F_D_OP: - case Y_C_UN_D_OP: - case Y_C_EQ_D_OP: - case Y_C_UEQ_D_OP: - case Y_C_OLT_D_OP: - case Y_C_OLE_D_OP: - case Y_C_ULT_D_OP: - case Y_C_ULE_D_OP: - case Y_C_SF_D_OP: - case Y_C_NGLE_D_OP: - case Y_C_SEQ_D_OP: - case Y_C_NGL_D_OP: - case Y_C_LT_D_OP: - case Y_C_NGE_D_OP: - case Y_C_LE_D_OP: - case Y_C_NGT_D_OP: - { - double v1 = FPR_D (reg_image, FS (inst)), v2 = FPR_D (reg_image, FT (inst)); - int cond = COND (inst); - int cc = FD (inst); - - if (NaN (v1) || NaN (v2)) - { - if (cond & COND_IN) - { - RAISE_EXCEPTION (reg_image, ExcCode_FPE, break); - } - set_fpu_cc (context, cond, cc, 0, 0, 1); - } - else - { - set_fpu_cc (context, cond, cc, v1 < v2, v1 == v2, 0); - } - } - break; - - case Y_CFC1_OP: - reg_image.R[RT (inst)] = FCR(reg_image)[FS (inst)]; - break; - - case Y_CTC1_OP: - FCR(reg_image)[FS (inst)] = reg_image.R[RT (inst)]; - - if (FIR_REG == FS (inst)) - { - /* Read only register */ - FIR(reg_image) = FIR_MASK; - } - else if (FCCR_REG == FS (inst)) - { - /* FCC bits in FCSR and FCCR linked */ - FCSR(reg_image) = (FCSR(reg_image) & ~0xfe400000) - | ((FCCR(reg_image) & 0xfe) << 24) - | ((FCCR(reg_image) & 0x1) << 23); - FCCR(reg_image) &= FCCR_MASK; - } - else if (FCSR_REG == FS (inst)) - { - /* FCC bits in FCSR and FCCR linked */ - FCCR(reg_image) = ((FCSR(reg_image) >> 24) & 0xfe) | ((FCSR(reg_image) >> 23) & 0x1); - FCSR(reg_image) &= FCSR_MASK; - if ((reg_image.R[RT (inst)] & ~FCSR_MASK) != 0) - /* Trying to set unsupported mode */ - RAISE_EXCEPTION (reg_image, ExcCode_FPE, {}); - } - break; - - case Y_CEIL_W_D_OP: - { - double val = FPR_D (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)ceil (val)); - break; - } - - case Y_CEIL_W_S_OP: - { - double val = (double)FPR_S (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)ceil (val)); - break; - } - - case Y_CVT_D_S_OP: - { - double val = FPR_S (reg_image, FS (inst)); - - SET_FPR_D (reg_image, FD (inst), val); - break; - } - - case Y_CVT_D_W_OP: - { - double val = (double)FPR_W (reg_image, FS (inst)); - - SET_FPR_D (reg_image, FD (inst), val); - break; - } - - case Y_CVT_S_D_OP: - { - float val = (float)FPR_D (reg_image, FS (inst)); - - SET_FPR_S (reg_image, FD (inst), val); - break; - } - - case Y_CVT_S_W_OP: - { - float val = (float)FPR_W (reg_image, FS (inst)); - - SET_FPR_S (reg_image, FD (inst), val); - break; - } - - case Y_CVT_W_D_OP: - { - int val = (int32)FPR_D (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), val); - break; - } - - case Y_CVT_W_S_OP: - { - int val = (int32)FPR_S (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), val); - break; - } - - case Y_DIV_S_OP: - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst)) / FPR_S (reg_image, FT (inst))); - break; - - case Y_DIV_D_OP: - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst)) / FPR_D (reg_image, FT (inst))); - break; - - case Y_FLOOR_W_D_OP: - { - double val = FPR_D (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)floor (val)); - break; - } - - case Y_FLOOR_W_S_OP: - { - double val = (double)FPR_S (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)floor (val)); - break; - } - - case Y_LDC1_OP: - { - mem_addr addr = reg_image.R[BASE (inst)] + IOFFSET (inst); - if ((addr & 0x3) != 0) - RAISE_EXCEPTION (reg_image, ExcCode_AdEL, CP0_BadVAddr(reg_image) = addr); - - LOAD_INST ((reg_word *) &FPR_S(reg_image, FT (inst)), - read_mem_word (context, addr), - 0xffffffff); - LOAD_INST ((reg_word *) &FPR_S(reg_image, FT (inst) + 1), - read_mem_word (context, addr + sizeof(mem_word)), - 0xffffffff); - break; - } - - case Y_LWC1_OP: - LOAD_INST ((reg_word *) &FPR_S(reg_image, FT (inst)), - read_mem_word (context, reg_image.R[BASE (inst)] + IOFFSET (inst)), - 0xffffffff); - break; - - case Y_MFC1_OP: - { - float val = FPR_S(reg_image, FS (inst)); - reg_word *vp = (reg_word *) &val; - - reg_image.R[RT (inst)] = *vp; /* Fool coercion */ - break; - } - - case Y_MOV_S_OP: - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst))); - break; - - case Y_MOV_D_OP: - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst))); - break; - - case Y_MOVF_OP: - { - int cc = CC (inst); - if ((FCCR(reg_image) & (1 << cc)) == 0) - reg_image.R[RD (inst)] = reg_image.R[RS (inst)]; - break; - } - - case Y_MOVF_D_OP: - { - int cc = CC (inst); - if ((FCCR(reg_image) & (1 << cc)) == 0) - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst))); - break; - } - - case Y_MOVF_S_OP: - { - int cc = CC (inst); - if ((FCCR(reg_image) & (1 << cc)) == 0) - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst))); - break; - - } - - case Y_MOVN_D_OP: - { - if (reg_image.R[RT (inst)] != 0) - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst))); - break; - } - - case Y_MOVN_S_OP: - { - if (reg_image.R[RT (inst)] != 0) - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst))); - break; - } - - case Y_MOVT_OP: - { - int cc = CC (inst); - if ((FCCR(reg_image) & (1 << cc)) != 0) - reg_image.R[RD (inst)] = reg_image.R[RS (inst)]; - break; - } - - case Y_MOVT_D_OP: - { - int cc = CC (inst); - if ((FCCR(reg_image) & (1 << cc)) != 0) - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst))); - break; - } - - case Y_MOVT_S_OP: - { - int cc = CC (inst); - if ((FCCR(reg_image) & (1 << cc)) != 0) - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst))); - break; - - } - - case Y_MOVZ_D_OP: - { - if (reg_image.R[RT (inst)] == 0) - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst))); - break; - } - - case Y_MOVZ_S_OP: - { - if (reg_image.R[RT (inst)] == 0) - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst))); - break; - - } - - case Y_MTC1_OP: - { - reg_word word = reg_image.R[RT (inst)]; - float *wp = (float *) &word; - - SET_FPR_S(reg_image, FS (inst), *wp); /* fool coercion */ - break; - } - - case Y_MUL_S_OP: - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst)) * FPR_S (reg_image, FT (inst))); - break; - - case Y_MUL_D_OP: - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst)) * FPR_D (reg_image, FT (inst))); - break; - - case Y_NEG_S_OP: - SET_FPR_S (reg_image, FD (inst), -FPR_S (reg_image, FS (inst))); - break; - - case Y_NEG_D_OP: - SET_FPR_D (reg_image, FD (inst), -FPR_D (reg_image, FS (inst))); - break; - - case Y_ROUND_W_D_OP: - { - double val = FPR_D (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)(val + 0.5)); /* Casting truncates */ - break; - } - - case Y_ROUND_W_S_OP: - { - double val = (double)FPR_S (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)(val + 0.5)); /* Casting truncates */ - break; - } - - case Y_SDC1_OP: - { - double val = FPR_D (reg_image, RT (inst)); - reg_word *vp = (reg_word*)&val; - mem_addr addr = reg_image.R[BASE (inst)] + IOFFSET (inst); - if ((addr & 0x3) != 0) - RAISE_EXCEPTION (reg_image, ExcCode_AdEL, CP0_BadVAddr(reg_image) = addr); - - set_mem_word (context, addr, *vp); - set_mem_word (context, addr + sizeof(mem_word), *(vp + 1)); - break; - } - - case Y_SQRT_D_OP: - SET_FPR_D (reg_image, FD (inst), sqrt (FPR_D (reg_image, FS (inst)))); - break; - - case Y_SQRT_S_OP: - SET_FPR_S (reg_image, FD (inst), sqrt (FPR_S (reg_image, FS (inst)))); - break; - - case Y_SUB_S_OP: - SET_FPR_S (reg_image, FD (inst), FPR_S (reg_image, FS (inst)) - FPR_S (reg_image, FT (inst))); - break; - - case Y_SUB_D_OP: - SET_FPR_D (reg_image, FD (inst), FPR_D (reg_image, FS (inst)) - FPR_D (reg_image, FT (inst))); - break; - - case Y_SWC1_OP: - { - float val = FPR_S(reg_image, RT (inst)); - reg_word *vp = (reg_word *) &val; - - set_mem_word (context, reg_image.R[BASE (inst)] + IOFFSET (inst), *vp); - break; - } - - case Y_TRUNC_W_D_OP: - { - double val = FPR_D (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)val); /* Casting truncates */ - break; - } - - case Y_TRUNC_W_S_OP: - { - double val = (double)FPR_S (reg_image, FS (inst)); - - SET_FPR_W (reg_image, FD (inst), (int32)val); /* Casting truncates */ - break; - } - - default: - fatal_error ("Unknown instruction type: %d\n", OPCODE (inst)); - break; - } - - /* After instruction executes: */ - reg_image.PC += BYTES_PER_WORD; - - if (reg_image.exception_occurred) - { - if ((CP0_Cause(reg_image) >> 2) > LAST_REAL_EXCEPT) - CP0_EPC(reg_image) = reg_image.PC - BYTES_PER_WORD; - handle_exception (reg_image); - } - - return true; -} - - -/* Multiply two 32-bit numbers, V1 and V2, to produce a 64 bit result in - the HI/LO registers. The algorithm is high-school math: - - A B - x C D - ------ - AD || BD - AC || CB || 0 - - where A and B are the high and low short words of V1, C and D are the short - words of V2, AD is the product of A and D, and X || Y is (X << 16) + Y. - Since the algorithm is programmed in C, we need to be careful not to - overflow. */ - -static void -unsigned_multiply (size_t context, reg_word v1, reg_word v2) -{ - reg_image_t ®_image = reg_images[context]; - - u_reg_word a, b, c, d; - u_reg_word bd, ad, cb, ac; - u_reg_word mid, mid2, carry_mid = 0; - - a = (v1 >> 16) & 0xffff; - b = v1 & 0xffff; - c = (v2 >> 16) & 0xffff; - d = v2 & 0xffff; - - bd = b * d; - ad = a * d; - cb = c * b; - ac = a * c; - - mid = ad + cb; - if (mid < ad || mid < cb) - /* Arithmetic overflow or carry-out */ - carry_mid = 1; - - mid2 = mid + ((bd >> 16) & 0xffff); - if (mid2 < mid || mid2 < ((bd >> 16) & 0xffff)) - /* Arithmetic overflow or carry-out */ - carry_mid += 1; - - reg_image.LO = (bd & 0xffff) | ((mid2 & 0xffff) << 16); - reg_image.HI = ac + (carry_mid << 16) + ((mid2 >> 16) & 0xffff); -} - - -static void -signed_multiply (size_t context, reg_word v1, reg_word v2) -{ - reg_image_t ®_image = reg_images[context]; - - int neg_sign = 0; - - if (v1 < 0) - { - v1 = - v1; - neg_sign = 1; - } - if (v2 < 0) - { - v2 = - v2; - neg_sign = ! neg_sign; - } - - unsigned_multiply (context, v1, v2); - if (neg_sign) - { - reg_image.LO = ~ reg_image.LO; - reg_image.HI = ~ reg_image.HI; - reg_image.LO += 1; - if (reg_image.LO == 0) - reg_image.HI += 1; - } -} - -static void -set_fpu_cc (size_t context, int cond, int cc, int less, int equal, int unordered) -{ - reg_image_t ®_image = reg_images[context]; - - int result; - int fcsr_bit; - - result = 0; - if (cond & COND_LT) result |= less; - if (cond & COND_EQ) result |= equal; - if (cond & COND_UN) result |= unordered; - - FCCR(reg_image) = (FCCR(reg_image) & ~(1 << cc)) | (result << cc); - if (0 == cc) - { - fcsr_bit = 23; - } - else - { - fcsr_bit = 24 + cc; - } - FCSR(reg_image) = (FCSR(reg_image) & ~(1 << fcsr_bit)) | (result << fcsr_bit); -} - - -void -raise_exception (size_t context, int excode) -{ - reg_image_t ®_image = reg_images[context]; - - if (ExcCode_Int != excode - || ((CP0_Status(reg_image) & CP0_Status_IE) /* Allow interrupt if IE and !EXL */ - && !(CP0_Status(reg_image) & CP0_Status_EXL))) - { - /* Ignore interrupt exception when interrupts disabled. */ - reg_image.exception_occurred = 1; - last_exception_addr = reg_image.PC; - if (running_in_delay_slot) - { - /* In delay slot */ - if ((CP0_Status(reg_image) & CP0_Status_EXL) == 0) - { - /* Branch's addr */ - CP0_EPC(reg_image) = ROUND_DOWN (reg_image.PC - BYTES_PER_WORD, BYTES_PER_WORD); - /* Set BD bit to record that instruction is in delay slot */ - CP0_Cause(reg_image) |= CP0_Cause_BD; - } - } - else - { - /* Not in delay slot */ - if ((CP0_Status(reg_image) & CP0_Status_EXL) == 0) - { - /* Faulting instruction's address */ - CP0_EPC(reg_image) = ROUND_DOWN (reg_image.PC, BYTES_PER_WORD); - } - } - /* ToDo: set CE field of Cause register to coprocessor causing exception */ - - /* Record cause of exception */ - CP0_Cause(reg_image) = (CP0_Cause(reg_image) & ~CP0_Cause_ExcCode) | (excode << 2); - - /* Turn on EXL bit to prevent subsequent interrupts from affecting EPC */ - CP0_Status(reg_image) |= CP0_Status_EXL; - -#ifdef MIPS1 - CP0_Status(reg_image) = (CP0_Status(reg_image) & 0xffffffc0) | ((CP0_Status(reg_image) & 0xf) << 2); -#endif - } -} diff --git a/spim-qtspimbot/CPU/run.h b/spim-qtspimbot/CPU/run.h deleted file mode 100755 index 54ddcb4..0000000 --- a/spim-qtspimbot/CPU/run.h +++ /dev/null @@ -1,36 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM instructions. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions: */ - -bool run_spim (size_t context, bool display); diff --git a/spim-qtspimbot/CPU/scanner.h b/spim-qtspimbot/CPU/scanner.h deleted file mode 100755 index 6231de2..0000000 --- a/spim-qtspimbot/CPU/scanner.h +++ /dev/null @@ -1,58 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to lexical scanner. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions (besides yylex): */ - -void initialize_scanner (FILE *in_file, char *in_file_name); -void push_scanner (FILE *in_file); -void pop_scanner (); -char* erroneous_line (); -void scanner_start_line (); -int register_name_to_number (char *name); -char *source_line (); -int yylex (); - -/* Exported Variables: */ - -/* This flag tells the scanner to treat the next sequence of letters - etc as an identifier and not look it up as an opcode. It permits us - to use opcodes as symbols in most places. However, because of the - LALR(1) lookahead, it does not work for labels. */ - -extern int only_id; - -typedef intptr_union yylval_t; -#define YYSTYPE yylval_t -extern YYSTYPE yylval; /* Value of token from YYLEX */ - -extern int line_no; /* Line number in input file*/ diff --git a/spim-qtspimbot/CPU/scanner.l b/spim-qtspimbot/CPU/scanner.l deleted file mode 100755 index 136522e..0000000 --- a/spim-qtspimbot/CPU/scanner.l +++ /dev/null @@ -1,738 +0,0 @@ -%{ -/* SPIM S20 MIPS simulator. - Lexical scanner. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "sym-tbl.h" -#include "parser.h" -#include "scanner.h" -#include "parser_yacc.h" - -#ifdef _WIN32 -#include -#else -#include -#endif - -#define YY_NO_UNISTD_H - -/* Exported Variables: */ - -int only_id; -int line_no; /* Line number in input file*/ - - -/* Local Variables: */ -static char *file_name; /* The name of the current file */ -static int file_name_len; /* To avoid recomputing for each source line */ - -/* Track which line we are reading and where it began in the buffer. */ -static int current_line_no = 0; - -static char *current_line = NULL; - - -static double scan_float; /* Where FP values are kept */ - -static int line_returned = 0; /* Returned current line yet? */ - -static int eof_returned = 0; /* Return EOF token yet? */ - - -/* Local functions: */ - -static int check_keyword (char *id, int allow_pseudo_ops); -static char *copy_str (char *str, int chop); -static char scan_escape (char **str); - - -#undef yywrap - -%} - -%% - -[ \t] { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - } - - -[\n] { - line_no += 1; - return (Y_NL); - } - -[\r] { /* Ignore carrage returns */ } - -[;] { - return (Y_NL); - } - - -[\001] { /* Marker character inserted to allow scanner to - return Y_EOF before returning hard EOF. */ - return (Y_EOF); - } - -"#".* { - /* Ignore comments */ - } - - -(-[0-9]+)|([0-9]+) { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.i = atoi (yytext); - return (Y_INT); - } - - -((0x)|(-0x))[0-9A-Fa-f]+ { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - if (*yytext == '-') - { - sscanf(yytext+3, "%x", (unsigned int*)&(yylval.i)); - yylval.i = -yylval.i; - } - else - { - sscanf(yytext+2, "%x", (unsigned int*)&(yylval.i)); - } - return (Y_INT); - } - - -(\+|\-)?[0-9]+[\.\,\'][0-9]+(e)?(\+|\-)?[0-9]* { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - scan_float = atof (yytext); - yylval.p = (double*) &scan_float; - return (Y_FP); - } - - -[a-zA-Z_\.][a-zA-Z0-9_\.]* { - int token = check_keyword (yytext, - !bare_machine - && accept_pseudo_insts); - label *l; - - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (!only_id && token != 0) - { - /* Keyword */ - yylval.i = token; - current_line = yytext; - return (token); - } - - if (only_id && token != 0) - yyerror ("Cannot use opcodes as labels"); - - if ((l = label_is_defined (yytext)) != NULL - && l->const_flag) - { - /* Defined label */ - yylval.i = (int) l->addr; - return (Y_INT); - } - else - { - /* Not-yet defined label */ - yylval.p = (char*) str_copy (yytext); - return (Y_ID); - } - } - - -\$[a-zA-Z0-9_\.$]+ { - int reg_no = register_name_to_number (yytext + 1); - - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (reg_no != -1 - && *(yytext + 1) == 'f' - && *(yytext + 2) != 'p') - { - /* Floating point register ($f0) */ - yylval.i = reg_no; - return (Y_FP_REG); - } - - if (0 <= reg_no && reg_no < R_LENGTH) - { - /* Register ($r0) */ - yylval.i = reg_no; - return (Y_REG); - } - else - { - /* Otherwise, an integer or identifier */ - label *l = label_is_defined (yytext); - - if (l != NULL && l->const_flag) - { - yylval.i = (int) l->addr; - return (Y_INT); - } - else - { - yylval.p = (char*) str_copy (yytext); - return (Y_ID); - } - } - } - - -[\*\/:()+-]|">"|"=" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - return (*yytext); - } - - -"," { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - /* Skip commas */ - } - -"?" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.p = (char*) str_copy (yytext); - /* For top level */ - return (Y_ID); - } - - -\"(([^""])|(\\\"))*\" { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yylval.p = (char*) copy_str (yytext + 1, 1); - return (Y_STR); - } - -\'(([^''])|(\\[^'']))\' { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - - if (*(yytext + 1) == '\\') - { - char *escape = yytext + 2; - yylval.i = (int) scan_escape (&escape); - } - else - { - yylval.i = (int) *(yytext + 1); - } - - return (Y_INT); - } - -. { - if (current_line == NULL) - { - current_line_no = line_no; - current_line = yytext; - } - yyerror ("Unknown character"); - } - - -%% - - - -void -initialize_scanner (FILE *in_file, char *in_file_name) -{ - if (yyin != in_file) - { - push_scanner (in_file); - } - yyin = in_file; - -#ifdef FLEX_SCANNER - yyrestart(in_file); -#define YY_FLEX_VERSION (YY_FLEX_MAJOR_VERSION * 1000 + YY_FLEX_MINOR_VERSION * 100 + YY_FLEX_SUBMINOR_VERSION) -#if YY_FLEX_VERSION >= 2533 - /* flex 2.5.33 flipped the polarity of this flag (sigh) */ - yy_init = 0; -#else - yy_init = 1; -#endif -#endif - - line_no = 1; - current_line = NULL; - line_returned = 0; - eof_returned = 0; - file_name = strdup(in_file_name); /* will leak some memory */ - file_name_len = strlen(file_name); -} - -void -push_scanner (FILE *in_file) -{ - YY_BUFFER_STATE buf = yy_create_buffer (in_file, YY_BUF_SIZE); - yypush_buffer_state (buf); -} - -void -pop_scanner () -{ - yypop_buffer_state (); -} - -void -scanner_start_line () -{ - current_line = NULL; - line_returned = 0; -} - - -/* This is a work-around for a bug in flex v 2.5.31 (but not earlier or - later versions such as 2.5.4) that left this symbol undefined. */ - -#ifndef yytext_ptr -#define yytext_ptr yytext -#endif - - -/* Use yywrap to insert a marker character, which causes the - scanner to return Y_EOF, before return a hard EOF. This - wouldn't be necessary, except that bison does not allow - the parser to use EOF (= 0) as a non-terminal */ - -int yywrap() -{ - if (eof_returned) - return (1); - else - { - unput ('\001'); - eof_returned = 1; -#ifdef FLEX_SCANNER - yy_did_buffer_switch_on_eof = 1; -#endif - return (0); - } -} - - -/* A backslash has just been read, return the character designated by *STR. */ - -static char -scan_escape (char **str) -{ - char first = **str; - *str += 1; - switch (first) - { - case 'a': return '\a'; - case 'b': return '\b'; - case 'f': return '\f'; - case 'n': return '\n'; - case 'r': return '\r'; - case 't': return '\t'; - case '\\': return '\\'; - case '"': return '"'; - case '\'': return '\''; - - case 'x': - case 'X': - { - char c1 = **str, c2 = *(*str + 1); - int b = 0; - - if ('0' <= c1 && c1 <= '9') b = c1 - '0'; - else if ('A' <= c1 && c1 <= 'F') b = c1 - 'A' + 10; - else if ('a' <= c1 && c1 <= 'f') b = c1 - 'a' + 10; - else yyerror ("Bad character in \\X construct in string"); - - b <<= 4; - if ('0' <= c2 && c2 <= '9') b += c2 - '0'; - else if ('A' <= c2 && c2 <= 'F') b += c2 - 'A' + 10; - else if ('a' <= c2 && c2 <= 'f') b += c2 - 'a' + 10; - else yyerror ("Bad character in \\X construct in string"); - - *str += 2; - return (char) b; - } - - default: - { - char message[] = "Bad character \\X"; - message[strlen (message) - 1] = first; - yyerror (message); - return '\0'; - } - } -} - - -/* Return a freshly-allocated copy of STRING with the last CHOP - characters removed. */ - -static char * -copy_str (char *str, int chop) -{ - int new_len = strlen (str) - chop; - char *new_str = (char *) xmalloc (new_len + 1), *n; - - for (n = new_str; *str != '\0' && new_len > 0; new_len -= 1) - if (*str == '\\') - switch (*(str + 1)) - { - case 'n': - { - *n ++ = '\n'; - str += 2; - new_len -= 1; - continue; - } - case 't': - { - *n ++ = '\t'; - str += 2; - new_len -= 1; - continue; - } - case '"': - { - *n ++ = '"'; - str += 2; - new_len -= 1; - continue; - } - case '0': /* \nnn */ - case '1': - case '2': - case '3': - { - char c2 = *(str + 2), c3 = *(str + 3); - int b = (*(str + 1) - '0') << 3; - - if ('0' <= c2 && c2 <= '7') - b += (c2 - '0') << 3; - else - yyerror ("Bad character in \\ooo construct in string"); - - if ('0' <= c3 && c3 <= '7') - b += c3 - '0'; - else - yyerror ("Bad character in \\ooo construct in string"); - - *n ++ = (char) b; - str += 4; - new_len -= 3; - continue; - } - case 'X': - { - char c2 = *(str + 2), c3 = *(str + 3); - int b = 0; - - if ('0' <= c2 && c2 <= '9') - b = c2 - '0'; - else if ('A' <= c2 && c2 <= 'F') - b = c2 - 'A' + 10; - else - yyerror ("Bad character in \\X construct in string"); - - b <<= 4; - if ('0' <= c3 && c3 <= '9') - b += c3 - '0'; - else if ('A' <= c3 && c3 <= 'F') - b += c3 - 'A' + 10; - else - yyerror ("Bad character in \\X construct in string"); - - *n ++ = (char) b; - str += 4; - new_len -= 3; - continue; - } - default: - { - *n ++ = *str ++; - continue; - } - } - else - *n ++ = *str ++; - - *n = '\0'; - return (new_str); -} - - -/* On a parse error, write out the current line and print a caret (^) - below the point at which the error occured. Also, reset the input - stream to the begining of the next line. */ - -char* -erroneous_line () -{ - int prefix_length = yytext - current_line; - int i, c; - str_stream ss; - - ss_init (&ss); - - if (current_line == NULL) return ss_to_string (&ss); - - /* Print part of line that has been consumed. */ - ss_printf (&ss, " "); - if (0 <= prefix_length) - { - /* yytext and current_line point to same line */ - c = *(current_line + prefix_length); - *(current_line + prefix_length) = '\0'; - ss_printf (&ss, "%s", current_line); - *(current_line + prefix_length) = (char)c; - ss_printf (&ss, "%s", yytext); - } - else - { - /* yytext and current_line point to different lines */ - ss_printf (&ss, "%s", current_line); - prefix_length = strlen(current_line); - } - - /* Flush the rest of the line (not consumed) from lex input. */ - if (*yytext != '\n') - { -#ifdef __cplusplus - while ((c = yyinput ()) != '\n' && c != EOF && c != 1) -#else - while ((c = input ()) != '\n' && c != EOF && c != 1) -#endif - { - ss_printf (&ss, "%c", c); - } - if (c == '\n') unput ('\n'); - current_line = NULL; - } - - /* Print marker to point at which consumption stopped. */ - ss_printf (&ss, "\n "); - for (i = 0; i < prefix_length; i ++) ss_printf (&ss, " "); - ss_printf (&ss, "^\n"); - - return ss_to_string (&ss); -} - - -static name_val_val keyword_tbl [] = { -#undef OP -#define OP(NAME, OPCODE, TYPE, R_OPCODE) {NAME, OPCODE, TYPE}, -#include "op.h" -}; - - -static int -check_keyword (char *id, int allow_pseudo_ops) -{ - name_val_val *entry = - map_string_to_name_val_val (keyword_tbl, - sizeof(keyword_tbl) / sizeof (name_val_val), - id); - if (entry == NULL) - return (0); - else if (!allow_pseudo_ops && entry->value2 == PSEUDO_OP) - return (0); - else - return (entry->value1); -} - - -static name_val_val register_tbl [] = { - {"a0", 4, 0}, - {"a1", 5, 0}, - {"a2", 6, 0}, - {"a3", 7, 0}, - {"at", 1, 0}, - {"fp", 30, 0}, - {"gp", 28, 0}, - {"k0", 26, 0}, - {"k1", 27, 0}, - {"kt0", 26, 0}, - {"kt1", 27, 0}, - {"ra", 31, 0}, - {"s0", 16, 0}, - {"s1", 17, 0}, - {"s2", 18, 0}, - {"s3", 19, 0}, - {"s4", 20, 0}, - {"s5", 21, 0}, - {"s6", 22, 0}, - {"s7", 23, 0}, - {"s8", 30, 0}, - {"sp", 29, 0}, - {"t0", 8, 0}, - {"t1", 9, 0}, - {"t2", 10, 0}, - {"t3", 11, 0}, - {"t4", 12, 0}, - {"t5", 13, 0}, - {"t6", 14, 0}, - {"t7", 15, 0}, - {"t8", 24, 0}, - {"t9", 25, 0}, - {"v0", 2, 0}, - {"v1", 3, 0}, - {"zero", 0, 0} -}; - -int -register_name_to_number (char *name) -{ - int c1 = *name, c2 = *(name + 1); - - if ('0' <= c1 && c1 <= '9' - && (c2 == '\0' || (('0' <= c2 && c2 <= '9') && *(name + 2) == '\0'))) - return (atoi (name)); - else if (c1 == 'f' && c2 >= '0' && c2 <= '9') - return atoi (name + 1); - else - { - name_val_val *entry = - map_string_to_name_val_val (register_tbl, - sizeof (register_tbl) / sizeof (name_val_val), - name); - if (entry == NULL) - return (-1); - else - return (entry->value1); - } -} - - -/* Exactly once, return the current source line, as a printable string - with a line number. Subsequent calls receive NULL instead of the - line. */ - -char * -source_line () -{ - if (line_returned) - return (NULL); - else if (current_line == NULL) /* Error on line */ - return (NULL); - else - { - char *eol1, c1; - char *null1 = NULL; - char *r; - - /* Find end of line: */ - for (eol1 = current_line; *eol1 != '\0' && *eol1 != '\n'; ) eol1 += 1; - -#ifdef FLEX_SCANNER - /* Ran into null byte, inserted by yylex. In necessary, look further - for newline. (This only works for scanners produced by flex. Other - versions of lex need similar code, or source code lines will end - early. */ - if (*eol1 == '\0' && yy_hold_char != '\n') - { - null1 = eol1; - *eol1 = yy_hold_char; - for ( ; *eol1 != '\0' && *eol1 != '\n'; ) - eol1 += 1; - } -#endif - - /* Save end-of-line character and null terminate string so it can - be printed. */ - c1 = *eol1; - *eol1 = '\0'; - - r = (char *) xmalloc (eol1 - current_line + 11 + file_name_len); - sprintf (r, "%s:%d: %s", file_name, current_line_no, current_line); - - /* Restore end-of-line character and, if necessary, yylex's null byte. */ - *eol1 = c1; - if (null1 != NULL) - { - *null1 = '\0'; - } - line_returned = 1; - return ((char *) r); - } -} diff --git a/spim-qtspimbot/CPU/spim-syscall.h b/spim-qtspimbot/CPU/spim-syscall.h deleted file mode 100644 index f350f07..0000000 --- a/spim-qtspimbot/CPU/spim-syscall.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPIM S20 MIPS simulator. - System calls implemented by simulator. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#define PRINT_INT_SYSCALL 1 -#define PRINT_FLOAT_SYSCALL 2 -#define PRINT_DOUBLE_SYSCALL 3 -#define PRINT_STRING_SYSCALL 4 -#define READ_INT_SYSCALL 5 -#define READ_FLOAT_SYSCALL 6 -#define READ_DOUBLE_SYSCALL 7 -#define READ_STRING_SYSCALL 8 -#define SBRK_SYSCALL 9 -#define EXIT_SYSCALL 10 -#define PRINT_CHARACTER_SYSCALL 11 -#define READ_CHARACTER_SYSCALL 12 - -#define OPEN_SYSCALL 13 -#define READ_SYSCALL 14 -#define WRITE_SYSCALL 15 -#define CLOSE_SYSCALL 16 - -#define EXIT2_SYSCALL 17 diff --git a/spim-qtspimbot/CPU/spim-utils.cpp b/spim-qtspimbot/CPU/spim-utils.cpp deleted file mode 100755 index 170cd6d..0000000 --- a/spim-qtspimbot/CPU/spim-utils.cpp +++ /dev/null @@ -1,658 +0,0 @@ -/* SPIM S20 MIPS simulator. - Misc. routines for SPIM. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include -#include -#include - -#include "spim.h" -#include "version.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "data.h" -#include "reg.h" -#include "mem.h" -#include "scanner.h" -#include "parser.h" -#include "parser_yacc.h" -#include "run.h" -#include "sym-tbl.h" - -#include "../Spimbot/robot.h" - -bkpt *bkpts = NULL; - -size_t num_contexts = 1; -size_t current_image = 0; -void set_current_image(size_t i) { current_image = i; } - -/* Internal functions: */ - -static mem_addr copy_int_to_stack (size_t context, int n); -static mem_addr copy_str_to_stack (size_t context, char *s); -static void delete_all_breakpoints (); - - -int exception_occurred; - -int initial_text_size = TEXT_SIZE; - -int initial_data_size = DATA_SIZE; - -mem_addr initial_data_limit = DATA_LIMIT; - -int initial_stack_size = STACK_SIZE; - -mem_addr initial_stack_limit = STACK_LIMIT; - -int initial_k_text_size = K_TEXT_SIZE; - -int initial_k_data_size = K_DATA_SIZE; - -mem_addr initial_k_data_limit = K_DATA_LIMIT; - - - -/* Initialize or reinitialize the state of the machine. */ - -void -initialize_world (size_t context, char* exception_file_paths, - char *exception_file_name, bool free_labels) -{ - reg_image_t ®_image = reg_images[context]; - reg_image.context = context; - reg_image.auto_alignment = 1; - - /* Allocate the floating point registers */ - if (reg_image.FGR == NULL) - reg_image.FPR = (double *) xmalloc (FPR_LENGTH * sizeof (double)); - /* Allocate the memory */ - make_memory (context, - initial_text_size, - initial_data_size, initial_data_limit, - initial_stack_size, initial_stack_limit, - initial_k_text_size, - initial_k_data_size, initial_k_data_limit); - initialize_registers (context); - initialize_inst_tables (); - initialize_symbol_table (free_labels); - k_text_begins_at_point (context, K_TEXT_BOT); - k_data_begins_at_point (context, K_DATA_BOT); - data_begins_at_point (context, DATA_BOT); - text_begins_at_point (context, TEXT_BOT); - - if (exception_file_paths != NULL) - { - bool old_bare = bare_machine; - bool old_accept = accept_pseudo_insts; - char *filename; - char *files; - - /* Save machine state */ - bare_machine = false; /* Exception handler uses extended machine */ - accept_pseudo_insts = true; - - /* strtok modifies the string, so we must back up the string prior to use. */ - if ((files = strdup (exception_file_paths)) == NULL) - fatal_error ("Insufficient memory to complete.\n"); - - for (filename = strtok (files, ";"); filename != NULL; filename = strtok (NULL, ";")) - { - /* if you pass in non-NULL second parameter, I assume one exception file */ - if (!read_assembly_file (filename, exception_file_name)) - fatal_error ("Cannot read exception handler: %s\n", filename); - - write_output (message_out, "Loaded: %s\n", filename); - } - - free (files); - - /* Restore machine state */ - bare_machine = old_bare; - accept_pseudo_insts = old_accept; - - if (!bare_machine) - { - (void)make_label_global ("main"); /* In case .globl main forgotten */ - (void)record_label ("main", 0, 0); - } - } - initialize_scanner (stdin, ""); - delete_all_breakpoints (); -} - - -void -write_startup_message () -{ - write_output (message_out, "SPIM %s\n", SPIM_VERSION); - write_output (message_out, "Copyright 1990-2017 by James Larus.\n"); - write_output (message_out, "All Rights Reserved.\n"); - write_output (message_out, "SPIM is distributed under a BSD license.\n"); - write_output (message_out, "See the file README for a full copyright notice.\n"); -} - - - -void -initialize_registers (size_t context) -{ - reg_image_t ®_image = reg_images[context]; - - memclr (reg_image.FPR, FPR_LENGTH * sizeof (double)); - reg_image.FGR = (float *) reg_image.FPR; - reg_image.FWR = (int *) reg_image.FPR; - - memclr (reg_image.R, R_LENGTH * sizeof (reg_word)); - reg_image.R[REG_SP] = STACK_TOP - BYTES_PER_WORD - 4096; /* Initialize $sp */ - reg_image.HI = reg_image.LO = 0; - reg_image.PC = TEXT_BOT; - - CP0_BadVAddr(reg_image) = 0; - CP0_Count(reg_image) = 0; - CP0_Compare(reg_image) = 0; - CP0_Status(reg_image) = (CP0_Status_CU & 0x30000000) | CP0_Status_IM | CP0_Status_UM; - CP0_Cause(reg_image) = 0; - CP0_EPC(reg_image) = 0; -#ifdef SPIM_BIGENDIAN - CP0_Config = CP0_Config_BE; -#else - CP0_Config(reg_image) = 0; -#endif - - FIR(reg_image) = FIR_W | FIR_D | FIR_S; /* Word, double, & single implemented */ - FCSR(reg_image) = 0x0; - FCCR(reg_image) = 0x0; - FEXR(reg_image) = 0x0; - FENR(reg_image) = 0x0; - - reg_image.RFE_cycle = 0; -} - - -/* Read file NAME, which should contain assembly code. Return true if - successful and false otherwise. */ - -bool -read_assembly_file (char *fpath, char *file_name) -{ - FILE *file = fopen (fpath, "rt"); - - if (file == NULL) - { - error ("Cannot open file: `%s'\n", fpath); - return false; - } - else - { - if (file_name == NULL) { - file_name = strrchr(fpath, '/'); - file_name = file_name == NULL ? fpath : file_name + 1; - } - initialize_scanner (file, file_name); - initialize_parser (fpath); - - while (!yyparse ()) ; - - fclose (file); - flush_local_labels (!parse_error_occurred); - end_of_assembly_file (); - return true; - } -} - - -mem_addr -starting_address () -{ - return (find_symbol_address (DEFAULT_RUN_LOCATION)); -} - - -#define MAX_ARGS 10000 - -/* Initialize the SPIM stack from a string containing the command line. */ - -void -initialize_stack(const char *command_line) -{ - int argc = 0; - char *argv[MAX_ARGS]; - char *a; - char *args = str_copy((char*)command_line); /* Destructively modify string */ - char *orig_args = args; - - while (*args != '\0') - { - /* Skip leading blanks */ - while (*args == ' ' || *args == '\t') args++; - - /* First non-blank char */ - a = args; - - /* Last non-blank, non-null char */ - while (*args != ' ' && *args != '\t' && *args != '\0') args++; - - /* Terminate word */ - if (a != args) - { - if (*args != '\0') - *args++ = '\0'; /* Null terminate */ - - argv[argc++] = a; - - if (MAX_ARGS == argc) - { - break; /* If too many, ignore rest of list */ - } - } - } - - initialize_run_stack (argc, argv); - free (orig_args); -} - - -/* Initialize the SPIM stack with ARGC, ARGV, and ENVP data. */ - -#ifdef _MSC_VER -#define environ _environ -#endif - -void -initialize_run_stack (int argc, char **argv) -{ - //FIXME: eventually run for both or neither - int context = 0; - reg_image_t ®_image = reg_images[context]; - - char **p; - extern char **environ; - int i, j = 0, env_j; - mem_addr addrs[10000]; - - - reg_image.R[REG_SP] = STACK_TOP - 1; /* Initialize $sp */ - - /* Put strings on stack: */ - /* env: */ - for (p = environ; *p != NULL; p++) - addrs[j++] = copy_str_to_stack (context, *p); - env_j = j; - - /* argv; */ - for (i = 0; i < argc; i++) - addrs[j++] = copy_str_to_stack (context, argv[i]); - - /* Align stack pointer for word-size data */ - reg_image.R[REG_SP] = reg_image.R[REG_SP] & ~3; /* Round down to nearest word */ - reg_image.R[REG_SP] -= BYTES_PER_WORD; /* First free word on stack */ - reg_image.R[REG_SP] = reg_image.R[REG_SP] & ~7; /* Double-word align stack-pointer*/ - - /* Build vectors on stack: */ - /* env: */ - (void)copy_int_to_stack (context, 0); /* Null-terminate vector */ - for (i = env_j - 1; i >= 0; i--) - reg_image.R[REG_A2] = copy_int_to_stack (context, addrs[i]); - - /* argv: */ - (void)copy_int_to_stack (context, 0); /* Null-terminate vector */ - for (i = j - 1; i >= env_j; i--) - reg_image.R[REG_A1] = copy_int_to_stack (context, addrs[i]); - - /* argc: */ - reg_image.R[REG_A0] = argc; - set_mem_word (context, reg_image.R[REG_SP], argc); /* Leave argc on stack */ -} - - -static mem_addr -copy_str_to_stack (size_t context, char *s) -{ - reg_image_t ®_image = reg_images[context]; - - int i = (int)strlen (s); - while (i >= 0) - { - set_mem_byte (context, reg_image.R[REG_SP], s[i]); - reg_image.R[REG_SP] -= 1; - i -= 1; - } - return ((mem_addr) reg_image.R[REG_SP] + 1); /* Leaves stack pointer byte-aligned!! */ -} - - -static mem_addr -copy_int_to_stack (size_t context, int n) -{ - reg_image_t ®_image = reg_images[context]; - - set_mem_word (context, reg_image.R[REG_SP], n); - reg_image.R[REG_SP] -= BYTES_PER_WORD; - return ((mem_addr) reg_image.R[REG_SP] + BYTES_PER_WORD); -} - - -/* Run the program, starting at PC, for STEPS instructions. Display each - instruction before executing if DISPLAY is true. If CONT_BKPT is - true, then step through a breakpoint. CONTINUABLE is true if - execution can continue. Return true if breakpoint is encountered. */ - -bool -run_program (int steps, bool display, bool cont_bkpt, bool* continuable) -{ - if (map_click && !spimbot_tournament) { - return true; - } - - for (int i = 0; i < steps; ++ i) { - for (size_t j = 0; j < num_contexts; ++ j) { - size_t context = (j + steps) % num_contexts; - set_current_image(context); - reg_image_t ®_image = reg_images[context]; - - if (context == 0 && inst_is_breakpoint (reg_image.PC)) { - if (cont_bkpt) { - mem_addr addr = reg_image.PC; - - delete_breakpoint (addr); - reg_image.exception_occurred = false; - run_spim (context, display); - add_breakpoint (addr); - } else { - return true; - } - } else { - if (!run_spim (context, display)) { - *continuable = false; - world_update(); - return false; - } - } - } - cont_bkpt = false; - int spimbot_break = world_update(); - if (spimbot_break >= 0) { - if (spimbot_break == 0) { - *continuable = false; - return false; - } - else if (spimbot_break == 1) { - return true; - } - } - - if (force_break) { - return false; - } - } - - return false; -} - - -/* Set a breakpoint at memory location ADDR. */ - -void -add_breakpoint (mem_addr addr) -{ - bkpt *rec = (bkpt *) xmalloc (sizeof (bkpt)); - - rec->next = bkpts; - rec->addr = addr; - - bkpts = rec; -} - - -/* Delete all breakpoints at memory location ADDR. */ - -void -delete_breakpoint (mem_addr addr) -{ - bkpt *p, *b; - int deleted_one = 0; - - for (p = NULL, b = bkpts; b != NULL; ) - if (b->addr == addr) - { - bkpt *n; - -// set_mem_inst (addr, b->inst); - if (p == NULL) - bkpts = b->next; - else - p->next = b->next; - n = b->next; - free (b); - b = n; - deleted_one = 1; - } - else - p = b, b = b->next; - if (!deleted_one) - error ("No breakpoint to delete at 0x%08x\n", addr); -} - - -static void -delete_all_breakpoints () -{ - bkpt *b, *n; - - for (b = bkpts, n = NULL; b != NULL; b = n) - { - n = b->next; - free (b); - } - bkpts = NULL; -} - - -/* List all breakpoints. */ - -void -list_breakpoints () -{ - bkpt *b; - - if (bkpts) - for (b = bkpts; b != NULL; b = b->next) - write_output (message_out, "Breakpoint at 0x%08x\n", b->addr); - else - write_output (message_out, "No breakpoints set\n"); -} - - - -/* Utility routines */ - - -/* Return the entry in the linear TABLE of length LENGTH with key STRING. - TABLE must be sorted on the key field. - Return NULL if no such entry exists. */ - -name_val_val * -map_string_to_name_val_val (name_val_val tbl[], int tbl_len, char *id) -{ - int low = 0; - int hi = tbl_len - 1; - - while (low <= hi) - { - int mid = (low + hi) / 2; - char *idp = id, *np = tbl[mid].name; - - while (*idp == *np && *idp != '\0') {idp ++; np ++;} - - if (*np == '\0' && *idp == '\0') /* End of both strings */ - return (& tbl[mid]); - else if (*idp > *np) - low = mid + 1; - else - hi = mid - 1; - } - - return NULL; -} - - -/* Return the entry in the linear TABLE of length LENGTH with VALUE1 field NUM. - TABLE must be sorted on the VALUE1 field. - Return NULL if no such entry exists. */ - -name_val_val * -map_int_to_name_val_val (name_val_val tbl[], int tbl_len, int num) -{ - int low = 0; - int hi = tbl_len - 1; - - while (low <= hi) - { - int mid = (low + hi) / 2; - - if (tbl[mid].value1 == num) - return (&tbl[mid]); - else if (num > tbl[mid].value1) - low = mid + 1; - else - hi = mid - 1; - } - - return NULL; -} - - -#ifdef NEED_VSPRINTF -char * -vsprintf (str, fmt, args) - char *str,*fmt; - va_list *args; -{ - FILE _strbuf; - - _strbuf._flag = _IOWRT+_IOSTRG; - _strbuf._ptr = str; - _strbuf._cnt = 32767; - _doprnt(fmt, args, &_strbuf); - putc('\0', &_strbuf); - return(str); -} -#endif - - -#ifdef NEED_STRTOL -unsigned long -strtol (const char* str, const char** eptr, int base) -{ - long result; - - if (base != 0 && base != 16) - fatal_error ("SPIM's strtol only works for base 16 (not base %d)\n", base); - if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X')) - { - str += 2; - sscanf (str, "%lx", &result); - } - else if (base == 16) - { - sscanf (str, "%lx", &result); - } - else - { - sscanf (str, "%ld", &result); - } - return (result); -} -#endif - - -#ifdef NEED_STRTOUL -unsigned long -strtoul (const char* str, char** eptr, int base) -{ - unsigned long result; - - if (base != 0 && base != 16) - fatal_error ("SPIM's strtoul only works for base 16 (not base %d)\n", base); - if (*str == '0' && (*(str + 1) == 'x' || *(str + 1) == 'X')) - { - str += 2; - sscanf (str, "%lx", &result); - } - else if (base == 16) - { - sscanf (str, "%lx", &result); - } - else - { - sscanf (str, "%ld", &result); - } - return (result); -} -#endif - - -char * -str_copy (char *str) -{ - return (strcpy ((char*)xmalloc ((int)strlen (str) + 1), str)); -} - - -void * -xmalloc (int size) -{ - void *x = (void *) malloc (size); - - if (x == 0) - fatal_error ("Out of memory at request for %d bytes.\n"); - return (x); -} - - -/* Allocate a zero'ed block of storage. */ - -void * -zmalloc (int size) -{ - void *z = (void *) malloc (size); - - if (z == 0) - fatal_error ("Out of memory at request for %d bytes.\n"); - - memclr (z, size); - return (z); -} diff --git a/spim-qtspimbot/CPU/spim-utils.h b/spim-qtspimbot/CPU/spim-utils.h deleted file mode 100755 index 762c339..0000000 --- a/spim-qtspimbot/CPU/spim-utils.h +++ /dev/null @@ -1,92 +0,0 @@ -/* SPIM S20 MIPS simulator. - Interface to misc. routines for SPIM. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef SPIM_UTILS_H -#define SPIM_UTILS_H - -#include "inst.h" - - -/* Triple containing a string and two integers. Used in tables - mapping from a name to values. */ - -typedef struct -{ - char *name; - int value1; - int value2; -} name_val_val; - -/* Record of where a breakpoint was placed and the instruction previously - in memory. */ - -typedef struct bkptrec -{ - mem_addr addr; - instruction *inst; - struct bkptrec *next; -} bkpt; - - -extern bkpt *bkpts; - -extern size_t num_contexts; - - -/* Exported functions: */ - -extern size_t current_image; -void set_current_image(size_t i); - -void add_breakpoint (mem_addr addr); -void delete_breakpoint (mem_addr addr); -void format_data_segs (str_stream *ss); -void format_insts (str_stream *ss, mem_addr from, mem_addr to); -void format_mem (str_stream *ss, mem_addr from, mem_addr to); -void format_registers (str_stream *ss, int print_gpr_hex, int print_fpr_hex); -void initialize_registers (size_t context); -void initialize_stack (const char *command_line); -void initialize_run_stack (int argc, char **argv); -void initialize_world (size_t context, char* exception_file_paths, - char *exception_file_name, bool free_labels); -void list_breakpoints (); -name_val_val *map_int_to_name_val_val (name_val_val tbl[], int tbl_len, int num); -name_val_val *map_string_to_name_val_val (name_val_val tbl[], int tbl_len, char *id); -bool read_assembly_file (char *fpath, char *file_name); -bool run_program (int steps, bool display, bool cont_bkpt, bool* continuable); -mem_addr starting_address (); -char *str_copy (char *str); -void write_startup_message (); -void *xmalloc (int); -void *zmalloc (int); - -#endif diff --git a/spim-qtspimbot/CPU/spim.h b/spim-qtspimbot/CPU/spim.h deleted file mode 100755 index d0c519b..0000000 --- a/spim-qtspimbot/CPU/spim.h +++ /dev/null @@ -1,267 +0,0 @@ -/* SPIM S20 MIPS simulator. - Definitions for the SPIM S20. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef SPIM_H -#define SPIM_H - -#ifndef NULL -#define NULL 0 -#endif - -/* This declaration must match the endianness of the machine SPIM is running on. You CANNOT - set SPIM to simulate a different endianness than the machine that executes it. Almost - every processor (notably the x86) is little endian today. If your machine is big endian, - define -DSPIM_BIGENDIAN in the Makefile. */ - -#ifndef SPIM_BIGENDIAN -#define SPIM_LITTLENDIAN -#endif - - -/* Type declarations for portability. They work for DEC's Alpha (64 bits) - and 32 bit machines */ - -typedef int int32; -typedef unsigned int uint32; -typedef union {int i; void* p;} intptr_union; - - -#define streq(s1, s2) !strcmp(s1, s2) - - -/* Round V to next greatest B boundary */ -#define ROUND_UP(V, B) (((int) V + (B-1)) & ~(B-1)) -#define ROUND_DOWN(V, B) (((int) V) & ~(B-1)) - -/* Sign-extend an int16 to an int32 */ -#define SIGN_EX(X) (((X) & 0x8000) ? ((X) | 0xffff0000) : (X)) - - -#ifdef MIN /* Some systems define these in system includes */ -#undef MIN -#endif -#ifdef MAX -#undef MAX -#endif -#define MIN(A, B) ((A) < (B) ? (A) : (B)) -#define MAX(A, B) ((A) > (B) ? (A) : (B)) - - -/* Useful and pervasive declarations: */ - -#ifdef NEED_MEM_FUNCTIONS -#define memcpy(T, F, S) bcopy((void*)F, (void*)T, S) -#define memclr(B, S) bzero(B, S) -#define memcmp(S1, S2, N) bcmp(S1, S2, N) -#else -#include -#define memclr(B, S) memset((void*)B, 0, S) -#endif - -#include -#include -#define QSORT_FUNC int(*)(const void *, const void *) - - - -#define K 1024 - - -/* Type of a memory address. Must be a 32-bit quantity to match MIPS. */ - -typedef uint32 /*@alt int @*/ mem_addr; - - -#define BYTES_PER_WORD 4 /* On the MIPS processor */ - - -/* Sizes of memory segments. */ - -/* Initial size of text segment. */ - -#ifndef TEXT_SIZE -#define TEXT_SIZE (256*K) /* 1/4 MB */ -#endif - -/* Initial size of k_text segment. */ - -#ifndef K_TEXT_SIZE -#define K_TEXT_SIZE (64*K) /* 64 KB */ -#endif - -/* The data segment must be larger than 64K since we immediate grab - 64K for the small data segment pointed to by $gp. The data segment is - expanded by an sbrk system call. */ - -/* Initial size of data segment. */ - -#ifndef DATA_SIZE -#define DATA_SIZE (256*K) /* 1/4 MB */ -#endif - -/* Maximum size of data segment. */ - -#ifndef DATA_LIMIT -#define DATA_LIMIT (16*K*K) /* 16 MB */ -#endif - -/* Initial size of k_data segment. */ - -#ifndef K_DATA_SIZE -#define K_DATA_SIZE (64*K) /* 64 KB */ -#endif - -/* Maximum size of k_data segment. */ - -#ifndef K_DATA_LIMIT -#define K_DATA_LIMIT (K*K) /* 1 MB */ -#endif - -/* The stack grows down automatically. */ - -/* Initial size of stack segment. */ - -#ifndef STACK_SIZE -#define STACK_SIZE (64*K) /* 64 KB */ -#endif - -/* Maximum size of stack segment. */ - -#ifndef STACK_LIMIT -#define STACK_LIMIT (256*K) /* 1/4 MB */ -#endif - - -/* Name of the function to invoke at start up */ - -#define DEFAULT_RUN_LOCATION "__start" - - -/* Name of the symbol marking the end of the exception handler */ - -#define END_OF_TRAP_HANDLER_SYMBOL "__eoth" - - -/* Default number of instructions to execute. */ - -#define DEFAULT_RUN_STEPS 2147483647 - - -/* Address to branch to when exception occurs */ -#ifdef MIPS1 -/* MIPS R2000 */ -#define EXCEPTION_ADDR 0x80000080 -#else -/* MIPS32 */ -#define EXCEPTION_ADDR 0x80000180 -#endif - -/* Maximum size of object stored in the small data segment pointed to by $gp */ - -#define SMALL_DATA_SEG_MAX_SIZE 8 - -#ifndef DIRECT_MAPPED -#define DIRECT_MAPPED 0 -#define TWO_WAY_SET 1 -#endif - - -/* Interval (in instructions) at which memory-mapped IO registers are - checked and updated. (This is to reduce overhead from making system calls - to check for IO. It can be set as low as 1.) */ - -#define IO_INTERVAL 100 - - -/* Number of IO_INTERVALs that a character remains in receiver buffer, - even if another character is available. */ - -#define RECV_INTERVAL 100 - - -/* Number of IO_INTERVALs that it takes to write a character. */ - -#define TRANS_LATENCY 100 - - -/* Iterval (milliseconds) for the hardware timer in CP0. */ - -#define TIMER_TICK_MS 10 /* 100 times per second */ - - - -/* A port is either a Unix file descriptor (an int) or a FILE* pointer. */ - -#include - -typedef union {int i; FILE* f;} port; - - -/* Exported functions (from spim.c or xspim.c): */ - -int console_input_available (); -void error (char *fmt, ...); -void fatal_error (char *fmt, ...); -char get_console_char (); -void put_console_char (char c); -void read_input (char *str, int n); -void run_error (char *fmt, ...); -void write_output (port, char *fmt, ...); - - -/* Exported variables: */ - -extern bool bare_machine; /* => simulate bare machine */ -extern bool accept_pseudo_insts; /* => parse pseudo instructions */ -extern bool delayed_branches; /* => simulate delayed branches */ -extern bool delayed_loads; /* => simulate delayed loads */ -extern bool quiet; /* => no warning messages */ -extern char *exception_file_name; /* File containing exception handler */ -extern bool force_break; /* => stop interpreter loop */ -extern bool parser_error_occurred; /* => parse resulted in error */ -extern int spim_return_value; /* Value returned when spim exits */ -/* Actual type of structure pointed to depends on X/terminal interface */ -extern port message_out, console_out, console_in; -extern bool mapped_io; /* => activate memory-mapped IO */ -extern int initial_text_size; -extern int initial_data_size; -extern mem_addr initial_data_limit; -extern int initial_stack_size; -extern mem_addr initial_stack_limit; -extern int initial_k_text_size; -extern int initial_k_data_size; -extern mem_addr initial_k_data_limit; - -/* SpimBOT stuff */ -extern bool map_click; - -#endif diff --git a/spim-qtspimbot/CPU/string-stream.cpp b/spim-qtspimbot/CPU/string-stream.cpp deleted file mode 100755 index a083247..0000000 --- a/spim-qtspimbot/CPU/string-stream.cpp +++ /dev/null @@ -1,142 +0,0 @@ -/* SPIM S20 MIPS simulator. - Append-only output stream convertable to a string. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include -#include -#include - -#include "spim.h" -#include "string-stream.h" - - -#ifndef SS_BUF_LENGTH -/* Initialize length of buffer */ -#define SS_BUF_LENGTH 256 -#endif - - -void -ss_init (str_stream* ss) -{ - ss->buf = (char *) malloc (SS_BUF_LENGTH); - ss->max_length = SS_BUF_LENGTH; - ss->empty_pos = 0; - ss->initialized = 1; -} - - -void -ss_clear (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - ss->empty_pos = 0; -} - - -void -ss_erase (str_stream* ss, int n) -{ - if (0 == ss->initialized) ss_init (ss); - - ss->empty_pos -= n; - if (ss->empty_pos <0) ss->empty_pos = 0; -} - - -int -ss_length (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - return ss->empty_pos; -} - - -char* -ss_to_string (str_stream* ss) -{ - if (0 == ss->initialized) ss_init (ss); - - if (ss->empty_pos == ss->max_length) - { - /* Not enough room to store output: increase buffer size and try again */ - ss->max_length = ss->max_length + 1; - ss->buf = (char *) realloc (ss->buf, (size_t)ss->max_length); - if (NULL == ss->buf) - fatal_error ("realloc failed\n"); - } - ss->buf[ss->empty_pos] = '\0'; /* Null terminate string */ - ss->empty_pos += 1; - return ss->buf; -} - - -void -ss_printf (str_stream* ss, char* fmt, ...) -{ - int free_space; - int n; - va_list args; - - va_start (args, fmt); - - if (0 == ss->initialized) ss_init (ss); - - free_space = ss->max_length - ss->empty_pos; -#ifdef _WIN32 - /* Returns -1 when buffer is too small */ - while ((n = _vsnprintf (ss->buf + ss->empty_pos, free_space, fmt, args)) < 0) -#else - /* Returns necessary space when buffer is too small */ - while ((n = vsnprintf (ss->buf + ss->empty_pos, free_space, fmt, args)) >= free_space) -#endif - { - /* Not enough room to store output: double buffer size and try again */ - ss->max_length = 2 * ss->max_length; - ss->buf = (char *) realloc (ss->buf, (size_t)ss->max_length); - free_space = ss->max_length - ss->empty_pos; - if (NULL == ss->buf) - fatal_error ("realloc failed\n"); - - va_end (args); /* Restart argument pointer */ - va_start (args, fmt); - } - ss->empty_pos += n; - - /* Null terminate string (for debugging) if there is enough room*/ - if (ss->empty_pos < ss->max_length) - ss->buf[ss->empty_pos] = '\0'; - - va_end (args); -} diff --git a/spim-qtspimbot/CPU/string-stream.h b/spim-qtspimbot/CPU/string-stream.h deleted file mode 100755 index 6121d1a..0000000 --- a/spim-qtspimbot/CPU/string-stream.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPIM S20 MIPS simulator. - Append-only output stream convertable to a string. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - -#ifndef STRING_STREAM_H -#define STRING_STREAM_H - -typedef struct str_stm -{ - char* buf; /* Buffer containing output */ - int max_length; /* Length of buffer */ - int empty_pos; /* Index of empty char in stream*/ - int initialized; /* Stream initialized? */ -} str_stream; - - -void ss_init (str_stream* ss); -void ss_clear (str_stream* ss); -void ss_erase (str_stream* ss, int n); -int ss_length (str_stream* ss); -char* ss_to_string (str_stream* ss); -void ss_printf (str_stream* ss, char* fmt, ...); - -#endif diff --git a/spim-qtspimbot/CPU/sym-tbl.cpp b/spim-qtspimbot/CPU/sym-tbl.cpp deleted file mode 100755 index d899b51..0000000 --- a/spim-qtspimbot/CPU/sym-tbl.cpp +++ /dev/null @@ -1,522 +0,0 @@ -/* SPIM S20 MIPS simulator. - Code to maintain symbol table to resolve symbolic labels. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "data.h" -#include "parser.h" -#include "sym-tbl.h" -#include "parser_yacc.h" - - -/* Local functions: */ - -static void get_hash (char *name, int *slot_no, label **entry); -static void resolve_a_label_sub (label *sym, instruction *inst, mem_addr pc); - - - -/* Keep track of the memory location that a label represents. If we - see a reference to a label that is not yet defined, then record the - reference so that we can patch up the instruction when the label is - defined. - - At the end of a file, we flush the hash table of all non-global - labels so they can't be seen in other files. */ - - -static label *local_labels = NULL; /* Labels local to current file. */ - - -#define HASHBITS 30 - -#define LABEL_HASH_TABLE_SIZE 8191 - - -/* Map from name of a label to a label structure. */ - -static label *label_hash_table [LABEL_HASH_TABLE_SIZE]; - - -/* Initialize the symbol table by removing and freeing old entries. */ - -void -initialize_symbol_table (bool free_labels) -{ - int i; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - { - label *x, *n; - - for (x = label_hash_table [i]; x != NULL; x = n) - { - if (free_labels) { - free (x->name); - } - n = x->next; - if (free_labels) { - free (x); - } - } - label_hash_table [i] = NULL; - } - - local_labels = NULL; -} - - - -/* Lookup for a label with the given NAME. Set the SLOT_NO to be the hash - table bucket that contains (or would contain) the label's record. If the - record is already in the table, set ENTRY to point to it. Otherwise, - set ENTRY to be NULL. */ - -static void -get_hash (char *name, int *slot_no, label **entry) -{ - int hi; - int i; - label *lab; - int len; - - /* Compute length of name in len. */ - for (len = 0; name[len]; len++) ; - - /* Compute hash code */ - hi = len; - for (i = 0; i < len; i++) - hi = ((hi * 613) + (unsigned)(name[i])); - - hi &= (1 << HASHBITS) - 1; - hi %= LABEL_HASH_TABLE_SIZE; - - *slot_no = hi; - /* Search table for entry */ - for (lab = label_hash_table [hi]; lab; lab = lab->next) - if (streq (lab->name, name)) - { - *entry = lab; /* <-- return if found */ - return; - } - *entry = NULL; -} - - -/* Lookup label with NAME. Either return its symbol table entry or NULL - if it is not in the table. */ - -label * -label_is_defined (char *name) -{ - int hi; - label *entry; - - get_hash (name, &hi, &entry); - - return (entry); -} - - -/* Return a label with a given NAME. If an label with that name has - previously been looked-up, the same node is returned this time. */ - -label * -lookup_label (char *name) -{ - int hi; - label *entry, *lab; - - get_hash (name, &hi, &entry); - - if (entry != NULL) - return (entry); - - /* Not found, create one, add to chain */ - lab = (label *) xmalloc (sizeof (label)); - lab->name = str_copy (name); - lab->addr = 0; - lab->global_flag = 0; - lab->const_flag = 0; - lab->gp_flag = 0; - lab->uses = NULL; - - lab->next = label_hash_table [hi]; - label_hash_table [hi] = lab; - return lab; /* <-- return if created */ -} - - -/* Record that the label named NAME refers to ADDRESS. If RESOLVE_USES is - true, resolve all references to it. Return the label structure. */ - -label * -record_label (char *name, mem_addr address, int resolve_uses) -{ - label *l = lookup_label (name); - - if (!l->gp_flag) - { - if (l->addr != 0) - { - yyerror ("Label is defined for the second time"); - return (l); - } - l->addr = address; - } - - if (resolve_uses) - { - resolve_label_uses (l); - } - - if (!l->global_flag) - { - l->next_local = local_labels; - local_labels = l; - } - return (l); -} - - -/* Make the label named NAME global. Return its symbol. */ - -label * -make_label_global (char *name) -{ - label *l = lookup_label (name); - - l->global_flag = 1; - return (l); -} - - -/* Record that an INSTRUCTION uses the as-yet undefined SYMBOL. */ - -void -record_inst_uses_symbol (instruction *inst, label *sym) -{ - label_use *u = (label_use *) xmalloc (sizeof (label_use)); - - if (data_dir) /* Want to free up original instruction */ - { - u->inst = copy_inst (inst); - u->addr = current_data_pc (); - } - else - { - u->inst = inst; - u->addr = current_text_pc (); - } - u->next = sym->uses; - sym->uses = u; -} - - -/* Record that a memory LOCATION uses the as-yet undefined SYMBOL. */ - -void -record_data_uses_symbol (mem_addr location, label *sym) -{ - label_use *u = (label_use *) xmalloc (sizeof (label_use)); - - u->inst = NULL; - u->addr = location; - u->next = sym->uses; - sym->uses = u; -} - - -/* Given a newly-defined LABEL, resolve the previously encountered - instructions and data locations that refer to the label. */ - -void -resolve_label_uses (label *sym) -{ - label_use *use; - label_use *next_use; - - for (use = sym->uses; use != NULL; use = next_use) - { - resolve_a_label_sub (sym, use->inst, use->addr); - if (use->inst != NULL && use->addr >= DATA_BOT && use->addr < mem_images[current_image].stack_bot) - { - set_mem_word (current_image, use->addr, inst_encode (use->inst)); - free_inst (use->inst); - } - next_use = use->next; - free (use); - } - sym->uses = NULL; -} - - -/* Resolve the newly-defined label in INSTRUCTION. */ - -void -resolve_a_label (label *sym, instruction *inst) -{ - resolve_a_label_sub (sym, - inst, - (data_dir ? current_data_pc () : current_text_pc ())); -} - - -static void -resolve_a_label_sub (label *sym, instruction *inst, mem_addr pc) -{ - if (inst == NULL) - { - /* Memory data: */ - set_mem_word (current_image, pc, sym->addr); - } - else - { - /* Instruction: */ - if (EXPR (inst)->pc_relative) - EXPR (inst)->offset = 0 - pc; /* Instruction may have moved */ - - if (EXPR (inst)->symbol == NULL - || SYMBOL_IS_DEFINED (EXPR (inst)->symbol)) - { - int32 value; - int32 field_mask; - - if (opcode_is_branch (OPCODE (inst))) - { - int val; - - /* Drop low two bits since instructions are on word boundaries. */ - val = SIGN_EX (eval_imm_expr (EXPR (inst))); /* 16->32 bits */ - val = (val >> 2) & 0xffff; /* right shift, 32->16 bits */ - - if (delayed_branches) - val -= 1; - - value = val; - field_mask = 0xffff; - } - else if (opcode_is_jump (OPCODE (inst))) - { - value = eval_imm_expr (EXPR (inst)); - if ((value & 0xf0000000) != (pc & 0xf0000000)) - { - error ("Target of jump differs in high-order 4 bits from instruction pc 0x%x\n", pc); - } - /* Drop high four bits, since they come from the PC and the - low two bits since instructions are on word boundaries. */ - value = (value & 0x0fffffff) >> 2; - field_mask = 0xffffffff; /* Already checked that value fits in instruction */ - } - else if (opcode_is_load_store (OPCODE (inst))) - { - /* Label's location is an address */ - value = eval_imm_expr (EXPR (inst)); - field_mask = 0xffff; - - if (value & 0x8000) - { - /* LW/SW sign extends offset. Compensate by adding 1 to high 16 bits. */ - instruction* prev_inst; - instruction* prev_prev_inst; - prev_inst = read_mem_inst (current_image, pc - BYTES_PER_WORD); - prev_prev_inst = read_mem_inst (current_image, pc - 2 * BYTES_PER_WORD); - - if (prev_inst != NULL - && OPCODE (prev_inst) == Y_LUI_OP - && EXPR (inst)->symbol == EXPR (prev_inst)->symbol - && IMM (prev_inst) == 0) - { - /* Check that previous instruction was LUI and it has no immediate, - otherwise it will have compensated for sign-extension */ - EXPR (prev_inst)->offset += 0x10000; - } - /* There is an ADDU instruction before the LUI if the - LW/SW instruction uses an index register: skip over the ADDU. */ - else if (prev_prev_inst != NULL - && OPCODE (prev_prev_inst) == Y_LUI_OP - && EXPR (inst)->symbol == EXPR (prev_prev_inst)->symbol - && IMM (prev_prev_inst) == 0) - { - EXPR (prev_prev_inst)->offset += 0x10000; - } - } - } - else - { - /* Label's location is a value */ - value = eval_imm_expr (EXPR (inst)); - field_mask = 0xffff; - } - - if ((value & ~field_mask) != (int32)0 - && (value & ~field_mask) != (int32)0xffff0000) - { - error ("Immediate value is too large for field: "); - print_inst (pc); - } - if (opcode_is_jump (OPCODE (inst))) - SET_TARGET (inst, value); /* Don't mask so it is sign-extended */ - else - SET_IMM (inst, value); /* Ditto */ - SET_ENCODING (inst, inst_encode (inst)); - } - else - error ("Resolving undefined symbol: %s\n", - (EXPR (inst)->symbol == NULL) ? "" : EXPR (inst)->symbol->name); - } -} - - -/* Remove all local (non-global) label from the table. */ - -void -flush_local_labels (int issue_undef_warnings) -{ - label *l; - - for (l = local_labels; l != NULL; l = l->next_local) - { - int hi; - label *entry, *lab, *p; - - get_hash (l->name, &hi, &entry); - - for (lab = label_hash_table [hi], p = NULL; - lab; - p = lab, lab = lab->next) - if (lab == entry) - { - if (p == NULL) - label_hash_table [hi] = lab->next; - else - p->next = lab->next; - if (issue_undef_warnings && entry->addr == 0 && !entry->const_flag) - error ("Warning: local symbol %s was not defined\n", - entry->name); - /* Can't free label since IMM_EXPR's still reference it */ - break; - } - } - local_labels = NULL; -} - - -/* Return the address of SYMBOL or 0 if it is undefined. */ - -mem_addr -find_symbol_address (char *symbol) -{ - label *l = lookup_label (symbol); - - if (l == NULL || l->addr == 0) - return 0; - else - return (l->addr); -} - - -/* Print all symbols in the table. */ - -void -print_symbols () -{ - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table [i]; l != NULL; l = l->next) - write_output (message_out, "%s%s at 0x%08x\n", - l->global_flag ? "g\t" : "\t", l->name, l->addr); -} - - -/* Print all undefined symbols in the table. */ - -void -print_undefined_symbols () -{ - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table [i]; l != NULL; l = l->next) - if (l->addr == 0) - write_output (message_out, "%s\n", l->name); -} - - -/* Return a string containing the names of all undefined symbols in the - table, seperated by a newline character. Return NULL if no symbols - are undefined. */ - -char * -undefined_symbol_string () -{ - int buffer_length = 128; - int string_length = 0; - char *buffer = (char*)malloc(buffer_length); - - int i; - label *l; - - for (i = 0; i < LABEL_HASH_TABLE_SIZE; i ++) - for (l = label_hash_table[i]; l != NULL; l = l->next) - if (l->addr == 0) - { - int name_length = (int)strlen(l->name); - int after_length = string_length + name_length + 2; - if (buffer_length < after_length) - { - buffer_length = MAX (2 * buffer_length, 2 * after_length); - buffer = (char*)realloc (buffer, buffer_length); - } - memcpy (buffer + string_length, l->name, name_length); - string_length += name_length; - buffer[string_length] = '\n'; - string_length += 1; - buffer[string_length] = '\0'; /* After end of string */ - } - - if (string_length != 0) - return (buffer); - else - { - free (buffer); - return (NULL); - }; -} diff --git a/spim-qtspimbot/CPU/sym-tbl.h b/spim-qtspimbot/CPU/sym-tbl.h deleted file mode 100755 index 402de7c..0000000 --- a/spim-qtspimbot/CPU/sym-tbl.h +++ /dev/null @@ -1,76 +0,0 @@ -/* SPIM S20 MIPS simulator. - Data structures for symbolic addresses. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -typedef struct lab_use -{ - instruction *inst; /* NULL => Data, not code */ - mem_addr addr; - struct lab_use *next; -} label_use; - - -/* Symbol table information on a label. */ - -typedef struct lab -{ - char *name; /* Name of label */ - long addr; /* Address of label or 0 if not yet defined */ - unsigned global_flag : 1; /* Non-zero => declared global */ - unsigned gp_flag : 1; /* Non-zero => referenced off gp */ - unsigned const_flag : 1; /* Non-zero => constant value (in addr) */ - struct lab *next; /* Hash table link */ - struct lab *next_local; /* Link in list of local labels */ - label_use *uses; /* List of instructions that reference */ -} label; /* label that has not yet been defined */ - - -#define SYMBOL_IS_DEFINED(SYM) ((SYM)->addr != 0) - - - -/* Exported functions: */ - -mem_addr find_symbol_address (char *symbol); -void flush_local_labels (int issue_undef_warnings); -void initialize_symbol_table (bool free_labels); -label *label_is_defined (char *name); -label *lookup_label (char *name); -label *make_label_global (char *name); -void print_symbols (); -void print_undefined_symbols (); -label *record_label (char *name, mem_addr address, int resolve_uses); -void record_data_uses_symbol (mem_addr location, label *sym); -void record_inst_uses_symbol (instruction *inst, label *sym); -char *undefined_symbol_string (); -void resolve_a_label (label *sym, instruction *inst); -void resolve_label_uses (label *sym); diff --git a/spim-qtspimbot/CPU/syscall.cpp b/spim-qtspimbot/CPU/syscall.cpp deleted file mode 100755 index 1577a6b..0000000 --- a/spim-qtspimbot/CPU/syscall.cpp +++ /dev/null @@ -1,373 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM syscalls, both in simulator and bare mode. - Execute MIPS syscalls in bare mode, when running on MIPS systems. - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef _WIN32 -#include -#endif -#include -#include -#include -#include -#include - -#ifdef _WIN32 -#include -#endif - -#include "spim.h" -#include "string-stream.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "sym-tbl.h" -#include "syscall.h" - -#include "../Spimbot/robot.h" - -#ifdef _WIN32 -/* Windows has an handler that is invoked when an invalid argument is passed to a system - call. https://msdn.microsoft.com/en-us/library/a9yf33zb(v=vs.110).aspx - - All good, except that the handler tries to invoke Watson and then kill spim with an exception. - - Override the handler to just report an error. -*/ - -#include -#include -#include - -void myInvalidParameterHandler(const wchar_t* expression, - const wchar_t* function, - const wchar_t* file, - unsigned int line, - uintptr_t pReserved) -{ - if (function != NULL) - { - run_error ("Bad parameter to system call: %s\n", function); - } - else - { - run_error ("Bad parameter to system call\n"); - } -} - -static _invalid_parameter_handler oldHandler; - -void windowsParameterHandlingControl(int flag ) -{ - static _invalid_parameter_handler oldHandler; - static _invalid_parameter_handler newHandler = myInvalidParameterHandler; - - if (flag == 0) - { - oldHandler = _set_invalid_parameter_handler(newHandler); - _CrtSetReportMode(_CRT_ASSERT, 0); // Disable the message box for assertions. - } - else - { - newHandler = _set_invalid_parameter_handler(oldHandler); - _CrtSetReportMode(_CRT_ASSERT, 1); // Enable the message box for assertions. - } -} -#endif - -/* The address of the last exception. Different from EPC - * if one exception occurs inside another or an interrupt. */ -mem_addr last_exception_addr; - - -/* Decides which syscall to execute or simulate. Returns zero upon - exit syscall and non-zero to continue execution. */ - -int -do_syscall (size_t context) -{ -#ifdef _WIN32 - windowsParameterHandlingControl(0); -#endif - - if (spimbot_tournament) - return 1; - - reg_image_t ®_image = reg_images[context]; - mem_image_t &mem_image = mem_images[context]; - - /* Syscalls for the source-language version of SPIM. These are easier to - use than the real syscall and are portable to non-MIPS operating - systems. */ - - switch (reg_image.R[REG_V0]) - { - case PRINT_INT_SYSCALL: - write_output (console_out, "%d", reg_image.R[REG_A0]); - break; - - case PRINT_FLOAT_SYSCALL: - { - float val = FPR_S (reg_image, REG_FA0); - - write_output (console_out, "%.8f", val); - break; - } - - case PRINT_DOUBLE_SYSCALL: - write_output (console_out, "%.18g", reg_image.FPR[REG_FA0 / 2]); - break; - - case PRINT_STRING_SYSCALL: - write_output (console_out, "%s", mem_reference (context, reg_image.R[REG_A0])); - break; - - case READ_INT_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - reg_image.R[REG_RES] = atol (str); - break; - } - - case READ_FLOAT_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - FPR_S (reg_image, REG_FRES) = (float) atof (str); - break; - } - - case READ_DOUBLE_SYSCALL: - { - static char str [256]; - - read_input (str, 256); - reg_image.FPR [REG_FRES] = atof (str); - break; - } - - case READ_STRING_SYSCALL: - { - read_input ( (char *) mem_reference (context, reg_image.R[REG_A0]), reg_image.R[REG_A1]); - mem_image.data_modified = true; - break; - } - - case SBRK_SYSCALL: - { - mem_addr x = mem_image.data_top; - expand_data (context, reg_image.R[REG_A0]); - reg_image.R[REG_RES] = x; - mem_image.data_modified = true; - break; - } - - case PRINT_CHARACTER_SYSCALL: - write_output (console_out, "%c", reg_image.R[REG_A0]); - break; - - case READ_CHARACTER_SYSCALL: - { - static char str [2]; - - read_input (str, 2); - if (*str == '\0') *str = '\n'; /* makes xspim = spim */ - reg_image.R[REG_RES] = (long) str[0]; - break; - } - - case EXIT_SYSCALL: - spim_return_value = 0; - return (0); - - case EXIT2_SYSCALL: - spim_return_value = reg_image.R[REG_A0]; /* value passed to spim's exit() call */ - return (0); - - case OPEN_SYSCALL: - { - if (spimbot_file_io_enabled) { -#ifdef _WIN32 - reg_image.R[REG_RES] = _open((char*)mem_reference (context, reg_image.R[REG_A0]), reg_image.R[REG_A1], reg_image.R[REG_A2]); -#else - reg_image.R[REG_RES] = open((char*)mem_reference (context, reg_image.R[REG_A0]), reg_image.R[REG_A1], reg_image.R[REG_A2]); -#endif - } else if (spimbot_debug) { - printf("Bot: %zu Failed use syscall open since File IO is disabled.\n", context); - } - break; - } - - case READ_SYSCALL: - { - if (spimbot_file_io_enabled) { - /* Test if address is valid */ - (void)mem_reference (context, reg_image.R[REG_A1] + reg_image.R[REG_A2] - 1); -#ifdef _WIN32 - reg_image.R[REG_RES] = _read(reg_image.R[REG_A0], mem_reference (context, reg_image.R[REG_A1]), reg_image.R[REG_A2]); -#else - reg_image.R[REG_RES] = read(reg_image.R[REG_A0], mem_reference (context, reg_image.R[REG_A1]), reg_image.R[REG_A2]); -#endif - mem_image.data_modified = true; - } else if (spimbot_debug) { - printf("Bot: %zu Failed use syscall read since File IO is disabled.\n", context); - } - break; - } - - case WRITE_SYSCALL: - { - if (spimbot_file_io_enabled) { - /* Test if address is valid */ - (void)mem_reference (context, reg_image.R[REG_A1] + reg_image.R[REG_A2] - 1); -#ifdef _WIN32 - reg_image.R[REG_RES] = _write(reg_image.R[REG_A0], mem_reference (context, reg_image.R[REG_A1]), reg_image.R[REG_A2]); -#else - reg_image.R[REG_RES] = write(reg_image.R[REG_A0], mem_reference (context, reg_image.R[REG_A1]), reg_image.R[REG_A2]); -#endif - } else if (spimbot_debug) { - printf("Bot: %zu Failed use syscall write since File IO is disabled.\n", context); - } - break; - } - - case CLOSE_SYSCALL: - { - if (spimbot_file_io_enabled) { -#ifdef _WIN32 - reg_image.R[REG_RES] = _close(reg_image.R[REG_A0]); -#else - reg_image.R[REG_RES] = close(reg_image.R[REG_A0]); -#endif - } else if (spimbot_debug) { - printf("Bot: %zu Failed use syscall close since File IO is disabled.\n", context); - } - break; - } - - case PRINT_HEX_SYSCALL: - write_output (console_out, "%x", reg_image.R[REG_A0]); - break; - - default: - run_error ("Unknown system call: %d\n", reg_image.R[REG_V0]); - break; - } - -#ifdef _WIN32 - windowsParameterHandlingControl(1); -#endif - return (1); -} - - -void -handle_exception (reg_image_t ®_image) -{ - if (spimbot_tournament && CP0_ExCode(reg_image) != ExcCode_Int) { - robots[reg_image.context].done = 1; - return; - } - - if (!quiet && CP0_ExCode(reg_image) != ExcCode_Int) - error ("Exception occurred at PC=0x%08x\n", last_exception_addr); - - reg_image.exception_occurred = 0; - reg_image.PC = EXCEPTION_ADDR; - - switch (CP0_ExCode(reg_image)) - { - case ExcCode_Int: - break; - - case ExcCode_AdEL: - if (!quiet) - error (" Unaligned address in inst/data fetch: 0x%08x\n", CP0_BadVAddr(reg_image)); - break; - - case ExcCode_AdES: - if (!quiet) - error (" Unaligned address in store: 0x%08x\n", CP0_BadVAddr(reg_image)); - break; - - case ExcCode_IBE: - if (!quiet) - error (" Bad address in text read: 0x%08x\n", CP0_BadVAddr(reg_image)); - break; - - case ExcCode_DBE: - if (!quiet) - error (" Bad address in data/stack read: 0x%08x\n", CP0_BadVAddr(reg_image)); - break; - - case ExcCode_Sys: - if (!quiet) - error (" Error in syscall\n"); - break; - - case ExcCode_Bp: - reg_image.exception_occurred = 0; - return; - - case ExcCode_RI: - if (!quiet) - error (" Reserved instruction execution\n"); - break; - - case ExcCode_CpU: - if (!quiet) - error (" Coprocessor unuable\n"); - break; - - case ExcCode_Ov: - if (!quiet) - error (" Arithmetic overflow\n"); - break; - - case ExcCode_Tr: - if (!quiet) - error (" Trap\n"); - break; - - case ExcCode_FPE: - if (!quiet) - error (" Floating point\n"); - break; - - default: - if (!quiet) - error ("Unknown exception: %d\n", CP0_ExCode(reg_image)); - break; - } -} diff --git a/spim-qtspimbot/CPU/syscall.h b/spim-qtspimbot/CPU/syscall.h deleted file mode 100755 index 6a5c149..0000000 --- a/spim-qtspimbot/CPU/syscall.h +++ /dev/null @@ -1,66 +0,0 @@ -/* SPIM S20 MIPS simulator. - Execute SPIM syscalls, both in simulator and bare mode. - - Copyright (c) 1990-2010, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -/* Exported functions. */ - -int do_syscall (size_t context); -void handle_exception (reg_image_t ®_image); - -#define PRINT_INT_SYSCALL 1 -#define PRINT_FLOAT_SYSCALL 2 -#define PRINT_DOUBLE_SYSCALL 3 -#define PRINT_STRING_SYSCALL 4 - -#define READ_INT_SYSCALL 5 -#define READ_FLOAT_SYSCALL 6 -#define READ_DOUBLE_SYSCALL 7 -#define READ_STRING_SYSCALL 8 - -#define SBRK_SYSCALL 9 - -#define EXIT_SYSCALL 10 - -#define PRINT_CHARACTER_SYSCALL 11 -#define READ_CHARACTER_SYSCALL 12 - -#define OPEN_SYSCALL 13 -#define READ_SYSCALL 14 -#define WRITE_SYSCALL 15 -#define CLOSE_SYSCALL 16 - -#define EXIT2_SYSCALL 17 - -#define PRINT_HEX_SYSCALL 34 - -/* Exported variables. */ -extern mem_addr last_exception_addr; diff --git a/spim-qtspimbot/CPU/vasm.cpp b/spim-qtspimbot/CPU/vasm.cpp deleted file mode 100644 index 0cf74ba..0000000 --- a/spim-qtspimbot/CPU/vasm.cpp +++ /dev/null @@ -1,162 +0,0 @@ -#include - -#include "spim.h" -#include "string-stream.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "data.h" -#include "vasm.h" - -namespace -{ -/** - * @brief Forward iterator for encoded instructions - */ -class inst_iterator -{ -public: - inst_iterator() - { - // empty - } - - inst_iterator(mem_addr addr) : addr(addr) - { - // empty - } - - mem_word operator*() const - { - instruction * inst = read_mem_inst(0, addr); - return inst_encode(inst, true); - } - - bool operator==(const inst_iterator & other) const - { - return addr == other.addr; - } - - bool operator!=(const inst_iterator & other) const - { - return !(*this == other); - } - - inst_iterator & operator++() - { - addr += 4; - return *this; - } - - inst_iterator operator++(int) - { - inst_iterator temp(*this); - ++*this; - return temp; - } - - mem_word word_addr() - { - return (addr - TEXT_BOT) >> 2; - } - -private: - mem_addr addr; -}; - -/** - * @brief Forward iterator for data words - */ -class data_iterator -{ -public: - data_iterator() - { - // empty - } - - data_iterator(mem_addr addr) : addr(addr) - { - // empty - } - - mem_word operator*() const - { - return read_mem_word(0, addr); - } - - bool operator==(const data_iterator & other) const - { - return addr == other.addr; - } - - bool operator!=(const data_iterator & other) const - { - return !(*this == other); - } - - data_iterator & operator++() - { - addr += 4; - return *this; - } - - data_iterator operator++(int) - { - data_iterator temp(*this); - ++*this; - return temp; - } - - mem_addr word_addr() const - { - return (addr - DATA_BOT) >> 2; - } - -private: - mem_addr addr; -}; - -template -void vasm(const std::string & file_path, T begin, T end) -{ - FILE * output_file = fopen(file_path.c_str(), "w"); - if (output_file == NULL) - { - perror("Could not open file for writing"); - return; - } - - if (begin == end) - { - // emulate spim.vasm behavior on empty segments - fclose(output_file); - return; - } - - fprintf(output_file, "\n@%08x\n", begin.word_addr()); - for (T it = begin; it != end;) - { - for (int i = 0; i < 4 && it != end; ++i, ++it) - { - fprintf(output_file, " %08x", *it); - } - fputc('\n', output_file); - } - - fclose(output_file); -} -} - -void vasm(const std::string & files_prefix) -{ - std::string text_path = files_prefix + ".text.dat"; - inst_iterator text_begin(TEXT_BOT); - inst_iterator text_end(current_text_pc()); - vasm(text_path, text_begin, text_end); - - std::string data_path = files_prefix + ".data.dat"; - data_iterator data_begin(DATA_BOT + 64*K); - data_iterator data_end(current_data_pc()); - vasm(data_path, data_begin, data_end); -} diff --git a/spim-qtspimbot/CPU/vasm.h b/spim-qtspimbot/CPU/vasm.h deleted file mode 100644 index d4671a6..0000000 --- a/spim-qtspimbot/CPU/vasm.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef VASM_H -#define VASM_H - -#include - -void vasm(const std::string & files_prefix); - -#endif // VASM_H diff --git a/spim-qtspimbot/CPU/version.h b/spim-qtspimbot/CPU/version.h deleted file mode 100644 index 2c1902e..0000000 --- a/spim-qtspimbot/CPU/version.h +++ /dev/null @@ -1 +0,0 @@ -#define SPIM_VERSION "Version 9.1.20 of August 29, 2017" diff --git a/spim-qtspimbot/README b/spim-qtspimbot/README deleted file mode 100644 index 645e645..0000000 --- a/spim-qtspimbot/README +++ /dev/null @@ -1,49 +0,0 @@ - README FILE FOR SPIM - ==================== - -This directory contains part of SPIM--an assembly language MIPS R2000/R3000 -simulator. It contains the terminal interface to SPIM. - -SPIM is covered by a BSD license. - -Copyright (c) 1990-2010, James R. Larus. -All rights reserved. - -Redistribution and use in source and binary forms, with or without modification, -are permitted provided that the following conditions are met: - -Redistributions of source code must retain the above copyright notice, -this list of conditions and the following disclaimer. - -Redistributions in binary form must reproduce the above copyright notice, -this list of conditions and the following disclaimer in the documentation and/or -other materials provided with the distribution. - -Neither the name of the James R. Larus nor the names of its contributors may be -used to endorse or promote products derived from this software without specific -prior written permission. - -THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE -LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE -GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - - - -The files in this directory are: - -README - This file. - -Makefile - Makefile to build the terminal version of spim. This Makefile works - for Unix and on Microsoft Windows under Cygwin. - -spim.c - Terminal interface to spim. diff --git a/spim-qtspimbot/spim.cpp b/spim-qtspimbot/spim.cpp deleted file mode 100755 index 2d7fec5..0000000 --- a/spim-qtspimbot/spim.cpp +++ /dev/null @@ -1,1277 +0,0 @@ -/* SPIM S20 MIPS simulator. - Terminal interface for SPIM simulator. - - Copyright (c) 1990-2015, James R. Larus. - All rights reserved. - - Redistribution and use in source and binary forms, with or without modification, - are permitted provided that the following conditions are met: - - Redistributions of source code must retain the above copyright notice, - this list of conditions and the following disclaimer. - - Redistributions in binary form must reproduce the above copyright notice, - this list of conditions and the following disclaimer in the documentation and/or - other materials provided with the distribution. - - Neither the name of the James R. Larus nor the names of its contributors may be - used to endorse or promote products derived from this software without specific - prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -*/ - - -#ifndef WIN32 -#include -#endif -#include -#include -#include -#include -#include - - -#ifdef RS -/* This is problem on HP Snakes, which define RS in syscall.h */ -#undef RS -#endif - -#include -#include - -#ifdef _AIX -#ifndef NBBY -#define NBBY 8 -#endif -#endif - - -#ifndef WIN32 -#include -#ifdef NEED_TERMIOS -#include -#include -#else -#include -#endif -#endif - -#include - -#include "spim.h" -#include "string-stream.h" -#include "spim-utils.h" -#include "inst.h" -#include "reg.h" -#include "mem.h" -#include "parser.h" -#include "sym-tbl.h" -#include "scanner.h" -#include "parser_yacc.h" -#include "data.h" - - -/* Internal functions: */ - -static void console_to_program (); -static void console_to_spim (); -static void control_c_seen (int /*arg*/); -static void flush_to_newline (); -static int get_opt_int (); -static bool parse_spim_command (bool redo); -static void print_reg (int reg_no); -static int print_fp_reg (int reg_no); -static int print_reg_from_string (char *reg); -static void print_all_regs (int hex_flag); -static int read_assembly_command (); -static int str_prefix (char *s1, char *s2, int min_match); -static void top_level (); -static int read_token (); -static bool write_assembled_code(char* program_name); -static void dump_data_seg (bool kernel_also); -static void dump_text_seg (bool kernel_also); - - -/* Exported Variables: */ - -/* Not local, but not export so all files don't need setjmp.h */ -jmp_buf spim_top_level_env; /* For ^C */ - -bool bare_machine; /* => simulate bare machine */ -bool delayed_branches; /* => simulate delayed branches */ -bool delayed_loads; /* => simulate delayed loads */ -bool accept_pseudo_insts; /* => parse pseudo instructions */ -bool quiet; /* => no warning messages */ -bool assemble; /* => assemble, write to stdout and exit */ -char *exception_file_name = DEFAULT_EXCEPTION_HANDLER; -port message_out, console_out, console_in; -bool mapped_io; /* => activate memory-mapped IO */ -int pipe_out; -int spim_return_value; /* Value returned when spim exits */ - - -/* Local variables: */ - -/* => load standard exception handler */ -static bool load_exception_handler = true; -static int console_state_saved; -#ifdef NEED_TERMIOS -static struct sgttyb saved_console_state; -#else -static struct termios saved_console_state; -#endif -static int program_argc; -static char** program_argv; -static bool dump_user_segments = false; -static bool dump_all_segments = false; - - - -int -main (int argc, char **argv) -{ - int i; - bool assembly_file_loaded = false; - int print_usage_msg = 0; - - console_out.f = stdout; - message_out.f = stdout; - - bare_machine = false; - delayed_branches = false; - delayed_loads = false; - accept_pseudo_insts = true; - quiet = false; - assemble = false; - spim_return_value = 0; - - /* Input comes directly (not through stdio): */ - console_in.i = 0; - mapped_io = false; - - // write_startup_message (); - - if (getenv ("SPIM_EXCEPTION_HANDLER") != NULL) - exception_file_name = getenv ("SPIM_EXCEPTION_HANDLER"); - - for (i = 1; i < argc; i++) - { -#ifdef WIN32 - if (argv [i][0] == '/') { argv [i][0] = '-'; } -#endif - if (streq (argv [i], "-asm") - || streq (argv [i], "-a")) - { - bare_machine = false; - delayed_branches = false; - delayed_loads = false; - } - else if (streq (argv [i], "-bare") - || streq (argv [i], "-b")) - { - bare_machine = true; - delayed_branches = true; - delayed_loads = true; - quiet = true; - } - else if (streq (argv [i], "-delayed_branches") - || streq (argv [i], "-db")) - { - delayed_branches = true; - } - else if (streq (argv [i], "-delayed_loads") - || streq (argv [i], "-dl")) - { - delayed_loads = true; - } - else if (streq (argv [i], "-exception") - || streq (argv [i], "-e")) - { load_exception_handler = true; } - else if (streq (argv [i], "-noexception") - || streq (argv [i], "-ne")) - { load_exception_handler = false; } - else if (streq (argv [i], "-exception_file") - || streq (argv [i], "-ef")) - { - exception_file_name = argv[++i]; - load_exception_handler = true; - } - else if (streq (argv [i], "-mapped_io") - || streq (argv [i], "-mio")) - { mapped_io = true; } - else if (streq (argv [i], "-nomapped_io") - || streq (argv [i], "-nmio")) - { mapped_io = false; } - else if (streq (argv [i], "-pseudo") - || streq (argv [i], "-p")) - { accept_pseudo_insts = true; } - else if (streq (argv [i], "-nopseudo") - || streq (argv [i], "-np")) - { accept_pseudo_insts = false; } - else if (streq (argv [i], "-quiet") - || streq (argv [i], "-q")) - { quiet = true; } - else if (streq (argv [i], "-noquiet") - || streq (argv [i], "-nq")) - { quiet = false; } - else if (streq (argv [i], "-trap") - || streq (argv [i], "-t")) - { load_exception_handler = true; } - else if (streq (argv [i], "-notrap") - || streq (argv [i], "-nt")) - { load_exception_handler = false; } - else if (streq (argv [i], "-trap_file") - || streq (argv [i], "-tf")) - { - exception_file_name = argv[++i]; - load_exception_handler = true; - } - else if (streq (argv [i], "-stext") - || streq (argv [i], "-st")) - { initial_text_size = atoi (argv[++i]); } - else if (streq (argv [i], "-sdata") - || streq (argv [i], "-sd")) - { initial_data_size = atoi (argv[++i]); } - else if (streq (argv [i], "-ldata") - || streq (argv [i], "-ld")) - { initial_data_limit = atoi (argv[++i]); } - else if (streq (argv [i], "-sstack") - || streq (argv [i], "-ss")) - { initial_stack_size = atoi (argv[++i]); } - else if (streq (argv [i], "-lstack") - || streq (argv [i], "-ls")) - { initial_stack_limit = atoi (argv[++i]); } - else if (streq (argv [i], "-sktext") - || streq (argv [i], "-skt")) - { initial_k_text_size = atoi (argv[++i]); } - else if (streq (argv [i], "-skdata") - || streq (argv [i], "-skd")) - { initial_k_data_size = atoi (argv[++i]); } - else if (streq (argv [i], "-lkdata") - || streq (argv [i], "-lkd")) - { initial_k_data_limit = atoi (argv[++i]); } - else if (((streq (argv [i], "-file") - || streq (argv [i], "-f")) - && (i + 1 < argc)) - /* Assume this argument is a file name and everything following are - arguments for program */ - || (argv [i][0] != '-')) - { - program_argc = argc - (i + 1); - program_argv = &argv[i + 1]; /* Everything following is argv */ - - if (!assembly_file_loaded) - { - initialize_world (load_exception_handler ? exception_file_name : NULL, true); - initialize_run_stack (program_argc, program_argv); - } - assembly_file_loaded = read_assembly_file (argv[++i]) || assembly_file_loaded; - break; - } - else if (streq (argv [i], "-assemble")) - { assemble = true; } - else if (streq (argv [i], "-dump")) - { dump_user_segments = true; } - else if (streq (argv [i], "-full_dump")) - { dump_all_segments = true; } - else - { - error ("\nUnknown argument: %s (ignored)\n", argv[i]); - print_usage_msg = 1; - } - } - - if (print_usage_msg) - { - error ("Usage: spim\n\ - -bare Bare machine (no pseudo-ops, delayed branches and loads)\n\ - -asm Extended machine (pseudo-ops, no delayed branches and loads) (default)\n\ - -delayed_branches Execute delayed branches\n\ - -delayed_loads Execute delayed loads\n\ - -exception Load exception handler (default)\n\ - -noexception Do not load exception handler\n\ - -exception_file Specify exception handler in place of default\n\ - -quiet Do not print warnings\n\ - -noquiet Print warnings (default)\n\ - -mapped_io Enable memory-mapped IO\n\ - -nomapped_io Do not enable memory-mapped IO (default)\n\ - -file Assembly code file and arguments to program\n\ - -assemble Write assembled code to standard output\n\ - -dump Write user data and text segments into files\n\ - -full_dump Write user and kernel data and text into files.\n"); - } - - - if (!assembly_file_loaded) - { - initialize_world (load_exception_handler ? exception_file_name : NULL, true); - initialize_run_stack (program_argc, program_argv); - top_level (); - } - else /* assembly_file_loaded */ - { - if (assemble) - { - return write_assembled_code (program_argv[0]); - } - else if (dump_user_segments) - { - dump_data_seg (false); - dump_text_seg (false); - } - else if (dump_all_segments) - { - dump_data_seg (true); - dump_text_seg (true); - } - else - { - bool continuable; - console_to_program (); - initialize_run_stack (program_argc, program_argv); - if (!setjmp (spim_top_level_env)) - { - char *undefs = undefined_symbol_string (); - if (undefs != NULL) - { - write_output (message_out, "The following symbols are undefined:\n"); - write_output (message_out, undefs); - write_output (message_out, "\n"); - free (undefs); - } - run_program (find_symbol_address (DEFAULT_RUN_LOCATION), DEFAULT_RUN_STEPS, false, false, &continuable); - } - console_to_spim (); - } - } - - return (spim_return_value); -} - - - -/* Top-level read-eval-print loop for SPIM. */ - -static void -top_level () -{ - bool redo = false; /* => reexecute last command */ - - (void)signal (SIGINT, control_c_seen); - initialize_scanner (stdin); - initialize_parser (""); - while (1) - { - if (!redo) - write_output (message_out, "(spim) "); - if (!setjmp (spim_top_level_env)) - redo = parse_spim_command (redo); - else - redo = false; - fflush (stdout); - fflush (stderr); - } -} - - -static void -control_c_seen (int /*arg*/) -{ - console_to_spim (); - write_output (message_out, "\nExecution interrupted\n"); - longjmp (spim_top_level_env, 1); -} - - -/* SPIM commands */ - -enum { - UNKNOWN_CMD = 0, - EXIT_CMD, - READ_CMD, - RUN_CMD, - STEP_CMD, - PRINT_CMD, - PRINT_SYM_CMD, - PRINT_ALL_REGS_CMD, - REINITIALIZE_CMD, - ASM_CMD, - REDO_CMD, - NOP_CMD, - HELP_CMD, - CONTINUE_CMD, - SET_BKPT_CMD, - DELETE_BKPT_CMD, - LIST_BKPT_CMD, - DUMPNATIVE_TEXT_CMD, - DUMP_TEXT_CMD -}; - - -/* Parse a SPIM command from the currently open file and execute it. - If REDO is true, don't read a new command; just rexecute the - previous one. Return true if the command was to redo the previous - command. */ - -static bool -parse_spim_command (bool redo) -{ - static int prev_cmd = NOP_CMD; /* Default redo */ - static int prev_token; - int cmd; - - switch (cmd = (redo ? prev_cmd : read_assembly_command ())) - { - case EXIT_CMD: - console_to_spim (); - exit (0); - - case READ_CMD: - { - int token = (redo ? prev_token : read_token ()); - - if (!redo) flush_to_newline (); - if (token == Y_STR) - { - read_assembly_file ((char *) yylval.p); - pop_scanner(); - } - else - error ("Must supply a filename to read\n"); - prev_cmd = READ_CMD; - return (0); - } - - case RUN_CMD: - { - static mem_addr addr; - bool continuable; - - addr = (redo ? addr : get_opt_int ()); - if (addr == 0) - addr = starting_address (); - - initialize_run_stack (program_argc, program_argv); - console_to_program (); - if (addr != 0) - { - char *undefs = undefined_symbol_string (); - if (undefs != NULL) - { - write_output (message_out, "The following symbols are undefined:\n"); - write_output (message_out, undefs); - write_output (message_out, "\n"); - free (undefs); - } - - if (run_program (addr, DEFAULT_RUN_STEPS, false, false, &continuable)) - write_output (message_out, "Breakpoint encountered at 0x%08x\n", PC); - } - console_to_spim (); - - prev_cmd = RUN_CMD; - return (0); - } - - case CONTINUE_CMD: - { - if (PC != 0) - { - bool continuable; - console_to_program (); - if (run_program (PC, DEFAULT_RUN_STEPS, false, true, &continuable)) - write_output (message_out, "Breakpoint encountered at 0x%08x\n", PC); - console_to_spim (); - } - prev_cmd = CONTINUE_CMD; - return (0); - } - - case STEP_CMD: - { - static int steps; - mem_addr addr; - - steps = (redo ? steps : get_opt_int ()); - addr = PC == 0 ? starting_address () : PC; - - if (steps == 0) - steps = 1; - if (addr != 0) - { - bool continuable; - console_to_program (); - if (run_program (addr, steps, true, true, &continuable)) - write_output (message_out, "Breakpoint encountered at 0x%08x\n", PC); - console_to_spim (); - } - - prev_cmd = STEP_CMD; - return (0); - } - - case PRINT_CMD: - { - int token = (redo ? prev_token : read_token ()); - static int loc; - - if (token == Y_REG) - { - if (redo) loc += 1; - else loc = yylval.i; - print_reg (loc); - } - else if (token == Y_FP_REG) - { - if (redo) loc += 2; - else loc = yylval.i; - print_fp_reg (loc); - } - else if (token == Y_INT) - { - if (redo) loc += 4; - else loc = yylval.i; - print_mem (loc); - } - else if (token == Y_ID) - { - if (!print_reg_from_string ((char *) yylval.p)) - { - if (redo) loc += 4; - else loc = find_symbol_address ((char *) yylval.p); - - if (loc != 0) - print_mem (loc); - else - error ("Unknown label: %s\n", yylval.p); - } - } - else - error ("Print what?\n"); - if (!redo) flush_to_newline (); - prev_cmd = PRINT_CMD; - prev_token = token; - return (0); - } - - case PRINT_SYM_CMD: - print_symbols (); - if (!redo) flush_to_newline (); - prev_cmd = NOP_CMD; - return (0); - - case PRINT_ALL_REGS_CMD: - { - int hex_flag = 0; - int token = (redo ? prev_token : read_token ()); - if (token == Y_ID && streq((char*)yylval.p, "hex")) - hex_flag = 1; - print_all_regs (hex_flag); - if (!redo) flush_to_newline (); - prev_cmd = NOP_CMD; - return (0); - } - - case REINITIALIZE_CMD: - flush_to_newline (); - initialize_world (load_exception_handler ? exception_file_name : NULL, true); - initialize_run_stack (program_argc, program_argv); - write_startup_message (); - prev_cmd = NOP_CMD; - return (0); - - case ASM_CMD: - yyparse (); - prev_cmd = ASM_CMD; - return (0); - - case REDO_CMD: - return (1); - - case NOP_CMD: - prev_cmd = NOP_CMD; - return (0); - - case HELP_CMD: - if (!redo) flush_to_newline (); - write_output (message_out, "\nSPIM is a MIPS32 simulator.\n"); - write_output (message_out, "Its top-level commands are:\n"); - write_output (message_out, "exit -- Exit the simulator\n"); - write_output (message_out, "quit -- Exit the simulator\n"); - write_output (message_out, - "read \"FILE\" -- Read FILE containing assembly code into memory\n"); - write_output (message_out, - "load \"FILE\" -- Same as read\n"); - write_output (message_out, - "run -- Start the program at (optional) ADDRESS\n"); - write_output (message_out, - "step -- Step the program for N instructions (default 1)\n"); - write_output (message_out, - "continue -- Continue program execution without stepping\n"); - write_output (message_out, "print $N -- Print register N\n"); - write_output (message_out, - "print $fN -- Print floating point register N\n"); - write_output (message_out, - "print ADDR -- Print contents of memory at ADDRESS\n"); - write_output (message_out, - "print_symbols -- Print all global symbols\n"); - write_output (message_out, - "print_all_regs -- Print all MIPS registers\n"); - write_output (message_out, - "print_all_regs hex -- Print all MIPS registers in hex\n"); - write_output (message_out, - "reinitialize -- Clear the memory and registers\n"); - write_output (message_out, - "breakpoint -- Set a breakpoint at address ADDR\n"); - write_output (message_out, - "delete -- Delete breakpoint at address ADDR\n"); - write_output (message_out, "list -- List all breakpoints\n"); - write_output (message_out, "dump [ \"FILE\" ] -- Dump binary code to spim.dump or FILE in network byte order\n"); - write_output (message_out, "dumpnative [ \"FILE\" ] -- Dump binary code to spim.dump or FILE in host byte order\n"); - write_output (message_out, - ". -- Rest of line is assembly instruction to execute\n"); - write_output (message_out, " -- Newline reexecutes previous command\n"); - write_output (message_out, "? -- Print this message\n"); - - write_output (message_out, - "\nMost commands can be abbreviated to their unique prefix\n"); - write_output (message_out, "e.g., ex(it), re(ad), l(oad), ru(n), s(tep), p(rint)\n\n"); - prev_cmd = HELP_CMD; - return (0); - - case SET_BKPT_CMD: - case DELETE_BKPT_CMD: - { - int token = (redo ? prev_token : read_token ()); - static mem_addr addr; - - if (!redo) flush_to_newline (); - if (token == Y_INT) - addr = redo ? addr + 4 : (mem_addr)yylval.i; - else if (token == Y_ID) - addr = redo ? addr + 4 : find_symbol_address ((char *) yylval.p); - else - error ("Must supply an address for breakpoint\n"); - if (cmd == SET_BKPT_CMD) - add_breakpoint (addr); - else - delete_breakpoint (addr); - prev_cmd = cmd; - - return (0); - } - - case LIST_BKPT_CMD: - if (!redo) flush_to_newline (); - list_breakpoints (); - prev_cmd = LIST_BKPT_CMD; - return (0); - - case DUMPNATIVE_TEXT_CMD: - case DUMP_TEXT_CMD: - { - int token = (redo ? prev_token : read_token ()); - - FILE *fp = NULL; - char *filename = NULL; - - int words = 0; - mem_addr addr; - mem_addr dump_start; - mem_addr dump_end; - - if (token == Y_STR) - filename = (char *) yylval.p; - else if (token == Y_NL) - filename = "spim.dump"; - else - { - fprintf (stderr, "usage: %s [ \"filename\" ]\n", - (cmd == DUMP_TEXT_CMD ? "dump" : "dumpnative")); - return (0); - } - - fp = fopen (filename, "wbt"); - if (fp == NULL) - { - perror (filename); - return (0); - } - - user_kernel_text_segment (false); - dump_start = find_symbol_address (END_OF_TRAP_HANDLER_SYMBOL); - dump_end = current_text_pc (); - - for (addr = dump_start; addr < dump_end; addr += BYTES_PER_WORD) - { - int32 code = inst_encode (read_mem_inst (addr)); - if (cmd == DUMP_TEXT_CMD) - code = (int32)htonl ((unsigned long)code); /* dump in network byte order */ - (void)fwrite (&code, 1, sizeof(code), fp); - words += 1; - } - - fclose (fp); - fprintf (stderr, "Dumped %d words starting at 0x%08x to file %s\n", - words, (unsigned int)dump_start, filename); - - prev_cmd = cmd; - return (0); - } - - default: - while (read_token () != Y_NL) ; - error ("Unknown spim command\n"); - return (0); - } -} - - -/* Read a SPIM command with the scanner and return its ennuemerated - value. */ - -static int -read_assembly_command () -{ - int token = read_token (); - - if (token == Y_NL) /* Blank line means redo */ - return (REDO_CMD); - else if (token != Y_ID) /* Better be a string */ - return (UNKNOWN_CMD); - else if (str_prefix ((char *) yylval.p, "exit", 2)) - return (EXIT_CMD); - else if (str_prefix ((char *) yylval.p, "quit", 2)) - return (EXIT_CMD); - else if (str_prefix ((char *) yylval.p, "print", 1)) - return (PRINT_CMD); - else if (str_prefix ((char *) yylval.p, "print_symbols", 7)) - return (PRINT_SYM_CMD); - else if (str_prefix ((char *) yylval.p, "print_all_regs", 7)) - return (PRINT_ALL_REGS_CMD); - else if (str_prefix ((char *) yylval.p, "run", 2)) - return (RUN_CMD); - else if (str_prefix ((char *) yylval.p, "read", 2)) - return (READ_CMD); - else if (str_prefix ((char *) yylval.p, "load", 2)) - return (READ_CMD); - else if (str_prefix ((char *) yylval.p, "reinitialize", 6)) - return (REINITIALIZE_CMD); - else if (str_prefix ((char *) yylval.p, "step", 1)) - return (STEP_CMD); - else if (str_prefix ((char *) yylval.p, "help", 1)) - return (HELP_CMD); - else if (str_prefix ((char *) yylval.p, "continue", 1)) - return (CONTINUE_CMD); - else if (str_prefix ((char *) yylval.p, "breakpoint", 2)) - return (SET_BKPT_CMD); - else if (str_prefix ((char *) yylval.p, "delete", 1)) - return (DELETE_BKPT_CMD); - else if (str_prefix ((char *) yylval.p, "list", 2)) - return (LIST_BKPT_CMD); - else if (str_prefix ((char *) yylval.p, "dumpnative", 5)) - return (DUMPNATIVE_TEXT_CMD); - else if (str_prefix ((char *) yylval.p, "dump", 4)) - return (DUMP_TEXT_CMD); - else if (*(char *) yylval.p == '?') - return (HELP_CMD); - else if (*(char *) yylval.p == '.') - return (ASM_CMD); - else - return (UNKNOWN_CMD); -} - - -/* Return non-nil if STRING1 is a (proper) prefix of STRING2. */ - -static int -str_prefix (char *s1, char *s2, int min_match) -{ - for ( ; *s1 == *s2 && *s1 != '\0'; s1 ++, s2 ++) min_match --; - return (*s1 == '\0' && min_match <= 0); -} - - -/* Read and return an integer from the current line of input. If the - line doesn't contain an integer, return 0. In either case, flush the - rest of the line, including the newline. */ - -static int -get_opt_int () -{ - int token; - - if ((token = read_token ()) == Y_INT) - { - flush_to_newline (); - return (yylval.i); - } - else if (token == Y_NL) - return (0); - else - { - flush_to_newline (); - return (0); - } -} - - -/* Flush the rest of the input line up to and including the next newline. */ - -static void -flush_to_newline () -{ - while (read_token () != Y_NL) ; -} - - -/* Print register number N. */ - -static void -print_reg (int reg_no) -{ - write_output (message_out, "Reg %d = 0x%08x (%d)\n", reg_no, R[reg_no], R[reg_no]); -} - - -static int -print_fp_reg (int reg_no) -{ - if ((reg_no & 1) == 0) - write_output (message_out, "FP reg %d = %g (double)\n", reg_no, FPR_D (reg_no)); - write_output (message_out, "FP reg %d = %g (single)\n", reg_no, FPR_S (reg_no)); - return (1); -} - - -static int -print_reg_from_string (char* reg_num) -{ - char s[100]; - char *s1 = s; - - /* Conver to lower case */ - while (*reg_num != '\0' && s1 - s < 100) - *s1++ = tolower (*reg_num++); - *s1 = '\0'; - /* Drop leading $ */ - if (s[0] == '$') - s1 = s + 1; - else - s1 = s; - - if (streq (s1, "pc")) - write_output (message_out, "PC = 0x%08x (%d)\n", PC, PC); - else if (streq (s1, "hi")) - write_output (message_out, "HI = 0x%08x (%d)\n", HI, HI); - else if (streq (s1, "lo")) - write_output (message_out, "LO = 0x%08x (%d)\n", LO, LO); - else if (streq (s1, "fpcond")) - write_output (message_out, "FCSR = 0x%08x (%d)\n", FCSR, FCSR); - else if (streq (s1, "cause")) - write_output (message_out, "Cause = 0x%08x (%d)\n", CP0_Cause, CP0_Cause); - else if (streq (s1, "epc")) - write_output (message_out, "EPC = 0x%08x (%d)\n", CP0_EPC, CP0_EPC); - else if (streq (s1, "status")) - write_output (message_out, "Status = 0x%08x (%d)\n", CP0_Status, CP0_Status); - else if (streq (s1, "badvaddr")) - write_output (message_out, "BadVAddr = 0x%08x (%d)\n", CP0_BadVAddr, CP0_BadVAddr); - else - return (0); - - return (1); -} - - -static void -print_all_regs (int hex_flag) -{ - static str_stream ss; - - ss_clear (&ss); - format_registers (&ss, hex_flag, hex_flag); - write_output (message_out, "%s\n", ss_to_string (&ss)); -} - - -static bool -write_assembled_code(char* program_name) -{ - if (parse_error_occurred) - { - return (parse_error_occurred); - } - - FILE *fp = NULL; - char *filename = NULL; - - mem_addr addr; - mem_addr dump_start; - mem_addr dump_end; - - filename = (char*) xmalloc(strlen(program_name) + 5); - strcpy(filename, program_name); - strcat(filename, ".out"); - - fp = fopen (filename, "wt"); - if (fp == NULL) - { - perror (filename); - return (true); - } - - /* dump text segment */ - user_kernel_text_segment (false); - dump_start = find_symbol_address (END_OF_TRAP_HANDLER_SYMBOL); - dump_end = current_text_pc (); - - (void)fprintf (fp, ".text # 0x%x .. 0x%x\n.word ", dump_start, dump_end); - for (addr = dump_start; addr < dump_end; addr += BYTES_PER_WORD) - { - int32 code = inst_encode (read_mem_inst (addr)); - (void)fprintf (fp, "0x%x%s", code, addr != (dump_end - BYTES_PER_WORD) ? ", " : ""); - } - (void)fprintf (fp, "\n"); - - /* dump data segment */ - user_kernel_data_segment (false); - if (bare_machine) - { - dump_start = 0; - } - else - { - dump_start = DATA_BOT; - } - dump_end = current_data_pc (); - - if (dump_end > dump_start) - { - (void)fprintf (fp, ".data # 0x%x .. 0x%x\n.word ", dump_start, dump_end); - for (addr = dump_start; addr < dump_end; addr += BYTES_PER_WORD) - { - int32 code = read_mem_word (addr); - (void)fprintf (fp, "0x%x%s", code, addr != (dump_end - BYTES_PER_WORD) ? ", " : ""); - } - (void)fprintf (fp, "\n"); - } - - fclose (fp); - return (false); -} - - - -/* Print an error message. */ - -void -error (char *fmt, ...) -{ - va_list args; - - va_start (args, fmt); - -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stderr); -#else - vfprintf (stderr, fmt, args); -#endif - va_end (args); -} - - -/* Print the error message then exit. */ - -void -fatal_error (char *fmt, ...) -{ - va_list args; - va_start (args, fmt); - fmt = va_arg (args, char *); - -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stderr); -#else - vfprintf (stderr, fmt, args); -#endif - exit (-1); -} - - -/* Print an error message and return to top level. */ - -void -run_error (char *fmt, ...) -{ - va_list args; - - va_start (args, fmt); - - console_to_spim (); - -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stderr); -#else - vfprintf (stderr, fmt, args); -#endif - va_end (args); - longjmp (spim_top_level_env, 1); -} - - - -/* IO facilities: */ - -void -write_output (port fp, char *fmt, ...) -{ - va_list args; - FILE *f; - int restore_console_to_program = 0; - - va_start (args, fmt); - f = fp.f; - - if (console_state_saved) - { - restore_console_to_program = 1; - console_to_spim (); - } - - if (f != 0) - { -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, f); -#else - vfprintf (f, fmt, args); -#endif - fflush (f); - } - else - { -#ifdef NEED_VFPRINTF - _doprnt (fmt, args, stdout); -#else - vfprintf (stdout, fmt, args); -#endif - fflush (stdout); - } - va_end (args); - - if (restore_console_to_program) - console_to_program (); -} - - -/* Simulate the semantics of fgets (not gets) on Unix file. */ - -void -read_input (char *str, int str_size) -{ - char *ptr; - int restore_console_to_program = 0; - - if (console_state_saved) - { - restore_console_to_program = 1; - console_to_spim (); - } - - ptr = str; - - while (1 < str_size) /* Reserve space for null */ - { - char buf[1]; - if (read ((int) console_in.i, buf, 1) <= 0) /* Not in raw mode! */ - break; - - *ptr ++ = buf[0]; - str_size -= 1; - - if (buf[0] == '\n') - break; - } - - if (0 < str_size) - *ptr = '\0'; /* Null terminate input */ - - if (restore_console_to_program) - console_to_program (); -} - - -/* Give the console to the program for IO. */ - -static void -console_to_program () -{ - if (mapped_io && !console_state_saved) - { -#ifdef NEED_TERMIOS - int flags; - ioctl ((int) console_in.i, TIOCGETP, (char *) &saved_console_state); - flags = saved_console_state.sg_flags; - saved_console_state.sg_flags = (flags | RAW) & ~(CRMOD|ECHO); - ioctl ((int) console_in.i, TIOCSETP, (char *) &saved_console_state); - saved_console_state.sg_flags = flags; -#else - struct termios params; - - tcgetattr (console_in.i, &saved_console_state); - params = saved_console_state; - params.c_iflag &= ~(ISTRIP|INLCR|ICRNL|IGNCR|IXON|IXOFF|INPCK|BRKINT|PARMRK); - - /* Translate CR -> NL to canonicalize input. */ - params.c_iflag |= IGNBRK|IGNPAR|ICRNL; - params.c_oflag = OPOST|ONLCR; - params.c_cflag &= ~PARENB; - params.c_cflag |= CREAD|CS8; - params.c_lflag = 0; - params.c_cc[VMIN] = 1; - params.c_cc[VTIME] = 1; - - tcsetattr (console_in.i, TCSANOW, ¶ms); -#endif - console_state_saved = 1; - } -} - - -/* Return the console to SPIM. */ - -static void -console_to_spim () -{ - if (mapped_io && console_state_saved) -#ifdef NEED_TERMIOS - ioctl ((int) console_in.i, TIOCSETP, (char *) &saved_console_state); -#else - tcsetattr (console_in.i, TCSANOW, &saved_console_state); -#endif - console_state_saved = 0; -} - - -int -console_input_available () -{ - fd_set fdset; - struct timeval timeout; - - if (mapped_io) - { - timeout.tv_sec = 0; - timeout.tv_usec = 0; - FD_ZERO (&fdset); - FD_SET ((int) console_in.i, &fdset); - return (select (sizeof (fdset) * 8, &fdset, NULL, NULL, &timeout)); - } - else - return (0); -} - - -char -get_console_char () -{ - char buf; - - read ((int) console_in.i, &buf, 1); - - if (buf == 3) /* ^C */ - control_c_seen (0); - return (buf); -} - - -void -put_console_char (char c) -{ - putc (c, console_out.f); - fflush (console_out.f); -} - - -static int -read_token () -{ - int token = yylex (); - - if (token == 0) /* End of file */ - { - console_to_spim (); - exit (0); - } - else - { - return (token); - } -} - - -/* - * Writes the contents of the (user and optionally kernel) data segment into data.asm file. - * If data.asm already exists, it's replaced. - */ - -static void -dump_data_seg(bool kernel_also) -{ - static str_stream ss; - ss_clear (&ss); - - if (kernel_also) - { - format_data_segs (&ss); - } - else - { - ss_printf (&ss, "\tDATA\n"); - format_mem (&ss, DATA_BOT, data_top); - } - - FILE *fp; - fp = fopen ("data.asm", "w"); - fprintf (fp, "%s", ss_to_string (&ss)); - fclose (fp); -} - - -/* - * Writes the contents of the (user and optionally kernel) text segment in text.asm file. - * If data.asm already exists, it's replaced. - */ - -static void -dump_text_seg(bool kernel_also) -{ - static str_stream ss; - ss_clear (&ss); - - if (kernel_also) - { - format_insts (&ss, TEXT_BOT, text_top); - ss_printf (&ss, "\n\tKERNEL\n"); - format_insts (&ss, K_TEXT_BOT, k_text_top); - } - else - { - ss_printf (&ss, "\n\tUSER TEXT SEGMENT\n"); - format_insts (&ss, TEXT_BOT, text_top); - } - - FILE *fp; - fp = fopen ("text.asm", "w"); - fprintf (fp, "%s", ss_to_string (&ss)); - fclose (fp); -}
    • -

    Assemblers, Linkers, and the SPIM Simulator

    -

    James R. Larus
    EPFL
    spim@larusstone.org

    -     -

    Introduction

    -

    Encoding instructions as binary numbers is natural and efficient for computers. - Humans, however, have a great deal of difficulty understanding and manipulating - these numbers. People read and write symbols (words) much better than long sequences - of digits. Chapter 2 showed that we need not choose between numbers and words - because computer instructions can be represented in many ways. Humans can write - and read symbols, and computers can execute the equivalent binary numbers. This - appendix describes the process by which a human-readable program is translated - into a form that a computer can execute, provides a few hints about writing - assembly programs, and explains how to run these programs on SPIM, a simulator - that executes MIPS programs. UNIX, Windows, and Mac OS X versions of the SPIM - simulator are available on the CD.

    -