diff --git a/aarch64/corefreq-cli-json.c b/aarch64/corefreq-cli-json.c
index 469d29bb..a570b238 100644
--- a/aarch64/corefreq-cli-json.c
+++ b/aarch64/corefreq-cli-json.c
@@ -439,6 +439,8 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_start_object(&s);
 					json_key(&s, "AES");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.AES);
+					json_key(&s, "PMULL");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.PMULL);
 					json_key(&s, "SHA1");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SHA1);
 					json_key(&s, "SHA256");
@@ -449,8 +451,10 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SHA3);
 					json_key(&s, "CRC32");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.CRC32);
-					json_key(&s, "CAS");
-					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.CAS);
+					json_key(&s, "LSE");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.LSE);
+					json_key(&s, "LSE128");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.LSE128);
 					json_key(&s, "DP");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.DP);
 					json_key(&s, "SM3");
@@ -463,8 +467,10 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.TME);
 					json_key(&s, "FHM");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FHM);
-					json_key(&s, "TS");
-					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.TS);
+					json_key(&s, "FlagM");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FlagM);
+					json_key(&s, "FlagM2");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FlagM2);
 					json_key(&s, "TLB");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.TLB);
 					json_key(&s, "RDMA");
@@ -480,8 +486,34 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.LRCPC);
 					json_key(&s, "JSCVT");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.JSCVT);
+					json_key(&s, "FRINTTS");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.FRINTTS);
+					json_key(&s, "SPECRES");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SPECRES);
+					json_key(&s, "SPECRES2");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SPECRES2);
+					json_key(&s, "BF16");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.BF16);
+					json_key(&s, "EBF16");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.EBF16);
+					json_key(&s, "I8MM");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.I8MM);
+					json_key(&s, "SB");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.SB);
+					json_key(&s, "XS");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.XS);
 					json_key(&s, "LS64");
 					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.LS64);
+					json_key(&s, "LS64_V");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.LS64_V);
+					json_key(&s, "LS64_ACCDATA");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.LS64_ACCDATA);
+					json_key(&s, "DGH");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.DGH);
+					json_key(&s, "DPB");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.DPB);
+					json_key(&s, "DPB2");
+					json_literal(&s, "%u", (unsigned) RO(Shm)->Proc.Features.DPB2);
 					json_end_object(&s);
 				}
 				json_key(&s, "MMFR1");
diff --git a/aarch64/corefreq-cli-rsc-en.h b/aarch64/corefreq-cli-rsc-en.h
index 8c76a94c..84f9455f 100644
--- a/aarch64/corefreq-cli-rsc-en.h
+++ b/aarch64/corefreq-cli-rsc-en.h
@@ -772,7 +772,7 @@
 #define RSC_ISA_TITLE_CODE_EN		" Instruction Set Extensions "
 
 #define RSC_ISA_AES_COMM_CODE_EN	" Advanced Encryption Standard "
-#define RSC_ISA_CAS_COMM_CODE_EN	" Atomic instructions "
+#define RSC_ISA_LSE_COMM_CODE_EN	" Atomic instructions "
 #define RSC_ISA_CRC32_COMM_CODE_EN	" Cyclic Redundancy Check "
 #define RSC_ISA_DP_COMM_CODE_EN 	" Dot Product instructions "
 #define RSC_ISA_FCMA_COMM_CODE_EN	\
@@ -783,8 +783,17 @@
 
 #define RSC_ISA_FP_COMM_CODE_EN 	" Floating Point "
 #define RSC_ISA_JSCVT_COMM_CODE_EN	" JavaScript Conversion "
-#define RSC_ISA_LRCPC_COMM_CODE_EN 	" Load-Acquire RCpc instructions "
-#define RSC_ISA_LS64_COMM_CODE_EN 	" Atomic 64-byte loads and stores "
+#define RSC_ISA_LRCPC_COMM_CODE_EN	" Load-Acquire RCpc instructions "
+#define RSC_ISA_FRINTTS_COMM_CODE_EN	" Floating-point to Integer "
+#define RSC_ISA_SPECRES_COMM_CODE_EN	" Prediction Invalidation "
+#define RSC_ISA_BF16_COMM_CODE_EN	" BFloat16 instructions "
+#define RSC_ISA_EBF16_COMM_CODE_EN	" Extended BFloat16 "
+#define RSC_ISA_I8MM_COMM_CODE_EN	" Int8 Matrix Multiplication "
+#define RSC_ISA_SB_COMM_CODE_EN 	" Speculation Barrier "
+#define RSC_ISA_XS_COMM_CODE_EN 	" XS attribute for memory "
+#define RSC_ISA_LS64_COMM_CODE_EN	" Atomic 64-byte loads and stores "
+#define RSC_ISA_DGH_COMM_CODE_EN	" Data Gathering Hint "
+#define RSC_ISA_DPB_COMM_CODE_EN	" Data Persistence writeback "
 #define RSC_ISA_RAND_COMM_CODE_EN	" Read Random Number "
 #define RSC_ISA_RDMA_COMM_CODE_EN	" Rounding Double Multiply Accumulate "
 #define RSC_ISA_SHA_COMM_CODE_EN	" Secure Hash Algorithms extensions "
@@ -792,7 +801,7 @@
 #define RSC_ISA_SIMD_COMM_CODE_EN	" Advanced SIMD Extensions "
 #define RSC_ISA_SME_COMM_CODE_EN	" Scalable Matrix Extension "
 #define RSC_ISA_SVE_COMM_CODE_EN	" Scalable Vector Extension "
-#define RSC_ISA_TS_COMM_CODE_EN 	" Flag manipulation instructions "
+#define RSC_ISA_FlagM_COMM_CODE_EN 	" Flag manipulation instructions "
 
 #define RSC_FEATURES_TITLE_CODE_EN	" Features "
 #define RSC_ON_CODE_EN			" ON"
@@ -1947,7 +1956,9 @@
 	"FPSR\0  N \0  Z \0  C \0  V \0 QC \0 IDC\0 IXC\0 UFC\0 OFC\0 DZC\0 IOC"
 
 #define RSC_ISA_AES_CODE		"          AES [%c]"
-#define RSC_ISA_CAS_CODE		"          CAS [%c]"
+#define RSC_ISA_PMULL_CODE		"        PMULL [%c]"
+#define RSC_ISA_LSE_CODE		"          LSE [%c]"
+#define RSC_ISA_LSE128_CODE		"       LSE128 [%c]"
 #define RSC_ISA_CRC32_CODE		"        CRC32 [%c]"
 #define RSC_ISA_DP_CODE 		"           DP [%c]"
 #define RSC_ISA_FCMA_CODE		"         FCMA [%c]"
@@ -1955,7 +1966,20 @@
 #define RSC_ISA_FP_CODE 		"           FP [%c]"
 #define RSC_ISA_JSCVT_CODE		"        JSCVT [%c]"
 #define RSC_ISA_LRCPC_CODE 		"        LRCPC [%c]"
+#define RSC_ISA_FRINTTS_CODE		"      FRINTTS [%c]"
+#define RSC_ISA_SPECRES_CODE		"      SPECRES [%c]"
+#define RSC_ISA_SPECRES2_CODE		"     SPECRES2 [%c]"
+#define RSC_ISA_BF16_CODE		"         BF16 [%c]"
+#define RSC_ISA_EBF16_CODE		"        EBF16 [%c]"
+#define RSC_ISA_I8MM_CODE		"         I8MM [%c]"
+#define RSC_ISA_SB_CODE			"           SB [%c]"
+#define RSC_ISA_XS_CODE			"           XS [%c]"
 #define RSC_ISA_LS64_CODE		"         LS64 [%c]"
+#define RSC_ISA_LS64_V_CODE		"       LS64_V [%c]"
+#define RSC_ISA_LS64_ACCDATA_CODE	" LS64_ACCDATA [%c]"
+#define RSC_ISA_DGH_CODE		"          DGH [%c]"
+#define RSC_ISA_DPB_CODE		"          DPB [%c]"
+#define RSC_ISA_DPB2_CODE		"         DPB2 [%c]"
 #define RSC_ISA_RAND_CODE		"         RAND [%c]"
 #define RSC_ISA_RDMA_CODE		"         RDMA [%c]"
 #define RSC_ISA_SHA1_CODE		"         SHA1 [%c]"
@@ -1997,4 +2021,5 @@
 #define RSC_ISA_SME_SF8FMA_CODE 	"   SME_SF8FMA [%c]"
 #define RSC_ISA_SME_SF8DP4_CODE 	"   SME_SF8DP4 [%c]"
 #define RSC_ISA_SME_SF8DP2_CODE 	"   SME_SF8DP2 [%c]"
-#define RSC_ISA_TS_CODE 		"           TS [%c]"
+#define RSC_ISA_FlagM_CODE 		"        FlagM [%c]"
+#define RSC_ISA_FlagM2_CODE 		"       FlagM2 [%c]"
diff --git a/aarch64/corefreq-cli-rsc-fr.h b/aarch64/corefreq-cli-rsc-fr.h
index 1b3f6149..6d867416 100644
--- a/aarch64/corefreq-cli-rsc-fr.h
+++ b/aarch64/corefreq-cli-rsc-fr.h
@@ -464,7 +464,7 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
 #define RSC_ISA_TITLE_CODE_FR		" Jeu d'instructions ""\xa9""tendu "
 
 #define RSC_ISA_AES_COMM_CODE_FR	RSC_ISA_AES_COMM_CODE_EN
-#define RSC_ISA_CAS_COMM_CODE_FR	RSC_ISA_CAS_COMM_CODE_EN
+#define RSC_ISA_LSE_COMM_CODE_FR	RSC_ISA_LSE_COMM_CODE_EN
 #define RSC_ISA_CRC32_COMM_CODE_FR	RSC_ISA_CRC32_COMM_CODE_EN
 #define RSC_ISA_DP_COMM_CODE_FR 	RSC_ISA_DP_COMM_CODE_EN
 #define RSC_ISA_FCMA_COMM_CODE_FR	RSC_ISA_FCMA_COMM_CODE_EN
@@ -472,7 +472,16 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
 #define RSC_ISA_FP_COMM_CODE_FR 	RSC_ISA_FP_COMM_CODE_EN
 #define RSC_ISA_JSCVT_COMM_CODE_FR	RSC_ISA_JSCVT_COMM_CODE_EN
 #define RSC_ISA_LRCPC_COMM_CODE_FR	RSC_ISA_LRCPC_COMM_CODE_EN
+#define RSC_ISA_FRINTTS_COMM_CODE_FR	RSC_ISA_FRINTTS_COMM_CODE_EN
+#define RSC_ISA_SPECRES_COMM_CODE_FR	RSC_ISA_SPECRES_COMM_CODE_EN
+#define RSC_ISA_BF16_COMM_CODE_FR	RSC_ISA_BF16_COMM_CODE_EN
+#define RSC_ISA_EBF16_COMM_CODE_FR	RSC_ISA_EBF16_COMM_CODE_EN
+#define RSC_ISA_I8MM_COMM_CODE_FR	RSC_ISA_I8MM_COMM_CODE_EN
+#define RSC_ISA_SB_COMM_CODE_FR 	RSC_ISA_SB_COMM_CODE_EN
+#define RSC_ISA_XS_COMM_CODE_FR 	RSC_ISA_XS_COMM_CODE_EN
 #define RSC_ISA_LS64_COMM_CODE_FR	RSC_ISA_LS64_COMM_CODE_EN
+#define RSC_ISA_DGH_COMM_CODE_FR	RSC_ISA_DGH_COMM_CODE_EN
+#define RSC_ISA_DPB_COMM_CODE_FR	RSC_ISA_DPB_COMM_CODE_EN
 #define RSC_ISA_RAND_COMM_CODE_FR	RSC_ISA_RAND_COMM_CODE_EN
 #define RSC_ISA_RDMA_COMM_CODE_FR	RSC_ISA_RDMA_COMM_CODE_EN
 #define RSC_ISA_SHA_COMM_CODE_FR	RSC_ISA_SHA_COMM_CODE_EN
@@ -480,7 +489,7 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
 #define RSC_ISA_SIMD_COMM_CODE_FR	RSC_ISA_SIMD_COMM_CODE_EN
 #define RSC_ISA_SME_COMM_CODE_FR	RSC_ISA_SME_COMM_CODE_EN
 #define RSC_ISA_SVE_COMM_CODE_FR	RSC_ISA_SVE_COMM_CODE_EN
-#define RSC_ISA_TS_COMM_CODE_FR 	RSC_ISA_TS_COMM_CODE_EN
+#define RSC_ISA_FlagM_COMM_CODE_FR 	RSC_ISA_FlagM_COMM_CODE_EN
 
 #define RSC_FEATURES_TITLE_CODE_FR	" Caract""\xa9""ristiques "
 #define RSC_ON_CODE_FR			" ON"
diff --git a/aarch64/corefreq-cli-rsc.c b/aarch64/corefreq-cli-rsc.c
index 7ebac222..50c13b50 100644
--- a/aarch64/corefreq-cli-rsc.c
+++ b/aarch64/corefreq-cli-rsc.c
@@ -666,8 +666,10 @@ RESOURCE_ST Resource[] = {
 	LDT(RSC_ISA_TITLE),
 	LDQ(RSC_ISA_AES),
 	LDT(RSC_ISA_AES_COMM),
-	LDQ(RSC_ISA_CAS),
-	LDT(RSC_ISA_CAS_COMM),
+	LDQ(RSC_ISA_PMULL),
+	LDQ(RSC_ISA_LSE),
+	LDT(RSC_ISA_LSE_COMM),
+	LDQ(RSC_ISA_LSE128),
 	LDQ(RSC_ISA_CRC32),
 	LDT(RSC_ISA_CRC32_COMM),
 	LDQ(RSC_ISA_DP),
@@ -682,8 +684,30 @@ RESOURCE_ST Resource[] = {
 	LDT(RSC_ISA_JSCVT_COMM),
 	LDQ(RSC_ISA_LRCPC),
 	LDT(RSC_ISA_LRCPC_COMM),
+	LDQ(RSC_ISA_FRINTTS),
+	LDT(RSC_ISA_FRINTTS_COMM),
+	LDQ(RSC_ISA_SPECRES),
+	LDT(RSC_ISA_SPECRES_COMM),
+	LDQ(RSC_ISA_SPECRES2),
+	LDQ(RSC_ISA_BF16),
+	LDT(RSC_ISA_BF16_COMM),
+	LDQ(RSC_ISA_EBF16),
+	LDT(RSC_ISA_EBF16_COMM),
+	LDQ(RSC_ISA_I8MM),
+	LDT(RSC_ISA_I8MM_COMM),
+	LDQ(RSC_ISA_SB),
+	LDT(RSC_ISA_SB_COMM),
+	LDQ(RSC_ISA_XS),
+	LDT(RSC_ISA_XS_COMM),
 	LDQ(RSC_ISA_LS64),
 	LDT(RSC_ISA_LS64_COMM),
+	LDQ(RSC_ISA_LS64_V),
+	LDQ(RSC_ISA_LS64_ACCDATA),
+	LDQ(RSC_ISA_DGH),
+	LDT(RSC_ISA_DGH_COMM),
+	LDQ(RSC_ISA_DPB),
+	LDT(RSC_ISA_DPB_COMM),
+	LDQ(RSC_ISA_DPB2),
 	LDQ(RSC_ISA_RAND),
 	LDT(RSC_ISA_RAND_COMM),
 	LDQ(RSC_ISA_RDMA),
@@ -732,8 +756,9 @@ RESOURCE_ST Resource[] = {
 	LDQ(RSC_ISA_SME_SF8FMA),
 	LDQ(RSC_ISA_SME_SF8DP4),
 	LDQ(RSC_ISA_SME_SF8DP2),
-	LDQ(RSC_ISA_TS),
-	LDT(RSC_ISA_TS_COMM),
+	LDQ(RSC_ISA_FlagM),
+	LDT(RSC_ISA_FlagM_COMM),
+	LDQ(RSC_ISA_FlagM2),
 	LDT(RSC_FEATURES_TITLE),
 	LDT(RSC_ON),
 	LDT(RSC_OFF),
diff --git a/aarch64/corefreq-cli-rsc.h b/aarch64/corefreq-cli-rsc.h
index 35ccb738..38520446 100644
--- a/aarch64/corefreq-cli-rsc.h
+++ b/aarch64/corefreq-cli-rsc.h
@@ -489,8 +489,10 @@ enum {
 	RSC_ISA_TITLE,
 	RSC_ISA_AES,
 	RSC_ISA_AES_COMM,
-	RSC_ISA_CAS,
-	RSC_ISA_CAS_COMM,
+	RSC_ISA_PMULL,
+	RSC_ISA_LSE,
+	RSC_ISA_LSE_COMM,
+	RSC_ISA_LSE128,
 	RSC_ISA_CRC32,
 	RSC_ISA_CRC32_COMM,
 	RSC_ISA_DP,
@@ -505,8 +507,30 @@ enum {
 	RSC_ISA_JSCVT_COMM,
 	RSC_ISA_LRCPC,
 	RSC_ISA_LRCPC_COMM,
+	RSC_ISA_FRINTTS,
+	RSC_ISA_FRINTTS_COMM,
+	RSC_ISA_SPECRES,
+	RSC_ISA_SPECRES_COMM,
+	RSC_ISA_SPECRES2,
+	RSC_ISA_BF16,
+	RSC_ISA_BF16_COMM,
+	RSC_ISA_EBF16,
+	RSC_ISA_EBF16_COMM,
+	RSC_ISA_I8MM,
+	RSC_ISA_I8MM_COMM,
+	RSC_ISA_SB,
+	RSC_ISA_SB_COMM,
+	RSC_ISA_XS,
+	RSC_ISA_XS_COMM,
 	RSC_ISA_LS64,
 	RSC_ISA_LS64_COMM,
+	RSC_ISA_LS64_V,
+	RSC_ISA_LS64_ACCDATA,
+	RSC_ISA_DGH,
+	RSC_ISA_DGH_COMM,
+	RSC_ISA_DPB,
+	RSC_ISA_DPB_COMM,
+	RSC_ISA_DPB2,
 	RSC_ISA_RAND,
 	RSC_ISA_RAND_COMM,
 	RSC_ISA_RDMA,
@@ -555,8 +579,9 @@ enum {
 	RSC_ISA_SME_SF8FMA,
 	RSC_ISA_SME_SF8DP4,
 	RSC_ISA_SME_SF8DP2,
-	RSC_ISA_TS,
-	RSC_ISA_TS_COMM,
+	RSC_ISA_FlagM,
+	RSC_ISA_FlagM_COMM,
+	RSC_ISA_FlagM2,
 	RSC_FEATURES_TITLE,
 	RSC_ON,
 	RSC_OFF,
diff --git a/aarch64/corefreq-cli.c b/aarch64/corefreq-cli.c
index eaaeaea9..251316ea 100644
--- a/aarch64/corefreq-cli.c
+++ b/aarch64/corefreq-cli.c
@@ -1369,10 +1369,10 @@ REASON_CODE SysInfoISA( Window *win,
 	},
 	{
 		NULL,
-		RSC(ISA_CAS).CODE(), RSC(ISA_CAS_COMM).CODE(),
-		{ 0, RO(Shm)->Proc.Features.CAS },
+		RSC(ISA_BF16).CODE(), RSC(ISA_BF16_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.BF16 },
 		(unsigned short[])
-		{ RO(Shm)->Proc.Features.CAS },
+		{ RO(Shm)->Proc.Features.BF16 },
 	},
 	{
 		NULL,
@@ -1381,6 +1381,14 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.CRC32 },
 	},
+/* Row Mark */
+	{
+		NULL,
+		RSC(ISA_DGH).CODE(), RSC(ISA_DGH_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.DGH },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.DGH },
+	},
 	{
 		NULL,
 		RSC(ISA_DP).CODE(), RSC(ISA_DP_COMM).CODE(),
@@ -1388,7 +1396,28 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.DP },
 	},
+	{
+		NULL,
+		RSC(ISA_DPB).CODE(), RSC(ISA_DPB_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.DPB },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.DPB },
+	},
+	{
+		NULL,
+		RSC(ISA_DPB2).CODE(), RSC(ISA_DPB_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.DPB2 },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.DPB2 },
+	},
 /* Row Mark */
+	{
+		NULL,
+		RSC(ISA_EBF16).CODE(), RSC(ISA_EBF16_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.EBF16 },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.EBF16 },
+	},
 	{
 		NULL,
 		RSC(ISA_FCMA).CODE(), RSC(ISA_FCMA_COMM).CODE(),
@@ -1403,6 +1432,20 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.FHM },
 	},
+	{
+		NULL,
+		RSC(ISA_FlagM).CODE(), RSC(ISA_FlagM_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.FlagM },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.FlagM },
+	},
+	{
+		NULL,
+		RSC(ISA_FlagM2).CODE(), RSC(ISA_FlagM_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.FlagM2 },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.FlagM2 },
+	},
 	{
 		NULL,
 		RSC(ISA_FP).CODE(), RSC(ISA_FP_COMM).CODE(),
@@ -1410,6 +1453,21 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.FP },
 	},
+/* Row Mark */
+	{
+		NULL,
+		RSC(ISA_FRINTTS).CODE(), RSC(ISA_FRINTTS_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.FRINTTS },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.FRINTTS },
+	},
+	{
+		NULL,
+		RSC(ISA_I8MM).CODE(), RSC(ISA_I8MM_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.I8MM },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.I8MM },
+	},
 	{
 		NULL,
 		RSC(ISA_JSCVT).CODE(), RSC(ISA_JSCVT_COMM).CODE(),
@@ -1417,7 +1475,6 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.JSCVT },
 	},
-/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_LRCPC).CODE(), RSC(ISA_LRCPC_COMM).CODE(),
@@ -1425,6 +1482,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.LRCPC },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_LS64).CODE(), RSC(ISA_LS64_COMM).CODE(),
@@ -1432,6 +1490,41 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.LS64 },
 	},
+	{
+		NULL,
+		RSC(ISA_LS64_V).CODE(), RSC(ISA_LS64_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.LS64_V },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.LS64_V },
+	},
+	{
+		NULL,
+		RSC(ISA_LS64_ACCDATA).CODE(), RSC(ISA_LS64_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.LS64_ACCDATA },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.LS64_ACCDATA },
+	},
+	{
+		NULL,
+		RSC(ISA_LSE).CODE(), RSC(ISA_LSE_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.LSE },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.LSE },
+	},
+	{
+		NULL,
+		RSC(ISA_LSE128).CODE(), RSC(ISA_LSE_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.LSE128 },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.LSE128 },
+	},
+	{
+		NULL,
+		RSC(ISA_PMULL).CODE(), RSC(ISA_AES_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.PMULL },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.PMULL },
+	},
 	{
 		NULL,
 		RSC(ISA_RAND).CODE(), RSC(ISA_RAND_COMM).CODE(),
@@ -1439,6 +1532,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.RAND },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_RDMA).CODE(), RSC(ISA_RDMA_COMM).CODE(),
@@ -1446,7 +1540,13 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.RDMA },
 	},
-/* Row Mark */
+	{
+		NULL,
+		RSC(ISA_SB).CODE(), RSC(ISA_SB_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.SB },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.SB },
+	},
 	{
 		NULL,
 		RSC(ISA_SHA1).CODE(), RSC(ISA_SHA_COMM).CODE(),
@@ -1461,6 +1561,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SHA256 },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SHA512).CODE(), RSC(ISA_SHA_COMM).CODE(),
@@ -1475,7 +1576,6 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SHA3 },
 	},
-/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SIMD).CODE(), RSC(ISA_SIMD_COMM).CODE(),
@@ -1490,6 +1590,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SM3 },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SM4).CODE(), RSC(ISA_SM_COMM).CODE(),
@@ -1504,7 +1605,6 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME },
 	},
-/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME2).CODE(), RSC(ISA_SME_COMM).CODE(),
@@ -1519,6 +1619,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME2p1 },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_FA64).CODE(), NULL,
@@ -1533,7 +1634,6 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_LUTv2 },
 	},
-/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_I16I64).CODE(), NULL,
@@ -1548,6 +1648,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_F64F64 },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_I16I32).CODE(), NULL,
@@ -1562,7 +1663,6 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_B16B16 },
 	},
-/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_F16F16).CODE(), NULL,
@@ -1577,6 +1677,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_F8F16 },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_F8F32).CODE(), NULL,
@@ -1591,7 +1692,6 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_I8I32 },
 	},
-/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_F16F32).CODE(), NULL,
@@ -1606,6 +1706,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_B16F32 },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_BI32I32).CODE(), NULL,
@@ -1620,7 +1721,6 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_F32F32 },
 	},
-/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_SF8FMA).CODE(), NULL,
@@ -1635,6 +1735,7 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_SF8DP4 },
 	},
+/* Row Mark */
 	{
 		NULL,
 		RSC(ISA_SME_SF8DP2).CODE(), NULL,
@@ -1642,6 +1743,20 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SME_SF8DP2 },
 	},
+	{
+		NULL,
+		RSC(ISA_SPECRES).CODE(), RSC(ISA_SPECRES_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.SPECRES },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.SPECRES },
+	},
+	{
+		NULL,
+		RSC(ISA_SPECRES2).CODE(), RSC(ISA_SPECRES_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.SPECRES2 },
+		(unsigned short[])
+		{ RO(Shm)->Proc.Features.SPECRES2 },
+	},
 	{
 		NULL,
 		RSC(ISA_SVE).CODE(), RSC(ISA_SVE_COMM).CODE(),
@@ -1729,12 +1844,13 @@ REASON_CODE SysInfoISA( Window *win,
 		(unsigned short[])
 		{ RO(Shm)->Proc.Features.SVE_PMULL128 },
 	},
+/* Row Mark */
 	{
 		NULL,
-		RSC(ISA_TS).CODE(), RSC(ISA_TS_COMM).CODE(),
-		{ 0, RO(Shm)->Proc.Features.TS },
+		RSC(ISA_XS).CODE(), RSC(ISA_XS_COMM).CODE(),
+		{ 0, RO(Shm)->Proc.Features.XS },
 		(unsigned short[])
-		{ RO(Shm)->Proc.Features.TS },
+		{ RO(Shm)->Proc.Features.XS },
 	},
     };
 	CUINT cells_per_line = win->matrix.size.wth, *nl = &cells_per_line;
@@ -6794,7 +6910,7 @@ Window *CreateTopology(unsigned long long id)
 
 Window *CreateISA(unsigned long long id)
 {
-	Window *wISA = CreateWindow(wLayer, id, 4, 13, 6, TOP_HEADER_ROW + 2);
+	Window *wISA = CreateWindow(wLayer, id, 4, 15, 6, TOP_HEADER_ROW + 2);
 
 	if (wISA != NULL)
 	{
diff --git a/aarch64/corefreqk.c b/aarch64/corefreqk.c
index 50e2b34f..39546543 100644
--- a/aarch64/corefreqk.c
+++ b/aarch64/corefreqk.c
@@ -605,12 +605,15 @@ static void Query_Features(void *pArg)
 		break;
 	}
 	switch (isar0.AES) {
-	case 0b0001:
 	case 0b0010:
+		iArg->Features->PMULL = 1;
+		fallthrough;
+	case 0b0001:
 		iArg->Features->AES = 1;
 		break;
 	case 0b0000:
 	default:
+		iArg->Features->PMULL = \
 		iArg->Features->AES = 0;
 		break;
 	}
@@ -655,13 +658,16 @@ static void Query_Features(void *pArg)
 		break;
 	}
 	switch (isar0.CAS) {
-	case 0b0010:
 	case 0b0011:
-		iArg->Features->CAS = 1;
+		iArg->Features->LSE128 = 1;
+		fallthrough;
+	case 0b0010:
+		iArg->Features->LSE = 1;
 		break;
 	case 0b0000:
 	default:
-		iArg->Features->CAS = 0;
+		iArg->Features->LSE128 = \
+		iArg->Features->LSE = 0;
 		break;
 	}
 	switch (isar0.TME) {
@@ -719,13 +725,16 @@ static void Query_Features(void *pArg)
 		break;
 	}
 	switch (isar0.TS) {
-	case 0b0001:
 	case 0b0010:
-		iArg->Features->TS = 1;
+		iArg->Features->FlagM2 = 1;
+		fallthrough;
+	case 0b0001:
+		iArg->Features->FlagM = 1;
 		break;
 	case 0b0000:
 	default:
-		iArg->Features->TS = 0;
+		iArg->Features->FlagM2 = \
+		iArg->Features->FlagM = 0;
 		break;
 	}
 	switch (isar0.TLB) {
@@ -775,17 +784,107 @@ static void Query_Features(void *pArg)
 		iArg->Features->JSCVT = 0;
 		break;
 	}
-	switch (isar1.LS64) {
+	switch (isar1.FRINTTS) {
+	case 0b0001:
+		iArg->Features->FRINTTS = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->FRINTTS = 0;
+		break;
+	}
+	switch (isar1.SPECRES) {
+	case 0b0010:
+		iArg->Features->SPECRES2 = 1;
+		fallthrough;
 	case 0b0001:
+		iArg->Features->SPECRES = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->SPECRES2 = \
+		iArg->Features->SPECRES = 0;
+		break;
+	}
+	switch (isar1.BF16) {
 	case 0b0010:
+		iArg->Features->EBF16 = 1;
+		fallthrough;
+	case 0b0001:
+		iArg->Features->BF16 = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->EBF16 = \
+		iArg->Features->BF16 = 0;
+		break;
+	}
+	switch (isar1.I8MM) {
+	case 0b0001:
+		iArg->Features->I8MM = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->I8MM = 0;
+		break;
+	}
+	switch (isar1.SB) {
+	case 0b0001:
+		iArg->Features->SB = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->SB = 0;
+		break;
+	}
+	switch (isar1.XS) {
+	case 0b0001:
+		iArg->Features->XS = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->XS = 0;
+		break;
+	}
+	switch (isar1.LS64) {
 	case 0b0011:
+		iArg->Features->LS64_ACCDATA = 1;
+		fallthrough;
+	case 0b0010:
+		iArg->Features->LS64_V = 1;
+		fallthrough;
+	case 0b0001:
 		iArg->Features->LS64 = 1;
 		break;
 	case 0b0000:
 	default:
+		iArg->Features->LS64_ACCDATA = \
+		iArg->Features->LS64_V = \
 		iArg->Features->LS64 = 0;
 		break;
 	}
+	switch (isar1.DGH) {
+	case 0b0001:
+		iArg->Features->DGH = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->DGH = 0;
+		break;
+	}
+	switch (isar1.DPB) {
+	case 0b0010:
+		iArg->Features->DPB2 = 1;
+		fallthrough;
+	case 0b0001:
+		iArg->Features->DPB = 1;
+		break;
+	case 0b0000:
+	default:
+		iArg->Features->DPB2 = \
+		iArg->Features->DPB = 0;
+		break;
+	}
 	switch (mmfr1.VH) {
 	case 0b0001:
 		iArg->Features->VHE = 1;
diff --git a/aarch64/coretypes.h b/aarch64/coretypes.h
index 801e9d47..1d127178 100644
--- a/aarch64/coretypes.h
+++ b/aarch64/coretypes.h
@@ -780,7 +780,7 @@ typedef struct	/* BSP features.					*/
 			SHA256		:  3-2,
 			SHA512		:  4-3,
 			CRC32		:  5-4,
-			CAS		:  6-5,
+			LSE		:  6-5,
 			SHA3		:  7-6,
 			RAND		:  8-7,
 			FP		:  9-8,
@@ -795,13 +795,29 @@ typedef struct	/* BSP features.					*/
 			SM3		: 18-17,
 			SM4		: 19-18,
 			FHM		: 20-19,
-			TS		: 21-20,
+			LSE128		: 21-20,
 			TLB		: 22-21,
 			FCMA		: 23-22,
 			LRCPC		: 24-23,
 			JSCVT		: 25-24,
-			LS64		: 26-25,
-			_Unused1_	: 64-26;
+			FRINTTS 	: 26-25,
+			SPECRES		: 27-26,
+			SPECRES2	: 28-27,
+			BF16		: 29-28,
+			EBF16		: 30-29,
+			I8MM		: 31-30,
+			SB		: 32-31,
+			XS		: 33-32,
+			LS64		: 34-33,
+			LS64_V		: 35-34,
+			LS64_ACCDATA	: 36-35,
+			DGH		: 37-36,
+			DPB		: 38-37,
+			DPB2		: 39-38,
+			FlagM		: 40-39,
+			FlagM2		: 41-40,
+			PMULL		: 42-41,
+			_Unused1_	: 64-42;
 
 		Bit64	CSV2		:  4-0,
 			SSBS		:  8-4,