diff --git a/package-lock.json b/package-lock.json new file mode 100644 index 0000000..b905291 --- /dev/null +++ b/package-lock.json @@ -0,0 +1,6 @@ +{ + "name": "datenlord.github.io", + "lockfileVersion": 3, + "requires": true, + "packages": {} +} diff --git a/zh-cn/assets/cover-07c14bd5.jpg b/zh-cn/assets/cover-07c14bd5.jpg deleted file mode 100644 index cbb7255..0000000 Binary files a/zh-cn/assets/cover-07c14bd5.jpg and /dev/null differ diff --git a/zh-cn/assets/cover-5856255d.png b/zh-cn/assets/cover-5856255d.png new file mode 100644 index 0000000..f102e37 Binary files /dev/null and b/zh-cn/assets/cover-5856255d.png differ diff --git a/zh-cn/assets/cover-7357bfdb.png b/zh-cn/assets/cover-7357bfdb.png new file mode 100644 index 0000000..88a98fe Binary files /dev/null and b/zh-cn/assets/cover-7357bfdb.png differ diff --git a/zh-cn/assets/cover-b2241eaf.png b/zh-cn/assets/cover-b2241eaf.png new file mode 100644 index 0000000..80b1fa3 Binary files /dev/null and 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a/zh-cn/assets/index-63a73b24.js b/zh-cn/assets/index-0b4fd2ad.js similarity index 92% rename from zh-cn/assets/index-63a73b24.js rename to zh-cn/assets/index-0b4fd2ad.js index 4212568..9311f36 100644 --- a/zh-cn/assets/index-63a73b24.js +++ b/zh-cn/assets/index-0b4fd2ad.js @@ -1,4 +1,4 @@ -const p="/zh-cn/assets/cover-9e502538.png",n="/zh-cn/assets/image1-09ca1c97.jpg",s="/zh-cn/assets/image2-f93efd4a.jpg",t="/zh-cn/assets/image1-50beaba8.png",r=[p,n,s,t],a={label:"SpinalHDL的使用和开发经验研讨会",description:"SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。",cover:"./cover.png",location:"中国香港",date:"2023-07-03",title:"SpinalHDL usage and development experience workshop"},o=[],g=`

SpinalHDL 始于 2014 年，最初是作为 VHDL/Verilog 的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。

+const p="/zh-cn/assets/cover-9e502538.png",n="/zh-cn/assets/image1-09ca1c97.jpg",s="/zh-cn/assets/image2-f93efd4a.jpg",t="/zh-cn/assets/image1-50beaba8.png",a=[p,n,s,t],o={label:"SpinalHDL的使用和开发经验研讨会",description:"SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。",cover:"./cover.png",location:"中国香港",date:"2023-07-03",title:"SpinalHDL usage and development experience workshop"},r=[],g=`

SpinalHDL 始于 2014 年，最初是作为 VHDL/Verilog 的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。

达坦科技（DatenLord） 致力于打造高性能跨云存储，其通过软硬件深度融合的方式打破云之间的壁垒，实现高性能跨云数据访问，提供海量异地、异构数据的统一存储访问机制，为云上应用提供高性能安全存储支持。

达坦科技采用硬件加速提升存储性能，目前采用 FPGA、ASIC 实现存储相关场景的性能加速。SpinalHDL 是达坦科技在产品中使用的硬件描述语言之一，达坦科技也一直热心于推广 SpinalHDL 在业界的落地应用。在 2022 年 12 月，达坦科技曾联合 SpinalHDL 社区举办一场题为《SpinalHDL 应用前景探索》的线上研讨会，收获海内外 SpinalHDL 爱好者的欢迎。

而在北京时间 2023 年 7 月 7 日下午 14:00-17:00，达坦科技将联合 SpinalHDL 社区，以及四川芯测电子技术有限公司举办一场题为 SpinalHDL 的使用和开发经验研讨会，旨在和大家分享 SpinalHDL 最新的实践、挑战和经验的分享。

@@ -13,4 +13,4 @@ const p="/zh-cn/assets/cover-9e502538.png",n="/zh-cn/assets/image1-09ca1c97.jpg" 474-6575-9473

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对开源硬件感兴趣的朋友，可以添加小助手微信，加入达坦科技硬件群。

-

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`;export{r as assetURLs,g as default,a as metadata,o as toc}; +

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`;export{a as assetURLs,g as default,o as metadata,r as toc}; diff --git a/zh-cn/assets/index-5fe92975.js b/zh-cn/assets/index-0c908ba4.js similarity index 99% rename from zh-cn/assets/index-5fe92975.js rename to zh-cn/assets/index-0c908ba4.js index c09ae19..c6f3108 100644 --- a/zh-cn/assets/index-5fe92975.js +++ b/zh-cn/assets/index-0c908ba4.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-1329fc54.png",l="/zh-cn/assets/image1-03c3323d.png",s="/zh-cn/assets/image2-19f32eff.png",i="/zh-cn/assets/image3-7a5e2db9.png",a="/zh-cn/assets/image4-a055bd84.png",t="/zh-cn/assets/image5-b8622f96.png",p="/zh-cn/assets/image6-5093ee75.png",n="/zh-cn/assets/image7-9fa09d91.png",o="/zh-cn/assets/image8-84dd6aec.png",c="/zh-cn/assets/image9-2f762488.png",r="/zh-cn/assets/image10-f2b55246.png",h="/zh-cn/assets/image11-c5d501bb.png",d="/zh-cn/assets/image12-56434254.png",m="/zh-cn/assets/image13-1c12a6c5.png",u="/zh-cn/assets/image14-69943dbe.png",b="/zh-cn/assets/image15-45a7b638.png",g="/zh-cn/assets/image16-5b765721.jpg",f="/zh-cn/assets/image17-8fb19d7c.jpg",R="/zh-cn/assets/image18-c8c4d5a1.jpg",S="/zh-cn/assets/image19-fb1e5167.png",_="/zh-cn/assets/image20-a391e7d8.jpg",y=[e,l,s,i,a,t,p,n,o,c,r,h,d,m,u,b,g,f,R,S,_],v={label:"计算机体系结构｜MIT6.175和MIT6.375学习笔记",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。现在，完成第一期学习的同学整理了MIT6.175和MIT6.375的关键内容以及Lab实践的学习笔记。",cover:"./cover.png",location:"中国香港",author:["kazutoiris"],tags:["硬件加速"],date:"2023-05-17",title:"Computer Architecture｜MIT6.175 and MIT6.375 Study Notes"},C=[{label:"MIT 6.175",level:2},{label:"环境搭建",level:3},{label:"四种 FIFO (Lab 4)",level:3},{label:"Ready 和 Valid 握手",level:3},{label:"EHR 寄存器 (Lab4)",level:3},{label:"RISC-V (Lab5)",level:3},{label:"Branch Prediction (Lab6)",level:3},{label:"DDR3 Memory (Lab7)",level:3},{label:"Cache Coherence (Project)",level:3},{label:"MIT 6.375",level:2},{label:"Bluespec 中的一些特性",level:3},{label:"CORDIC 算法",level:3},{label:"一些常用的概念",level:2},{label:"Setup Time 、Hold Time 和 Clock-to-Q Time",level:3},{label:"SRAM",level:3},{label:"DRAM",level:3},{label:"References",level:2}],M=`

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+const e="/zh-cn/assets/cover-1329fc54.png",l="/zh-cn/assets/image1-03c3323d.png",s="/zh-cn/assets/image2-19f32eff.png",i="/zh-cn/assets/image3-7a5e2db9.png",a="/zh-cn/assets/image4-a055bd84.png",t="/zh-cn/assets/image5-b8622f96.png",p="/zh-cn/assets/image6-5093ee75.png",n="/zh-cn/assets/image7-9fa09d91.png",o="/zh-cn/assets/image8-84dd6aec.png",c="/zh-cn/assets/image9-2f762488.png",r="/zh-cn/assets/image10-f2b55246.png",h="/zh-cn/assets/image11-c5d501bb.png",d="/zh-cn/assets/image12-56434254.png",m="/zh-cn/assets/image13-1c12a6c5.png",u="/zh-cn/assets/image14-69943dbe.png",b="/zh-cn/assets/image15-45a7b638.png",g="/zh-cn/assets/image16-5b765721.jpg",f="/zh-cn/assets/image17-8fb19d7c.jpg",R="/zh-cn/assets/image18-c8c4d5a1.jpg",S="/zh-cn/assets/image19-fb1e5167.png",_="/zh-cn/assets/image20-a391e7d8.jpg",y=[e,l,s,i,a,t,p,n,o,c,r,h,d,m,u,b,g,f,R,S,_],v={label:"计算机体系结构｜MIT6.175和MIT6.375学习笔记",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。现在，完成第一期学习的同学整理了MIT6.175和MIT6.375的关键内容以及Lab实践的学习笔记。",cover:"./cover.png",location:"中国香港",author:["kazutoiris"],tags:["硬件加速"],date:"2023-05-17",title:"Computer Architecture｜MIT6.175 and MIT6.375 Study Notes"},M=[{label:"MIT 6.175",level:2},{label:"环境搭建",level:3},{label:"四种 FIFO (Lab 4)",level:3},{label:"Ready 和 Valid 握手",level:3},{label:"EHR 寄存器 (Lab4)",level:3},{label:"RISC-V (Lab5)",level:3},{label:"Branch Prediction (Lab6)",level:3},{label:"DDR3 Memory (Lab7)",level:3},{label:"Cache Coherence (Project)",level:3},{label:"MIT 6.375",level:2},{label:"Bluespec 中的一些特性",level:3},{label:"CORDIC 算法",level:3},{label:"一些常用的概念",level:2},{label:"Setup Time 、Hold Time 和 Clock-to-Q Time",level:3},{label:"SRAM",level:3},{label:"DRAM",level:3},{label:"References",level:2}],C=`

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在 2023 年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。现在，完成第一期学习的同学整理了 MIT6.175 和 MIT6.375 的关键内容以及 Lab 实践的学习笔记。

6.175 和 6.375 的课程和 Lab 学习都有一定的难度，要求采用 Bluespec 语言实现 RISC-V 处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab 环节还涉及软硬件联合开发，要求基于所实现的 RISC-V 处理器运行真实的 RISC-V 程序，并给出性能评估。希望第一期学员（GitHub:kazutoiris ）的学习笔记对想从事数字芯片设计的工程师有所帮助。

MIT 6.175

@@ -380,4 +380,4 @@ All the images in this section are cited from [宇芯电子].

达坦科技硬件设计学习社区持续开放，点击原文了解社区学习详情。若想询问加入细节，请添加下方小助手微信号或info@datenlord.com

-

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`;export{y as assetURLs,M as default,v as metadata,C as toc}; +

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`;export{y as assetURLs,C as default,v as metadata,M as toc}; diff --git a/zh-cn/assets/index-674b00c3.js b/zh-cn/assets/index-12a2a854.js similarity index 91% rename from zh-cn/assets/index-674b00c3.js rename to zh-cn/assets/index-12a2a854.js index 0f9a28a..aff611b 100644 --- a/zh-cn/assets/index-674b00c3.js +++ b/zh-cn/assets/index-12a2a854.js @@ -1,4 +1,4 @@ -const o="/zh-cn/assets/cover-9c53ea5f.png",t="/zh-cn/assets/imgae1-084eb861.jpg",e=[o,t],s={label:"硬件敏捷开发与验证方法学研讨",description:"作为2022年第二届RISC-V中国峰会的同期活动，8月27日下午，达坦科技将在线上举办硬件敏捷开发与验证方法学研讨。",cover:"./cover.png",location:"新加坡",date:"2022-08-23",title:"Hardware Agile Development and Verification Methodology Workshop"},n=[],c=`

作为 2022 年第二届 RISC-V 中国峰会的同期活动，8 月 27 日下午，达坦科技将在线上举办硬件敏捷开发与验证方法学研讨。

+const o="/zh-cn/assets/cover-9c53ea5f.png",t="/zh-cn/assets/imgae1-084eb861.jpg",e=[o,t],n={label:"硬件敏捷开发与验证方法学研讨",description:"作为2022年第二届RISC-V中国峰会的同期活动，8月27日下午，达坦科技将在线上举办硬件敏捷开发与验证方法学研讨。",cover:"./cover.png",location:"新加坡",date:"2022-08-23",title:"Hardware Agile Development and Verification Methodology Workshop"},s=[],r=`

作为 2022 年第二届 RISC-V 中国峰会的同期活动，8 月 27 日下午，达坦科技将在线上举办硬件敏捷开发与验证方法学研讨。

如何提升数字芯片的开发和验证效率一直是业界关注的焦点。近年来随着 Chisel、SpinalHDL 等等一众新一代 HDL 的推出，业界逐步感受到新一代 HDL 在数字芯片设计效率方面的提升。相比 Verilog 和 VHDL，这些新一代 HDL 在语法表达能力、代码简洁程度、错误检查等方面有不小的提升；相比高阶综合 HLS，这些新一代 HDL 支持 RTL 级描述能力，在芯片性能的把控方面远超 HLS。此外，基于 Python，以 Cocotb 和 pyuvm 为代表的新一代验证框架的推出，使得验证的周期得到一定程度的缩减，特别是基于 Python 的验证框架可以复用 Python 生态丰富的已有工具和模型，大大减少了 Golden Reference 的工作量。

更重要的是，这些新一代 HDL 打开了全新的数字芯片敏捷设计和验证的方法学大门。本次研讨将邀请业界多位专家分享他们在各自领域的硬件敏捷开发与验证实践经验，为业界提供一次深入探讨和交流的机会，促进硬件敏捷开发与验证方法学的发展与落地。

参与本次研讨的听众可以深入了解业界关于硬件敏捷开发与验证的最前沿探索，诸如：

@@ -11,4 +11,4 @@ const o="/zh-cn/assets/cover-9c53ea5f.png",t="/zh-cn/assets/imgae1-084eb861.jpg"

活动时间：8 月 27 日，13:15-17:15
活动链接：https://t.elecfans.com/live/2113.html
感兴趣的听众可以添加海报中的群主二维码加入讨论群，添加时请注明硬件敏捷开发和验证方法学研讨。

-

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`;export{e as assetURLs,c as default,s as metadata,n as toc}; +

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`;export{e as assetURLs,r as default,n as metadata,s as toc}; diff --git a/zh-cn/assets/index-28613687.js b/zh-cn/assets/index-15895cd6.js similarity index 93% rename from zh-cn/assets/index-28613687.js rename to zh-cn/assets/index-15895cd6.js index e1be927..0cdacf3 100644 --- a/zh-cn/assets/index-28613687.js +++ b/zh-cn/assets/index-15895cd6.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-9c53ea5f.png",n="/zh-cn/assets/image1-52cf1c3c.jpg",s="/zh-cn/assets/image1-0a18e154.png",o=[t,n,s],a={label:"SpinalHDL应用前景探索线上研讨会",description:"新一代硬件描述语言SpinalHDL的发明人Charles Papon说，SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注，那么SpinalHDL有哪些最新的进展和落地实践呢？",cover:"./cover.png",location:"中国香港",date:"2022-12-08",title:"SpinalHDL Application Prospect Exploration Online Seminar"},r=[{label:"线上研讨会",level:2}],p=`

新一代硬件描述语言 SpinalHDL 的发明人 Charles Papon 说，SpinalHDL 始于 2014 年，最初是作为 VHDL/Verilog 的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注，那么 SpinalHDL 有哪些最新的进展和落地实践呢？

+const o="/zh-cn/assets/cover-9c53ea5f.png",n="/zh-cn/assets/image1-52cf1c3c.jpg",t="/zh-cn/assets/image1-0a18e154.png",s=[o,n,t],a={label:"SpinalHDL应用前景探索线上研讨会",description:"新一代硬件描述语言SpinalHDL的发明人Charles Papon说，SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注，那么SpinalHDL有哪些最新的进展和落地实践呢？",cover:"./cover.png",location:"中国香港",date:"2022-12-08",title:"SpinalHDL Application Prospect Exploration Online Seminar"},r=[{label:"线上研讨会",level:2}],p=`

新一代硬件描述语言 SpinalHDL 的发明人 Charles Papon 说，SpinalHDL 始于 2014 年，最初是作为 VHDL/Verilog 的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注，那么 SpinalHDL 有哪些最新的进展和落地实践呢？

线上研讨会

达坦科技（DatenLord） 致力于打造高性能跨云存储，其通过软硬件深度融合的方式打破云之间的壁垒，实现高性能跨云数据访问，提供海量异地、异构数据的统一存储访问机制，为云上应用提供高性能安全存储支持。达坦科技采用硬件加速提升存储性能，目前采用 FPGA、ASIC 实现存储相关场景的性能加速。SpinalHDL 是达坦科技在产品中使用的硬件描述语言之一，达坦科技也一直热心于推广 SpinalHDL 在业界的落地应用。

为了让对开源硬件感兴趣的朋友进一步了解 SpinalHDL，在北京时间 2022 年 12 月 16 日下午 17:00-21:00，达坦科技联合 SpinalHDL 社区举办一场题为《SpinalHDL 应用前景探索》的线上研讨会（Webinar），本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程 （Flow）。

@@ -11,4 +11,4 @@ const t="/zh-cn/assets/cover-9c53ea5f.png",n="/zh-cn/assets/image1-52cf1c3c.jpg" 会议号：830 6630 7799
密码：1216

对开源硬件感兴趣的朋友，可以添加小助手微信，加入达坦科技硬件群。

-

图片

`;export{o as assetURLs,p as default,a as metadata,r as toc}; +

图片

`;export{s as assetURLs,p as default,a as metadata,r as toc}; diff --git a/zh-cn/assets/index-26ca6215.js b/zh-cn/assets/index-1959a67e.js similarity index 95% rename from zh-cn/assets/index-26ca6215.js rename to zh-cn/assets/index-1959a67e.js index 0902777..f909e8b 100644 --- a/zh-cn/assets/index-26ca6215.js +++ b/zh-cn/assets/index-1959a67e.js @@ -1,4 +1,4 @@ -const o="/zh-cn/assets/cover-964a3e23.png",e="/zh-cn/assets/image1-c300ce2e.png",n="/zh-cn/assets/image2-b3df764b.png",l="/zh-cn/assets/image3-6b1d2584.png",s="/zh-cn/assets/image4-034a33e9.png",t="/zh-cn/assets/image5-6a5e807d.png",i=[o,e,n,l,s,t],p={label:"达坦科技2023开源毕业设计实习招募中",description:"自1984年Richard Stallman发起GMU和Free Software Foundation，开源作为一种全新的软件开发和使用模式正式诞生。One for All, All for One的理念传播开后，之后的40年里在开源软件社区被无数开发者实践和传承。开源软件因其节省费用（不需要购买许可证，大大降低了IT投入成本）、安全稳定（安全漏洞少）、技术成熟、个性化定制、自主知识产权等优势获得喜人的发展，由此我们也见证了无数开源软件项目的成长和成熟",cover:"./cover.png",location:"海南",date:"2023-01-06",title:"Datan Technology 2023 Open Source Graduation Design Internship Recruitment"},a=[{label:"毕设项目的背景",level:2},{label:"细分方向",level:2},{label:"开源毕设导师组",level:2},{label:"开源毕设项目的流程",level:2},{label:"申请流程",level:2}],r=`

自 1984 年 Richard Stallman 发起 GMU 和 Free Software Foundation，开源作为一种全新的软件开发和使用模式正式诞生。One for All, All for One 的理念传播开后，之后的 40 年里在开源软件社区被无数开发者实践和传承。开源软件因其节省费用（不需要购买许可证，大大降低了 IT 投入成本）、安全稳定（安全漏洞少）、技术成熟、个性化定制、自主知识产权等优势获得喜人的发展，由此我们也见证了无数开源软件项目的成长和成熟

+const i="/zh-cn/assets/cover-964a3e23.png",e="/zh-cn/assets/image1-c300ce2e.png",n="/zh-cn/assets/image2-b3df764b.png",l="/zh-cn/assets/image3-6b1d2584.png",s="/zh-cn/assets/image4-034a33e9.png",t="/zh-cn/assets/image5-6a5e807d.png",o=[i,e,n,l,s,t],r={label:"达坦科技2023开源毕业设计实习招募中",description:"自1984年Richard Stallman发起GMU和Free Software Foundation，开源作为一种全新的软件开发和使用模式正式诞生。One for All, All for One的理念传播开后，之后的40年里在开源软件社区被无数开发者实践和传承。开源软件因其节省费用（不需要购买许可证，大大降低了IT投入成本）、安全稳定（安全漏洞少）、技术成熟、个性化定制、自主知识产权等优势获得喜人的发展，由此我们也见证了无数开源软件项目的成长和成熟",cover:"./cover.png",location:"海南",date:"2023-01-06",title:"Datan Technology 2023 Open Source Graduation Design Internship Recruitment"},a=[{label:"毕设项目的背景",level:2},{label:"细分方向",level:2},{label:"开源毕设导师组",level:2},{label:"开源毕设项目的流程",level:2},{label:"申请流程",level:2}],p=`

自 1984 年 Richard Stallman 发起 GMU 和 Free Software Foundation，开源作为一种全新的软件开发和使用模式正式诞生。One for All, All for One 的理念传播开后，之后的 40 年里在开源软件社区被无数开发者实践和传承。开源软件因其节省费用（不需要购买许可证，大大降低了 IT 投入成本）、安全稳定（安全漏洞少）、技术成熟、个性化定制、自主知识产权等优势获得喜人的发展，由此我们也见证了无数开源软件项目的成长和成熟

图片

相比而言，硬件开源之路更为崎岖。因为对物理器件的依赖度更高，复杂度更高，修改难度大，硬件开源之路走得比较缓慢。虽然是一条少有人走的路，但其正确性毋庸置疑。开源芯片生态（Open Source Chip Ecosystem-OSCE）的优势,包括可以节约市场化时间，以及知识产权的成本，EDA 工具、设施和劳动力。硬件开发者也期盼硬件设计可以像软件设计一样简单。

图片

@@ -46,4 +46,4 @@ const o="/zh-cn/assets/cover-964a3e23.png",e="/zh-cn/assets/image1-c300ce2e.png"

欢迎您预约直播，或者登陆腾讯会议观看直播：

图片

对开源毕设感兴趣的朋友，欢迎添加小助手微信，加入达坦科技开源毕设群。

-

图片

`;export{i as assetURLs,r as default,p as metadata,a as toc}; +

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`;export{o as assetURLs,p as default,r as metadata,a as toc}; diff --git a/zh-cn/assets/index-0cf6ee95.js b/zh-cn/assets/index-1a975ae4.js similarity index 97% rename from zh-cn/assets/index-0cf6ee95.js rename to zh-cn/assets/index-1a975ae4.js index f03b4d5..4cc7fc8 100644 --- a/zh-cn/assets/index-0cf6ee95.js +++ b/zh-cn/assets/index-1a975ae4.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-c17c52cc.png",s="/zh-cn/assets/image1-0dff4570.png",c="/zh-cn/assets/image2-e09cfdc8.png",o="/zh-cn/assets/image3-2b589463.png",a="/zh-cn/assets/image4-5841c9d6.png",p="/zh-cn/assets/image5-92344f1d.png",d="/zh-cn/assets/image6-b429f851.png",r="/zh-cn/assets/image7-97920b5a.png",t="/zh-cn/assets/image8-ecf5c6f3.png",i="/zh-cn/assets/image9-f47bad66.png",n="/zh-cn/assets/image10-b50adc27.png",l="/zh-cn/assets/image11-99ec2a51.png",m=[e,s,c,o,a,p,d,r,t,i,n,l],h={label:"从数学角度思考程序与验证正确性",description:"本文旨在为没有接触过形式化方法的读者提供一种新的视角看待计算机系统与算法，而非形式化方法或 TLA+ 教程。因此本文的重点是如何从数学角度思考程序，不会使用大篇幅讲解 TLA+ 的语法。",cover:"./cover.png",location:"中国香港",author:["田野"],tags:["Xline"],date:"2023-03-02",title:"Thinking about programs mathematically and verifying correctness"},g=[{label:"我们该如何写出正确的程序？",level:2},{label:"程序中会有什么样错误？",level:3},{label:"经验",level:3},{label:"形式化方法",level:3},{label:"TLA+",level:2},{label:"简单的例子",level:3},{label:"Two-Phase Commit",level:2},{label:"总结",level:2},{label:"我们的项目：Xline",level:2}],A=`

封面

+const e="/zh-cn/assets/cover-c17c52cc.png",s="/zh-cn/assets/image1-0dff4570.png",c="/zh-cn/assets/image2-e09cfdc8.png",o="/zh-cn/assets/image3-2b589463.png",p="/zh-cn/assets/image4-5841c9d6.png",a="/zh-cn/assets/image5-92344f1d.png",d="/zh-cn/assets/image6-b429f851.png",i="/zh-cn/assets/image7-97920b5a.png",r="/zh-cn/assets/image8-ecf5c6f3.png",t="/zh-cn/assets/image9-f47bad66.png",n="/zh-cn/assets/image10-b50adc27.png",l="/zh-cn/assets/image11-99ec2a51.png",m=[e,s,c,o,p,a,d,i,r,t,n,l],g={label:"从数学角度思考程序与验证正确性",description:"本文旨在为没有接触过形式化方法的读者提供一种新的视角看待计算机系统与算法，而非形式化方法或 TLA+ 教程。因此本文的重点是如何从数学角度思考程序，不会使用大篇幅讲解 TLA+ 的语法。",cover:"./cover.png",location:"中国香港",author:["田野"],tags:["Xline"],date:"2023-03-02",title:"Thinking about programs mathematically and verifying correctness"},h=[{label:"我们该如何写出正确的程序？",level:2},{label:"程序中会有什么样错误？",level:3},{label:"经验",level:3},{label:"形式化方法",level:3},{label:"TLA+",level:2},{label:"简单的例子",level:3},{label:"Two-Phase Commit",level:2},{label:"总结",level:2},{label:"我们的项目：Xline",level:2}],A=`

封面

本文旨在为没有接触过形式化方法的读者提供一种新的视角看待计算机系统与算法，而非形式化方法或 TLA+ 教程。因此本文的重点是如何从数学角度思考程序，不会使用大篇幅讲解 TLA+ 的语法。

我们该如何写出正确的程序？

程序设计的目标永远是写出正确的程序。随着时间的推移，我们的程序越来越复杂，其中可能存在的错误也越来越多。想要写出正确的程序，首先应该了解程序中可能出现的错误有哪些。

@@ -67,7 +67,7 @@ const e="/zh-cn/assets/cover-c17c52cc.png",s="/zh-cn/assets/image1-0dff4570.png"

在其中用到了"或"连接两个状态，我们可以用布尔逻辑中的逻辑或 ∨ 来表示。这样，我们就可以清晰地表示出程序的状态转换关系了。为了美观，在 TLA+ 中，首句前也可以补上相同的布尔逻辑符号：

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我们最终得到了这个简单程序在初始状态后的两个状态，下面我们将初始状态补全，并按照 TLA+ 语言的要求补全整个 specification：

-

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+

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下面我们来定义系统做可能发生的动作。

-

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+

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当 TM 的状态为 init，且在消息池中存在来自 r 的 Prepared 消息，tmPrepared 在下一个状态的值会是 tmPrepared 和 {r} 的并集。

-

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+

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上面的两个动作分别是 Transaction Manager 进行 Commit 与 Abort。

-

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+

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上述 4 个 Resource Manager 动作分别是 Resource Manager 选择 Prepare 与 Abort，以及处理由 Transaction Manager 决定的 Commit 与 Abort。

其中，存在语法如 rmState' = [rmState except ![r] = "prepared"]，意为"在下一个状态中，rmState[r] 的值变为 prepared，其它部分不变"。

如果我们用形如 rmState[r]' = "prepared" 的形式来表示，我们并没有显式地说明 rmState 的其它部分在下一个状态的值，因此是不正确的。

@@ -149,4 +149,4 @@ Next 用于定义状态转换关系。

我们的项目：Xline

TLA+被广泛用于分布式系统算法的研究和开发中。在我们的项目 Xline 中，TLA+被用来在设计阶段验证共识算法的正确性。

Xline 是一个用于元数据管理的分布式 KV 存储。我们在 Xline 中使用 CURP 协议（https://www.usenix.org/system/files/nsdi19-park.pdf)的修改版作为共识协议，TLA+将被用于其正确性验证中。

-

如果你想了解更多关于 Xline 的信息，请参考我们的 Github：https://github.com/datenlord/Xline

`;export{m as assetURLs,A as default,h as metadata,g as toc}; +

如果你想了解更多关于 Xline 的信息，请参考我们的 Github：https://github.com/datenlord/Xline

`;export{m as assetURLs,A as default,g as metadata,h as toc}; diff --git a/zh-cn/assets/index-a154d453.js b/zh-cn/assets/index-1ab49176.js similarity index 97% rename from zh-cn/assets/index-a154d453.js rename to zh-cn/assets/index-1ab49176.js index 0e9d7ef..3a4d13b 100644 --- a/zh-cn/assets/index-a154d453.js +++ b/zh-cn/assets/index-1ab49176.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-cf0f8eeb.png",e=[t],a={label:"第二届硬件敏捷开发与方法学研讨会 l 2023 RISC-V中国峰会同期活动顺利举办",description:"作为2023RISC-V中国峰会的同期活动，8月25日下午，达坦科技成功在线上举办第二届硬件敏捷开发与验证方法学研讨。长达三小时的就新一代HDL在数字芯片设计开发和验证效率方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。",cover:"./cover.png",location:"中国香港",date:"2023-09-07",title:"The 2nd Hardware Agile Development and Methodology Workshop l 2023 RISC V China Summit Concurrent Events Successfully Held"},l=[{label:"Part.1",level:2},{label:"Part.2",level:2},{label:"Part.3",level:2},{label:"Part.4",level:2},{label:"Part.5",level:2},{label:"Part.6",level:2},{label:"结束语",level:2}],p=`

图片

+const t="/zh-cn/assets/cover-cf0f8eeb.png",e=[t],a={label:"第二届硬件敏捷开发与方法学研讨会 l 2023 RISC-V中国峰会同期活动顺利举办",description:"作为2023RISC-V中国峰会的同期活动，8月25日下午，达坦科技成功在线上举办第二届硬件敏捷开发与验证方法学研讨。长达三小时的就新一代HDL在数字芯片设计开发和验证效率方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。",cover:"./cover.png",location:"中国香港",date:"2023-09-07",title:"The 2nd Hardware Agile Development and Methodology Workshop l 2023 RISC V China Summit Concurrent Events Successfully Held"},p=[{label:"Part.1",level:2},{label:"Part.2",level:2},{label:"Part.3",level:2},{label:"Part.4",level:2},{label:"Part.5",level:2},{label:"Part.6",level:2},{label:"结束语",level:2}],l=`

图片

作为2023RISC-V中国峰会的同期活动，8月25日下午，达坦科技成功在线上举办第二届硬件敏捷开发与验证方法学研讨会。长达三小时的就新一代HDL在数字芯片设计开发和验证效率方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。

Part.1

《RISC-V敏捷硬件开发-软件定义芯片》

@@ -19,4 +19,4 @@ const t="/zh-cn/assets/cover-cf0f8eeb.png",e=[t],a={label:"第二届硬件敏捷

《MetaHVL硬件敏捷验证与协同仿真》

华南理工大学计算机学院副教授赖晓铮的分享主题是《MetaHVL硬件敏捷验证与协同仿真》。赖老师从芯片设计的规模和芯片设计的成本是不成比例（规模是线性提升，成本是指数提升）的现状出发，提出硬件设计的流程有更敏捷的需求。而敏捷是包含设计和验证两个维度的全流程敏捷。他分享了运用创新EDA方法学和工具以进一步分离设计与实现；此外，提高设计抽象层次的同时，也需要提高验证的抽象层次。赖老师介绍了他在Meta-HVL项目研究的中期结论，即小规模设计的加速比明显，规模越大，DUT运行时间占比越大，则验证加速起到的作用越小。因此，时间应该花在提高验证的效率上，而不是把时间和资源花在加速验证代码的运行上。

结束语

-

如何提升数字芯片的开发和验证效率一直是业界关注的焦点。新一代HDL打开了全新的数字芯片敏捷设计和验证的方法学大门。在本次研讨会上，业界和学界的各位专家分享了他们在各自领域的硬件敏捷开发与验证实践经验，希望这些前沿的探索可以为关注该领域的学习者和实践者提供一次深入探讨和交流的机会，以此进一步促进硬件敏捷开发与验证方法学的发展与落地。

`;export{e as assetURLs,p as default,a as metadata,l as toc}; +

如何提升数字芯片的开发和验证效率一直是业界关注的焦点。新一代HDL打开了全新的数字芯片敏捷设计和验证的方法学大门。在本次研讨会上，业界和学界的各位专家分享了他们在各自领域的硬件敏捷开发与验证实践经验，希望这些前沿的探索可以为关注该领域的学习者和实践者提供一次深入探讨和交流的机会，以此进一步促进硬件敏捷开发与验证方法学的发展与落地。

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本文主要介绍了 DatenLord 团队在今年的 Xilinx 全球自适应计算挑战赛上获得 Big Data Analytics 赛道一等奖的作品——TRIDENT: Poseidon 哈希算法的硬件实现与加速。该项目基于 Xilinx Varium C1100 FPGA 加速卡，为 Filecoin 区块链应用中的 Poseidon 哈希算法提供了一套完整的硬件加速方案。在硬件方面，TRIDENT 基于 SpinalHDL 设计了 Poseidon 加速器 IP 并基于 Vivado 中 Block Design 工具搭建完整的 FPGA 硬件系统。在软件方面，我们为 Filecoin 软件实现 Lotus 提供了访问 FPGA 硬件加速器的接口。最终，TRIDENT 能够为 Filecoin 应用提供两倍于 AMD Ryzen 5900X 处理器的 Poseidon 计算加速效果。下文将主要从 Poseidon 哈希算法概述、基于 SpinalHDL 和 Cocotb 的硬件设计、总体方案设计、加速器 IP 设计和性能测试等方面对整个 TRIDENT 项目进行详细的介绍。

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本文主要介绍了 DatenLord 团队在今年的 Xilinx 全球自适应计算挑战赛上获得 Big Data Analytics 赛道一等奖的作品——TRIDENT: Poseidon 哈希算法的硬件实现与加速。该项目基于 Xilinx Varium C1100 FPGA 加速卡，为 Filecoin 区块链应用中的 Poseidon 哈希算法提供了一套完整的硬件加速方案。在硬件方面，TRIDENT 基于 SpinalHDL 设计了 Poseidon 加速器 IP 并基于 Vivado 中 Block Design 工具搭建完整的 FPGA 硬件系统。在软件方面，我们为 Filecoin 软件实现 Lotus 提供了访问 FPGA 硬件加速器的接口。最终，TRIDENT 能够为 Filecoin 应用提供两倍于 AMD Ryzen 5900X 处理器的 Poseidon 计算加速效果。下文将主要从 Poseidon 哈希算法概述、基于 SpinalHDL 和 Cocotb 的硬件设计、总体方案设计、加速器 IP 设计和性能测试等方面对整个 TRIDENT 项目进行详细的介绍。

引言

Poseidon 是一种全新的面向零知识证明(ZKP: Zero-Knowledge Proof)密码学协议设计的哈希算法。相比同类算法，包括经典的 SHA-256、SHA-3 以及 Pedersen 哈希函数，在零知识证明的应用场景下，Poseidon 能够显著地降低证明生成和验证的计算复杂度，极大地提升零知识证明系统整体的运行效率。基于上述优点，Poseidon 目前已被广泛应用在了各种区块链项目当中，包括去中心化存储系统 Filecoin、加密货币 Mina Protocol 和 Dusk Network 等，主要用于加速其中的零知识证明系统。

0.1 Poseidon 与零知识证明

@@ -210,9 +210,9 @@ const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png

在上述单元运算电路的基础上，实现高性能算法加速器的另一个关键在于设计一个高效的电路架构，即如何组织好每一个运算器，最大化每个单元的利用率

由本文第二部分的介绍可知，TRIDENT 所加速的 Filecoin Poseidon 哈希实例的输入为个有限域元素，每个元素的位宽为 255 比特。具体的计算流程由

RF 次 Full Round 循环和 RP 次 Partial Round 循环组成。两种循环的计算流程基本相似，都依次包括 AddRoundConstant、SBox 和 MDSMixing 三个阶段，在这三个阶段分别完成常数模加、五次方模幂和向量—矩阵乘法，两者唯一的区别在于 Partial Round 在 Sbox 阶段只需要完成中间状态第一个元素的计算。Full Round 和 Partial Round 每次循环/迭代的计算流程如下图(a)和(b)所示。如果将 Poseidon 哈希函数的所有循环都依次展开，可以将其看成是一条单向的数据流，在该数据流上不断地进行模加、模幂和矩阵运算。

-

图片

+

图片

基于上述算法流程的定义，本次课题中实现的 Poseidon 加速器的具体硬件架构如下图所示。在 Poseidon 单次迭代的算法流程的基础上, 加速器的实现针对具体的 FPGA 架构特点和硬件资源限制做了如下几点优化：

-

图片

+

图片

@@ -252,7 +252,7 @@ const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png

在上文中介绍的 FPGA 硬件系统和其中 Poseidon 加速器 IP 的基础上，我们通过 Vivado 集成开发环境将其实现在了 Varium C1100 FPGA 加速卡上，该板卡搭载了 Xilinx Virtex UltraScale+系列的 FPGA 芯片，具体芯片型号为具体型号为 XCU55N-FSVH2892-2L-E。整个硬件系统实现(Implementation)后的报告以及计算性能的测试结果如下：

5.1 Vivado Implementation 报告

整体硬件加速系统综合实现后逻辑资源消耗情况如下表所示：

-

图片

+

图片

各项 FPGA 资源中 DSP Slices(70.01%)和 LUT(61.15%)的消耗最多, 主要用于 255-Bit Montgomery 模乘电路的实现上。这两项资源的不足也限制了在加速器中配置更多模乘器来提升计算并行度和整体的加速性能。

在时序上，实现(Implementation)后 Poseidon 加速器刚好能够满足 100MHz 工作频率的要求。关键路径上，建立(set up)时间的余量为 0.069ns，保持(hold)时间的余量为 0.01ns。

除了资源和时序外，FPGA 实现后的功耗信息如下图所示。由下图可见，在运行我们设计的加速器硬件时，FPGA 芯片的整体功耗在 24.7W 左右。而我们在性能测试中使用的 RTX 3070 GPU 加速卡的运行功耗在 120W 左右。

@@ -278,4 +278,4 @@ const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png

  • 优化加速器架构：由于需要适配 Filecoin Poseidon 计算实例中不同大小的输入数据，目前在输入较小的情况下加速器中存在一些冗余的运算单元。通过进一步优化加速器的整体架构，使得在不同长度的输入数据下，所有运算单元都能得到更好的利用，能够进一步提升整体的加速性能。

    • -`;export{u as assetURLs,A as default,T as metadata,C as toc}; +`;export{A as assetURLs,C as default,T as metadata,u as toc}; diff --git a/zh-cn/assets/index-ee7da202.js b/zh-cn/assets/index-1f712296.js similarity index 92% rename from zh-cn/assets/index-ee7da202.js rename to zh-cn/assets/index-1f712296.js index 282e74e..966fd1e 100644 --- a/zh-cn/assets/index-ee7da202.js +++ b/zh-cn/assets/index-1f712296.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-0645adbc.jpg",o="/zh-cn/assets/image1-4a25d469.jpg",e="/zh-cn/assets/image2-ee430ce0.png",a=[t,o,e],n={label:"达坦科技受邀在2022中国计算机学会芯片大会做硬件加速研究分享",description:"2022年7月29日至7月30日，由中国计算机学会（CCF）集成电路设计专业委员会、容错计算专业委员会、体系结构专业委员会和信息存储技术专业委员会联合举办的学术大会中国计算机学会芯片大会在江苏南京如期圆满举行。",cover:"./cover.jpg",location:"新加坡",date:"2022-08-04",title:"Dartan Technology Invited to Do Hardware Acceleration Research Sharing at 2022 China Computer Society Chip Conference"},s=[],i=`

    封面

    +const t="/zh-cn/assets/cover-0645adbc.jpg",o="/zh-cn/assets/image1-4a25d469.jpg",e="/zh-cn/assets/image2-ee430ce0.png",s=[t,o,e],a={label:"达坦科技受邀在2022中国计算机学会芯片大会做硬件加速研究分享",description:"2022年7月29日至7月30日，由中国计算机学会（CCF）集成电路设计专业委员会、容错计算专业委员会、体系结构专业委员会和信息存储技术专业委员会联合举办的学术大会中国计算机学会芯片大会在江苏南京如期圆满举行。",cover:"./cover.jpg",location:"新加坡",date:"2022-08-04",title:"Dartan Technology Invited to Do Hardware Acceleration Research Sharing at 2022 China Computer Society Chip Conference"},n=[],i=`

    封面

    2022 年 7 月 29 日至 7 月 30 日，由中国计算机学会（CCF）集成电路设计专业委员会、容错计算专业委员会、体系结构专业委员会和信息存储技术专业委员会联合举办的学术大会中国计算机学会芯片大会在江苏南京如期圆满举行。

    2022 年 CCF 芯片大会由中科院计算所孙凝晖院士、中科院微电子所刘明院士担任大会主席，集结国内外知名专家学者，围绕智能化时代的芯片技术主题，论述芯片领域国际最前沿、权威和新颖的学术观点，包括芯片设计与 EDA、新型体系架构、前沿存储技术、容错计算应用等方面的关键技术和应用前景。

    达坦科技致力于软硬件深度融合的跨云存储平台，其硬件负责人吴迪带领研发团队在今年的Xilinx 全球自适应计算挑战赛上刚获得Big Data Analytics 赛道一等奖。此次，达坦科技提交的论文“基于 SpinalHDL 和 Cocotb 的 Poseidon 哈希算法硬件加速器的敏捷开发”也成功入选，并受邀在大会做分享。达坦科技的翁万正在 30 日下午领域专用架构与敏捷设计论文分组，向与会者介绍了研究背景、方法技术和实验结果。

    @@ -6,4 +6,4 @@ const t="/zh-cn/assets/cover-0645adbc.jpg",o="/zh-cn/assets/image1-4a25d469.jpg"

    Poseidon 是一种全新的面向零知识证明的(ZKP:Zero-Knowledge Proof)密码学协议设计的哈希算法。相比经典的 SHA-256 和 Keccak 哈希函数, 在零知识证明的应用场景下, Poseidon 能够显著地减少哈希函数的约束条件进而降低证明的计算复杂度, 极大提升零知识证明系统的运行效率。Poseidon 哈希函数的计算涉及高位宽模乘和矩阵乘法运算, 需要消耗大量计算资源。为了提升哈希计算的效率, 达坦基于流水线和折叠技术提出了一种面向 FPGA 平台的 Poseidon 硬件加速器架构。

    在该整体架构下, 针对高位宽模乘, 达坦科技基于 Karatsuba 乘法拆分算法实现了一种高性能蒙哥马利模乘器。针对函数中的向量—矩阵乘法计算, 达坦科技基于脉动矩阵结构提出了一种高吞吐率的硬件实现。最终, 在搭载有 Xilinx Virtex Ultrascale+ FPGA 芯片的 Varium C1100 加速卡上, 硬件加速器每秒最高能完成 0.99M 次哈希计算, 达到 AMD Ryzen 5900X 处理器 Poseidon 计算速度的两倍。

    图片

    -

    除了打造全新的广域网共识算法，达坦科技专注于自研面向存储网络的硬件加速，以期软硬件的深度融合能提升存储的性能。目前达坦科技的硬件项目 TRIDENT，已经在 Github 上开源，欢迎参与讨论：https://github.com/datenlord/TRIDENT。

    `;export{a as assetURLs,i as default,n as metadata,s as toc}; +

    除了打造全新的广域网共识算法，达坦科技专注于自研面向存储网络的硬件加速，以期软硬件的深度融合能提升存储的性能。目前达坦科技的硬件项目 TRIDENT，已经在 Github 上开源，欢迎参与讨论：https://github.com/datenlord/TRIDENT。

    `;export{s as assetURLs,i as default,a as metadata,n as toc}; diff --git a/zh-cn/assets/index-6a3ed4c3.js b/zh-cn/assets/index-22d5e656.js similarity index 95% rename from zh-cn/assets/index-6a3ed4c3.js rename to zh-cn/assets/index-22d5e656.js index 434a40f..99f8163 100644 --- a/zh-cn/assets/index-6a3ed4c3.js +++ b/zh-cn/assets/index-22d5e656.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-cf0f8eeb.png",o="/zh-cn/assets/image1-6485c4dd.jpg",e=[t,o],n={label:"活动预告 | 第二届硬件敏捷开发与验证方法学研讨会",description:"2023年8月23日至25日， 2023 RISC-V中国峰会将在北京香格里拉饭店举办。本届峰会采用“主会议+主题活动+展览展示+同期活动”的会议组织方式，将邀请RISC-V国际基金会、业界专家、企业代表及社区伙伴等共同探讨RISC-V发展趋势与机遇。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技将在线上举办第二届硬件敏捷开发与验证方法学研讨会。",cover:"./cover.png",location:"新加坡",date:"2023-08-20",title:"Upcoming Events l 2nd Hardware Agile Development and Verification Methodology Workshop"},s=[{label:"2023 RISC-V中国峰会",level:2},{label:"活动信息",level:2}],r=`

    图片

    +const t="/zh-cn/assets/cover-cf0f8eeb.png",o="/zh-cn/assets/image1-6485c4dd.jpg",e=[t,o],s={label:"活动预告 | 第二届硬件敏捷开发与验证方法学研讨会",description:"2023年8月23日至25日， 2023 RISC-V中国峰会将在北京香格里拉饭店举办。本届峰会采用“主会议+主题活动+展览展示+同期活动”的会议组织方式，将邀请RISC-V国际基金会、业界专家、企业代表及社区伙伴等共同探讨RISC-V发展趋势与机遇。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技将在线上举办第二届硬件敏捷开发与验证方法学研讨会。",cover:"./cover.png",location:"新加坡",date:"2023-08-20",title:"Upcoming Events l 2nd Hardware Agile Development and Verification Methodology Workshop"},n=[{label:"2023 RISC-V中国峰会",level:2},{label:"活动信息",level:2}],r=`

    图片

    2023 RISC-V中国峰会

    2023年8月23日至25日， 2023 RISC-V中国峰会将在北京香格里拉饭店举办。本届峰会采用“主会议+主题活动+展览展示+同期活动”的会议组织方式，将邀请RISC-V国际基金会、业界专家、企业代表及社区伙伴等共同探讨RISC-V发展趋势与机遇。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技将在线上举办第二届硬件敏捷开发与验证方法学研讨会。

    随着数字芯片的设计规模和复杂度越来越大，加之芯片市场的竞争越来越激烈，如何提升数字芯片的开发和验证效率成为业界关注的焦点。虽然各种设计工具、验证方法学层出不穷，但是一直没有得到业界广泛认可。目前业界普遍采用的还是基于Verilog、SystemVerilog、VHDL和UVM的工具和方法。

    @@ -16,4 +16,4 @@ const t="/zh-cn/assets/cover-cf0f8eeb.png",o="/zh-cn/assets/image1-6485c4dd.jpg"

    收看链接：
    https://wx.vzan.com/live/tvchat-904511107?v=1691984417574
    或欢迎点击下方链接预约公众号直播。

    -

    感兴趣的观众可以添加海报中的达坦科技小助手二维码加入讨论群，添加时请注明硬件敏捷开发和验证方法学研讨。

    `;export{e as assetURLs,r as default,n as metadata,s as toc}; +

    感兴趣的观众可以添加海报中的达坦科技小助手二维码加入讨论群，添加时请注明硬件敏捷开发和验证方法学研讨。

    `;export{e as assetURLs,r as default,s as metadata,n as toc}; diff --git a/zh-cn/assets/index-405a2dbf.js b/zh-cn/assets/index-284b9c1c.js similarity index 98% rename from zh-cn/assets/index-405a2dbf.js rename to zh-cn/assets/index-284b9c1c.js index b354475..a651103 100644 --- a/zh-cn/assets/index-405a2dbf.js +++ b/zh-cn/assets/index-284b9c1c.js @@ -1,4 +1,4 @@ -const n="/zh-cn/assets/cover-99998007.jpg",s="/zh-cn/assets/image1-6f9cec09.jpg",e=[n,s],t={label:"精彩回顾｜硬件敏捷开发与验证方法学研讨",description:"8月27日，作为2022年第二届RISC-V中国峰会的同期活动，达坦科技成功举办硬件敏捷开发与验证方法学研讨。虽然是线上分享活动，但大家热情依旧，会后在“硬件敏捷开发和验证方法学讨论群”中积极互动提问。长达四小时的就新一代HDL在数字芯片设计方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。",cover:"./cover.jpg",location:"中国香港",date:"2022-09-08",title:"Discussion on Hardware Agile Development and Verification Methodology"},o=[{label:"芯片敏捷设计与验证之路",level:2},{label:"香山处理器敏捷开发与验证实践",level:2},{label:"通过 Chainsaw 实现硬件算子敏捷开发",level:2},{label:"Scala 在 IC 开发中的应用",level:2},{label:"NaxRiscv CPU: Introduction and Extension Demonstration",level:2},{label:"结束语",level:2}],a=`

    封面

    +const n="/zh-cn/assets/cover-99998007.jpg",s="/zh-cn/assets/image1-6f9cec09.jpg",t=[n,s],e={label:"精彩回顾｜硬件敏捷开发与验证方法学研讨",description:"8月27日，作为2022年第二届RISC-V中国峰会的同期活动，达坦科技成功举办硬件敏捷开发与验证方法学研讨。虽然是线上分享活动，但大家热情依旧，会后在“硬件敏捷开发和验证方法学讨论群”中积极互动提问。长达四小时的就新一代HDL在数字芯片设计方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。",cover:"./cover.jpg",location:"中国香港",date:"2022-09-08",title:"Discussion on Hardware Agile Development and Verification Methodology"},o=[{label:"芯片敏捷设计与验证之路",level:2},{label:"香山处理器敏捷开发与验证实践",level:2},{label:"通过 Chainsaw 实现硬件算子敏捷开发",level:2},{label:"Scala 在 IC 开发中的应用",level:2},{label:"NaxRiscv CPU: Introduction and Extension Demonstration",level:2},{label:"结束语",level:2}],a=`

    封面

    8 月 27 日，作为 2022 年第二届 RISC-V 中国峰会的同期活动，达坦科技成功举办硬件敏捷开发与验证方法学研讨。虽然是线上分享活动，但大家热情依旧，会后在“硬件敏捷开发和验证方法学讨论群”中积极互动提问。长达四小时的就新一代 HDL 在数字芯片设计方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。

    芯片敏捷设计与验证之路

    华南理工大学计算机科学与工程学院赖晓铮副教授首先分享了 “让硬件设计像软件设计一样简单”的愿景，即开发人员编写的代码只占工作量的 10%，剩下 90%由开源芯片生态系统提供。

    @@ -23,4 +23,4 @@ const n="/zh-cn/assets/cover-99998007.jpg",s="/zh-cn/assets/image1-6f9cec09.jpg"

    请点击如下链接：
    https://t.elecfans.com/live/2113.html收看本次研讨会的回放。
    也欢迎添加小助手微信，加入“硬件敏捷开发和验证方法学讨论群”，进行延伸讨论与互动，并第一时间获得后续相关活动的讯息。

    -

    图片

    `;export{e as assetURLs,a as default,t as metadata,o as toc}; +

    图片

    `;export{t as assetURLs,a as default,e as metadata,o as toc}; diff --git a/zh-cn/assets/index-8e06495a.js b/zh-cn/assets/index-2aee5161.js similarity index 98% rename from zh-cn/assets/index-8e06495a.js rename to zh-cn/assets/index-2aee5161.js index d1bcade..16f23fb 100644 --- a/zh-cn/assets/index-8e06495a.js +++ b/zh-cn/assets/index-2aee5161.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png",i="/zh-cn/assets/image2-1161bb88.png",a="/zh-cn/assets/image3-136f9458.png",e="/zh-cn/assets/image4-75f70bf1.png",o="/zh-cn/assets/image5-64f0abbf.png",t="/zh-cn/assets/image6-29b079bb.png",n="/zh-cn/assets/image7-f8d2626b.png",s="/zh-cn/assets/image8-d242f7b7.png",c="/zh-cn/assets/image9-5e691a52.png",r="/zh-cn/assets/image10-b3a0ad40.png",g="/zh-cn/assets/image11-98ffaf6b.png",H="/zh-cn/assets/image13-d816729e.png",D="/zh-cn/assets/image14-20340934.png",h="/zh-cn/assets/image15-512cff4d.png",L="/zh-cn/assets/image16-ee33a0ea.png",S="/zh-cn/assets/image17-e2c28396.png",m="/zh-cn/assets/image18-69fe4409.png",V="/zh-cn/assets/image19-dfed79f8.png",C="/zh-cn/assets/image20-a636b8b5.png",b="/zh-cn/assets/image21-487e6dd2.png",y="/zh-cn/assets/image22-27167bbd.png",d="/zh-cn/assets/image23-8660cc2c.png",P="/zh-cn/assets/image24-4d2461fd.png",f="/zh-cn/assets/image25-3af02a99.png",A="/zh-cn/assets/image26-a854b9f0.png",z="/zh-cn/assets/image27-5b3ff402.png",v="/zh-cn/assets/image28-f02ef5c0.png",I="/zh-cn/assets/image29-44cafcf0.png",w=[l,p,i,a,e,o,t,n,s,c,r,g,H,D,h,L,S,m,V,C,b,y,d,P,f,A,z,v,I],R={label:"使用SpinalHDL和Cocotb进行敏捷数字芯片设计和验证",description:"领域特定架构已成为计算机发展的一种趋势。在提供更高效算力的同时，它也给底层硬件的开发带来了更大的挑战。传统的芯片设计和验证技术已越来越无法应对这些新的要求和挑战。在芯片设计上，本文将介绍如何使用SpinalHDL，一种基于Scala的新型硬件描述语言（HDL），或者更准确地说是硬件构造语言，提高硬件设计的效率和质量。对于SpinalHDL，本文还介绍了如何利用Scala的类型系统高效地进行复杂硬件的设计。对于验证，本文将介绍基于Python的验证环境Cocotb，以及如何利用Python简洁高效的语言特性及其繁荣的开源社区，提升芯片验证的效率。",cover:"./cover.jpg",location:"新疆",author:["翁万正等"],date:"2024-01-25",title:"Agile Digital Chip Design and Verification with SpinalHDL and Cocotb"},u=[{label:"引言",level:2},{label:"1.1 背景",level:3},{label:"1.2 HDL的演变",level:3},{label:"SpinalHDL",level:2},{label:"2.1 SpinalHDL简介",level:3},{label:"2.2 与传统HDL相同的描述粒度",level:3},{label:"2.3 SpinalHDL相比传统HDL的优势",level:3},{label:"基于元语言构建数字逻辑电路",level:2},{label:"3.1 元语言的概念",level:3},{label:"3.2 硬件设计中的高级类型系统",level:3},{label:"3.3 SpinalHDL之外",level:3},{label:"3.4 HCL的编译流程",level:3},{label:"基于Cocotb的验证",level:2},{label:"4.1 Cocotb简介",level:3},{label:"4.2 基于Cocotb硬件验证的优势",level:3},{label:"4.3 基于Cocotb的验证示例",level:3},{label:"4.3.3 启动仿真",level:3},{label:"结论",level:2},{label:"参考文章",level:2}],E=`

    封面

    +const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png",i="/zh-cn/assets/image2-1161bb88.png",a="/zh-cn/assets/image3-136f9458.png",e="/zh-cn/assets/image4-75f70bf1.png",o="/zh-cn/assets/image5-64f0abbf.png",n="/zh-cn/assets/image6-29b079bb.png",t="/zh-cn/assets/image7-f8d2626b.png",s="/zh-cn/assets/image8-d242f7b7.png",c="/zh-cn/assets/image9-5e691a52.png",r="/zh-cn/assets/image10-b3a0ad40.png",g="/zh-cn/assets/image11-98ffaf6b.png",D="/zh-cn/assets/image13-d816729e.png",H="/zh-cn/assets/image14-20340934.png",h="/zh-cn/assets/image15-512cff4d.png",L="/zh-cn/assets/image16-ee33a0ea.png",S="/zh-cn/assets/image17-e2c28396.png",m="/zh-cn/assets/image18-69fe4409.png",C="/zh-cn/assets/image19-dfed79f8.png",V="/zh-cn/assets/image20-a636b8b5.png",b="/zh-cn/assets/image21-487e6dd2.png",y="/zh-cn/assets/image22-27167bbd.png",d="/zh-cn/assets/image23-8660cc2c.png",P="/zh-cn/assets/image24-4d2461fd.png",f="/zh-cn/assets/image25-3af02a99.png",z="/zh-cn/assets/image26-a854b9f0.png",A="/zh-cn/assets/image27-5b3ff402.png",v="/zh-cn/assets/image28-f02ef5c0.png",I="/zh-cn/assets/image29-44cafcf0.png",u=[l,p,i,a,e,o,n,t,s,c,r,g,D,H,h,L,S,m,C,V,b,y,d,P,f,z,A,v,I],T={label:"使用SpinalHDL和Cocotb进行敏捷数字芯片设计和验证",description:"领域特定架构已成为计算机发展的一种趋势。在提供更高效算力的同时，它也给底层硬件的开发带来了更大的挑战。传统的芯片设计和验证技术已越来越无法应对这些新的要求和挑战。在芯片设计上，本文将介绍如何使用SpinalHDL，一种基于Scala的新型硬件描述语言（HDL），或者更准确地说是硬件构造语言，提高硬件设计的效率和质量。对于SpinalHDL，本文还介绍了如何利用Scala的类型系统高效地进行复杂硬件的设计。对于验证，本文将介绍基于Python的验证环境Cocotb，以及如何利用Python简洁高效的语言特性及其繁荣的开源社区，提升芯片验证的效率。",cover:"./cover.jpg",location:"新疆",author:["翁万正等"],date:"2024-01-25",title:"Agile Digital Chip Design and Verification with SpinalHDL and Cocotb"},G=[{label:"引言",level:2},{label:"1.1 背景",level:3},{label:"1.2 HDL的演变",level:3},{label:"SpinalHDL",level:2},{label:"2.1 SpinalHDL简介",level:3},{label:"2.2 与传统HDL相同的描述粒度",level:3},{label:"2.3 SpinalHDL相比传统HDL的优势",level:3},{label:"基于元语言构建数字逻辑电路",level:2},{label:"3.1 元语言的概念",level:3},{label:"3.2 硬件设计中的高级类型系统",level:3},{label:"3.3 SpinalHDL之外",level:3},{label:"3.4 HCL的编译流程",level:3},{label:"基于Cocotb的验证",level:2},{label:"4.1 Cocotb简介",level:3},{label:"4.2 基于Cocotb硬件验证的优势",level:3},{label:"4.3 基于Cocotb的验证示例",level:3},{label:"4.3.3 启动仿真",level:3},{label:"结论",level:2},{label:"参考文章",level:2}],M=`

    封面

    摘要：
    领域特定架构已成为计算机发展的一种趋势。在提供更高效算力的同时，它也给底层硬件的开发带来了更大的挑战。传统的芯片设计和验证技术已越来越无法应对这些新的要求和挑战。在芯片设计上，本文将介绍如何使用SpinalHDL，一种基于Scala的新型硬件描述语言（HDL），或者更准确地说是硬件构造语言，提高硬件设计的效率和质量。对于SpinalHDL，本文还介绍了如何利用Scala的类型系统高效地进行复杂硬件的设计。对于验证，本文将介绍基于Python的验证环境Cocotb，以及如何利用Python简洁高效的语言特性及其繁荣的开源社区，提升芯片验证的效率。

    引言

    @@ -70,7 +70,7 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"
  • 使用复杂条件和递归来处理不同大小的问题。
  • 重用现有的Scala甚至Java代码，以减少开发时间并增强设计可靠性。
    • -

    图片

    +

    图片

    图5：Benes网络硬件：开关、路由和控制字ROM。

    在图5中，我们以Benes网络的硬件结构为例，说明了这些特性带来的好处：在此硬件的设计中，上述每种语言特性的特定应用被指定：

      @@ -85,7 +85,7 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"

      一些基本设计元素的良好封装：SpinalHDL本身为我们提供了一些基本且频繁使用的元素的良好封装，例如StateMachine、Stream、Flow和多种类型的总线。通过使用这些良好封装，你不必从头开始构建设计，这可以提高效率并减少错误的可能性。

      例如，SpinalHDL提供了方便的控制路径和数据路径的抽象，通过将它们建模为Stream，你可以将控制路径和数据路径视为从SoC输入端口到输出端口的一个或多个流：（1）每个模块的数据路径是将其输入流的有效负载数据转换并再次作为流发送到其输出端口；（2）对于控制路径，通过SpinalHDL对流模型提供的丰富功能，例如暂停/阻塞、继续、丢弃、分叉、合并等，可以非常容易地操作模块的输入流，例如具有背压/流量控制的流水线，再定时等。Stream是Scala提供的一个类，控制路径的不同操作被封装为类的方法。

      这里以Stream的m2sPipe()方法为例，它帮助用户更轻松地处理流水线中易出错的valid和ready信号的操作。通过使用m2sPipe，你可以更容易地实现带有背压的流水线，以解决时序问题。m2sPipe()生成的相应硬件结构如图6所示：

      -

      图片

      +

      图片

      图6：带有背压的流水线

      另一个例子是SpinalHDL为许多总线提供了非常好的封装，例如AXI、APB等。特别是AXI非常流行且难以实现。SpinalHDL基于前面提到的流模型实现了AXI接口，并提供了许多有用的与总线相关的功能，例如交叉开关、带/不带事务锁的总线仲裁器、总线解复用器、控制寄存器的总线驱动器等等。最重要的是，SpinalHDL提供的总线接口是防错的，因为SpinalHDL可以检查信号类型、信号宽度匹配、输入/输出方向、时钟域跨界等。通过SpinalHDL提供的这些方便的组件，它极大地促进了SoC的集成。

      Scala语言特性带来的可重用性：硬件设计所面临的问题通常是高度定制的。但是通过参数/泛型在Verilog/VHDL中提供的定制能力是不足的，而Verilog的代码很难应对许多情况。同时，Verilog/VHDL的自解释性很差，在许多情况下，即使有源代码可用，很难理解和使用其他人开发的源代码。传统HDL中代码难以理解的主要原因有两点：1）Verilog/VHDL中的描述是过于底层；2）不同团队使用的设计规则不一致。

      @@ -118,11 +118,11 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"

      和类型，也称为标记联合，是一种可以容纳来自固定数量的不同类型之一的单个值并保留所容纳值的类型的数据结构。虽然Verilog和传统软件编程语言如C都没有直接支持和类型，但我们可以在C中模拟其行为：

      图片

      一个简单但广为人知的和类型的例子是'Option'类型：

      -

      图片

      +

      图片

      表2：从SpinalHDL到Verilog的映射。

      当存在和类型和产品类型时，可以对可表示值的集合施加约束。例如，在深度嵌入式HCL中，由“VALID”信号门控的数据信号可以使用“Option”类型表示，这样在检查“VALID”是否为“高”之前，无法读取该值。

      在浅度嵌入式HCL中，和类型只能用于电路结构而不能用于数据，但我们仍然可以使用新类型模式模拟“Option[T]”的行为。我们创建一个函数：

      -

      图片

      +

      图片

      根据值选择onSome或onNone。由于DynamicOption类型构造器是私有的，所以只需要保护值免受未经意访问的影响而不必检查VALID。

      图片

      子类型和参数化多态：子类型（最常见的形式是继承）是一种构建类型层级结构的机制。参数化多态，也称为泛型，是一种编写以类型为输入并以单态类型或函数为输出的类型级别函数的机制。

      @@ -150,7 +150,7 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"
    1. 类型检查和IR编译。
    2. 生成IR到Verilog代码。（一些深度嵌入式HCL，如Clash，也可以通过面向软件的编译器编译为模拟电路行为的可执行程序）。
    -

    图片

    +

    图片

    图11：基于Scala的浅嵌入式HCL需要，而基于Haskell的深嵌入式HCL Clash

    基于Cocotb的验证

    4.1 Cocotb简介

    @@ -160,7 +160,7 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"

    除了支持不同类型的模拟器外，Cocotb相对于使用Verilog、System Verilog或VHDL进行验证具有各种优势，这些优势可以加速整个硬件设计过程。以下是Cocotb的一些显著优势：

    4.2.1 简洁高效的语言特性

    比传统的用于验证的语言如Verilog、VHDL和System Verilog更高效、更具表现力和更简洁。与使用这些传统语言编码相比，使用Python来实现复杂功能需要更少的代码。

    -

    图片

    +

    图片

    图12: 基于Cocotb的验证框架

    与此同时，Python拥有简单的语法和丰富的在线学习资料，使初学者更容易掌握。此外，Python是一种高级编程语言，具有诸多高级特性，如面向对象编程，可以帮助程序员编写更可重用的代码。

    在大多数硬件验证的情况下，C/C++被用于构建DUT的参考模型，参考模型的代码通过DPI集成到SV(System Verilog)的测试代码中。Python比其他语言（如C/C++）在构建参考模型方面更高效的一个编程场景是涉及超过64位的大整数的算术运算。密码学算法如ECC和RSA以及哈希函数通常涉及128位到2048位范围内宽度的大整数运算。C/C++中的原始类型仅支持最大64位的数字。如果使用C/C++构建您的参考模型，处理这些大整数将会很麻烦。下面的C程序实现了两个超过64位宽度的大整数的加法运算：

    @@ -187,10 +187,10 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"

    表4：被测试矩阵乘法器的接口

    4.3.1 构建参考模型

    矩阵乘法器的参考模型可以基于numpy实现，它是一个广泛应用的Python包，提供了丰富的矩阵运算功能。利用numpy，可以直接使用方法“matmul”来实现矩阵乘法，无需使用循环语法。参考模型的具体Python实现如下：

    -

    图片

    +

    图片

    4.3.2 搭建验证平台

    基于Cocotb构建的简单验证平台结构如下图所示。验证平台主要包括四个部分：1）驱动器；2）监控器；3）参考模型；4）缓冲区。驱动器使用Python包random生成随机的输入信号，包括“valid i”、“a i”和“b i”。当“valid i”为高电平时，生成的“a i”和“b i”被发送到参考模型，并获取相应的参考输出。参考输出通过Python包Queue实现的缓冲区存储，一旦输出信号“valid o”为高电平，监控器会抓取DUT的输出端口，并将其值与从缓冲区中取出的参考输出进行比较。驱动器和监控器的功能都是通过Python的协程实现的，类似于多线程，并且可以并行执行。

    -

    图片

    +

    图片

    图14：基于Cocotb的验证平台结构

    4.3.3 启动仿真

    基于Cocotb的验证代码可以通过Makefile在仿真器上启动，而无需直接与仿真器进行交互。此外，使用cocotb-test包中提供的“simulator.run”方法，可以直接在Python函数中启动验证过程。然后可以直接运行该函数，或者使用pytest，一个成熟的Python测试框架，来管理所有测试的执行。

    @@ -209,4 +209,4 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png" [4] B. J. Rosser, “Cocotb: a python-based digital logic verification framework,” 2018. [5] Cocotb, -“https://github.com/cocotb/cocotb.”

    `;export{w as assetURLs,E as default,R as metadata,u as toc}; +“https://github.com/cocotb/cocotb.”

    `;export{u as assetURLs,M as default,T as metadata,G as toc}; diff --git a/zh-cn/assets/index-0c25eea3.js b/zh-cn/assets/index-2b1c59a2.js similarity index 97% rename from zh-cn/assets/index-0c25eea3.js rename to zh-cn/assets/index-2b1c59a2.js index 25c7558..88f473f 100644 --- a/zh-cn/assets/index-0c25eea3.js +++ b/zh-cn/assets/index-2b1c59a2.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-ae42e606.jpg",s="/zh-cn/assets/image1-4de20ee3.jpg",n="/zh-cn/assets/image2-9ad061db.jpg",o=[t,s,n],r={label:"Rust X DatenLord l Rust China Conf 2023 倒计时！",description:"Rust语言作为一种强调性能、安全和并发性的新的编程语言，吸引了越来越多的程序员想要尝试学习和使用Rust。达坦科技（DatenLord）旗下的开源项目Xline （用于元数据管理的分布式KV存储）就是用Rust写就的，我们也一直坚定地做Rust语言在中国的布道。",cover:"./cover.jpg",location:"中国香港",date:"2023-06-11",title:"Countdown to Rust X DatenLord l Rust China Conf 2023"},e=[{label:"倒计时",level:2},{label:"主会场",level:2},{label:"分论坛：Rust 语言与高性能实践",level:2},{label:"Workshop：Rust in System",level:2},{label:"报名注意事项",level:2}],g=`

    封面

    +const t="/zh-cn/assets/cover-ae42e606.jpg",s="/zh-cn/assets/image1-4de20ee3.jpg",n="/zh-cn/assets/image2-9ad061db.jpg",o=[t,s,n],r={label:"Rust X DatenLord l Rust China Conf 2023 倒计时！",description:"Rust语言作为一种强调性能、安全和并发性的新的编程语言，吸引了越来越多的程序员想要尝试学习和使用Rust。达坦科技（DatenLord）旗下的开源项目Xline （用于元数据管理的分布式KV存储）就是用Rust写就的，我们也一直坚定地做Rust语言在中国的布道。",cover:"./cover.jpg",location:"中国香港",date:"2023-06-11",title:"Countdown to Rust X DatenLord l Rust China Conf 2023"},e=[{label:"倒计时",level:2},{label:"主会场",level:2},{label:"分论坛：Rust 语言与高性能实践",level:2},{label:"Workshop：Rust in System",level:2},{label:"报名注意事项",level:2}],p=`

    封面

    倒计时

    Rust 语言作为一种强调性能、安全和并发性的新的编程语言，吸引了越来越多的程序员想要尝试学习和使用 Rust。达坦科技（DatenLord）旗下的开源项目 Xline （用于元数据管理的分布式 KV 存储）就是用 Rust 写就的，我们也一直坚定地做 Rust 语言在中国的布道。

    因此，2023 年 6 月 17-18 日 我们也将奔赴上海，支持 Rust 语言中文社区在疫情之后首次举办的大型线下 Rust 开发者大会。达坦科技的两位创始人将在 Rust China Conf 2023 上分别做主题演讲，在 6 月 17 日晚，达坦科技还将赞助举办一场干货满满的 workshop。

    @@ -31,4 +31,4 @@ const t="/zh-cn/assets/cover-ae42e606.jpg",s="/zh-cn/assets/image1-4de20ee3.jpg"

    添加小助手微信，进入达坦科技 Rust 前沿技术交流群

    封面

    更多关于 Rust China Conf 2023 官方信息，请查阅
    --https://rustcc.cn/2023rustchinaconf/

    `;export{o as assetURLs,g as default,r as metadata,e as toc}; +-https://rustcc.cn/2023rustchinaconf/

    `;export{o as assetURLs,p as default,r as metadata,e as toc}; diff --git a/zh-cn/assets/index-494dac65.js b/zh-cn/assets/index-2bc875c0.js similarity index 95% rename from zh-cn/assets/index-494dac65.js rename to zh-cn/assets/index-2bc875c0.js index 803af9c..dc7fde2 100644 --- a/zh-cn/assets/index-494dac65.js +++ b/zh-cn/assets/index-2bc875c0.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/cover-6865ae02.png",e=[l],i={label:"Xline v0.4.0:一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",author:["期待你贡献的"],tags:["Xline"],date:"2023-05-11",title:"Xline v0.4.0: A distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.4.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],n=`

    封面

    +const l="/zh-cn/assets/cover-6865ae02.png",e=[l],i={label:"Xline v0.4.0:一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",author:["期待你贡献的"],tags:["Xline"],date:"2023-05-11",title:"Xline v0.4.0_ A distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.4.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],s=`

    封面

    Xline 是什么？我们为什么要做 Xline？

    Xline 是一个基于 Curp 协议的，用于管理元数据的分布式 KV 存储。 现有的分布式 KV 存储大多采用 Raft 共识协议，需要两次 RTT 才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

    但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个 RTT，从而提高性能。因此，Xline 旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

    @@ -37,4 +37,4 @@ Xline 的建设需要每一位对此感兴趣且愿意付出的你们的参与
  • Curp 相关文章:
    https://medium.com/@datenlord/curp-revisit-the-consensus-protocol-384464be1600
  • Xline 官网：www.xline.cloud
    • -`;export{e as assetURLs,n as default,i as metadata,t as toc}; +`;export{e as assetURLs,s as default,i as metadata,t as toc}; diff --git a/zh-cn/assets/index-b73b42f4.js b/zh-cn/assets/index-2cc15fbf.js similarity index 98% rename from zh-cn/assets/index-b73b42f4.js rename to zh-cn/assets/index-2cc15fbf.js index d5c4a7a..04ba6cb 100644 --- a/zh-cn/assets/index-b73b42f4.js +++ b/zh-cn/assets/index-2cc15fbf.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/cover-eeda38bf.png",i=[l],e={label:"Xline v0.6.0:一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。",cover:"./cover.png",location:"中国香港",author:["更新版本的"],tags:["Xline"],date:"2023-11-23",title:"Xline v0.6.0: a distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.6.0 版本有什么新功能？",level:2}],n=`

    封面

    +const l="/zh-cn/assets/cover-eeda38bf.png",i=[l],e={label:"Xline v0.6.0:一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。",cover:"./cover.png",location:"中国香港",author:["更新版本的"],tags:["Xline"],date:"2023-11-23",title:"Xline v0.6.0_ a distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.6.0 版本有什么新功能？",level:2}],n=`

    封面

    Xline 是什么？我们为什么要做 Xline？

    Xline 是一个基于 Curp 协议的，用于管理元数据的分布式 KV 存储。 现有的分布式 KV 存储大多采用 Raft 共识协议，需要两次 RTT 才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

    但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个 RTT，从而提高性能。因此，Xline 旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

    diff --git a/zh-cn/assets/index-30613c55.js b/zh-cn/assets/index-34b313c2.js similarity index 97% rename from zh-cn/assets/index-30613c55.js rename to zh-cn/assets/index-34b313c2.js index 10dedc0..4c27ed2 100644 --- a/zh-cn/assets/index-30613c55.js +++ b/zh-cn/assets/index-34b313c2.js @@ -1,4 +1,4 @@ -const p="/zh-cn/assets/cover-266fa864.png",t=[p],o={label:"从云计算到天空计算（一）",description:"2021年，UC Berkeley的Ion Stoica和Scott Shenker，在运行系统热点话题的研讨会上，发布了“从云计算到天空计算”的论文。不同于我们都熟知的Cloud Computing(“云计算”)，Sky Computing (“天空计算”)，是云计算的未来，是指天空中有很多的云，如何解决跨云的问题，打破不同云之间的隔阂，最大化地利用跨云数据。",cover:"./cover.png",location:"海南",author:["达坦科技"],tags:["Xline"],date:"2023-01-19",title:"From Cloud Computing to Sky Computing (1)"},e=[{label:"简介",level:2},{label:"历史的回顾",level:2},{label:"从因特网获得的启示",level:2},{label:"兼容层",level:2},{label:"未完待续……",level:2}],n=`

    封面

    +const t="/zh-cn/assets/cover-266fa864.png",p=[t],o={label:"从云计算到天空计算（一）",description:"2021年，UC Berkeley的Ion Stoica和Scott Shenker，在运行系统热点话题的研讨会上，发布了“从云计算到天空计算”的论文。不同于我们都熟知的Cloud Computing(“云计算”)，Sky Computing (“天空计算”)，是云计算的未来，是指天空中有很多的云，如何解决跨云的问题，打破不同云之间的隔阂，最大化地利用跨云数据。",cover:"./cover.png",location:"海南",author:["达坦科技"],tags:["Xline"],date:"2023-01-19",title:"From Cloud Computing to Sky Computing (1)"},n=[{label:"简介",level:2},{label:"历史的回顾",level:2},{label:"从因特网获得的启示",level:2},{label:"兼容层",level:2},{label:"未完待续……",level:2}],e=`

    封面

    2021 年，UC Berkeley 的 Ion Stoica 和 Scott Shenker，在运行系统热点话题的研讨会上，发布了“从云计算到天空计算”的论文。不同于我们都熟知的 Cloud Computing(“云计算”)，Sky Computing (“天空计算”)，是云计算的未来，是指天空中有很多的云，如何解决跨云的问题，打破不同云之间的隔阂，最大化地利用跨云数据。

    达坦科技的使命正如同论文中描述的“天空计算”的愿景：打造下一代云计算平台，让云之间没有隔阂。为此，新年伊始，我们翻译了这篇论文，将分两期发布。如下是“从云计算到天空计算”的第一部分。

    简介

    @@ -24,4 +24,4 @@ const p="/zh-cn/assets/cover-266fa864.png",t=[p],o={label:"从云计算到天空

    虽然开源软件解决了天空计算中的绝大多数问题, 但是还有一个问题没有解决, 那就是存储问题, 因为每一家云厂商都会提供自己的存储接口。幸运的是已经有一个方案提供 S3 兼容的接口, 甚至一些云厂商自己也会提供 S3 兼容的接口。更进一步, 云平台之间的数据访问应该是可行的, 不会受到阻碍。

    未完待续……

    达坦科技（DatenLord）推出的开源分布式 KV 存储 Xline，就是针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并保证数据的一致性，方便业务系统实现多地多中心多活部署。

    -

    GitHub 链接：Https://github.com/datenlord/Xline

    `;export{t as assetURLs,n as default,o as metadata,e as toc}; +

    GitHub 链接：Https://github.com/datenlord/Xline

    `;export{p as assetURLs,e as default,o as metadata,n as toc}; diff --git a/zh-cn/assets/index-484500d8.js b/zh-cn/assets/index-39390118.js similarity index 91% rename from zh-cn/assets/index-484500d8.js rename to zh-cn/assets/index-39390118.js index 5ee14c2..e7636fd 100644 --- a/zh-cn/assets/index-484500d8.js +++ b/zh-cn/assets/index-39390118.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/image1-3ae2277f.jpg",e="/zh-cn/assets/image1-0a18e154.png",s=[t,e],a={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",location:"中国海南",tags:["Xline"],date:"2023-02-01",title:"Distributed laboratory live broadcast l Consensus algorithm and consistent metadata management across data centers"},i=[],n=`

    在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。

    +const t="/zh-cn/assets/image1-3ae2277f.jpg",a="/zh-cn/assets/image1-0a18e154.png",e=[t,a],s={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",location:"中国海南",tags:["Xline"],date:"2023-02-01",title:"Distributed laboratory live broadcast l Consensus algorithm and consistent metadata management across data centers"},i=[],n=`

    在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。

    本周四（2 月 2 日）晚上 8 点，达坦科技和分布式实验室合作，由达坦科技 Rust 分布式存储工程师赵佳炜讲述共识算法与跨数据中心一致性的元数据管理，并介绍 Xline 是如何实现高性能跨数据中心的数据一致性管理。

    图片

    直播亮点：

    @@ -9,6 +9,6 @@ const t="/zh-cn/assets/image1-3ae2277f.jpg",e="/zh-cn/assets/image1-0a18e154.png
  • Xline 接下来的优化方向。

    • 请添加分布式实验室小助手的微信，报名参与直播：

    -

    图片

    +

    图片

    达坦科技（DatenLord）推出的开源分布式 KV 存储 Xline，针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并保证数据的一致性，方便业务系统实现多地多中心多活部署。

    -

    GitHub 链接：https:github.com/datenlord/Xline

    `;export{s as assetURLs,n as default,a as metadata,i as toc}; +

    GitHub 链接：https:github.com/datenlord/Xline

    `;export{e as assetURLs,n as default,s as metadata,i as toc}; diff --git a/zh-cn/assets/index-67a528fa.js b/zh-cn/assets/index-3da8d133.js similarity index 98% rename from zh-cn/assets/index-67a528fa.js rename to zh-cn/assets/index-3da8d133.js index fe2d357..f765125 100644 --- a/zh-cn/assets/index-67a528fa.js +++ b/zh-cn/assets/index-3da8d133.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/image1-50beaba8.png",t=[e],i={label:"精彩回顾：2023 SpinalHDL 应用前景探索研讨会",description:"达坦科技通过软硬件深度融合的方式打通云间壁垒，实现数据高效跨云访问。其采用硬件加速提升存储性能，目前采用FPGA实现存储相关场景的性能加速。SpinalHDL是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技一直热心于推广SpinalHDL在业界的落地应用。达坦科技此次联合SpinalHDL社区及该语言的创建者 Charles Papon 举办了 《2023 SpinalHDL应用前景探索》的线上研讨会，分为两个Track。",location:"中国新疆",date:"2023-12-21",title:"Highlights: 2023 SpinalHDL Application Prospect Exploration Workshop"},n=[{label:"Tooling and flow",level:2},{label:"Projects",level:2},{label:"Related Resources",level:2}],o=`

    达坦科技通过软硬件深度融合的方式打通云间壁垒，实现数据高效跨云访问。其采用硬件加速提升存储性能，目前采用 FPGA 实现存储相关场景的性能加速。SpinalHDL 是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技一直热心于推广 SpinalHDL 在业界的落地应用。

    +const e="/zh-cn/assets/image1-50beaba8.png",t=[e],i={label:"精彩回顾：2023 SpinalHDL 应用前景探索研讨会",description:"达坦科技通过软硬件深度融合的方式打通云间壁垒，实现数据高效跨云访问。其采用硬件加速提升存储性能，目前采用FPGA实现存储相关场景的性能加速。SpinalHDL是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技一直热心于推广SpinalHDL在业界的落地应用。达坦科技此次联合SpinalHDL社区及该语言的创建者 Charles Papon 举办了 《2023 SpinalHDL应用前景探索》的线上研讨会，分为两个Track。",location:"中国新疆",date:"2023-12-21",title:"Highlights_ 2023 SpinalHDL Application Prospect Exploration Workshop"},n=[{label:"Tooling and flow",level:2},{label:"Projects",level:2},{label:"Related Resources",level:2}],o=`

    达坦科技通过软硬件深度融合的方式打通云间壁垒，实现数据高效跨云访问。其采用硬件加速提升存储性能，目前采用 FPGA 实现存储相关场景的性能加速。SpinalHDL 是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技一直热心于推广 SpinalHDL 在业界的落地应用。

    达坦科技此次联合 SpinalHDL 社区及该语言的创建者 Charles Papon 举办了《2023 SpinalHDL 应用前景探索》** 的线上研讨会，分为两个 Track。

    Tooling and flow

    Track 1: Tooling and flow

    diff --git a/zh-cn/assets/index-9cbd4195.js b/zh-cn/assets/index-404f0d83.js similarity index 98% rename from zh-cn/assets/index-9cbd4195.js rename to zh-cn/assets/index-404f0d83.js index 34d9912..a0df1b5 100644 --- a/zh-cn/assets/index-9cbd4195.js +++ b/zh-cn/assets/index-404f0d83.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-eeda38bf.png",l=[e],i={label:"Xline v0.2.0：一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",tags:["Xline"],date:"2023-02-16",title:"Xline v0.2.0: A distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.2.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],n=`

    封面

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    封面

    Xline 是什么？我们为什么要做 Xline？

    Xline 是一个基于 Curp 协议的，用于管理元数据的分布式 KV 存储。 现有的分布式 KV 存储大多采用 Raft 共识协议，需要两次 RTT 才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

    但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个 RTT，从而提高性能。因此，Xline 旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

    diff --git a/zh-cn/assets/index-90e44649.js b/zh-cn/assets/index-40bc588f.js similarity index 98% rename from zh-cn/assets/index-90e44649.js rename to zh-cn/assets/index-40bc588f.js index c939e70..432f949 100644 --- a/zh-cn/assets/index-90e44649.js +++ b/zh-cn/assets/index-40bc588f.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/image1-85650830.png",a="/zh-cn/assets/image2-d3ac686f.png",t="/zh-cn/assets/image3-d19685f7.png",e="/zh-cn/assets/image4-22c90bed.png",l="/zh-cn/assets/image5-060ec542.png",p="/zh-cn/assets/image6-e95accb5.png",n="/zh-cn/assets/image7-39b0aa47.png",c="/zh-cn/assets/image8-f5342e9f.png",i="/zh-cn/assets/image9-f8fdd108.png",r="/zh-cn/assets/image10-fea0520f.png",C="/zh-cn/assets/image11-3896bab5.png",o="/zh-cn/assets/image12-5d3c96d7.png",h="/zh-cn/assets/image13-56596c1a.png",d="/zh-cn/assets/image14-1cff1399.png",u="/zh-cn/assets/image15-f50d9208.png",g="/zh-cn/assets/image16-73064f95.png",m="/zh-cn/assets/image17-8fbf2614.png",R="/zh-cn/assets/image18-04a62cf7.png",_="/zh-cn/assets/image19-b4bc01e2.png",b="/zh-cn/assets/image20-41386794.png",j="/zh-cn/assets/image21-453c426e.png",y="/zh-cn/assets/image22-e0049342.png",E="/zh-cn/assets/image23-989a38cf.png",S=[s,a,t,e,l,p,n,c,i,r,C,o,h,d,u,g,m,R,_,b,j,y,E],f={label:"基于BSV的高性能并行CRC硬件电路生成器",description:"循环冗余校验码，即Cyclic Redundancy Check (CRC), 是一种在各种通信系统中广泛应用的检错机制。CRC算法的工作原理和哈希函数类似，具体来说，其对任意长度的数据计算出一段唯一的标识（校验和）, 然后根据这个标识来判断该数据在传输过程中是否发生变化。CRC检错码在实际生活中有着广泛的应用，诸如网络通信，存储系统等场景下都需要CRC来保证数据传输的正确性。而不同的应用场景往往需要采用不同的CRC配置参数，同时对计算的性能也有不同的需求。例如，在基于Ethernet协议的网络传输中需要采用IEEE802-3协议所规定的CRC参数，同时需要高吞吐率的CRC实现以和网络带宽相匹配。",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2023-07-27",title:"BSV based high performance parallel CRC hardware circuit generator"},x=[{label:"引 言",level:2},{label:"算法原理",level:2},{label:"CRC 计算的定义",level:3},{label:"电路架构与性能",level:2},{label:"架构设计",level:3},{label:"性能与面积",level:3},{label:"使用指南",level:2},{label:"配置参数",level:3},{label:"输入输出接口",level:3},{label:"BSV 使用接口",level:3},{label:"Verilog 使用接口",level:3},{label:"引用和链接",level:2}],v=`

    引 言

    +const s="/zh-cn/assets/image1-85650830.png",a="/zh-cn/assets/image2-d3ac686f.png",t="/zh-cn/assets/image3-d19685f7.png",e="/zh-cn/assets/image4-22c90bed.png",l="/zh-cn/assets/image5-060ec542.png",p="/zh-cn/assets/image6-e95accb5.png",n="/zh-cn/assets/image7-39b0aa47.png",i="/zh-cn/assets/image8-f5342e9f.png",c="/zh-cn/assets/image9-f8fdd108.png",r="/zh-cn/assets/image10-fea0520f.png",C="/zh-cn/assets/image11-3896bab5.png",o="/zh-cn/assets/image12-5d3c96d7.png",h="/zh-cn/assets/image13-56596c1a.png",d="/zh-cn/assets/image14-1cff1399.png",u="/zh-cn/assets/image15-f50d9208.png",g="/zh-cn/assets/image16-73064f95.png",m="/zh-cn/assets/image17-8fbf2614.png",R="/zh-cn/assets/image18-04a62cf7.png",_="/zh-cn/assets/image19-b4bc01e2.png",b="/zh-cn/assets/image20-41386794.png",j="/zh-cn/assets/image21-453c426e.png",E="/zh-cn/assets/image22-e0049342.png",S="/zh-cn/assets/image23-989a38cf.png",f=[s,a,t,e,l,p,n,i,c,r,C,o,h,d,u,g,m,R,_,b,j,E,S],y={label:"基于BSV的高性能并行CRC硬件电路生成器",description:"循环冗余校验码，即Cyclic Redundancy Check (CRC), 是一种在各种通信系统中广泛应用的检错机制。CRC算法的工作原理和哈希函数类似，具体来说，其对任意长度的数据计算出一段唯一的标识（校验和）, 然后根据这个标识来判断该数据在传输过程中是否发生变化。CRC检错码在实际生活中有着广泛的应用，诸如网络通信，存储系统等场景下都需要CRC来保证数据传输的正确性。而不同的应用场景往往需要采用不同的CRC配置参数，同时对计算的性能也有不同的需求。例如，在基于Ethernet协议的网络传输中需要采用IEEE802-3协议所规定的CRC参数，同时需要高吞吐率的CRC实现以和网络带宽相匹配。",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2023-07-27",title:"BSV based high performance parallel CRC hardware circuit generator"},x=[{label:"引 言",level:2},{label:"算法原理",level:2},{label:"CRC 计算的定义",level:3},{label:"电路架构与性能",level:2},{label:"架构设计",level:3},{label:"性能与面积",level:3},{label:"使用指南",level:2},{label:"配置参数",level:3},{label:"输入输出接口",level:3},{label:"BSV 使用接口",level:3},{label:"Verilog 使用接口",level:3},{label:"引用和链接",level:2}],F=`

    引 言

    循环冗余校验码，即 Cyclic Redundancy Check (CRC), 是一种在各种通信系统中广泛应用的检错机制。CRC 算法的工作原理和哈希函数类似，具体来说，其对任意长度的数据计算出一段唯一的标识（校验和）, 然后根据这个标识来判断该数据在传输过程中是否发生变化。CRC 检错码在实际生活中有着广泛的应用，诸如网络通信，存储系统等场景下都需要 CRC 来保证数据传输的正确性。而不同的应用场景往往需要采用不同的 CRC 配置参数，同时对计算的性能也有不同的需求。例如，在基于 Ethernet 协议的网络传输中需要采用 IEEE802-3 协议所规定的 CRC 参数，同时需要高吞吐率的 CRC 实现以和网络带宽相匹配。

    对于一个具体的通信系统，CRC 既可以通过软件编程也可以硬件电路的形态来实现。相较于网络上丰富的软件库，开源的 CRC 硬件实现却相对落后，尤其是面向高性能的应用场景。例如，下述链接都提供了参数可配置的 CRC 硬件电路生成器，但这些实现方式都是直接将 CRC 算法映射到组合逻辑电路上，这往往会导致较长的组合逻辑延时进而降低电路的整体工作频率，无法满足高吞吐率的需求。

    原文链接： -https://woset-workshop.github.io/PDFs/2021/a02.pdf

    `;export{i as assetURLs,s as default,l as metadata,t as toc}; +https://woset-workshop.github.io/PDFs/2021/a02.pdf

    `;export{l as assetURLs,s as default,i as metadata,t as toc}; diff --git a/zh-cn/assets/index-ef7b41da.js b/zh-cn/assets/index-4dde8fa0.js similarity index 93% rename from zh-cn/assets/index-ef7b41da.js rename to zh-cn/assets/index-4dde8fa0.js index b6db4ca..f95efaf 100644 --- a/zh-cn/assets/index-ef7b41da.js +++ b/zh-cn/assets/index-4dde8fa0.js @@ -1,4 +1,4 @@ -const n="/zh-cn/assets/image1-b917417e.jpg",o="/zh-cn/assets/image1-50beaba8.png",p=[n,o],a={label:"倒计时5天：SpinalHDL应用前景探索线上研讨会",description:"SpinalHDL是一种开源的高级硬件描述语言，它可以作为VHDL或Verilog的替代，Charles Papon 在2014年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于Scala的DSL，能够借助现有的Scala语言特性和开发工具提供强大、易用、高效的硬件设计能力。达坦科技采用硬件加速提升存储性能，目前采用FPGA实现存储相关场景的性能加速。SpinalHDL是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技也一直热心于推广SpinalHDL在业界的落地应用。在2023年12月10日，我们将联合SpinalHDL社区及该语言的创建者 Charles Papon 举办 《2023 SpinalHDL应用前景探索》的线上研讨会，分为两个Track。",location:"中国香港",date:"2023-12-05",title:"Countdown to 5 days: SpinalHDL application prospect exploration online seminar"},t=[{label:"Tooling and flow:",level:2},{label:"Projects :",level:2}],s=`

    SpinalHDL 是一种开源的高级硬件描述语言，它可以作为 VHDL 或 Verilog 的替代，Charles Papon 在 2014 年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于 Scala 的 DSL，能够借助现有的 Scala 语言特性和开发工具提供强大、易用、高效的硬件设计能力。

    +const n="/zh-cn/assets/image1-b917417e.jpg",o="/zh-cn/assets/image1-50beaba8.png",a=[n,o],p={label:"倒计时5天：SpinalHDL应用前景探索线上研讨会",description:"SpinalHDL是一种开源的高级硬件描述语言，它可以作为VHDL或Verilog的替代，Charles Papon 在2014年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于Scala的DSL，能够借助现有的Scala语言特性和开发工具提供强大、易用、高效的硬件设计能力。达坦科技采用硬件加速提升存储性能，目前采用FPGA实现存储相关场景的性能加速。SpinalHDL是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技也一直热心于推广SpinalHDL在业界的落地应用。在2023年12月10日，我们将联合SpinalHDL社区及该语言的创建者 Charles Papon 举办 《2023 SpinalHDL应用前景探索》的线上研讨会，分为两个Track。",location:"中国香港",date:"2023-12-05",title:"Countdown to 5 days_ SpinalHDL application prospect exploration online seminar"},t=[{label:"Tooling and flow:",level:2},{label:"Projects :",level:2}],s=`

    SpinalHDL 是一种开源的高级硬件描述语言，它可以作为 VHDL 或 Verilog 的替代，Charles Papon 在 2014 年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于 Scala 的 DSL，能够借助现有的 Scala 语言特性和开发工具提供强大、易用、高效的硬件设计能力。

    达坦科技采用硬件加速提升存储性能，目前采用 FPGA 实现存储相关场景的性能加速。SpinalHDL 是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技也一直热心于推广 SpinalHDL 在业界的落地应用。

    在 2023 年 12 月 10 日，我们将联合 SpinalHDL 社区及该语言的创建者 Charles Papon 举办 《2023 SpinalHDL 应用前景探索》 的线上研讨会，分为两个 Track。

    Tooling and flow:

    @@ -21,4 +21,4 @@ Explore the SpinalHDL Landscape

    会议链接：
    https://zoom.us/j/82302372789?pwd=OYsFCbiW06KqC4U83ZKsZwefM75gJr.1

    对开源硬件和敏捷开发感兴趣的朋友，可以添加达坦科技小助手的微信，加入达坦科技硬件群。

    -

    图片

    `;export{p as assetURLs,s as default,a as metadata,t as toc}; +

    图片

    `;export{a as assetURLs,s as default,p as metadata,t as toc}; diff --git a/zh-cn/assets/index-4e044280.js b/zh-cn/assets/index-4e044280.js new file mode 100644 index 0000000..323785e --- /dev/null +++ b/zh-cn/assets/index-4e044280.js @@ -0,0 +1,60 @@ +const e="/zh-cn/assets/image-8a82c950.png",l="/zh-cn/assets/image1-3fca9c88.png",p="/zh-cn/assets/image2-4b4682e9.png",a="/zh-cn/assets/image3-9e47728d.png",t="/zh-cn/assets/image4-bfeb3386.png",C="/zh-cn/assets/image5-114ef16c.png",c="/zh-cn/assets/image7-f5df505b.png",i="/zh-cn/assets/image6-f738e012.png",I=[e,l,p,a,t,C,c,i],s={label:"规模弹性： 管理谷歌的TPUv4机器学习超级计算机（二）",description:"我由于字数过长，文章分为两期发布，本片涵盖原文后半部分4～9节，前三章节请参考文章：规模弹性：管理谷歌的TPUv4机器学习超级计算机。",location:"中国香港",cover:"./image.png",author:["达坦科技"],date:"2024-06-20",title:"Managing Google's TPUv4 Machine Learning Supercomputer (ll)"},n=[{label:"ICI 路由",level:2},{label:"无故障路由",level:3},{label:"容错路由",level:3},{label:"离线路由优化",level:3},{label:"机群统计数据",level:2},{label:"Cube重新配置",level:3},{label:"硬件维护自动化",level:3},{label:"容错工作",level:3},{label:"相关工作",level:2},{label:"未来工作",level:2},{label:"结论",level:2},{label:"致谢",level:2}],P=`

    图片 +由于字数过长，文章分为两期发布，本片涵盖原文后半部分4～9节，前三章节请参考文章：规模弹性：管理谷歌的TPUv4机器学习超级计算机

    +

    ICI 路由

    +

    我们在高带宽 ICI 链路上使用多跳数据包路由，以提供快速的 TPU RDMA 和集合。ICI 路由允许在 pod 中任意一对 TPU 之间发送 RDMA 数据包，并能绕过某些 ICI 故障。libtpunet 会在作业启动时对 ICI 转发表进行一次编程，并在作业生命周期内保持不变。每个源-目的配对会沿着 ICI 拓扑中的一条预定路径发送数据包。

    +

    这种方法虽然简单，但足以在 ML 模型并行分解过程中出现的典型集体通信模式（如all-gather, reduce-scatter, all-reduce, all-to-all）上实现高性能[33]。

    +

    在本节描述的两种情况下，libtpunet 必须在多个候选路径中谨慎地选择一条路径，以满足 ICI 转发表的约束条件：平局破译和容错 wild-first路由。我们使用整数线性规划方法进行离线路径选择，并将优化结果缓存起来。这样，libtpunet 就能在 ICI 网络设置过程中快速加载预先计算出的解决方案。 +图片 +图 10：沿 4x4x8 环形的 X 维不可用 OCS 影响 ICI 链路的示例。不可用的 OCS 导致环的一个 XZ 平面上有两个 X 链路不可用，其他 XZ 平面则不受影响。不可用链接用红色虚线标出。OCS 的连通性产生了周期性故障模式，即沿 Z 每 4 跳重复出现不可用链接。

    +

    无故障路由

    +

    为常规环形拓扑配置时，ICI 使用维序路由（DOR）[11]：所有数据包按照环形中从源点到目的地的最短路径，以固定顺序（如先 X 后 Y 再 Z）一次路由一个维度。如 [8] 所述，选择的维度顺序是环中较长的维度先路由。DOR 足以平衡 ML 作业常见流量模式的负载。只需两个虚拟通道[10]，它就能实现无死锁，因此实施成本很低。

    +

    当数据包需要在一个维度上走完全部路程时，就会出现一个复杂问题，因为在这种情况下，有两条最短路径可供选择。例如，在一个 8x8x8 的环中，将一个数据包从源点（x = 1，y = 0，z = 0）路由到目的地（x = 5，y = 0，z = 0），在 X + 或 X - 方向上可以走 4 跳。

    +

    我们通过算法来处理这种平局的情况：当相关源节点坐标沿该维度为偶数时，数据包会沿正向移动，否则会沿负向移动。在我们的例子中，源节点（x = 1，y = 0，z = 0）的 X 坐标为奇数，因此断线选择 X -。这种方案可以平衡常见的全对全流量模式的负载。

    +

    扭转环中的路由也使用 DOR，并通过两个虚拟通道实现无死锁。不过，在扭曲环中打破平局更为复杂，因为其维度不像常规环那样可分离：图 9 使用两个维度进行了简单说明。我们决定将处理扭曲环形中的平分问题纳入一个更通用的整数线性编程框架，该框架还能处理容错路由（第 4.3 节）。这样就无需在这种情况下开发明确的平局打破算法。

    +

    容错路由

    +

    由于具有动态cube选择能力，可重新配置的 ICI 架构本身就能抵御机器故障。在 libtpunet 中，通过支持容错路由，可进一步抵御 OCS 不可用事件。如果 OCS 不可用，一组稀疏的链接也会变得不可用。如图 10 所示，由于cube与 OCS 的连通性，不可用链接的模式与cube粒度高度对称。只需少量路由灵活性，数据包就能避开断开的链接。我们针对这些情况离线优化路由算法。

    +

    通过维序路由（DOR）选择的源-目的地对之间的路径，如果穿过不可用的链路，就会变得不可用。在这种情况下，可使用 wild-first路由（WFR）创建替代路径。在 WFR 中，允许数据包沿每个维度最多进行一次容错跳转，然后再返回到使用 DOR 的目的地。 +图片 +图 11：源 S 和目的地 D 之间的路由示例（虚线路径）。XY 维顺序路由（A）与不可用链路（红色虚线）交叉，因此无法使用。两条可能的 yXY wild-first 路由（B 和 C）先在 Y 方向走一跳，然后再继续走 XY DOR，从而避免了故障。

    +

    图 11 显示了一个在二维环中的 WFR 路由示例。在这个例子中，维度顺序是先 X 后 Y，只有沿 Y（Y + 或 Y -）的任意跳才有助于避免不可用链接。我们使用简称 yXY 来表示 wild-first路由算法，即在继续 XY 维顺序路由之前，先沿着 Y 进行一次容错跳转。yXY 算法可以避开 X 维上的任何一条不可用链路。

    +

    有一条 “三明治 ”规则体现了 WFR 的容错性：要避免一个维度上的故障，路由算法中必须在其前后出现另一个维度上的跳转。同样，xYX算法可以避免 Y 维的故障。扩展到三维，xyZY X 算法可以避免 Y 维和 Z 维的单一故障。

    +

    WFR 的开发受到 ICI 交换机微体系结构的影响。虽然超出了本文的讨论范围，但 WFR 可以通过两个虚拟通道实现无死锁，但有一个限制条件：野跳顺序必须与维度顺序相反。例如，xyZY X 在两个虚拟通道下无死锁，但 yxZY X 则不然。

    +

    离线路由优化

    +

    前几节介绍了由于平局或 wild-first路由算法而产生多条候选路径的情况。而 ICI 交换机的实现使用的是静态转发表，它为每个源-目的配对设定了一条路径。如前所述，我们将路径选择编程为整数线性程序（ILP），离线计算解决方案，并将其缓存起来，供运行时使用。

    +

    ILP 的目标是通过解决最大并发流量问题，最大化预定义流量模式的吞吐量[27]。通常选择 All-to-all 作为流量模式，并通过补充约束确保其他集合（如 all-reduce）性能良好。为了遵守静态路由约束，每个路径变量都被限制为布尔值，每个源-目的对只有一条路径。

    +

    在无故障和容错情况下，ILP 的设计都是为了利用平移对称性来减少变量数量 [30]。这使得为实际网络规模寻找最优解变得容易。环面和扭曲环面都是顶点对称的，因此可以对一个典型源使用单组路径变量，然后将其转换为所有其他源。如图 10 所示，当 OCS 不可用时，故障模式是周期性的，粒度为cube。虽然由此产生的拓扑结构不如无故障情况下那么对称，但 ILP 仍然可以限制在一组典型源上。这也使得单个典型案例可以离线求解和缓存。典型故障模式可从实际故障模式转化而来，并在网络设置过程中初始化。 +图片 +表 2：在 (a) 所有 OCS 均正常和 (b) 一个 OCS 不可用的情况下测得的全对全吞吐量。最后一列显示了单故障情况与健康情况下的吞吐量。

    +

    表 2 比较了使用这种方法优化转发表时，在无故障和单 OCS 故障情况下测得的全对全吞吐量。对于常规环形网络，单个不可用的 OCS 会将理想的全对全性能降低到无故障网络的 15/16 ≈ 93.4%。这相当于在连接 OCS 的 4x4x4 cube的一个面上失去了 16 个链路中的一个。有趣的是，扭曲环显示出更好的恢复能力，在出现不可用 OCS 的情况下，4x4x8 的性能略有提高。这是因为平分所提供的灵活性：通过平衡不同的平分路径，流量可以从一个维度转移到另一个维度。这种平衡在普通环中是不可能实现的。4x4x8 情况下的微小改进很好地说明了 ILP 方案只能代表实际性能。

    +

    机群统计数据

    +

    在本节中，我们将介绍谷歌在过去两年中运行 TPUv4 超级计算机的机队经验。我们将重点关注软件堆栈对 OCS xconnect、故障和整体系统可用性的自动管理。

    +

    Cube重新配置

    +

    每天都有成千上万的训练任务提交给谷歌的 TPUv4 超级计算机。图 13 显示了一台超级计算机在两个月内的 OCS xconnect 操作样本，与该 pod 接受的作业数量相关。由于 Pod 管理器会在每个作业到达时更新 ICI 端口 xconnect，因此作业数量越多，OCS xconnect 变化也就越多。当有大型和/或长时间运行的培训作业时，我们也会看到 OCS xconnect 的变化，因为这些作业需要重新安排时间来处理维护和故障。总体而言，TPUv4 超级计算机在每个 pod 每天进行数万次 OCS xconnect 更改的情况下仍能可靠运行。 +图片] +图 13：TPUv4 超级计算机在两个抽样月中的 OCS xconnect 操作和接受的作业。

    +

    硬件维护自动化

    +

    TPUv4 的可重构性和容错路由允许对机器和 OCS 故障进行恢复。图 12 显示了每台超级计算机不同硬件组件的平均故障率。

    +

    TPUv4 的计算资源以多机器cube的粒度组织。每个 TPU 机器都有一个 CPU 盘和一个 TPU 盘，通过 PCIe 链接。每个 TPU 托盘有 4 个 TPUv4 芯片，以 2x2x1 ICI 网格排列；16 台 TPU 机器组合成一个数据中心机架；机架内的 ICI 链接通过 ICI 互联，形成 4x4x4 网格。这个组合就是一个cube。

    +

    alt text

    +

    图 12：超级计算机硬件故障和恢复的每周统计，包括 TPU 机器、ICI 电缆和 OCS。

    +

    故障在 TPU 机器、ICI 链路和 OCS 层面进行诊断。Pod 管理器和 healthd 自动执行修复和恢复过程。在一台普通超级计算机中，每天会有 0.08% 的 TPU 机器、0.005% 的 ICI 电缆和 0.04% 的 OCS 出现故障。虽然这些数值很小，但由于每台超级计算机都有大量的机器、ICI 和 OCS，因此受硬件故障影响的工作数量并不少。通过重新配置作业以使用备用的健康cube，可以自动容忍机器和 ICI 中断。OCS 中断的影响半径更大，因为它会影响超级计算机中的所有cube。容错 ICI 路由允许我们容忍 OCS 中断，但会对性能造成一定影响；与其他组件相比，我们优先考虑 OCS 组件的恢复时间，以尽量减少这种影响。

    +

    容错工作

    +

    根据我们迄今为止的经验，95% 的 TPUv4 训练任务都选择了容错 ICI 路由，这样它们就能抵御 OCS 中断；其余的任务则选择了退出，以排除不同路由策略造成的性能不确定性。图 14 显示了在为期 8 个月的样本期间，整个舰队所有正在运行的容错路由作业的比例。一般来说，任何时候都只有不到 2% 的工作在运行容错路由。这一比例与 OCS 维护事件和每次事件的恢复时间高度相关。第 60 天左右的峰值是由于计划对整个机队的 OCS 部件进行升级，以提高可靠性。 +alt text

    +

    图 14：8 个月内使用容错路由（OCS 故障恢复能力）的作业百分比。

    +

    容错 ICI 路由会带来性能损失，因为故障链路周围的流量会更加拥挤。负载不平衡会影响包括 allto-all 和 all-reduce 在内的集体操作。我们测量了一系列关键 Google 工作负载对性能的影响，包括推荐模型 (RM)、大型语言模型 (LLM) 和基于 BERT [13] 的模型。表 3 总结了我们的结果。 +alt text +表 3：容错 ICI 路由对性能的影响。

    +

    对于全对全的繁重工作负载，步进时间的下降并不明显，因为离线路由优化器已经将全对全性能降至最低，甚至有所提高。这一点对于重嵌入的扭弦图形尤为明显。全还原工作负载会受到更高的性能影响，因为最近邻通信模式会受到 50% 吞吐量的影响。通过更智能的计算和通信重叠，可以改善对全还原操作的影响。总体而言，所有工作负载的步进时间都略有减慢。

    +

    相关工作

    +

    文献[18]讨论了 TPUv4 使用 OCS 的架构决策，文献[20]和[19]评估了上一代静态 TPU pod 的设计。本文介绍了 TPUv4 的软件生态系统及其如何实现大规模弹性。文献[25]介绍了 OCS 在生产规模数据中心网络中的应用，讨论了可扩展性、成本和拓扑工程方面的注意事项。本文重点讨论 OCS 在 TPUv4 超级计算机中的应用。

    +

    之前的工作涉及超级计算机的电路交换 [28]，并提出了用于 ML 训练的拓扑工程 [32]。Nvidia 在 NVlink 上使用基于 NVswitch 的两层胖树网络，用于 GPU 之间的集群。这代表了与我们不同的设计点：与引入分组交换机相比，OCS 简化了 ICI 网络设计，因为它建立了专用物理通道，无需控制共享流量，同时较低的采购价格和待机功率也降低了运营成本[20]。

    +

    扭曲环是由文献[6, 26]提出的；TPUv4 支持的具体（4k,4k,8k）和（4k,8k,8k）扭曲环形状与文献[7]一致。最后，软件定义的数据中心网络在文献中已有大量描述（如 [14, 16, 25, 29]）。据我们所知，我们是第一个为超大规模超级计算机描述这种方法的人。

    +

    未来工作

    +

    我们的短期工作重点是提高 TPU pod 的性能和恢复开销：ML 超级计算硬件的需求量很大，每一点帮助都很重要。今后，除了支持提高 ICI 链路的线路速率外，我们还计划为 ICI 交换机引入随机路由功能，以便在出现故障时更好地平衡环形拓扑和扭曲环形拓扑的负载，特别是最近邻通信模式。

    +

    我们还计划将基于 OCS 的可配置性与工作负载重新配置更紧密地结合起来，让工作在大部分情况下不受故障影响地继续进行。我们的方法是针对故障事件提供热备用cube，并直接将加速器状态迁移到新的 TPU，而无需写入持久检查点。这项工作涉及对 Borg 调度器（按需调配）、libtpunet（动态调整已构建的 ICI 会话）和 Pathways ML 运行时[5]（管理状态转移）的更改。

    +

    结论

    +

    TPUv4 超级计算机是一个超大规模的 4096 芯片计算系统，可应对快速发展的 ML 模型在可用性和可扩展性方面的挑战。TPUv4 的性能约为上一代产品的 2.1 倍，还具有基于光路交换的cube级可重构性，并使用容错 ICI 路由，以便在交换机发生故障时仍能运行。

    +

    本文介绍了 TPUv4 的端到端软件基础设施，为拓扑、路由、调度、中断、监控和硬件健康管理提供了灵活性。TPUv4 的软件定义 ICI 网络方法可在大规模机器和交换机故障时提供强大的故障恢复能力。自2020年以来，该软件一直在生产中运行，为谷歌云计算集群和内部用户运行TPUv4超级计算机，并保持99.98%的系统可用性。

    +

    致谢

    +

    我们要感谢我们的合作者：董翔宇、萨巴斯蒂安-穆加赞比 (Sabastian Mugazambi)、萨迈尔-库马尔 (Sameer Kumar)、安迪-科赫 (Andy Koch)、刘建桥参与了项目的启动，赵文博、李宏基、拉金德拉-戈蒂帕蒂 (Rajendra Gottipati)、潘越超、段晧辰、彼得-加文 (Peter Gavin) 在持续测量和监控方面做出了贡献。我们还要感谢 Kais Belgaied 和 Varinder Singh 在软件基础设施的设计和开发过程中提供的支持。最后，特别感谢罗伯特-亨特（Robert Hundt）、诺姆-尤比（Norm Jouppi）、阿默-马哈茂德（Aamer Mahmood）和匿名 NSDI 评审员对本文提出的反馈和建议。

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    封面

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    封面

    为什么要发起设立 MIT 体系结构公开课学习社区？

    随着芯片技术自主可控成为国家重要的战略发展规划，对芯片设计相关领域的人才需求也在快速增长。体系结构课程相对于硬件设计的重要性可以类比于设计模式相对于软件设计的重要性，扎实的体系结构基础是设计复杂硬件的基石。然而现实情况是，虽然国内大专院校计算机学科、电子工程学科、微电子等都有开设体系结构或组成原理等相关课程，但由于前些年对相关教学重视度不够，导致教学实践环节存在诸多缺失，毕业生掌握的技能与工业界的期望之间存在较大差距。

    由此，在 2023 年伊始，达坦科技发起成立了 MIT 体系结构公开课学习社区，邀请所有对硬件敏捷开发设计感兴趣的同学加入我们，组成拥有共同学习目标的互助自学小组，一起系统地学习计算机体系结构相关知识，并且通过动手项目来验证学习的成果。

    @@ -46,4 +46,4 @@ const e="/zh-cn/assets/cover-2326b9d3.jpg",t="/zh-cn/assets/image1-62ba36d5.png"

    报名成功后，将收到邮件确认及学号。

    图片

    关于 MIT 体系结构公开课学习社区项目有任何问题或疑问，可以邮件：ta@datenlord.com或添加DatenLord 小助手微信咨询。

    -

    图片

    `;export{s as assetURLs,n as default,c as metadata,a as toc}; +

    图片

    `;export{s as assetURLs,n as default,a as metadata,c as toc}; diff --git a/zh-cn/assets/index-8bcfd31b.js b/zh-cn/assets/index-5689e7f4.js similarity index 92% rename from zh-cn/assets/index-8bcfd31b.js rename to zh-cn/assets/index-5689e7f4.js index 2b93648..2586269 100644 --- a/zh-cn/assets/index-8bcfd31b.js +++ b/zh-cn/assets/index-5689e7f4.js @@ -1,4 +1,4 @@ -const n="/zh-cn/assets/cover-dcd7e2ce.jpeg",t="/zh-cn/assets/image1-3ae2277f.jpg",s="/zh-cn/assets/image1-0a18e154.png",e=[n,t,s],o={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",cover:"./cover.jpeg",location:"海南",date:"2023-02-01",title:"Consensus Algorithms and Metadata Management for Cross Data Center Consistency"},r=[],a=`

    在 2021 年时，UC Berkeley 提出了 天空计算（Sky Computing） 的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。 Xline 是一款开源分布式 kv 存储系统， 基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现

    +const n="/zh-cn/assets/cover-dcd7e2ce.jpeg",t="/zh-cn/assets/image1-3ae2277f.jpg",s="/zh-cn/assets/image1-0a18e154.png",o=[n,t,s],e={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",cover:"./cover.jpeg",location:"海南",date:"2023-02-01",title:"Consensus Algorithms and Metadata Management for Cross Data Center Consistency"},r=[],a=`

    在 2021 年时，UC Berkeley 提出了 天空计算（Sky Computing） 的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。 Xline 是一款开源分布式 kv 存储系统， 基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现

    本周四（2 月 2 日）晚上 8 点，达坦科技和分布式实验室合作，由达坦科技 Rust 分布式存储工程师赵佳炜讲述共识算法与跨数据中心一致性的元数据管理，并介绍 Xline 是如何实现高性能跨数据中心的数据一致性管理。

    图片

    直播亮点：

    @@ -11,4 +11,4 @@ const n="/zh-cn/assets/cover-dcd7e2ce.jpeg",t="/zh-cn/assets/image1-3ae2277f.jpg

    请添加分布式实验室小助手的微信，报名参与直播：

    图片

    达坦科技（DatenLord）推出的开源分布式 KV 存储 Xline，针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并保证数据的一致性，方便业务系统实现多地多中心多活部署。

    -

    GitHub 链接：https://github.com/xline-kv/

    `;export{e as assetURLs,a as default,o as metadata,r as toc}; +

    GitHub 链接：https://github.com/xline-kv/

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Access（RDMA）应用程序提供高级抽象和异步API。",main:[{key:1,type:"text",content:"RDMA可以实现从一台机器到另一台机器对内存的直接访问。这可以提高需要低延迟和高吞吐量的应用程序的性能。RDMA支持内核旁路和零拷贝，无需CPU的参与。"},{key:2,type:"text",content:"然而，用低级别的C语言库编写RDMA应用程序往往很困难，而且容易出错。为了让事情变得更简单，我们开发了Async-RDMA，它提供了易于使用的API，隐藏了底层RDMA操作的复杂性。有了Async-RDMA，大多数RDMA操作只需一行代码就能完成。它提供了以下几点主要的功能："},{key:3,type:"list",items:[{key:1,text:"作为与RDMA端点建立连接的工具。"},{key:2,text:"作为在端点之间传输数据的高级异步API。"},{key:3,text:"作为管理RDMA内存区域的高级API。"},{key:4,text:"作为一个在幕后工作的框架来管理内存区域并异步执行RDMA请求。"}]}],url:"https://github.com/datenlord/async-rdma"},{key:"Open-RDMA",title:"Open-RDMA",subTitle:"Open-RDMA 是一个开源的、基于 RoCE v2 协议扩展优化的软硬件实现套件",main:[{key:1,type:"text",content:"RoCE v2（RDMA over Converged Ethernet version 2）是一个网络协议来在以太网上实现远程直接内存访问（RDMA）。它是对于原始RoCE标准的改进，为在以太网上执行RDMA提供了一种更有效且可扩展的方式。"},{key:2,type:"text",content:"Open-RDMA 套件的核心部分是基于 RoCE v2 协议进行再次扩展优化后的软硬件实现，充分发挥软硬件协同设计开发的优势，通过硬件加速实现高吞吐低延迟，通过软件用户态协议栈实现集中管理且高度可配置的传输策略，从而实现在不同网络环境下都可以发挥极致性能。项目采用 Bluespec SystemVerilog、C 和 Rust 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轻量级开发框架”相关知识。",date:"2022.11.20",url:"https://www.bilibili.com/video/BV1u84y1C7pQ/"},{key:16,image:VH,title:"RDMA网络拥塞管理架构",text:"本场workshop由北京邮电大学网络与交换国家重点实验室、计算机学院，副研究员、博导：张乙然进行内容分享，主要内容围绕“RDMA网络拥塞管理架构”进行知识介绍。",date:"2022.11.27",url:"https://www.bilibili.com/video/BV1Ve4y1g7gx/"},{key:17,image:YH,title:"使用RDMA加速服务器无感知计算容器启动",text:"本场workshop由上海交通大学助理教授魏星达进行分享，主要内容围绕“使用RDMA加速服务器无感知计算容器启动”进行知识介绍。",date:"2022.12.04",url:"https://www.bilibili.com/video/BV1qG4y1G784/"},{key:19,image:zH,title:"基于智能网卡的数据处理系统",text:"本场workshop由浙江大学百人计划研究员 王则可进行分享，主要内容为“基于智能网卡的数据处理系统”介绍。",date:"2022.12.18",url:"https://www.bilibili.com/video/BV1Eg411J7fJ/"},{key:20,image:HH,title:"异步事件驱动的电路机制 & 基于RISC-V的全异步超标量CPU体系结构",text:"本场workshop由何安平副教授进行分享，主要内容为“异步事件驱动的电路机制 & 基于RISC-V的全异步超标量CPU体系结构”介绍。",date:"2022.12.25",url:"https://www.bilibili.com/video/BV1sA411D7on/"},{key:21,image:FH,title:"使用 TLA+ 为分布式算法验证正确性",text:"本场workshop由达坦科技DatenLord田野进行分享，主要内容为“使用 TLA+ 为分布式算法验证正确性”介绍。",date:"2023.01.09",url:"https://www.bilibili.com/video/BV1pG4y1y7an/"},{key:22,image:UH,title:"喷泉码技术简介",text:"本场workshop由兰州大学信息科学与工程学院副教授、通信工程专业系主任袁磊 进行分享，主要内容为“喷泉码技术简介”介绍。",date:"2023.01.15",url:"https://www.bilibili.com/video/BV1SM411b77k/"},{key:23,image:$H,title:"数据库隔离级别及MVCC",text:"本场workshop由达坦科技DatenLord施继成进行分享，主要内容为“数据库隔离级别及MVCC”介绍。",date:"2023.01.29",url:"https://www.bilibili.com/video/BV1sR4y1b7Cu/"},{key:24,image:BH,title:"互联网传输协议优化研究",text:"本场workshop由中国人民大学副教授李彤教授进行分享，主要内容为“互联网传输协议优化研究”介绍。",date:"2023.02.06",url:"https://www.bilibili.com/video/BV1X84y157vL/"},{key:25,image:WH,title:"高性能RDMA网络协议栈",text:"高性能RDMA网络协议栈是RDMA高性能网络的核心组成部分之一，它提供了支持RDMA技术的网络协议和驱动程序。在本周的前沿科技分享中，我们邀请到了湖南大学信息科学与工程学院的陈果教授来给我们分享高性能RDMA网络协议栈的话题。",date:"2023.02.28",url:"https://www.bilibili.com/video/BV1Y24y1n7Dk/"},{key:26,image:GH,title:"GPU抢占式任务调度",text:"GPU编程可以大幅提升计算速度和效率，从而使得许多计算任务得以在合理时间内完成。随着GPU硬件技术的发展和大规模数据处理需求的增加，GPU编程的应用范围不断扩大。在本周的前沿科技分享中，我们邀请到了上海交通大学并行与分布式研究所的韩明聪博士来给我们分享GPU抢占式任务调度。",date:"2023.03.05",url:"https://www.bilibili.com/video/BV1cY4y1y7ND/"},{key:27,image:XH,title:"聊聊RaptorQ纠错码",text:"喷泉码具有极高的纠错能力，且具有低延迟、地复杂度、高效率等优点，使其在冷存储、分布式存储、无线通信等领域得到广泛应用。达坦科技致力于软硬件融合的解决方案，喷泉码的高效实现在硬件上，作为公司长期的技术储备，在本周的前沿科技分享中，达坦科技的联合创始人兼CTO施继成将为大家分享聊聊 RaptorQ 纠错码 。",date:"2023.03.15",url:"https://www.bilibili.com/video/BV1wL411C7DL/"},{key:28,image:KH,title:"Buddy Compiler 简介和愿景",text:"在本次分享中，中国科学院软件研究所博士生张洪滨将介绍Buddy Compiler 编译流程、协同设计、硬件支持。Buddy Compiler 是领域特定的编译器框架，致力于打造基于 MLIR 和 RISC-V 的软硬件协同设计生态。其目标是实现从 DSL 到 DSA 的编译流程和协同设计，愿景是让领域特定的协同设计不再困难。",date:"2023.03.21",url:"https://www.bilibili.com/video/BV1YT41167GB/"},{key:29,image:QH,title:"新一代计算架构：超异构计算",text:"AGI带来的变化之一是算力将进一步从CPU转到GPU，在本周的前沿技术分享中，我们邀请到了上海矩向科技创始人兼CEO黄朝波为大家分享新一代计算架构：超异构计算。",date:"2023.04.04",url:"https://www.bilibili.com/video/BV1Rm4y1q7Dx/"},{key:30,image:qH,title:"通过Chainsaw设计DSP电路",text:"DSP在数据压缩、编码和加密方面都发挥了重要的作用；SpinalHDL具有更高的抽象层次和更强的表达能力，可以大大简化DSP电路设计的复杂度和提高开发效率；而Chainsaw框架可以在不同的FPGA平台上运行，提高了设计的灵活性和可移植性。在本周的前沿技术分享中，我们邀请到了中山大学在读博士李天瑞为大家分享通过Chainsaw设计DSP电路。",date:"2023.04.18",url:"https://www.bilibili.com/video/BV14o4y1j7bH/"},{key:31,image:ZH,title:"Something About Cache Security",text:"在本周的前沿技术分享中，我们邀请到了浙江大学在读硕士研究生缪晨露为大家分享她在MICRO和HPCA上发表的两篇论文的精华，演讲主题是Something About Cache Security。",date:"2023.04.25",url:"https://www.bilibili.com/video/BV1p24y1F7fN/"},{key:32,image:JH,title:"Rust嵌入式开发生态介绍及入门",text:"在本周的前沿技术分享中，我们邀请到了一位爱好硬件的软件工程师米明恒，来为大家分享Rust嵌入式开发生态介绍及入门。",date:"2023.05.04",url:"https://www.bilibili.com/video/BV1J24y1T7EH/"},{key:33,image:eF,title:"RDMA赋能数据中心/超算中心间远程互联",text:"在本周的前沿技术分享中，我们邀请到了南京大学田臣教授，来为大家分享RDMA赋能数据中心/超算中心间远程互联。",date:"2023.06.04",url:"https://www.bilibili.com/video/BV1cz4y1B7cx/"},{key:34,image:tF,title:"Paper Reading: DPU任务卸载",text:"达坦科技一直在探索用硬件加速做分布式跨云存储，在本周的前沿技术分享中，我们邀请到了中南大学在读博士生卢军，来为大家分享DPU任务卸载的相关研究。",date:"2023.06.17",url:"https://www.bilibili.com/video/BV1R14y1S79T/"},{key:35,image:rF,title:"Rust在物理引擎研发中的应用",text:"在本周的前沿技术分享中，我们邀请到了Motphys CEO崔汉青，来为大家分享Rust在物理引擎研发中的应用。",date:"2023.06.27",url:"https://b23.tv/BZuSvyW"},{key:40,image:nF,title:"基于BSV的RTL仿真加速设计研究",text:"BSV的仿真加速可以提升硬件开发调试的效率。在本周的前沿技术分享中，我们邀请到了梁之杰，来为大家分享基于BSV的RTL仿真加速设计研究。",date:"2023.07.09",url:"https://www.bilibili.com/video/BV1ou411L7Yy/"},{key:41,image:iF,title:"RDMA网络的系统测试方案",text:"在本周的前沿技术分享中，我们邀请到了孔心皓，来为大家分享RDMA 网络的系统测试方案。",date:"2023.07.16",url:"https://www.bilibili.com/video/BV1tz4y147rw/"},{key:42,image:oF,title:"RapidWright技术分享会",text:"在本周的前沿技术分享中，我们邀请到了西南交通大学邸志雄副教授和他的学生向瀚章，来为大家分享开源FPGA设计工具RapidWright技术。",date:"2023.07.28",url:"https://www.bilibili.com/video/BV14z4y1x7a8/"},{key:43,image:sF,title:"基于Karmada实现Kubernetes应用跨集群故障转移",text:"在本周的前沿技术分享中，我们邀请到了开源爱好者，云兴科技软件研发工程师梁远鹏，来为大家分享基于Karmada实现Kubernetes应用跨集群故障转移。",date:"2023.08.01",url:"https://www.bilibili.com/video/BV1rN411Y7aZ/"},{key:50,image:aF,title:"大模型训练和基础设施",text:"在本周的前沿技术分享中，我们邀请到了范一呈，来为大家分享大模型训练和基础设施。",date:"2023.09.01",url:"https://www.bilibili.com/video/BV1ZN4y1R7HP/"},{key:51,image:lF,title:"RustBelt与Rust形式化方法",text:"在本周的前沿技术分享中，我们邀请到了王俊吉，来为大家分享RustBelt与Rust形式化方法。",date:"2023.09.04",url:"https://www.bilibili.com/video/BV1Vw411D7rT/"},{key:52,image:cF,title:"网络的智能该放在哪里：网卡、交换机还是xPU",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:53,image:uF,title:"以ARM为镜的RISC-V",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:55,image:dF,title:"让大模型在场景中真正落地的产品形态、技术堆栈、交付服务",text:"达坦科技始终致力于打造高性能 Al+ Cloud 基础设施平台，积极推动AI应用的落地。达坦科技通过软硬件深度融合的方式，提供高性能存储和高性能网络。为 AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对 AI+Cloud 的需求。在本周的前沿技术分享中，我们邀请到了猴子无限创始人兼CEO尹伯昊，来为大家分享让大模型在场景中真正落地的产品形态、技术堆栈、交付服务。",date:"2024.03.18",url:"https://www.bilibili.com/video/BV1KJ4m187gS/"}],hF="/zh-cn/assets/cover1-42e6189a.jpg",mF="/zh-cn/assets/cover2-af26ed46.jpg",pF="/zh-cn/assets/cover3-9c9d21fa.jpg",gF=[{key:1,image:hF,title:"Xline-跨数据中心一致性的元数据管理",text:"天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline是一款开源分布式KV存储系统，基于Curp共识算法实现，旨在提供跨云元数据管理的功能。相比于传统共识协议Raft或Paxos，Curp在天空计算的场景中有着更好的性能表现。本次分享将聚焦于共识算法，从天空计算的背景和挑战出发，介绍Curp共识算法，以及Revision机制与Curp无序性语义之间的冲突，最后，简述下Xline未来的优化方向。欢迎了解更多关于Xline的信息：Https://github.com/datenlord/Xline",date:"2023.02.09",url:"https://www.bilibili.com/video/BV1XY411q7X8/"},{key:2,image:mF,title:"源码解读：Xline Curp共识协议的设计与实现",text:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。",date:"2023.04.30",url:"https://www.bilibili.com/video/BV1dL411h7YK/"},{key:3,image:pF,title:"Xline的Lease机制与实现",text:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。",date:"2023.06.09",url:"https://www.bilibili.com/video/BV1FX4y1h7X5/"}],vF="/zh-cn/assets/cover1-a1358db9.jpg",yF="/zh-cn/assets/cover2-b899ea12.jpg",wF="/zh-cn/assets/cover3-e0bf4798.jpg",_F="/zh-cn/assets/cover4-15b0b4f1.jpg",xF="/zh-cn/assets/cover5-7c4c2482.jpg",u_="/zh-cn/assets/cover6-1c4d5c5f.jpg",SF="/zh-cn/assets/cover7-4f7454c0.jpg",bF="/zh-cn/assets/cover8-7e30c0fc.jpg",kF="/zh-cn/assets/cover9-e8c86c60.jpg",CF="/zh-cn/assets/cover10-bb13b118.jpg",DF="/zh-cn/assets/cover11-c29e9692.jpg",EF="/zh-cn/assets/cover12-6877e246.jpg",jF="/zh-cn/assets/cover13-5a4d97b0.jpg",TF="/zh-cn/assets/cover14-052a8b36.jpg",RF=[{key:7,image:SF,title:"2022年Rust开发者大会Workshop One：用Rust实现RDMA高性能编程",text:"2022年7月31日，北京达坦科技有限公司获邀参加Rust China大会，并做公司专题workshop。这是本场workshop的第一部分，将为大家介绍如何用Rust实现RDMA高性能编程。",date:"2022.08.03",url:"https://www.bilibili.com/video/BV13e4y1D7Ch/"},{key:8,image:bF,title:"2022年Rust开发者大会Workshop Two：Async RDMA",text:"2022年7月31日，北京达坦科技有限公司获邀参加Rust China大会，并做公司专题workshop。这是第二部分workshop，将为大家介绍Async RDMA。",date:"2022.08.04",url:"https://www.bilibili.com/video/BV1Rh411M7EP/"},{key:9,image:kF,title:"2022年Rust开发者大会Workshop Three：Workshop动手实验环节",text:"2022年7月31日，北京达坦科技有限公司获邀参加Rust China大会，并做公司专题Workshop。这是本场Worshop的第三个部分：workshop动手环节 方便大家体验用Rust构建RDMA应用。",date:"2022.08.04",url:"https://www.bilibili.com/video/BV1oN4y1V7Hn/"},{key:1,image:vF,title:"Rust China Hackathon2022空中路演",text:"由Rust中文社区举办的题为「Rust For Fun」的首届Rust China Hackathon已经顺利完赛。达坦科技作为本届Hackathon的协办方，赞助参与本次企业组赛道。最终获得优胜奖的两支队伍在线上了举办一场空中路演。分享了：他们是如何思考拆解赛题的？在着手设计时碰到哪些难点和挑战？以及最终提交的代码设计思路和亮点。欢迎对Concurrent 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Rust",text:"随着新型网络技术，如RDMA的普及，现代分布式应用的延迟降到了毫秒甚至微秒级别。这为构建系统软件带来了新的挑战。Rust的zero-cost抽象及内存管理能力能够为构建新型分布式应用带来新的机遇。我将分享利用Rust在用户态及内核态构建新型系统软件的相关经验，包括如何利用Rust抽象RDMA硬件的底层抽象及如何在内核构建一个毫秒级的容器启动机制。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV1Zo4y1P7Sg/"},{key:12,image:EF,title:"30分钟体验Rust for Linux内核模块开发",text:"本主题会提供构建好的docker开发环境，在30分钟内演示如何使用r4l开发一个简易内核模块，并介绍目前r4l的发展现状。可以自备好电脑现场体验。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV12j411U78o/"},{key:13,image:jF,title:"DatenLord 2023 Hackathon赛题宣讲会",text:"达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛主题为 Explore the Possibilities 赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来吧！",date:"2023.11.25",url:"https://www.bilibili.com/video/BV1su4y157iB/"},{key:14,image:TF,title:"DatenLord Hackathon2023空中路演",text:"DatenLord Hackathon 2023已经顺利完赛。达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台。我们邀请参赛者为DatenLord的极端场景设计并实现缓存 p2p 传输和同步模块。本次空中路演邀请了最终获得优胜奖的两支队伍进行思路分享，包括他们的解题思路，碰到的难点和挑战，以及如何应对的方法和设计亮点。欢迎感兴趣的大家进行观看，有问题也欢迎在评论区进行交流～～不要忘记一键三连哦～～",date:"2024.01.07",url:"https://www.bilibili.com/video/BV1ic411t7Nf/"},{key:15,image:u_,title:"Rust For IC design & Verification: vfw, vhost, terminus",text:"达坦科技始终致力于打造高性能 Al+ Cloud 基础设施平台，积极推动AI应用的落地。达坦科技通过软硬件深度融合的方式，提供高性能存储和高性能网络。为 AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对 AI+Cloud 的需求。",date:"2024.08.16",url:"https://www.bilibili.com/video/BV1qPe3ezE94/"}],AF="/zh-cn/assets/cover1-b9371555.jpg",PF="/zh-cn/assets/cover2-41a903e3.jpg",OF="/zh-cn/assets/cover2-41a903e3.jpg",LF="/zh-cn/assets/cover2-41a903e3.jpg",MF="/zh-cn/assets/cover2-41a903e3.jpg",IF="/zh-cn/assets/cover2-41a903e3.jpg",NF="/zh-cn/assets/cover2-41a903e3.jpg",VF="/zh-cn/assets/cover2-41a903e3.jpg",YF="/zh-cn/assets/cover2-41a903e3.jpg",zF="/zh-cn/assets/cover13-a69a12b0.jpg",HF="/zh-cn/assets/cover14-3a97e013.jpg",FF="/zh-cn/assets/cover14-3a97e013.jpg",UF="/zh-cn/assets/cover14-3a97e013.jpg",$F="/zh-cn/assets/cover14-3a97e013.jpg",BF="/zh-cn/assets/cover14-3a97e013.jpg",WF="/zh-cn/assets/cover14-3a97e013.jpg",GF="/zh-cn/assets/cover20-c97bc11b.jpg",XF="/zh-cn/assets/cover21-9f52ba13.jpg",KF="/zh-cn/assets/cover22-187b655a.jpg",QF="/zh-cn/assets/cover23-1e515665.jpg",qF="/zh-cn/assets/cover24-020d0c34.jpg",ZF="/zh-cn/assets/cover25-cb84d871.jpg",JF="/zh-cn/assets/cover26-7a726e97.jpg",eU="/zh-cn/assets/cover27-401eea81.jpg",tU="/zh-cn/assets/cover28-6ddc6bee.jpg",rU="/zh-cn/assets/cover29-0d2deb11.jpg",nU=[{key:1,image:AF,title:"Utilizing SpinalHDL for Large-scale Datapath Design",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的一个workshop：Utilizing SpinalHDL for Large-scale Datapath Design，由李天瑞进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1PM411m7DB/"},{key:2,image:PF,title:"A Network Attached Deep Learning Accelerator for FPGA Clusters",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的三个workshop：A Network Attached Deep Learning Accelerator for FPGA Clusters，由Philipp Kreowsky Justin Knapheide进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1HM411m7mS/"},{key:3,image:OF,title:"Coding a microprogrammed protocol receiver in SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的五个workshop：Coding a microprogrammed protocol receiver in SpinalHDL，由Michael Meier进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1oK411z7VD/"},{key:4,image:LF,title:"Utilizing SpinalHDL to Accelerate Neuroscience",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的二个workshop：Utilizing SpinalHDL to Accelerate Neuroscience，由Jeff-Ciesielski进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1GG4y1J7gU/"},{key:5,image:MF,title:"SpinalHDL in Computer Architecture Research",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的四个workshop：SpinalHDL in Computer Architecture Research，由Sallar Ahmadi-Pour ( saahm)进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1gA411X7f8/"},{key:6,image:IF,title:"NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第六个workshop：NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix，由Dolu1990进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV13K41167q5/"},{key:7,image:NF,title:"Recent progress on formal verification support on SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第七个workshop：Recent progress on formal verification support on SpinalHDL，由Xiao Yindong (Readon)进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV1bG411N7fk/"},{key:8,image:VF,title:"SpinalHDL for ASIC",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第八个workshop：SpinalHDL for ASIC，由Sebastien-riou进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV16e4y1L7dV/"},{key:9,image:YF,title:"From Peripheral Plugins to Product documentation",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第九个workshop：From Peripheral Plugins to Product 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j4nx3y5ShpljiLEVBaEr4pMqgADPQOh2mvCIusK80/Gy+e21WSSAPtQlTEMK3BzjGyJ4rHtT+McOv7WG5hwKo6/FGWB6Z72k+hRCG767PK1ESWNHGdWvYrwvSET97XCTMuo7vJ2Dl+mw2ByQVLGkOYsVWxkm4Fh5Zx7v2EY9clQmaoZWJcJefU+LzSTC/5eLsXCitMpZLCFEIN9obxr2vQ6kzvE0C6DrwTflUKQPPg8GYm7PSk77JwnLWZr4k11LKO/Frnh28P9xAvjsESdDq9LF8wFVGmNUTEmoRRrQm1qxKaMror79g8NN1WG7crxS3uTNkBxF4C1hGukdQ00BnResH0xDyCcOlyZQQx+1UtPARBjzDyFv4W3Cwi/meFa4SSTLbnRV94pJgRGbhUlw/LXVos+gLHXiYnjrkA9EXF1wyyoAcVwHFIAH6T7Hwk3ZEM9YrtBfQhwqKnWIhyup1SKMiJNlFIQoRlryI+8t3JeqvBZ6FeF7oV5APULtdnkjpTNMvooTSIAKNa5ooo5TeSb5Ry+nP2BhOBCeFYrVgAyU+Md/zAq1QSAlT+12dsO2xo85k4dpuK4GWaAdh4n0UxE13nYT/afmgg9ez+TE0ERYtxMDFxgXTMLxaa709GK8KqBUq9kmI0EqE6KdlHN+WhC1PKIK/fEhXqfv0nv4Q2gVU5PJN4rHg2mGbVU5hJHWSvZyqX14oIvPFNS5UvM+1UHeRwXNgSfdMaF54ehb4uQ1obnheS0PfGQCCECxAa4Lak6IN2odqwjreLiY/75hrN3XCtnoMPme+sd2o9D1Bm+6/76ePOwfhn79ih718PcT/saZ34di6fHQK81zKAO39ibCo8Rs0Mb1cjbgdC9MwKlY3xEr10ErfxSw7QeR7ddqQn4bCAybIQcEDoAjWMCRTWKivPIgWrPFQGBjH7HO8JR5OM3b0s3yCtQV+KXpo2m8Kr4vzSf3J9JaBn39P63lrYW49fezvD6NlDu7/1InbDlw+NM7tvpkbnot73LkgI1CYydNgYVuCIKlFiUsc/jJKk5+TcKJLkm8lcfmkjnBapUHZ+4IjTYe1hFwHvsBHjw+hjA8qA7bcUgZK876FC6ZRaBUaEG3mws25ZdLycf6mBpHwFJKfjjWx9ycZoCOYAfDKFnjhmDcqi3Cafo8dEOyEn+xx7/PrKYTuc/XEcaIMHT72wJ6bHuuPHA/ad9Zt+z3oRk8257eeBDe7CCcwEqFflgkRQTe6GBp/1+w9qow5L7m+ktRz4E/UTk44lKmX3h9zHfi6fIwFdN2bymy64nlSaLXAFzdo2hvMC+jcLt70ezH80ephlRBdu5Ht37EmUaHE5QNo1YcalL/DV7ffqjuB0tPsXlAgIsuIDy7RoXf50ApEZsxl+x5DNfRV9iAXAkRL0v9vML/6e+L70B8gjFtBIXnBMbsKHWo/0sCGbd8UJsWYYzP52GoxGKudx9OO6Ivxp+ryQWh6mwtcWdrUZ15neFCiD53zIg8hH+TLKMkKNShOODK3BlQCJ2hsBN22KNiCyU9XaDazH1wi18CgzLgda2eHhONnypVAkfKWqHa/qFQd6YMoacNDrEIuTAufYRMf+hSGFvtQKsoV+QyLRJmmDyY7PfmjmwT5FgTjtNYsrCErVTca5rBKYOdwuPdH1iFwRqrgxKK4+rEpTkw64AGFgglz11IGkDqWRfJzdaKFihC0IZkEJ/z8n4EbhmJ4oZ3Qb1Q2nqQjMYKahIc2q2AZxUCUF7C6/U57J9CGpK7bFrhnsXUmH5rjgXOLzPeqfZfrQciaRur40eZww771/GhjuM7nV0RpNAzDsrdNiJRCidyATBQmmQBvZoVKNokWqT3jPWPr4MEkreKaONGxkmt1+NCBdIa02U1XpT4XkcJcGJySMPT8wlZS6a2ENb7DE2F2rQmiiNm8L+TuXD6w9xIcB93OuTTql1AEQ8aflEJ84N5fu5FYZuInW/IPrg6ese34U1QLZ9W+t7aC7uhx8B4fdGFi9JsczNsEcfIzmTif0YXkMLiiYdSOQqQIZUZauzBsdQ4HJ7yOPFbSXvmxpI6/M2nZkI8rocuY9RieIHRhNbAhDM/uQE0ieMLBEqCkdEvu0XpCYlF8rlJs3Sxfyr0mund9Vn4gqEm+U2zBSLOKokWn/EnVXhLZTnaTfimH47oTGLfQ6jV3rcjaU15541p8+pyuPflvXOTXspKu3J3Z9/iY0+1nKCcfnD83ENEReMmAVKXT7VxoEzUpy71YPJyLg/CqfxZ8DJxyJXRts25IyfL5NwlBxyQrE6Q0ft/1Mh89rLEmkwOvqwW8jFc0bb9Qciewxric/dBaGFfAFfm1AwxOq5Tueyw4HnhbdULPDJsRha7JatFTuw1sBr0OTSJhY/dBqCI7Bu868HX5mO+1cjgptaBccOomPA0t0hUaZzKvnHAdN/O+lD6q3JvI7rtm0rXYd87pr9tviV9xaI8L0UmVos+2z62Fw4ce2QGGqn2PBYcc+zh300B4NPo12OYOtTVllOyqwvAOB7oyh1MmkPE7NYk0xaTc1qSUj06SexM+dXI4hmj+ruAJOaaNrE1KC/OY1GsgPPEcMAe3uDgX5N9R5K9MGPIHnhRIxXqxe5nP4dTt15XDyfuTbU+tC6iXUuDWouqeZNKufN8nHgkJwBcUBMwLrOKjw8mlCVBk4vj+0+BmRmgMLc53A+4aC+Ub6FDGGJUbUIovS5KfD/OLL5Lw9yvc4DuoUbIm3JGHOE6uiRT4EIwiPovd6vwK1f975DgImr96YxzTaSgWHroeVJKzIYGldcc5dBfn57Zc9Sjrjx8vOYHIH3hSILQm+X5T4dzEsLjrGs2b0/RbeJ/LHZGCmr85dweYvTTjowvJHrMWVfcky8jed+GqRNG2q3BsHb5WxAmKi8jsGg3S5Bd8B2G0y4WZzf/dBPkuId9OK9mAKL3S8dX4NCGK6KCzSzkx3y6nzcWN7sIZkRk7fT/N+GmPwLLMZXtEB47uGJ7FejXptyY/39x/PK9fiwq4YLQ/jCLOlC7cnGs01uH7ww8MXh4hn5/hDAmTlFueJ2NnE7XwMnAQETVj3dzNJX0b1IILRq47RNCQHLmiCM6QKHSOmf01rd11RI3f3FzSt0c1f2J0PnQa/GlT3btIp6WqMCth4hTbX9J3RhdKcFy/06lyHvPkOtBc0vI0VBY6J0tjX7+/pO+LLhxUYyNHY/0KGhDdsNWyyEdC9S8uG/XDRACTcLTY9qTaOouAwyVdTLpwwYFvieiWrbE67eRiaXQpLD8G/R/mOJQNkHO42AAAAABJRU5ErkJggg==",_X="/zh-cn/assets/spy-bg1-ba75fb2e.png",xX="/zh-cn/assets/spy-bg2-d3211011.png",SX="/zh-cn/assets/spy-bg3-a41ded57.png",bX="/zh-cn/assets/spy-bg4-5446dcc4.png",kX="/zh-cn/assets/foot-reg-qr-03a7d7e1.png",CX="/zh-cn/assets/foot-ass-qr-e467649e.png",{Heading:DX,Paragraph:EX}=Ye,{CNHead1:jX,CNHead5:yC,CNTitleLarge:wC}=DX,{CNBodyLarge:ql,CNBodyMedium:TX}=EX,RX=f.div` + display: flex; + flex-direction: column; + align-items: center; + margin-top: -0.72rem; + padding-top: 0.72rem; + background-image: url(${dX}); + background-size: cover; +`,AX=f(jX)` + padding-top: 1.68rem; + color: #fff; +`,PX=f(wn)` + margin-top: 0.46rem; + color: #fff; +`,OX=f.div` + display: flex; + align-items: center; + margin-top: 0.91rem; + margin-bottom: 0.48rem; + padding: 0.13rem 2rem; + background: rgba(0, 0, 0, 0.09); + border: 0.01rem solid #fff; + border-radius: 0.12rem; + cursor: pointer; +`,LX=f.div` + padding-right: 0.12rem; + font-size: 0.2rem; + font-weight: 400; + line-height: 1; + color: #fff; +`,MX=f.img` + height: 0.2rem; + width: 0.2rem; +`,Zl=f.div` + position: relative; +`,Jl=f.div` + /* min-height: 6.4rem; */ + display: flex; + flex-direction: column; + padding-inline: 1.2rem; + color: #252931; + max-width: 1440px; + margin-inline: auto; +`,Of=f.img` + height: 0.38rem; + width: min-content; +`,Lf=f.div` + font-size: 0.4rem; + font-weight: 600; +`,IX=f(Zl)``,NX=f(Jl)` + padding-block: 0.7rem 1.17rem; +`,VX=f(Of)``,YX=f(Lf)``,zX=f(ql)` + padding-top: 0.61rem; +`,HX=f.div` + display: flex; + gap: 0.39rem; + padding-top: 0.59rem; +`,_m=f.div` + padding: 0.12rem 0.23rem 0.16rem; + background: #fff; + border-radius: 0.16rem; + box-shadow: 0px 6px 32px 0px rgba(37, 41, 49, 0.06); +`,xm=f.div` + font-size: 0.38rem; + font-weight: 600; + color: #7680dd; +`,Sm=f.div` + padding-top: 0.07rem; + color: #626262; + font-size: 0.16rem; + line-height: 0.2956rem; +`,FX=f(ql)` + padding-top: 0.87rem; +`,UX=f.img` + position: absolute; + z-index: -100; + top: 0; + width: 100%; + height: 100%; +`,$X=f(Zl)` + background: linear-gradient( + 106deg, + #e4f4ff -1.1%, + #f9fcff 47.11%, + #edf6fc 102.52% + ); +`,BX=f(Jl)` + min-height: 6.4rem; + padding-block: 0.7rem 1.49rem; +`,WX=f(Of)` + height: 0.26rem; +`,GX=f(Lf)``,XX=f.div` + display: flex; + margin-top: 0.8rem; + background: #fff; + border-radius: 0.16rem; +`,KX=f.div` + padding: 0.49rem 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-1,4 +1,4 @@ -const i="/zh-cn/assets/cover-6865ae02.png",e=[i],l={label:"Xline v0.4.1：一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["Xline"],date:"2023-06-21",title:"Xline v0.4.1: A distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.4.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],s=`

    封面

    +const i="/zh-cn/assets/cover-6865ae02.png",e=[i],l={label:"Xline v0.4.1：一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["Xline"],date:"2023-06-21",title:"Xline v0.4.1_ A distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.4.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],s=`

    封面

    Xline 是什么？我们为什么要做 Xline？

    Xline 是一个基于 Curp 协议的，用于管理元数据的分布式 KV 存储。 现有的分布式 KV 存储大多采用 Raft 共识协议，需要两次 RTT 才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

    但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个 RTT，从而提高性能。因此，Xline 旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

    diff --git a/zh-cn/assets/index-102c2147.js b/zh-cn/assets/index-5e43e574.js similarity index 92% rename from zh-cn/assets/index-102c2147.js rename to zh-cn/assets/index-5e43e574.js index e7459aa..54df414 100644 --- a/zh-cn/assets/index-102c2147.js +++ b/zh-cn/assets/index-5e43e574.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/cover-48216986.png",t="/zh-cn/assets/image1-02771bf0.jpg",n="/zh-cn/assets/image1-f46bfcc6.jpg",o=[s,t,n],p={label:"当RDMA遇到Rust",description:"2022年8月5日-6日，一年一度的中国开源基础设施活动日（OpenInfra Days China）即将在线上举行。本次会议没有限定一个统一的主题，主要聚焦云计算基础设施、云原生技术与应用实践、开源治理、5G、算力网络与边缘计算五大主题方向。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"When RDMA meets Rust"},r=[],g=`

    封面

    +const s="/zh-cn/assets/cover-48216986.png",t="/zh-cn/assets/image1-02771bf0.jpg",n="/zh-cn/assets/image1-f46bfcc6.jpg",o=[s,t,n],r={label:"当RDMA遇到Rust",description:"2022年8月5日-6日，一年一度的中国开源基础设施活动日（OpenInfra Days China）即将在线上举行。本次会议没有限定一个统一的主题，主要聚焦云计算基础设施、云原生技术与应用实践、开源治理、5G、算力网络与边缘计算五大主题方向。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"When RDMA meets Rust"},p=[],a=`

    封面

    2022 年 8 月 5 日-6 日，**一年一度的中国开源基础设施活动日（OpenInfra Days China）**即将在线上举行。本次会议没有限定一个统一的主题，主要聚焦云计算基础设施、云原生技术与应用实践、开源治理、5G、算力网络与边缘计算五大主题方向。

    云计算基础设施分论坛主要聚焦云计算基础设施领域的前沿技术和优秀实践，围绕多硬件架构和多操作系统支持、人工智能技术应用、网络与存储，数据处理 DPU 及其他加速硬件、硬件自动化和智能运维等方面展开技术分享和探讨。达坦科技联合创始人施继成将在这一分论坛做题为当 RDMA 遇到 Rust 的专题分享。

    图片

    @@ -10,4 +10,4 @@ const s="/zh-cn/assets/cover-48216986.png",t="/zh-cn/assets/image1-02771bf0.jpg"

    参会方式

    想要了解更多达坦科技为什么选择 Rust 做 RDMA 库，以及开发设计背后的理念、逻辑、和实践经验，欢迎扫描海报二维码，免费注册报名。

    有意加入 Rust 前沿交流讨论群，请添加小助手微信：

    -

    图片

    `;export{o as assetURLs,g as default,p as metadata,r as toc}; +

    图片

    `;export{o as assetURLs,a as default,r as metadata,p as toc}; diff --git a/zh-cn/assets/index-b5cbc6b1.js b/zh-cn/assets/index-5e5c42fa.js similarity index 95% rename from zh-cn/assets/index-b5cbc6b1.js rename to zh-cn/assets/index-5e5c42fa.js index b206036..b7b778f 100644 --- a/zh-cn/assets/index-b5cbc6b1.js +++ b/zh-cn/assets/index-5e5c42fa.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/cover-f142cd17.jpg",e="/zh-cn/assets/image1-9d5b5029.jpg",t="/zh-cn/assets/image2-2129b7ac.jpg",s=[l,e,t],o={label:"计算机体系结构 l MIT课程学习新手上路宣讲",description:"MIT课程学习社区是一个兴趣导向的学习社区，大家或是想要补缺体系结构的基础知识，或是提升自己的实践和工程能力。MIT 6.175与MIT6.375的课程和Lab都有相当的难度，要求采用Bluespec语言实现RISC-V32位处理器，并支持多级流水、分支预测、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。当真正着手开始学习MIT的这两门课程，会发现不要说坚持下来，能入门也不是一件容易的事情。为此，达坦科技软硬件联合开发工程师米明恒将在2023年9月23日（周六）上午10:30为大家带来一场计算机体系结构 l MIT课程学习新手上路宣讲。",cover:"./cover.jpg",location:"中国香港",date:"2023-09-19",title:"MIT Coursework Orientation for Newcomers"},i=[{label:"MIT 课程学习社区的源",level:2},{label:"MIT 课程学习新手上路宣讲",level:2},{label:"入门宣讲的目的",level:2},{label:"入门宣讲的要点",level:2},{label:"问卷调查",level:2}],a=`

    封面

    +const l="/zh-cn/assets/cover-f142cd17.jpg",s="/zh-cn/assets/image1-9d5b5029.jpg",e="/zh-cn/assets/image2-2129b7ac.jpg",t=[l,s,e],o={label:"计算机体系结构 l MIT课程学习新手上路宣讲",description:"MIT课程学习社区是一个兴趣导向的学习社区，大家或是想要补缺体系结构的基础知识，或是提升自己的实践和工程能力。MIT 6.175与MIT6.375的课程和Lab都有相当的难度，要求采用Bluespec语言实现RISC-V32位处理器，并支持多级流水、分支预测、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。当真正着手开始学习MIT的这两门课程，会发现不要说坚持下来，能入门也不是一件容易的事情。为此，达坦科技软硬件联合开发工程师米明恒将在2023年9月23日（周六）上午10:30为大家带来一场计算机体系结构 l MIT课程学习新手上路宣讲。",cover:"./cover.jpg",location:"中国香港",date:"2023-09-19",title:"MIT Coursework Orientation for Newcomers"},i=[{label:"MIT 课程学习社区的源",level:2},{label:"MIT 课程学习新手上路宣讲",level:2},{label:"入门宣讲的目的",level:2},{label:"入门宣讲的要点",level:2},{label:"问卷调查",level:2}],a=`

    封面

    MIT 课程学习社区的源

    无论用哪一种语言，Bluespec、Chisel、SpinalHDL 来进行硬件设计，背后扎实的硬件设计基础知识都是必不可少的，特别是体系结构，因为体系结构的主要研究对象是指令集架构、处理器架构、存储器层次结构、总线和 IO 等，而 CPU 作为当今最复杂的数字芯片之一，非常适合作为学习实践相关知识的一只“麻雀”。

    虽然国内大专院校计算机科学和电子工程专业都有开设体系结构或组成原理等相关课程，但是在实操环节缺失很多内容，特别是 CPU 缓存、内存管理、异常处理相关的部分，基本上都不涉及。当达坦科技做校招或招募在校实习生的时候，看到了潜在求职者在理论和实践之间的脱节。

    @@ -19,7 +19,7 @@ const l="/zh-cn/assets/cover-f142cd17.jpg",e="/zh-cn/assets/image1-9d5b5029.jpg"

    问卷调查

    请各位已经或即将参加体系结构 MIT 课程培训的社区成员，或有意参加入门宣讲的观众，在参会前提前完成以下调查问卷。（扫描下方二维码或点击阅读原文进行填写）

    -

    图片

    +

    图片

    欢迎您预约直播，或者登陆腾讯会议观看直播：
    会议号：474-6575-9473

    -

    图片

    `;export{s as assetURLs,a as default,o as metadata,i as toc}; +

    图片

    `;export{t as assetURLs,a as default,o as metadata,i as toc}; diff --git a/zh-cn/assets/index-11e00e16.js b/zh-cn/assets/index-63ad8b5a.js similarity index 96% rename from zh-cn/assets/index-11e00e16.js rename to zh-cn/assets/index-63ad8b5a.js index 55e2ce5..eba591d 100644 --- a/zh-cn/assets/index-11e00e16.js +++ b/zh-cn/assets/index-63ad8b5a.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-4f6768e5.png",n=[e],c={label:"Xline社区会议Call Up｜在 CURP 算法中实现联合共识的安全性",description:"为了更全面地向大家介绍Xline的进展，同时促进Xline社区的发展，我们将于2024年5月31日北京时间11:00 p.m.召开Xline社区会议。",cover:"./cover.png",location:"中国香港",date:"2024-05-23",title:"Xline Community Meeting Call Up Securing Joint Consensus in CURP Algorithm"},i=[{label:"社区会议主题",level:2},{label:"会议摘要",level:2},{label:"欢迎参与到 Xline 项目中：",level:2},{label:"目前 Xline 提供如下 Good First Issue：",level:2},{label:"Xline 近期文章参考：",level:2}],t=`

    图片

    +const e="/zh-cn/assets/cover-4f6768e5.png",n=[e],i={label:"Xline社区会议Call Up｜在 CURP 算法中实现联合共识的安全性",description:"为了更全面地向大家介绍Xline的进展，同时促进Xline社区的发展，我们将于2024年5月31日北京时间11:00 p.m.召开Xline社区会议。",cover:"./cover.png",location:"中国香港",date:"2024-05-23",title:"Xline Community Meeting Call Up Securing Joint Consensus in CURP Algorithm"},c=[{label:"社区会议主题",level:2},{label:"会议摘要",level:2},{label:"欢迎参与到 Xline 项目中：",level:2},{label:"目前 Xline 提供如下 Good First Issue：",level:2},{label:"Xline 近期文章参考：",level:2}],t=`

    图片

    为了更全面地向大家介绍 Xline 的进展，同时促进 Xline 社区的发展，我们将于 2024 年 5 月 31 日北京时间 11:00 p.m. 召开 Xline 社区会议。

    欢迎您届时登陆 zoom 观看直播，或点击“阅读原文”链接加入会议：
    会议号: 832 1086 6737
    @@ -26,4 +26,4 @@ Refactor the LogEntryVecDeque in the log.rs

    Xline command 去重机制（一）—— RIFL 介绍
    本文前半部分从 command 去重机制的契机开始，介绍了去重的必要性以及目前 Xline 的去重机制存在的一些问题。后半部分详细讲解了 RIFL 的工作原理，并对其进行了一些性能分析。

    Xline command 去重机制（二）—— RIFL 实现
    -在 Xline 的 CURP 系统中，本文深入探讨了 RIFL 作为基础设施，为 RPC 提供 Exactly-Once 语义的实现及相关问题的解决方案

    `;export{n as assetURLs,t as default,c as metadata,i as toc}; +在 Xline 的 CURP 系统中，本文深入探讨了 RIFL 作为基础设施，为 RPC 提供 Exactly-Once 语义的实现及相关问题的解决方案

    `;export{n as assetURLs,t as default,i as metadata,c as toc}; diff --git a/zh-cn/assets/index-6bc730f7.js b/zh-cn/assets/index-6454a1e4.js similarity index 92% rename from zh-cn/assets/index-6bc730f7.js rename to zh-cn/assets/index-6454a1e4.js index ca56099..8d0a284 100644 --- a/zh-cn/assets/index-6bc730f7.js +++ b/zh-cn/assets/index-6454a1e4.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/image1-b170e804.jpg",o="/zh-cn/assets/image2-29d090cb.png",n="/zh-cn/assets/image1-50beaba8.png",a=[t,o,n],e={label:"叮！您收到了一封来自达坦科技的Hackthon邀请函",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",location:"中国香港",date:"2023-11-17",title:"Ding! You've received a Hackthon invitation from Dartan Technologies!"},l=[{label:"Hackathon2023",level:2},{label:"主题",level:2},{label:"大赛时间线",level:2},{label:"背景介绍",level:2},{label:"赛题介绍",level:2},{label:"评估标准",level:2},{label:"赛题宣讲会",level:2}],s=`

    Hackathon2023

    +const t="/zh-cn/assets/image1-b170e804.jpg",a="/zh-cn/assets/image2-29d090cb.png",o="/zh-cn/assets/image1-50beaba8.png",n=[t,a,o],e={label:"叮！您收到了一封来自达坦科技的Hackthon邀请函",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",location:"中国香港",date:"2023-11-17",title:"Ding! You've received a Hackthon invitation from Dartan Technologies!"},s=[{label:"Hackathon2023",level:2},{label:"主题",level:2},{label:"大赛时间线",level:2},{label:"背景介绍",level:2},{label:"赛题介绍",level:2},{label:"评估标准",level:2},{label:"赛题宣讲会",level:2}],l=`

    Hackathon2023

    DatenLord Hackathon 2023 正式启动！ 达坦科技基于其跨云分布式文件系统 DatenLord 项目，结合 AI 大模型时代背景，搭建了擂台，在此正式向您发出邀约！

    本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台 PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！

    主题

    @@ -27,8 +27,8 @@ const t="/zh-cn/assets/image1-b170e804.jpg",o="/zh-cn/assets/image2-29d090cb.png

    赛题宣讲会

    为了进一步宣传以及讲解 DatenLord Hackathon2023 赛题以及背景，我们将于 2023 年 11 月 25 日（周六）下午一点安排一场空中宣讲会。欲了解更多关于本次 Hackathon 的赛制、参赛规则、日程安排，以及达坦科技赛题的介绍、相关资源，欢迎预约报名，我们在空中宣讲会等你，不见不散～

    腾讯会议号码：708-101-213

    -

    图片

    +

    图片

    如有任何问题欢迎联系达坦科技微信小助手：DatenLord_Tech 或发送邮件至
    info@datenlord.com

    -

    图片

    -

    让我们一起在 Hackathon2023 的舞台上尽情释放创意的火花，期待与优秀的你碰撞出新的想法！

    `;export{a as assetURLs,s as default,e as metadata,l as toc}; +

    图片

    +

    让我们一起在 Hackathon2023 的舞台上尽情释放创意的火花，期待与优秀的你碰撞出新的想法！

    `;export{n as assetURLs,l as default,e as metadata,s as toc}; diff --git a/zh-cn/assets/index-500d1a02.js b/zh-cn/assets/index-64a7ffe1.js similarity index 89% rename from zh-cn/assets/index-500d1a02.js rename to zh-cn/assets/index-64a7ffe1.js index 27ea28e..5d97021 100644 --- a/zh-cn/assets/index-500d1a02.js +++ b/zh-cn/assets/index-64a7ffe1.js @@ -1,4 +1,4 @@ -const n="/zh-cn/assets/cover-bc86e95c.jpg",t="/zh-cn/assets/image1-d4391053.jpg",e=[n,t],o={label:"DatenLord开源产品技术分享 | Xline源码解读",description:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。本期源码解读将聚焦Xline的Curp共识协议，DatenLord分布式存储工程师赵佳炜将与大家分享在Xline中应用的Curp共识协议的设计与代码实现。",cover:"./cover.jpg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-04-24",title:"DatenLord open source product technology sharing l Xline source code interpretation"},r=[{label:"【源码解读】Xline Curp 共识协议的设计与实现",level:2}],l=`

    封面

    +const t="/zh-cn/assets/cover-bc86e95c.jpg",n="/zh-cn/assets/image1-d4391053.jpg",e=[t,n],o={label:"DatenLord开源产品技术分享 | Xline源码解读",description:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。本期源码解读将聚焦Xline的Curp共识协议，DatenLord分布式存储工程师赵佳炜将与大家分享在Xline中应用的Curp共识协议的设计与代码实现。",cover:"./cover.jpg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-04-24",title:"DatenLord open source product technology sharing l Xline source code interpretation"},r=[{label:"【源码解读】Xline Curp 共识协议的设计与实现",level:2}],l=`

    封面

    传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord 推出开源分布式 KV 存储 Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。

    本期源码解读将聚焦 Xline 的 Curp 共识协议，DatenLord 分布式存储工程师赵佳炜将与大家分享在 Xline 中应用的 Curp 共识协议的设计与代码实现。

    【源码解读】Xline Curp 共识协议的设计与实现

    @@ -17,4 +17,4 @@ const n="/zh-cn/assets/cover-bc86e95c.jpg",t="/zh-cn/assets/image1-d4391053.jpg"

    【直播预约】 欢迎您预约直播，或者登陆腾讯会议观看直播：
    会议号：955-6910-3992

    -

    图片

    `;export{e as assetURLs,l as default,o as metadata,r as toc}; +

    图片

    `;export{e as assetURLs,l as default,o as metadata,r as toc}; diff --git a/zh-cn/assets/index-72b88898.js b/zh-cn/assets/index-64a98ea7.js similarity index 98% rename from zh-cn/assets/index-72b88898.js rename to zh-cn/assets/index-64a98ea7.js index 43f6e02..e64a8d6 100644 --- a/zh-cn/assets/index-72b88898.js +++ b/zh-cn/assets/index-64a98ea7.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-6865ae02.png",l=[e],t={label:"Xline v0.3.0：一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["Xline"],date:"2023-03-23",title:"Xline v0.3.0: A distributed KV store for metadata management"},i=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.3.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],n=`

    封面

    +const e="/zh-cn/assets/cover-6865ae02.png",l=[e],t={label:"Xline v0.3.0：一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["Xline"],date:"2023-03-23",title:"Xline v0.3.0_ A distributed KV store for metadata management"},i=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.3.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],n=`

    封面

    Xline 是什么？我们为什么要做 Xline？

    Xline 是一个基于 Curp 协议的，用于管理元数据的分布式 KV 存储。 现有的分布式 KV 存储大多采用 Raft 共识协议，需要两次 RTT 才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

    但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个 RTT，从而提高性能。因此，Xline 旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

    diff --git a/zh-cn/assets/index-65fd7bbd.js b/zh-cn/assets/index-65fd7bbd.js new file mode 100644 index 0000000..8c77874 --- /dev/null +++ b/zh-cn/assets/index-65fd7bbd.js @@ -0,0 +1,69 @@ +const e="/zh-cn/assets/image-8e31ea63.png",t=[e],r={label:"Linux下RDMA驱动程序探索系列-2",description:"本系列文章将带领读者逐步了解Linux操作系统下的RDMA子系统。本篇文章作为系列的第二篇，将深入内核态驱动程序的代码，主要介绍如下内容：Driver的初始化流程和几个重要verbs回调函数的简介",location:"中国香港",cover:"./image.png",author:["达坦科技"],date:"2024-07-18",title:"Exploring RDMA Driver in Linux Series2"},l=[{label:"Kernel Driver的初始化流程",level:2},{label:"驱动的加载与激活",level:3},{label:"RDMA设备注册",level:3},{label:"几个重要verbs回调函数的简介",level:2},{label:"query_device 回调",level:3},{label:"query_port 回调",level:3},{label:"dtld_get_link_layer回调",level:3},{label:"alloc_ucontext回调",level:3}],_=`

    图片 +本系列文章将带领读者逐步了解Linux操作系统下的RDMA子系统。本篇文章作为系列的第二篇，将深入内核态驱动程序的代码，主要介绍如下内容：

    +

    Driver的初始化流程

    +

    几个重要verbs回调函数的简介

    +

    Kernel Driver的初始化流程

    +

    由于不同厂商的驱动程序千差万别，在此不以具体厂商的驱动程序进行介绍，而是以Kernel中核心的API调用为锚点进行介绍。读者在阅读完本篇文章后，可以在自己感兴趣的厂商驱动代码中搜索这些API，从而快速梳理出这些驱动程序的框架。

    +

    驱动的加载与激活

    +

    作为一个Linux Kernel Driver，其入口点的位置和普通的Driver程序一样，都是通过module_init来指定一个函数作为入口点。

    +

    由于基本上所有RDMA网卡都是PCIe设备，因此在驱动程序入口执行后，首先要做的是初始化PCIe设备相关的操作，典型的就是调用pci_register_driver向Kernel注册自己所感兴趣的PCIe设备，提供probe回调函数，这样kernel在匹配到驱动所对应的硬件后，就会调用probe函数。所以，从某种角度上来说，PCIe设备的probe回调函数才是绝大多数RDMA驱动的主入口，因为如果没有硬件插入主板的话，驱动可以处于静默状态，只有检测到PCIe硬件以后，整个驱动才开始活跃起来。（当然，上述流程是针对RDMA硬件设备的驱动而言的，对于一些例外情况，例如Linux在drivers/infiniband/sw目录中提供的rxe驱动等，是通过软件来模拟硬件行为的，不涉及到真实的硬件，则初始化流程必然会有所差异）。

    +

    RDMA设备注册

    +

    驱动程序的核心部分被激活以后，接下来的操作就主要是在Kernel的RDMA框架下进行工作了。该框架提供了一系列以ib_开头的系统调用，在接下的文章中将介绍为了让操作系统可以识别到一个RDMA设备所需要的最少的ib_API调用。

    +

    首先，我们需要调用ib_alloc_device来申请一个用来描述RDMA设备的结构体，一个例子如下：

    +
    struct dtld_dev {
+    struct ib_device ib_dev;
+    // Other custom fields
+};
+
+struct dtld_dev *dtld = NULL;
+
+dtld = ib_alloc_device(dtld_dev, ib_dev);
+
    +

    不出意外的，上述代码中使用了Kernel中经典的通过结构体嵌套和container_of来实现类似“面向对象”风格变成的写法。其中dtld_dev结构体是用来表述一块RDMA网卡的顶层结构，其中必须放入一个ib_device类型的成员，从而使得该结构体可以被Kernel的RDMA框架所识别。这个结构体定义好之后，就可以调用ib_alloc_device来申请一块Kernel中的内存用于存放这个设备的描述符了。

    +

    拿到设备描述符以后，接下来要调用的是ib_set_device_ops，这个API需要传入一个ib_device_ops类型的结构体，该结构体中定义了RDMA设备可以支持的各种回调函数，一个简单的例子如下所示：

    +
    static const struct ib_device_ops dtld_dev_ops = {
+    .owner = THIS_MODULE,
+    .driver_id = RDMA_DRIVER_UNKNOWN,
+    .uverbs_abi_ver = DTLD_UVERBS_ABI_VERSION,
+    
+    // all kinds of callback functions
+    .alloc_ucontext = dtld_alloc_ucontext,
+    .get_port_immutable = dtld_port_immutable,
+    .query_port = dtld_query_port,
+    .query_device = dtld_query_device,
+    .dealloc_ucontext = dtld_dealloc_ucontext,
+    .get_link_layer = dtld_get_link_layer,
+    .mmap = dtld_mmap,
+    .mmap_free = dtld_mmap_free
+    // a lot more callbacks, not listed here
+};
+
    +

    可以看到这个结构体的前三个字段定义了一些元信息，此后的数十个字段都是Kernel中RDMA框架所支持的各种回调函数的挂载点。上述列出的是一些必要的回调函数，有了这些回调函数的支持，上层应用便可以通过API函数查询到一个可用的RDMA设备了（虽然这个设备现在还只是一个空壳子）。具体这些回调函数的作用，将在下一小节中进行介绍。

    +

    上述两个API的调用都是正式将RDMA设备注册给操作系统之前的准备工作。打个比方，就像去一些单位线下办理业务，在正式办理之前需要填好各种申请表格，上面第一个API的作用类似于找人要一张申请表（分配一块内存给设备描述符），第二个API的作用相当于把申请表填好（准备好各种回调函数），接下来的这个API是真正办理业务的API了（向操作系统正式注册这个RDMA设备）：ib_register_device。

    +

    在调用ib_register_device以后，如果上层用户态驱动安装正常，则可以通过rdma link show命令行指令观察到一块可以使用RDMA网卡出现在列表中，说明操作系统已经接受了上面的注册申请。

    +

    几个重要verbs回调函数的简介

    +

    在上面第二步填写申请表的操作中，最重要的就是那些回调函数了，很多用户态的管理类API操作，都会最终调用到这些回调函数上来。接下来我们来看几个重要的回调函数，这些回调函数支撑了用户态的rdma link show命令行指令。

    +

    query_device 回调

    +

    该回调的主要作用是返回设备的必要信息，原型如下：

    +
    static int dtld_query_device(
+    struct ib_device *dev, 
+    struct ib_device_attr *attr,
+    struct ib_udata *uhw);
+
    +

    从原型声明中可以看到，核心是要通过*attr将设备的各种属性信息返回给Kernel的RDMA框架。这个ib_device_attr类型的结构体是一个拥有40多个字段的结构体，其中主要包含了设备所支持的各种极限参数，例如最大的QP数量、最大的MR数量、最大的PD数量等等这些东西。

    +

    query_port 回调

    +

    这个回调的作用是返回端口的必要信息，原型如下：

    +
    static int dtld_query_port(
+    struct ib_device *dev, 
+    u32 port_num,
+    struct ib_port_attr *attr);
+
    +

    从名字就可以看出，这个回调的作用和query_device回调是很类似的，只不过这个要返回端口的属性，而不是设备的属性。其中的ib_port_attr结构体主要包含了端口的速率信息、链路是否通常、MTU配置等，对于一个空壳驱动程序而言，可以通过直接返回如下的属性来让上层应用看到一个可用的接口：

    +
    attr->state = IB_PORT_ACTIVE;
+attr->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
+
    + +

    该函数主要用于返回链路层的类型，例如对于一个RoCE设备，则该回调需要返回IB_LINK_LAYER_ETHERNET

    +

    alloc_ucontext回调

    +

    这个回调函数会在上层应用打开设备时被调用，可以在这里完成一些对设备使用前的一些初始化工作，例如将下发WQE的环形缓冲区地址映射到用户态等操作，都可以在这个回调中完成。

    +

    提到内存地址的映射，由于RDMA的使用过程中需要很多用户态跳过内核直接操作硬件的操作，因此将硬件上的CSR或Buffer映射到用户态是一个常见的操作。RDMA框架也为此提供了一套映射机制。关于这套映射机制的介绍，我们将在后面单独列出一篇文章进行介绍。对于前文中提到的mmap回调函数的使用，我们也将放到这篇文章中一同进行介绍，敬请期待。

    `;export{t as assetURLs,_ as default,r as metadata,l as toc}; diff --git a/zh-cn/assets/index-a294a248.js b/zh-cn/assets/index-6618c0b5.js similarity index 98% rename from zh-cn/assets/index-a294a248.js rename to zh-cn/assets/index-6618c0b5.js index 4d93c80..2cde4b2 100644 --- a/zh-cn/assets/index-a294a248.js +++ b/zh-cn/assets/index-6618c0b5.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/e4031380f79f643b21d6bdfd37c46a1c-95e167c8.jpeg",s="/zh-cn/assets/8108518a82f752ddea6832ce7bc15560-3d5249bd.png",a="/zh-cn/assets/cf12e52cb9d0fbb7359c08e1cfc674bc-9774dac8.png",c="/zh-cn/assets/9d0ce540d5b4e7c3cb1a055c1413bdc9-a833a409.png",n="/zh-cn/assets/f7aae2cd2b075c3f567ff87285f738c2-476d6b84.png",t="/zh-cn/assets/bb02cb50b10cee5e7d575210aaeacd71-1661168b.png",l=[e,s,a,c,n,t],p={label:"Xline 源码解读（四）—— CURP 状态机引擎",description:"在上一篇源码解读的文章（Xline 源码解读（三） —— CURP Server 的实现）中，我们简单阐述了Xline 的 Curp Server 是如何实现的。接下来，就让我们话接上回，继续深入地来了解 Curp Server 中的一些核心的数据结构，特别是 conflict_checked_channel 和 command worker，它们相互协作，共同推动着 CURP Server 内部状态机状态转换。",cover:"./e4031380f79f643b21d6bdfd37c46a1c.jpeg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-10-19",title:"Xline Source Code Interpretation (IV) CURP state machine engine"},r=[{label:"为什么我们需要冲突检测队列？",level:2},{label:"冲突检测队列是如何工作的？",level:2},{label:"状态机引擎的架构",level:2},{label:"状态是如何转换的",level:2},{label:"Summary",level:2}],o=`

    +const e="/zh-cn/assets/e4031380f79f643b21d6bdfd37c46a1c-95e167c8.jpeg",s="/zh-cn/assets/8108518a82f752ddea6832ce7bc15560-3d5249bd.png",a="/zh-cn/assets/cf12e52cb9d0fbb7359c08e1cfc674bc-9774dac8.png",c="/zh-cn/assets/9d0ce540d5b4e7c3cb1a055c1413bdc9-a833a409.png",n="/zh-cn/assets/f7aae2cd2b075c3f567ff87285f738c2-476d6b84.png",t="/zh-cn/assets/bb02cb50b10cee5e7d575210aaeacd71-1661168b.png",l=[e,s,a,c,n,t],r={label:"Xline 源码解读（四）—— CURP 状态机引擎",description:"在上一篇源码解读的文章（Xline 源码解读（三） —— CURP Server 的实现）中，我们简单阐述了Xline 的 Curp Server 是如何实现的。接下来，就让我们话接上回，继续深入地来了解 Curp Server 中的一些核心的数据结构，特别是 conflict_checked_channel 和 command worker，它们相互协作，共同推动着 CURP Server 内部状态机状态转换。",cover:"./e4031380f79f643b21d6bdfd37c46a1c.jpeg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-10-19",title:"Xline Source Code Interpretation (IV) CURP state machine engine"},p=[{label:"为什么我们需要冲突检测队列？",level:2},{label:"冲突检测队列是如何工作的？",level:2},{label:"状态机引擎的架构",level:2},{label:"状态是如何转换的",level:2},{label:"Summary",level:2}],o=`

    在上一篇源码解读的文章（
    Xline 源码解读（三） —— CURP Server 的实现

    ）中，我们简单阐述了 Xline 的 Curp Server 是如何实现的。接下来，就让我们话接上回，继续深入地来了解 Curp Server 中的一些核心的数据结构，特别是 conflict_checked_channel 和 command worker，它们相互协作，共同推动着 CURP Server 内部状态机状态转换。

    @@ -144,4 +144,4 @@ const e="/zh-cn/assets/e4031380f79f643b21d6bdfd37c46a1c-95e167c8.jpeg",s="/zh-cn 来判断命令是否冲突是显然不够的。因为  spec_pool 
    只能判断新的命令是否与正在  execute 
    但还没有  after_sync
    -的命令冲突，但它不能起到动态维护命令冲突关系的作用。为了解决冲突关系的动态维护，我们引入了冲突检测队列，并通过冲突检测队列和 command worker 共同构造 Curp Server 的状态机引擎。通过 command worker 的执行，使得来自不同路径(fast path 和 slow path)的命令能够根据自身的状态，进行状态转移，并向用户返回相应的结果。

    `;export{l as assetURLs,o as default,p as metadata,r as toc}; +的命令冲突，但它不能起到动态维护命令冲突关系的作用。为了解决冲突关系的动态维护，我们引入了冲突检测队列，并通过冲突检测队列和 command worker 共同构造 Curp Server 的状态机引擎。通过 command worker 的执行，使得来自不同路径(fast path 和 slow path)的命令能够根据自身的状态，进行状态转移，并向用户返回相应的结果。

    `;export{l as assetURLs,o as default,r as metadata,p as toc}; diff --git a/zh-cn/assets/index-6d1ca60f.js b/zh-cn/assets/index-6d1ca60f.js new file mode 100644 index 0000000..e5f379a --- /dev/null +++ b/zh-cn/assets/index-6d1ca60f.js @@ -0,0 +1,24 @@ +const e="/zh-cn/assets/cover-b2241eaf.png",n="/zh-cn/assets/image-ee9f9238.png",t=[e,n],i={label:"Xline社区会议Call Up：揭秘Xline 0.7版本更新",description:"为了更全面地向大家介绍Xline的进展，同时促进Xline社区的发展，我们将于2024年7月31日北京时间11:00 p.m.召开Xline社区会议。",cover:"./cover.png",location:"中国香港",date:"2024-07-25",title:"Xline Community Meeting Call Up Revealing Xline 0.7 Version Update"},l=[{label:"1",level:2},{label:"2",level:2},{label:"3",level:2}],p=`

    Xline /Community Meeting +为了更全面地向大家介绍Xline的进展，同时促进Xline社区的发展，我们将于2024年7月31日北京时间11:00 p.m. 召开Xline社区会议 。

    +

    欢迎您届时登陆zoom观看直播：

    +

    会议号: 975-8012-1637

    +

    会议链接：

    +

    https://zoom-lfx.platform.linuxfoundation.org/meeting/97580121637?password=8f9543a5-54bb-48dc-ab90-99d8b75938e4

    +

    1

    +

    在Xline 0.7中，我们完成了对Xline代码库中进行了一次较大的重构。这次重构在某些性能测试中甚至使得Xline获得了近20倍的性能提升。

    +

    本次Xline社区会议主要围绕Xline 0.7版本的更新展开，以下是会议的主要内容：

    +

    性能优化: 我们对curp命令执行流程进行了大幅重构，并对Xline状态机的异步代码进行了一系列优化，提升了系统的整体性能。

    +

    基于RIFL的命令去重(deduplication): 我们基于RIFL实现了一套去重机制，解决了客户端自动重试导致的一致性问题。同时，基于去重机制重新实现了Xline中的命令垃圾回收流程。

    +

    2

    +

    欢迎参与到Xline项目中：

    +

    我们欢迎任何对于Xline的积极贡献。目前在GitHub上有些任务并不需要深入了解Curp协议或Xline这个项目，只需要了解API和Rust语言即可。即使您现处于入门阶段，并想要在开源项目中使用Rust语言，社区也会提供指导和帮助，来引导您更好地参与项目。

    +

    3

    +

    Xline近期文章参考：

    +

    Xline 0.7重构性能分析总述

    +

    本文讲解了Xline中重构后命令执行流程的新设计，以及我们是如何优化Xline的性能的。

    +

    异步运行时IO问题分析

    +

    在本篇文章中，我们主要会通过Xline开发中的几个例子，讨论Rust的异步运行时中有关于IO的问题，以及在代码实现中如何正确使用Tokio runtime以实现最佳性能。图片 +Xline于2023年6月加入CNCF 沙箱计划，是一个用于元数据管理的分布式KV存储。Xline项目以Rust语言写就。感谢每一位参与的社区伙伴对Xline的帮助和支持，也欢迎更多使用者和开发者参与体验和使用Xline。

    +

    GitHub链接：https://github.com/xline-kv/Xline

    +

    Xline官网：www.xline.cloud

    +

    Xline Discord: https://discord.gg/TT6azpTHZS

    `;export{t as assetURLs,p as default,i as metadata,l as toc}; diff --git a/zh-cn/assets/index-fd018bec.js b/zh-cn/assets/index-71928cce.js similarity index 99% rename from zh-cn/assets/index-fd018bec.js rename to zh-cn/assets/index-71928cce.js index ac5019f..bfa84e8 100644 --- a/zh-cn/assets/index-fd018bec.js +++ b/zh-cn/assets/index-71928cce.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/image1-abdba371.png",s="/zh-cn/assets/image2-c99b8752.png",l=[e,s],c={label:"Rust实现RDMA异步编程（一）：基于epoll实现RDMA异步操作",description:"RDMA是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA的library是用C实现的，但是没有很好用的Rust的binding，不方便Rust开发者使用。于是我们正在封装一层符合Rust风格、便于Rust开发者使用的RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用Rust异步编程来实现IO操作，可以避免操作系统的进程上下文切换，提高性能，而且Rust的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现RDMA的操作。本文先讨论下如何基于Linux的epoll机制实现RDMA异步操作，后续的文章再探讨如何用Rust异步编程来实现RDMA异步操作。",location:"河南",author:["王璞"],editor:["张汉东"],tags:["RDMA"],date:"2022-05-27",title:"Rust implementation of RDMA asynchronous programming (I): epoll based implementation of RDMA asynchronous operation"},n=[{label:"RDMA 操作简介",level:2},{label:"Linux epoll 异步机制简介",level:2},{label:"RDMA 完成队列 CQ 读取 CQE 的同步和异步方法",level:2},{label:"RDMA 轮询方式读取 CQE",level:3},{label:"RDMA 完成事件通道方式读取 CQE",level:3},{label:"基于 epoll 异步读取 CQE",level:3}],o=`

    RDMA 是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA 的 library 是用 C 实现的，但是没有很好用的 Rust 的 binding，不方便 Rust 开发者使用。于是我们正在封装一层符合 Rust 风格、便于 Rust 开发者使用的 RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用 Rust 异步编程来实现 IO 操作，可以避免操作系统的进程上下文切换，提高性能，而且 Rust 的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现 RDMA 的操作。本文先讨论下如何基于 Linux 的 epoll 机制实现 RDMA 异步操作，后续的文章再探讨如何用 Rust 异步编程来实现 RDMA 异步操作。

    +const e="/zh-cn/assets/image1-abdba371.png",s="/zh-cn/assets/image2-c99b8752.png",l=[e,s],c={label:"Rust实现RDMA异步编程（一）：基于epoll实现RDMA异步操作",description:"RDMA是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA的library是用C实现的，但是没有很好用的Rust的binding，不方便Rust开发者使用。于是我们正在封装一层符合Rust风格、便于Rust开发者使用的RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用Rust异步编程来实现IO操作，可以避免操作系统的进程上下文切换，提高性能，而且Rust的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现RDMA的操作。本文先讨论下如何基于Linux的epoll机制实现RDMA异步操作，后续的文章再探讨如何用Rust异步编程来实现RDMA异步操作。",location:"河南",author:["王璞"],editor:["张汉东"],tags:["RDMA"],date:"2022-05-27",title:"Rust implementation of RDMA asynchronous programming (I)_ epoll based implementation of RDMA asynchronous operation"},n=[{label:"RDMA 操作简介",level:2},{label:"Linux epoll 异步机制简介",level:2},{label:"RDMA 完成队列 CQ 读取 CQE 的同步和异步方法",level:2},{label:"RDMA 轮询方式读取 CQE",level:3},{label:"RDMA 完成事件通道方式读取 CQE",level:3},{label:"基于 epoll 异步读取 CQE",level:3}],o=`

    RDMA 是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA 的 library 是用 C 实现的，但是没有很好用的 Rust 的 binding，不方便 Rust 开发者使用。于是我们正在封装一层符合 Rust 风格、便于 Rust 开发者使用的 RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用 Rust 异步编程来实现 IO 操作，可以避免操作系统的进程上下文切换，提高性能，而且 Rust 的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现 RDMA 的操作。本文先讨论下如何基于 Linux 的 epoll 机制实现 RDMA 异步操作，后续的文章再探讨如何用 Rust 异步编程来实现 RDMA 异步操作。

    RDMA 操作简介

    RDMA 的编程模型是基于消息的方式来实现网络传输，并且用队列来管理待发送的消息和接收到的消息。RDMA 的网络传输相关操作基本上都是跟队列相关的操作：比如把要发送的消息放入发送队列，消息发送完成后在完成队列里放一个发送完成消息，以供用户程序查询消息发送状态；再比如接收队列里收到消息，也要在完成队列里放个接收完成消息，以供用户程序查询有新消息要处理。

    图片

    diff --git a/zh-cn/assets/index-740bc59b.js b/zh-cn/assets/index-740bc59b.js new file mode 100644 index 0000000..eb33f2a --- /dev/null +++ b/zh-cn/assets/index-740bc59b.js @@ -0,0 +1,161 @@ +const e="/zh-cn/assets/image-8a82c950.png",p="/zh-cn/assets/image2-fedcb560.png",c="/zh-cn/assets/image3-e10b812e.png",I="/zh-cn/assets/image4-97f5ce33.png",P="/zh-cn/assets/image5-518dd716.png",o="/zh-cn/assets/image6-06237b2e.png",C="/zh-cn/assets/image7-c22e37fd.png",l="/zh-cn/assets/image8-82d6772e.png",n="/zh-cn/assets/image9-9d5cd850.png",t="/zh-cn/assets/image10-20f4aa92.png",i=[e,p,c,I,P,o,C,l,n,t],T={label:"规模弹性： 管理谷歌的TPUv4机器学习超级计算机",description:"我们采用软件定义网络（SDN）方法来管理 TPUv4 的高带宽芯片间互连（ICI）结构，利用光路交换来动态配置路由，以应对机器、芯片和链路故障。我们的基础设施可检测故障并自动触发重新配置，以最大限度地减少对运行工作负载的干扰，同时启动受影响组件的补救和修复工作流程。",location:"中国香港",cover:"./image1.png",author:["达坦科技"],date:"2024-06-13",title:"Managing Google's TPUv4 Machine Learning Supercomputer"},U=[{label:"引言",level:2},{label:"可重构的 ML 超级计算机系统架构",level:2},{label:"静态 pod 架构的经验教训",level:3},{label:"TPUv4：基于 OCS 的可重构性",level:3},{label:"可编程 ICI 协议",level:3},{label:"超级计算机管理自动化",level:2},{label:"概述",level:3},{label:"超级计算机建模",level:3},{label:"集群调度",level:3},{label:"光点管理器",level:3},{label:"libtpunet",level:3},{label:"硬件维护和恢复",level:3}],b=`

    图片 +TPUv4（张量处理单元）是谷歌用于机器学习训练的第三代加速器，采用定制的三维环形互连，部署为 4096 节点的超级计算机。在本文中，我们将介绍设计和运行软件基础设施的经验，这些软件基础设施使 +TPUv4 超级计算机能够大规模运行，包括自动故障恢复和硬件恢复功能。 +我们采用软件定义网络（SDN）方法来管理 TPUv4 的高带宽芯片间互连（ICI）结构，利用光路交换来动态配置路由，以应对机器、芯片和链路故障。我们的基础设施可检测故障并自动触发重新配置，以最大限 +度地减少对运行工作负载的干扰，同时启动受影响组件的补救和修复工作流程。类似的技术还可与硬件和软件的维护和升级工作流程对接。我们的动态重新配置方法使我们的 TPUv4 超级计算机实现了 99.98% +的系统可用性，能够从容应对约 1% 的训练任务所遇到的硬件中断。

    +

    引言

    +

    机器学习（ML）模型的规模和复杂性不断增长[9, 24]，这得益于异构超级计算机的大规模计算能力，其中 CPU 负责运行时任务协调和 I/O，而 TPU [18-20] 和 GPU 等加速器则提供模型训练所需的计算性 +能。扩大超级计算机的节点数能使模型功能更强，因为训练过程可以在批次、张量和流水线维度上有效地并行化[17, 33]。

    +

    大规模 ML 超级计算机的硬件/软件生态系统面临两个挑战：第一，有效并行化模型训练工作负载；第二，也是本文的重点--保持计算资源的高可用性，从而为 ML 训练工作提供高产出。近年来，后者变得越来 +越困难，因为

    +
      +
    • +

      松耦合分布式应用（如 Map-Reduce[12]）可以有效地容忍动态变化的资源分配，而 ML 训练作业则不同，它更多地使用静态（编译时）分片策略和帮派式计划执行，要求所有计算资源同时处于健康状态；

      +
      • +
    • +

      现代 ML 模型（如大型语言模型 (LLM)）需要前所未有的大量硬件（传统计算、加速器、网络和存储）[2]，从而将预期 MTBF 降至数小时甚至数分钟[15]；

      +
      • +
    • +

      在云或共享集群环境中，许多用户都在争夺超级计算机资源的不同子集，这使得能够随着时间的推移重新配置或重新平衡资源分配变得格外重要。

      +
      • +
    +

    谷歌的 TPUv4 机器学习超级计算基础设施旨在应对这些挑战。它包括以下硬件和软件组件：

    +
      +
    • +

      多个cubes：一个cube是一个硬件单元，包含 64 个 TPU 芯片，以 4x4x4 的三维网格排列；每个超级计算机或 pod 有 64 个cube，共计 4096 个 TPU。

      +
      • +
    • +

      专有的芯片间互联（ICI）：这是一种高速网络结构，可直接与 TPU 互联，从而实现设备与设备之间的直接通信（即 RDMA），而无需涉及 CPU。

      +
      • +
    • +

      光路交换机（OCSes）[25]：用于动态交叉连接（xconnect）不同cube的 ICI，以形成用户要求的环形拓扑结构。

      +
      • +
    +

    Borg [31]：集群管理服务，用于受理、调度和管理 TPUv4 作业（及其他作业）。

    +

    Pod 管理器：集群级软件服务，根据 Borg 的调度决定启动 OCS xconnect 设置，从而管理多cube连接。 +图片

    +

    可重构的 ML 超级计算机系统架构

    +

    TPUv4 可重构超级计算机是专为可扩展性、可用性、弹性和成本而设计的[18]。它的核心是一个可重新配置的 ICI 结构拓扑，连接不同的 TPUv4 芯片，每个 pod 都有一组可编程的 OCS。如果没有 TPUv4 基于 OCS 的可重构性，随着计算资源规模的扩大，作业可用性会迅速下降。图 1 利用已部署的 TPUv3 静态 pod 和 TPUv4 可重构 pod 的测量数据显示了这种效果。

    +

    对于像 TPUv3 [19]这样计算资源静态互连的传统超级计算机，当所需计算资源增加到 1024 个芯片时，作业的整体可用性会急剧下降。这是因为在静态 pod 中，一组连续节点中的所有资源必须同时处于健康状态，才能分配给用户，而随着系统规模的扩大，这种可能性越来越小。利用 TPUv4 的cube级可配置性，可用性可保持在 94% 左右的高水平，相当于约 50 个cube或 3200 个 TPUv4 芯片。

    +

    之后可用性下降的原因是不同cube之间偶尔会出现机器故障和 ICI 链路故障。正如我们将在第 4 节中展示的那样，利用容错路由来容忍偶尔发生的 OCS 故障或维护事件，可将可用性进一步提高到 99.98%，因为即使在这些罕见的事件中，用户仍可访问各个cube。 +图片

    +

    静态 pod 架构的经验教训

    +

    在 TPUv4 ML 超级计算机之前，最先进的是 TPUv2 和 TPUv3 静态 pod [19]--“静态 ”是因为它们具有不可重新配置的固定 ICI 网格。TPUv2 pod 有 256 个 TPU，连接在一个 16x16 ICI 环上，而 TPVv3 有 1024 个 TPU，连接在一个 32x32 环上。TPUv3 还有一个扩展变体，它将 4 个 pod 组合成一个 128x32 网格，但 ICI 路由能力有限。这种所谓的多节点版本是与应用集体模式共同设计的，用于探索大型模型的扩展策略[21]。

    +

    图 1 和图 2 介绍了随着模型规模在静态 pod 中扩大，可用性面临的挑战。要训练一个模型，所有 TPU 进程必须同时启动，通过 ICI 集体同步更新权重。一个失败或中断的进程将中断整个训练过程。

    +

    为用户的工作寻找合适的计算资源面临着以下挑战：

    +
      +
    1. +

      硬件中断：在 ICI 链路、TPU 芯片和 CPU 主机层面对硬件、固件和软件进行定期计划维护，会从可调度池中移除资源[22]。对于拥有数千个 TPU 的超级计算机来说，影响任何一个组件的事件都会相对频繁地发生，因此很难找到可用的资源集。此外，随着系统和应用规模和复杂性的增加，意外故障发生的频率也会增加。如果没有可重新配置性，要为一项需要 1024 台主机的工作提供良好的可用性，就意味着每台主机都必须保持 99.9% 的可用性；而引入可重新配置的 OCS 后，主机可用性要求将降至 99%。

      +
      2. +
    2. +

      工作负载碎片整理：许多工作争夺 pod 可调度资源的不同子集是很常见的。由于这些工作来来去去的时间无法预测，有时 Borg 必须移动（抢占）较小的工作，以腾出连续的 TPU，用于等待较大的训练工作。当用户优先级混合在一起时，调度的复杂性就会增加。有了基于 OCS 的可重构性，Borg 就不需要担心 TPU 资源的物理连续性。相反，任何一组空闲的cube都可以通过 OCS 交叉连接，供用户作业使用。

      +
      3. +
    3. +

      部署准备时间：由于计算和网络资源的紧密耦合性，静态 pod 在所有硬件安装完毕之前无法使用。有了可重新配置的 pod，一旦 OCS 的足迹安装完毕，cube就可以立即部署和使用。

      +
      4. +
    +

    上述挑战促使我们对 TPUv4 pod 架构进行重新思考。

    +

    TPUv4：基于 OCS 的可重构性

    +

    TPUv4 采用可重构架构，利用 Palomar 光路开关（OCS）[25] 解决静态系统的问题。通过采用这种架构，我们能够有效地扩展到 4096 个 TPU 节点，并支持按任务选择三维环形或三维扭曲环形拓扑结构[7]。

    +

    OCS 是一种可动态配置的 N ×N 交换机，基于微机电系统 (MEMS) 镜阵列，可在毫秒内完成切换。每个 OCS 允许在交换机（逻辑）北侧的任意一对端口与（逻辑）南侧的任意一对端口之间创建可编程的交叉连接（xconnect）。一旦在 Ni 端口与 Sj 端口之间建立了连接，就会建立一个专用的 ICI 链路连接，这样 Ni 端口的光信号就只能路由到 Sj 端口，反之亦然，直到这些端口被重新配置成不同的排列方式。 +图片 +图 3：4x4x4 cube由 16 台 TPUv4 机器组成，每台机器以 2x2x1 网格组织 4 个 TPU。cube中的 TPU 沿着 X/Y/Z 维度通过 ICI 相互连接，每个cube面有 16 个用于 OCS xconnect 的光链路。

    +

    TPUv4 的计算资源以多机器cube的粒度组织。每个 TPU 机器都有一个 CPU 盘和一个 TPU 盘，通过 PCIe 链接。每个 TPU 托盘有 4 个 TPUv4 芯片，以 2x2x1 ICI 网格排列；16 台 TPU 机器组合成一个数据中心机架；机架内的 ICI 链接通过 ICI 互联，形成 4x4x4 网格。这个组合就是一个cube。

    +

    光交换机将多个cube互连起来，形成更大的 ICI 拓扑形状，在三个维度中的每个维度都有一个或多个cube。每个三维cube在 X/Y/Z 维的每个面上都有 16 个 ICI 接口，每个cube共有 96 个 ICI 接口。TPUv4 超级计算机由 64 个cube组成，共有 6144 个光 ICI 链路连接到 48 个不同的光路交换机。带宽较低的 CPU 端数据中心网络单独管理 [25, 29]。

    +

    TPUv4 的 OCS 可配置性大大提高了可用性。训练任务可以使用任何cube，即使这些cube在物理上并不毗连，这就减少了竞争任务造成的资源碎片。硬件故障会将受影响的cube从资源池中移除，但允许使用健康的cube继续运行。选择 16 台机器的容错粒度是为了兼顾便利性（每个机架的部署、电源和网络），同时在发生故障时保留相对较小的爆炸半径。

    +

    可重构性由配套的软件基础设施管理。根据所需的拓扑结构和cube选择，每次任务启动都会诱导软件建立独特的 OCS xconnect。大量的芯片、链路和交换机也需要自动故障诊断、恢复、作业重新安排和容错 ICI 路由。

    +

    使用 OCS 可以以较低的成本扩展 TPUv4 pod：OCS 和光纤成本小于 TPUv4 pod 总资本成本的 5%，其运行功率小于 pod 总功率的 3%。TPUv4 OCS 超级计算机的资本和运营成本大大低于使用 Infiniband 等分组交换机的替代方案[18]。

    +

    可编程 ICI 协议

    +

    TPUv4 的 ICI 协议设计为可编程，这样软件就能解决可重新配置性和弹性等操作复杂性问题。一个 TPUv4 pod 就是一个 ICI 域，其中任何一对 TPU 都可以相互进行 RDMA。每个 ICI 链路可承载 50GBps 的单向带宽。TPUv4 采用三维 ICI 网络拓扑结构，可实现高分段吞吐量、大系统规模和低延迟，同时保持低成本，并通过集合支持工作负载并行化。 +图片 +图 4：TPUv4 的 ICI 交换机实现了分层的可编程 ICI 协议。

    +

    如图 4 所示，每个 TPUv4 芯片都有一些计算、一些高带宽内存和一个实现各种 ICI 协议层的 ICI 交换机。ICI 协议有利于按任务进行网络分区，为每个任务设置连接、寻址、路由和流量控制，用户会话不会跨越任务边界。这样，每个任务都能独占其使用的所有链路，从而提高了安全性，并消除了网络共享和拥塞控制所带来的额外系统复杂性。表 1 显示了协议层及其相应的软件代理。从下往上依次为: +图片 +表1: ICP协议层

    +
      +
    • +

      物理层：SERDES、PCS 和链路自动建立模块建立高速链路，尽管不可避免地存在传输错误。Pod 管理器通过旋转 OCS MEMS 镜像控制物理通道的 xconnect，片上管理器自动初始化和配置物理链路。在每个 TPU 机器的 Linux 系统容器中运行的 healthd 守护进程会持续读取链路质量和连接信号，以跟踪硬件健康状况。

      +
      • +
    • +

      可靠的数据层：当数据在物理层丢失时，数据包按顺序传送，并自动重新传输，从而隐藏了物理层的不可靠特性。执行链路级基于信用的流量控制。启用数据层表示 ICI 用户会话已准备就绪；在准备就绪之前，系统会清除所有数据缓冲区，以确保消除先前 ICI 会话的任何架构状态污染。如果启用数据层的一端出现故障，我们会自动关闭链路的另一端，以确保会话正常运行。libtpunet 会发出会话启动/停止命令，并调整最佳流量控制缓冲区大小。权限为健康机器守护进程（healthd machine daemon）可以明确禁用数据层链路，禁止任何用户会话在链路在线恢复时使用该链路（§3.6.3）。

      +
      • +
    • +

      路由层： 数据包转发表由 libtpunet 编程，具有全局负载平衡功能。RDMA 指令中的每个数据包从源 TPU 到目标 TPU，按目标芯片 ID 索引到每个芯片中的转发表。尽管 libtpunet 库可以向编译器提供提示，帮助指导程序优化，但详细的路由策略是隐藏在 ISA 抽象之外的。

      +
      • +
    • +

      事务层： 编译器生成的 RDMA 指令会启动以硬件为媒介的传输，从内存读取数据并馈送到 ICI 交换机。跨越一组单独 RDMA 的事务构成一个集体通信操作。

      +
      • +
    +

    使用软件可编程 ICI 协议栈，我们可以灵活应对 4096 节点超级计算机的复杂性，同时允许硬件处理链路的实时控制，并提供高带宽、低延迟的数据传输。

    +

    超级计算机管理自动化

    +

    在下文中，我们将简单介绍端到端软件基础架构，该基础架构用于启动 TPUv4 ML 训练作业，并随后监控和管理其生命周期（总结另见图 5）。 +图片 +图 5：TPUv4 作业的生命周期：Pod 管理器与 Borg 调度器合作，要求 OCS xconnect cube，然后运行 healthd 预检，libtpunet 建立 ICI 网络。XLA 采用分布式共享内存系统抽象编译程序。一旦检测到故障，运行中的工作会自动中断并重新调度。

    +

    概述

    +

    当用户希望在 TPUv4 超级计算机上启动大型作业1 时，他们会以 (4x,4y,4z) 的形式指定所需的三维切片拓扑结构以及其他元数据。博格集群调度程序[31]会接收所有此类请求，并将其排成队列，等待资源分配。一旦作业符合调度条件，Borg 将选择一组预期的cube，然后发布 xconnect 请求。

    +

    Pod 管理器会定期轮询 Borg，以了解任何待处理的 xconnect 请求。对于每个请求，它都会指示相关的 OCS 交换机旋转其 MEMS 镜像，以建立光 ICI 物理通道。假设所有 OCS xconnects 都正确完成，Pod 管理器就会向 Borg 发送确认信息。经 Pod 管理器批准后，Borg 将任务二进制文件分派到选定的一组 TPU 机器上。首先要进行预检，以确保每个 TPU 机器的硬件完全健康（任何故障都会导致 Borg 重新安排到不同的立方体上）。随后，libtpunet 将建立 ICI 网络（即验证物理层和链路层，并编制转发表）。

    +

    XLA TPU 编译器[3]采用 libtpunet 建立的切片拓扑抽象，为分布式训练生成自动并行化的 TPU 程序。在每台机器上，编译好的 TPU 二进制程序将通过 PCIe 发送到 TPU，然后即可执行。上述工作流程适用于所有 ML 框架，包括 TensorFlow [4]、Jax [1] 和 Pathways [5]。

    +

    在训练过程中，机群维护服务会持续监控所有 TPU 机器的硬件和软件健康状况。任何检测到的异常都会向 Borg 发出通知，Borg 会反过来通知任何受影响的运行作业，以便它们能写入最新的模型检查点（如果可能）。作业一旦被重新安排，就会从最新的模型检查点重新开始。有故障的硬件会被识别出来，并被发送到维修工作流中进行诊断和维修。

    +

    下文将详细介绍这一软件基础设施。

    +

    超级计算机建模

    +

    超级计算机软件栈的基础是数据中心模型[23]，它反映了 TPUv4 机器和所有相关组件。该模型存储在一个专用数据库中，其模式允许我们表示包括机架、交换机、RPC 端点等在内的实体图。为支持 TPUv4 超级计算机，一些关键实体包括 TPUv4 立方体（即 16 台机器及其托盘、芯片和静态 ICI 互联拓扑），以及从cube到 OCS 的 ICI 布线和附加光学元数据。一旦构建完成，模型就会为cube部署、作业调度、OCS xconnect、网络设置和健康检查设置意图。该模型由 Borg 和 Pod Manager 使用，作为每个特定超级计算机配置的真实来源。

    +

    TPUv4 拓扑的静态建模最大可达cube大小，因为更大的形状需要动态cube xconnect。例如，一台机器是 2x2x1，两台相邻的机器可以组合成 2x2x2，依此类推，直到 4x4x4。

    +

    集群调度

    +

    Borg 集群调度程序[31]负责为每个 TPUv4 作业分配合适的机器。在谷歌遍布全球的数据中心中有许多 Borg 单元，每个单元可能包括多台 TPUv4 超级计算机。每个单元由 N 个复制的 Borg 服务实例管理，这些服务实例组合起来提供一个逻辑 Borg 实例，我们称之为 Borg Prime，其中包括一个群集调度器。

    +

    集群调度器将预期配置（来自数据中心模型）与当前的实际状态相结合，将其负责的所有 TPUv4 资源组织到可调度的机器组中。用户通常会选择一个单元来启动他们的工作，并指明使用哪种三维拓扑来训练他们的模型。Borg 会将每个用户请求与一组可行（可用）的机器相匹配，并创建建议分配。如果是多cube作业，Borg会将建议的立方体集发布给 Pod 管理器，并等待它发出 xconnect 成功的信号，然后再继续作业。

    +

    每台 TPU 机器都运行一个 borglet 守护进程，与 Borg Prime 合作处理作业生命周期管理。经 Pod 管理器批准后，Borg Prime 会指示指定cube中的每个 borglet 创建一个任务容器，并在任务容器中公开机器的 TPUv4 设备2。然后，borglet 在容器中启动一系列二进制文件，从预检查程序开始，到用户二进制文件结束。

    +

    Borg Prime 和 borglet 共同管理对计划维护（如固件或软件升级）或突发硬件故障等事件的响应。这些事件由不同来源汇总，例如，borglet 会收到 healthd 守护进程发出的有关本地机器重大故障的通知，并将详情传递给 Borg Prime；Pod 管理器同样会转发有关任何重大 OCS 问题的详情。

    +

    Borg Prime 还会收到来自修复自动化系统和软件包管理器的非关键事件通知。在所有情况下，受影响的 TPU 机器都会被标记为不可用，在发出通知后驱逐任何正在运行的作业，并禁止接受新的等待执行的任务，直到问题得到解决。Borg Prime 实现了优先级调度（针对优先级较高和较低的作业）。为了帮助解决碎片化问题，Borg Prime 还可以选择抢先处理正在运行的工作负载（例如，将多个子cube工作负载迁移到更少的cube中，或将多cube工作负载迁移到不同的 pod 中，以便容纳非常大的工作负载）。这将以可控的方式进行，确保作业受到最小和公平的影响。 +图片 +图 6：64 个cube中的每个cube都有两个光 ICI 链路，分别从一个环的两个相对侧连接到 48 个 OCS 中的每个 OCS。每个维度需要 16 个 OCS。

    +

    光点管理器

    +

    Pod 管理器是对 TPUv4 系统至关重要的高可用性服务。它运行在独立于 Borg 的专用网络控制服务器上，并通过谷歌控制平面网络与 Borg 和 OCS 交换机等客户端进行交互。Pod 管理器有两个主要功能：创建 OCS xconnects 以配置用户要求的 TPU 拓扑，以及实时监控 Pod 的健康状况。

    +

    Pod 管理器完全依赖模型数据（第 3.2 节）来配置其服务。它会定期轮询网络模型服务，获取其服务的特定 TPUv4 的最新信息，如 OCS 端点和计划部署的机器。每个任务的 OCS xconnect 计划和持续健康检查都来自模型。使用模型驱动的 Pod 管理器设计，可以逐步部署完整的 TPUv4 超级计算机，同时在早期向客户提供一部分cube。

    +

    Pod 管理器通过复制实现高可用性：一个主实例为外部请求提供服务，其余实例以热备用模式运行，以便在必要时迅速选出一个主实例。我们的备用方案依赖于每个跟随者持续接收检查点副本（也从外部持久化），这意味着故障切换通常非常快。我们依靠这一点进行无中断软件升级，并容忍硬件和软件崩溃。

    +

    Pod 管理器还是 TPUv4 超级计算机健康监控的中心枢纽。该服务通过 RPC 查询 OCS 硬件，定期检查所有光交换机的硬件健康状况。这些遥测数据被导出到谷歌的全机群健康管理系统（§3.6），并实时用于指导容错 ICI 路由优化（§4.2）。 +图片 +图 7：8 cube 8x8x8 环形的 xconnect。每个 OCS 需要配对 16 个南北向 OCS 端口。颜色相同的cube面相互连接，形成多cube环形拓扑结构。

    +

    环形 xconnect

    +

    每个三维cube在 X、Y、Z 三个维度的 6 个面上各有 16 个光学 ICI，共计 96 个 ICI 链接。Pod 管理器为每个链路分配一个唯一标识符 {cube_id,dim,index,polarity}，其中 cube_id 是 Google 范围内的立方体 UID，index 范围为 0-15，表示cube面内的位置，polarity 可以是 in 或 out。48 个 OCS 用于 xconnect 这些 ICI，每个维度 16 个。Pod 管理器为每个 OCS 赋予与 ICI 光缆匹配的唯一标识符 {dim,index}。

    +

    图 6 展示了这种光缆连接方案。每个 OCS 提供 128 个端口，用于从cube连接 ICI 光缆，允许所有 64 个cube的单个端口完全连接。这种方案允许形成任何 (4x,4y,4z) TPU 拓扑形状，包括 4x4x4 单cube全环形。需要注意的是，由于连接的 ICI 和 OCS 具有相同的 {dim,index} 参数，如果一个 OCS 不可用，每个cube都会观察到一个具有相同 {dim,index} 参数的 ICI 链接断开。

    +

    为了执行任务的cube xconnect，Pod 管理器会利用其对光 ICI 和 OCS 的内部表示。图 7 展示了 8x8x8 环形的流程：

    +
      +
    • +

      步骤1：Borg 发布一组 UID 和所需拓扑。Pod 管理器根据拓扑结构为每个cube分配一个 3D 坐标；由于 Pod 管理器可以指示交换机应用任意端口-端口 xconnect，因此可以为任何坐标选择任何cube。对于每个（4x、4y、4z）形状，都有 x - y -z cube坐标。

      +
      • +
    • +

      步骤2：Pod 管理器根据分配的坐标计算cube之间的相邻信息；例如，（0,0,0）沿 Xout 和 Xin 与（1,0,0）相邻。

      +
      • +
    • +

      步骤3：Pod 管理器告诉 OCS 在每对相邻cube之间 xconnect ICI {cubeA,dim,index,in} 和 {cubeB,dim,index,out} 。对于任何拓扑结构，所有 48 个 OCS 都需要执行 xconnect ICI 链路的命令，因为所有 16 个 ICI 端口都必须沿着所有 3 个维度和极性连接到它们的远程邻居。根据拓扑结构的不同，每个 OCS 可执行的命令数量也不同，但单个维度的 OCS 总是执行相同数量的命令。以 8x8x8 为例，共有 8 个cube，沿 x、y、z 维度的每个 OCS 必须连接 8 对端口才能形成环（每个cube一个）。

      +
      • +
    • +

      步骤4：将所需连接与当前配置（缓存在 Pod 管理器中）进行比较，然后过滤掉保持不变的连接。发送 RPC 以 xconnect 新连接。

      +
      • +
    +

    在上述任何步骤中，如果 Pod 管理器确定任何端口连接不可行（例如，由于硬件问题），Pod 管理器将向 Borg 说明，并拒绝接受分派给他的cube集合。然后，Borg 可以为用户的工作提出一组新的cube。 +图片] +图 8：(a) 2 Cube 4x4x8 扭合-torus 的 xconnect 和 (b) 4 Cube 4x8x8 扭合-torus 的 xconnect。具有相同颜色的Cube面通过 OCS 相互连接，形成扭曲的环形 ICI。扭曲尺寸的环尺寸总是相较更短的。

    +

    扭转环 xconnect

    +

    除了常规的环形拓扑结构外，如果用户提出要求，我们还支持使用扭曲环形拓扑结构 [7]。在 TPUv4 扭转环形拓扑中[18]，环绕链路会根据作业的整体形状以矢量偏移的方式移动。TPUv4 支持两个系列的扭角拓扑：(4k,4k,8k) 和 (4k,8k,8k)。图 8 展示了它们的构建过程。

    +

    对于（4k,4k,8k）形状，不对称沿 Z 维增长，X 维和 Y 维尺寸相同（即 Z 维的一半）。X 和 Y 环绕链接通过 (0,0,4k) 矢量偏移进行移动。

    +

    对于 (4k,4k,8k)，不对称沿 Y 和 Z 两个维度增长，而 X 维度的尺寸较小（即 Y 和 Z 维度的一半）。X 环绕链接的偏移量为 (0,4k,4k)。

    +

    规则环和扭曲环的Cube坐标是相同的，但扭曲环会改变相邻的cube面，最终导致 Pod 管理器指示每个 OCS xconnect 不同的南北端口。

    +

    libtpunet

    +

    xconnect 完成后，一旦 ICI 物理通道稳定下来，Borg 就会向主机发送作业二进制文件。libtpunet 库在用户作业中运行，以建立 ICI 网络（数据层和路由层）。

    +

    第一步是拓扑发现。发现是一个自下而上的过程，它扫描每个 TPU 的本地邻居 ICI 连接信息，并运行广度优先搜索，以确保配置的全局拓扑与用户请求相匹配。在此过程中，任务中的每个 TPU 都会被分配一个唯一的芯片 ID；该 ID 将作为 RDMA 指令 ISA 接口的一部分公开。发现过程还能识别可能需要绕过的故障，或在系统抽象中暴露给用户的故障。拓扑发现是对网络意图驱动建模的补充。

    +

    libtpunet 会根据拓扑发现过程中收集到的信息，计算每个 TPU 的转发表并对其进行编程。转发表是作业的全局优化路由解决方案的一部分（更多详情见第 4 节）。

    +

    除了 ICI 路由编程，libtpunet 还根据链路 RTT 的比例设置链路层流量控制缓冲区的大小。时钟配置使用最小生成树生成，并将任何 ICI 路径的最长 RTT 考虑在内。使用一致的时钟可以为性能跟踪和调试提供精确的时间戳。

    +

    最后，libtpunet 会启动 ICI 会话，允许使用各种编译器生成的 RDMA 集体操作。这是通过同步启用每个 ICI 链接两端的数据层来实现的。ICI 握手会在硬件中进行，以确认可靠的数据链路启用请求是从链路两端发起的。

    +

    libtpunet 会在作业生命周期内保持激活状态，以监控 ICI 会话的健康状况。如果任何 TPU 发现错误、链路层瘫痪或驱动程序崩溃，就会向 libtpunet 发出 PCIe MSI-X 中断，由 libtpunet 通知 Borg 启动重新安排。

    +

    硬件维护和恢复

    +

    在全球范围内，破坏性维护事件（如硬件维修或更换，或关键软件/固件升级）发生的频率相对较高。为了最大限度地提高整体维护效率，谷歌运行了一个机队自动化系统。其职责包括硬件故障诊断、硬件恢复工作流程和系统软件包安装（如主机内核或设备固件）。

    +

    由机群维护自动化系统生成的事件会向 Borg 发送通知，以驱逐受影响机器上正在运行的作业；任何被驱逐的作业都会排队等待重新安排。如果出现疑似故障，受影响的硬件将被发送到维修工作流程，该流程将自动诊断与技术人员的必要输入相结合。硬件恢复后，在重新加入资源池之前，会经过自动质量保证流程。对于 TPUv4 超级计算机，我们通过持续的 TPU 硬件健康状况遥测、作业启动前的明确预检以及在线 ICI 链路修复方案对该系统进行了扩展。

    +

    healthd

    +

    我们在每台 TPUv4 机器上都添加了一个 healthd 守护进程，对硬件部分进行实时监控，包括 24 个单向 ICI 链路、TPU 和 CPU 之间的 PCIe 通道以及 4 个 TPU ASIC 本身。healthd 使用与 Pod Manager 相同的模型，后者提供了有关监控端点、固件和 ICI 线缆元数据的必要详细信息。

    +

    对于每个 ICI 链路，将根据建模值和一组预定义阈值持续检查电缆连接和相关链路质量。任何检测到的症状都会按其严重程度进行排序，症状严重时，healthd 会通知 Borg 驱逐并重新安排受影响的作业。

    +

    预检

    +

    每个用户作业前都会进行预检，以确保硬件健康。我们目前有两种不同的检查器：端到端检查器通过运行一个小型样本工作负载来验证 TPU 硬件，而意图驱动检查器则根据一组 “符合规格 ”的黄金阈值来验证物理级硬件指标。前者广泛覆盖硬件和软件组件，包括与底层芯片和 ICI 交互的 TPU 驱动程序、固件和 libtpunet；后者可检测不太明显的问题，如不达标的链路质量指标。如果预检查失败，borglet 会向 Borg Prime 指示应重新安排任务。

    +

    在线 ICI 链路修复

    +

    对于 TPUv4，可在线进行 ICI 链路修复，在链路两端自动协调，以便可靠地验证恢复情况。两个端点可以跨越两台不同的机器，或一台机器和一台 OCS 交换机。Pod 管理器通过 ICI 链路耗尽来协调所有 ICI 网络维护。虽然 TPU 计算资源不会受到影响（也就是说，只要不使用损坏的 ICI，作业仍可在 TPU 机器上执行），但 ICI 链接耗尽时，用户应用程序将自动被排除在外。

    `;export{i as assetURLs,b as default,T as metadata,U as toc}; diff --git a/zh-cn/assets/index-d4dfb508.js b/zh-cn/assets/index-778a40a0.js similarity index 97% rename from zh-cn/assets/index-d4dfb508.js rename to zh-cn/assets/index-778a40a0.js index c3823f7..2375385 100644 --- a/zh-cn/assets/index-d4dfb508.js +++ b/zh-cn/assets/index-778a40a0.js @@ -1,4 +1,4 @@ -const o="/zh-cn/assets/cover-85e5394f.jpg",e="/zh-cn/assets/image1-ec71eac6.webp",t=[o,e],l={label:"一封来自 DatenLord 关于GSoC 2024的挑战书",description:"Google Summer of Code 是一项全球性的在线计划，致力于将新的contributor引入开源软件开发领域。GSoC 参与者在导师的指导下，与开源组织合作开展为期 12 周以上的编程项目。今年，达坦科技入选作为开源社区组织，携CNCF Sandbox项目Xline下众多有趣、创新且有挑战性的题目参与本次活动。",cover:"./cover.jpg",location:"中国香港",date:"2024-02-29",title:"A Challenge Letter from DatenLord on GSoC 2024"},r=[{label:"为什么要参加 GSoC？",level:2},{label:"期待开源爱好者参与的项目",level:2},{label:"参与指南",level:2},{label:"活动重要时间点",level:2},{label:"联系方式",level:2}],s=`

    图片

    +const o="/zh-cn/assets/cover-85e5394f.jpg",e="/zh-cn/assets/image1-ec71eac6.webp",t=[o,e],l={label:"一封来自 DatenLord 关于GSoC 2024的挑战书",description:"Google Summer of Code 是一项全球性的在线计划，致力于将新的contributor引入开源软件开发领域。GSoC 参与者在导师的指导下，与开源组织合作开展为期 12 周以上的编程项目。今年，达坦科技入选作为开源社区组织，携CNCF Sandbox项目Xline下众多有趣、创新且有挑战性的题目参与本次活动。",cover:"./cover.jpg",location:"中国香港",date:"2024-02-29",title:"A Challenge Letter from DatenLord on GSoC 2024"},r=[{label:"为什么要参加 GSoC？",level:2},{label:"期待开源爱好者参与的项目",level:2},{label:"参与指南",level:2},{label:"活动重要时间点",level:2},{label:"联系方式",level:2}],i=`

    图片

    Google Summer of Code 是一项全球性的在线计划，致力于将新的 contributor 引入开源软件开发领域。GSoC 参与者在导师的指导下，与开源组织合作开展为期 12 周以上的编程项目。今年，达坦科技入选作为开源社区组织，携 CNCF Sandbox 项目 Xline 下众多有趣、创新且有挑战性的题目参与本次活动。
    https://summerofcode.withgoogle.com/programs/2024/organizations/datenlord-6z

    期待志同道合的，敢于挑战自我的小伙伴积极加入我们～

    @@ -57,4 +57,4 @@ GSoC 初步结果公示

    对于报名方式有任何疑问，或者对某一个项目非常感兴趣，并且想要深入了解的同学，欢迎加入 Xline Discord 进行提问或与项目导师进行进一步沟通：
    https://discord.com/invite/hqDRtYkWzm

    您也可以扫码添加小助手微信，或发邮件至info@datenlord.com 进行咨询。

    -

    图片

    `;export{t as assetURLs,s as default,l as metadata,r as toc}; +

    图片

    `;export{t as assetURLs,i as default,l as metadata,r as toc}; diff --git a/zh-cn/assets/index-75e09dc1.js b/zh-cn/assets/index-7e0a1d2c.js similarity index 94% rename from zh-cn/assets/index-75e09dc1.js rename to zh-cn/assets/index-7e0a1d2c.js index eb15614..ec6d1be 100644 --- a/zh-cn/assets/index-75e09dc1.js +++ b/zh-cn/assets/index-7e0a1d2c.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/cover-b206ef91.jpg",t="/zh-cn/assets/image1-e0f43926.jpg",a="/zh-cn/assets/image2-d20c4e0b.jpg",e="/zh-cn/assets/image1-50beaba8.png",o=[l,t,a,e],i={label:"2023 hackathon攻略新鲜出炉！最后一周还不速来报名！",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",cover:"./cover.jpg",location:"中国香港",date:"2023-12-05",title:"Ding! 2023 hackathon tips fresh from the oven! Last week to sign up before it's too late!"},n=[{label:"Hackathon2023",level:2},{label:"大赛时间线",level:3},{label:"达坦科技 DatenLord 赛题",level:2},{label:"主题",level:3},{label:"背景介绍",level:3},{label:"赛题介绍",level:3},{label:"项目目标",level:3},{label:"项目假设",level:3},{label:"评估标准",level:3},{label:"注意事项",level:3}],s=`

    图片

    +const l="/zh-cn/assets/cover-b206ef91.jpg",t="/zh-cn/assets/image1-e0f43926.jpg",e="/zh-cn/assets/image2-d20c4e0b.jpg",a="/zh-cn/assets/image1-50beaba8.png",o=[l,t,e,a],i={label:"2023 hackathon攻略新鲜出炉！最后一周还不速来报名！",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",cover:"./cover.jpg",location:"中国香港",date:"2023-12-05",title:"Ding! 2023 hackathon tips fresh from the oven! Last week to sign up before it's too late!"},n=[{label:"Hackathon2023",level:2},{label:"大赛时间线",level:3},{label:"达坦科技 DatenLord 赛题",level:2},{label:"主题",level:3},{label:"背景介绍",level:3},{label:"赛题介绍",level:3},{label:"项目目标",level:3},{label:"项目假设",level:3},{label:"评估标准",level:3},{label:"注意事项",level:3}],r=`

    图片

    Hackathon2023

    DatenLord Hackathon 2023 正式启动！ 达坦科技基于其跨云分布式文件系统 DatenLord 项目，结合 AI 大模型时代背景，搭建了擂台，在此正式向您发出邀约！

    本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台 PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！

    @@ -50,7 +50,7 @@ const l="/zh-cn/assets/cover-b206ef91.jpg",t="/zh-cn/assets/image1-e0f43926.jpg" 报名链接：
    https://www.wjx.cn/vm/rm8zjUu.aspx#
    报名二维码：

    -

    图片

    +

    图片

    如有任何问题欢迎联系达坦科技微信小助手：DatenLord_Tech或发送邮件至 info@datenlord.com

    -

    图片

    `;export{o as assetURLs,s as default,i as metadata,n as toc}; +

    图片

    `;export{o as assetURLs,r as default,i as metadata,n as toc}; diff --git a/zh-cn/assets/index-d9f0be8c.js b/zh-cn/assets/index-821ce5ea.js similarity index 97% rename from zh-cn/assets/index-d9f0be8c.js rename to zh-cn/assets/index-821ce5ea.js index c8a184e..00460ae 100644 --- a/zh-cn/assets/index-d9f0be8c.js +++ b/zh-cn/assets/index-821ce5ea.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-6865ae02.png",l="/zh-cn/assets/image1-1421d5c3.png",t="/zh-cn/assets/image2-03115587.png",a="/zh-cn/assets/image3-8a8d1c33.png",i="/zh-cn/assets/image4-c1593056.png",s=[e,l,t,a,i],p={label:"Xline 源码解读（一） —— 初识 CURP 协议",description:"Xline 是一款开源的分布式 KV 存储引擎，其核心目的是实现高性能的跨数据中心强一致性，提供跨数据中心的meatdata 管理。那么 Xline 是怎么实现这种高性能的跨数据中心强一致性的呢？这篇文章就将带领大家一起来一探究竟。",cover:"./cover.png",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-07-13",title:"Interpretation of Xline source code (1)——Introduction to CURP protocol"},n=[{label:"Xline 是什么",level:2},{label:"Xline 的整体架构",level:2},{label:"CURP 协议简介",level:2},{label:"CURP 是什么？",level:3},{label:"为什么选择 CURP 协议",level:3},{label:"fast path 与 slow path",level:3},{label:"Summary",level:2}],r=`

    封面

    +const e="/zh-cn/assets/cover-6865ae02.png",l="/zh-cn/assets/image1-1421d5c3.png",t="/zh-cn/assets/image2-03115587.png",i="/zh-cn/assets/image3-8a8d1c33.png",a="/zh-cn/assets/image4-c1593056.png",n=[e,l,t,i,a],s={label:"Xline 源码解读（一） —— 初识 CURP 协议",description:"Xline 是一款开源的分布式 KV 存储引擎，其核心目的是实现高性能的跨数据中心强一致性，提供跨数据中心的meatdata 管理。那么 Xline 是怎么实现这种高性能的跨数据中心强一致性的呢？这篇文章就将带领大家一起来一探究竟。",cover:"./cover.png",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-07-13",title:"Interpretation of Xline source code (1)——Introduction to CURP protocol"},p=[{label:"Xline 是什么",level:2},{label:"Xline 的整体架构",level:2},{label:"CURP 协议简介",level:2},{label:"CURP 是什么？",level:3},{label:"为什么选择 CURP 协议",level:3},{label:"fast path 与 slow path",level:3},{label:"Summary",level:2}],r=`

    封面

    Xline 是什么

    Xline 是一款开源的分布式 KV 存储引擎，其核心目的是实现高性能的跨数据中心强一致性，提供跨数据中心的 meatdata 管理。那么 Xline 是怎么实现这种高性能的跨数据中心强一致性的呢？这篇文章就将带领大家一起来一探究竟。

    Xline 的整体架构

    @@ -30,7 +30,7 @@ const e="/zh-cn/assets/cover-6865ae02.png",l="/zh-cn/assets/image1-1421d5c3.png"
  • leader 统计所收到的成功响应的数量，如果超过集群节点数量的一半以上，则认为共识已达成，提案成功，否则认为提案失败，并将结果返回给 client。

    • 下图是 Multi-Paxos 协议达成共识的一个时序流程：

    -

    图片

    +

    图片

    在这个时序图中，我们可以了解到 Multi-Paxos 协议达成共识的流程：

    1. client 向 leader 发起一个提案请求。
      2. @@ -46,7 +46,7 @@ const e="/zh-cn/assets/cover-6865ae02.png",l="/zh-cn/assets/image1-1421d5c3.png"

      那读者可能就会有疑问了，这里面的冲突究竟指的是什么呢？让我们用简单的 KV 操作来举个例子。在分布式系统的节点上，我们对状态机所做的操作无非就是读和写，在考虑对状态机的并发操作的情况下，总共可以有读后读，读后写，写后读，写后写四种场景。显然，对于读后读这种无副作用的只读操作而言，任何情况下都不存在冲突，无论是先读还是后读，最终读出来的结果总是一致的。当操作不同的 Key 时，例如 PUT A=1， PUT B=2，那么对于状态机的最终状态而言，不论是先执行 PUT A=1，再执行 PUT B=2，还是反过来，最终从状态机上读出来的结果都是 A=1，B=2。读写混合的场景也是同理，因此当对状态机并发执行的多个操作之间的 key 不存在交集时，我们称这些操作都是无冲突的。反之，如果并发多个操作之间包含了至少一个写操作，同时其操作的 Key 存在交集，这些操作都是冲突的。

      fast path 与 slow path

      那么 CURP 是如何实现 fast path 和 slow path 的呢？下图是 CURP 算法中集群拓扑的一个简图

      -

      图片

      +

      图片

      让我们先来看看这张图中都有哪些内容：

      1. Client：向集群发起请求的 client。
        2. @@ -77,4 +77,4 @@ b. follower 接收到请求后，由于 z = 9 与 witness 中的 z = 7 相冲突

        Xline 是一款提供跨数据中心强一致性的分布式 KV 存储，其核心问题之一便是如何在跨数据中心这种高延迟的广域网环境中提供高性能的强一致性保证。传统的分布式共识算法，如 Raft 和 Multi-Paxos，通过让所有操作都满足持久化存储和有序性前提来保证状态机一致性。而 CURP 协议则是对达成共识的场景做了更细粒度的划分，将协议分割成了前端（fast path）和后端（slow path），前端只保证了提案会被持久化到集群当中，而后端不仅保证了持久化，也保证了所有保存了该提案的节点会按照相同的顺序执行命令，保证了状态机的一致性。

        关于 CURP 协议的简介就到这里，更多的细节欢迎参考我们的其他文章和分享，如下：
        Curp 共识协议的重新思考

        -

        DatenLord | Xline Geo-distributed KV Storage

        `;export{s as assetURLs,r as default,p as metadata,n as toc}; +

        DatenLord | Xline Geo-distributed KV Storage

        `;export{n as assetURLs,r as default,s as metadata,p as toc}; diff --git a/zh-cn/assets/index-1ea2a101.js b/zh-cn/assets/index-85fa6207.js similarity index 96% rename from zh-cn/assets/index-1ea2a101.js rename to zh-cn/assets/index-85fa6207.js index 3ea9a0f..0272c47 100644 --- a/zh-cn/assets/index-1ea2a101.js +++ b/zh-cn/assets/index-85fa6207.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png",p="/zh-cn/assets/image3-204919ac.png",l="/zh-cn/assets/image4-e50f112d.png",t="/zh-cn/assets/image5-cdb8d1de.png",i=[e,a,p,l,t],o={label:"数据库隔离级别及MVCC",description:"数据库在同时处理多个事务时需要决定事务之间能否看到对方的修改，能看到多少等等。根据隔离的严格程度，从严到松可以分为 Serializable, Repeatable reads, Read committed, Read uncommitted。我们用下面这个 KV 存储的例子来解释这四个隔离级别。KV 存储的初始状态如下：",location:"中国香港",tags:["Xline"],date:"2023-02-16",title:"Database isolation level and MVCC"},n=[{label:"数据库隔离级别介绍",level:2},{label:"Read uncommitted",level:3},{label:"Repeatable read",level:3},{label:"Serializable",level:3},{label:"Snapshot 隔离级别及 MVCC",level:2},{label:"一点联想",level:2},{label:"总结",level:2}],s=`

        数据库隔离级别介绍

        +const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png",t="/zh-cn/assets/image3-204919ac.png",l="/zh-cn/assets/image4-e50f112d.png",p="/zh-cn/assets/image5-cdb8d1de.png",i=[e,a,t,l,p],n={label:"数据库隔离级别及MVCC",description:"数据库在同时处理多个事务时需要决定事务之间能否看到对方的修改，能看到多少等等。根据隔离的严格程度，从严到松可以分为 Serializable, Repeatable reads, Read committed, Read uncommitted。我们用下面这个 KV 存储的例子来解释这四个隔离级别。KV 存储的初始状态如下：",location:"中国香港",tags:["Xline"],date:"2023-02-16",title:"Database isolation level and MVCC"},o=[{label:"数据库隔离级别介绍",level:2},{label:"Read uncommitted",level:3},{label:"Repeatable read",level:3},{label:"Serializable",level:3},{label:"Snapshot 隔离级别及 MVCC",level:2},{label:"一点联想",level:2},{label:"总结",level:2}],s=`

        数据库隔离级别介绍

        数据库在同时处理多个事务时需要决定事务之间能否看到对方的修改，能看到多少等等。根据隔离的严格程度，从严到松可以分为 Serializable, Repeatable reads, Read committed, Read uncommitted。我们用下面这个 KV 存储的例子来解释这四个隔离级别。KV 存储的初始状态如下：

        Table 1:

        图片

        @@ -8,7 +8,7 @@ const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png

        图片

        在 Read uncommitted 的隔离级别中，多个同时执行的事务是能够互相看到互相没有 commit 的写操作，因此可以认为这种隔离级别几乎没有作用。在上述例子中，Operation 2 读到的内容是 “AA”，Operation 4 读到的内容则是“DD”，即使第二个事务最终 Rollback 了。Read committed 有两个事务同时被执行，自上而下是执行顺序。

        Table 3:

        -

        图片

        +

        图片

        在 Read committed 的隔离级别中，只有被 Commit 后的结果可以被看到，因此在 Table 2 的执行顺序中，Operation 2 和 4 都能够读取到 “AA” 的值，即 Key 1 的值没有改变。如果按照 Table 3 中的情况执行两个事务，Operation 2 读到的值为 “AA”，Operation 5 读到的值为 “DD”，因为此时事务 2 已经执行成功。

        Repeatable read

        如果在 Table 3 中的事务 1 两次连续读操作，用户想要保证读到相同的值，那就需要使用 repeatable read 隔离级别。在这个隔离级别中，在同一个事务中对同一条数据的多次读取保证会得到相同的值，即使这个过程中该数据被其他已经提交的事务修改掉。当然该隔离级别也有一些情况无法保证隔离性，比如下列情况：

        @@ -20,7 +20,7 @@ const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png

        Snapshot 隔离级别及 MVCC

        想要区分最严格的 Serializable 和 Snapshot，我们还是从例子来看，看下列两个事务的操作：

        Table 5:

        -

        图片

        +

        图片

        如果按照严格的 Serializable 的隔离级别，无论 Transaction 1 和 2 哪个先执行，最终 Key 1 和 2 的值都是相同的，有可能是 “AA”， 也有可能是 “BB”。但是在 Snapshot 的级别下执行，执行结果则是 Key 1 和 2 的值进行互换。很明显在这种情况下 Snapshot 的隔离能力明显更弱。Isolation 对于存在读写交集的事务的先后顺序无能为力，只能保证存在写冲突的事务间的先后顺序。

        上述例子中，我们虽然具体地看了 Snapshot 隔离级别和 Serializable 之间的差异，但是我们还没有完整介绍过 Snapshot 的特性：

          @@ -43,4 +43,4 @@ const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png

          本文为大家介绍了数据库的四种隔离级别，分别用例子介绍了不同隔离级别之间的区别。然后详细介绍了 Snapshot 这个使用最广泛的隔离级别，并且说明了其最长用的实现方式 MVCC。最后结合了 MVCC 和 无锁数据结构的内存管理机制进行了对比和探讨。

          达坦科技 Xline 项目专注于跨云元数据管理 KV 存储，并且目前正在实践应用 MVCC 做数据库隔离。如果您想了解更多相关信息，请参考 Xline GitHub 链接：
          https://github.com/datenlord/Xline

          -

          本周次条是 Xline 最新版本的发布，请阅读《Xline v.0.2.0：一个用于元数据管理的分布式 KV 存储》。

          `;export{i as assetURLs,s as default,o as metadata,n as toc}; +

          本周次条是 Xline 最新版本的发布，请阅读《Xline v.0.2.0：一个用于元数据管理的分布式 KV 存储》。

          `;export{i as assetURLs,s as default,n as metadata,o as toc}; diff --git a/zh-cn/assets/index-dfd283a0.js b/zh-cn/assets/index-8cb22688.js similarity index 95% rename from zh-cn/assets/index-dfd283a0.js rename to zh-cn/assets/index-8cb22688.js index 3bca56e..067cc07 100644 --- a/zh-cn/assets/index-dfd283a0.js +++ b/zh-cn/assets/index-8cb22688.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/image1-50beaba8.png",a=[l],n={label:"2023年SpinalHDL应用前景探索线上研讨会----征集演讲嘉宾",description:"SpinalHDL是一种开源的高级硬件描述语言，它可以作为VHDL或Verilog的替代，Charles Papon 在2014年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于Scala的DSL，能够借助现有的Scala语言特性和开发工具提供强大、易用、高效的硬件设计能力。",location:"中国香港",date:"2023-11-09",title:"Exploring the Future of SpinalHDL Applications in 2023 Online Workshop"},p=[{label:"SpinalHDL 是什么？",level:2},{label:"达坦科技是谁？",level:2},{label:"为什么达坦科技要推广 SpinalHDL?",level:2},{label:"Call For Presenter",level:2}],i=`

          SpinalHDL 是什么？

          +const l="/zh-cn/assets/image1-50beaba8.png",a=[l],n={label:"2023年SpinalHDL应用前景探索线上研讨会----征集演讲嘉宾",description:"SpinalHDL是一种开源的高级硬件描述语言，它可以作为VHDL或Verilog的替代，Charles Papon 在2014年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于Scala的DSL，能够借助现有的Scala语言特性和开发工具提供强大、易用、高效的硬件设计能力。",location:"中国香港",date:"2023-11-09",title:"Exploring the Future of SpinalHDL Applications in 2023 Online Workshop"},i=[{label:"SpinalHDL 是什么？",level:2},{label:"达坦科技是谁？",level:2},{label:"为什么达坦科技要推广 SpinalHDL?",level:2},{label:"Call For Presenter",level:2}],p=`

          SpinalHDL 是什么？

          SpinalHDL 是一种开源的高级硬件描述语言，它可以作为 VHDL 或 Verilog 的替代，Charles Papon 在 2014 年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于 Scala 的 DSL，能够借助现有的 Scala 语言特性和开发工具提供强大、易用、高效的硬件设计能力。

          达坦科技是谁？

          达坦科技（DatenLord）致力于打造高性能跨云存储，其通过软硬件深度融合的方式打破云之间的壁垒，实现高性能跨云数据访问，提供海量异地、异构数据的统一存储访问机制，为云上应用提供高性能安全存储支持。

          @@ -18,4 +18,4 @@ const l="/zh-cn/assets/image1-50beaba8.png",a=[l],n={label:"2023年SpinalHDL应

          如您有意向社区，以及 SpinalHDL 的爱好者做分享，请于 2023 年 11 月 30 日之前，直接将姓名（或 GitHub 昵称）+ 议题摘要提交至以下 GitHub 链接：
          https://github.com/SpinalHDL/SpinalHDL/discussions/1235

          图片

          -

          对开源硬件感兴趣的朋友可以添加达坦科技小助手微信加入达坦科技硬件群。

          `;export{a as assetURLs,i as default,n as metadata,p as toc}; +

          对开源硬件感兴趣的朋友可以添加达坦科技小助手微信加入达坦科技硬件群。

          `;export{a as assetURLs,p as default,n as metadata,i as toc}; diff --git a/zh-cn/assets/index-8cea61b2.js b/zh-cn/assets/index-8cea61b2.js new file mode 100644 index 0000000..8c44982 --- /dev/null +++ b/zh-cn/assets/index-8cea61b2.js @@ -0,0 +1,48 @@ +const p="/zh-cn/assets/cover-b2241eaf.png",e=[p],t={label:"Xline v0.7.0： 一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。Curp 协议可以在命令不冲突的情况下减少一个RTT，从而提高性能。Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。",location:"新疆",cover:"./image.png",author:["达坦科技"],date:"2024-08-29",title:"Xline v 0.7.0 A Distributed KV Store for Metadata Management"},a=[],o=`

          图片 +Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

          +

          但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

          +

          V0.7.0版本有什么新功能？

          +

          v0.7.0新版本修复问题以及重构如下：

          +

          ⭐ 新功能

          +

          [Feature]CURP WAL (Write-Ahead-Log) 实现：我们设计了一个 Write-Ahead-Log 来保存 curp 的日志条目。

          +

          [Feature]重复数据删除：使用RIFL论文中的exactly-once语义实现命令重复数据删除。

          +

          [Feature]：快照恢复 #630

          +

          [Feature]：维护服务器接口#543

          +

          [Feature]：支持使用 tls 运行 #328

          +

          🛠️ 重构

          +

          [Refactor]：为自动更新lock lease添加会话结构#684

          +

          [Refactor]：启动流程#629

          +

          [Refactor]：重构speculative pool的GC #439

          +

          [Refactor]：新的命令执行逻辑：我们删除了cmd workers和相关的命令执行逻辑。现在，Xline 将使用串行执行（通过批处理）来防止锁争用。

          +

          [Refactor]：Garbage Collection：我们在dedup实现的基础上重构了garbage collection logic。

          +

          [Refactor]：客户端Proposal优化：我们重构了 curp 客户端，以使用 gRPC 流向集群发送提议。这降低了 gRPC 服务器的负载并提高了整体性能。

          +

          [Refactor]：冲突检测：我们删除了冲突检查的 mpmc。现在Xline将使用conflict pools（speculative pool和uncommitted pool）来检测命令冲突。

          +

          [Refactor]：Read Index：我们实现了 Raft 论文中的 Read Index 机制，用于只读命令。替换了之前的读取状态实现。

          +

          [Refactor]：xline-client 重构：我们为 xline-client crate 切换到更直观的用户界面。

          +

          [Refactor]：各种性能优化

          +

          🪲 错误修复

          +

          [Bug]：实现 ReadIndex #870

          +

          [etcdapi] [Bug]：重复revision #848

          +

          [Bug]：测试用例 curp::it server::shutdown_rpc_should_shutdown_the_cluster 失败 #774

          +

          [Bug]：Xline 在使用watch功能时会丢失事件#677

          +

          [Bug]：xlinectl 不会续订锁定密钥的lease #664

          +

          [Bug]：无法将新成员node4添加到三节点xline集群#661

          +

          [Refactor]：revision生成期间的只读命令#502

          +

          [Bug]：在读取状态期间执行时读取不同的值#501

          +

          [Bug]：sync txn 请求未按照子请求的顺序执行 #498

          +

          [Bug]：读取状态#497

          +

          [Bug]：revision生成#491、#848

          +

          [Bug]：单个 txn 中的请求不按顺序执行 #471

          +

          [Bug]：raw_curp中的batch_index最终会溢出#368

          +

          [Bug]：修复 GC 可能会破坏 CURP 持久性的问题 #159

          +

          ✍️已知问题

          +

          在基准测试期间，如果集群处于高负载下，集群有时可能会由于重复数据删除机制而无法取得进展。

          +

          💥 重大变化

          +

          etcd 兼容 API 现在将使用 2-RTT 操作来防止revision生成问题。

          +

          ❤️ 贡献者

          +

          我们要感谢所有参与此版本发布的贡献者！

          +

          @themanforfree

          +

          @iGxnon

          +

          @Phoenix500526

          +

          @bsbds

          +

          相关链接

          `;export{e as assetURLs,o as default,t as metadata,a as toc}; diff --git a/zh-cn/assets/index-bccae718.js b/zh-cn/assets/index-96aee43d.js similarity index 98% rename from zh-cn/assets/index-bccae718.js rename to zh-cn/assets/index-96aee43d.js index b0e677f..750a395 100644 --- a/zh-cn/assets/index-bccae718.js +++ b/zh-cn/assets/index-96aee43d.js @@ -1,4 +1,4 @@ -const p="/zh-cn/assets/image1-f1a8209b.jpg",o="/zh-cn/assets/image2-f5de5635.jpg",t=[p,o],l={label:"喷泉码浅谈",description:"喷泉码（Fountain Code）是一种在无线通信、数据传输和网络编码领域中使用的错误纠正技术。它与传统的纠错码和编码方法有所不同，喷泉码被设计用于在不确定信道条件下的高效数据传输。",location:"新疆",author:["施继成"],tags:["RDMA"],date:"2023-08-31",title:"Fountain Code"},a=[{label:"喷泉码简介",level:2},{label:"LT 编码",level:2},{label:"Raptor 算法",level:2},{label:"总结",level:2}],r=`

          喷泉码简介

          +const p="/zh-cn/assets/image1-f1a8209b.jpg",o="/zh-cn/assets/image2-f5de5635.jpg",t=[p,o],l={label:"喷泉码浅谈",description:"喷泉码（Fountain Code）是一种在无线通信、数据传输和网络编码领域中使用的错误纠正技术。它与传统的纠错码和编码方法有所不同，喷泉码被设计用于在不确定信道条件下的高效数据传输。",location:"新疆",author:["施继成"],tags:["RDMA"],date:"2023-08-31",title:"Fountain Code"},a=[{label:"喷泉码简介",level:2},{label:"LT 编码",level:2},{label:"Raptor 算法",level:2},{label:"总结",level:2}],i=`

          喷泉码简介

          **喷泉码（Fountain Code）**是一种在无线通信、数据传输和网络编码领域中使用的错误纠正技术。它与传统的纠错码和编码方法有所不同，喷泉码被设计用于在不确定信道条件下的高效数据传输。

          传统的纠错码（如海明码、RS 码等）通常需要在发送方对数据进行编码，接收方则使用相同的编码进行解码和纠错。这些方法一般具有固定的码率（Code Rate），即针对一定长度的原始数据，编码后的长度是固定的，这些方法在面对不稳定的信道或严重的信道丢失时可能效果不佳。相比之下，喷泉码通过在发送方生成随机的冗余数据，然后将其注入到原始数据中，以创造出一个“喷泉”流——相应的码率也也就不固定了。接收方可以从这个流中采样任意数量的数据包，并将它们合并以恢复原始数据。

          喷泉码的一种常见应用是在无线传感器网络中，其中网络节点之间的通信可能受到弱信号、干扰和多径传播等因素的影响。通过使用喷泉码，节点可以在较差的通信条件下实现可靠的数据传输。

          @@ -37,4 +37,4 @@ const p="/zh-cn/assets/image1-f1a8209b.jpg",o="/zh-cn/assets/image2-f5de5635.jpg

          针对 Raptor 编码的解码方式一般有两种。第一种和编码方式完全相反，首先利用 LT 编码的解码方式恢复出部分的中间编码块，然后利用固定编码的解码方式恢复出原始的数据块。第二种方式则是将上述所有的多层编码方式都变成一种矩阵运算，针对收到数据后利用矩阵的高斯消元方法解出原始的数据块。

          现有为人所熟知的 Raptor 编码主要有 RFC 5053 和 RFC 6330 RaptorQ 编码。两者的实现细节有诸多区别，但是内在的思路和上述的方法是类似的，有兴趣的读者可以进一步进行阅读和学习。

          总结

          -

          喷泉码是一种无固定码率的编码方式，其中比较著名的有 LT 编码和 Raptor 编码。LT 编码算法简单，实现也简单，但是算法效率不高。Raptor 算法结合了 LT 编码和一些固定码率编码，利用混合编码的方式实现了高效的喷泉码。

          `;export{t as assetURLs,r as default,l as metadata,a as toc}; +

          喷泉码是一种无固定码率的编码方式，其中比较著名的有 LT 编码和 Raptor 编码。LT 编码算法简单，实现也简单，但是算法效率不高。Raptor 算法结合了 LT 编码和一些固定码率编码，利用混合编码的方式实现了高效的喷泉码。

          `;export{t as assetURLs,i as default,l as metadata,a as toc}; diff --git a/zh-cn/assets/index-12e593c9.js b/zh-cn/assets/index-9a2c4ece.js similarity index 81% rename from zh-cn/assets/index-12e593c9.js rename to zh-cn/assets/index-9a2c4ece.js index 0402f08..8b67fc7 100644 --- a/zh-cn/assets/index-12e593c9.js +++ b/zh-cn/assets/index-9a2c4ece.js @@ -1,4 +1,4 @@ -const p="/zh-cn/assets/cover-39643179.png",e="/zh-cn/assets/image1-a93ba076.jpg",s="/zh-cn/assets/image2-4624885a.gif",a="/zh-cn/assets/image3-ea54df7e.jpg",t=[p,e,s,a],c={label:"直播预告 | RDMA软件接口高层封装",description:"RDMA 作为高速通信协议被数据中心广泛使用，但是因为底层接口设计得过于繁复，对使用者造成了很大的不便，因此我们使用 Rust 语言对 RDMA 进行了一层高层封装。这次分享将介绍这层封装的做法和原理。",cover:"./cover.png",location:"香港",date:"2022-05-17",title:"RDMA Software Interface High Level Package"},l=[{label:"嘉宾介绍",level:2},{label:"讨论内容",level:2},{label:"观看方式",level:2},{label:"特别鸣谢",level:2}],n=`

          嘉宾介绍

          +const s="/zh-cn/assets/cover-39643179.png",e="/zh-cn/assets/image1-a93ba076.jpg",t="/zh-cn/assets/image2-4624885a.gif",p="/zh-cn/assets/image3-ea54df7e.jpg",a=[s,e,t,p],l={label:"直播预告 | RDMA软件接口高层封装",description:"RDMA 作为高速通信协议被数据中心广泛使用，但是因为底层接口设计得过于繁复，对使用者造成了很大的不便，因此我们使用 Rust 语言对 RDMA 进行了一层高层封装。这次分享将介绍这层封装的做法和原理。",cover:"./cover.png",location:"香港",date:"2022-05-17",title:"RDMA Software Interface High Level Package"},c=[{label:"嘉宾介绍",level:2},{label:"讨论内容",level:2},{label:"观看方式",level:2},{label:"特别鸣谢",level:2}],o=`

          嘉宾介绍

          施继成

          达坦科技联合创始人兼 CTO，复旦大学软件工程本硕，师从华为基础软件首席科学家、鸿蒙实验室主任陈海波教授。擅长操作系统内核开发、分布式系统、嵌入式系统，对分布式数据一致性有钻深的研究，发表多篇操作系统内核相关论文，累计数百次引用。毕业后曾在谷歌中国、微软亚太和阿里巴巴等公司从事分布式计算和存储等相关工作。入选 2022 年度 6 氪 S 级创业者名册，荣获中国“企业工具与底层软件”领域 “36 位 36 岁以下创业者“称号。

          讨论内容

          @@ -13,8 +13,8 @@ const p="/zh-cn/assets/cover-39643179.png",e="/zh-cn/assets/image1-a93ba076.jpg"

          本次直播我们将在【腾讯会议】进行，欢迎大家观看，没时间观看直播的同学可以关注回放，会议结束后回放在阅码场官网上传，年卡阅码场会员和其他阅码场训练营专业群资深用户免费点播。

          图片

          特别鸣谢

          -

          图片

          +

          图片

          转发本文，文末留言提问、加群提问、或者现场提问，我们将赠送 1 本书，数量有限，送完为止。

          ↓ 扫码加入本次直播交流群；

          -

          图片

          -

          咨询的小伙伴，可添加小月@阅码场的微信 Linuxer2016 咨询

          `;export{t as assetURLs,n as default,c as metadata,l as toc}; +

          图片

          +

          咨询的小伙伴，可添加小月@阅码场的微信 Linuxer2016 咨询

          `;export{a as assetURLs,o as default,l as metadata,c as toc}; diff --git a/zh-cn/assets/index-9cd4971b.js b/zh-cn/assets/index-9cd4971b.js deleted file mode 100644 index 056e5a9..0000000 --- a/zh-cn/assets/index-9cd4971b.js +++ /dev/null @@ -1,82 +0,0 @@ -const e="/zh-cn/assets/cover-07c14bd5.jpg",s="/zh-cn/assets/image1-c15bea92.png",a=[e,s],n={label:"DatenLord | Xline Geo-distributed KV Storage",description:"随着分布式业务从单数据中心向多数据中心发展，多地多活部署的需求也越来越普遍。这带来最大的挑战就是跨数据中心跨地域的metadata管理，metadata对数据的稳定性和强一致性有极高要求。在单数据中心场景下，metadata的管理已经有很多成熟的解决方案，etcd就是其中的佼佼者，但是在多数据中心场景下，etcd的性能受Raft共识协议的限制，它的性能和稳定性都大打折扣。DatenLord作为高性能跨云跨数据中心的存储，对metadata管理有了跨云跨数据中心的要求。DatenLord目前使用etcd作为metadata的管理引擎，但是考虑到etcd无法完全满足DatenLord的跨云跨数据中心的场景，我们决定实现自己的metadata管理引擎。Xline应运而生，Xline是一个分布式的KV存储，用来管理少量的关键性数据，并在跨云跨数据中心的场景下仍然保证高性能和数据强一致性。考虑到兼容性问题，Xline会兼容etcd接口，让用户使用和迁移更加流畅。",cover:"./cover.jpg",location:"新加坡",author:["潘政"],tags:["Xline"],date:"2022-08-11",title:"DatenLord | Xline Geo distributed KV Storage"},o=[{label:"简介和背景",level:2},{label:"Xline 的架构",level:2},{label:"Xline 的核心：CURP 共识协议",level:2},{label:"Storage 和 Revision",level:2},{label:"CURP 共识协议带来的挑战",level:2},{label:"解决方案",level:2},{label:"总结",level:2},{label:"推荐阅读",level:2}],l=`

          图片

          -

          简介和背景

          -

          随着分布式业务从单数据中心向多数据中心发展，多地多活部署的需求也越来越普遍。这带来最大的挑战就是跨数据中心跨地域的 metadata 管理，metadata 对数据的稳定性和强一致性有极高要求。在单数据中心场景下，metadata 的管理已经有很多成熟的解决方案，etcd 就是其中的佼佼者，但是在多数据中心场景下，etcd 的性能受 Raft 共识协议的限制，它的性能和稳定性都大打折扣。DatenLord 作为高性能跨云跨数据中心的存储，对 metadata 管理有了跨云跨数据中心的要求。DatenLord 目前使用 etcd 作为 metadata 的管理引擎，但是考虑到 etcd 无法完全满足 DatenLord 的跨云跨数据中心的场景，我们决定实现自己的 metadata 管理引擎。Xline 应运而生，Xline 是一个分布式的 KV 存储，用来管理少量的关键性数据，并在跨云跨数据中心的场景下仍然保证高性能和数据强一致性。考虑到兼容性问题，Xline 会兼容 etcd 接口，让用户使用和迁移更加流畅。

          -

          Xline 的架构

          -

          图片

          -
            -
          • Xline 的架构主要分为 RPC server，KV server，其他 server，CURP 共识协议模块和 Storage 模块
            • -
          • RPC server：主要负责接受用户的请求并转发到相应的模块进行处理，并回复用户请求。
            • -
          • KV server 和其他 server：主要业务逻辑模块，如处理 KV 相关请求的 KV server，处理 watch 请求的 watch server 等。
            • -
          • CURP 共识协议模块: 采用 CURP 共识协议，负责对用户的请求进行仲裁，保证数据强一致性。
            • -
          • Storage：存储模块，存储了 key value 的相关信息。
            • -
          -

          一次写请求的操作流程如下：

          -
            -
          • RPC server 接收到用户写请求，确定是 KV 操作，将请求转发到 KV server。
            • -
          • KV server 做基本请求做验证，然后将请求封装为一个 proposal 提交给 CURP 模块。
            • -
          • CURP 模块执行 CURP 共识协议，当达成共识后，CURP 模块会调用 Storage 模块提供的 callback 将写操作持久化到 Storage 中。最后通知 KV server 写请求已经 commit。
            • -
          • KV server 得知请求已经被 commit，就会封装请求回复，并通过 RPC server 返回给用户。
            • -
          -

          Xline 的核心：CURP 共识协议

          -

          CURP 共识协议的细节介绍请参考 DatenLord ｜ Curp 共识协议的重新思考。CURP 协议的优势是将非冲突的 proposal 达成共识所需要的 RTT 从 2 个降为 1，对于冲突的 proposal 仍然需要两个 RTT，而 etcd 等主流分布式系统采用的 Raft 协议在任何情况下都需要两个 RTT。从两个 RTT 降为一个 RTT 所带来的性能提升在单数据中心场景下体现的并不明显，但是在多数据中心或者跨云场景下，RTT 一般在几十到几百 ms 的数量级上，这时一个 RTT 的性能提升则相当明显。

          -

          Storage 和 Revision

          -

          Xline 作为一个兼容 etcd 接口的分布式 KV 存储，etcd 重要的 revision 特性需要完全兼容。简单介绍一下 etcd 的 revision 特性，etcd 维护了一个全局单调递增的 64bit 的 revision，每当 etcd 存储的内容发生改变，revision 就会加一，也就是说每一次修改操作就会对应一个新的 revision，旧的 revision 不会立马删除，会按需延时回收。一个简单的例子，两个写操作 A -> 1，A -> 2，假设最初的 revision 是 1，etcd 会为 A = 1 生成 revision 2，为 A = 2 生成 revision 3。revision 的设计使 etcd 对外提供了更加丰富的功能，如支持历史 revision 的查找，如查询 revision 是 2 的时候 A 的值，通过比较 revision 可以得到修改的先后顺序等。以下是 etcd 对一个 KeyValue 的 proto 定义

          -
          message KeyValue {
-  bytes key = 1;
-  int64 create_revision = 2;
-  int64 mod_revision = 3;
-  int64 version = 4;
-  bytes value = 5;
-  int64 lease = 6;
-}
-
          -

          一个 KeyValue 关联了三个版本号，

          -
            -
          • create_revision: 该 key 被创建时的 revision
            • -
          • mod_revision：该 key 最后一次被修改时候的 revision
            • -
          • version：该 key 在最近一次被创建后经历了多少个版本，每一次修改 version 会加一
            • -
          -

          因为需要支持 revision 特性，Xline 的 Storage 模块参考了 etcd 的设计，分为 Index 和 DB 两个子模块。Index 模块存储的是一个 key 到其对应的所有 revision 数组的 mapping，因为需要支持范围查找，Index 采用了 BTreeMap，并会放在内存中。DB 模块存储的是从 revision 到真实 KeyValue 的 mapping，因为有持久化和存储大量的历史 revision 的数据的需求，DB 模块会将数据存到磁盘（目前 prototype 阶段 DB 仍然存在内存当中，在未来会对接持久化的 DB）。那么一次查找流程是先从 Index 中找到对应的 key，然后找到需要的 revision，再用 revision 作为 key 到 DB 中查找 KeyValue 从而拿到完整数据。这样的设计可以支持历史 revision 的存取，分离 Index 和 DB 可以将 Index 放在内存当中加速存取速度，并且可以利用 revision 的存储特性即每一次修改都会产生一个新的 revision 不会修改旧的 revision，可以方便 DB 实现高并发读写。

          -

          CURP 共识协议带来的挑战

          -

          CURP 协议的全称是 Consistent Unordered Replication Protocal。从名字可以看出 CURP 协议是不保证顺序的，什么意思呢？比如两条不冲突的 proposal，A -> 1，B-> 2，在 CURP 协议中，因为这两条 proposal 是不冲突的，所以它们可以并发乱序执行，核心思想是执行的顺序并不会影响各个 replica 状态机的最终状态，不会影响一致性。这也是 CURP 协议用一个 RTT 就可以达成共识的关键。但是对于冲突的 proposal，如 A -> 1, A -> 2，CURP 协议就需要一个额外的 RTT 来确定这两条 proposal 的执行顺序，否则在各个 replica 上 A 最终的值会不一样，一致性被打破。

          -

          解决方案

          -

          解决这个问题的思路是将达成共识和确定顺序即 revision 分成两个阶段，即通过一个 RTT 来达成共识，这时候就可以返回用户请求已经 commit，然后再通过一个异步的 RTT 来确定请求的 revision。这样既可以保证一个 RTT 就可以达成共识并返回给用户，又可以保证为每一个修改请求生成全局统一的 revision。确定 revision 用异步 batching 的方式来实现，这一个额外的 RTT 会平摊到一段时间内的所有请求上并不会影响系统的性能。

          -

          Storage 模块会实现如下两个 callback 接口供 CURP 模块调用，execute() 会在共识达成后调用，通知 proposal 可以执行了，after_sync() 会在 proposal 的顺序确定下来后再调用，以通知 proposal 的顺序，after_sync() 接口会按照确定好的 proposal 顺序依次调用。

          -
          /// Command executor which actually executes the command.
-/// It usually defined by the protocol user.
-#[async_trait]
-pub trait CommandExecutor<C>: Sync + Send + Clone + std::fmt::Debug
-where
-    C: Command,
-{
-    /// Execute the command
-    async fn execute(&self, cmd: &C) -> Result<C::ER, ExecuteError>;
-
-    /// Execute the after_sync callback
-    async fn after_sync(&self, cmd: &C, index: LogIndex) -> Result<C::ASR, ExecuteError>;
-}
-
          -

          为了配合 CURP 模块的两阶段操作，Storage 模块的设计如下：

          -
          /// KV store inner
-#[derive(Debug)]
-struct KvStoreInner {
-    /// Key Index
-    index: Index,
-    /// DB to store key value
-    db: DB,
-    /// Revision
-    revision: Mutex<i64>,
-    /// Speculative execution pool. Mapping from propose id to request
-    sp_exec_pool: Mutex<HashMap<ProposeId, Vec<Request>>>,
-}
-
          -

          当 execute() 回调被调用时，修改 Request 会被预执行并存到 sp_exec_pool 中，它存储了 ProposeId 到具体 Request 的 mapping，这个时候该操作的 revision 并没有确定，但是可以通知用户操作已经 commit，此时只需一个 RTT。当操作顺序被确定后，after_sync() 会被调用，Storage 模块会从 sp_exec_pool 找到对应的 Request 并将它持久化，并把全局 revision 加 1 作为该操作的 revision。

          -

          接下来我们用一次写请求 A -> 1 和一次读请求 Read A 来讲解整个流程。假设当前的 revision 是

          -
            -
          1. 当 KV server 请求收到写请求，它会生成一个 proposal 发给 CURP 模块，CURP 模块通过一个 RTT 达成共识后会调用 execute() callback 接口，Storage 模块会将该请求放到 sp_exec_pool 中，这时候 CURP 模块会通知 KV server 请求已经 commit，KV server 就会返回给用户说操作已完成。同时 CURP 会异步的用一个额外的 RTT 来确定该写请求的顺序后调用 after_sync() callback 接口，Storage 会把全局 revision 加 1，然后从 sp_exec_pool 中讲写请求读出来并绑定 revision
            2. -
          2. 然后更新 Index 并持久化到 DB 当中，这时候 DB 存储的内容是 revision 2：{key: A, value：1, create_revision: 2, mod_revision: 2, version: 1}。当读请求到达时，就可以从 Storage 模块中读到 A = 1，并且 create_revision = 2，mod_revision = 2。
            3. -
          -

          总结

          -

          本文主要介绍了 Geo-distributed KV Storage Xline 的架构设计，以及为了兼容 etcd 的 revision 特性，我们对 CURP 共识协议和 Storage 模块做的设计，从而实现了在跨数据中心跨地域场景下的高性能分布式 KV 存储。详细代码请参考https://github.com/datenlord/Xline，欢迎大家来讨论。

          -

          推荐阅读

          -

          Etcd 客户端缓存实践

          `;export{a as assetURLs,l as default,n as metadata,o as toc}; diff --git a/zh-cn/assets/index-9e32b6fa.js b/zh-cn/assets/index-9e32b6fa.js new file mode 100644 index 0000000..74b2d24 --- /dev/null +++ b/zh-cn/assets/index-9e32b6fa.js @@ -0,0 +1,23 @@ +const t="/zh-cn/assets/cover-5856255d.png",o="/zh-cn/assets/image1-a156153e.png",s="/zh-cn/assets/image2-b0a4a464.png",n="/zh-cn/assets/image3-bf4f8777.png",r="/zh-cn/assets/image-d0c27c17.png",e=[t,o,s,n,r],a={label:"2024 RISC-V中国峰会同期活动预告 l 硬件敏捷开发与验证方法学研讨会",description:"2024 RISC-V 中国峰会将于8月19日至25日在杭州黄龙饭店隆重举行。峰会采用“主会议+技术研讨会+展览展示+同期活动”的创新形式，将有超过20场同期活动在8月19日至25日期间同步进行。RISC-V 中国峰会至今已成功举办四届，现已成为中国大陆规格最高、规模最大、影响力最强的专业会议之一。作为本届RISC-V中国峰会的同期活动，8月22日上午，达坦科技将举办第三届硬件敏捷开发与验证方法学研讨会。",cover:"./cover.png",location:"新疆",date:"2024-08-16",title:"RISC V China Summit Simultaneous Event Preview l Hardware Agile Development and Verification Methodology Seminar"},g=[{label:"活动信息",level:2}],i=`

          图片 +2024 RISC-V中国峰会 +2024 RISC-V 中国峰会将于8月19日至25日在杭州黄龙饭店隆重举行。峰会采用“主会议+技术研讨会+展览展示+同期活动”的创新形式，将有超过20场同期活动在8月19日至25日期间同步进行。 +RISC-V 中国峰会至今已成功举办四届，现已成为中国大陆规格最高、规模最大、影响力最强的专业会议之一。作为本届RISC-V中国峰会的同期活动，8月22日上午，达坦科技将举办第三届硬件敏捷开发与验证方法学研讨会。 +在数字化转型浪潮的推动下，数字芯片作为信息技术的核心载体，其设计与验证的复杂度与日俱增，市场竞争亦趋于白热化。面对这一挑战，如何有效提升数字芯片的开发与验证效率，成为了摆在整个行业面前的重大课题。传统基于Verilog、SystemVerilog、VHDL及UVM的设计与验证方法虽已根深蒂固，但面对新时代的需求，其局限性日益凸显。

          +

          近年来，一股新兴力量正悄然改变着这一现状——以Chisel、SpinalHDL为代表的新一代硬件描述语言（HDL）以及Cocotb、pyuvm等新一代验证框架的崛起，为数字芯片的设计与验证领域注入了新的活力。这些新兴技术不仅在语法表达、代码简洁性及错误检查等方面展现出显著优势，更重要的是，它们为硬件敏捷设计与验证开辟了全新的路径，为业界带来了前所未有的灵活性和效率提升。

          +

          为了深入探讨这一领域的最新进展，促进技术交流与创新，本次研讨会特邀来自顶尖学术机构与科研前沿的几位专家，共同分享他们在硬件敏捷设计与验证方面的实践经验与前沿思考 +图片

          +

          活动信息

          +

          活动时间： 2024年8月22日，上午9:30-11:45

          +

          活动地点：杭州黄龙饭店 珍珠厅1

          +

          观众报名链接： +图片 +第二届硬件敏捷开发与方法学研讨会 l 2023 RISC-V中国峰会同期活动顺利举办 +图片 +达坦科技始终致力于打造高性能 Al+ Cloud 基础设施平台，积极推动 AI 应用的落地。达坦科技通过软硬件深度融合的方式，提供高性能存储和高性能网络。为 AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对 AI+Cloud 的需求。

          +

          公众号： 达坦科技DatenLord

          +

          DatenLord官网： https://datenlord.github.io/zh-cn/

          +

          知乎账号： https://www.zhihu.com/org/da-tan-ke-ji

          +

          B站： https://space.bilibili.com/2017027518

          +

          邮箱： info@datenlord.com

          +

          如果您有兴趣加入达坦科技Rust前沿技术交流群或硬件相关的群 ，请添加小助手微信：DatenLord_Tech +图片

          `;export{e as assetURLs,i as default,a as metadata,g as toc}; diff --git a/zh-cn/assets/index-9ef15c87.js b/zh-cn/assets/index-9ef15c87.js new file mode 100644 index 0000000..71ffb21 --- /dev/null +++ b/zh-cn/assets/index-9ef15c87.js @@ -0,0 +1,91 @@ +const p="/zh-cn/assets/image3-e7a83351.png",e="/zh-cn/assets/image1-6caf9701.png",l="/zh-cn/assets/image2-d15c91e1.png",t="/zh-cn/assets/image4-d81e7808.png",s="/zh-cn/assets/image5-e5e2653f.png",a="/zh-cn/assets/image6-a1ac5aed.png",n="/zh-cn/assets/image7-638b9fb3.png",c="/zh-cn/assets/image8-2ec67807.png",i="/zh-cn/assets/image9-19a1cf33.png",g="/zh-cn/assets/image10-0e887e18.png",h="/zh-cn/assets/image-3a1a0ef6.png",C=[p,e,l,t,s,a,n,c,i,g,h],o={label:"【转发】GLCC学生报名延期！速来抢位！",description:"达坦科技此次参与GitLink“确实开源”编程夏令营(GLCC)，我们的开源项目题目为：为开源RDMA网卡编写测试工具。课题简介：为了对RDMA网卡进行功能测试，需要在line-rate的条件下创建出数据包乱序、丢包、重复等情况。目前已有的解决方案大多需要昂贵的P4交换机来实现。本项目要求使用HDL语言在FPGA上实现指定模式的数据包收发功能。",cover:"./image3.png",location:"中国香港",date:"2024-06-27",title:"GLCC Student Registration Extended! Hurry Up and Secure Your Spot!"},r=[{label:"报名方式",level:2},{label:"关于GLCC",level:2},{label:"为什么加入GLCC",level:2},{label:"01深入开源实践",level:3},{label:"02灵活远程实习",level:3},{label:"03导师一对一指导",level:3},{label:"04拓宽人脉网络",level:3},{label:"05丰厚奖励与认证",level:3},{label:"06名企实习机会",level:3},{label:"参与社区",level:2},{label:"GLCC学生时刻表",level:2},{label:"高校学生如何参与",level:2},{label:"01报名时间：",level:3},{label:"02申请步骤：",level:3},{label:"03注意事项：",level:3},{label:"04学生申请指南：",level:3},{label:"协同举办体系",level:2}],d=`

          达坦科技始终致力于打造高性能 Al+ Cloud 基础设施平台，积极推动 AI 应用的落地。达坦科技通过软硬件深度融合的方式，提供高性能存储和高性能网络。为 AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对 AI+Cloud 的需求。

          +

          达坦科技此次参与GitLink“确实开源”编程夏令营(GLCC)，我们的开源项目题目为：为开源RDMA网卡编写测试工具。

          +

          课题简介：为了对RDMA网卡进行功能测试，需要在line-rate的条件下创建出数据包乱序、丢包、重复等情况。目前已有的解决方案大多需要昂贵的P4交换机来实现。本项目要求使用HDL语言在FPGA上实现指定模式的数据包收发功能。

          +

          课题链接：https://www.gitlink.org.cn/datenlord/open-rdma/issues/1

          +

          导师信息：米明恒

          +

          联络方式：mingheng.mi@datenlord.com

          +

          图片

          +

          报名方式

          +

          现在，让我们再来复习一下报名的细节：

          +

          报名截止时间：

          +

          2024年7月4日17:00，别错过哦！

          +

          报名方式：

          +

          1.登录GLCC官网（GitLink确实开源）查看课题列表：

          +

          https://www.gitlink.org.cn/GLCC

          +
            +
          1. +

            点击最下方【阅读原文】即可跳转官网

            +
            2. +
          2. +

            扫码进入官网报名 +图片

            +
            3. +
          +

          关于GLCC

          +

          第三届GitLink“确实开源”编程夏令营（GLCC）是由中国计算机学会（CCF）主办，CCF 开源发展委员会与之江实验室承办的面向全国高校学生的暑期编程活动。GLCC致力于激励青年学子通过参与真实的开源软件开发实践，锤炼自身技术实力，为开源社区注入新鲜血液，共同推动国内开源社区的蓬勃发展。 +图片 +第三届GLCC将于活动官网（GitLink |确实开源）和公众号（CCF 开源发展委员会）陆续发布入选课题介绍，敬请期待！ +图片 +扫码关注公众号获取GLCC最新内容

          +

          为什么加入GLCC

          +

          01深入开源实践

          +

          直接投身开源项目，深入了解社区运作，提升代码编写与协作能力。

          +

          02灵活远程实习

          +

          提供远程实习机会，让你能自由安排工作时间，兼顾学业与职业发展。

          +

          03导师一对一指导

          +

          每位学生配备资深导师，全程一对一指导支持和经验分享。

          +

          04拓宽人脉网络

          +

          与志同道合的伙伴以及开源社区技术大咖深入交流，拓宽职业视野。

          +

          05丰厚奖励与认证

          +

          完成开源任务即可获得税前6000至12000元不等的奖金及结项证书，还有机会获得赛事周边与项目认证等。

          +

          06名企实习机会

          +

          表现优秀的同学将有机会进入知名企业实习，为职业生涯开启新篇章。 +众多开源社区参加GLCC

          +

          目前GLCC已经进入学生申请题目阶段，覆盖大模型、人工智能、操作系统、云原生、编程语言、大数据、运维监控、系统工具等30多个技术领域，课题难度分级，等你来挑选。

          +

          参与社区

          +

          图片

          +

          GLCC学生时刻表

          +

          1. 5月31日-7月4日

          +

          学生报名，提交proposal。

          +

          2. 7月8日

          +

          公示入选学生名单。

          +

          （7月6日进行二次报名，第一次落选的同学不要灰心哦）

          +

          3. 7月9日-8月18日

          +

          项目开发第一阶段。

          +

          4. 8月30日

          +

          项目中期考核，公示考核结果。

          +

          5. 8月31日-10月20日

          +

          项目开发第二阶段。

          +

          6. 10月31日

          +

          结项审核，公示考核结果。

          +

          7. 11月初

          +

          公布优秀项目/学生颁奖典礼。

          +

          高校学生如何参与

          +

          01报名时间：

          +

          2024.5.31-2024.7.4

          +

          02申请步骤：

          +

          图片 +www.gitlink.org.cn/glcc/2024/subjects +同学们根据个人专业情况，技术爱好以及所选开源组织的技术类型和参与门槛及奖金等情况筛选出自己喜欢的课题； +图片 +②点击“课题列表”中每个课题后的“申请课题”，进入报名信息页面填写“个人基本信息”和“课题申请书”，并提交; +图片 +③组委会收到申请后，审核通过后推荐给该课题所属项目导师，提交后的信息可再次更新。建议同学们同时也发送邮件跟导师联系；

          +

          ④加入GLCC官方QQ交流群，或发邮件到glcc@ccf.org.cn，关注活动进展和咨询； +图片 +扫码加入GLCC官方QQ交流群 +⑤7月8日公布学生中选情况并通过邮件通知，也可再次登陆官网查看。

          +

          03注意事项：

          +

          ①GLCC面向18岁以上的在校学生，请诚实提交在校学生证明材料组委会会对提交材料进行审核；

          +

          ②申请阶段，GLCC允许每个学生同时提交最多2个课题申请。申请结束后，经过与课题导师双向沟通，每个学生最终只能选择完成一个课题；

          +

          ③GLCC的每个课题都公布了导师的姓名/ID和邮箱地址，建议提前通过邮件方式和导师建立联系，反复沟通后再提交申请材料，你有充足的时间去了解你将要承担的课题；

          +

          ④ 建议在截止日期前三天完成提交，避免因最后大量学生提交申请导致网络拥堵；

          +

          ⑤CCF中国计算机学会学生会员申请优先推荐。

          +

          04学生申请指南：

          +

          GLCC为同学们申请过程中遇到的问题提供了丰富的辅导文档，可在官网查看“帮助文档-学生指南”获取。

          +

          官网链接：

          +

          https://www.gitlink.org.cn/glcc/help +图片 +扫码进入【学生指南】页面

          +

          协同举办体系

          +

          图片

          `;export{C as assetURLs,d as default,o as metadata,r as toc}; diff --git a/zh-cn/assets/index-a1a1a279.js b/zh-cn/assets/index-a1a1a279.js deleted file mode 100644 index 6149306..0000000 --- a/zh-cn/assets/index-a1a1a279.js +++ /dev/null @@ -1,34 +0,0 @@ -const e="/zh-cn/assets/cover-c938ebe8.png",t="/zh-cn/assets/image1-a88ec652.jpg",s="/zh-cn/assets/image2-0d688c12.png",r=[e,t,s],n={label:"4.8 Beijing Rust Meetup | Call For Presenters",description:"如果你有兴趣参与探讨Rust作为一种强调性能、安全和并发性的编程语言的各种应用、实践和无限可能性的头脑风暴，就一定不能错过这场来自达坦科技、南京大学、CloudWeGo、华为等技术专家带来的关于Rust编程语言相关应用的线下Meetup。我们的主题是Rust💡X，意在探讨用Rust编程语言“点亮”的任何应用、实践和探索。",cover:"./cover.png",location:"中国香港",date:"2023-03-31",title:"4.8 Beijing Rust Meetup | Call For Presenters"},i=[{label:"嘉宾演讲 (Presenter & Topic)",level:2},{label:"提交议题 (Call for Presenters)",level:2},{label:"Meetup 报名方式 （Registration）",level:2}],o=`

          如果你有兴趣参与探讨 Rust 作为一种强调性能、安全和并发性的编程语言的各种应用、实践和无限可能性的头脑风暴，就一定不能错过这场来自达坦科技、南京大学、CloudWeGo、华为等技术专家带来的关于 Rust 编程语言相关应用的线下 Meetup。我们的主题是 Rust💡X，意在探讨用 Rust 编程语言“点亮”的任何应用、实践和探索。

          -

          时间： 2023 年 4 月 8 日 14:00 -地点： 环球财讯中心 M 层 北京市西城区宣武门外大街甲 1 号

          -

          嘉宾演讲 (Presenter & Topic)

          -

          目前已经锁定的分享嘉宾和演讲主题有：

          -

          嘉宾：冯洋 南京大学计算机科学与技术系助理研究员
          -议题：基于实际场景应用分析的 Rust 库模糊测试技术报告
          -摘要： Rust 是一种诺内存安全和并发安全的语言，而各类 Rust 库中 API 的漏洞与缺陷可能会对所有使用该库的程序产生影响。因此，保障 Rust 库的安全性与可靠性是一个极为重要的问题。为了进一步保障 Rust 库的安全，通过模糊测试来对 Rust 的库进行测试是一个可行方法。在本报告中，我们提出了一种依靠现有 Rust 生态系统来生成模糊测试目标的方法，该方法利用 MIR 解析待测库所在生态系统中的项目，找到现实中 API 之间的调用和依赖关系，从而从中提取出待测库的 API 序列，依此生成 Rust 库的模糊测试目标。

          -

          嘉宾：施继成 达坦科技联合创始人兼 CTO
          -议题：在 Linux 6.2 中用 Rust 语言写驱动
          -摘要： Linux 在 6.1 中加入了 rust 语言的支持，自此开发者可以使用 Rust 语言进行 Linux 内核驱动开发。因为 Rust 语言的安全性，未来驱动的开发工作使用 Rust 语言将成为必然趋势。虽然 Rust 语言的支持还有许多不完善的地方，但不妨碍我们“吃螃蟹”——使用 Rust 语言写一个 Linux 驱动。
          -本次分享将：

          -
            -
          1. 介绍 Linux 系统的 Rust 语言支持。
            2. -
          2. 以 Linux 上的简单 Driver 举例，说明如何用 Rust 写驱动。
            3. -
          3. 分析 Rust 在 Linux 中工作的原理
            4. -
          4. 列举 Rust 进行驱动编写时的限制。
            5. -
          5. 给出使用 Rust 编写驱动的 Guideline。
            6. -
          -

          嘉宾：叶天星 华为技术有限公司 -议题：用 Rust 实现 Git 传输协议、Git 对象解析和数据库存储 -摘要： 本次分享将包含：

          -
            -
          1. 使用 Rust 实现 Git 传输协议 - Git 传输协议是一种用于 Git 客户端和服务器之间进行通信的协议，有两种实现方式：HTTP 和 SSH。Git 传输协议可以确保数据传输的安全性和可靠性，并且能够高效地处理大量的数据。通过使用 Rust，可以轻松地实现 Git 客户端和服务器之间的数据传输，并确保高效的网络通信和数据安全性。
            2. -
          2. Git 存储结构介绍 - Git 使用了一种称为对象存储的方式来存储代码版本信息。Git 对象有四种类型：blob、tree、commit 和 tag。
            3. -
          -

          提交议题 (Call for Presenters)

          -

          无论是您正在用 Rust 编写安全性要求高的系统级软件，还是高效的并发程序，或是游戏、Web/移动应用程序等，只要是有关 Rust 应用的有趣、有意义的想法和实践，欢迎提交议题，和更多的同行分享交流。

          -

          请将姓名、公司、议题、摘要，联系方式等信息，发送至tianwei.wang@datenlord.com

          -

          图片

          -

          Meetup 报名方式 （Registration）

          -

          欢迎扫描下方二维码或点击阅读原文，即可报名。

          -

          阅读原文

          -

          图片

          `;export{r as assetURLs,o as default,n as metadata,i as toc}; diff --git a/zh-cn/assets/index-8f0491cb.js b/zh-cn/assets/index-a1d21a3b.js similarity index 92% rename from zh-cn/assets/index-8f0491cb.js rename to zh-cn/assets/index-a1d21a3b.js index 53357c4..4e7fab3 100644 --- a/zh-cn/assets/index-8f0491cb.js +++ b/zh-cn/assets/index-a1d21a3b.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/cover-78606c04.png",t="/zh-cn/assets/image1-f46bfcc6.jpg",n=[s,t],o={label:"Rust X Datenlord：第二届中国Rust开发者大会回顾",description:"达坦科技自成立以来积极探索软硬件深度融合，专注于打造新一代的开源跨云存储平台，以满足不同行业客户对数据跨云、跨数据中心高性能访问的需求。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"Rust X Datenlord: Review of the Second China Rust Developer Conference"},e=[{label:"专题演讲",level:2},{label:"线上 workshop",level:2},{label:"参与我们",level:2}],r=`

          封面

          +const s="/zh-cn/assets/cover-78606c04.png",t="/zh-cn/assets/image1-f46bfcc6.jpg",n=[s,t],o={label:"Rust X Datenlord：第二届中国Rust开发者大会回顾",description:"达坦科技自成立以来积极探索软硬件深度融合，专注于打造新一代的开源跨云存储平台，以满足不同行业客户对数据跨云、跨数据中心高性能访问的需求。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"Rust X Datenlord_ Review of the Second China Rust Developer Conference"},r=[{label:"专题演讲",level:2},{label:"线上 workshop",level:2},{label:"参与我们",level:2}],e=`

          封面

          达坦科技自成立以来积极探索软硬件深度融合，专注于打造新一代的开源跨云存储平台，以满足不同行业客户对数据跨云、跨数据中心高性能访问的需求。

          今年以来陆续发声，将达坦科技开源项目 async-rdma 的技术实践和案例对外输出，坚定地做 Rust 语言的布道，也将达坦科技探索的新一代硬件敏捷开发的研究成果在各硬件技术大会上做分享（本周的次条为达坦科技的团队在南京参加中国计算机学会芯片大会的回顾）。

          专题演讲

          @@ -12,4 +12,4 @@ const s="/zh-cn/assets/cover-78606c04.png",t="/zh-cn/assets/image1-f46bfcc6.jpg"

          参与我们

          目前，我们将整个库放在了 Github.com/datenlord/async-rdma 上，并且也在持续迭代中，欢迎感兴趣用 Rust 语言实现高性能编程的你前来讨论。

          有意加入 Rust 前沿交流讨论群，请添加小助手微信：

          -

          封面

          `;export{n as assetURLs,r as default,o as metadata,e as toc}; +

          封面

          `;export{n as assetURLs,e as default,o as metadata,r as toc}; diff --git a/zh-cn/assets/index-69f9dfbf.js b/zh-cn/assets/index-a4c077ba.js similarity index 98% rename from zh-cn/assets/index-69f9dfbf.js rename to zh-cn/assets/index-a4c077ba.js index c42f625..1534891 100644 --- a/zh-cn/assets/index-69f9dfbf.js +++ b/zh-cn/assets/index-a4c077ba.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/07123c0a1614c5c0256c2c44fccab7ad-82d2cfc4.jpeg",a="/zh-cn/assets/dbb615367665aefe1e8dc131faf7135d-ab0138b7.png",t="/zh-cn/assets/7e55ab5e49360b59ae14ad51bd9f8266-a3540f96.png",p="/zh-cn/assets/50e844cef87960be41630d431f7dba76-74a09282.png",s="/zh-cn/assets/da011de83bcdac4720de4265f06487fa-a09f8943.png",r="/zh-cn/assets/ab91fcebd0198e3ba3e68a1f0ede0dcb-2954efad.png",n="/zh-cn/assets/d6753cc7dafac128a184192d73a671d0-cbc3aa8e.png",l="/zh-cn/assets/8140b483b2b9992795a40af43149d92e-6324a4f1.png",c="/zh-cn/assets/261faba035c5925dd1bf0052673a2819-65bae75e.png",i="/zh-cn/assets/7ccbe7094043e218ad241cc3c2e3c871-e3e8431a.png",d="/zh-cn/assets/7a18e9fc6512a89b6e74a92a92580823-5ee6182a.png",o="/zh-cn/assets/3df9c5c4ff35c6cde20f54a80ed5bb0d-6b5bfe86.png",m="/zh-cn/assets/03beb98ee570de53f1aa4b866838924b-60f7cb4e.jpeg",u="/zh-cn/assets/13065eb252d78f86c7d84a7537e730d7-9522963a.png",h="/zh-cn/assets/0f55765329135bae263d77175baf52b7-2df179ec.png",I=[e,a,t,p,s,r,n,l,c,i,d,o,m,u,h],P={label:"blue-ethernet 高性能FPGA网络数据包处理项目详解",description:"blue-ethernet项目使用Bluespec SystemVerilog(BSV)硬件描述语言实现了一系列在FPGA上加速网络数据包处理的硬件模块。具体来说，其提供了用于生成和解析Ethernet/IP/UDP网络报文的硬件模块。此外，还提供了一个具有非阻塞高速缓存的APR报文处理单元，用于自动解析设备的物理MAC地址。",cover:"./07123c0a1614c5c0256c2c44fccab7ad.jpeg",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2023-11-02",title:"blue ethernet High Performance FPGA Network Packet Processing Project Details"},D=[{label:"简介",level:2},{label:"文件目录概览",level:2},{label:"组件",level:2},{label:"数据流处理模块",level:3},{label:"UdpIpLayer",level:3},{label:"UdpIpLayerForRdma",level:3},{label:"MacLayer",level:2},{label:"ARP Processor",level:3},{label:"UdpIpEthRx",level:3},{label:"UdpIpEthTx",level:3},{label:"UdpIpArpEthRxTx",level:3},{label:"PriorityFlowContro",level:3},{label:"性能和面积",level:2},{label:"入门教程",level:2},{label:"仿真测试",level:3},{label:"使用方法",level:3},{label:"相关链接",level:2}],A=`

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          简介

          blue-ethernet 项目使用 Bluespec SystemVerilog(BSV)硬件描述语言实现了一系列在 FPGA 上加速网络数据包处理的硬件模块。具体来说，其提供了用于生成和解析 Ethernet/IP/UDP 网络报文的硬件模块。此外，还提供了一个具有非阻塞高速缓存的 APR 报文处理单元，用于自动解析设备的物理 MAC 地址。

          除了构建标准的 UDP/IP/Ethernet 协议栈，blue-ethernet 还增加了对 RoCE(RDMA over Converged Ethernet)协议的支持，具体包括：

          @@ -201,7 +201,7 @@ module mkMacMetaDataAndUdpIpStream#(

          mkArpProcessor

          mkArpProcessor 集成了 MAC 地址信息缓存单元 mkArpCache 以及对 ARP 报文的解析和生成模块。在处理 ARP 请求和响应时，mkArpProcessor 既可作为请求端，在 Cache Miss 时发出 ARP 请求报文并接收从目标设备返回的 ARP 响应报文。同时也可作为被请求端，接收其他设备发出的 ARP 请求报文并将自己的 MAC 地址信息通过 ARP 响应返回给请求端。

          -

          +

          interface ArpProcessor;
     interface PipeOut#(DataStream) arpStreamOut;
     interface PipeOut#(MacMetaData) macMetaDataOut;
@@ -231,7 +231,7 @@ endinterface
 
 module mkGenericUdpIpEthRx#(Bool isSupportRdma)(UdpIpEthRx)
          -

          +

          • mkGenericRawUdpIpEthRx 模块使用 blue-wrapper 中提供的组件对 mkGenericUdpIpEthRx 进行封装，目的是为了在生成的 Verilog 代码里提供直接可用的接口。
          @@ -269,7 +269,7 @@ endinterface module mkGenericUdpIpEthTx#(Bool isSupportRdma)(UdpIpEthTx); -

          +

          • mkGenericRawUdpIpArpEthRxTx 模块使用 blue-wrapper 中提供的组件对 mkGenericUdpIpArpEthRxTx 进行封装，从而生成方便对接的 Verilog 接口。
          @@ -289,7 +289,7 @@ module mkPriorityFlowControlTx#( Vector#(VIRTUAL_CHANNEL_NUM, UdpIpMetaDataPipeOut) udpIpMetaDataInVec )(PriorityFlowControlTx); -

          +

          • mkPriorityFlowControlRx 负责报文接收端的 PFC 控制。其接收报头信息流 udpIpMetaDataIn 和发送信息数据流 dataStreamIn，然后根据报头信息中包含的通道索引值分别路由至 udpIpMetaDataOutVec 和 dataStreamOutVec 中的某个输出通道。此外，该模块需要监控每个通道的中间缓冲区中存储的报文数量。当某个通道缓冲区内的报文数量达到阈值 pfcThreshold 时，就会发送 PFC 报文至发送端以暂停该通道的报文传输。
          @@ -413,4 +413,4 @@ make verilog TARGET=UdpIpEthTx SUPPORT_RDMA=TRUE
        • blue-wrapper: https://github.com/wengwz/blue-wrapper

        关于项目更多的详细信息可关注链接:

        -

        https://github.com/wengwz/blue-ethernet

        `;export{I as assetURLs,A as default,P as metadata,D as toc}; +

        https://github.com/wengwz/blue-ethernet

        `;export{I as assetURLs,b as default,P as metadata,D as toc}; diff --git a/zh-cn/assets/index-29c0b7ce.js b/zh-cn/assets/index-b1ba4736.js similarity index 98% rename from zh-cn/assets/index-29c0b7ce.js rename to zh-cn/assets/index-b1ba4736.js index 1b821d3..17ef944 100644 --- a/zh-cn/assets/index-29c0b7ce.js +++ b/zh-cn/assets/index-b1ba4736.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-1329fc54.png",a="/zh-cn/assets/image1-b7df4899.png",s="/zh-cn/assets/image2-a77c94e1.jpg",t=[e,a,s],r={label:"计算机体系结构 | MIT Training Q&A及小贴士",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。6.175和6.375的课程和Lab学习都有一定的难度，要求采用Bluespec语言实现RISC-V处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["硬件加速"],date:"2022-06-11",title:"Computer Architecture l MIT Training Q&A and Tips"},i=[{label:"MIT Training Q & A",level:2},{label:"MIT Training 小贴士",level:2},{label:"Related Resources",level:2}],c=`

        图片

        +const e="/zh-cn/assets/cover-1329fc54.png",a="/zh-cn/assets/image1-b7df4899.png",s="/zh-cn/assets/image2-a77c94e1.jpg",t=[e,a,s],r={label:"计算机体系结构 | MIT Training Q&A及小贴士",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。6.175和6.375的课程和Lab学习都有一定的难度，要求采用Bluespec语言实现RISC-V处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["硬件加速"],date:"2022-06-11",title:"Computer Architecture l MIT Training Q&A and Tips"},c=[{label:"MIT Training Q & A",level:2},{label:"MIT Training 小贴士",level:2},{label:"Related Resources",level:2}],i=`

        图片

        在 2023 年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。6.175 和 6.375 的课程和 Lab 学习都有一定的难度，要求采用 Bluespec 语言实现 RISC-V 处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab 环节还涉及软硬件联合开发，要求基于所实现的 RISC-V 处理器运行真实的 RISC-V 程序，并给出性能评估。

        继 MIT6.175 和 MIT6.375 学习笔记之后，我们又整理了到目前为止，硬件设计学习社区里大家碰到的一些共同问题，希望我们的回复以及学习贴士对于想啃下这两门高难度课程，并想从事数字芯片设计的工程师或同学有所帮助。

        MIT Training Q & A

        @@ -76,4 +76,4 @@ A：我目前是用 docker 做的实验，6175 的 lab1-6 和 6375 的 lab1-4

        计算机体系结构｜ MIT6.175 和 MIT6.375 学习笔记

        达坦科技硬件设计学习社区持续开放，若想询问加入细节，请添加下方小助手微信号或邮件info@datenlord.com

        -

        图片

        `;export{t as assetURLs,c as default,r as metadata,i as toc}; +

        图片

        `;export{t as assetURLs,i as default,r as metadata,c as toc}; diff --git a/zh-cn/assets/index-fa30bf44.js b/zh-cn/assets/index-b2bc16dd.js similarity index 98% rename from zh-cn/assets/index-fa30bf44.js rename to zh-cn/assets/index-b2bc16dd.js index c56b464..d651906 100644 --- a/zh-cn/assets/index-fa30bf44.js +++ b/zh-cn/assets/index-b2bc16dd.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-3674aa81.jpg",e="/zh-cn/assets/image1-af3445c2.png",n=[t,e],s={label:"精彩回顾 | Rust唠嗑室：Xline跨数据中心一致性管理",description:"2022年10月15日，达坦科技和Rust语言中文社区合作，在Rust唠嗑室活动中，由达坦科技（DatenLord）联合创始人施继成做了关于开源分布式存储技术的分享，着重介绍了达坦科技新的开源项目Xline，这一跨云的metadata(元数据)KV存储的产品是如何实现高性能跨数据中心的数据一致性管理的。",cover:"./cover.jpg",location:"中国香港",tags:["Xline"],date:"2022-10-20",title:"Wonderful review l Rust chat room: Xline cross data center consistency management"},o=[{label:"内容介绍",level:2},{label:"我们的产品：Xline",level:2}],r=`

        图片

        +const t="/zh-cn/assets/cover-3674aa81.jpg",e="/zh-cn/assets/image1-af3445c2.png",n=[t,e],s={label:"精彩回顾 | Rust唠嗑室：Xline跨数据中心一致性管理",description:"2022年10月15日，达坦科技和Rust语言中文社区合作，在Rust唠嗑室活动中，由达坦科技（DatenLord）联合创始人施继成做了关于开源分布式存储技术的分享，着重介绍了达坦科技新的开源项目Xline，这一跨云的metadata(元数据)KV存储的产品是如何实现高性能跨数据中心的数据一致性管理的。",cover:"./cover.jpg",location:"中国香港",tags:["Xline"],date:"2022-10-20",title:"Wonderful review l Rust chat room_ Xline cross data center consistency management"},o=[{label:"内容介绍",level:2},{label:"我们的产品：Xline",level:2}],r=`

        图片

        2022 年 10 月 15 日，达坦科技和 Rust 语言中文社区合作，在 Rust 唠嗑室活动中，由达坦科技（DatenLord）联合创始人施继成做了关于开源分布式存储技术的分享，着重介绍了达坦科技新的开源项目 Xline，这一跨云的 metadata(元数据)KV 存储的产品是如何实现高性能跨数据中心的数据一致性管理的。

        内容介绍

        施继成首先介绍了做 Xline 这个产品的动机。最初 2021 年 UCBerkeley 提出了 Sky Computing（“天空计算”） 的概念。与我们都熟知的 cloud computing（“云计算”）不同的是，sky computing，如其表面意义所讲，是天空中有很多的云，是解决跨云的问题。如何打破不同云之间的隔阂，或者打通和最大化利用跨云数据是当前面临的一个难题，也是我们的目标所在。如今谈论云计算时，我们不需要考虑云资源的部署，可扩展性等问题，因为云厂商已经都帮忙做了。但是，一旦跨云，则无论算力的迁移，或数据的迁移，都是摆在我们眼前要攻克的难题。达坦科技在做的就是解决“如何做跨云数据交互”的问题，我们致力于将分布式系统从数据中心范围扩散至全球范围，这样即使单个数据中心宕机，却仍不影响用户使用数据。

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Access（RDMA）应用程序提供高级抽象和异步API。",main:[{key:1,type:"text",content:"RDMA可以实现从一台机器到另一台机器对内存的直接访问。这可以提高需要低延迟和高吞吐量的应用程序的性能。RDMA支持内核旁路和零拷贝，无需CPU的参与。"},{key:2,type:"text",content:"然而，用低级别的C语言库编写RDMA应用程序往往很困难，而且容易出错。为了让事情变得更简单，我们开发了Async-RDMA，它提供了易于使用的API，隐藏了底层RDMA操作的复杂性。有了Async-RDMA，大多数RDMA操作只需一行代码就能完成。它提供了以下几点主要的功能："},{key:3,type:"list",items:[{key:1,text:"作为与RDMA端点建立连接的工具。"},{key:2,text:"作为在端点之间传输数据的高级异步API。"},{key:3,text:"作为管理RDMA内存区域的高级API。"},{key:4,text:"作为一个在幕后工作的框架来管理内存区域并异步执行RDMA请求。"}]}],url:"https://github.com/datenlord/async-rdma"},{key:"Open-RDMA",title:"Open-RDMA",subTitle:"Open-RDMA 是一个开源的、基于 RoCE v2 协议扩展优化的软硬件实现套件",main:[{key:1,type:"text",content:"RoCE v2（RDMA over Converged Ethernet version 2）是一个网络协议来在以太网上实现远程直接内存访问（RDMA）。它是对于原始RoCE标准的改进，为在以太网上执行RDMA提供了一种更有效且可扩展的方式。"},{key:2,type:"text",content:"Open-RDMA 套件的核心部分是基于 RoCE v2 协议进行再次扩展优化后的软硬件实现，充分发挥软硬件协同设计开发的优势，通过硬件加速实现高吞吐低延迟，通过软件用户态协议栈实现集中管理且高度可配置的传输策略，从而实现在不同网络环境下都可以发挥极致性能。项目采用 Bluespec SystemVerilog、C 和 Rust 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轻量级开发框架”相关知识。",date:"2022.11.20",url:"https://www.bilibili.com/video/BV1u84y1C7pQ/"},{key:16,image:ZV,title:"RDMA网络拥塞管理架构",text:"本场workshop由北京邮电大学网络与交换国家重点实验室、计算机学院，副研究员、博导：张乙然进行内容分享，主要内容围绕“RDMA网络拥塞管理架构”进行知识介绍。",date:"2022.11.27",url:"https://www.bilibili.com/video/BV1Ve4y1g7gx/"},{key:17,image:JV,title:"使用RDMA加速服务器无感知计算容器启动",text:"本场workshop由上海交通大学助理教授魏星达进行分享，主要内容围绕“使用RDMA加速服务器无感知计算容器启动”进行知识介绍。",date:"2022.12.04",url:"https://www.bilibili.com/video/BV1qG4y1G784/"},{key:19,image:eH,title:"基于智能网卡的数据处理系统",text:"本场workshop由浙江大学百人计划研究员 王则可进行分享，主要内容为“基于智能网卡的数据处理系统”介绍。",date:"2022.12.18",url:"https://www.bilibili.com/video/BV1Eg411J7fJ/"},{key:20,image:tH,title:"异步事件驱动的电路机制 & 基于RISC-V的全异步超标量CPU体系结构",text:"本场workshop由何安平副教授进行分享，主要内容为“异步事件驱动的电路机制 & 基于RISC-V的全异步超标量CPU体系结构”介绍。",date:"2022.12.25",url:"https://www.bilibili.com/video/BV1sA411D7on/"},{key:21,image:rH,title:"使用 TLA+ 为分布式算法验证正确性",text:"本场workshop由达坦科技DatenLord田野进行分享，主要内容为“使用 TLA+ 为分布式算法验证正确性”介绍。",date:"2023.01.09",url:"https://www.bilibili.com/video/BV1pG4y1y7an/"},{key:22,image:nH,title:"喷泉码技术简介",text:"本场workshop由兰州大学信息科学与工程学院副教授、通信工程专业系主任袁磊 进行分享，主要内容为“喷泉码技术简介”介绍。",date:"2023.01.15",url:"https://www.bilibili.com/video/BV1SM411b77k/"},{key:23,image:iH,title:"数据库隔离级别及MVCC",text:"本场workshop由达坦科技DatenLord施继成进行分享，主要内容为“数据库隔离级别及MVCC”介绍。",date:"2023.01.29",url:"https://www.bilibili.com/video/BV1sR4y1b7Cu/"},{key:24,image:oH,title:"互联网传输协议优化研究",text:"本场workshop由中国人民大学副教授李彤教授进行分享，主要内容为“互联网传输协议优化研究”介绍。",date:"2023.02.06",url:"https://www.bilibili.com/video/BV1X84y157vL/"},{key:25,image:sH,title:"高性能RDMA网络协议栈",text:"高性能RDMA网络协议栈是RDMA高性能网络的核心组成部分之一，它提供了支持RDMA技术的网络协议和驱动程序。在本周的前沿科技分享中，我们邀请到了湖南大学信息科学与工程学院的陈果教授来给我们分享高性能RDMA网络协议栈的话题。",date:"2023.02.28",url:"https://www.bilibili.com/video/BV1Y24y1n7Dk/"},{key:26,image:aH,title:"GPU抢占式任务调度",text:"GPU编程可以大幅提升计算速度和效率，从而使得许多计算任务得以在合理时间内完成。随着GPU硬件技术的发展和大规模数据处理需求的增加，GPU编程的应用范围不断扩大。在本周的前沿科技分享中，我们邀请到了上海交通大学并行与分布式研究所的韩明聪博士来给我们分享GPU抢占式任务调度。",date:"2023.03.05",url:"https://www.bilibili.com/video/BV1cY4y1y7ND/"},{key:27,image:lH,title:"聊聊RaptorQ纠错码",text:"喷泉码具有极高的纠错能力，且具有低延迟、地复杂度、高效率等优点，使其在冷存储、分布式存储、无线通信等领域得到广泛应用。达坦科技致力于软硬件融合的解决方案，喷泉码的高效实现在硬件上，作为公司长期的技术储备，在本周的前沿科技分享中，达坦科技的联合创始人兼CTO施继成将为大家分享聊聊 RaptorQ 纠错码 。",date:"2023.03.15",url:"https://www.bilibili.com/video/BV1wL411C7DL/"},{key:28,image:cH,title:"Buddy Compiler 简介和愿景",text:"在本次分享中，中国科学院软件研究所博士生张洪滨将介绍Buddy Compiler 编译流程、协同设计、硬件支持。Buddy Compiler 是领域特定的编译器框架，致力于打造基于 MLIR 和 RISC-V 的软硬件协同设计生态。其目标是实现从 DSL 到 DSA 的编译流程和协同设计，愿景是让领域特定的协同设计不再困难。",date:"2023.03.21",url:"https://www.bilibili.com/video/BV1YT41167GB/"},{key:29,image:uH,title:"新一代计算架构：超异构计算",text:"AGI带来的变化之一是算力将进一步从CPU转到GPU，在本周的前沿技术分享中，我们邀请到了上海矩向科技创始人兼CEO黄朝波为大家分享新一代计算架构：超异构计算。",date:"2023.04.04",url:"https://www.bilibili.com/video/BV1Rm4y1q7Dx/"},{key:30,image:dH,title:"通过Chainsaw设计DSP电路",text:"DSP在数据压缩、编码和加密方面都发挥了重要的作用；SpinalHDL具有更高的抽象层次和更强的表达能力，可以大大简化DSP电路设计的复杂度和提高开发效率；而Chainsaw框架可以在不同的FPGA平台上运行，提高了设计的灵活性和可移植性。在本周的前沿技术分享中，我们邀请到了中山大学在读博士李天瑞为大家分享通过Chainsaw设计DSP电路。",date:"2023.04.18",url:"https://www.bilibili.com/video/BV14o4y1j7bH/"},{key:31,image:fH,title:"Something About Cache Security",text:"在本周的前沿技术分享中，我们邀请到了浙江大学在读硕士研究生缪晨露为大家分享她在MICRO和HPCA上发表的两篇论文的精华，演讲主题是Something About Cache Security。",date:"2023.04.25",url:"https://www.bilibili.com/video/BV1p24y1F7fN/"},{key:32,image:hH,title:"Rust嵌入式开发生态介绍及入门",text:"在本周的前沿技术分享中，我们邀请到了一位爱好硬件的软件工程师米明恒，来为大家分享Rust嵌入式开发生态介绍及入门。",date:"2023.05.04",url:"https://www.bilibili.com/video/BV1J24y1T7EH/"},{key:33,image:mH,title:"RDMA赋能数据中心/超算中心间远程互联",text:"在本周的前沿技术分享中，我们邀请到了南京大学田臣教授，来为大家分享RDMA赋能数据中心/超算中心间远程互联。",date:"2023.06.04",url:"https://www.bilibili.com/video/BV1cz4y1B7cx/"},{key:34,image:pH,title:"Paper Reading: DPU任务卸载",text:"达坦科技一直在探索用硬件加速做分布式跨云存储，在本周的前沿技术分享中，我们邀请到了中南大学在读博士生卢军，来为大家分享DPU任务卸载的相关研究。",date:"2023.06.17",url:"https://www.bilibili.com/video/BV1R14y1S79T/"},{key:35,image:gH,title:"Rust在物理引擎研发中的应用",text:"在本周的前沿技术分享中，我们邀请到了Motphys CEO崔汉青，来为大家分享Rust在物理引擎研发中的应用。",date:"2023.06.27",url:"https://b23.tv/BZuSvyW"},{key:40,image:vH,title:"基于BSV的RTL仿真加速设计研究",text:"BSV的仿真加速可以提升硬件开发调试的效率。在本周的前沿技术分享中，我们邀请到了梁之杰，来为大家分享基于BSV的RTL仿真加速设计研究。",date:"2023.07.09",url:"https://www.bilibili.com/video/BV1ou411L7Yy/"},{key:41,image:yH,title:"RDMA网络的系统测试方案",text:"在本周的前沿技术分享中，我们邀请到了孔心皓，来为大家分享RDMA 网络的系统测试方案。",date:"2023.07.16",url:"https://www.bilibili.com/video/BV1tz4y147rw/"},{key:42,image:wH,title:"RapidWright技术分享会",text:"在本周的前沿技术分享中，我们邀请到了西南交通大学邸志雄副教授和他的学生向瀚章，来为大家分享开源FPGA设计工具RapidWright技术。",date:"2023.07.28",url:"https://www.bilibili.com/video/BV14z4y1x7a8/"},{key:43,image:_H,title:"基于Karmada实现Kubernetes应用跨集群故障转移",text:"在本周的前沿技术分享中，我们邀请到了开源爱好者，云兴科技软件研发工程师梁远鹏，来为大家分享基于Karmada实现Kubernetes应用跨集群故障转移。",date:"2023.08.01",url:"https://www.bilibili.com/video/BV1rN411Y7aZ/"},{key:50,image:xH,title:"大模型训练和基础设施",text:"在本周的前沿技术分享中，我们邀请到了范一呈，来为大家分享大模型训练和基础设施。",date:"2023.09.01",url:"https://www.bilibili.com/video/BV1ZN4y1R7HP/"},{key:51,image:SH,title:"RustBelt与Rust形式化方法",text:"在本周的前沿技术分享中，我们邀请到了王俊吉，来为大家分享RustBelt与Rust形式化方法。",date:"2023.09.04",url:"https://www.bilibili.com/video/BV1Vw411D7rT/"},{key:52,image:bH,title:"网络的智能该放在哪里：网卡、交换机还是xPU",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:53,image:kH,title:"以ARM为镜的RISC-V",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:55,image:CH,title:"让大模型在场景中真正落地的产品形态、技术堆栈、交付服务",text:"达坦科技始终致力于打造高性能 Al+ Cloud 基础设施平台，积极推动AI应用的落地。达坦科技通过软硬件深度融合的方式，提供高性能存储和高性能网络。为 AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对 AI+Cloud 的需求。在本周的前沿技术分享中，我们邀请到了猴子无限创始人兼CEO尹伯昊，来为大家分享让大模型在场景中真正落地的产品形态、技术堆栈、交付服务。",date:"2024.03.18",url:"https://www.bilibili.com/video/BV1KJ4m187gS/"}],EH="/zh-cn/assets/cover1-42e6189a.jpg",jH="/zh-cn/assets/cover2-af26ed46.jpg",AH="/zh-cn/assets/cover3-9c9d21fa.jpg",TH=[{key:1,image:EH,title:"Xline-跨数据中心一致性的元数据管理",text:"天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline是一款开源分布式KV存储系统，基于Curp共识算法实现，旨在提供跨云元数据管理的功能。相比于传统共识协议Raft或Paxos，Curp在天空计算的场景中有着更好的性能表现。本次分享将聚焦于共识算法，从天空计算的背景和挑战出发，介绍Curp共识算法，以及Revision机制与Curp无序性语义之间的冲突，最后，简述下Xline未来的优化方向。欢迎了解更多关于Xline的信息：Https://github.com/datenlord/Xline",date:"2023.02.09",url:"https://www.bilibili.com/video/BV1XY411q7X8/"},{key:2,image:jH,title:"源码解读：Xline Curp共识协议的设计与实现",text:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。",date:"2023.04.30",url:"https://www.bilibili.com/video/BV1dL411h7YK/"},{key:3,image:AH,title:"Xline的Lease机制与实现",text:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。",date:"2023.06.09",url:"https://www.bilibili.com/video/BV1FX4y1h7X5/"}],RH="/zh-cn/assets/cover1-a1358db9.jpg",OH="/zh-cn/assets/cover2-b899ea12.jpg",PH="/zh-cn/assets/cover3-e0bf4798.jpg",LH="/zh-cn/assets/cover4-15b0b4f1.jpg",MH="/zh-cn/assets/cover5-7c4c2482.jpg",IH="/zh-cn/assets/cover6-1c4d5c5f.jpg",NH="/zh-cn/assets/cover7-4f7454c0.jpg",zH="/zh-cn/assets/cover8-7e30c0fc.jpg",YH="/zh-cn/assets/cover9-e8c86c60.jpg",VH="/zh-cn/assets/cover10-bb13b118.jpg",HH="/zh-cn/assets/cover11-c29e9692.jpg",FH="/zh-cn/assets/cover12-6877e246.jpg",UH="/zh-cn/assets/cover13-5a4d97b0.jpg",$H="/zh-cn/assets/cover14-052a8b36.jpg",BH=[{key:7,image:NH,title:"2022年Rust开发者大会Workshop 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Meetup｜叶天星《用Rust实现Git传输协议、Git对象解析和数据库存储》",text:"2023年4月8日，达坦科技联合南京大学、CloudWeGo、华为等技术专家成功举办了题为Rust 💡X的meetup。本场分享由达坦科技联合创始人兼CTO施继成进行，演讲主题是《Rust for Linux 6.2》。",date:"2023.04.12",url:"https://www.bilibili.com/video/BV1Bs4y117Ze/"},{key:6,image:IH,title:"4.8 Beijing Rust Meetup｜茌海《Monoio：一个基于 io-uring 的 Rust Runtime》",text:"2023年4月8日，达坦科技联合南京大学、CloudWeGo、华为等技术专家成功举办了题为Rust 💡X的meetup。本场分享由达坦科技联合创始人兼CTO施继成进行，演讲主题是《Rust for Linux 6.2》。",date:"2023.04.12",url:"https://www.bilibili.com/video/BV1Rh411M7EP/"},{key:10,image:VH,title:"如何用Rust写分布式系统",text:"分享会介绍分布式KV Store (Xline) 整体的组成，以及不同组件之间如何去交互。在广域网下的分布式系统如何高效地达成共识，以及分布式系统如何实现容错。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV1Hs4y1r7dD/"},{key:11,image:HH,title:"Building microsecond-scale system with modern networking in Rust",text:"随着新型网络技术，如RDMA的普及，现代分布式应用的延迟降到了毫秒甚至微秒级别。这为构建系统软件带来了新的挑战。Rust的zero-cost抽象及内存管理能力能够为构建新型分布式应用带来新的机遇。我将分享利用Rust在用户态及内核态构建新型系统软件的相关经验，包括如何利用Rust抽象RDMA硬件的底层抽象及如何在内核构建一个毫秒级的容器启动机制。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV1Zo4y1P7Sg/"},{key:12,image:FH,title:"30分钟体验Rust for Linux内核模块开发",text:"本主题会提供构建好的docker开发环境，在30分钟内演示如何使用r4l开发一个简易内核模块，并介绍目前r4l的发展现状。可以自备好电脑现场体验。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV12j411U78o/"},{key:13,image:UH,title:"DatenLord 2023 Hackathon赛题宣讲会",text:"达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛主题为 Explore the Possibilities 赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来吧！",date:"2023.11.25",url:"https://www.bilibili.com/video/BV1su4y157iB/"},{key:14,image:$H,title:"DatenLord Hackathon2023空中路演",text:"DatenLord Hackathon 2023已经顺利完赛。达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台。我们邀请参赛者为DatenLord的极端场景设计并实现缓存 p2p 传输和同步模块。本次空中路演邀请了最终获得优胜奖的两支队伍进行思路分享，包括他们的解题思路，碰到的难点和挑战，以及如何应对的方法和设计亮点。欢迎感兴趣的大家进行观看，有问题也欢迎在评论区进行交流～～不要忘记一键三连哦～～",date:"2024.01.07",url:"https://www.bilibili.com/video/BV1ic411t7Nf/"}],WH="/zh-cn/assets/cover1-b9371555.jpg",GH="/zh-cn/assets/cover2-41a903e3.jpg",KH="/zh-cn/assets/cover2-41a903e3.jpg",XH="/zh-cn/assets/cover2-41a903e3.jpg",QH="/zh-cn/assets/cover2-41a903e3.jpg",qH="/zh-cn/assets/cover2-41a903e3.jpg",ZH="/zh-cn/assets/cover2-41a903e3.jpg",JH="/zh-cn/assets/cover2-41a903e3.jpg",eF="/zh-cn/assets/cover2-41a903e3.jpg",tF="/zh-cn/assets/cover13-a69a12b0.jpg",rF="/zh-cn/assets/cover14-3a97e013.jpg",nF="/zh-cn/assets/cover14-3a97e013.jpg",iF="/zh-cn/assets/cover14-3a97e013.jpg",oF="/zh-cn/assets/cover14-3a97e013.jpg",sF="/zh-cn/assets/cover14-3a97e013.jpg",aF="/zh-cn/assets/cover14-3a97e013.jpg",lF="/zh-cn/assets/cover20-c97bc11b.jpg",cF="/zh-cn/assets/cover21-9f52ba13.jpg",uF="/zh-cn/assets/cover22-187b655a.jpg",dF="/zh-cn/assets/cover23-1e515665.jpg",fF="/zh-cn/assets/cover24-020d0c34.jpg",hF="/zh-cn/assets/cover25-cb84d871.jpg",mF="/zh-cn/assets/cover26-7a726e97.jpg",pF="/zh-cn/assets/cover27-401eea81.jpg",gF="/zh-cn/assets/cover28-6ddc6bee.jpg",vF="/zh-cn/assets/cover29-0d2deb11.jpg",yF=[{key:1,image:WH,title:"Utilizing SpinalHDL for Large-scale Datapath Design",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的一个workshop：Utilizing SpinalHDL for Large-scale Datapath Design，由李天瑞进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1PM411m7DB/"},{key:2,image:GH,title:"A Network Attached Deep Learning Accelerator for FPGA Clusters",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的三个workshop：A Network Attached Deep Learning Accelerator for FPGA Clusters，由Philipp Kreowsky Justin Knapheide进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1HM411m7mS/"},{key:3,image:KH,title:"Coding a microprogrammed protocol receiver in SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的五个workshop：Coding a microprogrammed protocol receiver in SpinalHDL，由Michael Meier进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1oK411z7VD/"},{key:4,image:XH,title:"Utilizing SpinalHDL to Accelerate Neuroscience",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的二个workshop：Utilizing SpinalHDL to Accelerate Neuroscience，由Jeff-Ciesielski进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1GG4y1J7gU/"},{key:5,image:QH,title:"SpinalHDL in Computer Architecture Research",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的四个workshop：SpinalHDL in Computer Architecture Research，由Sallar Ahmadi-Pour ( saahm)进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1gA411X7f8/"},{key:6,image:qH,title:"NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第六个workshop：NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix，由Dolu1990进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV13K41167q5/"},{key:7,image:ZH,title:"Recent progress on formal verification support on SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第七个workshop：Recent progress on formal verification support on SpinalHDL，由Xiao Yindong (Readon)进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV1bG411N7fk/"},{key:8,image:JH,title:"SpinalHDL for ASIC",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第八个workshop：SpinalHDL for ASIC，由Sebastien-riou进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV16e4y1L7dV/"},{key:9,image:eF,title:"From Peripheral Plugins to Product documentation",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第九个workshop：From Peripheral Plugins to Product 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- display: flex; - flex-direction: column; - align-items: center; - margin-top: -0.72rem; - padding-top: 0.72rem; - background-image: url(${EG}); - background-size: cover; -`,GG=f($G)` - padding-top: 1.68rem; - color: #fff; -`,KG=f(yn)` - margin-top: 0.46rem; - color: #fff; -`,XG=f.div` - display: flex; - align-items: center; - margin-top: 0.91rem; - margin-bottom: 0.48rem; - padding: 0.13rem 2rem; - background: rgba(0, 0, 0, 0.09); - border: 0.01rem solid #fff; - border-radius: 0.12rem; - cursor: pointer; -`,QG=f.div` - padding-right: 0.12rem; - font-size: 0.2rem; - font-weight: 400; - line-height: 1; - color: #fff; -`,qG=f.img` - height: 0.2rem; - width: 0.2rem; -`,Yl=f.div` - position: relative; -`,Vl=f.div` - /* min-height: 6.4rem; */ - display: flex; - flex-direction: column; - padding-inline: 1.2rem; - color: #252931; - max-width: 1440px; - margin-inline: auto; -`,yf=f.img` - height: 0.38rem; - width: min-content; -`,wf=f.div` - font-size: 0.4rem; - font-weight: 600; -`,ZG=f(Yl)``,JG=f(Vl)` - padding-block: 0.7rem 1.17rem; -`,eK=f(yf)``,tK=f(wf)``,rK=f(zl)` - padding-top: 0.61rem; -`,nK=f.div` - display: flex; - gap: 0.39rem; - padding-top: 0.59rem; -`,Jh=f.div` - padding: 0.12rem 0.23rem 0.16rem; - background: #fff; - border-radius: 0.16rem; - box-shadow: 0px 6px 32px 0px rgba(37, 41, 49, 0.06); -`,em=f.div` - font-size: 0.38rem; - font-weight: 600; - color: #7680dd; -`,tm=f.div` - padding-top: 0.07rem; - color: #626262; - font-size: 0.16rem; - line-height: 0.2956rem; -`,iK=f(zl)` - padding-top: 0.87rem; -`,oK=f.img` - position: absolute; - z-index: -100; - top: 0; - width: 100%; - height: 100%; -`,sK=f(Yl)` - background: linear-gradient( - 106deg, - #e4f4ff -1.1%, - #f9fcff 47.11%, - #edf6fc 102.52% - ); -`,aK=f(Vl)` - min-height: 6.4rem; - padding-block: 0.7rem 1.49rem; -`,lK=f(yf)` - height: 0.26rem; -`,cK=f(wf)``,uK=f.div` - display: flex; - margin-top: 0.8rem; - background: #fff; - border-radius: 0.16rem; -`,dK=f.div` - padding: 0.49rem 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l SpinalHDL应用前景探索线上研讨会",description:"2022年12月16日，达坦科技联合SpinalHDL社区，举办了SpinalHDL Webinar 2022。在题为《SpinalHDL应用前景探索》的线上研讨会上，九位分享人在三个讨论分主题下做了各自领域内应用Spinal HDL的实践、挑战和经验的分享。",location:"中国香港",date:"2022-12-12",title:"SpinalHDL Application Prospect Exploration Online Seminar"},C=[{label:"数据通路加速",level:2},{label:"复杂系统设计案例",level:2},{label:"硬件设计流程",level:2},{label:"推荐阅读",level:2}],h=`

        2022 年 12 月 16 日，达坦科技联合 SpinalHDL 社区，举办了 SpinalHDL Webinar 2022。在题为《SpinalHDL 应用前景探索》的线上研讨会上，九位分享人在三个讨论分主题下做了各自领域内应用 Spinal HDL 的实践、挑战和经验的分享。

        +const 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l SpinalHDL应用前景探索线上研讨会",description:"2022年12月16日，达坦科技联合SpinalHDL社区，举办了SpinalHDL Webinar 2022。在题为《SpinalHDL应用前景探索》的线上研讨会上，九位分享人在三个讨论分主题下做了各自领域内应用Spinal HDL的实践、挑战和经验的分享。",location:"中国香港",date:"2022-12-12",title:"SpinalHDL Application Prospect Exploration Online Seminar"},h=[{label:"数据通路加速",level:2},{label:"复杂系统设计案例",level:2},{label:"硬件设计流程",level:2},{label:"推荐阅读",level:2}],C=`

        2022 年 12 月 16 日，达坦科技联合 SpinalHDL 社区，举办了 SpinalHDL Webinar 2022。在题为《SpinalHDL 应用前景探索》的线上研讨会上，九位分享人在三个讨论分主题下做了各自领域内应用 Spinal HDL 的实践、挑战和经验的分享。

        数据通路加速

        图片

        分享人：Tianrui Li

        @@ -21,12 +21,12 @@ const e="/zh-cn/assets/image1-b974e0d0.png",i="/zh-cn/assets/image2-599a44cc.jpg

        演讲主题: SpinalHDL in Computer Architecture Research. A) MicroRV32 Platform and B) FPGA-based Heterogeneous Real-Time Systems with RISC-V

        演讲摘要: The presentation covers two topics in which SpinalHDL aided in the Research of Computer Architecture. MicroRV32 is a RISC-V SoC Platform built with SpinalHDL for research and education aligned along a RISC-V Virtual Prototype in SystemC TLM. The second topic covers a topic on Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems. There the VexRiscv-based Murax SoC was used on an FPGA as a Heterogeneous Real-time System for a Case-Study.

        -

        图片

        +

        图片

        分享人：Distributed

        演讲主题: Title: Coding a microprogrammed protocol receiver in SpinalHDL

        演讲摘要: This presentation introduces a microcode-like approach to coding a communications protocol receiver used in flying, handheld and stationary 3D scanners. Decoding the protocol in random logic leads to unattractively high resource usage. Therefore, a microprogrammed approach was chosen where data out of preprogrammed memories controls the rather regularly organized data path. The talk highlights the construction of the microinstructions and their physical representation, showing how code evaluated at Scala runtime can be elegantly intertwined with Spinal code representing hardware.

        -

        图片

        +

        图片

        分享人：Dolu1990

        演讲主题: NaxRiscv : A Pipeline / Plugins / SpinalHDL / Scala mix

        演讲摘要: This presentation / live demo shows how the NaxRiscv project (Out-of-order / superscalar RISC-V CPU) mix Scala and the SpinalHDL API to describe its hardware. By many aspect, it goes beyond the VexRiscv project, and should provide some usefull / interresting design patterns for the public.

        @@ -48,9 +48,9 @@ const e="/zh-cn/assets/image1-b974e0d0.png",i="/zh-cn/assets/image2-599a44cc.jpg

        演讲摘要: The presentation shows how we can go from a simple plugin system for bus peripherals using register file generators to documentation using custom Sphinx plugins. Also shows some insight into ongoing development of a lab communication device for in-the-loop testing.

        对开源硬件感兴趣的朋友，欢迎添加小助手微信，加入达坦科技硬件群。

        -

        图片

        +

        图片

        目前达坦科技的硬件项目 TRIDENT，已经在 GitHub 上开源，欢迎参与讨论：
        https://github.com/datenlord/TRIDENT

        推荐阅读

        万字长文，详述 TRIDENT: Poseidon 哈希算法的硬件加速与实现！

        -

        精彩回顾｜硬件敏捷开发与验证方法学研讨

        `;export{g as assetURLs,h as default,l as metadata,C as toc}; +

        精彩回顾｜硬件敏捷开发与验证方法学研讨

        `;export{p as assetURLs,C as default,l as metadata,h as toc}; diff --git a/zh-cn/assets/index-c86a9a07.js b/zh-cn/assets/index-d72e9e88.js similarity index 86% rename from zh-cn/assets/index-c86a9a07.js rename to zh-cn/assets/index-d72e9e88.js index 81f5753..e6a2a97 100644 --- a/zh-cn/assets/index-c86a9a07.js +++ b/zh-cn/assets/index-d72e9e88.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-ccfdc2fa.jpg",e="/zh-cn/assets/image1-9be7272d.jpg",a="/zh-cn/assets/image2-20a7bcaa.jpg",n=[t,e,a],s={label:"DatenLord X Segmentfault直播预告 | CURP协议的工业化实践",description:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源的分布式KV存储Xline，针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性，方便业务系统实现多地多中心多活部署。",cover:"./cover.jpg",location:"新加坡",date:"2023-08-15",title:"DatenLord X Segmentfault Live Stream Preview l CURP Protocol in Industrial Practice"},o=[{label:"CURP 协议",level:2}],c=`

        图片

        +const t="/zh-cn/assets/cover-ccfdc2fa.jpg",e="/zh-cn/assets/image1-9be7272d.jpg",n="/zh-cn/assets/image2-20a7bcaa.jpg",a=[t,e,n],o={label:"DatenLord X Segmentfault直播预告 | CURP协议的工业化实践",description:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源的分布式KV存储Xline，针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性，方便业务系统实现多地多中心多活部署。",cover:"./cover.jpg",location:"新加坡",date:"2023-08-15",title:"DatenLord X Segmentfault Live Stream Preview l CURP Protocol in Industrial Practice"},s=[{label:"CURP 协议",level:2}],r=`

        图片

        CURP 协议

        传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord 推出开源的分布式 KV 存储 Xline，针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性，方便业务系统实现多地多中心多活部署。

        Xline 中所使用的共识协议，即非 Paxos ，也非 Raft，而是一种新的名为 Curp 的共识协议，其全称为 “Consistent Unordered Replication Protocol”。CURP 协议发表于 2019 年，其协议主要论述的是主从备份的场景，共识场景仅仅在附录中有简单表述，缺乏严肃验证。

        @@ -6,4 +6,4 @@ const t="/zh-cn/assets/cover-ccfdc2fa.jpg",e="/zh-cn/assets/image1-9be7272d.jpg"

        本次直播分享，达坦科技联合思否，邀请达坦科技的联合创始人兼 CTO 施继成做一个关于 CURP 协议的工业化实践的直播，分享将论述 CURP 协议的正确性，同时以 KV 存储软件 Xline 为例子讲述如何在工业产品中使用该共识算法。

        图片

        会议号：474-6575-9473

        -

        图片

        `;export{n as assetURLs,c as default,s as metadata,o as toc}; +

        图片

        `;export{a as assetURLs,r as default,o as metadata,s as toc}; diff --git a/zh-cn/assets/index-38e8d7df.js b/zh-cn/assets/index-dac1acc4.js similarity index 97% rename from zh-cn/assets/index-38e8d7df.js rename to zh-cn/assets/index-dac1acc4.js index 1f4cf8f..391d370 100644 --- a/zh-cn/assets/index-38e8d7df.js +++ b/zh-cn/assets/index-dac1acc4.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-3674aa81.jpg",s="/zh-cn/assets/image1-b73fb0ee.jpg",e=[t,s],n={label:"Rust唠嗑室：Xline-跨数据中心一致性管理",description:"随着互联网和云计算的业务规模越来越大，单个数据中心已经无法满足业务的需求，业务系统从单数据中心向多数据中心发展，多地多中心多活部署的需求也越来越普遍。多数据中心架构最大的挑战是，如何保证数据跨数据中心访问的一致性和性能。比如索引、权限、配置等这类需要跨数据中心共享访问的元数据，如何在多中心竞争修改的场景下，仍然能保持一致性，并且保证访问性能。",cover:"./cover.jpg",location:"中国香港",tags:["Xline"],date:"2022-10-11",title:"Rust Chat Room: Xline Cross Data Center Consistency Management"},o=[{label:"内容简介",level:2}],a=`

        图片

        +const t="/zh-cn/assets/cover-3674aa81.jpg",s="/zh-cn/assets/image1-b73fb0ee.jpg",e=[t,s],n={label:"Rust唠嗑室：Xline-跨数据中心一致性管理",description:"随着互联网和云计算的业务规模越来越大，单个数据中心已经无法满足业务的需求，业务系统从单数据中心向多数据中心发展，多地多中心多活部署的需求也越来越普遍。多数据中心架构最大的挑战是，如何保证数据跨数据中心访问的一致性和性能。比如索引、权限、配置等这类需要跨数据中心共享访问的元数据，如何在多中心竞争修改的场景下，仍然能保持一致性，并且保证访问性能。",cover:"./cover.jpg",location:"中国香港",tags:["Xline"],date:"2022-10-11",title:"Rust Chat Room_ Xline Cross Data Center Consistency Management"},o=[{label:"内容简介",level:2}],a=`

        图片

        内容简介

        随着互联网和云计算的业务规模越来越大，单个数据中心已经无法满足业务的需求，业务系统从单数据中心向多数据中心发展，多地多中心多活部署的需求也越来越普遍。多数据中心架构最大的挑战是，如何保证数据跨数据中心访问的一致性和性能。比如索引、权限、配置等这类需要跨数据中心共享访问的元数据，如何在多中心竞争修改的场景下，仍然能保持一致性，并且保证访问性能。

        传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord 推出开源的分布式 KV 存储 Xline，就是针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性，方便业务系统实现多地多中心多活部署。

        diff --git a/zh-cn/assets/index-4b956329.js b/zh-cn/assets/index-e197de7f.js similarity index 97% rename from zh-cn/assets/index-4b956329.js rename to zh-cn/assets/index-e197de7f.js index 9794106..2565054 100644 --- a/zh-cn/assets/index-4b956329.js +++ b/zh-cn/assets/index-e197de7f.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-12543354.png",s="/zh-cn/assets/image1-0a18e154.png",n="/zh-cn/assets/image2-e7e1943c.png",a="/zh-cn/assets/image3-5eef7eef.jpg",e=[t,s,n,a],l={label:"欢迎报名Rust China Hackathon 2022 达坦科技组",description:"12月4日下午，DatenLord就2022Rust China Hackathon大赛活动企业组（达坦科技组）的赛题进行了空中宣讲会。不仅对赛事流程进行了全面的讲解，同时对赛题背景以及完赛标准和要点进行了深入的剖析。会后更是设置问答环节，细致、详尽地解答了大家所提的各种问题，以便大家对赛题有更加充分的理解。",cover:"./cover.png",location:"中国香港",date:"2022-12-08",title:"Welcome to sign up for the Rust China Hackathon 2022 Datan Technology Group"},p=[{label:"赛事日程表",level:2},{label:"参赛福利",level:2},{label:"赛题评审",level:2},{label:"参赛及代码提交",level:2},{label:"赛题剖析",level:2},{label:"达坦科技 DatenLord 赛题",level:2}],o=`

        12 月 4 日下午，DatenLord 就 2022Rust China Hackathon 大赛活动企业组（达坦科技组）的赛题进行了空中宣讲会。不仅对赛事流程进行了全面的讲解，同时对赛题背景以及完赛标准和要点进行了深入的剖析。会后更是设置问答环节，细致、详尽地解答了大家所提的各种问题，以便大家对赛题有更加充分的理解。

        +const t="/zh-cn/assets/cover-12543354.png",s="/zh-cn/assets/image1-0a18e154.png",n="/zh-cn/assets/image2-e7e1943c.png",a="/zh-cn/assets/image3-5eef7eef.jpg",e=[t,s,n,a],l={label:"欢迎报名Rust China Hackathon 2022 达坦科技组",description:"12月4日下午，DatenLord就2022Rust China Hackathon大赛活动企业组（达坦科技组）的赛题进行了空中宣讲会。不仅对赛事流程进行了全面的讲解，同时对赛题背景以及完赛标准和要点进行了深入的剖析。会后更是设置问答环节，细致、详尽地解答了大家所提的各种问题，以便大家对赛题有更加充分的理解。",cover:"./cover.png",location:"中国香港",date:"2022-12-08",title:"Welcome to sign up for the Rust China Hackathon 2022 Datan Technology Group"},o=[{label:"赛事日程表",level:2},{label:"参赛福利",level:2},{label:"赛题评审",level:2},{label:"参赛及代码提交",level:2},{label:"赛题剖析",level:2},{label:"达坦科技 DatenLord 赛题",level:2}],p=`

        12 月 4 日下午，DatenLord 就 2022Rust China Hackathon 大赛活动企业组（达坦科技组）的赛题进行了空中宣讲会。不仅对赛事流程进行了全面的讲解，同时对赛题背景以及完赛标准和要点进行了深入的剖析。会后更是设置问答环节，细致、详尽地解答了大家所提的各种问题，以便大家对赛题有更加充分的理解。

        本届 Hackathon 为 Rust 中文社区举办的第一届的线上黑客马拉松，大赛主题为「RustForFun」，分为「社区组」与「企业组」。达坦科技作为本届 Hackathon 的协办方，赞助参与本次企业组赛道。希望借此机会激发大家对 Rust 语言的学习热情，提高应用 Rust 的能力，同时结识志趣相投的好友，一起进行思维的碰撞。

        赛事日程表

          @@ -62,4 +62,4 @@ Xline 是达坦科技推出的分布式元数据 KV 存储器。在使用中， }

          评估标准
          -你的实现应遵从上述 Trait 并满足上述要求。我们将使用一定基准测试来进行评估，并根据其结果评分。在基准测试中，我们将发送大量并发请求，因此你也可以创建自己的性能测试来帮助进行优化。

          `;export{e as assetURLs,o as default,l as metadata,p as toc}; +你的实现应遵从上述 Trait 并满足上述要求。我们将使用一定基准测试来进行评估，并根据其结果评分。在基准测试中，我们将发送大量并发请求，因此你也可以创建自己的性能测试来帮助进行优化。

          `;export{e as assetURLs,p as default,l as metadata,o as toc}; diff --git a/zh-cn/assets/index-9a698271.js b/zh-cn/assets/index-e5377dbd.js similarity index 91% rename from zh-cn/assets/index-9a698271.js rename to zh-cn/assets/index-e5377dbd.js index a5ae4d5..d72e177 100644 --- a/zh-cn/assets/index-9a698271.js +++ b/zh-cn/assets/index-e5377dbd.js @@ -1,4 +1,4 @@ -const i="/zh-cn/assets/cover-6865ae02.png",l=[i],t={label:"Xline v0.6.1： 一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。",cover:"./cover.png",location:"新疆",author:["准备开社区会议的"],tags:["Xline"],date:"2024-01-18",title:"Xline v0.6.1: a distributed KV store for metadata management"},e=[{label:"Xline是什么？我们为什么要做Xline？",level:2},{label:"V0.6.1版本有什么新功能？",level:2},{label:"社区会议",level:2}],n=`

          封面

          +const l="/zh-cn/assets/cover-6865ae02.png",i=[l],e={label:"Xline v0.6.1： 一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。",cover:"./cover.png",location:"新疆",author:["准备开社区会议的"],tags:["Xline"],date:"2024-01-18",title:"Xline v0.6.1_ a distributed KV store for metadata management"},t=[{label:"Xline是什么？我们为什么要做Xline？",level:2},{label:"V0.6.1版本有什么新功能？",level:2},{label:"社区会议",level:2}],n=`

          封面

          Xline是什么？我们为什么要做Xline？

          Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。 现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

          但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

          @@ -36,4 +36,4 @@ const i="/zh-cn/assets/cover-6865ae02.png",l=[i],t={label:"Xline v0.6.1： 一 会议号: 874 4309 5241 密码: 124294 会议链接： -https://zoom.us/j/87443095241?pwd=r3uJhJ9cb0caovHRsi1ay2pFuhBA1Q.1

          `;export{l as assetURLs,n as default,t as metadata,e as toc}; +https://zoom.us/j/87443095241?pwd=r3uJhJ9cb0caovHRsi1ay2pFuhBA1Q.1

          `;export{i as assetURLs,n as default,e as metadata,t as toc}; diff --git a/zh-cn/assets/index-7df91a5f.js b/zh-cn/assets/index-e7093119.js similarity index 98% rename from zh-cn/assets/index-7df91a5f.js rename to zh-cn/assets/index-e7093119.js index fc0ec2a..9a572d6 100644 --- a/zh-cn/assets/index-7df91a5f.js +++ b/zh-cn/assets/index-e7093119.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/image1-9c4bd64f.png",a="/zh-cn/assets/image2-ce452a63.png",n="/zh-cn/assets/image3-a687fa21.png",r=[s,a,n],e={label:"io_uring Rust 异步库实现方法",description:"io_uring 是 Linux 最新的异步 I/O 接口，采用两个用户和内核共享的 ring buffer 进行交互，性能优于之前的接口且限制更少。虽然 io_uring 仍然处于开发迭代中，但是基本的 I/O 接口已经基本定型，作为高效系统语言的 Rust 则成为使用该接口的不二之选。现在已经有许多针对 io_uring 的 Rust 封装，但是有的存在soundness问题，有的存在性能问题，都不是安全高效 I/O 的好选项。我们团队（DatenLord）也进行了自己的尝试，本文就是介绍我们的 io_uring 异步库实现方法。",location:"河南",author:["施继成"],editor:["张汉东"],tags:["Rust"],date:"2022-05-27",title:"io_uring Rust Asynchronous Library Implementation"},o=[{label:"简介",level:2},{label:"Rust 现有异步模式",level:2},{label:"io_uring Rust 底层封装",level:2},{label:"io_uring 异步模式",level:2},{label:"io_uring Proactor 设计",level:2},{label:"内存安全",level:2},{label:"总结",level:2}],i=`

          简介

          +const s="/zh-cn/assets/image1-9c4bd64f.png",a="/zh-cn/assets/image2-ce452a63.png",n="/zh-cn/assets/image3-a687fa21.png",r=[s,a,n],e={label:"io_uring Rust 异步库实现方法",description:"io_uring 是 Linux 最新的异步 I/O 接口，采用两个用户和内核共享的 ring buffer 进行交互，性能优于之前的接口且限制更少。虽然 io_uring 仍然处于开发迭代中，但是基本的 I/O 接口已经基本定型，作为高效系统语言的 Rust 则成为使用该接口的不二之选。现在已经有许多针对 io_uring 的 Rust 封装，但是有的存在soundness问题，有的存在性能问题，都不是安全高效 I/O 的好选项。我们团队（DatenLord）也进行了自己的尝试，本文就是介绍我们的 io_uring 异步库实现方法。",location:"河南",author:["施继成"],editor:["张汉东"],tags:["Rust"],date:"2022-05-27",title:"io_uring Rust Asynchronous Library Implementation"},o=[{label:"简介",level:2},{label:"Rust 现有异步模式",level:2},{label:"io_uring Rust 底层封装",level:2},{label:"io_uring 异步模式",level:2},{label:"io_uring Proactor 设计",level:2},{label:"内存安全",level:2},{label:"总结",level:2}],t=`

          简介

          io_uring 是 Linux 最新的异步 I/O 接口，采用两个用户和内核共享的 ring buffer 进行交互，性能优于之前的接口且限制更少。虽然 io_uring 仍然处于开发迭代中，但是基本的 I/O 接口已经基本定型，作为高效系统语言的 Rust 则成为使用该接口的不二之选。现在已经有许多针对 io_uring 的 Rust 封装，但是有的存在 soundness 问题，有的存在性能问题，都不是安全高效 I/O 的好选项。我们团队（DatenLord）也进行了自己的尝试，本文就是介绍我们的 io_uring 异步库实现方法。

          Rust 现有异步模式

          Rust 的异步库都有自己的异步 I/O 实现方法，但是内部原理大同小异，都是 Reactor 模式，如下图所示:

          @@ -32,4 +32,4 @@ const s="/zh-cn/assets/image1-9c4bd64f.png",a="/zh-cn/assets/image2-ce452a63.png

          在该接口中用户会在 I/O 操作过程中交出 buffer 所有权，在任务完成时返还 buffer 所有权。

          总结

          现有的 Rust 异步 I/O 模型（Reactor）其实分为两步，第一步由操作系统通知用户哪些 fd 可以使用，第二步再由用户完成 I/O 操作，操作系统仅仅负责通知，真正干活的还是用户自己。区别于该 I/O 模型，io_uring 的 I/O 模型为 Proactor，所有的异步 I/O 请求都是操作系统来完成，用户仅仅需要发送请求和接收结果。

          -

          我们 DatenLord 团队在充分考虑了 io_uring 特点和 Rust 语言的需求后实现了一个 io_uring 的异步库。这个库同时照顾到性能和易用性，方便用户迁移现有代码，同时该库不依赖于任何一部框架，可以和绝大多数已知的异步框架一起使用。

          `;export{r as assetURLs,i as default,e as metadata,o as toc}; +

          我们 DatenLord 团队在充分考虑了 io_uring 特点和 Rust 语言的需求后实现了一个 io_uring 的异步库。这个库同时照顾到性能和易用性，方便用户迁移现有代码，同时该库不依赖于任何一部框架，可以和绝大多数已知的异步框架一起使用。

          `;export{r as assetURLs,t as default,e as metadata,o as toc}; diff --git a/zh-cn/assets/index-ef64e907.js b/zh-cn/assets/index-ef64e907.js new file mode 100644 index 0000000..48135a3 --- /dev/null +++ b/zh-cn/assets/index-ef64e907.js @@ -0,0 +1,100 @@ +const p="/zh-cn/assets/cover-7357bfdb.png",l="/zh-cn/assets/image1-cce42aaf.png",t="/zh-cn/assets/image-f331755a.png",i=[p,l,t],o={label:"【最新招聘】3！2！1！Offer上链接！",description:"我们是谁？达坦科技始终致力于打造高性能Al+ Cloud 基础设施平台DatenLord，积极推动AI应用的落地。DatenLord通过软硬件深度融合的方式，提供高性能存储和高性能网络。为AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对AI+Cloud 的需求。",cover:"./cover.png",location:"中国香港",date:"2024-06-27",title:"Latest Recruitment 3 2 1 Offer Link"},n=[{label:"我们是怎样一群人",level:2},{label:"我们的公司文化是怎样的",level:2},{label:"达坦科技最新开放招聘岗位",level:2},{label:"面试流程及薪资待遇",level:2}],s=`

          我们是谁？

          +

          达坦科技始终致力于打造高性能Al+ Cloud 基础设施平台DatenLord，积极推动AI应用的落地。DatenLord通过软硬件深度融合的方式，提供高性能存储和高性能网络。为AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对AI+Cloud 的需求。 +图片

          +

          我们是怎样一群人

          +

          达坦科技创始团队均来自谷歌、微软、阿里等知名科技公司，团队成员都是一群喜欢并勇于探索前沿技术的同学，大家因为对技术的热爱而聚到一起。 +在这里我们不局限于工作职责本身，更鼓励大家能勤于思考学习，找到自己感兴趣的事情，创造更多价值。

          +

          我们的公司文化是怎样的

          +

          持续学习 持之以恒的自驱学习，求真求致

          +

          积极主动 遇到问题主动踏出第一步，做先行者而不是追随者

          +

          精益求精 对自己高标准严要求，对创新有极致追求 +与一群真正热爱自己所做的事情并追求挑战的人为伍！

          +

          达坦科技最新开放招聘岗位

          +

          职位名称：机器学习实习工程师

          +

          职位类型：实习

          +

          工作时间：全职/兼职

          +

          职位描述：

          +

          我们正在寻找一位充满热情并有志于在机器学习领域发展的实习工程师，加入我们的技术团队。作为机器学习实习工程师，你将有机会参与实际项目，应用最新的机器学习技术，并在资深工程师的指导下不断提升自己的技能。

          +

          主要职责：

          +
            +
          • +

            参与机器学习模型的设计、开发和优化

            +
            • +
          • +

            参与数据预处理、特征工程和数据可视化

            +
            • +
          • +

            参与收集、清洗和分析大型数据集

            +
            • +
          • +

            实施和评估机器学习算法和模型

            +
            • +
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            编写高质量、可维护的代码

            +
            • +
          • +

            参与团队讨论，分享研究成果和技术难点

            +
            • +
          • +

            撰写技术文档和报告

            +
            • +
          +

          职位要求：

          +
            +
          • +

            计算机科学、数据科学、人工智能或相关专业的本科或研究生在读

            +
            • +
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            对机器学习和数据科学有浓厚的兴趣，并有相关课程或项目经验

            +
            • +
          • +

            熟悉Python编程语言及相关数据科学库（如NumPy、Pandas、Scikit-learn等）

            +
            • +
          • +

            了解常见的机器学习算法（如线性回归、决策树、SVM、神经网络等）

            +
            • +
          • +

            良好的数据处理和分析能力

            +
            • +
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            较强的逻辑思维和问题解决能力

            +
            • +
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            良好的团队合作和沟通能力

            +
            • +
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            有相关实习或项目经验者优先

            +
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          +

          加分项：

          +
            +
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            熟悉深度学习框架（如TensorFlow、PyTorch等）

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            了解自然语言处理、计算机视觉或强化学习等领域的相关知识

            +
            • +
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            有Kaggle竞赛经验或公开发布的机器学习项目

            +
            • +
          +

          面试流程及薪资待遇

          +

          【如何申请】

          +

          有意向的同学可以发送简历至：info@datenlord.com

          +

          或者添加达坦科技小助手微信：DatenLord_Tech +【面试流程】

          +

          简历评估合格后，面试流程为： +图片 +具体面试流程会根据候选人的情况略有调整。

          +

          【薪资待遇】

          +

          **实习生：**入职初期为300元/天，如能力和产出优秀将予以薪资调增，最高500元/天。

          +

          **正式员工：**对标国内一线大厂的薪资+期权，待面试通过后根据能力情况确定。

          +

          【更多官方信息】

          +

          【公众号】达坦科技DatenLord

          +

          【知乎账号】

          +

          https://www.zhihu.com/org/da-tan-ke-ji

          +

          【B站】

          +

          https://space.bilibili.com/2017027518

          +

          我们相信物以类聚、人以群分，希望找到同样富有激情的你，一起成长~

          +

          更多信息，可扫描下方二维码加微信咨询： +图片

          `;export{i as assetURLs,s as default,o as metadata,n as toc}; diff --git a/zh-cn/assets/index-9edebc8f.js b/zh-cn/assets/index-f210af05.js similarity index 98% rename from zh-cn/assets/index-9edebc8f.js rename to zh-cn/assets/index-f210af05.js index 5b7b69e..82a4c53 100644 --- a/zh-cn/assets/index-9edebc8f.js +++ b/zh-cn/assets/index-f210af05.js @@ -1,4 +1,4 @@ -const v="/zh-cn/assets/cover-92745c95.jpg",e="/zh-cn/assets/image1-638abd39.png",s="/zh-cn/assets/image2-2a8f796e.gif",p="/zh-cn/assets/image3-ae1841b7.png",a="/zh-cn/assets/image4-5bf432ec.png",n="/zh-cn/assets/image5-81eb5b8d.png",l="/zh-cn/assets/image6-537c8738.png",o="/zh-cn/assets/image7-b58de99e.png",i="/zh-cn/assets/image8-c6334c83.png",t="/zh-cn/assets/image9-6340ddaa.png",c="/zh-cn/assets/image10-ac1b70de.png",r="/zh-cn/assets/image11-1f1870d2.png",_="/zh-cn/assets/image12-01c249ea.png",m="/zh-cn/assets/image13-a48112ad.png",u="/zh-cn/assets/image14-d780d4f2.png",d="/zh-cn/assets/image15-f58a4d86.png",h="/zh-cn/assets/image16-79c3985b.png",k="/zh-cn/assets/image17-863e7adb.png",f="/zh-cn/assets/image18-931263d9.png",g="/zh-cn/assets/image19-8f35c101.png",P="/zh-cn/assets/image20-ef5a452f.png",j="/zh-cn/assets/image21-ebff1568.png",b="/zh-cn/assets/image22-b3b3dbaa.png",F="/zh-cn/assets/image23-12fff2c5.png",w=[v,e,s,p,a,n,l,o,i,t,c,r,_,m,u,d,h,k,f,g,P,j,b,F],T={label:"数据流式编程在硬件设计中的应用",description:"数据流式编程（Dataflow Programming）是一种存在已久的程序设计范式，可以追溯到19世纪60年代，由MIT的Jack Dennis教授开创。",cover:"./cover.jpg",location:"中国香港",author:["米明恒"],tags:["硬件加速"],date:"2023-10-26",title:"Application of data flow programming in hardware design"},y=[{label:"数据流式编程的思想",level:2},{label:"数据流式编程思想简介",level:3},{label:"软件开发中的数据流式编程思想",level:3},{label:"软件数据流 vs 硬件数据流",level:3},{label:"数据流思想与状态机思想的对比",level:3},{label:"Bluespec 语言及其流式编程框架 PAClib",level:2},{label:"Bluespec SystemVerilog(BSV)和 PAClib 简介",level:3},{label:"PAClib 中的基础开发组件",level:3},{label:"IFFT 应用实例",level:2},{label:"需求背景",level:3},{label:"代码实现",level:3},{label:"写在最后",level:2}],I=`

          数据流式编程的思想

          +const v="/zh-cn/assets/cover-92745c95.jpg",e="/zh-cn/assets/image1-638abd39.png",s="/zh-cn/assets/image2-2a8f796e.gif",p="/zh-cn/assets/image3-ae1841b7.png",a="/zh-cn/assets/image4-5bf432ec.png",n="/zh-cn/assets/image5-81eb5b8d.png",l="/zh-cn/assets/image6-537c8738.png",o="/zh-cn/assets/image7-b58de99e.png",i="/zh-cn/assets/image8-c6334c83.png",t="/zh-cn/assets/image9-6340ddaa.png",c="/zh-cn/assets/image10-ac1b70de.png",r="/zh-cn/assets/image11-1f1870d2.png",_="/zh-cn/assets/image12-01c249ea.png",m="/zh-cn/assets/image13-a48112ad.png",d="/zh-cn/assets/image14-d780d4f2.png",u="/zh-cn/assets/image15-f58a4d86.png",h="/zh-cn/assets/image16-79c3985b.png",k="/zh-cn/assets/image17-863e7adb.png",f="/zh-cn/assets/image18-931263d9.png",g="/zh-cn/assets/image19-8f35c101.png",b="/zh-cn/assets/image20-ef5a452f.png",j="/zh-cn/assets/image21-ebff1568.png",P="/zh-cn/assets/image22-b3b3dbaa.png",F="/zh-cn/assets/image23-12fff2c5.png",w=[v,e,s,p,a,n,l,o,i,t,c,r,_,m,d,u,h,k,f,g,b,j,P,F],T={label:"数据流式编程在硬件设计中的应用",description:"数据流式编程（Dataflow Programming）是一种存在已久的程序设计范式，可以追溯到19世纪60年代，由MIT的Jack Dennis教授开创。",cover:"./cover.jpg",location:"中国香港",author:["米明恒"],tags:["硬件加速"],date:"2023-10-26",title:"Application of data flow programming in hardware design"},S=[{label:"数据流式编程的思想",level:2},{label:"数据流式编程思想简介",level:3},{label:"软件开发中的数据流式编程思想",level:3},{label:"软件数据流 vs 硬件数据流",level:3},{label:"数据流思想与状态机思想的对比",level:3},{label:"Bluespec 语言及其流式编程框架 PAClib",level:2},{label:"Bluespec SystemVerilog(BSV)和 PAClib 简介",level:3},{label:"PAClib 中的基础开发组件",level:3},{label:"IFFT 应用实例",level:2},{label:"需求背景",level:3},{label:"代码实现",level:3},{label:"写在最后",level:2}],I=`

          数据流式编程的思想

          数据流式编程思想简介

          数据流式编程（Dataflow Programming）是一种存在已久的程序设计范式，可以追溯到 19 世纪 60 年代，由 MIT 的 Jack Dennis 教授开创。

          图片

          @@ -158,7 +158,7 @@ endinterface PipeOut #(Tuple2 #(a, Bool)) poa) (PipeOut #(b)); -

          图片

          +

          图片

          图 14 mkIfThenElse 节点示意图

          mkIfThenElse 可以实现分支逻辑。输入数据是一个 Tuple2#(a, Bool)类型，该节点会根据 Bool 类型的取值将数据包路由到 pipeT 或者 pipeF 子节点。其内部具有一个 FIFO 结构用于存储 Token，从而实现在 pipeT 和 pipeF 两个节点所需处理周期不一致时起到保序的作用。

          此外，PAClib 中还提供了 mkIfThenElse_unordered 变种实现，当对输入和输出之间的数据没有严格的顺序要求时，可以使用这个变种来简化设计。For 循环 使用 mkForLoop 可以创建条件分支，其定义及示意图如下：

          @@ -170,7 +170,7 @@ endinterface (PipeOut #(b)) provisos (Bits #(a, sa)); -

          图片

          +

          图片

          图 15 mkForLoop 节点示意图

          mkForLoop 需要通过 n_iters 参数传入循环次数。在实现逻辑上，Loop Control Logic 内部有一个共享队列，外部进入的新数据和经过循环体执行过一次处理的数据，都会被放到这个队列中。每个新进入的数据都会被打上一个 Tag，Tag 的值为循环次数，这个 Tag 伴随着数据在循环中流动，每流动一次，Tag 减一，Loop Control Logic 在从共享队列中取出数据时，会根据 Tag 的计数值决定将其送入 mkLoopBody 节点还是 mkFinal 节点。内部有两条 Rule，分别独立负责把新数据和正在循环的数据放入 FIFO 中，为循环提供了内在动力（图中 Pump 标注路径）。

          注意，由于 mkLoopBody 也可能是一个需要多拍才能完成的节点，因此可以有多个数据包同时在流水线中进行循环。

          @@ -261,7 +261,7 @@ endfunction f_radix4 (stagenum), param_buf_unfunnel); -

          图片

          +

          图片

          如上述代码片段和图 20 所示，通过 mkMap_fn_with_funnel_indexed 函数的第一个参数来决定实例化多少个 f_radix4 计算单元，从而改变计算的并行度。

              let permuter = mkFn_to_Pipe_Buffered (False, f_permute,
                                             param_buf_permuter_output);
@@ -273,7 +273,7 @@ endfunction
                         mkCompose (mapper,
                                     mkCompose (ungrouper, permuter)));
          -

          图片

          +

          图片

          图 22 节点的串联

          如上述代码片段和图 22 所示，通过 mkCompose 可以实现多个 Node 之间的顺序连接。

          图片

          @@ -286,4 +286,4 @@ endfunction

          参考资料：

          [1] https://en.wikipedia.org/wiki/Dataflow_programming

          [2] Rishiyur S. Nikhil. Two uses of FP techniques in HW design[EB/OL]. 2010[].

          -

          http://www.cs.ox.ac.uk/ralf.hinze/WG2.8/27/slides/rishiyur2.pdf.

          `;export{w as assetURLs,I as default,T as metadata,y as toc}; +

          http://www.cs.ox.ac.uk/ralf.hinze/WG2.8/27/slides/rishiyur2.pdf.

          `;export{w as assetURLs,I as default,T as metadata,S as toc}; diff --git a/zh-cn/index.html b/zh-cn/index.html index 26875ab..7f5b06e 100644 --- a/zh-cn/index.html +++ b/zh-cn/index.html @@ -5,7 +5,7 @@ 达坦科技 - +