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v="/zh-cn/assets/cover-92745c95.jpg",e="/zh-cn/assets/image1-638abd39.png",s="/zh-cn/assets/image2-2a8f796e.gif",p="/zh-cn/assets/image3-ae1841b7.png",a="/zh-cn/assets/image4-5bf432ec.png",n="/zh-cn/assets/image5-81eb5b8d.png",l="/zh-cn/assets/image6-537c8738.png",o="/zh-cn/assets/image7-b58de99e.png",i="/zh-cn/assets/image8-c6334c83.png",t="/zh-cn/assets/image9-6340ddaa.png",c="/zh-cn/assets/image10-ac1b70de.png",r="/zh-cn/assets/image11-1f1870d2.png",_="/zh-cn/assets/image12-01c249ea.png",d="/zh-cn/assets/image13-a48112ad.png",m="/zh-cn/assets/image14-d780d4f2.png",u="/zh-cn/assets/image15-f58a4d86.png",h="/zh-cn/assets/image16-79c3985b.png",k="/zh-cn/assets/image17-863e7adb.png",f="/zh-cn/assets/image18-931263d9.png",g="/zh-cn/assets/image19-8f35c101.png",P="/zh-cn/assets/image20-ef5a452f.png",b="/zh-cn/assets/image21-ebff1568.png",j="/zh-cn/assets/image22-b3b3dbaa.png",F="/zh-cn/assets/image23-12fff2c5.png",w=[v,e,s,p,a,n,l,o,i,t,c,r,_,d,m,u,h,k,f,g,P,b,j,F],T={label:"数据流式编程在硬件设计中的应用",description:"数据流式编程（Dataflow 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数据流式编程的思想

+const v="/zh-cn/assets/cover-92745c95.jpg",e="/zh-cn/assets/image1-638abd39.png",s="/zh-cn/assets/image2-2a8f796e.gif",p="/zh-cn/assets/image3-ae1841b7.png",a="/zh-cn/assets/image4-5bf432ec.png",n="/zh-cn/assets/image5-81eb5b8d.png",l="/zh-cn/assets/image6-537c8738.png",o="/zh-cn/assets/image7-b58de99e.png",i="/zh-cn/assets/image8-c6334c83.png",t="/zh-cn/assets/image9-6340ddaa.png",c="/zh-cn/assets/image10-ac1b70de.png",r="/zh-cn/assets/image11-1f1870d2.png",_="/zh-cn/assets/image12-01c249ea.png",m="/zh-cn/assets/image13-a48112ad.png",d="/zh-cn/assets/image14-d780d4f2.png",u="/zh-cn/assets/image15-f58a4d86.png",h="/zh-cn/assets/image16-79c3985b.png",k="/zh-cn/assets/image17-863e7adb.png",f="/zh-cn/assets/image18-931263d9.png",g="/zh-cn/assets/image19-8f35c101.png",P="/zh-cn/assets/image20-ef5a452f.png",b="/zh-cn/assets/image21-ebff1568.png",j="/zh-cn/assets/image22-b3b3dbaa.png",F="/zh-cn/assets/image23-12fff2c5.png",w=[v,e,s,p,a,n,l,o,i,t,c,r,_,m,d,u,h,k,f,g,P,b,j,F],T={label:"数据流式编程在硬件设计中的应用",description:"数据流式编程（Dataflow Programming）是一种存在已久的程序设计范式，可以追溯到19世纪60年代，由MIT的Jack Dennis教授开创。",cover:"./cover.jpg",location:"中国香港",author:["米明恒"],tags:["硬件加速"],date:"2023-10-26",title:"Application of data flow programming in hardware design"},y=[{label:"数据流式编程的思想",level:2},{label:"数据流式编程思想简介",level:3},{label:"软件开发中的数据流式编程思想",level:3},{label:"软件数据流 vs 硬件数据流",level:3},{label:"数据流思想与状态机思想的对比",level:3},{label:"Bluespec 语言及其流式编程框架 PAClib",level:2},{label:"Bluespec SystemVerilog(BSV)和 PAClib 简介",level:3},{label:"PAClib 中的基础开发组件",level:3},{label:"IFFT 应用实例",level:2},{label:"需求背景",level:3},{label:"代码实现",level:3},{label:"写在最后",level:2}],I=`

数据流式编程的思想

数据流式编程思想简介

数据流式编程（Dataflow Programming）是一种存在已久的程序设计范式，可以追溯到 19 世纪 60 年代，由 MIT 的 Jack Dennis 教授开创。

图片

@@ -147,7 +147,7 @@ endinterface PipeOut #(b) pob ) (PipeOut #(c)); -

图片

+

图片

图 13 mkFork 与 mkJoin 节点的示意图

mkFork 和 mkJoin 可以创建简单的并行结构，通过用户自己提供的函数 fork_fn 和 join_fn，由用户决定如何将一个输入数据流拆分成 2 个输出数据流，以及如何把两个输入数据流合并为一个输出数据流。对于 Join 操作而言，要求两个输入端口上均存在数据时，该 Node 才可以执行操作，如果两条路径上处理数据所需的时钟周期数不一致，则 Join 节点会进行等待，直到两个输入都有数据为止。此外，PAClib 中还提供了多种 Fork 节点的变种实现，可以自行了解。

条件分支操作

@@ -158,7 +158,7 @@ endinterface PipeOut #(Tuple2 #(a, Bool)) poa) (PipeOut #(b)); -

图片

+

图片

图 14 mkIfThenElse 节点示意图

mkIfThenElse 可以实现分支逻辑。输入数据是一个 Tuple2#(a, Bool)类型，该节点会根据 Bool 类型的取值将数据包路由到 pipeT 或者 pipeF 子节点。其内部具有一个 FIFO 结构用于存储 Token，从而实现在 pipeT 和 pipeF 两个节点所需处理周期不一致时起到保序的作用。

此外，PAClib 中还提供了 mkIfThenElse_unordered 变种实现，当对输入和输出之间的数据没有严格的顺序要求时，可以使用这个变种来简化设计。For 循环 使用 mkForLoop 可以创建条件分支，其定义及示意图如下：

@@ -286,4 +286,4 @@ endfunction

参考资料：

[1] https://en.wikipedia.org/wiki/Dataflow_programming

[2] Rishiyur S. Nikhil. Two uses of FP techniques in HW design[EB/OL]. 2010[].

-

http://www.cs.ox.ac.uk/ralf.hinze/WG2.8/27/slides/rishiyur2.pdf.

`;export{w as assetURLs,y as default,T as metadata,I as toc}; +

http://www.cs.ox.ac.uk/ralf.hinze/WG2.8/27/slides/rishiyur2.pdf.

`;export{w as assetURLs,I as default,T as metadata,y as toc}; diff --git a/zh-cn/assets/index-3a32ad00.js b/zh-cn/assets/index-043be87f.js similarity index 94% rename from zh-cn/assets/index-3a32ad00.js rename to zh-cn/assets/index-043be87f.js index b08b9fe..cdbb6b7 100644 --- a/zh-cn/assets/index-3a32ad00.js +++ b/zh-cn/assets/index-043be87f.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/cover-39643179.png",e="/zh-cn/assets/image1-a93ba076.jpg",t="/zh-cn/assets/image2-4624885a.gif",p="/zh-cn/assets/image3-ea54df7e.jpg",a=[s,e,t,p],l={label:"直播预告 | RDMA软件接口高层封装",description:"RDMA 作为高速通信协议被数据中心广泛使用，但是因为底层接口设计得过于繁复，对使用者造成了很大的不便，因此我们使用 Rust 语言对 RDMA 进行了一层高层封装。这次分享将介绍这层封装的做法和原理。",cover:"./cover.png",location:"香港",date:"2022-05-17",title:"RDMA Software Interface High Level Package"},c=[{label:"嘉宾介绍",level:2},{label:"讨论内容",level:2},{label:"观看方式",level:2},{label:"特别鸣谢",level:2}],n=`

嘉宾介绍

+const s="/zh-cn/assets/cover-39643179.png",e="/zh-cn/assets/image1-a93ba076.jpg",t="/zh-cn/assets/image2-4624885a.gif",p="/zh-cn/assets/image3-ea54df7e.jpg",a=[s,e,t,p],c={label:"直播预告 | RDMA软件接口高层封装",description:"RDMA 作为高速通信协议被数据中心广泛使用，但是因为底层接口设计得过于繁复，对使用者造成了很大的不便，因此我们使用 Rust 语言对 RDMA 进行了一层高层封装。这次分享将介绍这层封装的做法和原理。",cover:"./cover.png",location:"香港",date:"2022-05-17",title:"RDMA Software Interface High Level Package"},l=[{label:"嘉宾介绍",level:2},{label:"讨论内容",level:2},{label:"观看方式",level:2},{label:"特别鸣谢",level:2}],n=`

嘉宾介绍

施继成

达坦科技联合创始人兼 CTO，复旦大学软件工程本硕，师从华为基础软件首席科学家、鸿蒙实验室主任陈海波教授。擅长操作系统内核开发、分布式系统、嵌入式系统，对分布式数据一致性有钻深的研究，发表多篇操作系统内核相关论文，累计数百次引用。毕业后曾在谷歌中国、微软亚太和阿里巴巴等公司从事分布式计算和存储等相关工作。入选 2022 年度 6 氪 S 级创业者名册，荣获中国“企业工具与底层软件”领域 “36 位 36 岁以下创业者“称号。

讨论内容

@@ -17,4 +17,4 @@ const s="/zh-cn/assets/cover-39643179.png",e="/zh-cn/assets/image1-a93ba076.jpg"

转发本文，文末留言提问、加群提问、或者现场提问，我们将赠送 1 本书，数量有限，送完为止。

↓ 扫码加入本次直播交流群；

图片

-

咨询的小伙伴，可添加小月@阅码场的微信 Linuxer2016 咨询

`;export{a as assetURLs,n as default,l as metadata,c as toc}; +

咨询的小伙伴，可添加小月@阅码场的微信 Linuxer2016 咨询

`;export{a as assetURLs,n as default,c as metadata,l as toc}; diff --git a/zh-cn/assets/index-28199dec.js b/zh-cn/assets/index-067c93db.js similarity index 94% rename from zh-cn/assets/index-28199dec.js rename to zh-cn/assets/index-067c93db.js index f78ee0d..1445393 100644 --- a/zh-cn/assets/index-28199dec.js +++ b/zh-cn/assets/index-067c93db.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/cover-6865ae02.png",i=[l],e={label:"Xline v0.6.1： 一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。",cover:"./cover.png",location:"新疆",author:["准备开社区会议的"],tags:["Xline"],date:"2024-01-18",title:"Xline v0.6.1: a distributed KV store for metadata management"},t=[{label:"Xline是什么？我们为什么要做Xline？",level:2},{label:"V0.6.1版本有什么新功能？",level:2},{label:"社区会议",level:2}],n=`

封面

+const l="/zh-cn/assets/cover-6865ae02.png",i=[l],t={label:"Xline v0.6.1： 一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。",cover:"./cover.png",location:"新疆",author:["准备开社区会议的"],tags:["Xline"],date:"2024-01-18",title:"Xline v0.6.1: a distributed KV store for metadata management"},e=[{label:"Xline是什么？我们为什么要做Xline？",level:2},{label:"V0.6.1版本有什么新功能？",level:2},{label:"社区会议",level:2}],n=`

封面

Xline是什么？我们为什么要做Xline？

Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。 现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个RTT，从而提高性能。因此，Xline旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

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`;export{i as assetURLs,n as default,e as metadata,t as toc}; +https://zoom.us/j/87443095241?pwd=r3uJhJ9cb0caovHRsi1ay2pFuhBA1Q.1

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封面

+const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png",i="/zh-cn/assets/image2-1161bb88.png",a="/zh-cn/assets/image3-136f9458.png",e="/zh-cn/assets/image4-75f70bf1.png",o="/zh-cn/assets/image5-64f0abbf.png",n="/zh-cn/assets/image6-29b079bb.png",t="/zh-cn/assets/image7-f8d2626b.png",s="/zh-cn/assets/image8-d242f7b7.png",c="/zh-cn/assets/image9-5e691a52.png",r="/zh-cn/assets/image10-b3a0ad40.png",g="/zh-cn/assets/image11-98ffaf6b.png",H="/zh-cn/assets/image13-d816729e.png",D="/zh-cn/assets/image14-20340934.png",h="/zh-cn/assets/image15-512cff4d.png",L="/zh-cn/assets/image16-ee33a0ea.png",S="/zh-cn/assets/image17-e2c28396.png",m="/zh-cn/assets/image18-69fe4409.png",C="/zh-cn/assets/image19-dfed79f8.png",V="/zh-cn/assets/image20-a636b8b5.png",b="/zh-cn/assets/image21-487e6dd2.png",y="/zh-cn/assets/image22-27167bbd.png",d="/zh-cn/assets/image23-8660cc2c.png",P="/zh-cn/assets/image24-4d2461fd.png",f="/zh-cn/assets/image25-3af02a99.png",A="/zh-cn/assets/image26-a854b9f0.png",z="/zh-cn/assets/image27-5b3ff402.png",v="/zh-cn/assets/image28-f02ef5c0.png",I="/zh-cn/assets/image29-44cafcf0.png",R=[l,p,i,a,e,o,n,t,s,c,r,g,H,D,h,L,S,m,C,V,b,y,d,P,f,A,z,v,I],u={label:"使用SpinalHDL和Cocotb进行敏捷数字芯片设计和验证",description:"领域特定架构已成为计算机发展的一种趋势。在提供更高效算力的同时，它也给底层硬件的开发带来了更大的挑战。传统的芯片设计和验证技术已越来越无法应对这些新的要求和挑战。在芯片设计上，本文将介绍如何使用SpinalHDL，一种基于Scala的新型硬件描述语言（HDL），或者更准确地说是硬件构造语言，提高硬件设计的效率和质量。对于SpinalHDL，本文还介绍了如何利用Scala的类型系统高效地进行复杂硬件的设计。对于验证，本文将介绍基于Python的验证环境Cocotb，以及如何利用Python简洁高效的语言特性及其繁荣的开源社区，提升芯片验证的效率。",cover:"./cover.jpg",location:"新疆",author:["翁万正等"],date:"2024-01-25",title:"Agile Digital Chip Design and Verification with SpinalHDL and Cocotb"},w=[{label:"引言",level:2},{label:"1.1 背景",level:3},{label:"1.2 HDL的演变",level:3},{label:"SpinalHDL",level:2},{label:"2.1 SpinalHDL简介",level:3},{label:"2.2 与传统HDL相同的描述粒度",level:3},{label:"2.3 SpinalHDL相比传统HDL的优势",level:3},{label:"基于元语言构建数字逻辑电路",level:2},{label:"3.1 元语言的概念",level:3},{label:"3.2 硬件设计中的高级类型系统",level:3},{label:"3.3 SpinalHDL之外",level:3},{label:"3.4 HCL的编译流程",level:3},{label:"基于Cocotb的验证",level:2},{label:"4.1 Cocotb简介",level:3},{label:"4.2 基于Cocotb硬件验证的优势",level:3},{label:"4.3 基于Cocotb的验证示例",level:3},{label:"4.3.3 启动仿真",level:3},{label:"结论",level:2},{label:"参考文章",level:2}],B=`

封面

摘要：
领域特定架构已成为计算机发展的一种趋势。在提供更高效算力的同时，它也给底层硬件的开发带来了更大的挑战。传统的芯片设计和验证技术已越来越无法应对这些新的要求和挑战。在芯片设计上，本文将介绍如何使用SpinalHDL，一种基于Scala的新型硬件描述语言（HDL），或者更准确地说是硬件构造语言，提高硬件设计的效率和质量。对于SpinalHDL，本文还介绍了如何利用Scala的类型系统高效地进行复杂硬件的设计。对于验证，本文将介绍基于Python的验证环境Cocotb，以及如何利用Python简洁高效的语言特性及其繁荣的开源社区，提升芯片验证的效率。

引言

@@ -114,17 +114,17 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"

和类型、产品类型和私有类型构造器： 产品类型（在大多数编程语言中称为struct）是一种保存不同类型的零个或多个值的数据结构。在SpinalHDL中，产品类型用于表示信号的“Bundle”，例如：

图片

图8：从语义角度看，经典的RISC流水线由寄存器文件访问、缓存访问、指令获取/解码、算术运算和其他功能组成。

-

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-

和类型，也称为标记联合，是一种可以容纳来自固定数量的不同类型之一的单个值并保留所容纳值的类型的数据结构。虽然Verilog和传统软件编程语言如C都没有直接支持和类型，但我们可以在C中模拟其行为：

图片

+

和类型，也称为标记联合，是一种可以容纳来自固定数量的不同类型之一的单个值并保留所容纳值的类型的数据结构。虽然Verilog和传统软件编程语言如C都没有直接支持和类型，但我们可以在C中模拟其行为：

+

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一个简单但广为人知的和类型的例子是'Option'类型：

-

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+

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表2：从SpinalHDL到Verilog的映射。

当存在和类型和产品类型时，可以对可表示值的集合施加约束。例如，在深度嵌入式HCL中，由“VALID”信号门控的数据信号可以使用“Option”类型表示，这样在检查“VALID”是否为“高”之前，无法读取该值。

在浅度嵌入式HCL中，和类型只能用于电路结构而不能用于数据，但我们仍然可以使用新类型模式模拟“Option[T]”的行为。我们创建一个函数：

-

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+

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根据值选择onSome或onNone。由于DynamicOption类型构造器是私有的，所以只需要保护值免受未经意访问的影响而不必检查VALID。

-

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+

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子类型和参数化多态：子类型（最常见的形式是继承）是一种构建类型层级结构的机制。参数化多态，也称为泛型，是一种编写以类型为输入并以单态类型或函数为输出的类型级别函数的机制。

3.3 SpinalHDL之外

SpinalHDL成功地利用了Scala中的许多构造来提高硬件设计过程的效率，但是在从硬件中抽象出属性并在编译时进行验证方面还有更多的可能性。在本节中，我们介绍了来自不同软件编程语言的各种方法，我们认为这些方法也可以使硬件设计受益。

@@ -150,7 +150,7 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"
  • 类型检查和IR编译。
  • 生成IR到Verilog代码。（一些深度嵌入式HCL，如Clash，也可以通过面向软件的编译器编译为模拟电路行为的可执行程序）。
    • -

    图片

    +

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    图11：基于Scala的浅嵌入式HCL需要，而基于Haskell的深嵌入式HCL Clash

    基于Cocotb的验证

    4.1 Cocotb简介

    @@ -160,7 +160,7 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"

    除了支持不同类型的模拟器外，Cocotb相对于使用Verilog、System Verilog或VHDL进行验证具有各种优势，这些优势可以加速整个硬件设计过程。以下是Cocotb的一些显著优势：

    4.2.1 简洁高效的语言特性

    比传统的用于验证的语言如Verilog、VHDL和System Verilog更高效、更具表现力和更简洁。与使用这些传统语言编码相比，使用Python来实现复杂功能需要更少的代码。

    -

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    +

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    图12: 基于Cocotb的验证框架

    与此同时，Python拥有简单的语法和丰富的在线学习资料，使初学者更容易掌握。此外，Python是一种高级编程语言，具有诸多高级特性，如面向对象编程，可以帮助程序员编写更可重用的代码。

    在大多数硬件验证的情况下，C/C++被用于构建DUT的参考模型，参考模型的代码通过DPI集成到SV(System Verilog)的测试代码中。Python比其他语言（如C/C++）在构建参考模型方面更高效的一个编程场景是涉及超过64位的大整数的算术运算。密码学算法如ECC和RSA以及哈希函数通常涉及128位到2048位范围内宽度的大整数运算。C/C++中的原始类型仅支持最大64位的数字。如果使用C/C++构建您的参考模型，处理这些大整数将会很麻烦。下面的C程序实现了两个超过64位宽度的大整数的加法运算：

    @@ -187,16 +187,16 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png"

    表4：被测试矩阵乘法器的接口

    4.3.1 构建参考模型

    矩阵乘法器的参考模型可以基于numpy实现，它是一个广泛应用的Python包，提供了丰富的矩阵运算功能。利用numpy，可以直接使用方法“matmul”来实现矩阵乘法，无需使用循环语法。参考模型的具体Python实现如下：

    -

    图片

    +

    图片

    4.3.2 搭建验证平台

    基于Cocotb构建的简单验证平台结构如下图所示。验证平台主要包括四个部分：1）驱动器；2）监控器；3）参考模型；4）缓冲区。驱动器使用Python包random生成随机的输入信号，包括“valid i”、“a i”和“b i”。当“valid i”为高电平时，生成的“a i”和“b i”被发送到参考模型，并获取相应的参考输出。参考输出通过Python包Queue实现的缓冲区存储，一旦输出信号“valid o”为高电平，监控器会抓取DUT的输出端口，并将其值与从缓冲区中取出的参考输出进行比较。驱动器和监控器的功能都是通过Python的协程实现的，类似于多线程，并且可以并行执行。

    -

    图片

    +

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    图14：基于Cocotb的验证平台结构

    4.3.3 启动仿真

    基于Cocotb的验证代码可以通过Makefile在仿真器上启动，而无需直接与仿真器进行交互。此外，使用cocotb-test包中提供的“simulator.run”方法，可以直接在Python函数中启动验证过程。然后可以直接运行该函数，或者使用pytest，一个成熟的Python测试框架，来管理所有测试的执行。

    -

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    一些pytest命令来管理测试单元的执行：

    -

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    结论

    本文主要讨论了基于新兴的开源工具SpinalHDL和Cocotb的数字硬件设计和验证，我们相信这些工具可以改变传统芯片开发过程。硬件设计的需求越来越多样化，但设计语言和工具并未明显改进。SpinalHDL和Cocotb试图将一些先进和高效的软件设计概念和方法引入到硬件开发流程中。与基于System Verilog或VHDL的传统设计和验证方法相比，SpinalHDL和Cocotb可以显著提高硬件开发的效率和质量。

    值得注意的是，SpinalHDL不是一种新的高级综合（HLS）工具，而是与Verilog或VHDL具有相同的描述层次。结合我们使用Spinal的开发经验，总结了它相对于Verilog和VHDL的三个主要优势，包括可靠性、表达性和可重用性。关于可靠性，Spinal可以提供更精确的基本电路元素抽象，在编译过程中提前检查一些设计规则，并分离设计和仿真元素。在表达性方面，SpinalHDL建立在Scala上，这是一种高级编程语言。基于Scala的特性，包括面向对象、函数式编程、递归和丰富的集合类型，更容易让硬件开发人员实现和参数化他们的设计。在可重用性方面，SpinalHDL本身提供了对常用电路元素的丰富封装来实现重用。对于设计师来说，使用Scala及其相关工具链更容易生成更具可重用性的代码和构建自己的代码库。

    @@ -209,4 +209,4 @@ const l="/zh-cn/assets/cover-78ccac63.jpg",p="/zh-cn/assets/image1-bf7fa473.png" [4] B. J. Rosser, “Cocotb: a python-based digital logic verification framework,” 2018. [5] Cocotb, -“https://github.com/cocotb/cocotb.”

    `;export{A as assetURLs,B as default,T as metadata,R as toc}; +“https://github.com/cocotb/cocotb.”

    `;export{R as assetURLs,B as default,u as metadata,w as toc}; diff --git a/zh-cn/assets/index-85fa6207.js b/zh-cn/assets/index-1dde53bb.js similarity index 97% rename from zh-cn/assets/index-85fa6207.js rename to zh-cn/assets/index-1dde53bb.js index 0272c47..23a48ca 100644 --- a/zh-cn/assets/index-85fa6207.js +++ b/zh-cn/assets/index-1dde53bb.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png",t="/zh-cn/assets/image3-204919ac.png",l="/zh-cn/assets/image4-e50f112d.png",p="/zh-cn/assets/image5-cdb8d1de.png",i=[e,a,t,l,p],n={label:"数据库隔离级别及MVCC",description:"数据库在同时处理多个事务时需要决定事务之间能否看到对方的修改，能看到多少等等。根据隔离的严格程度，从严到松可以分为 Serializable, Repeatable reads, Read committed, Read uncommitted。我们用下面这个 KV 存储的例子来解释这四个隔离级别。KV 存储的初始状态如下：",location:"中国香港",tags:["Xline"],date:"2023-02-16",title:"Database isolation level and MVCC"},o=[{label:"数据库隔离级别介绍",level:2},{label:"Read uncommitted",level:3},{label:"Repeatable read",level:3},{label:"Serializable",level:3},{label:"Snapshot 隔离级别及 MVCC",level:2},{label:"一点联想",level:2},{label:"总结",level:2}],s=`

    数据库隔离级别介绍

    +const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png",l="/zh-cn/assets/image3-204919ac.png",p="/zh-cn/assets/image4-e50f112d.png",t="/zh-cn/assets/image5-cdb8d1de.png",i=[e,a,l,p,t],n={label:"数据库隔离级别及MVCC",description:"数据库在同时处理多个事务时需要决定事务之间能否看到对方的修改，能看到多少等等。根据隔离的严格程度，从严到松可以分为 Serializable, Repeatable reads, Read committed, Read uncommitted。我们用下面这个 KV 存储的例子来解释这四个隔离级别。KV 存储的初始状态如下：",location:"中国香港",tags:["Xline"],date:"2023-02-16",title:"Database isolation level and MVCC"},o=[{label:"数据库隔离级别介绍",level:2},{label:"Read uncommitted",level:3},{label:"Repeatable read",level:3},{label:"Serializable",level:3},{label:"Snapshot 隔离级别及 MVCC",level:2},{label:"一点联想",level:2},{label:"总结",level:2}],s=`

    数据库隔离级别介绍

    数据库在同时处理多个事务时需要决定事务之间能否看到对方的修改，能看到多少等等。根据隔离的严格程度，从严到松可以分为 Serializable, Repeatable reads, Read committed, Read uncommitted。我们用下面这个 KV 存储的例子来解释这四个隔离级别。KV 存储的初始状态如下：

    Table 1:

    图片

    @@ -8,19 +8,19 @@ const e="/zh-cn/assets/image1-145af1bc.png",a="/zh-cn/assets/image2-b5b0ee19.png

    图片

    在 Read uncommitted 的隔离级别中，多个同时执行的事务是能够互相看到互相没有 commit 的写操作，因此可以认为这种隔离级别几乎没有作用。在上述例子中，Operation 2 读到的内容是 “AA”，Operation 4 读到的内容则是“DD”，即使第二个事务最终 Rollback 了。Read committed 有两个事务同时被执行，自上而下是执行顺序。

    Table 3:

    -

    图片

    +

    图片

    在 Read committed 的隔离级别中，只有被 Commit 后的结果可以被看到，因此在 Table 2 的执行顺序中，Operation 2 和 4 都能够读取到 “AA” 的值，即 Key 1 的值没有改变。如果按照 Table 3 中的情况执行两个事务，Operation 2 读到的值为 “AA”，Operation 5 读到的值为 “DD”，因为此时事务 2 已经执行成功。

    Repeatable read

    如果在 Table 3 中的事务 1 两次连续读操作，用户想要保证读到相同的值，那就需要使用 repeatable read 隔离级别。在这个隔离级别中，在同一个事务中对同一条数据的多次读取保证会得到相同的值，即使这个过程中该数据被其他已经提交的事务修改掉。当然该隔离级别也有一些情况无法保证隔离性，比如下列情况：

    Table 4:

    -

    图片

    +

    图片

    在 repeatable read 的隔离级别下，Operation 2 的返回结果是 ["CC"] —— 只有 Key 3 的值被返回了，但是 Operation 5 的返回值是 ["CC", "DD"]。总结一下，repeatable read 的隔离级别仍然无法很好处理涉及多条数据的情况，特别是当有新的数据插入或者删除的情况。

    Serializable

    最严格的隔离级别叫做 Serializable，这个级别的定义也是最清晰明了的，在这种隔离级别下的执行结果，就“仿佛”是将所有事务串行起来一条一条执行的结果。上面这句话中值得强调的是 “仿佛” 二字，为了提高性能，几乎没有数据库是采用真正物理意义上的串行执行来保证 Serializable 的，仅仅达到类似效果即可，实现的方法是可以多种多样的。在 Serializable 级别下还有一个细致的分类，叫做 Snapshot，该分类与 Serializable 类似但约束能力上稍弱。正是因为 Snapshot 在约束上的放松，使得其实现起来具有更好的性能，也是绝大多数数据库默认支持的隔离级别。下面我们就来说说 Snapshot，以及引申出来的 MVCC 实现方法。

    Snapshot 隔离级别及 MVCC

    想要区分最严格的 Serializable 和 Snapshot，我们还是从例子来看，看下列两个事务的操作：

    Table 5:

    -

    图片

    +

    图片

    如果按照严格的 Serializable 的隔离级别，无论 Transaction 1 和 2 哪个先执行，最终 Key 1 和 2 的值都是相同的，有可能是 “AA”， 也有可能是 “BB”。但是在 Snapshot 的级别下执行，执行结果则是 Key 1 和 2 的值进行互换。很明显在这种情况下 Snapshot 的隔离能力明显更弱。Isolation 对于存在读写交集的事务的先后顺序无能为力，只能保证存在写冲突的事务间的先后顺序。

    上述例子中，我们虽然具体地看了 Snapshot 隔离级别和 Serializable 之间的差异，但是我们还没有完整介绍过 Snapshot 的特性：

      diff --git a/zh-cn/assets/index-cf17c7a4.js b/zh-cn/assets/index-1e46583f.js similarity index 97% rename from zh-cn/assets/index-cf17c7a4.js rename to zh-cn/assets/index-1e46583f.js index 45a637e..d68d7c1 100644 --- a/zh-cn/assets/index-cf17c7a4.js +++ b/zh-cn/assets/index-1e46583f.js @@ -1,4 +1,4 @@ -const a="/zh-cn/assets/cover-12543354.png",s="/zh-cn/assets/image1-d12f17e8.jpg",n="/zh-cn/assets/image2-5cdbcaa2.png",t=[a,s,n],e={label:"Rust China Hackathon 2022 达坦科技组空中宣讲会来啦！",description:"Rust China Hackathon 2022 即将来袭！ 本届Hackathon的主题为「Rust For Fun」，分为「社区组」与「企业组」。",cover:"./cover.png",location:"中国香港",date:"2022-11-24",title:"The Rust China Hackathon 2022 Datan Technology Group Air Presentation is here"},l=[{label:"赛事日程表",level:2},{label:"空中宣讲会",level:2},{label:"达坦科技 DatenLord 赛题",level:2}],o=`

      Rust China Hackathon 2022 即将来袭！ 本届 Hackathon 的主题为「Rust For Fun」，分为「社区组」与「企业组」。

      +const a="/zh-cn/assets/cover-12543354.png",s="/zh-cn/assets/image1-d12f17e8.jpg",n="/zh-cn/assets/image2-5cdbcaa2.png",t=[a,s,n],e={label:"Rust China Hackathon 2022 达坦科技组空中宣讲会来啦！",description:"Rust China Hackathon 2022 即将来袭！ 本届Hackathon的主题为「Rust For Fun」，分为「社区组」与「企业组」。",cover:"./cover.png",location:"中国香港",date:"2022-11-24",title:"The Rust China Hackathon 2022 Datan Technology Group Air Presentation is here"},l=[{label:"赛事日程表",level:2},{label:"空中宣讲会",level:2},{label:"达坦科技 DatenLord 赛题",level:2}],p=`

      Rust China Hackathon 2022 即将来袭！ 本届 Hackathon 的主题为「Rust For Fun」，分为「社区组」与「企业组」。

      达坦科技作为本届 Hackathon 的协办方，赞助参与本次企业组赛道，将基于 Xline 这个开源项目，就 Concurrent Indexing，邀请你一起突破固有的思维限制。

      赛事日程表

      本次挑战赛于 11 月 15 日 开放报名。赛事日程表已经新鲜出炉：

      @@ -40,4 +40,4 @@ Xline 是达坦科技推出的分布式元数据 KV 存储器。在使用中， 你的实现应遵从上述 Trait 并满足上述要求。我们将使用一定基准测试来进行评估，并根据其结果评分。在基准测试中，我们将发送大量并发请求，因此你也可以创建自己的性能测试来帮助进行优化。

      欢迎预约报名 2022 年 12 月 4 日 16:00 的空中宣讲会！ 腾讯会议二维码如下：

      -

      图片

      `;export{t as assetURLs,o as default,e as metadata,l as toc}; +

      图片

      `;export{t as assetURLs,p as default,e as metadata,l as toc}; diff --git a/zh-cn/assets/index-602219d3.js b/zh-cn/assets/index-1f0dff83.js similarity index 86% rename from zh-cn/assets/index-602219d3.js rename to zh-cn/assets/index-1f0dff83.js index fed1736..6d0e7ca 100644 --- a/zh-cn/assets/index-602219d3.js +++ b/zh-cn/assets/index-1f0dff83.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/cover-dcd7e2ce.jpeg",t="/zh-cn/assets/image1-3ae2277f.jpg",n="/zh-cn/assets/image1-0a18e154.png",o=[s,t,n],e={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",cover:"./cover.jpeg",location:"海南",date:"2023-02-01",title:"Consensus Algorithms and Metadata Management for Cross Data Center Consistency"},r=[],a=`

      在 2021 年时，UC Berkeley 提出了 天空计算（Sky Computing） 的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。 Xline 是一款开源分布式 kv 存储系统， 基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现

      +const n="/zh-cn/assets/cover-dcd7e2ce.jpeg",t="/zh-cn/assets/image1-3ae2277f.jpg",s="/zh-cn/assets/image1-0a18e154.png",e=[n,t,s],o={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",cover:"./cover.jpeg",location:"海南",date:"2023-02-01",title:"Consensus Algorithms and Metadata Management for Cross Data Center Consistency"},r=[],i=`

      在 2021 年时，UC Berkeley 提出了 天空计算（Sky Computing） 的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。 Xline 是一款开源分布式 kv 存储系统， 基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现

      本周四（2 月 2 日）晚上 8 点，达坦科技和分布式实验室合作，由达坦科技 Rust 分布式存储工程师赵佳炜讲述共识算法与跨数据中心一致性的元数据管理，并介绍 Xline 是如何实现高性能跨数据中心的数据一致性管理。

      图片

      直播亮点：

      @@ -9,6 +9,6 @@ const s="/zh-cn/assets/cover-dcd7e2ce.jpeg",t="/zh-cn/assets/image1-3ae2277f.jpg
    • Xline 接下来的优化方向。

      • 请添加分布式实验室小助手的微信，报名参与直播：

      -

      图片

      +

      图片

      达坦科技（DatenLord）推出的开源分布式 KV 存储 Xline，针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并保证数据的一致性，方便业务系统实现多地多中心多活部署。

      -

      GitHub 链接：https://github.com/xline-kv/

      `;export{o as assetURLs,a as default,e as metadata,r as toc}; +

      GitHub 链接：https://github.com/xline-kv/

      `;export{e as assetURLs,i as default,o as metadata,r as toc}; diff --git a/zh-cn/assets/index-7cf6760e.js b/zh-cn/assets/index-213034fe.js similarity index 95% rename from zh-cn/assets/index-7cf6760e.js rename to zh-cn/assets/index-213034fe.js index b59b78e..e37ecd3 100644 --- a/zh-cn/assets/index-7cf6760e.js +++ b/zh-cn/assets/index-213034fe.js @@ -1,4 +1,4 @@ -const n="/zh-cn/assets/cover-99998007.jpg",t="/zh-cn/assets/image1-6f9cec09.jpg",e=[n,t],s={label:"精彩回顾｜硬件敏捷开发与验证方法学研讨",description:"8月27日，作为2022年第二届RISC-V中国峰会的同期活动，达坦科技成功举办硬件敏捷开发与验证方法学研讨。虽然是线上分享活动，但大家热情依旧，会后在“硬件敏捷开发和验证方法学讨论群”中积极互动提问。长达四小时的就新一代HDL在数字芯片设计方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。",cover:"./cover.jpg",location:"中国香港",date:"2022-09-08",title:"Discussion on Hardware Agile Development and Verification Methodology"},o=[{label:"芯片敏捷设计与验证之路",level:2},{label:"香山处理器敏捷开发与验证实践",level:2},{label:"通过 Chainsaw 实现硬件算子敏捷开发",level:2},{label:"Scala 在 IC 开发中的应用",level:2},{label:"NaxRiscv CPU: Introduction and Extension Demonstration",level:2},{label:"结束语",level:2}],a=`

      封面

      +const n="/zh-cn/assets/cover-99998007.jpg",s="/zh-cn/assets/image1-6f9cec09.jpg",e=[n,s],t={label:"精彩回顾｜硬件敏捷开发与验证方法学研讨",description:"8月27日，作为2022年第二届RISC-V中国峰会的同期活动，达坦科技成功举办硬件敏捷开发与验证方法学研讨。虽然是线上分享活动，但大家热情依旧，会后在“硬件敏捷开发和验证方法学讨论群”中积极互动提问。长达四小时的就新一代HDL在数字芯片设计方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。",cover:"./cover.jpg",location:"中国香港",date:"2022-09-08",title:"Discussion on Hardware Agile Development and Verification Methodology"},a=[{label:"芯片敏捷设计与验证之路",level:2},{label:"香山处理器敏捷开发与验证实践",level:2},{label:"通过 Chainsaw 实现硬件算子敏捷开发",level:2},{label:"Scala 在 IC 开发中的应用",level:2},{label:"NaxRiscv CPU: Introduction and Extension Demonstration",level:2},{label:"结束语",level:2}],o=`

      封面

      8 月 27 日，作为 2022 年第二届 RISC-V 中国峰会的同期活动，达坦科技成功举办硬件敏捷开发与验证方法学研讨。虽然是线上分享活动，但大家热情依旧，会后在“硬件敏捷开发和验证方法学讨论群”中积极互动提问。长达四小时的就新一代 HDL 在数字芯片设计方面的实践经验分享，究竟碰撞出了什么新的火花呢？下面我们一起来回顾研讨会的精彩内容。

      芯片敏捷设计与验证之路

      华南理工大学计算机科学与工程学院赖晓铮副教授首先分享了 “让硬件设计像软件设计一样简单”的愿景，即开发人员编写的代码只占工作量的 10%，剩下 90%由开源芯片生态系统提供。

      @@ -23,4 +23,4 @@ const n="/zh-cn/assets/cover-99998007.jpg",t="/zh-cn/assets/image1-6f9cec09.jpg"

      请点击如下链接：
      https://t.elecfans.com/live/2113.html收看本次研讨会的回放。
      也欢迎添加小助手微信，加入“硬件敏捷开发和验证方法学讨论群”，进行延伸讨论与互动，并第一时间获得后续相关活动的讯息。

      -

      图片

      `;export{e as assetURLs,a as default,s as metadata,o as toc}; +

      图片

      `;export{e as assetURLs,o as default,t as metadata,a as toc}; diff --git a/zh-cn/assets/index-ef7b41da.js b/zh-cn/assets/index-25c20c62.js similarity index 93% rename from zh-cn/assets/index-ef7b41da.js rename to zh-cn/assets/index-25c20c62.js index b6db4ca..3253389 100644 --- a/zh-cn/assets/index-ef7b41da.js +++ b/zh-cn/assets/index-25c20c62.js @@ -1,4 +1,4 @@ -const n="/zh-cn/assets/image1-b917417e.jpg",o="/zh-cn/assets/image1-50beaba8.png",p=[n,o],a={label:"倒计时5天：SpinalHDL应用前景探索线上研讨会",description:"SpinalHDL是一种开源的高级硬件描述语言，它可以作为VHDL或Verilog的替代，Charles Papon 在2014年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于Scala的DSL，能够借助现有的Scala语言特性和开发工具提供强大、易用、高效的硬件设计能力。达坦科技采用硬件加速提升存储性能，目前采用FPGA实现存储相关场景的性能加速。SpinalHDL是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技也一直热心于推广SpinalHDL在业界的落地应用。在2023年12月10日，我们将联合SpinalHDL社区及该语言的创建者 Charles Papon 举办 《2023 SpinalHDL应用前景探索》的线上研讨会，分为两个Track。",location:"中国香港",date:"2023-12-05",title:"Countdown to 5 days: SpinalHDL application prospect exploration online seminar"},t=[{label:"Tooling and flow:",level:2},{label:"Projects :",level:2}],s=`

      SpinalHDL 是一种开源的高级硬件描述语言，它可以作为 VHDL 或 Verilog 的替代，Charles Papon 在 2014 年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于 Scala 的 DSL，能够借助现有的 Scala 语言特性和开发工具提供强大、易用、高效的硬件设计能力。

      +const n="/zh-cn/assets/image1-b917417e.jpg",o="/zh-cn/assets/image1-50beaba8.png",a=[n,o],t={label:"倒计时5天：SpinalHDL应用前景探索线上研讨会",description:"SpinalHDL是一种开源的高级硬件描述语言，它可以作为VHDL或Verilog的替代，Charles Papon 在2014年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于Scala的DSL，能够借助现有的Scala语言特性和开发工具提供强大、易用、高效的硬件设计能力。达坦科技采用硬件加速提升存储性能，目前采用FPGA实现存储相关场景的性能加速。SpinalHDL是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技也一直热心于推广SpinalHDL在业界的落地应用。在2023年12月10日，我们将联合SpinalHDL社区及该语言的创建者 Charles Papon 举办 《2023 SpinalHDL应用前景探索》的线上研讨会，分为两个Track。",location:"中国香港",date:"2023-12-05",title:"Countdown to 5 days: SpinalHDL application prospect exploration online seminar"},p=[{label:"Tooling and flow:",level:2},{label:"Projects :",level:2}],s=`

      SpinalHDL 是一种开源的高级硬件描述语言，它可以作为 VHDL 或 Verilog 的替代，Charles Papon 在 2014 年创建后，伴随着数年来开源硬件设计的蓬勃发展，在多方面显露出优势，譬如：它专注于高效的硬件描述，而不是事件驱动；作为一种基于 Scala 的 DSL，能够借助现有的 Scala 语言特性和开发工具提供强大、易用、高效的硬件设计能力。

      达坦科技采用硬件加速提升存储性能，目前采用 FPGA 实现存储相关场景的性能加速。SpinalHDL 是达坦科技在产品中使用的硬件描述语言之一，因此，达坦科技也一直热心于推广 SpinalHDL 在业界的落地应用。

      在 2023 年 12 月 10 日，我们将联合 SpinalHDL 社区及该语言的创建者 Charles Papon 举办 《2023 SpinalHDL 应用前景探索》 的线上研讨会，分为两个 Track。

      Tooling and flow:

      @@ -21,4 +21,4 @@ Explore the SpinalHDL Landscape

      会议链接：
      https://zoom.us/j/82302372789?pwd=OYsFCbiW06KqC4U83ZKsZwefM75gJr.1

      对开源硬件和敏捷开发感兴趣的朋友，可以添加达坦科技小助手的微信，加入达坦科技硬件群。

      -

      图片

      `;export{p as assetURLs,s as default,a as metadata,t as toc}; +

      图片

      `;export{a as assetURLs,s as default,t as metadata,p as toc}; diff --git a/zh-cn/assets/index-b1ba4736.js b/zh-cn/assets/index-29c0b7ce.js similarity index 98% rename from zh-cn/assets/index-b1ba4736.js rename to zh-cn/assets/index-29c0b7ce.js index 17ef944..1b821d3 100644 --- a/zh-cn/assets/index-b1ba4736.js +++ b/zh-cn/assets/index-29c0b7ce.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-1329fc54.png",a="/zh-cn/assets/image1-b7df4899.png",s="/zh-cn/assets/image2-a77c94e1.jpg",t=[e,a,s],r={label:"计算机体系结构 | MIT Training Q&A及小贴士",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。6.175和6.375的课程和Lab学习都有一定的难度，要求采用Bluespec语言实现RISC-V处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["硬件加速"],date:"2022-06-11",title:"Computer Architecture l MIT Training Q&A and Tips"},c=[{label:"MIT Training Q & A",level:2},{label:"MIT Training 小贴士",level:2},{label:"Related Resources",level:2}],i=`

      图片

      +const e="/zh-cn/assets/cover-1329fc54.png",a="/zh-cn/assets/image1-b7df4899.png",s="/zh-cn/assets/image2-a77c94e1.jpg",t=[e,a,s],r={label:"计算机体系结构 | MIT Training Q&A及小贴士",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。6.175和6.375的课程和Lab学习都有一定的难度，要求采用Bluespec语言实现RISC-V处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。",cover:"./cover.png",location:"中国香港",author:["达坦科技"],tags:["硬件加速"],date:"2022-06-11",title:"Computer Architecture l MIT Training Q&A and Tips"},i=[{label:"MIT Training Q & A",level:2},{label:"MIT Training 小贴士",level:2},{label:"Related Resources",level:2}],c=`

      图片

      在 2023 年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。6.175 和 6.375 的课程和 Lab 学习都有一定的难度，要求采用 Bluespec 语言实现 RISC-V 处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab 环节还涉及软硬件联合开发，要求基于所实现的 RISC-V 处理器运行真实的 RISC-V 程序，并给出性能评估。

      继 MIT6.175 和 MIT6.375 学习笔记之后，我们又整理了到目前为止，硬件设计学习社区里大家碰到的一些共同问题，希望我们的回复以及学习贴士对于想啃下这两门高难度课程，并想从事数字芯片设计的工程师或同学有所帮助。

      MIT Training Q & A

      @@ -76,4 +76,4 @@ A：我目前是用 docker 做的实验，6175 的 lab1-6 和 6375 的 lab1-4

      计算机体系结构｜ MIT6.175 和 MIT6.375 学习笔记

      达坦科技硬件设计学习社区持续开放，若想询问加入细节，请添加下方小助手微信号或邮件info@datenlord.com

      -

      图片

      `;export{t as assetURLs,i as default,r as metadata,c as toc}; +

      图片

      `;export{t as assetURLs,c as default,r as metadata,i as toc}; diff --git a/zh-cn/assets/index-2e5b8302.js b/zh-cn/assets/index-2a76e7d1.js similarity index 85% rename from zh-cn/assets/index-2e5b8302.js rename to zh-cn/assets/index-2a76e7d1.js index 5c23b57..0c43da0 100644 --- a/zh-cn/assets/index-2e5b8302.js +++ b/zh-cn/assets/index-2a76e7d1.js @@ -6,7 +6,7 @@ var CE=(e,t)=>()=>(t||e((t={exports:{}}).exports,t),t.exports);var nQ=CE((sQ,ou) * * This source code is licensed under the MIT license found in the * LICENSE file in the root directory of this source tree. - */var kl=Symbol.for("react.element"),AE=Symbol.for("react.portal"),TE=Symbol.for("react.fragment"),RE=Symbol.for("react.strict_mode"),OE=Symbol.for("react.profiler"),PE=Symbol.for("react.provider"),ME=Symbol.for("react.context"),LE=Symbol.for("react.forward_ref"),IE=Symbol.for("react.suspense"),NE=Symbol.for("react.memo"),zE=Symbol.for("react.lazy"),Zv=Symbol.iterator;function YE(e){return e===null||typeof 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this.state.error?I.createElement(oi.Provider,{value:this.props.routeContext},I.createElement(W_.Provider,{value:this.state.error,children:this.props.component})):this.props.children}}function XR(e){let{routeContext:t,match:r,children:n}=e,i=I.useContext(ng);return i&&i.static&&i.staticContext&&(r.route.errorElement||r.route.ErrorBoundary)&&(i.staticContext._deepestRenderedBoundaryId=r.route.id),I.createElement(oi.Provider,{value:t},n)}function QR(e,t,r){var n;if(t===void 0&&(t=[]),r===void 0&&(r=null),e==null){var i;if((i=r)!=null&&i.errors)e=r.matches;else return null}let o=e,a=(n=r)==null?void 0:n.errors;if(a!=null){let c=o.findIndex(d=>d.route.id&&(a==null?void 0:a[d.route.id]));c>=0||be(!1),o=o.slice(0,Math.min(o.length,c+1))}return o.reduceRight((c,d,h)=>{let g=d.route.id?a==null?void 0:a[d.route.id]:null,v=null;r&&(v=d.route.errorElement||GR);let _=t.concat(o.slice(0,h+1)),k=()=>{let C;return g?C=v:d.route.Component?C=I.createElement(d.route.Component,null):d.route.element?C=d.route.element:C=c,I.createElement(XR,{match:d,routeContext:{outlet:c,matches:_,isDataRoute:r!=null},children:C})};return r&&(d.route.ErrorBoundary||d.route.errorElement||h===0)?I.createElement(KR,{location:r.location,revalidation:r.revalidation,component:v,error:g,children:k(),routeContext:{outlet:null,matches:_,isDataRoute:!0}}):k()},null)}var _p;(function(e){e.UseBlocker="useBlocker",e.UseRevalidator="useRevalidator",e.UseNavigateStable="useNavigate"})(_p||(_p={}));var dl;(function(e){e.UseBlocker="useBlocker",e.UseLoaderData="useLoaderData",e.UseActionData="useActionData",e.UseRouteError="useRouteError",e.UseNavigation="useNavigation",e.UseRouteLoaderData="useRouteLoaderData",e.UseMatches="useMatches",e.UseRevalidator="useRevalidator",e.UseNavigateStable="useNavigate",e.UseRouteId="useRouteId"})(dl||(dl={}));function qR(e){let t=I.useContext(ng);return t||be(!1),t}function ZR(e){let t=I.useContext(B_);return t||be(!1),t}function JR(e){let t=I.useContext(oi);return t||be(!1),t}function X_(e){let t=JR(),r=t.matches[t.matches.length-1];return r.route.id||be(!1),r.route.id}function eO(){var e;let t=I.useContext(W_),r=ZR(dl.UseRouteError),n=X_(dl.UseRouteError);return t||((e=r.errors)==null?void 0:e[n])}function tO(){let{router:e}=qR(_p.UseNavigateStable),t=X_(dl.UseNavigateStable),r=I.useRef(!1);return G_(()=>{r.current=!0}),I.useCallback(function(i,o){o===void 0&&(o={}),r.current&&(typeof i=="number"?e.navigate(i):e.navigate(i,Ru({fromRouteId:t},o)))},[e,t])}function rO(e){let{fallbackElement:t,router:r}=e,[n,i]=I.useState(r.state);I.useLayoutEffect(()=>r.subscribe(i),[r,i]);let o=I.useMemo(()=>({createHref:r.createHref,encodeLocation:r.encodeLocation,go:d=>r.navigate(d),push:(d,h,g)=>r.navigate(d,{state:h,preventScrollReset:g==null?void 0:g.preventScrollReset}),replace:(d,h,g)=>r.navigate(d,{replace:!0,state:h,preventScrollReset:g==null?void 0:g.preventScrollReset})}),[r]),a=r.basename||"/",c=I.useMemo(()=>({router:r,navigator:o,static:!1,basename:a}),[r,o,a]);return I.createElement(I.Fragment,null,I.createElement(ng.Provider,{value:c},I.createElement(B_.Provider,{value:n},I.createElement(oO,{basename:r.basename,location:r.state.location,navigationType:r.state.historyAction,navigator:o},r.state.initialized?I.createElement(nO,{routes:r.routes,state:n}):t))),null)}function nO(e){let{routes:t,state:r}=e;return BR(t,void 0,r)}function iO(e){return $R(e.context)}function oO(e){let{basename:t="/",children:r=null,location:n,navigationType:i=vt.Pop,navigator:o,static:a=!1}=e;Al()&&be(!1);let c=t.replace(/^\/*/,"/"),d=I.useMemo(()=>({basename:c,navigator:o,static:a}),[c,o,a]);typeof n=="string"&&(n=_n(n));let{pathname:h="/",search:g="",hash:v="",state:_=null,key:k="default"}=n,C=I.useMemo(()=>{let D=Fs(h,c);return D==null?null:{location:{pathname:D,search:g,hash:v,state:_,key:k},navigationType:i}},[c,h,g,v,_,k,i]);return C==null?null:I.createElement(Us.Provider,{value:d},I.createElement(_d.Provider,{children:r,value:C}))}var _1;(function(e){e[e.pending=0]="pending",e[e.success=1]="success",e[e.error=2]="error"})(_1||(_1={}));new Promise(()=>{});function sO(e){let t={hasErrorBoundary:e.ErrorBoundary!=null||e.errorElement!=null};return e.Component&&Object.assign(t,{element:I.createElement(e.Component),Component:void 0}),e.ErrorBoundary&&Object.assign(t,{errorElement:I.createElement(e.ErrorBoundary),ErrorBoundary:void 0}),t}/** + */function Ru(){return Ru=Object.assign?Object.assign.bind():function(e){for(var t=1;tc.pathnameBase)),o=I.useRef(!1);return G_(()=>{o.current=!0}),I.useCallback(function(c,d){if(d===void 0&&(d={}),!o.current)return;if(typeof c=="number"){t.go(c);return}let h=eg(c,JSON.parse(i),n,d.relative==="path");e!=="/"&&(h.pathname=h.pathname==="/"?e:Qn([e,h.pathname])),(d.replace?t.replace:t.push)(h,d.state,d)},[e,t,i,n])}const UR=I.createContext(null);function $R(e){let t=I.useContext(oi).outlet;return t&&I.createElement(UR.Provider,{value:e},t)}function Sn(){let{matches:e}=I.useContext(oi),t=e[e.length-1];return t?t.params:{}}function K_(e,t){let{relative:r}=t===void 0?{}:t,{matches:n}=I.useContext(oi),{pathname:i}=si(),o=JSON.stringify(xd(n).map(a=>a.pathnameBase));return I.useMemo(()=>eg(e,JSON.parse(o),i,r==="path"),[e,o,i,r])}function BR(e,t,r){Al()||be(!1);let{navigator:n}=I.useContext(Us),{matches:i}=I.useContext(oi),o=i[i.length-1],a=o?o.params:{};o&&o.pathname;let c=o?o.pathnameBase:"/";o&&o.route;let d=si(),h;if(t){var g;let D=typeof t=="string"?_n(t):t;c==="/"||(g=D.pathname)!=null&&g.startsWith(c)||be(!1),h=D}else h=d;let v=h.pathname||"/",_=c==="/"?v:v.slice(c.length)||"/",k=ss(e,{pathname:_}),C=QR(k&&k.map(D=>Object.assign({},D,{params:Object.assign({},a,D.params),pathname:Qn([c,n.encodeLocation?n.encodeLocation(D.pathname).pathname:D.pathname]),pathnameBase:D.pathnameBase==="/"?c:Qn([c,n.encodeLocation?n.encodeLocation(D.pathnameBase).pathname:D.pathnameBase])})),i,r);return t&&C?I.createElement(_d.Provider,{value:{location:Ru({pathname:"/",search:"",hash:"",state:null,key:"default"},h),navigationType:vt.Pop}},C):C}function WR(){let e=eO(),t=N_(e)?e.status+" "+e.statusText:e instanceof Error?e.message:JSON.stringify(e),r=e instanceof Error?e.stack:null,i={padding:"0.5rem",backgroundColor:"rgba(200,200,200, 0.5)"},o=null;return I.createElement(I.Fragment,null,I.createElement("h2",null,"Unexpected Application Error!"),I.createElement("h3",{style:{fontStyle:"italic"}},t),r?I.createElement("pre",{style:i},r):null,o)}const GR=I.createElement(WR,null);class KR extends I.Component{constructor(t){super(t),this.state={location:t.location,revalidation:t.revalidation,error:t.error}}static getDerivedStateFromError(t){return{error:t}}static getDerivedStateFromProps(t,r){return r.location!==t.location||r.revalidation!=="idle"&&t.revalidation==="idle"?{error:t.error,location:t.location,revalidation:t.revalidation}:{error:t.error||r.error,location:r.location,revalidation:t.revalidation||r.revalidation}}componentDidCatch(t,r){console.error("React Router caught the following error during render",t,r)}render(){return this.state.error?I.createElement(oi.Provider,{value:this.props.routeContext},I.createElement(W_.Provider,{value:this.state.error,children:this.props.component})):this.props.children}}function XR(e){let{routeContext:t,match:r,children:n}=e,i=I.useContext(ng);return i&&i.static&&i.staticContext&&(r.route.errorElement||r.route.ErrorBoundary)&&(i.staticContext._deepestRenderedBoundaryId=r.route.id),I.createElement(oi.Provider,{value:t},n)}function QR(e,t,r){var n;if(t===void 0&&(t=[]),r===void 0&&(r=null),e==null){var i;if((i=r)!=null&&i.errors)e=r.matches;else return null}let o=e,a=(n=r)==null?void 0:n.errors;if(a!=null){let c=o.findIndex(d=>d.route.id&&(a==null?void 0:a[d.route.id]));c>=0||be(!1),o=o.slice(0,Math.min(o.length,c+1))}return o.reduceRight((c,d,h)=>{let g=d.route.id?a==null?void 0:a[d.route.id]:null,v=null;r&&(v=d.route.errorElement||GR);let _=t.concat(o.slice(0,h+1)),k=()=>{let C;return g?C=v:d.route.Component?C=I.createElement(d.route.Component,null):d.route.element?C=d.route.element:C=c,I.createElement(XR,{match:d,routeContext:{outlet:c,matches:_,isDataRoute:r!=null},children:C})};return r&&(d.route.ErrorBoundary||d.route.errorElement||h===0)?I.createElement(KR,{location:r.location,revalidation:r.revalidation,component:v,error:g,children:k(),routeContext:{outlet:null,matches:_,isDataRoute:!0}}):k()},null)}var _p;(function(e){e.UseBlocker="useBlocker",e.UseRevalidator="useRevalidator",e.UseNavigateStable="useNavigate"})(_p||(_p={}));var dl;(function(e){e.UseBlocker="useBlocker",e.UseLoaderData="useLoaderData",e.UseActionData="useActionData",e.UseRouteError="useRouteError",e.UseNavigation="useNavigation",e.UseRouteLoaderData="useRouteLoaderData",e.UseMatches="useMatches",e.UseRevalidator="useRevalidator",e.UseNavigateStable="useNavigate",e.UseRouteId="useRouteId"})(dl||(dl={}));function qR(e){let t=I.useContext(ng);return t||be(!1),t}function ZR(e){let t=I.useContext(B_);return t||be(!1),t}function JR(e){let t=I.useContext(oi);return t||be(!1),t}function X_(e){let t=JR(),r=t.matches[t.matches.length-1];return r.route.id||be(!1),r.route.id}function eO(){var e;let t=I.useContext(W_),r=ZR(dl.UseRouteError),n=X_(dl.UseRouteError);return t||((e=r.errors)==null?void 0:e[n])}function tO(){let{router:e}=qR(_p.UseNavigateStable),t=X_(dl.UseNavigateStable),r=I.useRef(!1);return G_(()=>{r.current=!0}),I.useCallback(function(i,o){o===void 0&&(o={}),r.current&&(typeof i=="number"?e.navigate(i):e.navigate(i,Ru({fromRouteId:t},o)))},[e,t])}function rO(e){let{fallbackElement:t,router:r}=e,[n,i]=I.useState(r.state);I.useLayoutEffect(()=>r.subscribe(i),[r,i]);let o=I.useMemo(()=>({createHref:r.createHref,encodeLocation:r.encodeLocation,go:d=>r.navigate(d),push:(d,h,g)=>r.navigate(d,{state:h,preventScrollReset:g==null?void 0:g.preventScrollReset}),replace:(d,h,g)=>r.navigate(d,{replace:!0,state:h,preventScrollReset:g==null?void 0:g.preventScrollReset})}),[r]),a=r.basename||"/",c=I.useMemo(()=>({router:r,navigator:o,static:!1,basename:a}),[r,o,a]);return I.createElement(I.Fragment,null,I.createElement(ng.Provider,{value:c},I.createElement(B_.Provider,{value:n},I.createElement(oO,{basename:r.basename,location:r.state.location,navigationType:r.state.historyAction,navigator:o},r.state.initialized?I.createElement(nO,{routes:r.routes,state:n}):t))),null)}function nO(e){let{routes:t,state:r}=e;return BR(t,void 0,r)}function iO(e){return $R(e.context)}function oO(e){let{basename:t="/",children:r=null,location:n,navigationType:i=vt.Pop,navigator:o,static:a=!1}=e;Al()&&be(!1);let c=t.replace(/^\/*/,"/"),d=I.useMemo(()=>({basename:c,navigator:o,static:a}),[c,o,a]);typeof n=="string"&&(n=_n(n));let{pathname:h="/",search:g="",hash:v="",state:_=null,key:k="default"}=n,C=I.useMemo(()=>{let D=Fs(h,c);return D==null?null:{location:{pathname:D,search:g,hash:v,state:_,key:k},navigationType:i}},[c,h,g,v,_,k,i]);return C==null?null:I.createElement(Us.Provider,{value:d},I.createElement(_d.Provider,{children:r,value:C}))}var _1;(function(e){e[e.pending=0]="pending",e[e.success=1]="success",e[e.error=2]="error"})(_1||(_1={}));new Promise(()=>{});function sO(e){let t={hasErrorBoundary:e.ErrorBoundary!=null||e.errorElement!=null};return e.Component&&Object.assign(t,{element:I.createElement(e.Component),Component:void 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0?arguments[1]:!1,d=de(de({},i.props),i.state),h=(0,rt.changeSlide)(d,a);if(!(h!==0&&!h)&&(c===!0?i.slideHandler(h,c):i.slideHandler(h),i.props.autoplay&&i.autoPlay("update"),i.props.focusOnSelect)){var g=i.list.querySelectorAll(".slick-current");g[0]&&g[0].focus()}}),Se(_e(i),"clickHandler",function(a){i.clickable===!1&&(a.stopPropagation(),a.preventDefault()),i.clickable=!0}),Se(_e(i),"keyHandler",function(a){var c=(0,rt.keyHandler)(a,i.props.accessibility,i.props.rtl);c!==""&&i.changeSlide({message:c})}),Se(_e(i),"selectHandler",function(a){i.changeSlide(a)}),Se(_e(i),"disableBodyScroll",function(){var a=function(d){d=d||window.event,d.preventDefault&&d.preventDefault(),d.returnValue=!1};window.ontouchmove=a}),Se(_e(i),"enableBodyScroll",function(){window.ontouchmove=null}),Se(_e(i),"swipeStart",function(a){i.props.verticalSwiping&&i.disableBodyScroll();var c=(0,rt.swipeStart)(a,i.props.swipe,i.props.draggable);c!==""&&i.setState(c)}),Se(_e(i),"swipeMove",function(a){var c=(0,rt.swipeMove)(a,de(de(de({},i.props),i.state),{},{trackRef:i.track,listRef:i.list,slideIndex:i.state.currentSlide}));c&&(c.swiping&&(i.clickable=!1),i.setState(c))}),Se(_e(i),"swipeEnd",function(a){var c=(0,rt.swipeEnd)(a,de(de(de({},i.props),i.state),{},{trackRef:i.track,listRef:i.list,slideIndex:i.state.currentSlide}));if(c){var d=c.triggerSlideHandler;delete c.triggerSlideHandler,i.setState(c),d!==void 0&&(i.slideHandler(d),i.props.verticalSwiping&&i.enableBodyScroll())}}),Se(_e(i),"touchEnd",function(a){i.swipeEnd(a),i.clickable=!0}),Se(_e(i),"slickPrev",function(){i.callbackTimers.push(setTimeout(function(){return i.changeSlide({message:"previous"})},0))}),Se(_e(i),"slickNext",function(){i.callbackTimers.push(setTimeout(function(){return i.changeSlide({message:"next"})},0))}),Se(_e(i),"slickGoTo",function(a){var c=arguments.length>1&&arguments[1]!==void 0?arguments[1]:!1;if(a=Number(a),isNaN(a))return"";i.callbackTimers.push(setTimeout(function(){return i.changeSlide({message:"index",index:a,currentSlide:i.state.currentSlide},c)},0))}),Se(_e(i),"play",function(){var a;if(i.props.rtl)a=i.state.currentSlide-i.props.slidesToScroll;else if((0,rt.canGoNext)(de(de({},i.props),i.state)))a=i.state.currentSlide+i.props.slidesToScroll;else return!1;i.slideHandler(a)}),Se(_e(i),"autoPlay",function(a){i.autoplayTimer&&clearInterval(i.autoplayTimer);var c=i.state.autoplaying;if(a==="update"){if(c==="hovered"||c==="focused"||c==="paused")return}else if(a==="leave"){if(c==="paused"||c==="focused")return}else if(a==="blur"&&(c==="paused"||c==="hovered"))return;i.autoplayTimer=setInterval(i.play,i.props.autoplaySpeed+50),i.setState({autoplaying:"playing"})}),Se(_e(i),"pause",function(a){i.autoplayTimer&&(clearInterval(i.autoplayTimer),i.autoplayTimer=null);var c=i.state.autoplaying;a==="paused"?i.setState({autoplaying:"paused"}):a==="focused"?(c==="hovered"||c==="playing")&&i.setState({autoplaying:"focused"}):c==="playing"&&i.setState({autoplaying:"hovered"})}),Se(_e(i),"onDotsOver",function(){return i.props.autoplay&&i.pause("hovered")}),Se(_e(i),"onDotsLeave",function(){return i.props.autoplay&&i.state.autoplaying==="hovered"&&i.autoPlay("leave")}),Se(_e(i),"onTrackOver",function(){return i.props.autoplay&&i.pause("hovered")}),Se(_e(i),"onTrackLeave",function(){return i.props.autoplay&&i.state.autoplaying==="hovered"&&i.autoPlay("leave")}),Se(_e(i),"onSlideFocus",function(){return i.props.autoplay&&i.pause("focused")}),Se(_e(i),"onSlideBlur",function(){return i.props.autoplay&&i.state.autoplaying==="focused"&&i.autoPlay("blur")}),Se(_e(i),"render",function(){var a=(0,AL.default)("slick-slider",i.props.className,{"slick-vertical":i.props.vertical,"slick-initialized":!0}),c=de(de({},i.props),i.state),d=(0,rt.extractObject)(c,["fade","cssEase","speed","infinite","centerMode","focusOnSelect","currentSlide","lazyLoad","lazyLoadedList","rtl","slideWidth","slideHeight","listHeight","vertical","slidesToShow","slidesToScroll","slideCount","trackStyle","variableWidth","unslick","centerPadding","targetSlide","useCSS"]),h=i.props.pauseOnHover;d=de(de({},d),{},{onMouseEnter:h?i.onTrackOver:null,onMouseLeave:h?i.onTrackLeave:null,onMouseOver:h?i.onTrackOver:null,focusOnSelect:i.props.focusOnSelect&&i.clickable?i.selectHandler:null});var g;if(i.props.dots===!0&&i.state.slideCount>=i.props.slidesToShow){var v=(0,rt.extractObject)(c,["dotsClass","slideCount","slidesToShow","currentSlide","slidesToScroll","clickHandler","children","customPaging","infinite","appendDots"]),_=i.props.pauseOnDotsHover;v=de(de({},v),{},{clickHandler:i.changeSlide,onMouseEnter:_?i.onDotsLeave:null,onMouseOver:_?i.onDotsOver:null,onMouseLeave:_?i.onDotsLeave:null}),g=Qt.default.createElement(RL.Dots,v)}var k,C,D=(0,rt.extractObject)(c,["infinite","centerMode","currentSlide","slideCount","slidesToShow","prevArrow","nextArrow"]);D.clickHandler=i.changeSlide,i.props.arrows&&(k=Qt.default.createElement(X1.PrevArrow,D),C=Qt.default.createElement(X1.NextArrow,D));var j=null;i.props.vertical&&(j={height:i.state.listHeight});var y=null;i.props.vertical===!1?i.props.centerMode===!0&&(y={padding:"0px "+i.props.centerPadding}):i.props.centerMode===!0&&(y={padding:i.props.centerPadding+" 0px"});var w=de(de({},j),y),S=i.props.touchMove,E={className:"slick-list",style:w,onClick:i.clickHandler,onMouseDown:S?i.swipeStart:null,onMouseMove:i.state.dragging&&S?i.swipeMove:null,onMouseUp:S?i.swipeEnd:null,onMouseLeave:i.state.dragging&&S?i.swipeEnd:null,onTouchStart:S?i.swipeStart:null,onTouchMove:i.state.dragging&&S?i.swipeMove:null,onTouchEnd:S?i.touchEnd:null,onTouchCancel:i.state.dragging&&S?i.swipeEnd:null,onKeyDown:i.props.accessibility?i.keyHandler:null},T={className:a,dir:"ltr",style:i.props.style};return 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协议进行再次扩展优化后的软硬件实现，充分发挥软硬件协同设计开发的优势，通过硬件加速实现高吞吐低延迟，通过软件用户态协议栈实现集中管理且高度可配置的传输策略，从而实现在不同网络环境下都可以发挥极致性能。项目采用 Bluespec SystemVerilog、C 和 Rust 来实现硬件及软件逻辑，从而确保开源项目的正确性和可维护性。"},{key:3,type:"text",content:"在测试及验证方面，我们积极采用开源验证工具，同时也开发了自己的验证工具。Open-RDMA 套件通过 Bluesim、Cocotb 工具来进行RTL级别的验证，通过自研的 RoCE-Sim 工具进行协议数据包级别的验证，通过 Distro-Sim 工具进行软硬件联合仿真验证和调试。"},{key:4,type:"text",content:"目前，我们已经实现了整个开源套件的基本框架，并正在逐步加入更多功能。"}],url:"https://github.com/datenlord/open-rdma",img:E6}],W6=({item:e})=>{const{title:t,subTitle:r,img:n,main:i,url:o}=e;return l.jsxs(M6,{children:[l.jsxs(I6,{children:[l.jsx(N6,{}),l.jsx(Y6,{children:t}),l.jsx(z6,{})]}),l.jsx(V6,{style:{paddingBottom:"0.41rem",color:"#000"},children:r}),n&&l.jsx($6,{src:n}),i.map(({key:a,type:c,content:d,items:h})=>c==="text"?l.jsx(H6,{children:d},a):c==="list"?l.jsx(F6,{children:h==null?void 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进行分享，主要内容为“喷泉码技术简介”介绍。",date:"2023.01.15",url:"https://www.bilibili.com/video/BV1SM411b77k/"},{key:23,image:iV,title:"数据库隔离级别及MVCC",text:"本场workshop由达坦科技DatenLord施继成进行分享，主要内容为“数据库隔离级别及MVCC”介绍。",date:"2023.01.29",url:"https://www.bilibili.com/video/BV1sR4y1b7Cu/"},{key:24,image:oV,title:"互联网传输协议优化研究",text:"本场workshop由中国人民大学副教授李彤教授进行分享，主要内容为“互联网传输协议优化研究”介绍。",date:"2023.02.06",url:"https://www.bilibili.com/video/BV1X84y157vL/"},{key:25,image:sV,title:"高性能RDMA网络协议栈",text:"高性能RDMA网络协议栈是RDMA高性能网络的核心组成部分之一，它提供了支持RDMA技术的网络协议和驱动程序。在本周的前沿科技分享中，我们邀请到了湖南大学信息科学与工程学院的陈果教授来给我们分享高性能RDMA网络协议栈的话题。",date:"2023.02.28",url:"https://www.bilibili.com/video/BV1Y24y1n7Dk/"},{key:26,image:aV,title:"GPU抢占式任务调度",text:"GPU编程可以大幅提升计算速度和效率，从而使得许多计算任务得以在合理时间内完成。随着GPU硬件技术的发展和大规模数据处理需求的增加，GPU编程的应用范围不断扩大。在本周的前沿科技分享中，我们邀请到了上海交通大学并行与分布式研究所的韩明聪博士来给我们分享GPU抢占式任务调度。",date:"2023.03.05",url:"https://www.bilibili.com/video/BV1cY4y1y7ND/"},{key:27,image:lV,title:"聊聊RaptorQ纠错码",text:"喷泉码具有极高的纠错能力，且具有低延迟、地复杂度、高效率等优点，使其在冷存储、分布式存储、无线通信等领域得到广泛应用。达坦科技致力于软硬件融合的解决方案，喷泉码的高效实现在硬件上，作为公司长期的技术储备，在本周的前沿科技分享中，达坦科技的联合创始人兼CTO施继成将为大家分享聊聊 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CEO崔汉青，来为大家分享Rust在物理引擎研发中的应用。",date:"2023.06.27",url:"https://b23.tv/BZuSvyW"},{key:40,image:vV,title:"基于BSV的RTL仿真加速设计研究",text:"BSV的仿真加速可以提升硬件开发调试的效率。在本周的前沿技术分享中，我们邀请到了梁之杰，来为大家分享基于BSV的RTL仿真加速设计研究。",date:"2023.07.09",url:"https://www.bilibili.com/video/BV1ou411L7Yy/"},{key:41,image:yV,title:"RDMA网络的系统测试方案",text:"在本周的前沿技术分享中，我们邀请到了孔心皓，来为大家分享RDMA 网络的系统测试方案。",date:"2023.07.16",url:"https://www.bilibili.com/video/BV1tz4y147rw/"},{key:42,image:wV,title:"RapidWright技术分享会",text:"在本周的前沿技术分享中，我们邀请到了西南交通大学邸志雄副教授和他的学生向瀚章，来为大家分享开源FPGA设计工具RapidWright技术。",date:"2023.07.28",url:"https://www.bilibili.com/video/BV14z4y1x7a8/"},{key:43,image:xV,title:"基于Karmada实现Kubernetes应用跨集群故障转移",text:"在本周的前沿技术分享中，我们邀请到了开源爱好者，云兴科技软件研发工程师梁远鹏，来为大家分享基于Karmada实现Kubernetes应用跨集群故障转移。",date:"2023.08.01",url:"https://www.bilibili.com/video/BV1rN411Y7aZ/"},{key:50,image:_V,title:"大模型训练和基础设施",text:"在本周的前沿技术分享中，我们邀请到了范一呈，来为大家分享大模型训练和基础设施。",date:"2023.09.01",url:"https://www.bilibili.com/video/BV1ZN4y1R7HP/"},{key:51,image:SV,title:"RustBelt与Rust形式化方法",text:"在本周的前沿技术分享中，我们邀请到了王俊吉，来为大家分享RustBelt与Rust形式化方法。",date:"2023.09.04",url:"https://www.bilibili.com/video/BV1Vw411D7rT/"},{key:52,image:bV,title:"网络的智能该放在哪里：网卡、交换机还是xPU",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:53,image:kV,title:"以ARM为镜的RISC-V",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:55,image:CV,title:"让大模型在场景中真正落地的产品形态、技术堆栈、交付服务",text:"达坦科技始终致力于打造高性能 Al+ Cloud 基础设施平台，积极推动AI应用的落地。达坦科技通过软硬件深度融合的方式，提供高性能存储和高性能网络。为 AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对 AI+Cloud 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Rust",text:"随着新型网络技术，如RDMA的普及，现代分布式应用的延迟降到了毫秒甚至微秒级别。这为构建系统软件带来了新的挑战。Rust的zero-cost抽象及内存管理能力能够为构建新型分布式应用带来新的机遇。我将分享利用Rust在用户态及内核态构建新型系统软件的相关经验，包括如何利用Rust抽象RDMA硬件的底层抽象及如何在内核构建一个毫秒级的容器启动机制。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV1Zo4y1P7Sg/"},{key:12,image:FV,title:"30分钟体验Rust for Linux内核模块开发",text:"本主题会提供构建好的docker开发环境，在30分钟内演示如何使用r4l开发一个简易内核模块，并介绍目前r4l的发展现状。可以自备好电脑现场体验。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV12j411U78o/"},{key:13,image:UV,title:"DatenLord 2023 Hackathon赛题宣讲会",text:"达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛主题为 Explore the Possibilities 赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来吧！",date:"2023.11.25",url:"https://www.bilibili.com/video/BV1su4y157iB/"},{key:14,image:$V,title:"DatenLord Hackathon2023空中路演",text:"DatenLord Hackathon 2023已经顺利完赛。达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台。我们邀请参赛者为DatenLord的极端场景设计并实现缓存 p2p 传输和同步模块。本次空中路演邀请了最终获得优胜奖的两支队伍进行思路分享，包括他们的解题思路，碰到的难点和挑战，以及如何应对的方法和设计亮点。欢迎感兴趣的大家进行观看，有问题也欢迎在评论区进行交流～～不要忘记一键三连哦～～",date:"2024.01.07",url:"https://www.bilibili.com/video/BV1ic411t7Nf/"}],WV="/zh-cn/assets/cover1-b9371555.jpg",GV="/zh-cn/assets/cover2-41a903e3.jpg",KV="/zh-cn/assets/cover2-41a903e3.jpg",XV="/zh-cn/assets/cover2-41a903e3.jpg",QV="/zh-cn/assets/cover2-41a903e3.jpg",qV="/zh-cn/assets/cover2-41a903e3.jpg",ZV="/zh-cn/assets/cover2-41a903e3.jpg",JV="/zh-cn/assets/cover2-41a903e3.jpg",eF="/zh-cn/assets/cover2-41a903e3.jpg",tF="/zh-cn/assets/cover13-a69a12b0.jpg",rF="/zh-cn/assets/cover14-3a97e013.jpg",nF="/zh-cn/assets/cover14-3a97e013.jpg",iF="/zh-cn/assets/cover14-3a97e013.jpg",oF="/zh-cn/assets/cover14-3a97e013.jpg",sF="/zh-cn/assets/cover14-3a97e013.jpg",aF="/zh-cn/assets/cover14-3a97e013.jpg",lF="/zh-cn/assets/cover20-c97bc11b.jpg",cF="/zh-cn/assets/cover21-9f52ba13.jpg",uF="/zh-cn/assets/cover22-187b655a.jpg",dF="/zh-cn/assets/cover23-1e515665.jpg",fF="/zh-cn/assets/cover24-020d0c34.jpg",hF="/zh-cn/assets/cover25-cb84d871.jpg",mF="/zh-cn/assets/cover26-7a726e97.jpg",pF="/zh-cn/assets/cover27-401eea81.jpg",gF="/zh-cn/assets/cover28-6ddc6bee.jpg",vF="/zh-cn/assets/cover29-0d2deb11.jpg",yF=[{key:1,image:WV,title:"Utilizing SpinalHDL for Large-scale Datapath Design",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的一个workshop：Utilizing SpinalHDL for Large-scale Datapath Design，由李天瑞进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1PM411m7DB/"},{key:2,image:GV,title:"A Network Attached Deep Learning Accelerator for FPGA Clusters",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的三个workshop：A Network Attached Deep Learning Accelerator for FPGA Clusters，由Philipp Kreowsky Justin Knapheide进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1HM411m7mS/"},{key:3,image:KV,title:"Coding a microprogrammed protocol receiver in SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的五个workshop：Coding a microprogrammed protocol receiver in SpinalHDL，由Michael Meier进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1oK411z7VD/"},{key:4,image:XV,title:"Utilizing SpinalHDL to Accelerate Neuroscience",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的二个workshop：Utilizing SpinalHDL to Accelerate Neuroscience，由Jeff-Ciesielski进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1GG4y1J7gU/"},{key:5,image:QV,title:"SpinalHDL in Computer Architecture Research",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的四个workshop：SpinalHDL in Computer Architecture Research，由Sallar Ahmadi-Pour ( saahm)进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1gA411X7f8/"},{key:6,image:qV,title:"NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第六个workshop：NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix，由Dolu1990进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV13K41167q5/"},{key:7,image:ZV,title:"Recent progress on formal verification support on SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第七个workshop：Recent progress on formal verification support on SpinalHDL，由Xiao Yindong (Readon)进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV1bG411N7fk/"},{key:8,image:JV,title:"SpinalHDL for ASIC",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第八个workshop：SpinalHDL for ASIC，由Sebastien-riou进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV16e4y1L7dV/"},{key:9,image:eF,title:"From Peripheral Plugins to Product documentation",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第九个workshop：From Peripheral Plugins to Product documentation，由Andreas Wallner进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV12v4y1Q7cg/"},{key:13,image:tF,title:"Coroutines Applied to a Tilelink Interconnect Elaboration",text:"SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。达坦科技联合了SpinalHDL社区，以及四川芯测电子技术有限公司举办了一场题为SpinalHDL的使用和开发经验研讨会，旨在和大家分享SpinalHDL最新的实践、挑战和经验的分享。本视频为Workshop的第一部分，由Charles Popen进行分享。",date:"2023.07.08",url:"https://www.bilibili.com/video/BV1Vz4y1J7ck/"},{key:14,image:rF,title:"RISC-V敏捷硬件开发-软件定义芯片",text:"2023年8月23日至25日， 2023 RISC-V中国峰会在北京香格里拉饭店举办。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技在线上举办了第二届硬件敏捷开发与验证方法学研讨会。本次研讨会邀请了业界多位专家分享他们在各自领域的硬件敏捷开发与验证实践经验，为业界提供一次深入探讨和交流的机会，促进硬件敏捷开发与验证方法学的发展与落地。这是本场研讨会的第一个分享《RISC-V敏捷硬件开发-软件定义芯片》。",date:"2023.08.25",url:"https://www.bilibili.com/video/BV1Qh4y1K7pH/"},{key:15,image:nF,title:"香山处理器与敏捷开发工具链的最新进展",text:"2023年8月23日至25日， 2023 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进行分享，主要内容为“喷泉码技术简介”介绍。",date:"2023.01.15",url:"https://www.bilibili.com/video/BV1SM411b77k/"},{key:23,image:iH,title:"数据库隔离级别及MVCC",text:"本场workshop由达坦科技DatenLord施继成进行分享，主要内容为“数据库隔离级别及MVCC”介绍。",date:"2023.01.29",url:"https://www.bilibili.com/video/BV1sR4y1b7Cu/"},{key:24,image:oH,title:"互联网传输协议优化研究",text:"本场workshop由中国人民大学副教授李彤教授进行分享，主要内容为“互联网传输协议优化研究”介绍。",date:"2023.02.06",url:"https://www.bilibili.com/video/BV1X84y157vL/"},{key:25,image:sH,title:"高性能RDMA网络协议栈",text:"高性能RDMA网络协议栈是RDMA高性能网络的核心组成部分之一，它提供了支持RDMA技术的网络协议和驱动程序。在本周的前沿科技分享中，我们邀请到了湖南大学信息科学与工程学院的陈果教授来给我们分享高性能RDMA网络协议栈的话题。",date:"2023.02.28",url:"https://www.bilibili.com/video/BV1Y24y1n7Dk/"},{key:26,image:aH,title:"GPU抢占式任务调度",text:"GPU编程可以大幅提升计算速度和效率，从而使得许多计算任务得以在合理时间内完成。随着GPU硬件技术的发展和大规模数据处理需求的增加，GPU编程的应用范围不断扩大。在本周的前沿科技分享中，我们邀请到了上海交通大学并行与分布式研究所的韩明聪博士来给我们分享GPU抢占式任务调度。",date:"2023.03.05",url:"https://www.bilibili.com/video/BV1cY4y1y7ND/"},{key:27,image:lH,title:"聊聊RaptorQ纠错码",text:"喷泉码具有极高的纠错能力，且具有低延迟、地复杂度、高效率等优点，使其在冷存储、分布式存储、无线通信等领域得到广泛应用。达坦科技致力于软硬件融合的解决方案，喷泉码的高效实现在硬件上，作为公司长期的技术储备，在本周的前沿科技分享中，达坦科技的联合创始人兼CTO施继成将为大家分享聊聊 RaptorQ 纠错码 。",date:"2023.03.15",url:"https://www.bilibili.com/video/BV1wL411C7DL/"},{key:28,image:cH,title:"Buddy Compiler 简介和愿景",text:"在本次分享中，中国科学院软件研究所博士生张洪滨将介绍Buddy Compiler 编译流程、协同设计、硬件支持。Buddy Compiler 是领域特定的编译器框架，致力于打造基于 MLIR 和 RISC-V 的软硬件协同设计生态。其目标是实现从 DSL 到 DSA 的编译流程和协同设计，愿景是让领域特定的协同设计不再困难。",date:"2023.03.21",url:"https://www.bilibili.com/video/BV1YT41167GB/"},{key:29,image:uH,title:"新一代计算架构：超异构计算",text:"AGI带来的变化之一是算力将进一步从CPU转到GPU，在本周的前沿技术分享中，我们邀请到了上海矩向科技创始人兼CEO黄朝波为大家分享新一代计算架构：超异构计算。",date:"2023.04.04",url:"https://www.bilibili.com/video/BV1Rm4y1q7Dx/"},{key:30,image:dH,title:"通过Chainsaw设计DSP电路",text:"DSP在数据压缩、编码和加密方面都发挥了重要的作用；SpinalHDL具有更高的抽象层次和更强的表达能力，可以大大简化DSP电路设计的复杂度和提高开发效率；而Chainsaw框架可以在不同的FPGA平台上运行，提高了设计的灵活性和可移植性。在本周的前沿技术分享中，我们邀请到了中山大学在读博士李天瑞为大家分享通过Chainsaw设计DSP电路。",date:"2023.04.18",url:"https://www.bilibili.com/video/BV14o4y1j7bH/"},{key:31,image:fH,title:"Something About Cache Security",text:"在本周的前沿技术分享中，我们邀请到了浙江大学在读硕士研究生缪晨露为大家分享她在MICRO和HPCA上发表的两篇论文的精华，演讲主题是Something About Cache Security。",date:"2023.04.25",url:"https://www.bilibili.com/video/BV1p24y1F7fN/"},{key:32,image:hH,title:"Rust嵌入式开发生态介绍及入门",text:"在本周的前沿技术分享中，我们邀请到了一位爱好硬件的软件工程师米明恒，来为大家分享Rust嵌入式开发生态介绍及入门。",date:"2023.05.04",url:"https://www.bilibili.com/video/BV1J24y1T7EH/"},{key:33,image:mH,title:"RDMA赋能数据中心/超算中心间远程互联",text:"在本周的前沿技术分享中，我们邀请到了南京大学田臣教授，来为大家分享RDMA赋能数据中心/超算中心间远程互联。",date:"2023.06.04",url:"https://www.bilibili.com/video/BV1cz4y1B7cx/"},{key:34,image:pH,title:"Paper Reading: DPU任务卸载",text:"达坦科技一直在探索用硬件加速做分布式跨云存储，在本周的前沿技术分享中，我们邀请到了中南大学在读博士生卢军，来为大家分享DPU任务卸载的相关研究。",date:"2023.06.17",url:"https://www.bilibili.com/video/BV1R14y1S79T/"},{key:35,image:gH,title:"Rust在物理引擎研发中的应用",text:"在本周的前沿技术分享中，我们邀请到了Motphys CEO崔汉青，来为大家分享Rust在物理引擎研发中的应用。",date:"2023.06.27",url:"https://b23.tv/BZuSvyW"},{key:40,image:vH,title:"基于BSV的RTL仿真加速设计研究",text:"BSV的仿真加速可以提升硬件开发调试的效率。在本周的前沿技术分享中，我们邀请到了梁之杰，来为大家分享基于BSV的RTL仿真加速设计研究。",date:"2023.07.09",url:"https://www.bilibili.com/video/BV1ou411L7Yy/"},{key:41,image:yH,title:"RDMA网络的系统测试方案",text:"在本周的前沿技术分享中，我们邀请到了孔心皓，来为大家分享RDMA 网络的系统测试方案。",date:"2023.07.16",url:"https://www.bilibili.com/video/BV1tz4y147rw/"},{key:42,image:wH,title:"RapidWright技术分享会",text:"在本周的前沿技术分享中，我们邀请到了西南交通大学邸志雄副教授和他的学生向瀚章，来为大家分享开源FPGA设计工具RapidWright技术。",date:"2023.07.28",url:"https://www.bilibili.com/video/BV14z4y1x7a8/"},{key:43,image:xH,title:"基于Karmada实现Kubernetes应用跨集群故障转移",text:"在本周的前沿技术分享中，我们邀请到了开源爱好者，云兴科技软件研发工程师梁远鹏，来为大家分享基于Karmada实现Kubernetes应用跨集群故障转移。",date:"2023.08.01",url:"https://www.bilibili.com/video/BV1rN411Y7aZ/"},{key:50,image:_H,title:"大模型训练和基础设施",text:"在本周的前沿技术分享中，我们邀请到了范一呈，来为大家分享大模型训练和基础设施。",date:"2023.09.01",url:"https://www.bilibili.com/video/BV1ZN4y1R7HP/"},{key:51,image:SH,title:"RustBelt与Rust形式化方法",text:"在本周的前沿技术分享中，我们邀请到了王俊吉，来为大家分享RustBelt与Rust形式化方法。",date:"2023.09.04",url:"https://www.bilibili.com/video/BV1Vw411D7rT/"},{key:52,image:bH,title:"网络的智能该放在哪里：网卡、交换机还是xPU",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:53,image:kH,title:"以ARM为镜的RISC-V",text:"在本周的前沿技术分享中，我们邀请到了Logenic AI联合创始人、前华为天才少年李博杰，来为大家分享网络的智能该放在哪里：网卡、交换机还是xPU。",date:"2023.09.25",url:"https://www.bilibili.com/video/BV1Kw411Y7Cj/"},{key:55,image:CH,title:"让大模型在场景中真正落地的产品形态、技术堆栈、交付服务",text:"达坦科技始终致力于打造高性能 Al+ Cloud 基础设施平台，积极推动AI应用的落地。达坦科技通过软硬件深度融合的方式，提供高性能存储和高性能网络。为 AI 应用提供弹性、便利、经济的基础设施服务，以此满足不同行业客户对 AI+Cloud 的需求。在本周的前沿技术分享中，我们邀请到了猴子无限创始人兼CEO尹伯昊，来为大家分享让大模型在场景中真正落地的产品形态、技术堆栈、交付服务。",date:"2024.03.18",url:"https://www.bilibili.com/video/BV1KJ4m187gS/"}],jH="/zh-cn/assets/cover1-42e6189a.jpg",EH="/zh-cn/assets/cover2-af26ed46.jpg",AH="/zh-cn/assets/cover3-9c9d21fa.jpg",TH=[{key:1,image:jH,title:"Xline-跨数据中心一致性的元数据管理",text:"天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline是一款开源分布式KV存储系统，基于Curp共识算法实现，旨在提供跨云元数据管理的功能。相比于传统共识协议Raft或Paxos，Curp在天空计算的场景中有着更好的性能表现。本次分享将聚焦于共识算法，从天空计算的背景和挑战出发，介绍Curp共识算法，以及Revision机制与Curp无序性语义之间的冲突，最后，简述下Xline未来的优化方向。欢迎了解更多关于Xline的信息：Https://github.com/datenlord/Xline",date:"2023.02.09",url:"https://www.bilibili.com/video/BV1XY411q7X8/"},{key:2,image:EH,title:"源码解读：Xline Curp共识协议的设计与实现",text:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。",date:"2023.04.30",url:"https://www.bilibili.com/video/BV1dL411h7YK/"},{key:3,image:AH,title:"Xline的Lease机制与实现",text:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。",date:"2023.06.09",url:"https://www.bilibili.com/video/BV1FX4y1h7X5/"}],RH="/zh-cn/assets/cover1-a1358db9.jpg",OH="/zh-cn/assets/cover2-b899ea12.jpg",PH="/zh-cn/assets/cover3-e0bf4798.jpg",LH="/zh-cn/assets/cover4-15b0b4f1.jpg",MH="/zh-cn/assets/cover5-7c4c2482.jpg",IH="/zh-cn/assets/cover6-1c4d5c5f.jpg",NH="/zh-cn/assets/cover7-4f7454c0.jpg",zH="/zh-cn/assets/cover8-7e30c0fc.jpg",YH="/zh-cn/assets/cover9-e8c86c60.jpg",VH="/zh-cn/assets/cover10-bb13b118.jpg",HH="/zh-cn/assets/cover11-c29e9692.jpg",FH="/zh-cn/assets/cover12-6877e246.jpg",UH="/zh-cn/assets/cover13-5a4d97b0.jpg",$H="/zh-cn/assets/cover14-052a8b36.jpg",BH=[{key:7,image:NH,title:"2022年Rust开发者大会Workshop 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Indexing感兴趣的伙伴观看本条视频。",date:"2023.01.15",url:"https://www.bilibili.com/video/BV1xY41197Za/"},{key:2,image:OH,title:"4.8 Beijing Rust Meetup｜张汉东《理解 Unsafe Rust》",text:"2023年4月8日，达坦科技联合南京大学、CloudWeGo、华为等技术专家成功举办了题为Rust 💡X的meetup。本场分享由《Rust 编程之道》作者、Rust 中文社区布道者张汉东老师进行，主题为《理解 Unsafe Rust》。",date:"2023.04.12",url:"https://www.bilibili.com/video/BV1c24y1A7aK/"},{key:3,image:PH,title:"4.8 Beijing Rust Meetup｜冯洋《RUFES》",text:"2023年4月8日，达坦科技联合南京大学、CloudWeGo、华为等技术专家成功举办了题为Rust 💡X的meetup。本场由南京大学计算机科学与技术系助理研究员冯洋老师进行《基于实际场景应用分析的Rust库模糊测试技术报告》的演讲分享。",date:"2023.04.12",url:"https://www.bilibili.com/video/BV1Qo4y1n7tS/"},{key:4,image:LH,title:"4.8 Beijing Rust Meetup｜施继成《Rust for Linux 6.2》",text:"2023年4月8日，达坦科技联合南京大学、CloudWeGo、华为等技术专家成功举办了题为Rust 💡X的meetup。本场分享由达坦科技联合创始人兼CTO施继成进行，演讲主题是《Rust for Linux 6.2》。",date:"2023.04.12",url:"https://www.bilibili.com/video/BV1Bs4y117Ze/"},{key:5,image:MH,title:"4.8 Beijing Rust Meetup｜叶天星《用Rust实现Git传输协议、Git对象解析和数据库存储》",text:"2023年4月8日，达坦科技联合南京大学、CloudWeGo、华为等技术专家成功举办了题为Rust 💡X的meetup。本场分享由达坦科技联合创始人兼CTO施继成进行，演讲主题是《Rust for Linux 6.2》。",date:"2023.04.12",url:"https://www.bilibili.com/video/BV1Bs4y117Ze/"},{key:6,image:IH,title:"4.8 Beijing Rust Meetup｜茌海《Monoio：一个基于 io-uring 的 Rust Runtime》",text:"2023年4月8日，达坦科技联合南京大学、CloudWeGo、华为等技术专家成功举办了题为Rust 💡X的meetup。本场分享由达坦科技联合创始人兼CTO施继成进行，演讲主题是《Rust for Linux 6.2》。",date:"2023.04.12",url:"https://www.bilibili.com/video/BV1Rh411M7EP/"},{key:10,image:VH,title:"如何用Rust写分布式系统",text:"分享会介绍分布式KV Store (Xline) 整体的组成，以及不同组件之间如何去交互。在广域网下的分布式系统如何高效地达成共识，以及分布式系统如何实现容错。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV1Hs4y1r7dD/"},{key:11,image:HH,title:"Building microsecond-scale system with modern networking in Rust",text:"随着新型网络技术，如RDMA的普及，现代分布式应用的延迟降到了毫秒甚至微秒级别。这为构建系统软件带来了新的挑战。Rust的zero-cost抽象及内存管理能力能够为构建新型分布式应用带来新的机遇。我将分享利用Rust在用户态及内核态构建新型系统软件的相关经验，包括如何利用Rust抽象RDMA硬件的底层抽象及如何在内核构建一个毫秒级的容器启动机制。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV1Zo4y1P7Sg/"},{key:12,image:FH,title:"30分钟体验Rust for Linux内核模块开发",text:"本主题会提供构建好的docker开发环境，在30分钟内演示如何使用r4l开发一个简易内核模块，并介绍目前r4l的发展现状。可以自备好电脑现场体验。",date:"2023.06.24",url:"https://www.bilibili.com/video/BV12j411U78o/"},{key:13,image:UH,title:"DatenLord 2023 Hackathon赛题宣讲会",text:"达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛主题为 Explore the Possibilities 赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来吧！",date:"2023.11.25",url:"https://www.bilibili.com/video/BV1su4y157iB/"},{key:14,image:$H,title:"DatenLord Hackathon2023空中路演",text:"DatenLord Hackathon 2023已经顺利完赛。达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台。我们邀请参赛者为DatenLord的极端场景设计并实现缓存 p2p 传输和同步模块。本次空中路演邀请了最终获得优胜奖的两支队伍进行思路分享，包括他们的解题思路，碰到的难点和挑战，以及如何应对的方法和设计亮点。欢迎感兴趣的大家进行观看，有问题也欢迎在评论区进行交流～～不要忘记一键三连哦～～",date:"2024.01.07",url:"https://www.bilibili.com/video/BV1ic411t7Nf/"}],WH="/zh-cn/assets/cover1-b9371555.jpg",GH="/zh-cn/assets/cover2-41a903e3.jpg",KH="/zh-cn/assets/cover2-41a903e3.jpg",XH="/zh-cn/assets/cover2-41a903e3.jpg",QH="/zh-cn/assets/cover2-41a903e3.jpg",qH="/zh-cn/assets/cover2-41a903e3.jpg",ZH="/zh-cn/assets/cover2-41a903e3.jpg",JH="/zh-cn/assets/cover2-41a903e3.jpg",eF="/zh-cn/assets/cover2-41a903e3.jpg",tF="/zh-cn/assets/cover13-a69a12b0.jpg",rF="/zh-cn/assets/cover14-3a97e013.jpg",nF="/zh-cn/assets/cover14-3a97e013.jpg",iF="/zh-cn/assets/cover14-3a97e013.jpg",oF="/zh-cn/assets/cover14-3a97e013.jpg",sF="/zh-cn/assets/cover14-3a97e013.jpg",aF="/zh-cn/assets/cover14-3a97e013.jpg",lF="/zh-cn/assets/cover20-c97bc11b.jpg",cF="/zh-cn/assets/cover21-9f52ba13.jpg",uF="/zh-cn/assets/cover22-187b655a.jpg",dF="/zh-cn/assets/cover23-1e515665.jpg",fF="/zh-cn/assets/cover24-020d0c34.jpg",hF="/zh-cn/assets/cover25-cb84d871.jpg",mF="/zh-cn/assets/cover26-7a726e97.jpg",pF="/zh-cn/assets/cover27-401eea81.jpg",gF="/zh-cn/assets/cover28-6ddc6bee.jpg",vF="/zh-cn/assets/cover29-0d2deb11.jpg",yF=[{key:1,image:WH,title:"Utilizing SpinalHDL for Large-scale Datapath Design",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的一个workshop：Utilizing SpinalHDL for Large-scale Datapath Design，由李天瑞进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1PM411m7DB/"},{key:2,image:GH,title:"A Network Attached Deep Learning Accelerator for FPGA Clusters",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的三个workshop：A Network Attached Deep Learning Accelerator for FPGA Clusters，由Philipp Kreowsky Justin Knapheide进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1HM411m7mS/"},{key:3,image:KH,title:"Coding a microprogrammed protocol receiver in SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的五个workshop：Coding a microprogrammed protocol receiver in SpinalHDL，由Michael Meier进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1oK411z7VD/"},{key:4,image:XH,title:"Utilizing SpinalHDL to Accelerate Neuroscience",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的二个workshop：Utilizing SpinalHDL to Accelerate Neuroscience，由Jeff-Ciesielski进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1GG4y1J7gU/"},{key:5,image:QH,title:"SpinalHDL in Computer Architecture Research",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的四个workshop：SpinalHDL in Computer Architecture Research，由Sallar Ahmadi-Pour ( saahm)进行分享。",date:"2022.12.20",url:"https://www.bilibili.com/video/BV1gA411X7f8/"},{key:6,image:qH,title:"NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第六个workshop：NaxRiscv: A Pipeline/Plugins/SpinalHDL/Scala mix，由Dolu1990进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV13K41167q5/"},{key:7,image:ZH,title:"Recent progress on formal verification support on SpinalHDL",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第七个workshop：Recent progress on formal verification support on SpinalHDL，由Xiao Yindong (Readon)进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV1bG411N7fk/"},{key:8,image:JH,title:"SpinalHDL for ASIC",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第八个workshop：SpinalHDL for ASIC，由Sebastien-riou进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV16e4y1L7dV/"},{key:9,image:eF,title:"From Peripheral Plugins to Product documentation",text:"为了让对开源硬件感兴趣的朋友进一步了解SpinalHDL，达坦科技联合SpinalHDL社区举办一场题为《SpinalHDL应用前景探索》的线上研讨会（Webinar）。本研讨会分三个讨论分主题，分别为：数据通路加速（Datapath/Accelerations）、复杂系统设计案例（Design）、硬件设计流程（Flow）。这是本场研讨会的第九个workshop：From Peripheral Plugins to Product documentation，由Andreas Wallner进行分享。",date:"2022.12.21",url:"https://www.bilibili.com/video/BV12v4y1Q7cg/"},{key:13,image:tF,title:"Coroutines Applied to a Tilelink Interconnect Elaboration",text:"SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。达坦科技联合了SpinalHDL社区，以及四川芯测电子技术有限公司举办了一场题为SpinalHDL的使用和开发经验研讨会，旨在和大家分享SpinalHDL最新的实践、挑战和经验的分享。本视频为Workshop的第一部分，由Charles Popen进行分享。",date:"2023.07.08",url:"https://www.bilibili.com/video/BV1Vz4y1J7ck/"},{key:14,image:rF,title:"RISC-V敏捷硬件开发-软件定义芯片",text:"2023年8月23日至25日， 2023 RISC-V中国峰会在北京香格里拉饭店举办。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技在线上举办了第二届硬件敏捷开发与验证方法学研讨会。本次研讨会邀请了业界多位专家分享他们在各自领域的硬件敏捷开发与验证实践经验，为业界提供一次深入探讨和交流的机会，促进硬件敏捷开发与验证方法学的发展与落地。这是本场研讨会的第一个分享《RISC-V敏捷硬件开发-软件定义芯片》。",date:"2023.08.25",url:"https://www.bilibili.com/video/BV1Qh4y1K7pH/"},{key:15,image:nF,title:"香山处理器与敏捷开发工具链的最新进展",text:"2023年8月23日至25日， 2023 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display: flex; flex-direction: column; align-items: center; @@ -2755,7 +2755,7 @@ var n=r.defineLocale("zh-cn",{months:"一月_二月_三月_四月_五月_六月_ width: 0.2rem; `,Yl=f.div` position: relative; -`,Hl=f.div` +`,Vl=f.div` /* min-height: 6.4rem; */ display: flex; flex-direction: column; @@ -2769,7 +2769,7 @@ var n=r.defineLocale("zh-cn",{months:"一月_二月_三月_四月_五月_六月_ `,wf=f.div` font-size: 0.4rem; font-weight: 600; -`,ZG=f(Yl)``,JG=f(Hl)` +`,ZG=f(Yl)``,JG=f(Vl)` padding-block: 0.7rem 1.17rem; `,eK=f(yf)``,tK=f(wf)``,rK=f(zl)` padding-top: 0.61rem; @@ -2806,7 +2806,7 @@ var n=r.defineLocale("zh-cn",{months:"一月_二月_三月_四月_五月_六月_ #f9fcff 47.11%, #edf6fc 102.52% ); -`,aK=f(Hl)` +`,aK=f(Vl)` min-height: 6.4rem; padding-block: 0.7rem 1.49rem; `,lK=f(yf)` @@ -2954,7 +2954,7 @@ var n=r.defineLocale("zh-cn",{months:"一月_二月_三月_四月_五月_六月_ background: #7680dd; `,CK=f(Yl)` background: linear-gradient(180deg, #f9fffe 4.64%, #fff 168.71%); -`,DK=f(Hl)` +`,DK=f(Vl)` padding-block: 0.7rem 1.45rem; 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-1,4 +1,4 @@ -const l="/zh-cn/assets/cover-f142cd17.jpg",e="/zh-cn/assets/image1-9d5b5029.jpg",s="/zh-cn/assets/image2-2129b7ac.jpg",t=[l,e,s],o={label:"计算机体系结构 l MIT课程学习新手上路宣讲",description:"MIT课程学习社区是一个兴趣导向的学习社区，大家或是想要补缺体系结构的基础知识，或是提升自己的实践和工程能力。MIT 6.175与MIT6.375的课程和Lab都有相当的难度，要求采用Bluespec语言实现RISC-V32位处理器，并支持多级流水、分支预测、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。当真正着手开始学习MIT的这两门课程，会发现不要说坚持下来，能入门也不是一件容易的事情。为此，达坦科技软硬件联合开发工程师米明恒将在2023年9月23日（周六）上午10:30为大家带来一场计算机体系结构 l MIT课程学习新手上路宣讲。",cover:"./cover.jpg",location:"中国香港",date:"2023-09-19",title:"MIT Coursework Orientation for Newcomers"},i=[{label:"MIT 课程学习社区的源",level:2},{label:"MIT 课程学习新手上路宣讲",level:2},{label:"入门宣讲的目的",level:2},{label:"入门宣讲的要点",level:2},{label:"问卷调查",level:2}],p=`

      封面

      +const l="/zh-cn/assets/cover-f142cd17.jpg",e="/zh-cn/assets/image1-9d5b5029.jpg",s="/zh-cn/assets/image2-2129b7ac.jpg",t=[l,e,s],i={label:"计算机体系结构 l MIT课程学习新手上路宣讲",description:"MIT课程学习社区是一个兴趣导向的学习社区，大家或是想要补缺体系结构的基础知识，或是提升自己的实践和工程能力。MIT 6.175与MIT6.375的课程和Lab都有相当的难度，要求采用Bluespec语言实现RISC-V32位处理器，并支持多级流水、分支预测、异常处理、缓存一致性等功能。此外，Lab环节还涉及软硬件联合开发，要求基于所实现的RISC-V处理器运行真实的RISC-V程序，并给出性能评估。当真正着手开始学习MIT的这两门课程，会发现不要说坚持下来，能入门也不是一件容易的事情。为此，达坦科技软硬件联合开发工程师米明恒将在2023年9月23日（周六）上午10:30为大家带来一场计算机体系结构 l MIT课程学习新手上路宣讲。",cover:"./cover.jpg",location:"中国香港",date:"2023-09-19",title:"MIT Coursework Orientation for Newcomers"},o=[{label:"MIT 课程学习社区的源",level:2},{label:"MIT 课程学习新手上路宣讲",level:2},{label:"入门宣讲的目的",level:2},{label:"入门宣讲的要点",level:2},{label:"问卷调查",level:2}],n=`

      封面

      MIT 课程学习社区的源

      无论用哪一种语言，Bluespec、Chisel、SpinalHDL 来进行硬件设计，背后扎实的硬件设计基础知识都是必不可少的，特别是体系结构，因为体系结构的主要研究对象是指令集架构、处理器架构、存储器层次结构、总线和 IO 等，而 CPU 作为当今最复杂的数字芯片之一，非常适合作为学习实践相关知识的一只“麻雀”。

      虽然国内大专院校计算机科学和电子工程专业都有开设体系结构或组成原理等相关课程，但是在实操环节缺失很多内容，特别是 CPU 缓存、内存管理、异常处理相关的部分，基本上都不涉及。当达坦科技做校招或招募在校实习生的时候，看到了潜在求职者在理论和实践之间的脱节。

      @@ -22,4 +22,4 @@ const l="/zh-cn/assets/cover-f142cd17.jpg",e="/zh-cn/assets/image1-9d5b5029.jpg"

      图片

      欢迎您预约直播，或者登陆腾讯会议观看直播：
      会议号：474-6575-9473

      -

      图片

      `;export{t as assetURLs,p as default,o as metadata,i as toc}; +

      图片

      `;export{t as assetURLs,n as default,i as metadata,o as toc}; diff --git a/zh-cn/assets/index-b2db3117.js b/zh-cn/assets/index-40aedb60.js similarity index 98% rename from zh-cn/assets/index-b2db3117.js rename to zh-cn/assets/index-40aedb60.js index e24fdd1..7811479 100644 --- a/zh-cn/assets/index-b2db3117.js +++ b/zh-cn/assets/index-40aedb60.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/image1-85650830.png",a="/zh-cn/assets/image2-d3ac686f.png",t="/zh-cn/assets/image3-d19685f7.png",e="/zh-cn/assets/image4-22c90bed.png",l="/zh-cn/assets/image5-060ec542.png",p="/zh-cn/assets/image6-e95accb5.png",n="/zh-cn/assets/image7-39b0aa47.png",c="/zh-cn/assets/image8-f5342e9f.png",i="/zh-cn/assets/image9-f8fdd108.png",r="/zh-cn/assets/image10-fea0520f.png",C="/zh-cn/assets/image11-3896bab5.png",o="/zh-cn/assets/image12-5d3c96d7.png",h="/zh-cn/assets/image13-56596c1a.png",d="/zh-cn/assets/image14-1cff1399.png",u="/zh-cn/assets/image15-f50d9208.png",m="/zh-cn/assets/image16-73064f95.png",g="/zh-cn/assets/image17-8fbf2614.png",R="/zh-cn/assets/image18-04a62cf7.png",_="/zh-cn/assets/image19-b4bc01e2.png",b="/zh-cn/assets/image20-41386794.png",j="/zh-cn/assets/image21-453c426e.png",E="/zh-cn/assets/image22-e0049342.png",S="/zh-cn/assets/image23-989a38cf.png",f=[s,a,t,e,l,p,n,c,i,r,C,o,h,d,u,m,g,R,_,b,j,E,S],y={label:"基于BSV的高性能并行CRC硬件电路生成器",description:"循环冗余校验码，即Cyclic Redundancy Check (CRC), 是一种在各种通信系统中广泛应用的检错机制。CRC算法的工作原理和哈希函数类似，具体来说，其对任意长度的数据计算出一段唯一的标识（校验和）, 然后根据这个标识来判断该数据在传输过程中是否发生变化。CRC检错码在实际生活中有着广泛的应用，诸如网络通信，存储系统等场景下都需要CRC来保证数据传输的正确性。而不同的应用场景往往需要采用不同的CRC配置参数，同时对计算的性能也有不同的需求。例如，在基于Ethernet协议的网络传输中需要采用IEEE802-3协议所规定的CRC参数，同时需要高吞吐率的CRC实现以和网络带宽相匹配。",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2023-07-27",title:"BSV based high performance parallel CRC hardware circuit generator"},x=[{label:"引 言",level:2},{label:"算法原理",level:2},{label:"CRC 计算的定义",level:3},{label:"电路架构与性能",level:2},{label:"架构设计",level:3},{label:"性能与面积",level:3},{label:"使用指南",level:2},{label:"配置参数",level:3},{label:"输入输出接口",level:3},{label:"BSV 使用接口",level:3},{label:"Verilog 使用接口",level:3},{label:"引用和链接",level:2}],v=`

      引 言

      +const s="/zh-cn/assets/image1-85650830.png",a="/zh-cn/assets/image2-d3ac686f.png",t="/zh-cn/assets/image3-d19685f7.png",e="/zh-cn/assets/image4-22c90bed.png",l="/zh-cn/assets/image5-060ec542.png",p="/zh-cn/assets/image6-e95accb5.png",n="/zh-cn/assets/image7-39b0aa47.png",c="/zh-cn/assets/image8-f5342e9f.png",i="/zh-cn/assets/image9-f8fdd108.png",r="/zh-cn/assets/image10-fea0520f.png",C="/zh-cn/assets/image11-3896bab5.png",o="/zh-cn/assets/image12-5d3c96d7.png",h="/zh-cn/assets/image13-56596c1a.png",d="/zh-cn/assets/image14-1cff1399.png",u="/zh-cn/assets/image15-f50d9208.png",g="/zh-cn/assets/image16-73064f95.png",m="/zh-cn/assets/image17-8fbf2614.png",R="/zh-cn/assets/image18-04a62cf7.png",_="/zh-cn/assets/image19-b4bc01e2.png",b="/zh-cn/assets/image20-41386794.png",j="/zh-cn/assets/image21-453c426e.png",S="/zh-cn/assets/image22-e0049342.png",E="/zh-cn/assets/image23-989a38cf.png",f=[s,a,t,e,l,p,n,c,i,r,C,o,h,d,u,g,m,R,_,b,j,S,E],y={label:"基于BSV的高性能并行CRC硬件电路生成器",description:"循环冗余校验码，即Cyclic Redundancy Check (CRC), 是一种在各种通信系统中广泛应用的检错机制。CRC算法的工作原理和哈希函数类似，具体来说，其对任意长度的数据计算出一段唯一的标识（校验和）, 然后根据这个标识来判断该数据在传输过程中是否发生变化。CRC检错码在实际生活中有着广泛的应用，诸如网络通信，存储系统等场景下都需要CRC来保证数据传输的正确性。而不同的应用场景往往需要采用不同的CRC配置参数，同时对计算的性能也有不同的需求。例如，在基于Ethernet协议的网络传输中需要采用IEEE802-3协议所规定的CRC参数，同时需要高吞吐率的CRC实现以和网络带宽相匹配。",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2023-07-27",title:"BSV based high performance parallel CRC hardware circuit generator"},x=[{label:"引 言",level:2},{label:"算法原理",level:2},{label:"CRC 计算的定义",level:3},{label:"电路架构与性能",level:2},{label:"架构设计",level:3},{label:"性能与面积",level:3},{label:"使用指南",level:2},{label:"配置参数",level:3},{label:"输入输出接口",level:3},{label:"BSV 使用接口",level:3},{label:"Verilog 使用接口",level:3},{label:"引用和链接",level:2}],F=`

      引 言

      循环冗余校验码，即 Cyclic Redundancy Check (CRC), 是一种在各种通信系统中广泛应用的检错机制。CRC 算法的工作原理和哈希函数类似，具体来说，其对任意长度的数据计算出一段唯一的标识（校验和）, 然后根据这个标识来判断该数据在传输过程中是否发生变化。CRC 检错码在实际生活中有着广泛的应用，诸如网络通信，存储系统等场景下都需要 CRC 来保证数据传输的正确性。而不同的应用场景往往需要采用不同的 CRC 配置参数，同时对计算的性能也有不同的需求。例如，在基于 Ethernet 协议的网络传输中需要采用 IEEE802-3 协议所规定的 CRC 参数，同时需要高吞吐率的 CRC 实现以和网络带宽相匹配。

      对于一个具体的通信系统，CRC 既可以通过软件编程也可以硬件电路的形态来实现。相较于网络上丰富的软件库，开源的 CRC 硬件实现却相对落后，尤其是面向高性能的应用场景。例如，下述链接都提供了参数可配置的 CRC 硬件电路生成器，但这些实现方式都是直接将 CRC 算法映射到组合逻辑电路上，这往往会导致较长的组合逻辑延时进而降低电路的整体工作频率，无法满足高吞吐率的需求。

        @@ -64,10 +64,10 @@ const s="/zh-cn/assets/image1-85650830.png",a="/zh-cn/assets/image2-d3ac686f.png

        的查找表，其中第图片张查找表的第

        image

        个表项的值即为

        -

        image

        +

        image

        的 CRC 校验和。

        虽然有了定理 1 我们可以在一个周期内并行处理多个字节数据，但基于此还不能够完成 CRC 的硬件实现。在实际电路中数据总线的位宽是有限的，对于较长的输入数据，需要根据总线位宽将其分成多个帧并分配到多个周期进行传输。因此，我们还需要基于定理 2 累加不同周期计算得到的 CRC 校验值进而获得最终结果。在 blue-crc 的实现中，数据以大端字节序进行传输，即高位数据先传入进行处理, 假设输入数据总线位宽为 256-bit, 当前周期输入数据对应的多项式为 A(x), 该周期之前已经输入的数据为 A'(x), 每个周期我们除了计算 CRC[A(x)]，还需要将该值累加到已经计算好的中间校验和 CRC[A'(x)]上，得到数据

        -

        image

        +

        image

        的校验和。根据定理 1 和 2，可以推导出累加的计算公式如下:

        image

        即需要将中间校验和 CRC[A'(x)]左移 256-bit，对其再次计算 CRC 校验值后和 CRC[A(x)]相加。同样我们可以通过硬件查找表的方式完成这里校验和的计算。

        @@ -91,7 +91,7 @@ const s="/zh-cn/assets/image1-85650830.png",a="/zh-cn/assets/image2-d3ac686f.png

        CRC 硬件电路的实际性能和资源开销与具体的配置参数有关。大部分情况下，硬件电路的吞吐率随输入总线数据位宽增大而提升，硬件资源开销则同时和总线宽度以及 CRC 校验和宽度有关。以 IEEE 802-3 协议规定的 32 位 CRC 校验和为例，其在 256 位输入总线位宽的配置下，可在 Xilinx xcvu9p FPGA 器件上达到 500MHz 的工作频率，总吞吐率达 128Gb/s，实际的硬件资源开销如下。

        image

        相较于其他硬件实现方式，blue-crc 主要关注于计算性能上的提升，因此在硬件资源上的开销相对较大。其中最主要的开销来源于用于实现 CRC 计算的查找表，其容量大小随数据总线位宽以及校验和位宽的增大而增大，具体的查找表容量的计算方式如下（设总线字节宽度为 m, CRC 校验和字节宽度为 n）:

        -

        image

        +

        image

        对于上文提到的 IEEE 802-3 协议规定的 32-bit CRC 校验，在 256-bit 输入总线位宽的配置下，理论上所需的查找表容量为 36KB.

        使用指南

        本文的最后一部分将介绍 blue-crc 项目的使用指南，包括 CRC 电路的配置参数、输入输出接口、面向 BlueSpec SystemVerilog 的使用接口，以及面向 Verilog 的使用接口。

        @@ -172,7 +172,7 @@ const s="/zh-cn/assets/image1-85650830.png",a="/zh-cn/assets/image2-d3ac686f.png );

        发起 CRC 计算时原始数据需要按照大端字节序进行传输，即高位字节需要优先传输。假设 CRC 电路输入 AXI-Stream 总线数据位宽为 32-bit (4-byte), 若要传输 80-bit (10-byte)的数据，那么每一帧需要传输的内容如下图所示:

        -

        image

        +

        image

        BSV 使用接口

        blue-crc 项目基于 Bluespec SystemVerilog 硬件描述语言实现，因此对于使用 BSV 的设计者，可以直接通过实例化的方式使用 CRC 模块。详细的使用步骤如下:

          @@ -266,4 +266,4 @@ CrcAxiStream#(32, 256 https://github.com/datenlord/blue-crc

          引用和链接

          [1] Y. Sun and M. S. Kim, "A Table-Based Algorithm for Pipelined CRC Calculation," 2010 IEEE International Conference on Communications, Cape Town, South Africa, 2010, pp. 1-5, doi: 10.1109/ICC.2010.5501903.

          -

          [2] Sun Y, Kim M S. A pipelined CRC calculation using lookup tables[C]//2010 7th IEEE Consumer Communications and Networking Conference. IEEE, 2010: 1-2.

          `;export{f as assetURLs,v as default,y as metadata,x as toc}; +

          [2] Sun Y, Kim M S. A pipelined CRC calculation using lookup tables[C]//2010 7th IEEE Consumer Communications and Networking Conference. IEEE, 2010: 1-2.

          `;export{f as assetURLs,F as default,y as metadata,x as toc}; diff --git a/zh-cn/assets/index-fd018bec.js b/zh-cn/assets/index-4820dca7.js similarity index 98% rename from zh-cn/assets/index-fd018bec.js rename to zh-cn/assets/index-4820dca7.js index ac5019f..2d4fc66 100644 --- a/zh-cn/assets/index-fd018bec.js +++ b/zh-cn/assets/index-4820dca7.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/image1-abdba371.png",s="/zh-cn/assets/image2-c99b8752.png",l=[e,s],c={label:"Rust实现RDMA异步编程（一）：基于epoll实现RDMA异步操作",description:"RDMA是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA的library是用C实现的，但是没有很好用的Rust的binding，不方便Rust开发者使用。于是我们正在封装一层符合Rust风格、便于Rust开发者使用的RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用Rust异步编程来实现IO操作，可以避免操作系统的进程上下文切换，提高性能，而且Rust的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现RDMA的操作。本文先讨论下如何基于Linux的epoll机制实现RDMA异步操作，后续的文章再探讨如何用Rust异步编程来实现RDMA异步操作。",location:"河南",author:["王璞"],editor:["张汉东"],tags:["RDMA"],date:"2022-05-27",title:"Rust implementation of RDMA asynchronous programming (I): epoll based implementation of RDMA asynchronous operation"},n=[{label:"RDMA 操作简介",level:2},{label:"Linux epoll 异步机制简介",level:2},{label:"RDMA 完成队列 CQ 读取 CQE 的同步和异步方法",level:2},{label:"RDMA 轮询方式读取 CQE",level:3},{label:"RDMA 完成事件通道方式读取 CQE",level:3},{label:"基于 epoll 异步读取 CQE",level:3}],o=`

          RDMA 是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA 的 library 是用 C 实现的，但是没有很好用的 Rust 的 binding，不方便 Rust 开发者使用。于是我们正在封装一层符合 Rust 风格、便于 Rust 开发者使用的 RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用 Rust 异步编程来实现 IO 操作，可以避免操作系统的进程上下文切换，提高性能，而且 Rust 的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现 RDMA 的操作。本文先讨论下如何基于 Linux 的 epoll 机制实现 RDMA 异步操作，后续的文章再探讨如何用 Rust 异步编程来实现 RDMA 异步操作。

          +const e="/zh-cn/assets/image1-abdba371.png",s="/zh-cn/assets/image2-c99b8752.png",l=[e,s],c={label:"Rust实现RDMA异步编程（一）：基于epoll实现RDMA异步操作",description:"RDMA是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA的library是用C实现的，但是没有很好用的Rust的binding，不方便Rust开发者使用。于是我们正在封装一层符合Rust风格、便于Rust开发者使用的RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用Rust异步编程来实现IO操作，可以避免操作系统的进程上下文切换，提高性能，而且Rust的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现RDMA的操作。本文先讨论下如何基于Linux的epoll机制实现RDMA异步操作，后续的文章再探讨如何用Rust异步编程来实现RDMA异步操作。",location:"河南",author:["王璞"],editor:["张汉东"],tags:["RDMA"],date:"2022-05-27",title:"Rust implementation of RDMA asynchronous programming (I): epoll based implementation of RDMA asynchronous operation"},a=[{label:"RDMA 操作简介",level:2},{label:"Linux epoll 异步机制简介",level:2},{label:"RDMA 完成队列 CQ 读取 CQE 的同步和异步方法",level:2},{label:"RDMA 轮询方式读取 CQE",level:3},{label:"RDMA 完成事件通道方式读取 CQE",level:3},{label:"基于 epoll 异步读取 CQE",level:3}],n=`

          RDMA 是一套高性能网络协议栈，多用于高性能计算、高性能存储领域。RDMA 的 library 是用 C 实现的，但是没有很好用的 Rust 的 binding，不方便 Rust 开发者使用。于是我们正在封装一层符合 Rust 风格、便于 Rust 开发者使用的 RDMA Rust binding。特别的，异步编程是近几年很受关注的编程方式，用 Rust 异步编程来实现 IO 操作，可以避免操作系统的进程上下文切换，提高性能，而且 Rust 的异步编程框架也在逐步成熟和完善。本系列文章探讨下如何用异步的方式实现 RDMA 的操作。本文先讨论下如何基于 Linux 的 epoll 机制实现 RDMA 异步操作，后续的文章再探讨如何用 Rust 异步编程来实现 RDMA 异步操作。

          RDMA 操作简介

          RDMA 的编程模型是基于消息的方式来实现网络传输，并且用队列来管理待发送的消息和接收到的消息。RDMA 的网络传输相关操作基本上都是跟队列相关的操作：比如把要发送的消息放入发送队列，消息发送完成后在完成队列里放一个发送完成消息，以供用户程序查询消息发送状态；再比如接收队列里收到消息，也要在完成队列里放个接收完成消息，以供用户程序查询有新消息要处理。

          图片

          @@ -148,4 +148,4 @@ epoll::epoll_ctl(

          上面代码有个要注意的地方，因为 epoll 是用边沿触发，所以每次有新 CQE 产生时，都要调用 ibv_poll_cq 把 CQ 队列读空。考虑如下场景，同时有多个新的 CQE 产生，但是 epoll 边沿触发只通知一次，如果用户程序收到通知后没有读空 CQ，那 epoll 也不会再产生新的通知，除非再有新的 CQE 产生，epoll 才会再次通知用户程序。

          总之，本文用 epoll 机制实现 RDMA 异步读取 CQE 的例子，展示了如何实现 RDMA 的异步操作。RDMA 还有类似的操作，都可以基于 epoll 机制实现异步操作。

          对Rust和RDMA感兴趣的朋友，可以关注我们的开源项目:
          -https://github.com/datenlord/async-rdma/

          `;export{l as assetURLs,o as default,c as metadata,n as toc}; +https://github.com/datenlord/async-rdma/

          `;export{l as assetURLs,n as default,c as metadata,a as toc}; diff --git a/zh-cn/assets/index-015cf939.js b/zh-cn/assets/index-500d1a02.js similarity index 92% rename from zh-cn/assets/index-015cf939.js rename to zh-cn/assets/index-500d1a02.js index ba84f0e..27ea28e 100644 --- a/zh-cn/assets/index-015cf939.js +++ b/zh-cn/assets/index-500d1a02.js @@ -1,4 +1,4 @@ -const n="/zh-cn/assets/cover-bc86e95c.jpg",t="/zh-cn/assets/image1-d4391053.jpg",e=[n,t],r={label:"DatenLord开源产品技术分享 | Xline源码解读",description:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。本期源码解读将聚焦Xline的Curp共识协议，DatenLord分布式存储工程师赵佳炜将与大家分享在Xline中应用的Curp共识协议的设计与代码实现。",cover:"./cover.jpg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-04-24",title:"DatenLord open source product technology sharing l Xline source code interpretation"},o=[{label:"【源码解读】Xline Curp 共识协议的设计与实现",level:2}],l=`

          封面

          +const n="/zh-cn/assets/cover-bc86e95c.jpg",t="/zh-cn/assets/image1-d4391053.jpg",e=[n,t],o={label:"DatenLord开源产品技术分享 | Xline源码解读",description:"传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord推出开源分布式KV存储Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。本期源码解读将聚焦Xline的Curp共识协议，DatenLord分布式存储工程师赵佳炜将与大家分享在Xline中应用的Curp共识协议的设计与代码实现。",cover:"./cover.jpg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-04-24",title:"DatenLord open source product technology sharing l Xline source code interpretation"},r=[{label:"【源码解读】Xline Curp 共识协议的设计与实现",level:2}],l=`

          封面

          传统单数据中心解决方案无法满足跨数据中心的场景对性能和一致性的需求。DatenLord 推出开源分布式 KV 存储 Xline，针对多数据中心场景，可以实现数据的高性能跨云、跨数据中心共享访问，并且保证数据的一致性。

          本期源码解读将聚焦 Xline 的 Curp 共识协议，DatenLord 分布式存储工程师赵佳炜将与大家分享在 Xline 中应用的 Curp 共识协议的设计与代码实现。

          【源码解读】Xline Curp 共识协议的设计与实现

          @@ -17,4 +17,4 @@ const n="/zh-cn/assets/cover-bc86e95c.jpg",t="/zh-cn/assets/image1-d4391053.jpg"

          【直播预约】 欢迎您预约直播，或者登陆腾讯会议观看直播：
          会议号：955-6910-3992

          -

          图片

          `;export{e as assetURLs,l as default,r as metadata,o as toc}; +

          图片

          `;export{e as assetURLs,l as default,o as metadata,r as toc}; diff --git a/zh-cn/assets/index-17fcbde5.js b/zh-cn/assets/index-5e43e574.js similarity index 94% rename from zh-cn/assets/index-17fcbde5.js rename to zh-cn/assets/index-5e43e574.js index 10a4eb3..54df414 100644 --- a/zh-cn/assets/index-17fcbde5.js +++ b/zh-cn/assets/index-5e43e574.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/cover-48216986.png",t="/zh-cn/assets/image1-02771bf0.jpg",n="/zh-cn/assets/image1-f46bfcc6.jpg",o=[s,t,n],p={label:"当RDMA遇到Rust",description:"2022年8月5日-6日，一年一度的中国开源基础设施活动日（OpenInfra Days China）即将在线上举行。本次会议没有限定一个统一的主题，主要聚焦云计算基础设施、云原生技术与应用实践、开源治理、5G、算力网络与边缘计算五大主题方向。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"When RDMA meets Rust"},r=[],a=`

          封面

          +const s="/zh-cn/assets/cover-48216986.png",t="/zh-cn/assets/image1-02771bf0.jpg",n="/zh-cn/assets/image1-f46bfcc6.jpg",o=[s,t,n],r={label:"当RDMA遇到Rust",description:"2022年8月5日-6日，一年一度的中国开源基础设施活动日（OpenInfra Days China）即将在线上举行。本次会议没有限定一个统一的主题，主要聚焦云计算基础设施、云原生技术与应用实践、开源治理、5G、算力网络与边缘计算五大主题方向。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"When RDMA meets Rust"},p=[],a=`

          封面

          2022 年 8 月 5 日-6 日，**一年一度的中国开源基础设施活动日（OpenInfra Days China）**即将在线上举行。本次会议没有限定一个统一的主题，主要聚焦云计算基础设施、云原生技术与应用实践、开源治理、5G、算力网络与边缘计算五大主题方向。

          云计算基础设施分论坛主要聚焦云计算基础设施领域的前沿技术和优秀实践，围绕多硬件架构和多操作系统支持、人工智能技术应用、网络与存储，数据处理 DPU 及其他加速硬件、硬件自动化和智能运维等方面展开技术分享和探讨。达坦科技联合创始人施继成将在这一分论坛做题为当 RDMA 遇到 Rust 的专题分享。

          图片

          @@ -10,4 +10,4 @@ const s="/zh-cn/assets/cover-48216986.png",t="/zh-cn/assets/image1-02771bf0.jpg"

          参会方式

          想要了解更多达坦科技为什么选择 Rust 做 RDMA 库，以及开发设计背后的理念、逻辑、和实践经验，欢迎扫描海报二维码，免费注册报名。

          有意加入 Rust 前沿交流讨论群，请添加小助手微信：

          -

          图片

          `;export{o as assetURLs,a as default,p as metadata,r as toc}; +

          图片

          `;export{o as assetURLs,a as default,r as metadata,p as toc}; diff --git a/zh-cn/assets/index-6bc730f7.js b/zh-cn/assets/index-69ce89cf.js similarity index 93% rename from zh-cn/assets/index-6bc730f7.js rename to zh-cn/assets/index-69ce89cf.js index ca56099..dc1b8d9 100644 --- a/zh-cn/assets/index-6bc730f7.js +++ b/zh-cn/assets/index-69ce89cf.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/image1-b170e804.jpg",o="/zh-cn/assets/image2-29d090cb.png",n="/zh-cn/assets/image1-50beaba8.png",a=[t,o,n],e={label:"叮！您收到了一封来自达坦科技的Hackthon邀请函",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",location:"中国香港",date:"2023-11-17",title:"Ding! You've received a Hackthon invitation from Dartan Technologies!"},l=[{label:"Hackathon2023",level:2},{label:"主题",level:2},{label:"大赛时间线",level:2},{label:"背景介绍",level:2},{label:"赛题介绍",level:2},{label:"评估标准",level:2},{label:"赛题宣讲会",level:2}],s=`

          Hackathon2023

          +const t="/zh-cn/assets/image1-b170e804.jpg",o="/zh-cn/assets/image2-29d090cb.png",a="/zh-cn/assets/image1-50beaba8.png",n=[t,o,a],e={label:"叮！您收到了一封来自达坦科技的Hackthon邀请函",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",location:"中国香港",date:"2023-11-17",title:"Ding! You've received a Hackthon invitation from Dartan Technologies!"},s=[{label:"Hackathon2023",level:2},{label:"主题",level:2},{label:"大赛时间线",level:2},{label:"背景介绍",level:2},{label:"赛题介绍",level:2},{label:"评估标准",level:2},{label:"赛题宣讲会",level:2}],l=`

          Hackathon2023

          DatenLord Hackathon 2023 正式启动！ 达坦科技基于其跨云分布式文件系统 DatenLord 项目，结合 AI 大模型时代背景，搭建了擂台，在此正式向您发出邀约！

          本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台 PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！

          主题

          @@ -30,5 +30,5 @@ const t="/zh-cn/assets/image1-b170e804.jpg",o="/zh-cn/assets/image2-29d090cb.png

          图片

          如有任何问题欢迎联系达坦科技微信小助手：DatenLord_Tech 或发送邮件至
          info@datenlord.com

          -

          图片

          -

          让我们一起在 Hackathon2023 的舞台上尽情释放创意的火花，期待与优秀的你碰撞出新的想法！

          `;export{a as assetURLs,s as default,e as metadata,l as toc}; +

          图片

          +

          让我们一起在 Hackathon2023 的舞台上尽情释放创意的火花，期待与优秀的你碰撞出新的想法！

          `;export{n as assetURLs,l as default,e as metadata,s as toc}; diff --git a/zh-cn/assets/index-d7fb28df.js b/zh-cn/assets/index-6a884c2a.js similarity index 99% rename from zh-cn/assets/index-d7fb28df.js rename to zh-cn/assets/index-6a884c2a.js index 33dabc4..910fa6f 100644 --- a/zh-cn/assets/index-d7fb28df.js +++ b/zh-cn/assets/index-6a884c2a.js @@ -1,4 +1,4 @@ -const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png",e="/zh-cn/assets/image3-b15b4acb.png",n="/zh-cn/assets/image4-e5ed8af3.png",l="/zh-cn/assets/image5-74f0a1a0.png",t="/zh-cn/assets/image6-5ab2a1df.png",a="/zh-cn/assets/image7-bfc65522.png",p="/zh-cn/assets/image8-462cfa81.png",s="/zh-cn/assets/image9-ecae19a3.png",d="/zh-cn/assets/image10-1092617f.png",P="/zh-cn/assets/image11-2508217f.png",c="/zh-cn/assets/image12-69f6226d.png",r="/zh-cn/assets/image13-62fe53ff.png",h="/zh-cn/assets/image14-048f6e24.png",g="/zh-cn/assets/image15-c04accbc.png",m="/zh-cn/assets/image16-2de227b5.png",S="/zh-cn/assets/image17-ecbf7b1e.png",F="/zh-cn/assets/image18-88f5d1b8.png",D="/zh-cn/assets/image19-5df924ff.png",R="/zh-cn/assets/image20-5dfde1d6.png",b="/zh-cn/assets/image21-90c388d7.png",A=[i,o,e,n,l,t,a,p,s,d,P,c,r,h,g,m,S,F,D,R,b],T={label:"万字长文，详述TRIDENT：Poseidon 哈希算法的硬件加速与实现！",description:"本文主要介绍了DatenLord团队在今年的Xilinx全球自适应计算挑战赛上获得 Big Data Analytics赛道一等奖的作品——TRIDENT：Poseidon哈希算法的硬件实现与加速。该项目基于Xilinx Varium C1100 FPGA加速卡，为 Filecoin 区块链应用中的Poseidon哈希算法提供了一套完整的硬件加速方案。在硬件方面，TRIDENT基于 SpinalHDL 设计了Poseidon加速器 IP 并基于 Vivado中Block Design 工具搭建完整的FPGA硬件系统。在软件方面，我们为 Filecoin 软件实现 Lotus 提供了访问 FPGA 硬件加速器的接口。最终，TRIDENT 能够为Filecoin应用提供两倍于 AMD Ryzen 5900X 处理器的 Poseidon 计算加速效果。下文将主要从Poseidon哈希算法概述、基于SpinalHDL和Cocotb的硬件设计、总体方案设计、加速器 IP 设计和性能测试等方面对整个TRIDENT项目进行详细的介绍。",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2022-06-30",title:"Ten thousand words long article, detailing the hardware acceleration and implementation of TRIDENT: Poseidon hash algorithm!"},u=[{label:"引言",level:2},{label:"0.1 Poseidon 与零知识证明",level:3},{label:"0.2 Filecoin 分布式存储网络",level:3},{label:"Poseidon 哈希算法概述",level:2},{label:"1.1Poseidon 参数",level:3},{label:"1.2 Poseidon 详细计算流程",level:3},{label:"1.3Poseidon 算法特点",level:3},{label:"基于 SpinalHDL 和 Cocotb 的硬件设计与验证",level:2},{label:"2.1 SpinalHDL 和 Cocotb 概述",level:3},{label:"2.2 SpinalHDL 在硬件设计中的优势",level:3},{label:"2.3Cocotb 在验证中的优势",level:3},{label:"总体方案设计",level:2},{label:"3.1 开发平台",level:3},{label:"3.2 加速系统设计",level:3},{label:"加速器 IP 设计",level:2},{label:"4.1 模加电路的设计",level:3},{label:"4.2 模乘电路的设计",level:3},{label:"4.3 加速器架构设计",level:3},{label:"性能测试",level:2},{label:"5.1 Vivado Implementation 报告",level:3},{label:"总结",level:2}],L=`

          本文主要介绍了 DatenLord 团队在今年的 Xilinx 全球自适应计算挑战赛上获得 Big Data Analytics 赛道一等奖的作品——TRIDENT: Poseidon 哈希算法的硬件实现与加速。该项目基于 Xilinx Varium C1100 FPGA 加速卡，为 Filecoin 区块链应用中的 Poseidon 哈希算法提供了一套完整的硬件加速方案。在硬件方面，TRIDENT 基于 SpinalHDL 设计了 Poseidon 加速器 IP 并基于 Vivado 中 Block Design 工具搭建完整的 FPGA 硬件系统。在软件方面，我们为 Filecoin 软件实现 Lotus 提供了访问 FPGA 硬件加速器的接口。最终，TRIDENT 能够为 Filecoin 应用提供两倍于 AMD Ryzen 5900X 处理器的 Poseidon 计算加速效果。下文将主要从 Poseidon 哈希算法概述、基于 SpinalHDL 和 Cocotb 的硬件设计、总体方案设计、加速器 IP 设计和性能测试等方面对整个 TRIDENT 项目进行详细的介绍。

          +const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png",e="/zh-cn/assets/image3-b15b4acb.png",n="/zh-cn/assets/image4-e5ed8af3.png",l="/zh-cn/assets/image5-74f0a1a0.png",t="/zh-cn/assets/image6-5ab2a1df.png",a="/zh-cn/assets/image7-bfc65522.png",p="/zh-cn/assets/image8-462cfa81.png",s="/zh-cn/assets/image9-ecae19a3.png",d="/zh-cn/assets/image10-1092617f.png",P="/zh-cn/assets/image11-2508217f.png",c="/zh-cn/assets/image12-69f6226d.png",r="/zh-cn/assets/image13-62fe53ff.png",h="/zh-cn/assets/image14-048f6e24.png",g="/zh-cn/assets/image15-c04accbc.png",m="/zh-cn/assets/image16-2de227b5.png",S="/zh-cn/assets/image17-ecbf7b1e.png",R="/zh-cn/assets/image18-88f5d1b8.png",D="/zh-cn/assets/image19-5df924ff.png",F="/zh-cn/assets/image20-5dfde1d6.png",b="/zh-cn/assets/image21-90c388d7.png",A=[i,o,e,n,l,t,a,p,s,d,P,c,r,h,g,m,S,R,D,F,b],u={label:"万字长文，详述TRIDENT：Poseidon 哈希算法的硬件加速与实现！",description:"本文主要介绍了DatenLord团队在今年的Xilinx全球自适应计算挑战赛上获得 Big Data Analytics赛道一等奖的作品——TRIDENT：Poseidon哈希算法的硬件实现与加速。该项目基于Xilinx Varium C1100 FPGA加速卡，为 Filecoin 区块链应用中的Poseidon哈希算法提供了一套完整的硬件加速方案。在硬件方面，TRIDENT基于 SpinalHDL 设计了Poseidon加速器 IP 并基于 Vivado中Block Design 工具搭建完整的FPGA硬件系统。在软件方面，我们为 Filecoin 软件实现 Lotus 提供了访问 FPGA 硬件加速器的接口。最终，TRIDENT 能够为Filecoin应用提供两倍于 AMD Ryzen 5900X 处理器的 Poseidon 计算加速效果。下文将主要从Poseidon哈希算法概述、基于SpinalHDL和Cocotb的硬件设计、总体方案设计、加速器 IP 设计和性能测试等方面对整个TRIDENT项目进行详细的介绍。",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2022-06-30",title:"Ten thousand words long article, detailing the hardware acceleration and implementation of TRIDENT: Poseidon hash algorithm!"},C=[{label:"引言",level:2},{label:"0.1 Poseidon 与零知识证明",level:3},{label:"0.2 Filecoin 分布式存储网络",level:3},{label:"Poseidon 哈希算法概述",level:2},{label:"1.1Poseidon 参数",level:3},{label:"1.2 Poseidon 详细计算流程",level:3},{label:"1.3Poseidon 算法特点",level:3},{label:"基于 SpinalHDL 和 Cocotb 的硬件设计与验证",level:2},{label:"2.1 SpinalHDL 和 Cocotb 概述",level:3},{label:"2.2 SpinalHDL 在硬件设计中的优势",level:3},{label:"2.3Cocotb 在验证中的优势",level:3},{label:"总体方案设计",level:2},{label:"3.1 开发平台",level:3},{label:"3.2 加速系统设计",level:3},{label:"加速器 IP 设计",level:2},{label:"4.1 模加电路的设计",level:3},{label:"4.2 模乘电路的设计",level:3},{label:"4.3 加速器架构设计",level:3},{label:"性能测试",level:2},{label:"5.1 Vivado Implementation 报告",level:3},{label:"总结",level:2}],T=`

          本文主要介绍了 DatenLord 团队在今年的 Xilinx 全球自适应计算挑战赛上获得 Big Data Analytics 赛道一等奖的作品——TRIDENT: Poseidon 哈希算法的硬件实现与加速。该项目基于 Xilinx Varium C1100 FPGA 加速卡，为 Filecoin 区块链应用中的 Poseidon 哈希算法提供了一套完整的硬件加速方案。在硬件方面，TRIDENT 基于 SpinalHDL 设计了 Poseidon 加速器 IP 并基于 Vivado 中 Block Design 工具搭建完整的 FPGA 硬件系统。在软件方面，我们为 Filecoin 软件实现 Lotus 提供了访问 FPGA 硬件加速器的接口。最终，TRIDENT 能够为 Filecoin 应用提供两倍于 AMD Ryzen 5900X 处理器的 Poseidon 计算加速效果。下文将主要从 Poseidon 哈希算法概述、基于 SpinalHDL 和 Cocotb 的硬件设计、总体方案设计、加速器 IP 设计和性能测试等方面对整个 TRIDENT 项目进行详细的介绍。

          引言

          Poseidon 是一种全新的面向零知识证明(ZKP: Zero-Knowledge Proof)密码学协议设计的哈希算法。相比同类算法，包括经典的 SHA-256、SHA-3 以及 Pedersen 哈希函数，在零知识证明的应用场景下，Poseidon 能够显著地降低证明生成和验证的计算复杂度，极大地提升零知识证明系统整体的运行效率。基于上述优点，Poseidon 目前已被广泛应用在了各种区块链项目当中，包括去中心化存储系统 Filecoin、加密货币 Mina Protocol 和 Dusk Network 等，主要用于加速其中的零知识证明系统。

          0.1 Poseidon 与零知识证明

          @@ -252,7 +252,7 @@ const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png

          在上文中介绍的 FPGA 硬件系统和其中 Poseidon 加速器 IP 的基础上，我们通过 Vivado 集成开发环境将其实现在了 Varium C1100 FPGA 加速卡上，该板卡搭载了 Xilinx Virtex UltraScale+系列的 FPGA 芯片，具体芯片型号为具体型号为 XCU55N-FSVH2892-2L-E。整个硬件系统实现(Implementation)后的报告以及计算性能的测试结果如下：

          5.1 Vivado Implementation 报告

          整体硬件加速系统综合实现后逻辑资源消耗情况如下表所示：

          -

          图片

          +

          图片

          各项 FPGA 资源中 DSP Slices(70.01%)和 LUT(61.15%)的消耗最多, 主要用于 255-Bit Montgomery 模乘电路的实现上。这两项资源的不足也限制了在加速器中配置更多模乘器来提升计算并行度和整体的加速性能。

          在时序上，实现(Implementation)后 Poseidon 加速器刚好能够满足 100MHz 工作频率的要求。关键路径上，建立(set up)时间的余量为 0.069ns，保持(hold)时间的余量为 0.01ns。

          除了资源和时序外，FPGA 实现后的功耗信息如下图所示。由下图可见，在运行我们设计的加速器硬件时，FPGA 芯片的整体功耗在 24.7W 左右。而我们在性能测试中使用的 RTX 3070 GPU 加速卡的运行功耗在 120W 左右。

          @@ -262,7 +262,7 @@ const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png
          1. C 语言程序测试结果：在 Xilinx 提供的 XDMA 驱动的基础上使用 C 语言编写简单的性能测试程序。该测试程序向 FPGA 加速器写入一定数量的输入数据，并记录加速器完成所有数据哈希运算所需要的时间。基于该测试程序，我们分别测试了 Poseidon 加速器在三种长度输入数据下的性能表现。当输入数据的大小为 arity2, 即中间状态向量元素个数 时，加速器在 0.877 秒内完成了 850000 次的哈希运算，数据吞吐率可达到 29.1651MB/s, 即每秒大约能够完成 1M 次哈希运算
          -

          图片

          +

          图片

          1. Lotus-Bench 测试结果：Lotus 中提供了计算机硬件在 Filecoin 计算负载下性能表现的基准测试程序 Lotus-Bench；与自己实现的 C 语言测试程序相比，Lotus-Bench 的测试更加接近实际的工作负载，能够得到更加准确的测试结果。在 Lotus-Bench 的基础上，我们分别测试了 CPU, GPU 和 FPGA 在 preCommit 阶段(该阶段主要完成 Poseidon 哈希函数的计算)处理 512MB 数据所需要的时间。FPGA 在 Lotus-Bench 测试下的算力可达到 15.65MB/s，大约是 AMD Ryzen 5900X CPU 实现的 2 倍，但和 RTX 3070 GPU 的加速性能相比仍有很大的提升空间.
          @@ -278,4 +278,4 @@ const i="/zh-cn/assets/image1-9e1613a7.png",o="/zh-cn/assets/image2-7b7b20fc.png

        1. 优化加速器架构：由于需要适配 Filecoin Poseidon 计算实例中不同大小的输入数据，目前在输入较小的情况下加速器中存在一些冗余的运算单元。通过进一步优化加速器的整体架构，使得在不同长度的输入数据下，所有运算单元都能得到更好的利用，能够进一步提升整体的加速性能。

          2. -
        `;export{A as assetURLs,L as default,T as metadata,u as toc}; +`;export{A as assetURLs,T as default,u as metadata,C as toc}; diff --git a/zh-cn/assets/index-9cbd4195.js b/zh-cn/assets/index-6f20c5b7.js similarity index 95% rename from zh-cn/assets/index-9cbd4195.js rename to zh-cn/assets/index-6f20c5b7.js index 34d9912..48c76f1 100644 --- a/zh-cn/assets/index-9cbd4195.js +++ b/zh-cn/assets/index-6f20c5b7.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-eeda38bf.png",l=[e],i={label:"Xline v0.2.0：一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",tags:["Xline"],date:"2023-02-16",title:"Xline v0.2.0: A distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.2.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],n=`

        封面

        +const l="/zh-cn/assets/cover-eeda38bf.png",e=[l],i={label:"Xline v0.2.0：一个用于元数据管理的分布式KV存储",description:"Xline是一个基于Curp协议的，用于管理元数据的分布式KV存储。现有的分布式KV存储大多采用Raft共识协议，需要两次RTT才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。",cover:"./cover.png",location:"中国香港",tags:["Xline"],date:"2023-02-16",title:"Xline v0.2.0: A distributed KV store for metadata management"},t=[{label:"Xline 是什么？我们为什么要做 Xline？",level:2},{label:"V0.2.0 版本有什么新功能？",level:3},{label:"欢迎参与到 Xline 项目中",level:2},{label:"相关链接",level:2}],n=`

        封面

        Xline 是什么？我们为什么要做 Xline？

        Xline 是一个基于 Curp 协议的，用于管理元数据的分布式 KV 存储。 现有的分布式 KV 存储大多采用 Raft 共识协议，需要两次 RTT 才能完成一次请求。当部署在单个数据中心时，节点之间的延迟较低，因此不会对性能产生大的影响。

        但是，当跨数据中心部署时，节点之间的延迟可能是几十或几百毫秒，此时 Raft 协议将成为性能瓶颈。Curp 协议就是为了解决这个问题而设计的。它可以在命令不冲突的情况下减少一个 RTT，从而提高性能。因此，Xline 旨在实现高性能的数据访问和跨数据中心场景下的强一致性。

        @@ -36,4 +36,4 @@ const e="/zh-cn/assets/cover-eeda38bf.png",l=[e],i={label:"Xline v0.2.0：一个
      • Curp 相关文章:
        https://medium.com/@datenlord/curp-revisit-the-consensus-protocol-384464be1600
      • Xline 官网：www.xline.cloud
        • -
      `;export{l as assetURLs,n as default,i as metadata,t as toc}; +
    `;export{e as assetURLs,n as default,i as metadata,t as toc}; diff --git a/zh-cn/assets/index-28241c38.js b/zh-cn/assets/index-6f8e9292.js similarity index 89% rename from zh-cn/assets/index-28241c38.js rename to zh-cn/assets/index-6f8e9292.js index 8bbab4b..44f0b15 100644 --- a/zh-cn/assets/index-28241c38.js +++ b/zh-cn/assets/index-6f8e9292.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/image1-3ae2277f.jpg",a="/zh-cn/assets/image1-0a18e154.png",e=[t,a],s={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",location:"中国海南",tags:["Xline"],date:"2023-02-01",title:"Distributed laboratory live broadcast l Consensus algorithm and consistent metadata management across data centers"},n=[],i=`

    在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。

    +const t="/zh-cn/assets/image1-3ae2277f.jpg",e="/zh-cn/assets/image1-0a18e154.png",a=[t,e],n={label:"分布式实验室直播 | 共识算法与跨数据中心一致性的元数据管理",description:"在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。",location:"中国海南",tags:["Xline"],date:"2023-02-01",title:"Distributed laboratory live broadcast l Consensus algorithm and consistent metadata management across data centers"},s=[],i=`

    在 2021 年时，UC Berkeley 提出了天空计算（Sky Computing）的概念。所谓天空计算是云平台上的一层，其目标是打通彼此孤立的云，将分布式系统从数据中心范围扩展到全球范围。Xline 是一款开源分布式 kv 存储系统，基于 curp 共识算法实现，旨在提供跨云元数据管理功能。相比于传统共识协议 Raft 或 Paxos，curp 在天空计算的场景中有着更好的性能表现。

    本周四（2 月 2 日）晚上 8 点，达坦科技和分布式实验室合作，由达坦科技 Rust 分布式存储工程师赵佳炜讲述共识算法与跨数据中心一致性的元数据管理，并介绍 Xline 是如何实现高性能跨数据中心的数据一致性管理。

    图片

    直播亮点：

    @@ -9,6 +9,6 @@ const t="/zh-cn/assets/image1-3ae2277f.jpg",a="/zh-cn/assets/image1-0a18e154.png
  • Xline 接下来的优化方向。

    • 请添加分布式实验室小助手的微信，报名参与直播：

    -

    图片

    +

    图片

    达坦科技（DatenLord）推出的开源分布式 KV 存储 Xline，针对多数据中心场景，实现数据的高性能跨云、跨数据中心共享访问，并保证数据的一致性，方便业务系统实现多地多中心多活部署。

    -

    GitHub 链接：https:github.com/datenlord/Xline

    `;export{e as assetURLs,i as default,s as metadata,n as toc}; +

    GitHub 链接：https:github.com/datenlord/Xline

    `;export{a as assetURLs,i as default,n as metadata,s as toc}; diff --git a/zh-cn/assets/index-22d5e656.js b/zh-cn/assets/index-71801d47.js similarity index 96% rename from zh-cn/assets/index-22d5e656.js rename to zh-cn/assets/index-71801d47.js index 99f8163..1fe4386 100644 --- a/zh-cn/assets/index-22d5e656.js +++ b/zh-cn/assets/index-71801d47.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-cf0f8eeb.png",o="/zh-cn/assets/image1-6485c4dd.jpg",e=[t,o],s={label:"活动预告 | 第二届硬件敏捷开发与验证方法学研讨会",description:"2023年8月23日至25日， 2023 RISC-V中国峰会将在北京香格里拉饭店举办。本届峰会采用“主会议+主题活动+展览展示+同期活动”的会议组织方式，将邀请RISC-V国际基金会、业界专家、企业代表及社区伙伴等共同探讨RISC-V发展趋势与机遇。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技将在线上举办第二届硬件敏捷开发与验证方法学研讨会。",cover:"./cover.png",location:"新加坡",date:"2023-08-20",title:"Upcoming Events l 2nd Hardware Agile Development and Verification Methodology Workshop"},n=[{label:"2023 RISC-V中国峰会",level:2},{label:"活动信息",level:2}],r=`

    图片

    +const t="/zh-cn/assets/cover-cf0f8eeb.png",o="/zh-cn/assets/image1-6485c4dd.jpg",s=[t,o],e={label:"活动预告 | 第二届硬件敏捷开发与验证方法学研讨会",description:"2023年8月23日至25日， 2023 RISC-V中国峰会将在北京香格里拉饭店举办。本届峰会采用“主会议+主题活动+展览展示+同期活动”的会议组织方式，将邀请RISC-V国际基金会、业界专家、企业代表及社区伙伴等共同探讨RISC-V发展趋势与机遇。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技将在线上举办第二届硬件敏捷开发与验证方法学研讨会。",cover:"./cover.png",location:"新加坡",date:"2023-08-20",title:"Upcoming Events l 2nd Hardware Agile Development and Verification Methodology Workshop"},n=[{label:"2023 RISC-V中国峰会",level:2},{label:"活动信息",level:2}],r=`

    图片

    2023 RISC-V中国峰会

    2023年8月23日至25日， 2023 RISC-V中国峰会将在北京香格里拉饭店举办。本届峰会采用“主会议+主题活动+展览展示+同期活动”的会议组织方式，将邀请RISC-V国际基金会、业界专家、企业代表及社区伙伴等共同探讨RISC-V发展趋势与机遇。作为本届RISC-V中国峰会的同期活动，8月25日下午，达坦科技将在线上举办第二届硬件敏捷开发与验证方法学研讨会。

    随着数字芯片的设计规模和复杂度越来越大，加之芯片市场的竞争越来越激烈，如何提升数字芯片的开发和验证效率成为业界关注的焦点。虽然各种设计工具、验证方法学层出不穷，但是一直没有得到业界广泛认可。目前业界普遍采用的还是基于Verilog、SystemVerilog、VHDL和UVM的工具和方法。

    @@ -16,4 +16,4 @@ const t="/zh-cn/assets/cover-cf0f8eeb.png",o="/zh-cn/assets/image1-6485c4dd.jpg"

    收看链接：
    https://wx.vzan.com/live/tvchat-904511107?v=1691984417574
    或欢迎点击下方链接预约公众号直播。

    -

    感兴趣的观众可以添加海报中的达坦科技小助手二维码加入讨论群，添加时请注明硬件敏捷开发和验证方法学研讨。

    `;export{e as assetURLs,r as default,s as metadata,n as toc}; +

    感兴趣的观众可以添加海报中的达坦科技小助手二维码加入讨论群，添加时请注明硬件敏捷开发和验证方法学研讨。

    `;export{s as assetURLs,r as default,e as metadata,n as toc}; diff --git a/zh-cn/assets/index-eb1ecfd7.js b/zh-cn/assets/index-78a34e98.js similarity index 92% rename from zh-cn/assets/index-eb1ecfd7.js rename to zh-cn/assets/index-78a34e98.js index ab04b63..aa88b97 100644 --- a/zh-cn/assets/index-eb1ecfd7.js +++ b/zh-cn/assets/index-78a34e98.js @@ -1,4 +1,4 @@ -const t="/zh-cn/assets/cover-3674aa81.jpg",e=[t],s={label:"Rust唠嗑室：Xline跨数据中心一致性管理",description:"2022年10月15日，达坦科技和Rust语言中文社区合作，在Rust唠嗑室活动中，由达坦科技（DatenLord）联合创始人施继成做了关于开源分布式存储技术的分享，着重介绍了达坦科技新的开源项目Xline，这一跨云的metadata(元数据)KV存储的产品是如何实现高性能跨数据中心的数据一致性管理的",cover:"./cover.jpg",location:"香港",date:"2022-10-20",title:"Rust Chatterbox: Xline Cross Data Center Consistency Management"},n=[{label:"内容介绍",level:2}],a=`

    封面

    +const t="/zh-cn/assets/cover-3674aa81.jpg",e=[t],s={label:"Rust唠嗑室：Xline跨数据中心一致性管理",description:"2022年10月15日，达坦科技和Rust语言中文社区合作，在Rust唠嗑室活动中，由达坦科技（DatenLord）联合创始人施继成做了关于开源分布式存储技术的分享，着重介绍了达坦科技新的开源项目Xline，这一跨云的metadata(元数据)KV存储的产品是如何实现高性能跨数据中心的数据一致性管理的",cover:"./cover.jpg",location:"香港",date:"2022-10-20",title:"Rust Chatterbox: Xline Cross Data Center Consistency Management"},a=[{label:"内容介绍",level:2}],n=`

    封面

    2022 年 10 月 15 日，达坦科技和 Rust 语言中文社区合作，在 Rust 唠嗑室活动中，由达坦科技（DatenLord）联合创始人施继成做了关于开源分布式存储技术的分享，着重介绍了达坦科技新的开源项目 Xline，这一跨云的 metadata(元数据)KV 存储的产品是如何实现高性能跨数据中心的数据一致性管理的。

    内容介绍

    -

    施继成首先介绍了做Xline这个产品的动机。最初2021年UCBerkeley 提出了Sky Computing（“天空计算”）的概念。与我们都熟知的cloud computing（“云计算”）不同的是，sky computing，如其表面意义所讲，是天空中有很多的云，是解决跨云的问题。如何打破不同云之间的隔阂，或者打通和最大化利用跨云数据是当前面临的一个难题，也是我们的目标所在。如今谈论云计算时，我们不需要考虑云资源的部署，可扩展性等问题，因为云厂商已经都帮忙做了。但是，一旦跨云，则无论算力的迁移，或数据的迁移，都是摆在我们眼前要攻克的难题。达坦科技在做的就是解决“如何做跨云数据交互”的问题，我们致力于将分布式系统从数据中心范围扩散至全球范围，这样即使单个数据中心宕机，却仍不影响用户使用数据。

    `;export{e as assetURLs,a as default,s as metadata,n as toc}; +

    施继成首先介绍了做Xline这个产品的动机。最初2021年UCBerkeley 提出了Sky Computing（“天空计算”）的概念。与我们都熟知的cloud computing（“云计算”）不同的是，sky computing，如其表面意义所讲，是天空中有很多的云，是解决跨云的问题。如何打破不同云之间的隔阂，或者打通和最大化利用跨云数据是当前面临的一个难题，也是我们的目标所在。如今谈论云计算时，我们不需要考虑云资源的部署，可扩展性等问题，因为云厂商已经都帮忙做了。但是，一旦跨云，则无论算力的迁移，或数据的迁移，都是摆在我们眼前要攻克的难题。达坦科技在做的就是解决“如何做跨云数据交互”的问题，我们致力于将分布式系统从数据中心范围扩散至全球范围，这样即使单个数据中心宕机，却仍不影响用户使用数据。

    `;export{e as assetURLs,n as default,s as metadata,a as toc}; diff --git a/zh-cn/assets/index-d543ad74.js b/zh-cn/assets/index-7e0a1d2c.js similarity index 96% rename from zh-cn/assets/index-d543ad74.js rename to zh-cn/assets/index-7e0a1d2c.js index 808ad56..ec6d1be 100644 --- a/zh-cn/assets/index-d543ad74.js +++ b/zh-cn/assets/index-7e0a1d2c.js @@ -1,4 +1,4 @@ -const l="/zh-cn/assets/cover-b206ef91.jpg",t="/zh-cn/assets/image1-e0f43926.jpg",e="/zh-cn/assets/image2-d20c4e0b.jpg",a="/zh-cn/assets/image1-50beaba8.png",o=[l,t,e,a],i={label:"2023 hackathon攻略新鲜出炉！最后一周还不速来报名！",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",cover:"./cover.jpg",location:"中国香港",date:"2023-12-05",title:"Ding! 2023 hackathon tips fresh from the oven! Last week to sign up before it's too late!"},s=[{label:"Hackathon2023",level:2},{label:"大赛时间线",level:3},{label:"达坦科技 DatenLord 赛题",level:2},{label:"主题",level:3},{label:"背景介绍",level:3},{label:"赛题介绍",level:3},{label:"项目目标",level:3},{label:"项目假设",level:3},{label:"评估标准",level:3},{label:"注意事项",level:3}],n=`

    图片

    +const l="/zh-cn/assets/cover-b206ef91.jpg",t="/zh-cn/assets/image1-e0f43926.jpg",e="/zh-cn/assets/image2-d20c4e0b.jpg",a="/zh-cn/assets/image1-50beaba8.png",o=[l,t,e,a],i={label:"2023 hackathon攻略新鲜出炉！最后一周还不速来报名！",description:"DatenLord Hackathon 2023正式启动！达坦科技基于其跨云分布式文件系统DatenLord项目，结合AI大模型时代背景，搭建了擂台，在此正式向您发出邀约！本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！",cover:"./cover.jpg",location:"中国香港",date:"2023-12-05",title:"Ding! 2023 hackathon tips fresh from the oven! Last week to sign up before it's too late!"},n=[{label:"Hackathon2023",level:2},{label:"大赛时间线",level:3},{label:"达坦科技 DatenLord 赛题",level:2},{label:"主题",level:3},{label:"背景介绍",level:3},{label:"赛题介绍",level:3},{label:"项目目标",level:3},{label:"项目假设",level:3},{label:"评估标准",level:3},{label:"注意事项",level:3}],r=`

    图片

    Hackathon2023

    DatenLord Hackathon 2023 正式启动！ 达坦科技基于其跨云分布式文件系统 DatenLord 项目，结合 AI 大模型时代背景，搭建了擂台，在此正式向您发出邀约！

    本次大赛赛题深刻有趣，奖品丰厚多样，借此机会您不仅可以尽情施展才华、与来自全国各地优秀的青年才俊们同台 PK，更将有机会与优秀的评委教师对话交流。Clock is Ticking！无需犹豫，行动起来，抓住机遇，创造奇迹！

    @@ -53,4 +53,4 @@ const l="/zh-cn/assets/cover-b206ef91.jpg",t="/zh-cn/assets/image1-e0f43926.jpg"

    图片

    如有任何问题欢迎联系达坦科技微信小助手：DatenLord_Tech或发送邮件至 info@datenlord.com

    -

    图片

    `;export{o as assetURLs,n as default,i as metadata,s as toc}; +

    图片

    `;export{o as assetURLs,r as default,i as metadata,n as toc}; diff --git a/zh-cn/assets/index-962501d1.js b/zh-cn/assets/index-87f0525d.js similarity index 98% rename from zh-cn/assets/index-962501d1.js rename to zh-cn/assets/index-87f0525d.js index 5439c9a..6ec03d7 100644 --- a/zh-cn/assets/index-962501d1.js +++ b/zh-cn/assets/index-87f0525d.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-1329fc54.png",l="/zh-cn/assets/image1-03c3323d.png",s="/zh-cn/assets/image2-19f32eff.png",i="/zh-cn/assets/image3-7a5e2db9.png",a="/zh-cn/assets/image4-a055bd84.png",t="/zh-cn/assets/image5-b8622f96.png",p="/zh-cn/assets/image6-5093ee75.png",n="/zh-cn/assets/image7-9fa09d91.png",o="/zh-cn/assets/image8-84dd6aec.png",c="/zh-cn/assets/image9-2f762488.png",r="/zh-cn/assets/image10-f2b55246.png",h="/zh-cn/assets/image11-c5d501bb.png",d="/zh-cn/assets/image12-56434254.png",m="/zh-cn/assets/image13-1c12a6c5.png",u="/zh-cn/assets/image14-69943dbe.png",b="/zh-cn/assets/image15-45a7b638.png",g="/zh-cn/assets/image16-5b765721.jpg",f="/zh-cn/assets/image17-8fb19d7c.jpg",R="/zh-cn/assets/image18-c8c4d5a1.jpg",y="/zh-cn/assets/image19-fb1e5167.png",S="/zh-cn/assets/image20-a391e7d8.jpg",_=[e,l,s,i,a,t,p,n,o,c,r,h,d,m,u,b,g,f,R,y,S],M={label:"计算机体系结构｜MIT6.175和MIT6.375学习笔记",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。现在，完成第一期学习的同学整理了MIT6.175和MIT6.375的关键内容以及Lab实践的学习笔记。",cover:"./cover.png",location:"中国香港",author:["kazutoiris"],tags:["硬件加速"],date:"2023-05-17",title:"Computer Architecture｜MIT6.175 and MIT6.375 Study Notes"},v=[{label:"MIT 6.175",level:2},{label:"环境搭建",level:3},{label:"四种 FIFO (Lab 4)",level:3},{label:"Ready 和 Valid 握手",level:3},{label:"EHR 寄存器 (Lab4)",level:3},{label:"RISC-V (Lab5)",level:3},{label:"Branch Prediction (Lab6)",level:3},{label:"DDR3 Memory (Lab7)",level:3},{label:"Cache Coherence (Project)",level:3},{label:"MIT 6.375",level:2},{label:"Bluespec 中的一些特性",level:3},{label:"CORDIC 算法",level:3},{label:"一些常用的概念",level:2},{label:"Setup Time 、Hold Time 和 Clock-to-Q Time",level:3},{label:"SRAM",level:3},{label:"DRAM",level:3},{label:"References",level:2}],C=`

    图片

    +const e="/zh-cn/assets/cover-1329fc54.png",l="/zh-cn/assets/image1-03c3323d.png",s="/zh-cn/assets/image2-19f32eff.png",i="/zh-cn/assets/image3-7a5e2db9.png",a="/zh-cn/assets/image4-a055bd84.png",t="/zh-cn/assets/image5-b8622f96.png",p="/zh-cn/assets/image6-5093ee75.png",n="/zh-cn/assets/image7-9fa09d91.png",o="/zh-cn/assets/image8-84dd6aec.png",c="/zh-cn/assets/image9-2f762488.png",r="/zh-cn/assets/image10-f2b55246.png",h="/zh-cn/assets/image11-c5d501bb.png",d="/zh-cn/assets/image12-56434254.png",m="/zh-cn/assets/image13-1c12a6c5.png",u="/zh-cn/assets/image14-69943dbe.png",b="/zh-cn/assets/image15-45a7b638.png",g="/zh-cn/assets/image16-5b765721.jpg",f="/zh-cn/assets/image17-8fb19d7c.jpg",R="/zh-cn/assets/image18-c8c4d5a1.jpg",S="/zh-cn/assets/image19-fb1e5167.png",y="/zh-cn/assets/image20-a391e7d8.jpg",_=[e,l,s,i,a,t,p,n,o,c,r,h,d,m,u,b,g,f,R,S,y],v={label:"计算机体系结构｜MIT6.175和MIT6.375学习笔记",description:"在2023年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。现在，完成第一期学习的同学整理了MIT6.175和MIT6.375的关键内容以及Lab实践的学习笔记。",cover:"./cover.png",location:"中国香港",author:["kazutoiris"],tags:["硬件加速"],date:"2023-05-17",title:"Computer Architecture｜MIT6.175 and MIT6.375 Study Notes"},M=[{label:"MIT 6.175",level:2},{label:"环境搭建",level:3},{label:"四种 FIFO (Lab 4)",level:3},{label:"Ready 和 Valid 握手",level:3},{label:"EHR 寄存器 (Lab4)",level:3},{label:"RISC-V (Lab5)",level:3},{label:"Branch Prediction (Lab6)",level:3},{label:"DDR3 Memory (Lab7)",level:3},{label:"Cache Coherence (Project)",level:3},{label:"MIT 6.375",level:2},{label:"Bluespec 中的一些特性",level:3},{label:"CORDIC 算法",level:3},{label:"一些常用的概念",level:2},{label:"Setup Time 、Hold Time 和 Clock-to-Q Time",level:3},{label:"SRAM",level:3},{label:"DRAM",level:3},{label:"References",level:2}],C=`

    图片

    在 2023 年初，达坦科技发起成立硬件设计学习社区，邀请所有有志于从事数字芯片设计的同学加入我们的学习互助自学小组，以理解数字芯片设计的精髓，强化理论知识的同时提升实操技能，继而整体提升设计能力。现在，完成第一期学习的同学整理了 MIT6.175 和 MIT6.375 的关键内容以及 Lab 实践的学习笔记。

    6.175 和 6.375 的课程和 Lab 学习都有一定的难度，要求采用 Bluespec 语言实现 RISC-V 处理器，并支持多级流水、分支预测、缓存、异常处理、缓存一致性等功能。此外，Lab 环节还涉及软硬件联合开发，要求基于所实现的 RISC-V 处理器运行真实的 RISC-V 程序，并给出性能评估。希望第一期学员（GitHub:kazutoiris ）的学习笔记对想从事数字芯片设计的工程师有所帮助。

    MIT 6.175

    @@ -346,7 +346,7 @@ Memory Consistency → 内存连贯性

    具有两套完整的读写字线和读写位线。
    All the images in this section are cited from [宇芯电子].

    DRAM

    -

    图片

    +

    图片

    1. DRAM 写
    @@ -380,4 +380,4 @@ All the images in this section are cited from [宇芯电子].

    达坦科技硬件设计学习社区持续开放，点击原文了解社区学习详情。若想询问加入细节，请添加下方小助手微信号或info@datenlord.com

    -

    图片

    `;export{_ as assetURLs,C as default,M as metadata,v as toc}; +

    图片

    `;export{_ as assetURLs,C as default,v as metadata,M as toc}; diff --git a/zh-cn/assets/index-2a54f9b1.js b/zh-cn/assets/index-8a16857f.js similarity index 99% rename from zh-cn/assets/index-2a54f9b1.js rename to zh-cn/assets/index-8a16857f.js index 0130661..124de29 100644 --- a/zh-cn/assets/index-2a54f9b1.js +++ b/zh-cn/assets/index-8a16857f.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/07123c0a1614c5c0256c2c44fccab7ad-82d2cfc4.jpeg",a="/zh-cn/assets/dbb615367665aefe1e8dc131faf7135d-ab0138b7.png",t="/zh-cn/assets/7e55ab5e49360b59ae14ad51bd9f8266-a3540f96.png",p="/zh-cn/assets/50e844cef87960be41630d431f7dba76-74a09282.png",s="/zh-cn/assets/da011de83bcdac4720de4265f06487fa-a09f8943.png",r="/zh-cn/assets/ab91fcebd0198e3ba3e68a1f0ede0dcb-2954efad.png",n="/zh-cn/assets/d6753cc7dafac128a184192d73a671d0-cbc3aa8e.png",l="/zh-cn/assets/8140b483b2b9992795a40af43149d92e-6324a4f1.png",c="/zh-cn/assets/261faba035c5925dd1bf0052673a2819-65bae75e.png",d="/zh-cn/assets/7ccbe7094043e218ad241cc3c2e3c871-e3e8431a.png",i="/zh-cn/assets/7a18e9fc6512a89b6e74a92a92580823-5ee6182a.png",o="/zh-cn/assets/3df9c5c4ff35c6cde20f54a80ed5bb0d-6b5bfe86.png",m="/zh-cn/assets/03beb98ee570de53f1aa4b866838924b-60f7cb4e.jpeg",u="/zh-cn/assets/13065eb252d78f86c7d84a7537e730d7-9522963a.png",h="/zh-cn/assets/0f55765329135bae263d77175baf52b7-2df179ec.png",I=[e,a,t,p,s,r,n,l,c,d,i,o,m,u,h],P={label:"blue-ethernet 高性能FPGA网络数据包处理项目详解",description:"blue-ethernet项目使用Bluespec SystemVerilog(BSV)硬件描述语言实现了一系列在FPGA上加速网络数据包处理的硬件模块。具体来说，其提供了用于生成和解析Ethernet/IP/UDP网络报文的硬件模块。此外，还提供了一个具有非阻塞高速缓存的APR报文处理单元，用于自动解析设备的物理MAC地址。",cover:"./07123c0a1614c5c0256c2c44fccab7ad.jpeg",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2023-11-02",title:"blue ethernet High Performance FPGA Network Packet Processing Project Details"},D=[{label:"简介",level:2},{label:"文件目录概览",level:2},{label:"组件",level:2},{label:"数据流处理模块",level:3},{label:"UdpIpLayer",level:3},{label:"UdpIpLayerForRdma",level:3},{label:"MacLayer",level:2},{label:"ARP Processor",level:3},{label:"UdpIpEthRx",level:3},{label:"UdpIpEthTx",level:3},{label:"UdpIpArpEthRxTx",level:3},{label:"PriorityFlowContro",level:3},{label:"性能和面积",level:2},{label:"入门教程",level:2},{label:"仿真测试",level:3},{label:"使用方法",level:3},{label:"相关链接",level:2}],b=`

    +const e="/zh-cn/assets/07123c0a1614c5c0256c2c44fccab7ad-82d2cfc4.jpeg",a="/zh-cn/assets/dbb615367665aefe1e8dc131faf7135d-ab0138b7.png",t="/zh-cn/assets/7e55ab5e49360b59ae14ad51bd9f8266-a3540f96.png",p="/zh-cn/assets/50e844cef87960be41630d431f7dba76-74a09282.png",s="/zh-cn/assets/da011de83bcdac4720de4265f06487fa-a09f8943.png",r="/zh-cn/assets/ab91fcebd0198e3ba3e68a1f0ede0dcb-2954efad.png",n="/zh-cn/assets/d6753cc7dafac128a184192d73a671d0-cbc3aa8e.png",l="/zh-cn/assets/8140b483b2b9992795a40af43149d92e-6324a4f1.png",c="/zh-cn/assets/261faba035c5925dd1bf0052673a2819-65bae75e.png",d="/zh-cn/assets/7ccbe7094043e218ad241cc3c2e3c871-e3e8431a.png",i="/zh-cn/assets/7a18e9fc6512a89b6e74a92a92580823-5ee6182a.png",o="/zh-cn/assets/3df9c5c4ff35c6cde20f54a80ed5bb0d-6b5bfe86.png",m="/zh-cn/assets/03beb98ee570de53f1aa4b866838924b-60f7cb4e.jpeg",u="/zh-cn/assets/13065eb252d78f86c7d84a7537e730d7-9522963a.png",h="/zh-cn/assets/0f55765329135bae263d77175baf52b7-2df179ec.png",I=[e,a,t,p,s,r,n,l,c,d,i,o,m,u,h],P={label:"blue-ethernet 高性能FPGA网络数据包处理项目详解",description:"blue-ethernet项目使用Bluespec SystemVerilog(BSV)硬件描述语言实现了一系列在FPGA上加速网络数据包处理的硬件模块。具体来说，其提供了用于生成和解析Ethernet/IP/UDP网络报文的硬件模块。此外，还提供了一个具有非阻塞高速缓存的APR报文处理单元，用于自动解析设备的物理MAC地址。",cover:"./07123c0a1614c5c0256c2c44fccab7ad.jpeg",location:"中国香港",author:["翁万正"],tags:["硬件加速"],date:"2023-11-02",title:"blue ethernet High Performance FPGA Network Packet Processing Project Details"},D=[{label:"简介",level:2},{label:"文件目录概览",level:2},{label:"组件",level:2},{label:"数据流处理模块",level:3},{label:"UdpIpLayer",level:3},{label:"UdpIpLayerForRdma",level:3},{label:"MacLayer",level:2},{label:"ARP Processor",level:3},{label:"UdpIpEthRx",level:3},{label:"UdpIpEthTx",level:3},{label:"UdpIpArpEthRxTx",level:3},{label:"PriorityFlowContro",level:3},{label:"性能和面积",level:2},{label:"入门教程",level:2},{label:"仿真测试",level:3},{label:"使用方法",level:3},{label:"相关链接",level:2}],C=`

    简介

    blue-ethernet 项目使用 Bluespec SystemVerilog(BSV)硬件描述语言实现了一系列在 FPGA 上加速网络数据包处理的硬件模块。具体来说，其提供了用于生成和解析 Ethernet/IP/UDP 网络报文的硬件模块。此外，还提供了一个具有非阻塞高速缓存的 APR 报文处理单元，用于自动解析设备的物理 MAC 地址。

    除了构建标准的 UDP/IP/Ethernet 协议栈，blue-ethernet 还增加了对 RoCE(RDMA over Converged Ethernet)协议的支持，具体包括：

    @@ -413,4 +413,4 @@ make verilog TARGET=UdpIpEthTx SUPPORT_RDMA=TRUE
  • blue-wrapper: https://github.com/wengwz/blue-wrapper

    • 关于项目更多的详细信息可关注链接:

    -

    https://github.com/wengwz/blue-ethernet

    `;export{I as assetURLs,b as default,P as metadata,D as toc}; +

    https://github.com/wengwz/blue-ethernet

    `;export{I as assetURLs,C as default,P as metadata,D as toc}; diff --git a/zh-cn/assets/index-866fab75.js b/zh-cn/assets/index-8bf3af0a.js similarity index 99% rename from zh-cn/assets/index-866fab75.js rename to zh-cn/assets/index-8bf3af0a.js index ac415ea..65c7fd8 100644 --- a/zh-cn/assets/index-866fab75.js +++ b/zh-cn/assets/index-8bf3af0a.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-6865ae02.png",l="/zh-cn/assets/image1-1421d5c3.png",t="/zh-cn/assets/image2-03115587.png",i="/zh-cn/assets/image3-8a8d1c33.png",a="/zh-cn/assets/image4-c1593056.png",p=[e,l,t,i,a],s={label:"Xline 源码解读（一） —— 初识 CURP 协议",description:"Xline 是一款开源的分布式 KV 存储引擎，其核心目的是实现高性能的跨数据中心强一致性，提供跨数据中心的meatdata 管理。那么 Xline 是怎么实现这种高性能的跨数据中心强一致性的呢？这篇文章就将带领大家一起来一探究竟。",cover:"./cover.png",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-07-13",title:"Interpretation of Xline source code (1)——Introduction to CURP protocol"},n=[{label:"Xline 是什么",level:2},{label:"Xline 的整体架构",level:2},{label:"CURP 协议简介",level:2},{label:"CURP 是什么？",level:3},{label:"为什么选择 CURP 协议",level:3},{label:"fast path 与 slow path",level:3},{label:"Summary",level:2}],o=`

    封面

    +const e="/zh-cn/assets/cover-6865ae02.png",l="/zh-cn/assets/image1-1421d5c3.png",t="/zh-cn/assets/image2-03115587.png",i="/zh-cn/assets/image3-8a8d1c33.png",a="/zh-cn/assets/image4-c1593056.png",p=[e,l,t,i,a],s={label:"Xline 源码解读（一） —— 初识 CURP 协议",description:"Xline 是一款开源的分布式 KV 存储引擎，其核心目的是实现高性能的跨数据中心强一致性，提供跨数据中心的meatdata 管理。那么 Xline 是怎么实现这种高性能的跨数据中心强一致性的呢？这篇文章就将带领大家一起来一探究竟。",cover:"./cover.png",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-07-13",title:"Interpretation of Xline source code (1)——Introduction to CURP protocol"},n=[{label:"Xline 是什么",level:2},{label:"Xline 的整体架构",level:2},{label:"CURP 协议简介",level:2},{label:"CURP 是什么？",level:3},{label:"为什么选择 CURP 协议",level:3},{label:"fast path 与 slow path",level:3},{label:"Summary",level:2}],r=`

    封面

    Xline 是什么

    Xline 是一款开源的分布式 KV 存储引擎，其核心目的是实现高性能的跨数据中心强一致性，提供跨数据中心的 meatdata 管理。那么 Xline 是怎么实现这种高性能的跨数据中心强一致性的呢？这篇文章就将带领大家一起来一探究竟。

    Xline 的整体架构

    @@ -77,4 +77,4 @@ b. follower 接收到请求后，由于 z = 9 与 witness 中的 z = 7 相冲突

    Xline 是一款提供跨数据中心强一致性的分布式 KV 存储，其核心问题之一便是如何在跨数据中心这种高延迟的广域网环境中提供高性能的强一致性保证。传统的分布式共识算法，如 Raft 和 Multi-Paxos，通过让所有操作都满足持久化存储和有序性前提来保证状态机一致性。而 CURP 协议则是对达成共识的场景做了更细粒度的划分，将协议分割成了前端（fast path）和后端（slow path），前端只保证了提案会被持久化到集群当中，而后端不仅保证了持久化，也保证了所有保存了该提案的节点会按照相同的顺序执行命令，保证了状态机的一致性。

    关于 CURP 协议的简介就到这里，更多的细节欢迎参考我们的其他文章和分享，如下：
    Curp 共识协议的重新思考

    -

    DatenLord | Xline Geo-distributed KV Storage

    `;export{p as assetURLs,o as default,s as metadata,n as toc}; +

    DatenLord | Xline Geo-distributed KV Storage

    `;export{p as assetURLs,r as default,s as metadata,n as toc}; diff --git a/zh-cn/assets/index-557885ec.js b/zh-cn/assets/index-8cb7e806.js similarity index 98% rename from zh-cn/assets/index-557885ec.js rename to zh-cn/assets/index-8cb7e806.js index 9f77b17..8594766 100644 --- a/zh-cn/assets/index-557885ec.js +++ b/zh-cn/assets/index-8cb7e806.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-4e3a952e.webp",a="/zh-cn/assets/image1-d5c7d3eb.webp",l="/zh-cn/assets/image2-4eebd69c.webp",r="/zh-cn/assets/image3-11daa3fe.webp",i="/zh-cn/assets/image4-30403828.webp",t="/zh-cn/assets/image5-7c696faa.webp",m="/zh-cn/assets/image6-a778303e.webp",s="/zh-cn/assets/image7-ba335a80.webp",n="/zh-cn/assets/image8-6a8e4dea.webp",o="/zh-cn/assets/image9-9202db97.webp",p=[e,a,l,r,i,t,m,s,n,o],c={label:"Karmada 管理有状态应用 Xline 的早期探索与实践",description:"目前随着云原生技术和云市场的不断成熟，越来越多的 IT 厂商开始投入到跨云多集群的怀抱当中。以下是 flexera 在 2023 年中关于云原生市场对多云多集群管理的接受程度的调查报告（info.flexera.com）",cover:"./cover.webp",location:"中国香港",author:["赵佳炜"],date:"2024-03-21",title:"Early Explorations and Practices of Xline a Stateful Application Managed by Karmada"},d=[{label:"背景与动机",level:2},{label:"Karmada 管理有状态应用存在哪些挑战？",level:2},{label:"Xline 的一些早期尝试",level:2},{label:"部署",level:3},{label:"扩缩容",level:3},{label:"滚动更新",level:3},{label:"总结",level:2},{label:"Xline 社区会议",level:2}],b=`

    封面

    +const e="/zh-cn/assets/cover-4e3a952e.webp",a="/zh-cn/assets/image1-d5c7d3eb.webp",l="/zh-cn/assets/image2-4eebd69c.webp",r="/zh-cn/assets/image3-11daa3fe.webp",i="/zh-cn/assets/image4-30403828.webp",t="/zh-cn/assets/image5-7c696faa.webp",m="/zh-cn/assets/image6-a778303e.webp",s="/zh-cn/assets/image7-ba335a80.webp",n="/zh-cn/assets/image8-6a8e4dea.webp",p="/zh-cn/assets/image9-9202db97.webp",o=[e,a,l,r,i,t,m,s,n,p],c={label:"Karmada 管理有状态应用 Xline 的早期探索与实践",description:"目前随着云原生技术和云市场的不断成熟，越来越多的 IT 厂商开始投入到跨云多集群的怀抱当中。以下是 flexera 在 2023 年中关于云原生市场对多云多集群管理的接受程度的调查报告（info.flexera.com）",cover:"./cover.webp",location:"中国香港",author:["赵佳炜"],date:"2024-03-21",title:"Early Explorations and Practices of Xline a Stateful Application Managed by Karmada"},d=[{label:"背景与动机",level:2},{label:"Karmada 管理有状态应用存在哪些挑战？",level:2},{label:"Xline 的一些早期尝试",level:2},{label:"部署",level:3},{label:"扩缩容",level:3},{label:"滚动更新",level:3},{label:"总结",level:2},{label:"Xline 社区会议",level:2}],b=`

    封面

    背景与动机

    目前随着云原生技术和云市场的不断成熟，越来越多的 IT 厂商开始投入到跨云多集群的怀抱当中。以下是 flexera 在 2023 年中关于云原生市场对多云多集群管理的接受程度的调查报告（info.flexera.com）

    图片

    @@ -68,7 +68,7 @@ const e="/zh-cn/assets/cover-4e3a952e.webp",a="/zh-cn/assets/image1-d5c7d3eb.web

    目前，由于 scale in/out 不可避免地会涉及到 membership change 的过程，而在 Karmada 下不同 member cluster 之间缺少必要的同步机制，因此，scale 的过程还是存在局限性：一次水平 scale out 只能扩容一个集群，一次垂直扩容也只能在某个指定的 member cluster 上进行。

    滚动更新

    -

    图片

    +

    图片

    对于滚动更新而言，大致的过程如上图所示：

    1. 用户修改 Karmada 上的 Xline 资源，修改其中的 xline 镜像版本
      2. @@ -89,4 +89,4 @@ const e="/zh-cn/assets/cover-4e3a952e.webp",a="/zh-cn/assets/image1-d5c7d3eb.web 会议号: 813 0547 8985
      密码: 520159
      会议链接：
      -https://zoom.us/j/81305478985?pwd=PsnbMGQy1ZqxYyd67cAkaGROfnIoQa.1

      `;export{p as assetURLs,b as default,c as metadata,d as toc}; +https://zoom.us/j/81305478985?pwd=PsnbMGQy1ZqxYyd67cAkaGROfnIoQa.1

      `;export{o as assetURLs,b as default,c as metadata,d as toc}; diff --git a/zh-cn/assets/index-2645d3b0.js b/zh-cn/assets/index-8f0491cb.js similarity index 94% rename from zh-cn/assets/index-2645d3b0.js rename to zh-cn/assets/index-8f0491cb.js index 7bb11d7..53357c4 100644 --- a/zh-cn/assets/index-2645d3b0.js +++ b/zh-cn/assets/index-8f0491cb.js @@ -1,4 +1,4 @@ -const s="/zh-cn/assets/cover-78606c04.png",t="/zh-cn/assets/image1-f46bfcc6.jpg",n=[s,t],o={label:"Rust X Datenlord：第二届中国Rust开发者大会回顾",description:"达坦科技自成立以来积极探索软硬件深度融合，专注于打造新一代的开源跨云存储平台，以满足不同行业客户对数据跨云、跨数据中心高性能访问的需求。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"Rust X Datenlord: Review of the Second China Rust Developer Conference"},r=[{label:"专题演讲",level:2},{label:"线上 workshop",level:2},{label:"参与我们",level:2}],e=`

      封面

      +const s="/zh-cn/assets/cover-78606c04.png",t="/zh-cn/assets/image1-f46bfcc6.jpg",n=[s,t],o={label:"Rust X Datenlord：第二届中国Rust开发者大会回顾",description:"达坦科技自成立以来积极探索软硬件深度融合，专注于打造新一代的开源跨云存储平台，以满足不同行业客户对数据跨云、跨数据中心高性能访问的需求。",cover:"./cover.png",location:"新加坡",date:"2022-08-04",title:"Rust X Datenlord: Review of the Second China Rust Developer Conference"},e=[{label:"专题演讲",level:2},{label:"线上 workshop",level:2},{label:"参与我们",level:2}],r=`

      封面

      达坦科技自成立以来积极探索软硬件深度融合，专注于打造新一代的开源跨云存储平台，以满足不同行业客户对数据跨云、跨数据中心高性能访问的需求。

      今年以来陆续发声，将达坦科技开源项目 async-rdma 的技术实践和案例对外输出，坚定地做 Rust 语言的布道，也将达坦科技探索的新一代硬件敏捷开发的研究成果在各硬件技术大会上做分享（本周的次条为达坦科技的团队在南京参加中国计算机学会芯片大会的回顾）。

      专题演讲

      @@ -12,4 +12,4 @@ const s="/zh-cn/assets/cover-78606c04.png",t="/zh-cn/assets/image1-f46bfcc6.jpg"

      参与我们

      目前，我们将整个库放在了 Github.com/datenlord/async-rdma 上，并且也在持续迭代中，欢迎感兴趣用 Rust 语言实现高性能编程的你前来讨论。

      有意加入 Rust 前沿交流讨论群，请添加小助手微信：

      -

      封面

      `;export{n as assetURLs,e as default,o as metadata,r as toc}; +

      封面

      `;export{n as assetURLs,r as default,o as metadata,e as toc}; diff --git a/zh-cn/assets/index-2a0835cc.js b/zh-cn/assets/index-917f23ec.js similarity index 92% rename from zh-cn/assets/index-2a0835cc.js rename to zh-cn/assets/index-917f23ec.js index b5606cf..12e3bf7 100644 --- a/zh-cn/assets/index-2a0835cc.js +++ b/zh-cn/assets/index-917f23ec.js @@ -1,4 +1,4 @@ -const p="/zh-cn/assets/cover-9e502538.png",n="/zh-cn/assets/image1-09ca1c97.jpg",s="/zh-cn/assets/image2-f93efd4a.jpg",t="/zh-cn/assets/image1-50beaba8.png",o=[p,n,s,t],a={label:"SpinalHDL的使用和开发经验研讨会",description:"SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。",cover:"./cover.png",location:"中国香港",date:"2023-07-03",title:"SpinalHDL usage and development experience workshop"},r=[],e=`

      SpinalHDL 始于 2014 年，最初是作为 VHDL/Verilog 的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。

      +const p="/zh-cn/assets/cover-9e502538.png",n="/zh-cn/assets/image1-09ca1c97.jpg",s="/zh-cn/assets/image2-f93efd4a.jpg",t="/zh-cn/assets/image1-50beaba8.png",a=[p,n,s,t],r={label:"SpinalHDL的使用和开发经验研讨会",description:"SpinalHDL始于2014年，最初是作为VHDL/Verilog的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。",cover:"./cover.png",location:"中国香港",date:"2023-07-03",title:"SpinalHDL usage and development experience workshop"},o=[],e=`

      SpinalHDL 始于 2014 年，最初是作为 VHDL/Verilog 的替代而做的创新尝试，伴随着数年来开源硬件设计的蓬勃发展，基于开源技术的硬件设计方法和范式逐渐受到业界的关注。

      达坦科技（DatenLord） 致力于打造高性能跨云存储，其通过软硬件深度融合的方式打破云之间的壁垒，实现高性能跨云数据访问，提供海量异地、异构数据的统一存储访问机制，为云上应用提供高性能安全存储支持。

      达坦科技采用硬件加速提升存储性能，目前采用 FPGA、ASIC 实现存储相关场景的性能加速。SpinalHDL 是达坦科技在产品中使用的硬件描述语言之一，达坦科技也一直热心于推广 SpinalHDL 在业界的落地应用。在 2022 年 12 月，达坦科技曾联合 SpinalHDL 社区举办一场题为《SpinalHDL 应用前景探索》的线上研讨会，收获海内外 SpinalHDL 爱好者的欢迎。

      而在北京时间 2023 年 7 月 7 日下午 14:00-17:00，达坦科技将联合 SpinalHDL 社区，以及四川芯测电子技术有限公司举办一场题为 SpinalHDL 的使用和开发经验研讨会，旨在和大家分享 SpinalHDL 最新的实践、挑战和经验的分享。

      @@ -13,4 +13,4 @@ const p="/zh-cn/assets/cover-9e502538.png",n="/zh-cn/assets/image1-09ca1c97.jpg" 474-6575-9473

      图片

      对开源硬件感兴趣的朋友，可以添加小助手微信，加入达坦科技硬件群。

      -

      图片

      `;export{o as assetURLs,e as default,a as metadata,r as toc}; +

      图片

      `;export{a as assetURLs,e as default,r as metadata,o as toc}; diff --git a/zh-cn/assets/index-9e270336.js b/zh-cn/assets/index-9e270336.js new file mode 100644 index 0000000..5ebb8c4 --- /dev/null +++ b/zh-cn/assets/index-9e270336.js @@ -0,0 +1,153 @@ +const s="/zh-cn/assets/cover-ca6ff87c.webp",e="/zh-cn/assets/image1-78435096.webp",n=[s,e],l={label:"Xline中区间树实现小结",description:"在Xline最近的一次重构中， 我们发现有两个在关键路径上的数据结构Speculative Pool和Uncommitted Pool导致了性能瓶颈。这两个数据结构用于在CURP中进行冲突检测。具体来说， 由于CURP协议的要求， 对于每个处理的command， 需要在已经接收的commands中找到所有与当前command相冲突的commands。",cover:"./cover.webp",location:"中国香港",author:["尹正皓"],date:"2024-04-18",title:"A short summary of the implementation of interval trees in Xline"},a=[{label:"实现区间树的起因",level:2},{label:"区间树实现简介",level:2},{label:"插入/删除",level:3},{label:"查询重叠操作",level:3},{label:"使用 Safe Rust 实现区间树",level:2},{label:"困难点",level:3},{label:"Rc封面

      +

      实现区间树的起因

      +

      在 Xline 最近的一次重构中， 我们发现有两个在关键路径上的数据结构 Speculative Pool 和 Uncommitted Pool 导致了性能瓶颈。这两个数据结构用于在 CURP 中进行冲突检测。具体来说， 由于 CURP 协议的要求， 对于每个处理的 command， 需要在已经接收的 commands 中找到所有与当前 command 相冲突的 commands。

      +

      例如对于 KV 操作 put/get_range/delete_range， 我们需要考虑这些操作之间可能的冲突情况。由于每个 KV 操作都会有一个 key 的范围， 所以问题就转化为要查询某一个 key 范围和某个 Pool 中所有 key 范围的集合是否有相交。采用朴素遍历整个集合的方法会导致每次查询的时间复杂度为 O(n)，从而降低效率并导致性能瓶颈。

      +

      为了解决这一问题， 我们需要引入区间树这一数据结构。区间树能够高效支持重叠区间的插入，删除和查询操作， 这三种操作都可以在 O(log(n)) 的时间内完成。因此， 我们可以利用区间树维护 key 范围的集合， 从而解决性能瓶颈的问题。

      +

      区间树实现简介

      +

      Xline 中的区间树是基于 Introduction to Algorithms (3rd ed.) 实现的， 它是由二叉平衡树扩展而来。

      +

      区间树以一颗二叉平衡树为基础(例如使用红黑树实现)， 将区间本身作为平衡树的 key。对于区间 [low, high] ， 我们首先按照 low 值进行排序， 如果 low 值相同， 再按照 high 值进行排序， 这样对区间集合能够定义一个全序的关系(如果不处理重复区间则不需要对 high 排序)。同时， 对于平衡树的每一个节点， 我们在这个节点上记录以这个节点为根的子树中 high 的最大值， 记为 max 。

      +

      插入/删除

      +

      与红黑树的插入/删除相同， 最坏时间复杂度为 O(log(n))

      +

      查询重叠操作

      +

      给出一个区间 i ， 我们需要查询当前树中是否有区间和 i 重合。在 Introduction to Algorithms 中给出的伪代码如下

      +

      图片

      +

      有了 max 的定义， 解决这个问题的思路就非常简单了: 对于以 x 为根的子树 T_x ， 如果 i 不和 x_i 相交， 那么 i 一定是在 x_i 的左侧或者右侧。

      +
        +
      1. 如果 i 在 x_i 的左侧这时可以直接排除右子树， 因为这时 i.high 比 x_i.low 还要小
        2. +
      2. 如果 i 在 x_i 的右侧在这种情况下， 我们无法直接排除左子树， 因为左子树中的节点区间仍然可能和 i 相交。这时候 max 值就派上用场了:
        3. +
      +
        +
      • 如果 x 的左子树中 high 的最大值仍然小于 i.low 的话， 那么可以直接排除 x 的左子树。
        • +
      • 如果 x 的左子树中 high 的最大值大于或等于 i.low 的话， 那么左子树中一定存在和 i 相交的区间， 因为 x 左子树中所有的 low 都小于 x_i.low ， 而 i 在 x_i 的右侧， 所以 x 左子树中所有的 low 也小于 i.low ， 因此一定有相交。
        • +
      +

      通过以上两点可以验证上述伪代码的正确性， 并且从代码可以看出查询的最坏时间复杂度为 O(log(n)) 。

      +

      使用 Safe Rust 实现区间树

      +

      困难点

      +

      为了构建区间树， 我们首先需要实现一个红黑树。在红黑树中， 每个树节点需要指向父节点， 这就要求一个节点实例存在多个所有权。

      +

      Rc<RefCell>

      +

      最初我尝试使用了 Rust 最常见的多所有权的实现 Rc<RefCell> ， 树节点结构类似于以下的代码:

      +
      struct Node<T, V> {
+    left: Option<NodeRef<T, V>>,
+    right: Option<NodeRef<T, V>>,
+    parent: Option<NodeRef<T, V>>,
+    ...
+}
+
+struct NodeRef<T, V>(Rc<RefCell<Node<T, V>>>);
+
      +

      从数据结构定义上看起来还算清晰， 但是实际使用起来相当繁琐， 因为 RefCell 要求用户明确地调用 borrow ， 或者 borrow_mut ， 我不得不构建很多 helper functions 来简化实现， 下面是一些例子:

      +
      impl<T, V> NodeRef<T, V> {
+    fn left<F, R>(&self, op: F) -> R
+    where
+        F: FnOnce(&NodeRef<T, V>) -> R,
+    {
+        op(self.borrow().left())
+    }
+
+    fn parent<F, R>(&self, op: F) -> R
+    where
+        F: FnOnce(&NodeRef<T, V>) -> R,
+    {
+        op(self.borrow().parent())
+    }
+
+    fn set_right(&self, node: NodeRef<T, V>) {
+        let _ignore = self.borrow_mut().right.replace(node);
+    }
+
+    fn set_max(&self, max: T) {
+        let _ignore = self.borrow_mut().max.replace(max);
+    }
+    ...
+}
+
      +

      RefCell 使用上不符合人体工程学是一点， 更糟糕的是我们在代码中需要使用大量的 Rc::clone ， 因为在自上而下遍历树节点时， 我们需要持有一个节点的 owned type， 而不是一个引用。例如在之前提到的 INTERVAL-SEARCH 操作中， 每次 x = x.left 或者 x = x.right ， 首先需要 borrow x 本身， 再赋值给 x。因此需要先取得左(或右)节点的 owned type， 再更新 x 到新值。这样导致大量的节点计数开销。

      +

      具体开销到底有多大?我尝试对于我们上面的实现进行 benchmark， 使用随机数据插入和删除。我本机环境为 Intel 13600KF 和 DDR4 内存。

      +
      test bench_interval_tree_insert_100           ... bench:       9,821 ns/iter (+/- 263)
+test bench_interval_tree_insert_1000          ... bench:     215,362 ns/iter (+/- 6,536)
+test bench_interval_tree_insert_10000         ... bench:   2,999,694 ns/iter (+/- 134,979)
+test bench_interval_tree_insert_remove_100    ... bench:      18,395 ns/iter (+/- 750)
+test bench_interval_tree_insert_remove_1000   ... bench:     385,858 ns/iter (+/- 7,659)
+test bench_interval_tree_insert_remove_10000  ... bench:   5,465,355 ns/iter (+/- 114,735)
+
      +

      使用相同数据和环境， 和 etcd 的 golang 区间树实现进行对比:

      +
      BenchmarkIntervalTreeInsert100-20                 123747             12250 ns/op
+BenchmarkIntervalTreeInsert1000-20                  7119            189613 ns/op
+BenchmarkIntervalTreeInsert10_000-20                 340           3237907 ns/op
+BenchmarkIntervalTreeInsertRemove100-20            24584             45579 ns/op
+BenchmarkIntervalTreeInsertRemove1000-20             344           3462977 ns/op
+BenchmarkIntervalTreeInsertRemove10_000-20             3         358284695 ns/op
+
      +

      可以看到我们的 Rust 实现并无优势， 甚至有时插入操作还会更慢。(注: 这里的 etcd 的节点删除实现似乎有问题， 观察节点数量从 1000->10000 时耗时的增长， 复杂度可能不是 O(log(n)))

      +

      线程安全问题

      +

      即使我们勉强接受以上的性能， 一个更严重的问题浮出水面: Rc<RefCell> 无法在多线程环境下使用! 由于 Xline 是在 Rust 的 Tokio runtime 之上构建， 需要在多个线程间共享一个区间树实例。可惜的是， Rc 本身是 !Send ， 因为 Rc 内部的引用计数是以非原子的方式递增/减的。那么这就导致整个区间树的数据结构无法发送到其他线程。除非我们采用一个专用线程， 并且通过 channel 与这个线程进行通信， 我们无法在多线程环境下使用。

      +

      其他智能指针

      +

      于是我们需要考虑其他智能指针来解决这个问题。一个自然的想法是使用 Arc<RefCell> 。然而， RefCell 本身是 !Sync ， 因为 RefCell 的 borrow checking 只能在单线程下使用， 无法同时由多个线程共享， 并且 Arc 是 Send 当且仅当 T 是 Sync ， 因为 Arc 本身允许克隆。

      +

      Arc<Mutex>?

      +

      那么在多线程环境多所有权似乎只能够使用 Arc<mutex> 了。但是显然这对于我们的用例来说是一个 anti-pattern， 因为这样我们就需要对每一个节点都加上一把锁， 而树中可能有数十万乃至几百万的节点， 这是不可接受的。

      +

      QCell

      +

      在使用常规方法无果后， 我们尝试使用了 qcell 这个 crate， 其中 QCell 作为 RefCell 的多线程替代品。作者非常巧妙地解决了多所有权下借用检查的问题。

      +

      QCell 设计

      +

      由于 qcell 的设计在 GhostCell 的论文中有正式的证明， 这里我就介绍介绍一下 GhostCell 论文中的设计:

      +

      在 Rust 中， 对于数据操作的权限和数据本身是绑定在一起的， 也就是说， 你首先要拥有一个数据， 才能修改它的状态。具体一点， 想要修改数据 T ， 你要么有一个 T 本身， 要么有一个 &mut T 。

      +

      GhostCell 的设计概念是将对数据操作的权限和数据本身分开， 那么对于一种数据， 数据 T 本身是一个类型， 而它的权限同样也是是一个具体的类型， 记为 P_t 。这种设计相比与 Rust 现有设计就更加灵活， 因为可以让一个权限类型的实例拥有对一个数据集合的权限， 即一个 P_t 拥有多个 T 。在这种设计下， 只要权限类型实例本身是线程安全的， 它所管理的这一个数据集合也是线程安全的。

      +

      在 qcell 中使用方法如下， 首先需要创建一个 QCellOwner 代表前述的权限， QCell 则表示储存的数据。

      +
      let mut owner = QCellOwner::new();
+let item = Arc::new(QCell::new(&owner, Vec::<u8>::new()));
+owner.rw(&item).push(0);
+
      +

      QCellOwner 拥有注册到它这里的 QCell 的读写权限(通过 QCellOwner::rw 或者 QCellOwner::ro )， 所以只要 QCellOwner 是线程安全， QCell 中的数据也是线程安全的。在这里 QCellOwner 本身是 Send + Sync ， QCell 也可以是 Send + Sync 只要 T 满足:

      +
      impl<T: ?Sized + Send> Send for QCell<T>
+impl<T: ?Sized + Send + Sync> Sync for QCell<T>
+
      +

      使用 QCell

      +

      得益于它的设计， QCell 本身开销非常小(这里的具体的开销不展开讲了)， 因为它借助于 Rust 类型系统使得 borrow checking 是在编译期检查的， 而 RefCell 相比之下则是在运行时检查， 因此使用 QCell 不仅能在多线程环境下使用， 还能够提升一部分性能。

      +

      接下来就是应用 QCell 到我们的树实现上了。由于 QCell 只提供内部可变性， 要能够使用多重所有权， 我们还需要有 Arc ， 结构大致看起来如下:

      +
      pub struct IntervalTree {
+    node_owner: QCellOwner,
+    ...
+}
+
+struct NodeRef<T, V>(Arc<QCell<Node<T, V>>>);
+
      +

      看起来不错， 那么性能如何呢?

      +
      test bench_interval_tree_insert_100           ... bench:      41,486 ns/iter (+/- 71)
+test bench_interval_tree_insert_1000          ... bench:     586,854 ns/iter (+/- 13,947)
+test bench_interval_tree_insert_10000         ... bench:   7,726,849 ns/iter (+/- 102,820)
+test bench_interval_tree_insert_remove_100    ... bench:      75,569 ns/iter (+/- 325)
+test bench_interval_tree_insert_remove_1000   ... bench:   1,135,232 ns/iter (+/- 7,539)
+test bench_interval_tree_insert_remove_10000  ... bench:  15,686,474 ns/iter (+/- 194,385)
+
      +

      比较之前的测试结果， 性能竟然下降了 1-3 倍。这说明最大的开销不是 Cell， 而是引用计数， 在我们的区间树用例中， 使用 Arc 比 Rc 慢了非常多。

      +

      一个不使用 Arc 的方法是使用 arena 分配， 即一次性对所有对象分配内存， 并且销毁也是一次性的， 但是这在树的数据结构中并不适用， 因为我们需要动态地分配和销毁节点的内存。

      +

      数组模拟指针

      +

      性能测试反映出我们的智能指针尝试是失败的。在 Rust 所有权模型下， 使用智能指针来实现树结构是非常糟糕的。

      +

      那么我们可不可以不使用指针来实现呢? 一个自然的想法是使用数组来模拟指针。

      +

      于是我们的树结构重新设计如下:

      +
      pub struct IntervalTree {
+    nodes: Vec<Node>,
+    ...
+}
+
+pub struct Node {
+    left: Option<u32>,
+    right: Option<u32>,
+    parent: Option<u32>,
+    ...
+}
+
      +

      可以看出在 Rust 中数组模拟指针的优势是不需要某个节点的所有权， 只需要记录下某个节点在 Vec 中的位置即可。每次插入新节点即向 nodes 后面 push 一个节点， 它的模拟指针就是 nodes.len() - 1 。

      +

      对于插入操作非常简单， 但是如果我们需要删除节点呢? 如果使用朴素的删除方法: 更新树节点的指针后直接将 Vec 中的对应的节点置为空， 那么这样就会在我们的 Vec 中留下一个“空洞”。这样的话我们需要再额外维护一个链表结构来记录这个“空洞”的位置， 以便在下一次插入的时候能重新使用。而且这种方法会导致 nodes 这个 Vec 的空间难以回收， 即使大部分节点已经被删除。

      +

      那么如何解决这个问题呢? 接下来我参照了 petgraph 中的方法， 在删除一个节点时， 将这个节点与 Vec 中最后一个节点交换再移除， 这样就解决了之前的内存回收的问题。需要注意的是， 我们需要同时更新与最后一个节点有关节点的指针， 因为它的位置发生了变化。在 petgraph 的图实现中， 这个操作可能是很耗时的， 因为一个节点可能会连接多条边， 但是在我们的树用例中， 我们只需要更新这个节点的父亲/左孩子/右孩子总共 3 个节点， 因此这个操作是 O(1) 的， 这样就非常高效的解决了节点删除的问题。

      +

      我们再来对我们的新实现进行 benchmark:

      +
      test bench_interval_tree_insert_100           ... bench:       3,333 ns/iter (+/- 87)
+test bench_interval_tree_insert_1000          ... bench:      85,477 ns/iter (+/- 3,552)
+test bench_interval_tree_insert_10000         ... bench:   1,406,707 ns/iter (+/- 20,796)
+test bench_interval_tree_insert_remove_100    ... bench:       7,157 ns/iter (+/- 69)
+test bench_interval_tree_insert_remove_1000   ... bench:     189,277 ns/iter (+/- 3,014)
+test bench_interval_tree_insert_remove_10000  ... bench:   3,060,029 ns/iter (+/- 50,829)
+
      +

      从结构来看这次的性能提升非常之大， 对比之前的 Rc<RefCell> 或者是 etcd 的 golang 的实现大约快了 1-2 倍。

      +

      使用数组模拟指针不仅轻松解决了所有权的问题， 并且由于数组内存的连续性使其对于缓存更加友好， 比纯指针性能甚至会更高。

      +

      总结

      +

      至此， 我们成功完美解决了使用 safe Rust 实现区间树的问题。从之前所述的多种尝试来看， 在 Rust 中使用引用计数智能指针来实现树或者图的数据结构是失败的， 因为这些智能指针并不适用于大量的内存操作。将来如果需要使用 safe Rust 实现指针类数据结构， 我会优先考虑使用数组而不是智能指针。

      `;export{n as assetURLs,t as default,l as metadata,a as toc}; diff --git a/zh-cn/assets/index-d4dfb508.js b/zh-cn/assets/index-a59ad30d.js similarity index 95% rename from zh-cn/assets/index-d4dfb508.js rename to zh-cn/assets/index-a59ad30d.js index c3823f7..7cb6ff0 100644 --- a/zh-cn/assets/index-d4dfb508.js +++ b/zh-cn/assets/index-a59ad30d.js @@ -1,4 +1,4 @@ -const o="/zh-cn/assets/cover-85e5394f.jpg",e="/zh-cn/assets/image1-ec71eac6.webp",t=[o,e],l={label:"一封来自 DatenLord 关于GSoC 2024的挑战书",description:"Google Summer of Code 是一项全球性的在线计划，致力于将新的contributor引入开源软件开发领域。GSoC 参与者在导师的指导下，与开源组织合作开展为期 12 周以上的编程项目。今年，达坦科技入选作为开源社区组织，携CNCF Sandbox项目Xline下众多有趣、创新且有挑战性的题目参与本次活动。",cover:"./cover.jpg",location:"中国香港",date:"2024-02-29",title:"A Challenge Letter from DatenLord on GSoC 2024"},r=[{label:"为什么要参加 GSoC？",level:2},{label:"期待开源爱好者参与的项目",level:2},{label:"参与指南",level:2},{label:"活动重要时间点",level:2},{label:"联系方式",level:2}],s=`

      图片

      +const o="/zh-cn/assets/cover-85e5394f.jpg",e="/zh-cn/assets/image1-ec71eac6.webp",t=[o,e],l={label:"一封来自 DatenLord 关于GSoC 2024的挑战书",description:"Google Summer of Code 是一项全球性的在线计划，致力于将新的contributor引入开源软件开发领域。GSoC 参与者在导师的指导下，与开源组织合作开展为期 12 周以上的编程项目。今年，达坦科技入选作为开源社区组织，携CNCF Sandbox项目Xline下众多有趣、创新且有挑战性的题目参与本次活动。",cover:"./cover.jpg",location:"中国香港",date:"2024-02-29",title:"A Challenge Letter from DatenLord on GSoC 2024"},i=[{label:"为什么要参加 GSoC？",level:2},{label:"期待开源爱好者参与的项目",level:2},{label:"参与指南",level:2},{label:"活动重要时间点",level:2},{label:"联系方式",level:2}],r=`

      图片

      Google Summer of Code 是一项全球性的在线计划，致力于将新的 contributor 引入开源软件开发领域。GSoC 参与者在导师的指导下，与开源组织合作开展为期 12 周以上的编程项目。今年，达坦科技入选作为开源社区组织，携 CNCF Sandbox 项目 Xline 下众多有趣、创新且有挑战性的题目参与本次活动。
      https://summerofcode.withgoogle.com/programs/2024/organizations/datenlord-6z

      期待志同道合的，敢于挑战自我的小伙伴积极加入我们～

      @@ -57,4 +57,4 @@ GSoC 初步结果公示

      对于报名方式有任何疑问，或者对某一个项目非常感兴趣，并且想要深入了解的同学，欢迎加入 Xline Discord 进行提问或与项目导师进行进一步沟通：
      https://discord.com/invite/hqDRtYkWzm

      您也可以扫码添加小助手微信，或发邮件至info@datenlord.com 进行咨询。

      -

      图片

      `;export{t as assetURLs,s as default,l as metadata,r as toc}; +

      图片

      `;export{t as assetURLs,r as default,l as metadata,i as toc}; diff --git a/zh-cn/assets/index-6618c0b5.js b/zh-cn/assets/index-a5e56ae7.js similarity index 98% rename from zh-cn/assets/index-6618c0b5.js rename to zh-cn/assets/index-a5e56ae7.js index 2cde4b2..ce92d29 100644 --- a/zh-cn/assets/index-6618c0b5.js +++ b/zh-cn/assets/index-a5e56ae7.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/e4031380f79f643b21d6bdfd37c46a1c-95e167c8.jpeg",s="/zh-cn/assets/8108518a82f752ddea6832ce7bc15560-3d5249bd.png",a="/zh-cn/assets/cf12e52cb9d0fbb7359c08e1cfc674bc-9774dac8.png",c="/zh-cn/assets/9d0ce540d5b4e7c3cb1a055c1413bdc9-a833a409.png",n="/zh-cn/assets/f7aae2cd2b075c3f567ff87285f738c2-476d6b84.png",t="/zh-cn/assets/bb02cb50b10cee5e7d575210aaeacd71-1661168b.png",l=[e,s,a,c,n,t],r={label:"Xline 源码解读（四）—— CURP 状态机引擎",description:"在上一篇源码解读的文章（Xline 源码解读（三） —— CURP Server 的实现）中，我们简单阐述了Xline 的 Curp Server 是如何实现的。接下来，就让我们话接上回，继续深入地来了解 Curp Server 中的一些核心的数据结构，特别是 conflict_checked_channel 和 command worker，它们相互协作，共同推动着 CURP Server 内部状态机状态转换。",cover:"./e4031380f79f643b21d6bdfd37c46a1c.jpeg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-10-19",title:"Xline Source Code Interpretation (IV) CURP state machine engine"},p=[{label:"为什么我们需要冲突检测队列？",level:2},{label:"冲突检测队列是如何工作的？",level:2},{label:"状态机引擎的架构",level:2},{label:"状态是如何转换的",level:2},{label:"Summary",level:2}],o=`

      +const e="/zh-cn/assets/e4031380f79f643b21d6bdfd37c46a1c-95e167c8.jpeg",s="/zh-cn/assets/8108518a82f752ddea6832ce7bc15560-3d5249bd.png",a="/zh-cn/assets/cf12e52cb9d0fbb7359c08e1cfc674bc-9774dac8.png",n="/zh-cn/assets/9d0ce540d5b4e7c3cb1a055c1413bdc9-a833a409.png",c="/zh-cn/assets/f7aae2cd2b075c3f567ff87285f738c2-476d6b84.png",t="/zh-cn/assets/bb02cb50b10cee5e7d575210aaeacd71-1661168b.png",l=[e,s,a,n,c,t],r={label:"Xline 源码解读（四）—— CURP 状态机引擎",description:"在上一篇源码解读的文章（Xline 源码解读（三） —— CURP Server 的实现）中，我们简单阐述了Xline 的 Curp Server 是如何实现的。接下来，就让我们话接上回，继续深入地来了解 Curp Server 中的一些核心的数据结构，特别是 conflict_checked_channel 和 command worker，它们相互协作，共同推动着 CURP Server 内部状态机状态转换。",cover:"./e4031380f79f643b21d6bdfd37c46a1c.jpeg",location:"中国香港",author:["赵佳炜"],tags:["Xline"],date:"2023-10-19",title:"Xline Source Code Interpretation (IV) CURP state machine engine"},p=[{label:"为什么我们需要冲突检测队列？",level:2},{label:"冲突检测队列是如何工作的？",level:2},{label:"状态机引擎的架构",level:2},{label:"状态是如何转换的",level:2},{label:"Summary",level:2}],o=`

      在上一篇源码解读的文章（
      Xline 源码解读（三） —— CURP Server 的实现

      ）中，我们简单阐述了 Xline 的 Curp Server 是如何实现的。接下来，就让我们话接上回，继续深入地来了解 Curp Server 中的一些核心的数据结构，特别是 conflict_checked_channel 和 command worker，它们相互协作，共同推动着 CURP Server 内部状态机状态转换。

      @@ -25,12 +25,12 @@ const e="/zh-cn/assets/e4031380f79f643b21d6bdfd37c46a1c-95e167c8.jpeg",s="/zh-cn

      针对第一个问题，我们可以将所有的命令都看成是一张有向无环图中的顶点，而将冲突关系视为图中顶点之间的有向边。假设命令 A 和命令 B 之间存在冲突（命令的抵达顺序为先 A 后 B），我们便可将冲突关系看成是 A 和 B 之间的一条弧<A, B>，其中弧头总是指向后进来的顶点（这一顺序性就保证了图中不会出现环形冲突）。

      一旦我们将冲突关系定义为一个有向无环的非连通图中的一条边，那么执行某个命令时所需要计算的冲突顺序问题，就转换成了一个求有向无环图中，该命令所在的连通分量的拓扑排序问题。针对每个命令，successors（也就是后继） 保存了哪些 cmd 与当前 cmd 冲突，successors 的长度就是该 顶点的出度。而 predecessor_cnt （前驱数）则代表了这个 cmd 与之前的多少个 cmd 存在冲突，也就是该顶点元素的入度。

      同样回到我们前面所提到的 A、B、C 的例子当中，当我们使用 DAG 来描述命令的冲突关系，其情况如下图所示。

      -

      +

      当 cmd_worker 从 channel 当中接收命令时，channel 只需要遍历这个有向无环图中的每一个连通分量，并找到第一个入度为 0 的顶点即可。只有当 command 执行完毕后，channel 才会更新 B 的 predecessor_cnt，以解决 A 与 B 之间的冲突关系。

      状态机引擎的架构

      正如我们在文章开头所说的那样，冲突检测队列和 command worker 共同组成了 Curp Server 的状态机引擎。冲突检测队列向 command worker 提供无冲突的命令，而 command worker 则负责执行这些命令，并根据结果推动更新冲突检测队列当中的冲突关系。

      从结构上来看，Curp Server 状态机引擎是由三对 channel 和一个 filter 构成，其中这三对 channel 分别为：(send_tx，filter_rx)、(filter_tx, recv_rx) 以及 （done_tx, done_rx）具体的结构可以参考下图。

      -

      +

      其数据流方向为：send_tx -> filter_rx -> filter -> filter_tx -> recv_rx -> done_tx -> done_rx

      其中，send_tx 为 RawCurp 对象所拥有，负责在 propose（对应了 curp 的 fast path）、以及应用日志 apply（对应了 curp 的 slow path） 时向冲突检测队列投递对应的 CEEvent。冲突检测队列则会在计算出冲突顺序后，将 CEEvent 转换成为 Task 并通过 (filter_tx, recv_rx) 投递到 command worker 当中执行。command worker 在执行完 Task 后将结果通过 (done_tx, done_rx) 反馈到冲突检测队列中，并更新队列中依赖图中的顶点信息。

      状态是如何转换的

      diff --git a/zh-cn/assets/index-f6182a9f.js b/zh-cn/assets/index-af83501f.js similarity index 96% rename from zh-cn/assets/index-f6182a9f.js rename to zh-cn/assets/index-af83501f.js index e8e89c3..e10ccf2 100644 --- a/zh-cn/assets/index-f6182a9f.js +++ b/zh-cn/assets/index-af83501f.js @@ -1,4 +1,4 @@ -const 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      2022 年 12 月 16 日，达坦科技联合 SpinalHDL 社区，举办了 SpinalHDL Webinar 2022。在题为《SpinalHDL 应用前景探索》的线上研讨会上，九位分享人在三个讨论分主题下做了各自领域内应用 Spinal HDL 的实践、挑战和经验的分享。

      +const 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pGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhYUpGJIWVCQiiFlQUEqhpQFBakYUhZWvaBirCXSG3n8ufPXCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVCyoMCFQvqDAgUL2gwoBA9YIKAwLVS6Iw4uPRSBmgkTJAI2WARsoAjZQBGikDNFIGaKQM0EgZoJEyQCNlgEbKAI2UARopAzRSBmikDNBIGaCRMkAjZYBGygCNlAEaKQM0UgZopAzQSBmgkTJAI2WARsoAjZQBGikDNFIGaKQM0EgZoJEyQCNlgEbKAI2UARopAzRSBmikDNBIGaCRMkAjZYBGygCNlAEaKQM0UgZopAzQSBmgkTJAI2WARsoAjZQBGikDNFIGaKQM0EgZoJEyQCNlgEbKAI2UARopAzRSBmikDNBIGaCRMkAjZYBGygCNlAEaKQPSjKSpM6hXI2mkfLGuVCNpJB9YV6qRNJIPrCvVSBrJB9aVaiSN5APrSjWSRvKBdaUaSSP5wLpSjaSRfGBdqUbSSD6wrlQjaSQfWFeqkTSSD6wr1UgayQfWlWokjeQD60o1kkbygXWlGkkj+cC6Uo2kkXxgXalG0kg+sK5UI2kkH1hXqpE0kg+sK9VIGskH1pVqJI3kA+tKNZJG8oF1pRpJI/nAulKNpJF8YF2pRtJIPrCuVCNpJB9YV6qRNJIPrCvVSBrJB9aVaiSN5APrSjWSRvKBdaUaSSP5wLpSjaSRfGBdqUbSSD6wrlQjaSQfWFfqvF4SDkeS0adFyVoivZFDJWuJ9EYOlawl0hs5VLKWSG/kUMlaIr2RQyVrifRGDpWsJdIbOVSylkhv5FDJWiK9kUMla4n0Rg6VrCXSGzlUspZIb+RQyVoivZFDJWuJ9EYOlawl0hs5VLKWSG/kUMlaIr2RQyVrifRGDpWsJdIbOVSylkhv5FDJWiK9kUMla4n0Rg6VrCXSGzlUspZIb+RQyVoivZFDJWuJ9EYOlawl0hs5VLKWSG/kUMlaIr2RQyVrifRGDpWsJdIbOVSylkhv5FDJWiK9kUMla4n0Rg6VrCXSGzlUspZIb+RQyVoivZFDJWuJ9EYOlawl0hs5VLKWSG/kUMlaIr2RQyVrifRGDpWsJdIbOVSylkhv5FDJWiK9kUMla4n0Rg6VrCXSGzlUspZIb+RQyVoivZFDJWuJ9EYOlawl0hs5VLKWSG/kUMlaIr2RQyVrifRGDpWsJdIbOVSylkhv5FDJWiK9kUMla4n0Rg6VrCXSGzlUspZIb+RQyVoivZFDJWuJ9EYOlawl0hs5VLKWSG/kUMlaIr2RQyVrifRGDpWsJdIbOVSylkhv5FDJWiK9kRBCCCGEEEJYUKlaJxD/nbjIKusc4j8yEJcZvOO0Vg8hNJpD/cfh5cOR1mitGlqNodBohhCKFTzbSM3aN0tijKtjjGvuifHO4/rYQGiM3xtCaK9dVxZFUYbhZrn+vuZga8NEaAzeH0K5cVOolWVs3f6i4bvvmrXy3+6ilc0PWAtnyGSMlf5QW7bG+OCdF7bVi6KMRas6PLW9fGh6R9kZeric2Tk7u2vDRL1obCqKslm0a+WO3Y/M7Vr6muKze+78FrVy79S/PF1l335r4wx5dPlmN//YgYE770Wfe3zj2LZup3OwLOfLhxaqZadelLHd2/rEkxPhqUNPP/P58gvT08+Wew8/F4+Eeoy9UCnLgdCOsRF6sV40l0ZqxNjuH8T+paiRVsDY0kbPL77pLR03y0oIlfrDIYSdX/xS2SyKsjN0tDz2wsjx4f7tbn59WRSjxeIOoydOzn9539ypavli5ytx/UvDT/bKlydaL4f+xV7xxJrG6V751PavFo/eFyY00v/OwuI4Z2Lsz9WOjaXzVw6/2ov7FraGUNvytaXbXSxHxk6+tmXD1xuV+ODBo51vfHN6ob9DfH3b7AOt0dXV8uyB4VgbLV6aLbrn2tu/1b/YGjh/aGDsZPHGsfnq9Lfb6zTSChhdvt+FGE+9efvVw0jthcrajVOPLIRWfbIcjkXZGWmWFx6bG1zVnOpNbe0cG90Wv/Pd/m9Stbi4Ie55tnm+Wp7dPDz3xsaN3QNFJ1TeunRrpMtvh+b39hfd+dabZ/Q3aWVMxrv5/uLxyMiu9os/CNV3muXl3We75394vlu/VM6sGjq8a+eVq4cOXg2T5eW9p2rljl3Ndmc8/OhaZTpULl6rVX5cbYRef6RXLpXP7Am95oVa8ZNzRSeMtO7pFRppRbx790inbx1WY/3di2smq5PPzx396duHFz/zZ+XM7PWrW8cuTDbGbwwXe1Y92n8JPjr086u1hVqjMh0a7YU9c+OjjV8sj1SW5fy1+ebaK+8VnRCO99oN/U1aEfH60C/3377pxfFbh63B1b8ajEUcnXrvyP560acexsuZ2RBaGyaG48njtV//5vHntgze7HbfPzEbNp/Ze2M6hHUzJ8Jvn77yu6Hfd0J49YOb3W63e/qDP3x4LvQPBrZf+eNujbQSbv0rc3B5o7eWTo+cW/v6n2amr3x4ZCiE+zt9/hxmu7MhhI8mwl/e3/fXGzfDa/f+zTr9p4rll+IDSx9PDnzMJw1s6p/OD916P/zzUXxCDH10/e9n34kJvpP4P6PfDCGEEEIIIYQQQgjxCfAPIJnMJCqASFsAAAAASUVORK5CYII=",o="/zh-cn/assets/image5-184dc93a.png",r="/zh-cn/assets/image6-18c75b26.jpg",n="/zh-cn/assets/image7-6a4a9bfe.png",t="/zh-cn/assets/image8-1849dbeb.png",s="/zh-cn/assets/image9-14a6fe14.jpg",g="/zh-cn/assets/image5-6a5e807d.png",p=[e,i,a,A,o,r,n,t,s,g],l={label:"精彩回顾 l SpinalHDL应用前景探索线上研讨会",description:"2022年12月16日，达坦科技联合SpinalHDL社区，举办了SpinalHDL Webinar 2022。在题为《SpinalHDL应用前景探索》的线上研讨会上，九位分享人在三个讨论分主题下做了各自领域内应用Spinal HDL的实践、挑战和经验的分享。",location:"中国香港",date:"2022-12-12",title:"SpinalHDL Application Prospect Exploration Online Seminar"},h=[{label:"数据通路加速",level:2},{label:"复杂系统设计案例",level:2},{label:"硬件设计流程",level:2},{label:"推荐阅读",level:2}],c=`

      2022 年 12 月 16 日，达坦科技联合 SpinalHDL 社区，举办了 SpinalHDL Webinar 2022。在题为《SpinalHDL 应用前景探索》的线上研讨会上，九位分享人在三个讨论分主题下做了各自领域内应用 Spinal HDL 的实践、挑战和经验的分享。

      数据通路加速

      图片

      分享人：Tianrui Li

      @@ -10,34 +10,34 @@ const e="/zh-cn/assets/image1-b974e0d0.png",i="/zh-cn/assets/image2-599a44cc.jpg

      演讲主题: Utilizing SpinalHDL to Accelerate Neuroscience

      演讲摘要: This presentation covers how LeafLabs leverages SpinalHDL to enable the rapid development of a devices used for Neuroscience research ranging from mixed-signal Electrophysiology ASICs to FPGA based designs for system control and USB3 connectivity.

      -

      图片

      +

      图片

      分享人：Teilraum

      演讲主题: A Network Attached Deep Learning Accelerator for FPGA Clusters

      演讲摘要: This presentation introduces a Layer parallel framework for DNN training on an FPGA cluster. All hardware description is done using SpinalHDL. It gives an overview of approaches and examples where SpinalHDL came in handy.

      复杂系统设计案例

      -

      图片

      +

      图片

      分享人：Saahm

      演讲主题: SpinalHDL in Computer Architecture Research. A) MicroRV32 Platform and B) FPGA-based Heterogeneous Real-Time Systems with RISC-V

      演讲摘要: The presentation covers two topics in which SpinalHDL aided in the Research of Computer Architecture. MicroRV32 is a RISC-V SoC Platform built with SpinalHDL for research and education aligned along a RISC-V Virtual Prototype in SystemC TLM. The second topic covers a topic on Task Mapping and Scheduling in FPGA-based Heterogeneous Real-time Systems. There the VexRiscv-based Murax SoC was used on an FPGA as a Heterogeneous Real-time System for a Case-Study.

      -

      图片

      +

      图片

      分享人：Distributed

      演讲主题: Title: Coding a microprogrammed protocol receiver in SpinalHDL

      演讲摘要: This presentation introduces a microcode-like approach to coding a communications protocol receiver used in flying, handheld and stationary 3D scanners. Decoding the protocol in random logic leads to unattractively high resource usage. Therefore, a microprogrammed approach was chosen where data out of preprogrammed memories controls the rather regularly organized data path. The talk highlights the construction of the microinstructions and their physical representation, showing how code evaluated at Scala runtime can be elegantly intertwined with Spinal code representing hardware.

      -

      图片

      +

      图片

      分享人：Dolu1990

      演讲主题: NaxRiscv : A Pipeline / Plugins / SpinalHDL / Scala mix

      演讲摘要: This presentation / live demo shows how the NaxRiscv project (Out-of-order / superscalar RISC-V CPU) mix Scala and the SpinalHDL API to describe its hardware. By many aspect, it goes beyond the VexRiscv project, and should provide some usefull / interresting design patterns for the public.

      硬件设计流程

      -

      图片

      +

      图片

      分享人：Readon

      演讲主题: Recent progress on formal verification support on SpinalHDL

      演讲摘要: The formal verification is a technology to verify design, which helps to find the corner cases. SpinalHDL have provided an integration of this tech with SymbiYosys easily. The brief introduction on how to verify a design would be presented by example. Some new build blocks helping to simplify the verification process would be introduced. At last, a short overview of the verification of some facilities in SpinalHDL's lib would also be summarized.

      -

      图片

      +

      图片

      分享人：Sebastien-riou

      演讲主题: SpinalHDL for ASIC

      演讲摘要: The presentation is a highlights of a ASIC done entirely in SpinalHDL, fabricated in GF22FDX. Focus on pads, RAMs and FPGA for ASIC verification.

      @@ -53,4 +53,4 @@ const e="/zh-cn/assets/image1-b974e0d0.png",i="/zh-cn/assets/image2-599a44cc.jpg https://github.com/datenlord/TRIDENT

      推荐阅读

      万字长文，详述 TRIDENT: Poseidon 哈希算法的硬件加速与实现！

      -

      精彩回顾｜硬件敏捷开发与验证方法学研讨

      `;export{p as assetURLs,h as default,l as metadata,C as toc}; +

      精彩回顾｜硬件敏捷开发与验证方法学研讨

      `;export{p as assetURLs,c as default,l as metadata,h as toc}; diff --git a/zh-cn/assets/index-50ad21f0.js b/zh-cn/assets/index-b5bb516b.js similarity index 93% rename from zh-cn/assets/index-50ad21f0.js rename to zh-cn/assets/index-b5bb516b.js index b5a596d..93c613d 100644 --- a/zh-cn/assets/index-50ad21f0.js +++ b/zh-cn/assets/index-b5bb516b.js @@ -1,4 +1,4 @@ -const e="/zh-cn/assets/cover-2326b9d3.jpg",t="/zh-cn/assets/image1-62ba36d5.png",i="/zh-cn/assets/image2-238eb6f5.jpg",l="/zh-cn/assets/image3-9644e0b1.png",s=[e,t,i,l],a={label:"MIT体系结构公开课学习社区2.0版正式上线啦～",description:"随着芯片技术自主可控成为国家重要的战略发展规划，对芯片设计相关领域的人才需求也在快速增长。体系结构课程相对于硬件设计的重要性可以类比于设计模式相对于软件设计的重要性，扎实的体系结构基础是设计复杂硬件的基石。然而现实情况是，虽然国内大专院校计算机学科、电子工程学科、微电子等都有开设体系结构或组成原理等相关课程，但由于前些年对相关教学重视度不够，导致教学实践环节存在诸多缺失，毕业生掌握的技能与工业界的期望之间存在较大差距。由此，在2023年伊始，达坦科技发起成立了MIT体系结构公开课学习社区，邀请所有对硬件敏捷开发设计感兴趣的同学加入我们，组成拥有共同学习目标的互助自学小组，一起系统地学习计算机体系结构相关知识，并且通过动手项目来验证学习的成果。",cover:"./cover.jpg",location:"中国香港",date:"2023-12-14",title:"MIT Architecture Open Course Learning Community Version 2.0 is officially launched~"},c=[{label:"为什么要发起设立 MIT 体系结构公开课学习社区？",level:2},{label:"学习社区运营十个月有什么成果？",level:2},{label:"为什么要升级 MIT 体系结构公开课学习社区 2.0 版？",level:2},{label:"MIT 体系结构公开课学习社区 2.0 版有什么改进？",level:2},{label:"欢迎报名",level:2}],n=`

      封面

      +const e="/zh-cn/assets/cover-2326b9d3.jpg",i="/zh-cn/assets/image1-62ba36d5.png",t="/zh-cn/assets/image2-238eb6f5.jpg",l="/zh-cn/assets/image3-9644e0b1.png",s=[e,i,t,l],a={label:"MIT体系结构公开课学习社区2.0版正式上线啦～",description:"随着芯片技术自主可控成为国家重要的战略发展规划，对芯片设计相关领域的人才需求也在快速增长。体系结构课程相对于硬件设计的重要性可以类比于设计模式相对于软件设计的重要性，扎实的体系结构基础是设计复杂硬件的基石。然而现实情况是，虽然国内大专院校计算机学科、电子工程学科、微电子等都有开设体系结构或组成原理等相关课程，但由于前些年对相关教学重视度不够，导致教学实践环节存在诸多缺失，毕业生掌握的技能与工业界的期望之间存在较大差距。由此，在2023年伊始，达坦科技发起成立了MIT体系结构公开课学习社区，邀请所有对硬件敏捷开发设计感兴趣的同学加入我们，组成拥有共同学习目标的互助自学小组，一起系统地学习计算机体系结构相关知识，并且通过动手项目来验证学习的成果。",cover:"./cover.jpg",location:"中国香港",date:"2023-12-14",title:"MIT Architecture Open Course Learning Community Version 2.0 is officially launched~"},n=[{label:"为什么要发起设立 MIT 体系结构公开课学习社区？",level:2},{label:"学习社区运营十个月有什么成果？",level:2},{label:"为什么要升级 MIT 体系结构公开课学习社区 2.0 版？",level:2},{label:"MIT 体系结构公开课学习社区 2.0 版有什么改进？",level:2},{label:"欢迎报名",level:2}],c=`

      封面

      为什么要发起设立 MIT 体系结构公开课学习社区？

      随着芯片技术自主可控成为国家重要的战略发展规划，对芯片设计相关领域的人才需求也在快速增长。体系结构课程相对于硬件设计的重要性可以类比于设计模式相对于软件设计的重要性，扎实的体系结构基础是设计复杂硬件的基石。然而现实情况是，虽然国内大专院校计算机学科、电子工程学科、微电子等都有开设体系结构或组成原理等相关课程，但由于前些年对相关教学重视度不够，导致教学实践环节存在诸多缺失，毕业生掌握的技能与工业界的期望之间存在较大差距。

      由此，在 2023 年伊始，达坦科技发起成立了 MIT 体系结构公开课学习社区，邀请所有对硬件敏捷开发设计感兴趣的同学加入我们，组成拥有共同学习目标的互助自学小组，一起系统地学习计算机体系结构相关知识，并且通过动手项目来验证学习的成果。

      @@ -20,7 +20,7 @@ const e="/zh-cn/assets/cover-2326b9d3.jpg",t="/zh-cn/assets/image1-62ba36d5.png"
      • 课程内容重新规划，现分为三个阶段：
      -

      封面

      +

      封面