From 4f18fd7f8b4d30455a69ee02e1aae1779c8750b3 Mon Sep 17 00:00:00 2001 From: davidly Date: Wed, 3 Jan 2024 13:34:02 -0800 Subject: [PATCH] fix disassembly of ld ix/iy, (aaaa) + cleanup --- x80.cxx | 4 +--- x80.hxx | 1 - 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/x80.cxx b/x80.cxx index 9ce1e02..45b7983 100644 --- a/x80.cxx +++ b/x80.cxx @@ -1430,7 +1430,7 @@ void z80_render( char * ac, uint8_t op, uint16_t address ) else if ( 0x26 == op2 ) sprintf( ac, "ld %sh, %02x", i, op3 ); else if ( 0x2a == op2 ) - sprintf( ac, "ld %s, %04xh", i, op34 ); + sprintf( ac, "ld %s, (%04xh)", i, op34 ); else if ( 0x2b == op2 ) sprintf( ac, "dec %s", i ); else if ( 0x2e == op2 ) @@ -1703,8 +1703,6 @@ not_inlined void x80_trace_state() uint8_t op3 = memory[ reg.pc + 2 ]; uint8_t op4 = memory[ reg.pc + 3 ]; -// tracer.Trace( "0x1bb9: %c%c%c%c -- 0x29b0: '%s'\n", memory[ 0x1bb9 ], memory[ 0x1bba ], memory[ 0x1bbb ], memory[ 0x1bbc ], & memory[ 0x29b0 ] ); - if ( reg.fZ80Mode ) tracer.Trace( "pc %04x, op %02x, op2 %02x, op3 %02x, op4 %02x, a %02x, B %04x, D %04x, H %04x, ix %04x, iy %04x, sp %04x, %s, %s\n", reg.pc, op, op2, op3, op4, reg.a, reg.B(), reg.D(), reg.H(), reg.ix, reg.iy, reg.sp, diff --git a/x80.hxx b/x80.hxx index 9fe71b8..e6f9822 100644 --- a/x80.hxx +++ b/x80.hxx @@ -10,7 +10,6 @@ #define OPCODE_JMP 0xC3 // jmp nn #define OPCODE_RET 0xC9 - const size_t reg_offsets[8] = { 1, 0, 3, 2, 5, 4, 8, 9 }; //bcdehlfa struct registers