diff --git a/.github/workflows/upload_indexhtml.yml b/.github/workflows/upload_indexhtml.yml index 15ad636b..7db24563 100644 --- a/.github/workflows/upload_indexhtml.yml +++ b/.github/workflows/upload_indexhtml.yml @@ -4,7 +4,7 @@ name: Deploy static content to Pages on: # Runs on pushes targeting the default branch push: - branches: ["main", "primitive_table_vis"] + branches: ["main"] # Allows you to run this workflow manually from the Actions tab workflow_dispatch: @@ -31,6 +31,30 @@ jobs: steps: - name: Checkout uses: actions/checkout@v3 + with: + token: ${{ secrets.GITHUB_TOKEN }} + - + name: 'Install packages for generator' + run: | + sudo apt-get update + sudo apt-get install graphviz-dev util-linux + - + name: Set up Python 3.11 + uses: actions/setup-python@v4 + with: + python-version: 3.11 + - + name: 'Install python dependencies for generator' + run: | + python -m pip install --upgrade pip + pip3 install ruff + if [ -f requirements.txt ]; then pip3 install -r requirements.txt; fi + - + name: Try generating the whole TSL with python ${{ matrix.python-version }} + id: generate + continue-on-error: true + run: | + python main.py --print-outputs-only - name: Setup Pages uses: actions/configure-pages@v3 - name: Upload artifact diff --git a/doc/media/tsl_logo_small.png b/doc/media/tsl_logo_small.png new file mode 100755 index 00000000..8bcd9bc9 Binary files /dev/null and b/doc/media/tsl_logo_small.png differ diff --git a/generator/config/default_conf.yaml b/generator/config/default_conf.yaml index 4e5edd73..071caff2 100644 --- a/generator/config/default_conf.yaml +++ b/generator/config/default_conf.yaml @@ -23,6 +23,10 @@ configuration: primitive_definitions: "definitions" silent_warnings: ["-Wno-ignored-attributes", "-Wno-attributes"] expansions: + primitive_vis: + enabled: True + template_path: "generator/config/generator/tsl_templates/expansions/primitive_table.template" + target_path: "./index.html" cmake: enabled: True minimum_version: "3.13" diff --git a/generator/config/generator/tsl_templates/expansions/primitive_table.template b/generator/config/generator/tsl_templates/expansions/primitive_table.template new file mode 100755 index 00000000..10b6802d --- /dev/null +++ b/generator/config/generator/tsl_templates/expansions/primitive_table.template @@ -0,0 +1,226 @@ + + + + + + + +
+
+ +
Check to filter by primitive category. If all are unchecked, no filters are applied.

---filterBoxes---
+
---content---
+
+ + + \ No newline at end of file diff --git a/generator/core/tsl_config.py b/generator/core/tsl_config.py index 9eba0894..349ee914 100644 --- a/generator/core/tsl_config.py +++ b/generator/core/tsl_config.py @@ -438,6 +438,7 @@ def parse_args(**kwargs) -> dict: help="", metavar="ExOutPath") parser.add_argument('--generate-readme-files', dest='configuration:expansions:readme_md:enabled', action="store_true", required=False, help="Add README.md generation step.") + parser.add_argument('--generate-index-html', dest='configuration:expansions:primitive_vis:enabled', action="store_false", required=False, help="Add README.md generation step.") parser.add_argument('--no-debug-info', dest='configuration:debug_generator', action='store_false', required=False) add_bool_arg(parser, 'workaround-warnings', 'configuration:emit_workaround_warnings', "Enable ", "Disable ", True, help='workaround warnings', required=False) diff --git a/generator/core/tsl_generator.py b/generator/core/tsl_generator.py index 6caea5bc..eaa6b015 100644 --- a/generator/core/tsl_generator.py +++ b/generator/core/tsl_generator.py @@ -3,6 +3,7 @@ from pathlib import Path from typing import List + from generator.core.ctrl.tsl_libfile_generator import TSLFileGenerator from generator.expansions.tsl_cmake import TSLCMakeGenerator from generator.core.ctrl.tsl_lib import TSLLib @@ -17,6 +18,7 @@ from generator.utils.log_utils import LogInit from generator.utils.requirement import requirement from generator.utils.yaml_utils import yaml_load, yaml_load_all, yaml_store +from parseForPrimitiveTable import create_primitive_index_html class TSLGenerator: @@ -188,6 +190,9 @@ def generate(self, relevant_hardware_flags: List[str] = None, relevant_primitive lib: TSLLib = TSLLib(relevant_extensions_set, relevant_primitives_class_set) + if config.expansion_enabled("primitive_vis"): + create_primitive_index_html(lib) + dep_graph = TSLDependencyGraph(lib) if not dep_graph.is_acyclic(): self.log(logging.ERROR, "Dependency graph for primitive definitions is not acyclic. Please check your dependencies.") diff --git a/index.html b/index.html new file mode 100644 index 00000000..7dc6fcec --- /dev/null +++ b/index.html @@ -0,0 +1,226 @@ + + + + + + + +
+
+ +
Check to filter by primitive category. If all are unchecked, no filters are applied.












+

Brief: Packs elements from a vector together using a fixed bitwidth.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
+
-
-
int8_t
-
-
-
-
+
+
-
-
uint16_t
-
-
-
-
+
+
-
-
int16_t
-
-
-
-
+
+
-
-
uint32_t
-
-
-
-
+
+
-
-
int32_t
-
-
-
-
+
+
-
-
uint64_t
-
-
-
-
+
+
-
-
int64_t
-
-
-
-
+
+
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Packs elements from a vector together using a fixed bitwidth.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
+
-
-
int8_t
-
-
-
-
+
+
-
-
uint16_t
-
-
-
-
+
+
-
-
int16_t
-
-
-
-
+
+
-
-
uint32_t
-
-
-
-
+
+
-
-
int32_t
-
-
-
-
+
+
-
-
uint64_t
-
-
-
-
+
+
-
-
int64_t
-
-
-
-
+
+
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
+
-
-
int8_t
-
-
-
-
+
+
-
-
uint16_t
-
-
-
-
+
+
-
-
int16_t
-
-
-
-
+
+
-
-
uint32_t
-
-
-
-
+
+
-
-
int32_t
-
-
-
-
+
+
-
-
uint64_t
-
-
-
-
+
+
-
-
int64_t
-
-
-
-
+
+
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
+
-
-
int8_t
-
-
-
-
+
+
-
-
uint16_t
-
-
-
-
+
+
-
-
int16_t
-
-
-
-
+
+
-
-
uint32_t
-
-
-
-
+
+
-
-
int32_t
-
-
-
-
+
+
-
-
uint64_t
-
-
-
-
+
+
-
-
int64_t
-
-
-
-
+
+
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Adds two vector registers.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
+
+
+
+
+
+
int8_t
+
+
+
+
+
+
+
+
uint16_t
+
+
+
+
+
+
+
+
int16_t
+
+
+
+
+
+
+
+
uint32_t
+
+
+
+
+
+
+
+
int32_t
+
+
+
+
+
+
+
+
uint64_t
+
+
+
+
+
+
+
+
int64_t
+
+
+
+
+
+
+
+
float
+
+
+
+
+
+
+
+
double
+
+
+
+
+
+
+
+

Brief: Subtracts two vector registers.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
+
+
+
+
+
+
int8_t
+
+
+
+
+
+
+
+
uint16_t
+
+
+
+
+
+
+
+
int16_t
+
+
+
+
+
+
+
+
uint32_t
+
+
+
+
+
+
+
+
int32_t
+
+
+
+
+
+
+
+
uint64_t
+
+
+
+
+
+
+
+
int64_t
+
+
+
+
+
+
+
+
float
+
+
+
+
+
+
+
+
double
+
+
+
+
+
+
+
+

Brief: Adds two vector registers, depending on a mask: result[*] = (m[*])? vec_a[*]+vec_b[*] : vec_a[*].

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
-
-
-
+
+
int8_t
+
-
-
-
-
-
+
+
uint16_t
+
-
-
-
-
-
+
+
int16_t
+
-
-
-
-
-
+
+
uint32_t
+
-
-
-
-
-
+
+
int32_t
+
-
-
-
-
-
+
+
uint64_t
+
-
-
-
-
-
+
+
int64_t
+
-
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Multiplies two vector registers.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Reduces the elements to a sum.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: compares the values of 2 vectors and returns a vector with the minimum of each corrisponding values

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
-
+
+
+
-
int64_t
+
+
-
-
+
+
+
-
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Divides two vector registers.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
-
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Operates the modulo operation on one datavector modulo one input value.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
-
+
+
+
+
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Reduces the elements to the maximum value.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
+
-
-
int8_t
-
-
-
-
+
+
-
-
uint16_t
-
-
-
-
+
+
-
-
int16_t
-
-
-
-
+
+
-
-
uint32_t
-
-
-
-
+
+
-
-
int32_t
-
-
-
-
+
+
-
-
uint64_t
-
-
-
-
+
+
-
-
int64_t
-
-
-
-
+
+
-
-
float
-
-
-
-
+
+
-
-
double
-
-
-
-
+
+
-
-

Brief: Reduces the elements to the maximum value.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
+
-
-
int8_t
-
-
-
-
+
+
-
-
uint16_t
-
-
-
-
+
+
-
-
int16_t
-
-
-
-
+
+
-
-
uint32_t
-
-
-
-
+
+
-
-
int32_t
-
-
-
-
+
+
-
-
uint64_t
-
-
-
-
+
+
-
-
int64_t
-
-
-
-
+
+
-
-
float
-
-
-
-
+
+
-
-
double
-
-
-
-
+
+
-
-

Brief: Forms an integral value from the most significant bits of every lane in a vector mask register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
+
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Forms an vector register from an integral where all bits are set in a lane if the corresponding mask bit is set to 1.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
-
+
int8_t
+
+
-
-
+
+
-
+
uint16_t
+
+
-
-
+
+
-
+
int16_t
+
+
-
-
+
+
-
+
uint32_t
+
+
-
-
+
+
-
+
int32_t
+
+
-
-
+
+
-
+
uint64_t
+
+
-
-
+
+
-
+
int64_t
+
+
-
+
+
+
-
+
float
+
+
-
-
+
+
-
+
double
+
+
-
-
+
+
-
+

Brief: Forms a mask type from an integral.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Binary NOT of a vector integral mask type.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
-
int8_t
+
+
-
-
-
-
-
-
uint16_t
+
+
-
-
-
-
-
-
int16_t
+
+
-
-
-
-
-
-
uint32_t
+
+
-
-
-
-
-
-
int32_t
+
+
-
-
-
-
-
-
uint64_t
+
+
-
-
-
-
-
-
int64_t
+
+
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Binary NOT of a vector mask type.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
-
int8_t
+
+
-
-
-
-
-
-
uint16_t
+
+
-
-
-
-
-
-
int16_t
+
+
-
-
-
-
-
-
uint32_t
+
+
-
-
-
-
-
-
int32_t
+
+
-
-
-
-
-
-
uint64_t
+
+
-
-
-
-
-
-
int64_t
+
+
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Binary AND of two vector mask types.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
-
-
-
+
int8_t
+
+
-
+
-
-
-
+
uint16_t
+
+
-
+
-
-
-
+
int16_t
+
+
-
+
-
-
-
+
uint32_t
+
+
-
+
-
-
-
+
int32_t
+
+
-
+
-
-
-
+
uint64_t
+
+
-
+
-
-
-
+
int64_t
+
+
-
+
-
-
-
+
float
+
+
-
+
-
-
-
+
double
+
+
-
+
-
-
-
+

Brief: Binary AND of two vector integral mask types.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
+
-
-
-
+
int8_t
+
-
-
+
-
-
-
+
uint16_t
+
-
-
+
-
-
-
+
int16_t
+
-
-
+
-
-
-
+
uint32_t
+
-
-
+
-
-
-
+
int32_t
+
-
-
+
-
-
-
+
uint64_t
+
-
-
+
-
-
-
+
int64_t
+
-
-
+
-
-
-
+
float
+
-
-
+
-
-
-
+
double
+
-
-
+
-
-
-
+

Brief: Binary OR of two vector mask types.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
-
-
-
+
int8_t
+
+
-
+
-
-
-
+
uint16_t
+
+
-
+
-
-
-
+
int16_t
+
+
-
+
-
-
-
+
uint32_t
+
+
-
+
-
-
-
+
int32_t
+
+
-
+
-
-
-
+
uint64_t
+
+
-
+
-
-
-
+
int64_t
+
+
-
+
-
-
-
+
float
+
+
-
+
-
-
-
+
double
+
+
-
+
-
-
-
+

Brief: Binary OR of two vector integral mask types.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
+
-
-
-
+
int8_t
+
-
-
+
-
-
-
+
uint16_t
+
-
-
+
-
-
-
+
int16_t
+
-
-
+
-
-
-
+
uint32_t
+
-
-
+
-
-
-
+
int32_t
+
-
-
+
-
-
-
+
uint64_t
+
-
-
+
-
-
-
+
int64_t
+
-
-
+
-
-
-
+
float
+
-
-
+
-
-
-
+
double
+
-
-
+
-
-
-
+

Brief: Binary XOR of two vector mask types.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
-
-
-
+
int8_t
+
+
-
+
-
-
-
+
uint16_t
+
+
-
+
-
-
-
+
int16_t
+
+
-
+
-
-
-
+
uint32_t
+
+
-
+
-
-
-
+
int32_t
+
+
-
+
-
-
-
+
uint64_t
+
+
-
+
-
-
-
+
int64_t
+
+
-
+
-
-
-
+
float
+
+
-
+
-
-
-
+
double
+
+
-
+
-
-
-
+

Brief: Binary XOR of two vector integral mask types.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
+
-
-
-
+
int8_t
+
-
-
+
-
-
-
+
uint16_t
+
-
-
+
-
-
-
+
int16_t
+
-
-
+
-
-
-
+
uint32_t
+
-
-
+
-
-
-
+
int32_t
+
-
-
+
-
-
-
+
uint64_t
+
-
-
+
-
-
-
+
int64_t
+
-
-
+
-
-
-
+
float
+
-
-
+
-
-
-
+
double
+
-
-
+
-
-
-
+

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Loads data from memory to a mask.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
+
int8_t
+
+
-
-
-
-
-
+
uint16_t
+
+
-
-
-
-
-
+
int16_t
+
+
-
-
-
-
-
+
uint32_t
+
+
-
-
-
-
-
+
int32_t
+
+
-
-
-
-
-
+
uint64_t
+
+
-
-
-
-
-
+
int64_t
+
+
-
-
-
-
-
+
float
+
+
-
-
-
-
-
+
double
+
+
-
-
-
-
-
+

Brief: Compares two vector registers for equality.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
-
double
+
+
-
+
+
+
+
-

Brief: Compares two vector registers for equality.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
-
-
-
-
-
int8_t
+
-
-
-
-
-
-
-
uint16_t
+
-
-
-
-
-
-
-
int16_t
+
-
-
-
-
-
-
-
uint32_t
+
-
-
-
-
-
-
-
int32_t
+
-
-
-
-
-
-
-
uint64_t
+
-
-
-
-
-
-
-
int64_t
+
-
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Compares two vector registers for inequality.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
-
+
+
+
+
float
+
+
-
-
+
+
+
-
double
+
+
-
-
+
+
+
-

Brief: Checks if the values of a vector are in a specific range (min[*] <= d[*] <= max[*]).

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
+
+
-
int8_t
-
-
-
-
+
+
+
-
uint16_t
-
-
-
-
+
+
+
-
int16_t
-
-
-
-
+
+
+
-
uint32_t
-
-
-
-
+
+
+
-
int32_t
-
-
-
-
+
+
+
-
uint64_t
-
-
-
-
+
+
+
-
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
-
+
+
+
+
double
+
+
-
-
+
+
+
+

Brief: Tests whether left elements are smaller than the corresponding right ones.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Tests whether left elements are larger than or equal to the corresponding right ones.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Tests whether left elements are smaller than or equal to the corresponding right ones.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Tests whether left elements are larger than the corresponding right ones.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Checks if the vector register contains at least one value unequal zero.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Counts number of matches of a chosen value within a vector register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Binary ANDs two vector registers.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
-
-
+
+
double
+
+
-
+
-
-
+
+

Brief: Binary ANDs two vector registers.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
-
-
+
+
double
+
+
-
+
-
-
+
+

Brief: Binary XORs two vector registers.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
-
-
+
+
double
+
+
-
+
-
-
+
+

Brief: Arithmetic shift of data to the left by n bits.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
+
+
+
+
-
int8_t
-
-
-
+
+
+
+
-
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
-
-
-
+
-
-
-
-
double
-
-
-
+
-
-
-
-

Brief: Shifts data to left by n bits (shifting in 0).

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
+
+
+
+
-
int8_t
-
-
-
+
+
+
+
-
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Arithmetic shift of data to the right by n bits.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
+
+
+
+
-
int8_t
-
-
-
+
+
+
+
-
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Arithmetic shift of data to the right by n bits.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
+
+
+
+
-
int8_t
-
-
-
+
+
+
+
-
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Leading zeros counter.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
+
-
-
-
int8_t
-
-
-
-
+
-
-
-
uint16_t
-
-
-
-
+
-
-
-
int16_t
-
-
-
-
+
-
-
-
uint32_t
+
+
-
-
+
+
-
+
int32_t
+
+
-
-
+
+
-
+
uint64_t
+
+
-
-
+
-
-
+
int64_t
+
+
-
-
+
-
-
+
float
-
-
-
-
+
+
-
-
double
-
-
-
-
+
-
-
-

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Operates horizontal OR on vector register

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
-
+
+
+
+
float
+
+
-
-
+
+
+
+
double
+
+
-
-
+
+
+
+

Brief: Bitwise invertion values in vector Register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
-
+
+
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
+
+
+
+
double
+
+
-
-
+
+
+
+

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
-
-
-
-
+
int8_t
+
-
-
-
-
-
-
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
-
-
-
-
int8_t
-
-
-
-
-
-
-
-
uint16_t
-
-
-
-
-
-
-
-
int16_t
-
-
-
-
-
-
-
-
uint32_t
-
+
-
-
-
-
-
-
int32_t
-
+
-
-
-
-
-
-
uint64_t
-
-
-
-
-
-
-
-
int64_t
-
-
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
-
-
-
-
int8_t
-
-
-
-
-
-
-
-
uint16_t
-
-
-
-
-
-
-
-
int16_t
-
-
-
-
-
-
-
-
uint32_t
+
-
-
-
-
-
-
-
int32_t
+
-
-
-
-
-
-
-
uint64_t
-
-
-
-
-
-
-
-
int64_t
-
-
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
-
-
-
-
+
int8_t
+
-
-
-
-
-
-
+
uint16_t
+
-
-
-
-
-
-
+
int16_t
+
-
-
-
-
-
-
+
uint32_t
+
-
-
-
-
-
-
+
int32_t
+
-
-
-
-
-
-
+
uint64_t
+
-
-
-
-
-
-
-
int64_t
+
-
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
-
-
-
-
int8_t
-
-
-
-
-
-
-
-
uint16_t
-
-
-
-
-
-
-
-
int16_t
-
-
-
-
-
-
-
-
uint32_t
+
-
-
-
-
-
-
-
int32_t
+
-
-
-
-
-
-
-
uint64_t
+
-
-
-
-
-
-
-
int64_t
+
-
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Loads data from aligned memory into a vector register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
+
int8_t
+
+
-
-
-
-
-
+
uint16_t
+
+
-
-
-
-
-
+
int16_t
+
+
-
-
-
-
-
+
uint32_t
+
+
-
-
-
-
-
+
int32_t
+
+
-
-
-
-
-
+
uint64_t
+
+
-
-
-
-
-
+
int64_t
+
+
-
+
-
-
-
+
float
+
+
-
-
-
-
-
+
double
+
+
-
-
-
-
-
+

Brief: Allocates (unaligned) contiguous memory.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Allocates aligned contiguous memory.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Deallocates (possibly aligned) contiguous memory.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Copy memory.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Checks whether all elements are unique in a register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Checks whether all elements are unique in a register and returns a mask indicating which elements don't have preceeding conflicts.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Blends two registers using provided bitmask.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
+
int8_t
+
+
-
-
-
-
-
+
uint16_t
+
+
-
-
-
-
-
+
int16_t
+
+
-
-
-
-
-
+
uint32_t
+
+
-
-
-
-
-
+
int32_t
+
+
-
-
-
-
-
+
uint64_t
+
+
-
-
-
-
-
+
int64_t
+
+
-
-
-
-
-
+
float
+
+
-
-
-
-
-
+
double
+
+
-
-
-
-
-
+

Brief: Blends or add two registers using provided bitmask

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
-
int8_t
+
+
-
-
-
-
-
-
uint16_t
+
+
-
-
-
-
-
-
int16_t
+
+
-
-
-
-
-
-
uint32_t
+
+
-
-
-
-
-
-
int32_t
+
+
-
-
-
-
-
-
uint64_t
+
+
-
-
-
-
-
-
int64_t
+
+
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Returns a vector register with undefined data inside.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
+
int8_t
+
+
-
-
-
-
-
+
uint16_t
+
+
-
-
-
-
-
+
int16_t
+
+
-
-
-
-
-
+
uint32_t
+
+
-
-
-
-
-
+
int32_t
+
+
-
-
-
-
-
+
uint64_t
+
+
-
-
-
-
-
+
int64_t
+
+
-
-
-
-
-
+
float
+
+
-
-
-
-
-
+
double
+
+
-
-
-
-
-
+

Brief: Loads data from aligned memory into a vector register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
-
+
+
+
+
double
+
+
-
-
+
+
+
+

Brief: Loads data from (un)aligned memory into a vector register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Stores data from a vector register to aligned memory.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
-
+
+
+
+
double
+
+
-
-
+
+
+
+

Brief: Stores data from a vector register to (un)aligned memory.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
-
+
+
+
+
double
+
+
-
-
+
+
+
+

Brief: Stores SIMD register to array.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Broadcasts a single value into all lanes of a vector register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
+
+
+
+
+
int8_t
+
+
-
+
+
+
+
+
uint16_t
+
+
-
+
+
+
+
+
int16_t
+
+
-
+
+
+
+
+
uint32_t
+
+
-
+
+
+
+
+
int32_t
+
+
-
+
+
+
+
+
uint64_t
+
+
-
+
+
+
+
+
int64_t
+
+
-
+
+
+
+
+
float
+
+
-
+
+
+
+
+
double
+
+
-
+
+
+
+
+

Brief: Set all lanes to zero.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
+
+
+
+
int8_t
+
+
-
-
+
+
+
+
uint16_t
+
+
-
-
+
+
+
+
int16_t
+
+
-
-
+
+
+
+
uint32_t
+
+
-
-
+
+
+
+
int32_t
+
+
-
-
+
+
+
+
uint64_t
+
+
-
-
+
+
+
+
int64_t
+
+
-
-
+
+
+
+
float
+
+
-
-
+
+
+
+
double
+
+
-
-
+
+
+
+

Brief: Transfers provided elements into a vector register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Creates a sequence [0..SIMD-Reg-Element-Count].

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Creates a sequence.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Transfers data from arbitrary locations into a vector register.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
-
-
+
+
int8_t
-
-
-
-
-
-
+
+
uint16_t
-
-
-
-
-
-
+
+
int16_t
-
-
-
-
-
-
+
+
uint32_t
-
+
-
-
-
-
+
+
int32_t
-
+
-
-
-
-
+
+
uint64_t
-
+
-
-
-
-
+
+
int64_t
-
+
-
+
-
-
+
+
float
-
+
-
-
-
-
+
+
double
-
+
-
-
-
-
+
+

Brief: If mask[i] is 1, load memory[index[i] * scale], otherwise use source[i]

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
-
-
-
-
-
-
+
+
int8_t
-
-
-
-
-
-
+
+
uint16_t
-
-
-
-
-
-
+
+
int16_t
-
-
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
+
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Transfers data from a vector register to an arbitrary locations.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
+
-
-
+
+
int8_t
+
-
-
+
-
-
+
+
uint16_t
+
-
-
+
-
-
+
+
int16_t
+
-
-
+
-
-
+
+
uint32_t
+
+
-
+
-
-
+
+
int32_t
+
+
-
+
-
-
+
+
uint64_t
+
+
-
+
-
-
+
+
int64_t
+
+
-
+
-
-
+
+
float
+
+
-
+
-
-
+
+
double
+
+
-
+
-
-
+
+

Brief: Transfers data from a vector register to an arbitrary locations.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
+
-
-
+
+
int8_t
+
-
-
+
-
-
+
+
uint16_t
+
-
-
+
-
-
+
+
int16_t
+
-
-
+
-
-
+
+
uint32_t
+
+
-
+
-
-
+
+
int32_t
+
+
-
+
-
-
+
+
uint64_t
+
+
-
+
-
-
+
+
int64_t
+
+
-
+
-
-
+
+
float
+
+
-
+
-
-
+
+
double
+
+
-
+
-
-
+
+

Brief: Stores elements from data consecutively, if the corresponding bit in mask is set to 1.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Loads contiguos data from a specified memory location and puts the elements using write mask.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
-
-
int8_t
+
+
-
-
-
-
-
-
uint16_t
+
+
-
-
-
-
-
-
int16_t
+
+
-
-
-
-
-
-
uint32_t
+
+
-
-
-
-
-
-
int32_t
+
+
-
-
-
-
-
-
uint64_t
+
+
-
-
-
-
-
-
int64_t
+
+
-
-
-
-
-
-
float
+
+
-
-
-
-
-
-
double
+
+
-
-
-
-
-
-

Brief:

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
-
-
-
-
-
-
-
int8_t
+
-
-
-
-
-
-
-
uint16_t
+
-
-
-
-
-
-
-
int16_t
+
-
-
-
-
-
-
-
uint32_t
+
-
-
-
-
-
-
-
int32_t
+
-
-
-
-
-
-
-
uint64_t
-
-
-
-
-
-
-
-
int64_t
-
-
-
-
-
-
-
-
float
-
-
-
-
-
-
-
-
double
-
-
-
-
-
-
-
-

Brief: Partially override a Vector with a single value.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Copy elements from a vector, where the mask bit it set, otherwise write zero

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Merge two vectors while picking the source of each element based on the corresponding mask bit

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

Brief: Extracts value on given index.

avx2avx512cudaneononeAPIfpgaoneAPIfpgaRTLscalarsse
uint8_t
+
+
-
-
-
-
+
+
int8_t
+
+
-
-
-
-
+
+
uint16_t
+
+
-
-
-
-
+
+
int16_t
+
+
-
-
-
-
+
+
uint32_t
+
+
-
-
-
-
+
+
int32_t
+
+
-
-
-
-
+
+
uint64_t
+
+
-
-
-
-
+
+
int64_t
+
+
-
-
-
-
+
+
float
+
+
-
-
-
-
+
+
double
+
+
-
-
-
-
+
+

+
+ + + \ No newline at end of file diff --git a/main.py b/main.py index 93e3d1c5..72a3bf35 100755 --- a/main.py +++ b/main.py @@ -29,6 +29,7 @@ def tsl_setup(file_config, additional_config=None) -> None: file_config = get_config(Path("generator/config/default_conf.yaml")) args_dict = parse_args(known_types = file_config["configuration"]["relevant_types"]) tsl_setup(file_config, args_dict) + gen = TSLGenerator() if config.get_config_entry("clean"): diff --git a/parseForPrimitiveTable.py b/parseForPrimitiveTable.py new file mode 100644 index 00000000..e2512274 --- /dev/null +++ b/parseForPrimitiveTable.py @@ -0,0 +1,173 @@ +from pathlib import Path +import copy +import os +import sys +from typing import List + +from generator.core.tsl_config import config, parse_args +from generator.utils.dict_utils import dict_update +from generator.utils.yaml_utils import yaml_load +from generator.utils.yaml_utils import yaml_load_all +from generator.core.ctrl.tsl_lib import TSLLib + +class PrintablePrimitive: + def __init__(self, name: str, description: str, ctype_to_extension_dict: dict ) -> None: + self.name = name + self.description = description + self.ctype_to_extension_dict = ctype_to_extension_dict + pass + + def __repr__(self) -> str: + return f"{self.name}: {self.ctype_to_extension_dict}" + + def to_html(self, considered_types: list, considered_exts: list) -> str: + primitive_button = f"""
""" + primitive_table_start = f"""

Brief: {self.description}

""" + primitive_table_end = """

""" + + top_left_corner = """""" + ext_avail = """
+
""" + ext_not_avail = """
-
""" + + rows = [] + header = """""" + top_left_corner + for ext in considered_exts: + header += f"""{ext}""" + header += """""" + rows.append(header) + + for ctype in considered_types: + row = f"""{ctype}""" + for ext in considered_exts: + if ext in self.ctype_to_extension_dict[ctype]: + row += ext_avail + else: + row += ext_not_avail + row += """""" + rows.append(row) + + html = primitive_button + primitive_table_start + "".join(rows) + primitive_table_end + return html + +def get_config(config_path: Path) -> dict: + return yaml_load(config_path) + +def get_functor_name( yaml_thingy: any ) -> str: + return yaml_thingy["functor_name"] if "functor_name" in yaml_thingy else yaml_thingy["primitive_name"] + +def extract_types( config ): + return config["configuration"]["relevant_types"] + +def extract_extensions( path_string: str ) -> list: + exts = [] + for file in Path( path_string ).rglob("*.yaml"): + yaml_contents = yaml_load(file) + exts.append( yaml_contents["extension_name"] ) + return exts + +def prepare_primitive_dict( all_types: list ) -> dict: + raw_type_dict = dict() + for type in all_types: + raw_type_dict[type] = set() + return raw_type_dict + +def make_list_if_necessary( var: any ) -> list: + if not isinstance( var, list ): + return [var] + return var + +def add_checkbox( name: str ) -> str: + return f"""
""" + +def create_primitive_index_html(tsl_lib: TSLLib) -> None: + html_template_path = config.get_expansion_config("primitive_vis")["template_path"] + table_vis_file = open(config.get_expansion_config("primitive_vis")["target_path"], 'w') + + all_types: List[str] = config.relevant_types + all_extensions: List[str] = tsl_lib.extension_set.known_extensions + + html_content = "" + with open(html_template_path, 'r') as template: + html_content = template.read() + + raw_primitive_dict = prepare_primitive_dict(all_types) + checkbox_html = "" + primitive_html = "" + primitive_classes = [primitive_class for primitive_class in tsl_lib.primitive_class_set] + primitive_classes.sort(key=lambda primitive_class: primitive_class.name) + for primitive_class in sorted(tsl_lib.primitive_class_set, key=lambda primitive_class: primitive_class.name): + checkbox_html += add_checkbox(primitive_class.name) + primitive_html += f"""
""" + for primitive in primitive_class: + name = primitive.declaration.functor_name + brief_description = primitive.declaration.data["brief_description"] + detailed_description = primitive.declaration.data["detailed_description"] + ctype_ext_dict = copy.deepcopy(raw_primitive_dict) + for definition in primitive.definitions: + for target_extension, ctype_list in primitive.specialization_dict().items(): + for ctype in ctype_list: + ctype_ext_dict[ctype].add(target_extension) + pP = PrintablePrimitive(name, brief_description, ctype_ext_dict) + primitive_html += pP.to_html(all_types, all_extensions) + primitive_html += f"""
""" + html_content = html_content.replace("---filterBoxes---",checkbox_html) + html_content = html_content.replace("---content---",primitive_html) + + table_vis_file.write(html_content) + table_vis_file.close() + +if __name__ == '__main__': + def get_config(config_path: Path) -> dict: + return yaml_load(config_path) + + def tsl_setup(file_config, additional_config=None) -> None: + if additional_config is None: + additional_config = dict() + # overwrite / extend config file entries with additional config dict entries + merged_config = dict_update(file_config, additional_config) + config.setup(merged_config) + + os.chdir(Path(os.path.realpath(__file__)).parent) + file_config = get_config(Path("generator/config/default_conf.yaml")) + args_dict = parse_args(known_types = file_config["configuration"]["relevant_types"]) + tsl_setup(file_config, args_dict) + + html_template_path = config.get_expansion_config("primitive_vis")["template_path"] + + all_types = config.relevant_types + all_extensions = extract_extensions(config.get_primitive_files_path("extensions_path")) + all_extensions.sort() + + html_content = "" + with open(html_template_path, 'r') as template: + html_content = template.read() + + raw_primitive_dict = prepare_primitive_dict( all_types ) + table_vis_file = open(config.get_expansion_config("primitive_vis")["target_path"], 'w') + checkbox_html = "" + primitive_html = "" + for file in Path(config.get_primitive_files_path("primitives_path")).rglob("*.yaml"): + checkbox_html += add_checkbox(file.stem) + yaml_contents = yaml_load_all(file) + primitive_html += f"""
""" + for doc in yaml_contents: + if "primitive_name" in doc: + descr = doc["brief_description"] if "brief_description" in doc else "" + ctype_ext_dict = copy.deepcopy(raw_primitive_dict) + for definition in doc["definitions"]: + exts = make_list_if_necessary(definition["target_extension"]) + ctypes = make_list_if_necessary(definition["ctype"]) + + for ctype in ctypes: + for ext in exts: + ctype_ext_dict[ctype].add(ext) + + pP = PrintablePrimitive(get_functor_name( doc ), descr, ctype_ext_dict) + primitive_html += pP.to_html( all_types, all_extensions ) + primitive_html += f"""
""" + + html_content = html_content.replace("---filterBoxes---",checkbox_html) + html_content = html_content.replace("---content---",primitive_html) + + table_vis_file.write(html_content) + table_vis_file.close() \ No newline at end of file