FPU support RISCV-64

[Alexbruliau]

Describe the bug
FPU is deactivated inside tx_thread_schedule.S v6.4.1

Is it the correct behavior ?
I would expect the FS bit from the mstatus not to be reset to 0. Otherwise it will cause a trap if you try to access a FP register afterwards.

[xuzihan351]

Oops, I had modified there as follow, and it work well:
#ifdef __riscv_flen
li t0, 0x3880 # Prepare MPIP
#else
li t0, 0x1880 # Prepare MPIP
#endif