From a54e831f288dc3be352225fc01001123f03e6136 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Kevin=20L=C3=A4ufer?= Date: Mon, 18 Mar 2024 16:16:05 -0400 Subject: [PATCH] experiments: run fpga repairs with bitwuzla as well --- scripts/run_rtl_repair_experiment.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/run_rtl_repair_experiment.py b/scripts/run_rtl_repair_experiment.py index d7aed68..58bfd34 100755 --- a/scripts/run_rtl_repair_experiment.py +++ b/scripts/run_rtl_repair_experiment.py @@ -30,7 +30,7 @@ # the FPGA benchmarks all have testbenches from Verilator which assume a zero init _init_fpga = 'zero' # the FPGA benchmarks benefit from running with yices2 -_solver_fpga = 'yices2' +_solver_fpga = 'bitwuzla' @dataclass class ExpConfig: