From c02050cf87ab35d0592a20286d9eb8f39c1dfd2c Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Thu, 20 Jun 2024 16:03:02 +0800 Subject: [PATCH 01/12] feat: add octospim to ospi Signed-off-by: Haobo Gu --- embassy-stm32/build.rs | 18 +++++++++++++++++- embassy-stm32/src/ospi/mod.rs | 14 +++++++++++++- 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 6aedcc2289..b8a1f482db 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1040,6 +1040,18 @@ fn main() { (("octospi", "NCS"), quote!(crate::ospi::NSSPin)), (("octospi", "CLK"), quote!(crate::ospi::SckPin)), (("octospi", "NCLK"), quote!(crate::ospi::NckPin)), + (("octospim", "P1_IO0"), quote!(crate::ospi::D0Pin)), + (("octospim", "P1_IO1"), quote!(crate::ospi::D1Pin)), + (("octospim", "P1_IO2"), quote!(crate::ospi::D2Pin)), + (("octospim", "P1_IO3"), quote!(crate::ospi::D3Pin)), + (("octospim", "P1_IO4"), quote!(crate::ospi::D4Pin)), + (("octospim", "P1_IO5"), quote!(crate::ospi::D5Pin)), + (("octospim", "P1_IO6"), quote!(crate::ospi::D6Pin)), + (("octospim", "P1_IO7"), quote!(crate::ospi::D7Pin)), + (("octospim", "P1_DQS"), quote!(crate::ospi::DQSPin)), + (("octospim", "P1_NCS"), quote!(crate::ospi::NSSPin)), + (("octospim", "P1_CLK"), quote!(crate::ospi::SckPin)), + (("octospim", "P1_NCLK"), quote!(crate::ospi::NckPin)), (("tsc", "G1_IO1"), quote!(crate::tsc::G1IO1Pin)), (("tsc", "G1_IO2"), quote!(crate::tsc::G1IO2Pin)), (("tsc", "G1_IO3"), quote!(crate::tsc::G1IO3Pin)), @@ -1079,7 +1091,11 @@ fn main() { for pin in p.pins { let key = (regs.kind, pin.signal); if let Some(tr) = signals.get(&key) { - let mut peri = format_ident!("{}", p.name); + let mut peri = if p.name == "OCTOSPIM" { + format_ident!("{}", "OCTOSPI1") + } else { + format_ident!("{}", p.name) + }; let pin_name = { // If we encounter a _C pin but the split_feature for this pin is not enabled, skip it diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index f6eb0d17c9..de1b488d9b 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -16,6 +16,7 @@ use crate::dma::{word, ChannelAndRequest}; use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::octospi::{vals, Octospi as Regs}; +use crate::pac::octospim::Octospim; use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; @@ -1056,6 +1057,12 @@ fn finish_dma(regs: Regs) { }); } +/// OctoSPI I/O manager instance trait. +pub(crate) trait SealedOctospimInstance { + const OCTOSPIM_REGS: Octospim; +} + +/// OctoSPI instance trait. pub(crate) trait SealedInstance { const REGS: Regs; } @@ -1066,7 +1073,7 @@ trait SealedWord { /// OSPI instance trait. #[allow(private_bounds)] -pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} +pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral + SealedOctospimInstance {} pin_trait!(SckPin, Instance); pin_trait!(NckPin, Instance); @@ -1088,6 +1095,11 @@ foreach_peripheral!( const REGS: Regs = crate::pac::$inst; } + impl SealedOctospimInstance for peripherals::$inst { + // Hardcoded, is it good? + const OCTOSPIM_REGS: Octospim = crate::pac::OCTOSPIM; + } + impl Instance for peripherals::$inst {} }; ); From 23066ef3851d747587c4e0acb637ff8e169391ef Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Fri, 21 Jun 2024 14:40:22 +0800 Subject: [PATCH 02/12] feat: make octospim behind feature gate Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index de1b488d9b..02b395633e 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -16,6 +16,7 @@ use crate::dma::{word, ChannelAndRequest}; use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; use crate::mode::{Async, Blocking, Mode as PeriMode}; use crate::pac::octospi::{vals, Octospi as Regs}; +#[cfg(octospim_v1)] use crate::pac::octospim::Octospim; use crate::rcc::{self, RccPeripheral}; use crate::{peripherals, Peripheral}; @@ -1057,6 +1058,8 @@ fn finish_dma(regs: Regs) { }); } + +#[cfg(octospim_v1)] /// OctoSPI I/O manager instance trait. pub(crate) trait SealedOctospimInstance { const OCTOSPIM_REGS: Octospim; @@ -1072,8 +1075,12 @@ trait SealedWord { } /// OSPI instance trait. +#[cfg(octospim_v1)] #[allow(private_bounds)] pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral + SealedOctospimInstance {} +#[cfg(not(octospim_v1))] +#[allow(private_bounds)] +pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} pin_trait!(SckPin, Instance); pin_trait!(NckPin, Instance); @@ -1089,6 +1096,7 @@ pin_trait!(DQSPin, Instance); pin_trait!(NSSPin, Instance); dma_trait!(OctoDma, Instance); +#[cfg(octospim_v1)] foreach_peripheral!( (octospi, $inst:ident) => { impl SealedInstance for peripherals::$inst { @@ -1104,6 +1112,17 @@ foreach_peripheral!( }; ); +#[cfg(not(octospim_v1))] +foreach_peripheral!( + (octospi, $inst:ident) => { + impl SealedInstance for peripherals::$inst { + const REGS: Regs = crate::pac::$inst; + } + + impl Instance for peripherals::$inst {} + }; +); + impl<'d, T: Instance, M: PeriMode> SetConfig for Ospi<'d, T, M> { type Config = Config; type ConfigError = (); From e2c050f95f376af13088c13544a4936e9baf6817 Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Fri, 21 Jun 2024 14:51:31 +0800 Subject: [PATCH 03/12] refactor: fix fmt issue Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 1 - 1 file changed, 1 deletion(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 02b395633e..0f9ec26122 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -1058,7 +1058,6 @@ fn finish_dma(regs: Regs) { }); } - #[cfg(octospim_v1)] /// OctoSPI I/O manager instance trait. pub(crate) trait SealedOctospimInstance { From ada491426c32b8ca2f31d1b5aa9633a6c1b878ac Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Fri, 21 Jun 2024 14:53:39 +0800 Subject: [PATCH 04/12] refactor: fix ci failure Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 0f9ec26122..b8e06bee64 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -1077,6 +1077,8 @@ trait SealedWord { #[cfg(octospim_v1)] #[allow(private_bounds)] pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral + SealedOctospimInstance {} + +/// OSPI instance trait. #[cfg(not(octospim_v1))] #[allow(private_bounds)] pub trait Instance: Peripheral

+ SealedInstance + RccPeripheral {} From a5d83560b65dd6b88791b9af969e64e86da92c9e Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Sat, 22 Jun 2024 15:24:16 +0800 Subject: [PATCH 05/12] feat: add octospim reg writing code Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 69 ++++++++++++++++++++++++++++++++++- 1 file changed, 67 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index b8e06bee64..6ab6122e7d 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -199,8 +199,73 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { ) -> Self { into_ref!(peri); - // System configuration - rcc::enable_and_reset::(); + info!("Doing OCTOSPIM config"); + + // Disable OctoSPI peripheral first + T::REGS.cr().modify(|w| { + w.set_en(false); + }); + + // FIXME: Cannot write OCTOSPIM_REGS + // OctoSPI IO Manager has been enabled before + T::OCTOSPIM_REGS.cr().modify(|w| { + w.set_muxen(true); + w.set_req2ack_time(0xff); + }); + + info!("OCTOSPIM REG addr: {:X} muxen: {}", T::OCTOSPIM_REGS.as_ptr() as u32, T::OCTOSPIM_REGS.cr().read().muxen()); + + // Clear config + T::OCTOSPIM_REGS.p1cr().modify(|w| { + w.set_clksrc(false); + w.set_dqssrc(false); + w.set_ncssrc(false); + w.set_clken(false); + w.set_dqsen(false); + w.set_ncsen(false); + w.set_iolsrc(0); + w.set_iohsrc(0); + }); + + T::OCTOSPIM_REGS.p2cr().modify(|w| { + w.set_clksrc(true); + w.set_clken(true); + w.set_dqssrc(true); + w.set_dqsen(true); + w.set_ncssrc(true); + w.set_ncsen(true); + w.set_iolsrc(0); + w.set_iolen(true); + w.set_iohsrc(0b11); + w.set_iohen(true); + }); + + // Enable NCS for OctoSPIM port 1 + T::OCTOSPIM_REGS.p1cr().modify(|w| { + w.set_ncsen(true); + // w.set_ncssrc(true); + w.set_clken(true); + // w.set_clksrc(true); + if dqs.is_some() { + w.set_dqsen(true); + w.set_dqssrc(true); + } + + // FIXME: IOL and IOH are enabled only for OCTOSPI1 + // Enable IOL by default + w.set_iolen(true); + w.set_iolsrc(0); + + // Enable IOH in octo and dual quad mode + if let OspiWidth::OCTO = width { + w.set_iohen(true); + w.set_iohsrc(0); + } else if dual_quad { + w.set_iohen(true); + w.set_iohsrc(0); + } + }); + while T::REGS.sr().read().busy() {} // Device configuration From 89170c595d6c8d476fae4e6571f8066437b987da Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Sat, 22 Jun 2024 23:16:43 +0800 Subject: [PATCH 06/12] feat(octospi): enable rcc for octospim at the initialization Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 35 ++++++++++++----------------------- 1 file changed, 12 insertions(+), 23 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 6ab6122e7d..1ee89d5283 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -199,22 +199,20 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { ) -> Self { into_ref!(peri); - info!("Doing OCTOSPIM config"); + // RCC for octospim should be enabled before writing register + crate::pac::RCC.ahb3enr().modify(|w| w.set_iomngren(true)); // Disable OctoSPI peripheral first T::REGS.cr().modify(|w| { w.set_en(false); }); - // FIXME: Cannot write OCTOSPIM_REGS // OctoSPI IO Manager has been enabled before T::OCTOSPIM_REGS.cr().modify(|w| { - w.set_muxen(true); + w.set_muxen(false); w.set_req2ack_time(0xff); }); - info!("OCTOSPIM REG addr: {:X} muxen: {}", T::OCTOSPIM_REGS.as_ptr() as u32, T::OCTOSPIM_REGS.cr().read().muxen()); - // Clear config T::OCTOSPIM_REGS.p1cr().modify(|w| { w.set_clksrc(false); @@ -227,31 +225,17 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { w.set_iohsrc(0); }); - T::OCTOSPIM_REGS.p2cr().modify(|w| { - w.set_clksrc(true); - w.set_clken(true); - w.set_dqssrc(true); - w.set_dqsen(true); - w.set_ncssrc(true); - w.set_ncsen(true); - w.set_iolsrc(0); - w.set_iolen(true); - w.set_iohsrc(0b11); - w.set_iohen(true); - }); - - // Enable NCS for OctoSPIM port 1 T::OCTOSPIM_REGS.p1cr().modify(|w| { w.set_ncsen(true); - // w.set_ncssrc(true); + w.set_ncssrc(false); w.set_clken(true); - // w.set_clksrc(true); + w.set_clksrc(false); if dqs.is_some() { w.set_dqsen(true); - w.set_dqssrc(true); + w.set_dqssrc(false); } - // FIXME: IOL and IOH are enabled only for OCTOSPI1 + // FIXME: IOL and IOH are enabled only for OCTOSPI1 currently // Enable IOL by default w.set_iolen(true); w.set_iolsrc(0); @@ -263,9 +247,14 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { } else if dual_quad { w.set_iohen(true); w.set_iohsrc(0); + } else { + w.set_iohen(false); + w.set_iohsrc(0); } }); + // System configuration + rcc::enable_and_reset::(); while T::REGS.sr().read().busy() {} // Device configuration From 7bd23f5088e02369690ffea15ff3054772d6de93 Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Sun, 23 Jun 2024 11:18:00 +0800 Subject: [PATCH 07/12] fix: add octospim feature gate Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 97 ++++++++++++++++++----------------- 1 file changed, 49 insertions(+), 48 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 1ee89d5283..1bdfd02631 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -199,59 +199,60 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { ) -> Self { into_ref!(peri); - // RCC for octospim should be enabled before writing register - crate::pac::RCC.ahb3enr().modify(|w| w.set_iomngren(true)); - - // Disable OctoSPI peripheral first - T::REGS.cr().modify(|w| { - w.set_en(false); - }); + #[cfg(feature = "octospim_v1")] + { + // RCC for octospim should be enabled before writing register + crate::pac::RCC.ahb3enr().modify(|w| w.set_iomngren(true)); - // OctoSPI IO Manager has been enabled before - T::OCTOSPIM_REGS.cr().modify(|w| { - w.set_muxen(false); - w.set_req2ack_time(0xff); - }); + // Disable OctoSPI peripheral first + T::REGS.cr().modify(|w| { + w.set_en(false); + }); - // Clear config - T::OCTOSPIM_REGS.p1cr().modify(|w| { - w.set_clksrc(false); - w.set_dqssrc(false); - w.set_ncssrc(false); - w.set_clken(false); - w.set_dqsen(false); - w.set_ncsen(false); - w.set_iolsrc(0); - w.set_iohsrc(0); - }); + // OctoSPI IO Manager has been enabled before + T::OCTOSPIM_REGS.cr().modify(|w| { + w.set_muxen(false); + w.set_req2ack_time(0xff); + }); - T::OCTOSPIM_REGS.p1cr().modify(|w| { - w.set_ncsen(true); - w.set_ncssrc(false); - w.set_clken(true); - w.set_clksrc(false); - if dqs.is_some() { - w.set_dqsen(true); + // Clear config + T::OCTOSPIM_REGS.p1cr().modify(|w| { + w.set_clksrc(false); w.set_dqssrc(false); - } - - // FIXME: IOL and IOH are enabled only for OCTOSPI1 currently - // Enable IOL by default - w.set_iolen(true); - w.set_iolsrc(0); - - // Enable IOH in octo and dual quad mode - if let OspiWidth::OCTO = width { - w.set_iohen(true); - w.set_iohsrc(0); - } else if dual_quad { - w.set_iohen(true); + w.set_ncssrc(false); + w.set_clken(false); + w.set_dqsen(false); + w.set_ncsen(false); + w.set_iolsrc(0); w.set_iohsrc(0); - } else { - w.set_iohen(false); - w.set_iohsrc(0); - } - }); + }); + + T::OCTOSPIM_REGS.p1cr().modify(|w| { + w.set_ncsen(true); + w.set_ncssrc(false); + w.set_clken(true); + w.set_clksrc(false); + if dqs.is_some() { + w.set_dqsen(true); + w.set_dqssrc(false); + } + + // IOL and IOH are enabled only for OCTOSPI1 currently + w.set_iolen(true); + w.set_iolsrc(0); + // Enable IOH in octo and dual quad mode + if let OspiWidth::OCTO = width { + w.set_iohen(true); + w.set_iohsrc(0); + } else if dual_quad { + w.set_iohen(true); + w.set_iohsrc(0); + } else { + w.set_iohen(false); + w.set_iohsrc(0); + } + }); + } // System configuration rcc::enable_and_reset::(); From 6279799fb56485c99a9e3d0b837ad5622f993156 Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Sun, 23 Jun 2024 16:24:06 +0800 Subject: [PATCH 08/12] fix: fix cfg flag Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 1bdfd02631..188766a51a 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -199,7 +199,7 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { ) -> Self { into_ref!(peri); - #[cfg(feature = "octospim_v1")] + #[cfg(octospim_v1)] { // RCC for octospim should be enabled before writing register crate::pac::RCC.ahb3enr().modify(|w| w.set_iomngren(true)); From c068944d490cbfd791700c89cf7d56ae29777f77 Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Sun, 23 Jun 2024 19:27:53 +0800 Subject: [PATCH 09/12] fix: fix rcc register on stm32l4 and stm32u5 Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index 188766a51a..656e188239 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -202,6 +202,11 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { #[cfg(octospim_v1)] { // RCC for octospim should be enabled before writing register + #[cfg(stm32l4)] + crate::pac::RCC.ahb2smenr().modify(|w| w.set_octospimsmen(true)); + #[cfg(stm32u5)] + crate::pac::RCC.ahb2enr1().modify(|w| w.set_octospimen(true)); + #[cfg(not(any(stm32l4, stm32u5)))] crate::pac::RCC.ahb3enr().modify(|w| w.set_iomngren(true)); // Disable OctoSPI peripheral first From 4d5023ebda1c30dd9c3200cf881e097a84e40938 Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Thu, 4 Jul 2024 10:26:35 +0800 Subject: [PATCH 10/12] feat(ospi): support OCTOSPI2 in build.rs Signed-off-by: Haobo Gu --- embassy-stm32/build.rs | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index b8a1f482db..a18bd9e956 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1091,11 +1091,7 @@ fn main() { for pin in p.pins { let key = (regs.kind, pin.signal); if let Some(tr) = signals.get(&key) { - let mut peri = if p.name == "OCTOSPIM" { - format_ident!("{}", "OCTOSPI1") - } else { - format_ident!("{}", p.name) - }; + let mut peri = format_ident!("{}", p.name); let pin_name = { // If we encounter a _C pin but the split_feature for this pin is not enabled, skip it @@ -1113,6 +1109,15 @@ fn main() { peri = format_ident!("{}", pin.signal.replace('_', "")); } + // OCTOSPIM is special + if p.name == "OCTOSPIM" { + peri = format_ident!("{}", "OCTOSPI1"); + g.extend(quote! { + pin_trait_impl!(#tr, #peri, #pin_name, #af); + }); + peri = format_ident!("{}", "OCTOSPI2"); + } + g.extend(quote! { pin_trait_impl!(#tr, #peri, #pin_name, #af); }) From 23baf62280b4f908a5b69495bf5a3e1063eaf0b4 Mon Sep 17 00:00:00 2001 From: HaoboGu Date: Tue, 23 Jul 2024 22:50:25 +0800 Subject: [PATCH 11/12] feat(ospi): add OCTOSPI2 pin impls Signed-off-by: HaoboGu --- embassy-stm32/build.rs | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index a18bd9e956..88b2b543c4 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1052,6 +1052,18 @@ fn main() { (("octospim", "P1_NCS"), quote!(crate::ospi::NSSPin)), (("octospim", "P1_CLK"), quote!(crate::ospi::SckPin)), (("octospim", "P1_NCLK"), quote!(crate::ospi::NckPin)), + (("octospim", "P2_IO0"), quote!(crate::ospi::D0Pin)), + (("octospim", "P2_IO1"), quote!(crate::ospi::D1Pin)), + (("octospim", "P2_IO2"), quote!(crate::ospi::D2Pin)), + (("octospim", "P2_IO3"), quote!(crate::ospi::D3Pin)), + (("octospim", "P2_IO4"), quote!(crate::ospi::D4Pin)), + (("octospim", "P2_IO5"), quote!(crate::ospi::D5Pin)), + (("octospim", "P2_IO6"), quote!(crate::ospi::D6Pin)), + (("octospim", "P2_IO7"), quote!(crate::ospi::D7Pin)), + (("octospim", "P2_DQS"), quote!(crate::ospi::DQSPin)), + (("octospim", "P2_NCS"), quote!(crate::ospi::NSSPin)), + (("octospim", "P2_CLK"), quote!(crate::ospi::SckPin)), + (("octospim", "P2_NCLK"), quote!(crate::ospi::NckPin)), (("tsc", "G1_IO1"), quote!(crate::tsc::G1IO1Pin)), (("tsc", "G1_IO2"), quote!(crate::tsc::G1IO2Pin)), (("tsc", "G1_IO3"), quote!(crate::tsc::G1IO3Pin)), From 4a05114ca1c9a49f99057dc56354d43773af6ae8 Mon Sep 17 00:00:00 2001 From: Haobo Gu Date: Sat, 12 Oct 2024 14:45:13 +0800 Subject: [PATCH 12/12] feat(ospi): support both ospi instances in stm32 OCTOSPIM Signed-off-by: Haobo Gu --- embassy-stm32/src/ospi/mod.rs | 66 ++++++++++++++++++++++++----------- 1 file changed, 46 insertions(+), 20 deletions(-) diff --git a/embassy-stm32/src/ospi/mod.rs b/embassy-stm32/src/ospi/mod.rs index bcb11d4687..48a1ea5e68 100644 --- a/embassy-stm32/src/ospi/mod.rs +++ b/embassy-stm32/src/ospi/mod.rs @@ -233,28 +233,45 @@ impl<'d, T: Instance, M: PeriMode> Ospi<'d, T, M> { }); T::OCTOSPIM_REGS.p1cr().modify(|w| { + let octospi_src = if T::OCTOSPI_IDX == 1 { false } else { true }; w.set_ncsen(true); - w.set_ncssrc(false); + w.set_ncssrc(octospi_src); w.set_clken(true); - w.set_clksrc(false); + w.set_clksrc(octospi_src); if dqs.is_some() { w.set_dqsen(true); - w.set_dqssrc(false); + w.set_dqssrc(octospi_src); } - // IOL and IOH are enabled only for OCTOSPI1 currently - w.set_iolen(true); - w.set_iolsrc(0); - // Enable IOH in octo and dual quad mode - if let OspiWidth::OCTO = width { - w.set_iohen(true); - w.set_iohsrc(0); - } else if dual_quad { - w.set_iohen(true); - w.set_iohsrc(0); + // Set OCTOSPIM IOL and IOH according to the index of OCTOSPI instance + if T::OCTOSPI_IDX == 1 { + w.set_iolen(true); + w.set_iolsrc(0); + // Enable IOH in octo and dual quad mode + if let OspiWidth::OCTO = width { + w.set_iohen(true); + w.set_iohsrc(0b01); + } else if dual_quad { + w.set_iohen(true); + w.set_iohsrc(0b00); + } else { + w.set_iohen(false); + w.set_iohsrc(0b00); + } } else { - w.set_iohen(false); - w.set_iohsrc(0); + w.set_iolen(true); + w.set_iolsrc(0b10); + // Enable IOH in octo and dual quad mode + if let OspiWidth::OCTO = width { + w.set_iohen(true); + w.set_iohsrc(0b11); + } else if dual_quad { + w.set_iohen(true); + w.set_iohsrc(0b10); + } else { + w.set_iohen(false); + w.set_iohsrc(0b00); + } } }); } @@ -1122,6 +1139,7 @@ fn finish_dma(regs: Regs) { /// OctoSPI I/O manager instance trait. pub(crate) trait SealedOctospimInstance { const OCTOSPIM_REGS: Octospim; + const OCTOSPI_IDX: u8; } /// OctoSPI instance trait. @@ -1153,6 +1171,19 @@ pin_trait!(DQSPin, Instance); pin_trait!(NSSPin, Instance); dma_trait!(OctoDma, Instance); +// Hard-coded the octospi index, for OCTOSPIM +#[cfg(octospim_v1)] +impl SealedOctospimInstance for peripherals::OCTOSPI1 { + const OCTOSPIM_REGS: Octospim = crate::pac::OCTOSPIM; + const OCTOSPI_IDX: u8 = 1; +} + +#[cfg(octospim_v1)] +impl SealedOctospimInstance for peripherals::OCTOSPI2 { + const OCTOSPIM_REGS: Octospim = crate::pac::OCTOSPIM; + const OCTOSPI_IDX: u8 = 2; +} + #[cfg(octospim_v1)] foreach_peripheral!( (octospi, $inst:ident) => { @@ -1160,11 +1191,6 @@ foreach_peripheral!( const REGS: Regs = crate::pac::$inst; } - impl SealedOctospimInstance for peripherals::$inst { - // Hardcoded, is it good? - const OCTOSPIM_REGS: Octospim = crate::pac::OCTOSPIM; - } - impl Instance for peripherals::$inst {} }; );