From 3eab5e1161312efc394d2a238ba8b93e174846a1 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Sat, 8 Jun 2024 03:45:17 +0200 Subject: [PATCH] memory: many memory map fixes. fixes #301 --- stm32-data-gen/src/memory.rs | 262 ++++++++++++++++++----------------- 1 file changed, 137 insertions(+), 125 deletions(-) diff --git a/stm32-data-gen/src/memory.rs b/stm32-data-gen/src/memory.rs index b09c7f9a4..1b4a0cb67 100644 --- a/stm32-data-gen/src/memory.rs +++ b/stm32-data-gen/src/memory.rs @@ -25,12 +25,12 @@ macro_rules! mem { #[rustfmt::skip] static MEMS: RegexMap<&[Mem]> = RegexMap::new(&[ - // C0. TODO: check + // C0 ("STM32C01..4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 6)), ("STM32C01..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 6)), ("STM32C03..4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 12)), ("STM32C03..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 12)), - // F0. TODO: check + // F0 ("STM32F0...C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32)), ("STM32F0[35]..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 8)), ("STM32F0[47]..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 6)), @@ -42,7 +42,7 @@ static MEMS: RegexMap<&[Mem]> = RegexMap::new(&[ ("STM32F07..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 16)), ("STM32F07..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 16)), ("STM32F09..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32)), - // F1. TODO: check + // F1 ("STM32F1.[12].6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 6)), ("STM32F1.[12].8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 10)), ("STM32F1.[12].B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 16)), @@ -70,77 +70,83 @@ static MEMS: RegexMap<&[Mem]> = RegexMap::new(&[ ("STM32F1.5.8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 64)), ("STM32F10[012].4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 4)), ("STM32F103.4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 6)), - // F2. TODO: check - ("STM32F2...B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 64, SRAM2 0x2001c000 0)), - ("STM32F2...E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 128, SRAM2 0x2001c000 0)), - ("STM32F2...F", mem!(BANK_1 0x08000000 768, SRAM 0x20000000 128, SRAM2 0x2001c000 0)), - ("STM32F2...G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 128, SRAM2 0x2001c000 0)), - ("STM32F2.5.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 96, SRAM2 0x2001c000 0)), - ("STM32F2.7.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 128, SRAM2 0x2001c000 0)), - // F3. TODO: check - ("STM32F3...4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 12)), - ("STM32F3...D", mem!(BANK_1 0x08000000 384, SRAM 0x20000000 64)), - ("STM32F3...E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 64)), + // F2 + ("STM32F2...B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 48, SRAM2 0x2001c000 16)), + ("STM32F2...E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 112, SRAM2 0x2001c000 16)), + ("STM32F2...F", mem!(BANK_1 0x08000000 768, SRAM 0x20000000 112, SRAM2 0x2001c000 16)), + ("STM32F2...G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 112, SRAM2 0x2001c000 16)), + ("STM32F2.5.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 80, SRAM2 0x2001c000 16)), + ("STM32F2.7.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 112, SRAM2 0x2001c000 16)), + // F3. TODO: CCM is in both buses. + ("STM32F3...4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 12, CCMRAM 0x10000000 4)), ("STM32F3.[12].6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 16)), - ("STM32F3.[34].6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 12)), - ("STM32F3([17]..8|0[12].8)", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 16)), - ("STM32F3([23]..8|03.8)", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 12)), - ("STM32F3[05]..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 40)), - ("STM32F30..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32)), - ("STM32F37..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 24)), - ("STM32F37..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32)), - // F4. TODO: check + ("STM32F3.[34].6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 12, CCMRAM 0x10000000 4)), + ("STM32F3.[38].E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 64, CCMRAM 0x10000000 16)), + ("STM32F3.2.D", mem!(BANK_1 0x08000000 384, SRAM 0x20000000 64)), + ("STM32F3.2.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 64)), + ("STM32F3.3.D", mem!(BANK_1 0x08000000 384, SRAM 0x20000000 64, CCMRAM 0x10000000 16)), + ("STM32F3([23]..8|03.8)", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 12, CCMRAM 0x10000000 4)), + ("STM32F3(0[12].8|[17]..8)", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 16)), + ("STM32F3(03|58).C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 40, CCMRAM 0x10000000 8)), + ("STM32F3(73|78).C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32)), + ("STM32F302.B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32)), + ("STM32F302.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 40)), + ("STM32F303.B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32, CCMRAM 0x10000000 8)), + ("STM32F373.B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 24)), + // F4 ("STM32F4...8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 32)), - ("STM32F4...D", mem!(BANK_1 0x08000000 384, SRAM 0x20000000 64)), - ("STM32F4...H", mem!(BANK_1 0x08000000 1536, SRAM 0x20000000 320, SRAM2 0x20040000 0)), - ("STM32F4.[567].E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 128, SRAM2 0x2001c000 0)), - ("STM32F4.1.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 64)), - ("STM32F4.1.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 64)), - ("STM32F4.2.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 256)), - ("STM32F4.6.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 128, SRAM2 0x2001c000 0)), - ("STM32F4(1[57].G|0..G)", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 128, SRAM2 0x2001c000 0)), - ("STM32F4[23]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 192, SRAM2 0x2001c000 0)), - ("STM32F4[23]..I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x20000000 192, SRAM2 0x2001c000 0)), - ("STM32F4[67]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 320, SRAM2 0x20028000 0)), - ("STM32F4[67]..I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x20000000 320, SRAM2 0x20028000 0)), + ("STM32F4...D", mem!(BANK_1 0x08000000 384, SRAM 0x20000000 96)), + ("STM32F4...H", mem!(BANK_1 0x08000000 1536, SRAM 0x20000000 320)), + ("STM32F4(05|07).E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 112, SRAM2 0x2001c000 16, CCMRAM 0x10000000 64)), + ("STM32F4(11|46).E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 128)), + ("STM32F4[14]..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 128)), + ("STM32F4[23]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 192, CCMRAM 0x10000000 64)), + ("STM32F4[23]..I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x20000000 192, CCMRAM 0x10000000 64)), + ("STM32F4[67]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 320, CCMRAM 0x10000000 64)), + ("STM32F4[67]..I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x20000000 320, CCMRAM 0x10000000 64)), ("STM32F40..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 64)), + ("STM32F40..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 64)), + ("STM32F40..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 112, SRAM2 0x2001c000 16, CCMRAM 0x10000000 64)), + ("STM32F401.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 96)), ("STM32F41..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32)), + ("STM32F41[57].G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 128, CCMRAM 0x10000000 64)), + ("STM32F412.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 256)), ("STM32F412.G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 256)), - ("STM32F413.G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 320, SRAM2 0x20040000 0)), - ("STM32F429.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 192, SRAM2 0x2001c000 0)), - ("STM32F469.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 320, SRAM2 0x20028000 0)), - // F7. TODO: check - ("STM32F7...C", mem!(BANK_1 0x08000000 256, SRAM 0x20010000 192, SRAM2 0x2003c000 0)), - ("STM32F7...I", mem!(BANK_1 0x08000000 2048, SRAM 0x20020000 384, SRAM2 0x2007c000 0)), - ("STM32F7[23]..E", mem!(BANK_1 0x08000000 512, SRAM 0x20010000 192, SRAM2 0x2003c000 0)), - ("STM32F7[45]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20010000 320, SRAM2 0x2004c000 0)), - ("STM32F73..8", mem!(BANK_1 0x08000000 64, SRAM 0x20010000 192, SRAM2 0x2003c000 0)), - ("STM32F74..E", mem!(BANK_1 0x08000000 512, SRAM 0x20010000 320, SRAM2 0x2004c000 0)), - ("STM32F75..8", mem!(BANK_1 0x08000000 64, SRAM 0x20010000 320, SRAM2 0x2004c000 0)), - ("STM32F76..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20020000 384, SRAM2 0x2007c000 0)), - // G0. TODO: check + ("STM32F413.G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 320)), + ("STM32F417.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 128, CCMRAM 0x10000000 64)), + ("STM32F429.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 192, CCMRAM 0x10000000 64)), + ("STM32F469.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 320, CCMRAM 0x10000000 64)), + // F7 + ("STM32F7...C", mem!(BANK_1 0x08000000 256, DTCM 0x20000000 64, SRAM 0x20010000 192)), + ("STM32F7...I", mem!(BANK_1 0x08000000 2048, DTCM 0x20000000 128, SRAM 0x20020000 384)), + ("STM32F7[23]..E", mem!(BANK_1 0x08000000 512, DTCM 0x20000000 64, SRAM 0x20010000 192)), + ("STM32F7[45]..G", mem!(BANK_1 0x08000000 1024, DTCM 0x20000000 64, SRAM 0x20010000 256)), + ("STM32F73..8", mem!(BANK_1 0x08000000 64, DTCM 0x20000000 64, SRAM 0x20010000 192)), + ("STM32F74..E", mem!(BANK_1 0x08000000 512, DTCM 0x20000000 64, SRAM 0x20010000 256)), + ("STM32F75..8", mem!(BANK_1 0x08000000 64, DTCM 0x20000000 64, SRAM 0x20010000 256)), + ("STM32F76..G", mem!(BANK_1 0x08000000 1024, DTCM 0x20000000 128, SRAM 0x20020000 384)), + // G0 ("STM32G0...4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 8)), - ("STM32G0...C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 128)), - ("STM32G0...E", mem!(BANK_1 0x08000000 256, BANK_2 0x08040000 256, SRAM 0x20000000 128)), + ("STM32G0...C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 144)), + ("STM32G0...E", mem!(BANK_1 0x08000000 256, BANK_2 0x08040000 256, SRAM 0x20000000 144)), + ("STM32G0[34]..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 8)), ("STM32G0[34]..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 8)), - ("STM32G0(3..6|4.J6)", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 8)), - ("STM32G04..6", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 8)), - ("STM32G0[56]..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 16)), - ("STM32G0[56]..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 16)), - ("STM32G0[78]..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32)), - ("STM32G07..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 32)), - ("STM32G07..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 32)), - ("STM32G0B..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 128)), - // G4. TODO: check - ("STM32G4...6", mem!(BANK_1 0x08000000 32, CCM_SRAM_ICODE 0x10000000 10, SRAM1 0x20000000 16, SRAM2 0x20004000 6, CCM_SRAM_DCODE 0x20005800 10)), - ("STM32G4...8", mem!(BANK_1 0x08000000 64, CCM_SRAM_ICODE 0x10000000 10, SRAM1 0x20000000 16, SRAM2 0x20004000 6, CCM_SRAM_DCODE 0x20005800 10)), - ("STM32G4[34]..B", mem!(BANK_1 0x08000000 128, CCM_SRAM_ICODE 0x10000000 10, SRAM1 0x20000000 16, SRAM2 0x20004000 6, CCM_SRAM_DCODE 0x20005800 10)), - ("STM32G4[78]..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 96, SRAM2 0x20014000 0)), - ("STM32G4[9A]..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 32, SRAM2 0x20014000 0)), - ("STM32G47..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 96, SRAM2 0x20014000 0)), - ("STM32G47..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 96, SRAM2 0x20014000 0)), - ("STM32G49..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32, SRAM2 0x20014000 0)), - // H5. + ("STM32G0[56]..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 18)), + ("STM32G0[56]..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 18)), + ("STM32G0[78]..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 36)), + ("STM32G07..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 36)), + ("STM32G07..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 36)), + ("STM32G0B..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 144)), + // G4 + ("STM32G4...6", mem!(BANK_1 0x08000000 32, CCMRAM_ICODE 0x10000000 10, SRAM1 0x20000000 16, SRAM2 0x20004000 6, CCMRAM_DCODE 0x20005800 10)), + ("STM32G4...8", mem!(BANK_1 0x08000000 64, CCMRAM_ICODE 0x10000000 10, SRAM1 0x20000000 16, SRAM2 0x20004000 6, CCMRAM_DCODE 0x20005800 10)), + ("STM32G4[34]..B", mem!(BANK_1 0x08000000 128, CCMRAM_ICODE 0x10000000 10, SRAM1 0x20000000 16, SRAM2 0x20004000 6, CCMRAM_DCODE 0x20005800 10)), + ("STM32G49..C", mem!(BANK_1 0x08000000 256, CCMRAM_ICODE 0x10000000 16, SRAM1 0x20000000 80, SRAM2 0x20014000 16, CCMRAM_DCODE 0x20018000 16)), + ("STM32G4[9A]..E", mem!(BANK_1 0x08000000 512, CCMRAM_ICODE 0x10000000 16, SRAM1 0x20000000 80, SRAM2 0x20014000 16, CCMRAM_DCODE 0x20018000 16)), + ("STM32G47..B", mem!(BANK_1 0x08000000 128, CCMRAM_ICODE 0x10000000 32, SRAM1 0x20000000 80, SRAM2 0x20014000 16, CCMRAM_DCODE 0x20018000 32)), + ("STM32G47..C", mem!(BANK_1 0x08000000 256, CCMRAM_ICODE 0x10000000 32, SRAM1 0x20000000 80, SRAM2 0x20014000 16, CCMRAM_DCODE 0x20018000 32)), + ("STM32G4[78]..E", mem!(BANK_1 0x08000000 512, CCMRAM_ICODE 0x10000000 32, SRAM1 0x20000000 80, SRAM2 0x20014000 16, CCMRAM_DCODE 0x20018000 32)), + // H5 ("STM32H5...B", mem!(BANK_1 0x08000000 64, BANK_2 0x08010000 64, SRAM1 0x20000000 16, SRAM2 0x20004000 16)), ("STM32H5...C", mem!(BANK_1 0x08000000 128, BANK_2 0x08020000 128, SRAM1 0x20000000 128, SRAM2 0x20020000 80, SRAM3 0x20034000 64)), ("STM32H5...E", mem!(BANK_1 0x08000000 256, BANK_2 0x08040000 256, SRAM1 0x20000000 128, SRAM2 0x20020000 80, SRAM3 0x20034000 64)), @@ -148,17 +154,20 @@ static MEMS: RegexMap<&[Mem]> = RegexMap::new(&[ ("STM32H5...I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM1 0x20000000 256, SRAM2 0x20040000 64, SRAM3 0x20050000 320)), // H7RS ("STM32H7[RS].*", mem!(BANK_1 0x08000000 64, ITCM 0x00000000 192, DTCM 0x20000000 192, SRAM1 0x24000000 128, SRAM2 0x24020000 128, SRAM3 0x24040000 128, SRAM4 0x24060000 72, AHB_SRAM1 0x30000000 16, AHB_SRAM2 0x30004000 16)), - // H7. TODO: check - ("STM32H7...E", mem!(BANK_1 0x08000000 512, SRAM 0x24000000 128)), - ("STM32H7[23]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x24000000 128)), - ("STM32H7[45]..I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x24000000 512)), - ("STM32H7[AB]..I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, SRAM 0x24000000 1024)), - ("STM32H73..B", mem!(BANK_1 0x08000000 128, SRAM 0x24000000 128)), - ("STM32H74..G", mem!(BANK_1 0x08000000 1024, SRAM 0x24000000 512)), - ("STM32H75..B", mem!(BANK_1 0x08000000 128, SRAM 0x24000000 512)), - ("STM32H7A..G", mem!(BANK_1 0x08000000 1024, SRAM 0x24000000 1024)), - ("STM32H7B..B", mem!(BANK_1 0x08000000 128, SRAM 0x24000000 1024)), - // L0. TODO: check + // H7 + ("STM32H7...E", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 512, DTCM 0x20000000 128, RAM_D1 0x24000000 320, RAM_D2 0x30000000 32, RAM_D3 0x38000000 16)), + ("STM32H7.2.I", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, DTCM 0x20000000 128, RAM_D1 0x24000000 384, RAM_D2 0x30000000 32, RAM2_D2 0x30020000 16, RAM_D3 0x38000000 64)), + ("STM32H7(.[57].I|4[57].G)", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, RAM_D2 0x10000000 288, RAM_D3 0x18000000 64, DTCM 0x20000000 128, RAM_D1 0x24000000 512)), + ("STM32H7[23]..G", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 1024, DTCM 0x20000000 128, RAM_D1 0x24000000 320, RAM_D2 0x30000000 32, RAM_D3 0x38000000 16)), + ("STM32H7[45]3.I", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, DTCM 0x20000000 128, RAM_D1 0x24000000 512, RAM_D2 0x30000000 288, RAM_D3 0x38000000 64)), + ("STM32H7[AB]3.I", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 1024, BANK_2 0x08100000 1024, DTCM 0x20000000 128, SRAM 0x24000000 1024)), + ("STM32H73..B", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 128, DTCM 0x20000000 128, RAM_D1 0x24000000 320, RAM_D2 0x30000000 32, RAM_D3 0x38000000 16)), + ("STM32H742.G", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 512, BANK_2 0x08100000 512, DTCM 0x20000000 128, RAM_D1 0x24000000 384, RAM_D2 0x30000000 32, RAM2_D2 0x30020000 16, RAM_D3 0x38000000 64)), + ("STM32H743.G", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 512, BANK_2 0x08100000 512, DTCM 0x20000000 128, RAM_D1 0x24000000 512, RAM_D2 0x30000000 288, RAM_D3 0x38000000 64)), + ("STM32H75..B", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 128, DTCM 0x20000000 128, RAM_D1 0x24000000 512, RAM_D2 0x30000000 288, RAM_D3 0x38000000 64)), + ("STM32H7A..G", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 512, BANK_2 0x08100000 512, DTCM 0x20000000 128, SRAM 0x24000000 1024)), + ("STM32H7B..B", mem!(ITCM 0x00000000 64, BANK_1 0x08000000 128, DTCM 0x20000000 128, SRAM 0x24000000 1024)), + // L0 ("STM32L0...3", mem!(BANK_1 0x08000000 8, SRAM 0x20000000 2)), ("STM32L0...6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 8)), ("STM32L0...B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 20)), @@ -167,44 +176,46 @@ static MEMS: RegexMap<&[Mem]> = RegexMap::new(&[ ("STM32L0[156]..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 8)), ("STM32L0[34]..4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 8)), ("STM32L0[78]..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 20)), - // L1. TODO: check - ("STM32L1...B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 10)), - ("STM32L1...C..", mem!(BANK_1 0x08000000 192, BANK_2 0x08030000 64, SRAM 0x20000000 32)), - ("STM32L1...D..", mem!(BANK_1 0x08000000 128, BANK_2 0x08040000 256, SRAM 0x20000000 80)), + // L1 + ("STM32L1...C..", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32)), + ("STM32L1...D..", mem!(BANK_1 0x08000000 192, BANK_2 0x08030000 192, SRAM 0x20000000 80)), ("STM32L1...D", mem!(BANK_1 0x08000000 192, BANK_2 0x08030000 192, SRAM 0x20000000 48)), ("STM32L1...E", mem!(BANK_1 0x08000000 256, BANK_2 0x08040000 256, SRAM 0x20000000 80)), - ("STM32L1(6.[RV]C|5.[CRUV]C)", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32)), - ("STM32L1[56].[QZ]C", mem!(BANK_1 0x08000000 192, BANK_2 0x08030000 64, SRAM 0x20000000 32)), - ("STM32L10..6..", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 10)), + ("STM32L1[56]..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32)), + ("STM32L10..6..", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 4)), ("STM32L10..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 4)), - ("STM32L10..8..", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 10)), + ("STM32L10..8..", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 8)), ("STM32L10..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 8)), - ("STM32L10..B..", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 10)), + ("STM32L10..B..", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 16)), + ("STM32L10..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 10)), ("STM32L10..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 16)), ("STM32L15..6..", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 16)), ("STM32L15..6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 10)), - ("STM32L15..8..", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 16)), + ("STM32L15..8..", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 32)), ("STM32L15..8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 10)), - ("STM32L15..B..", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 16)), - // L4. TODO: check - ("STM32L4...8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 40)), - ("STM32L4...I", mem!(BANK_1 0x08000000 2048, SRAM 0x20000000 192)), - ("STM32L4[12]..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 40)), - ("STM32L4[34]..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 48)), - ("STM32L4[56]..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 128)), - ("STM32L4[78]..G", mem!(BANK_1 0x08000000 512, BANK_2 0x08080000 512, SRAM 0x20000000 96)), - ("STM32L4[9A]..G", mem!(BANK_1 0x08000000 512, BANK_2 0x08080000 512, SRAM 0x20000000 256)), - ("STM32L43..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 48)), - ("STM32L45..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 128)), - ("STM32L47..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 96)), - ("STM32L47..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 96)), - ("STM32L49..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 256)), - // L4+. TODO: check - ("STM32L4[PQR]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 192)), - ("STM32L4P..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 192)), - // L5. TODO: check - ("STM32L5...C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 256, SRAM2 0x20030000 0)), - ("STM32L5...E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 256, SRAM2 0x20030000 0)), + ("STM32L15..B..", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32)), + ("STM32L15..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 16)), + // L4 + ("STM32L4...8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 32, SRAM2 0x20008000 8, SRAM2_ICODE 0x10000000 8)), + ("STM32L4[12]..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 32, SRAM2 0x20008000 8, SRAM2_ICODE 0x10000000 8)), + ("STM32L43..B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 48, SRAM2 0x2000c000 16, SRAM2_ICODE 0x10000000 16)), + ("STM32L45..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 128, SRAM2 0x20020000 32, SRAM2_ICODE 0x10000000 32)), + ("STM32L4[34]..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 48, SRAM2 0x2000c000 16, SRAM2_ICODE 0x10000000 16)), + ("STM32L4[56]..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 128, SRAM2 0x20020000 32, SRAM2_ICODE 0x10000000 32)), + + ("STM32L47..C", mem!(BANK_1 0x08000000 128, BANK_2 0x08020000 128, SRAM 0x20000000 96, SRAM2_ICODE 0x10000000 32)), + ("STM32L47..E", mem!(BANK_1 0x08000000 256, BANK_2 0x08040000 256, SRAM 0x20000000 96, SRAM2_ICODE 0x10000000 32)), + ("STM32L49..E", mem!(BANK_1 0x08000000 256, BANK_2 0x08040000 256, SRAM 0x20000000 256, SRAM2 0x20040000 64, SRAM2_ICODE 0x10000000 64)), + ("STM32L4[78]..G", mem!(BANK_1 0x08000000 512, BANK_2 0x08080000 512, SRAM 0x20000000 96, SRAM2_ICODE 0x10000000 32)), + ("STM32L4[9A]..G", mem!(BANK_1 0x08000000 512, BANK_2 0x08080000 512, SRAM 0x20000000 256, SRAM2 0x20040000 64, SRAM2_ICODE 0x10000000 64)), + // L4+ + ("STM32L4P..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 320)), + ("STM32L4[PQ]..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 320)), + ("STM32L4R..G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 640)), + ("STM32L4[RS]..I", mem!(BANK_1 0x08000000 2048, SRAM 0x20000000 640)), + // L5 + ("STM32L5...C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 256)), + ("STM32L5...E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 256)), // U0 ("STM32U031.4", mem!(BANK_1 0x08000000 16, SRAM 0x20000000 12)), ("STM32U031.6", mem!(BANK_1 0x08000000 32, SRAM 0x20000000 12)), @@ -222,23 +233,24 @@ static MEMS: RegexMap<&[Mem]> = RegexMap::new(&[ ("STM32U5[9A]..J", mem!(BANK_1 0x08000000 2048, BANK_2 0x08200000 2048, SRAM 0x20000000 768, SRAM2 0x200c0000 64, SRAM3 0x200d0000 832, SRAM5 0x201a0000 832)), ("STM32U5[FG]..I", mem!(BANK_1 0x08000000 1024, BANK_2 0x08200000 1024, SRAM 0x20000000 768, SRAM2 0x200c0000 64, SRAM3 0x200d0000 832, SRAM5 0x201a0000 832, SRAM6 0x20270000 512)), ("STM32U5[FG]..J", mem!(BANK_1 0x08000000 2048, BANK_2 0x08200000 2048, SRAM 0x20000000 768, SRAM2 0x200c0000 64, SRAM3 0x200d0000 832, SRAM5 0x201a0000 832, SRAM6 0x20270000 512)), - // WB. TODO: check - ("STM32WB...Y", mem!(BANK_1 0x08000000 640, SRAM 0x20000000 192)), - ("STM32WB.(0C|5V)G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 128)), - ("STM32WB.(5C|5R)G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 192)), - ("STM32WB1..C", mem!(BANK_1 0x08000000 320, SRAM 0x20000000 12)), - ("STM32WB3..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 96)), - ("STM32WB3..E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 96)), - ("STM32WB5..C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 128)), - ("STM32WB5.[CR]E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 192)), - ("STM32WB5.VE", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 128)), - // WBA. TODO: check - ("STM32WBA...E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 96, SRAM2 0x20010000 0)), - ("STM32WBA...G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 128, SRAM2 0x20010000 0)), - // WL. TODO: check - ("STM32WL...8", mem!(BANK_1 0x08000000 64, SRAM 0x20000000 12, SRAM2 0x20008000 0)), - ("STM32WL...B", mem!(BANK_1 0x08000000 128, SRAM 0x20000000 12, SRAM2 0x20008000 0)), - ("STM32WL...C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 12, SRAM2 0x20008000 0)), + // WB + ("STM32WB10CC", mem!(BANK_1 0x08000000 320, SRAM 0x20000000 12, SRAM2A 0x20030000 32, SRAM2B 0x20038000 4, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 4)), + ("STM32WB15CC", mem!(BANK_1 0x08000000 320, SRAM 0x20000000 12, SRAM2A 0x20030000 32, SRAM2B 0x20038000 4, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 4)), + ("STM32WB30CE", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 32, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + ("STM32WB50CG", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 64, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + ("STM32WB35.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 32, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + ("STM32WB35.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 32, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + ("STM32WB55.C", mem!(BANK_1 0x08000000 256, SRAM 0x20000000 64, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + ("STM32WB55.E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 192, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + ("STM32WB55.Y", mem!(BANK_1 0x08000000 640, SRAM 0x20000000 192, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + ("STM32WB55.G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 192, SRAM2A 0x20030000 32, SRAM2B 0x20038000 32, SRAM2A_ICODE 0x10000000 32, SRAM2B_ICODE 0x10008000 32)), + // WBA + ("STM32WBA...E", mem!(BANK_1 0x08000000 512, SRAM 0x20000000 96)), + ("STM32WBA...G", mem!(BANK_1 0x08000000 1024, SRAM 0x20000000 128)), + // WL + ("STM32WL[5E]..8", mem!(BANK_1 0x08000000 64, SRAM1 0x20000000 10, SRAM2 0x20002800 10)), + ("STM32WL[5E]..B", mem!(BANK_1 0x08000000 128, SRAM1 0x20000000 24, SRAM2 0x20006000 24)), + ("STM32WL[5E]..C", mem!(BANK_1 0x08000000 256, SRAM1 0x20000000 32, SRAM2 0x20008000 32)), ]); struct FlashInfo {