bone_fpga_4l_pg2.sch

v 20090830 2
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Beaglebone FPGA board V1.5: Config, Clock & I/O Interface
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T 6295 12945 5 10 1 1 0 0 1
pinnumber=16
T 6500 12900 5 10 0 0 0 6 1
pinseq=16
}
T 3400 12800 8 10 0 1 0 0 1
footprint=TSSOP16
T 5200 13900 8 10 0 1 0 0 1
device=PCF8574_TS
T 4100 13900 5 10 0 1 0 0 1
refdes=U?
P 6500 13100 6200 13100 1 0 0
{
T 6500 13100 5 10 0 0 0 6 1
pintype=pas
T 6145 13095 5 10 1 1 0 6 1
pinlabel=P5
T 6295 13145 5 10 1 1 0 0 1
pinnumber=17
T 6500 13100 5 10 0 0 0 6 1
pinseq=17
}
P 6500 13300 6200 13300 1 0 0
{
T 6500 13300 5 10 0 0 0 6 1
pintype=pas
T 6145 13295 5 10 1 1 0 6 1
pinlabel=NC
T 6295 13345 5 10 1 1 0 0 1
pinnumber=18
T 6500 13300 5 10 0 0 0 6 1
pinseq=18
}
P 6500 13500 6200 13500 1 0 0
{
T 6500 13500 5 10 0 0 0 6 1
pintype=pas
T 6145 13495 5 10 1 1 0 6 1
pinlabel=P6
T 6295 13545 5 10 1 1 0 0 1
pinnumber=19
T 6500 13500 5 10 0 0 0 6 1
pinseq=19
}
P 6500 13700 6200 13700 1 0 0
{
T 6500 13700 5 10 0 0 0 6 1
pintype=pas
T 6145 13695 5 10 1 1 0 6 1
pinlabel=P7
T 6295 13745 5 10 1 1 0 0 1
pinnumber=20
T 6500 13700 5 10 0 0 0 6 1
pinseq=20
}
]
{
T 3400 12800 5 10 0 1 0 0 1
footprint=SSOP20
T 5200 13900 5 10 1 1 0 0 1
device=PCF8574_TS
T 4100 13900 5 10 1 1 0 0 1
refdes=U201
}
N 3400 12100 3400 12700 4
N 3800 12900 2900 12900 4
N 3200 14300 3200 12900 4
N 3800 13500 3600 13500 4
N 3600 13500 3600 14100 4
N 3800 13100 3400 13100 4
N 3400 13100 3400 13700 4
N 6500 12500 7000 12500 4
C 7600 12400 1 0 0 EMBEDDEDgnd-1.sym
[
T 7900 12450 8 10 0 0 0 0 1
net=GND:1
P 7700 12500 7700 12700 1 0 1
{
T 7758 12561 5 4 0 1 0 0 1
pintype=pwr
T 7758 12561 5 4 0 1 0 0 1
pinlabel=1
T 7758 12561 5 4 0 0 0 0 1
pinseq=1
T 7758 12561 5 4 0 1 0 0 1
pinnumber=1
}
L 7600 12500 7800 12500 3 0 0 0 -1 -1
L 7655 12450 7745 12450 3 0 0 0 -1 -1
L 7680 12410 7720 12410 3 0 0 0 -1 -1
]
N 6500 12700 7700 12700 4
N 19600 10700 17100 10700 4
N 19600 11200 19600 10700 4
N 17600 11200 17600 10700 4
C 8300 12200 1 0 0 EMBEDDEDoutput-1.sym
[
P 8300 12300 8500 12300 1 0 0
{
T 8550 12250 5 6 0 1 0 0 1
pinnumber=1
T 8550 12250 5 6 0 0 0 0 1
pinseq=1
}
L 8500 12400 8500 12200 3 0 0 0 -1 -1
L 8500 12400 9000 12400 3 0 0 0 -1 -1
L 9000 12400 9100 12300 3 0 0 0 -1 -1
L 9100 12300 9000 12200 3 0 0 0 -1 -1
L 9000 12200 8500 12200 3 0 0 0 -1 -1
T 8400 12500 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 8400 12500 5 10 0 0 0 0 1
device=OUTPUT
T 9200 12200 5 10 1 1 0 0 1
value=OMAP_FLASH_DRV_N
T 8300 12200 5 10 0 1 180 0 1
net=OMAP_FLASH_DRV_N:1
}
T 8500 12000 9 10 1 0 0 0 1
P3 Selects OMAP(0) or SPI Flash(1) as DIN
N 8300 12300 7000 12300 4
N 7000 12300 7000 12500 4
C 8300 12800 1 0 0 EMBEDDEDoutput-1.sym
[
P 8300 12900 8500 12900 1 0 0
{
T 8550 12850 5 6 0 1 0 0 1
pinnumber=1
T 8550 12850 5 6 0 0 0 0 1
pinseq=1
}
L 8500 13000 8500 12800 3 0 0 0 -1 -1
L 8500 13000 9000 13000 3 0 0 0 -1 -1
L 9000 13000 9100 12900 3 0 0 0 -1 -1
L 9100 12900 9000 12800 3 0 0 0 -1 -1
L 9000 12800 8500 12800 3 0 0 0 -1 -1
T 8400 13100 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 8400 13100 5 10 0 0 0 0 1
device=OUTPUT
T 9200 12800 5 10 1 1 0 0 1
value=FPGA_SPI_MODE
T 8300 12800 5 10 0 0 0 0 1
net=FPGA_SPI_MODE:1
}
T 8500 12600 9 10 1 0 0 0 1
P4 enables SPI config mode (default @ POR).
N 7400 9600 7400 6500 4
C 7400 9400 1 0 1 EMBEDDEDled-3.sym
[
L 7000 9900 6950 9875 3 0 0 0 -1 -1
L 7000 9900 6975 9850 3 0 0 0 -1 -1
L 7100 9900 7050 9875 3 0 0 0 -1 -1
L 7100 9900 7075 9850 3 0 0 0 -1 -1
L 7000 9800 7100 9900 3 0 0 0 -1 -1
L 6900 9800 7000 9900 3 0 0 0 -1 -1
L 6800 9600 6700 9600 3 0 0 0 -1 -1
L 7200 9600 7100 9600 3 0 0 0 -1 -1
P 6500 9600 6700 9600 1 0 0
{
T 6600 9550 5 8 0 1 180 6 1
pinnumber=2
T 6000 9550 9 8 0 1 180 6 1
pinlabel=ANODE
T 6400 9750 5 8 0 0 180 2 1
pintype=pas
T 6400 9650 5 8 0 0 180 2 1
pinseq=2
}
P 7400 9600 7200 9600 1 0 0
{
T 7200 9550 5 8 0 1 180 6 1
pinnumber=1
T 6600 10050 9 8 0 1 180 6 1
pinlabel=CATHODE
T 6500 10250 5 8 0 0 180 6 1
pintype=pas
T 6800 10350 5 8 0 0 180 6 1
pinseq=1
}
L 7100 9400 7100 9800 3 0 0 0 -1 -1
L 7100 9600 6800 9800 3 0 0 0 -1 -1
L 6800 9400 7100 9600 3 0 0 0 -1 -1
L 6800 9400 6800 9800 3 0 0 0 -1 -1
T 6450 9850 5 10 0 0 0 6 1
numslots=0
T 6450 9950 5 10 0 0 0 6 1
description=Generic LED
T 6950 9950 8 10 0 1 0 6 1
refdes=D?
T 6450 10050 5 10 0 0 0 6 1
device=LED
]
{
T 6450 10050 5 10 0 0 0 6 1
device=LED
T 6950 9850 5 10 1 1 0 6 1
refdes=LED201
T 7400 9400 5 10 0 0 0 0 1
footprint=805_pol
}
C 4900 9700 1 180 1 EMBEDDEDresistor-1.sym
[
L 5101 9500 5050 9600 3 0 0 0 -1 -1
P 4900 9600 5052 9600 1 0 0
{
T 5000 9550 5 8 0 1 180 6 1
pinnumber=1
T 5000 9550 5 8 0 0 180 6 1
pinseq=1
T 5000 9550 5 8 0 1 180 6 1
pinlabel=1
T 5000 9550 5 8 0 1 180 6 1
pintype=pas
}
P 5800 9600 5650 9600 1 0 0
{
T 5700 9550 5 8 0 1 180 6 1
pinnumber=2
T 5700 9550 5 8 0 0 180 6 1
pinseq=2
T 5700 9550 5 8 0 1 180 6 1
pinlabel=2
T 5700 9550 5 8 0 1 180 6 1
pintype=pas
}
L 5600 9700 5650 9600 3 0 0 0 -1 -1
L 5500 9500 5600 9700 3 0 0 0 -1 -1
L 5200 9700 5100 9500 3 0 0 0 -1 -1
L 5300 9500 5200 9700 3 0 0 0 -1 -1
L 5400 9700 5300 9500 3 0 0 0 -1 -1
L 5500 9500 5400 9700 3 0 0 0 -1 -1
T 4900 9700 8 10 0 1 180 6 1
class=DISCRETE
T 4900 9700 8 10 0 1 180 6 1
pins=2
T 5100 9400 8 10 0 1 180 6 1
refdes=R?
T 5200 9300 5 10 0 0 180 6 1
device=RESISTOR
]
{
T 5200 9300 5 10 0 0 180 6 1
device=RESISTOR
T 5700 9700 5 10 1 1 0 6 1
refdes=R201
T 5200 9700 5 10 1 1 0 6 1
value=330
T 4900 9700 5 10 0 0 270 2 1
footprint=0805
}
N 6500 9600 5800 9600 4
C 7300 6200 1 0 0 EMBEDDEDgnd-1.sym
[
L 7380 6210 7420 6210 3 0 0 0 -1 -1
L 7355 6250 7445 6250 3 0 0 0 -1 -1
L 7300 6300 7500 6300 3 0 0 0 -1 -1
P 7400 6300 7400 6500 1 0 1
{
T 7458 6361 5 4 0 1 0 0 1
pinnumber=1
T 7458 6361 5 4 0 0 0 0 1
pinseq=1
T 7458 6361 5 4 0 1 0 0 1
pinlabel=1
T 7458 6361 5 4 0 1 0 0 1
pintype=pwr
}
T 7600 6250 8 10 0 0 0 0 1
net=GND:1
]
C 4900 7800 1 180 1 EMBEDDEDresistor-1.sym
[
L 5500 7600 5400 7800 3 0 0 0 -1 -1
L 5400 7800 5300 7600 3 0 0 0 -1 -1
L 5300 7600 5200 7800 3 0 0 0 -1 -1
L 5200 7800 5100 7600 3 0 0 0 -1 -1
L 5500 7600 5600 7800 3 0 0 0 -1 -1
L 5600 7800 5650 7700 3 0 0 0 -1 -1
P 5800 7700 5650 7700 1 0 0
{
T 5700 7650 5 8 0 1 180 6 1
pinnumber=2
T 5700 7650 5 8 0 0 180 6 1
pinseq=2
T 5700 7650 5 8 0 1 180 6 1
pinlabel=2
T 5700 7650 5 8 0 1 180 6 1
pintype=pas
}
P 4900 7700 5052 7700 1 0 0
{
T 5000 7650 5 8 0 1 180 6 1
pinnumber=1
T 5000 7650 5 8 0 0 180 6 1
pinseq=1
T 5000 7650 5 8 0 1 180 6 1
pinlabel=1
T 5000 7650 5 8 0 1 180 6 1
pintype=pas
}
L 5101 7600 5050 7700 3 0 0 0 -1 -1
T 5200 7400 5 10 0 0 180 6 1
device=RESISTOR
T 5100 7500 8 10 0 1 180 6 1
refdes=R?
T 4900 7800 8 10 0 1 180 6 1
pins=2
T 4900 7800 8 10 0 1 180 6 1
class=DISCRETE
]
{
T 5200 7400 5 10 0 0 180 6 1
device=RESISTOR
T 5700 7800 5 10 1 1 0 6 1
refdes=R202
T 5200 7800 5 10 1 1 0 6 1
value=330
T 4900 7800 5 10 0 0 270 2 1
footprint=0805
}
C 7400 7500 1 0 1 EMBEDDEDled-3.sym
[
L 6800 7500 6800 7900 3 0 0 0 -1 -1
L 6800 7500 7100 7700 3 0 0 0 -1 -1
L 7100 7700 6800 7900 3 0 0 0 -1 -1
L 7100 7500 7100 7900 3 0 0 0 -1 -1
P 7400 7700 7200 7700 1 0 0
{
T 7200 7650 5 8 0 1 180 6 1
pinnumber=1
T 6600 8150 9 8 0 1 180 6 1
pinlabel=CATHODE
T 6500 8350 5 8 0 0 180 6 1
pintype=pas
T 6800 8450 5 8 0 0 180 6 1
pinseq=1
}
P 6500 7700 6700 7700 1 0 0
{
T 6600 7650 5 8 0 1 180 6 1
pinnumber=2
T 6000 7650 9 8 0 1 180 6 1
pinlabel=ANODE
T 6400 7850 5 8 0 0 180 2 1
pintype=pas
T 6400 7750 5 8 0 0 180 2 1
pinseq=2
}
L 7200 7700 7100 7700 3 0 0 0 -1 -1
L 6800 7700 6700 7700 3 0 0 0 -1 -1
L 6900 7900 7000 8000 3 0 0 0 -1 -1
L 7000 7900 7100 8000 3 0 0 0 -1 -1
L 7100 8000 7075 7950 3 0 0 0 -1 -1
L 7100 8000 7050 7975 3 0 0 0 -1 -1
L 7000 8000 6975 7950 3 0 0 0 -1 -1
L 7000 8000 6950 7975 3 0 0 0 -1 -1
T 6450 8150 5 10 0 0 0 6 1
device=LED
T 6950 8050 8 10 0 1 0 6 1
refdes=D?
T 6450 8050 5 10 0 0 0 6 1
description=Generic LED
T 6450 7950 5 10 0 0 0 6 1
numslots=0
]
{
T 6450 8150 5 10 0 0 0 6 1
device=LED
T 6950 7950 5 10 1 1 0 6 1
refdes=LED202
T 7400 7500 5 10 0 0 0 0 1
footprint=805_pol
}
N 5800 7700 6500 7700 4
T 6000 9600 9 10 1 0 0 0 1
USER0
T 6000 7700 9 10 1 0 0 0 1
USER1
C 4900 9500 1 0 1 EMBEDDEDoutput-1.sym
[
L 4200 9500 4700 9500 3 0 0 0 -1 -1
L 4100 9600 4200 9500 3 0 0 0 -1 -1
L 4200 9700 4100 9600 3 0 0 0 -1 -1
L 4700 9700 4200 9700 3 0 0 0 -1 -1
L 4700 9700 4700 9500 3 0 0 0 -1 -1
P 4900 9600 4700 9600 1 0 0
{
T 4650 9550 5 6 0 1 0 6 1
pinnumber=1
T 4650 9550 5 6 0 0 0 6 1
pinseq=1
}
T 4800 9800 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4800 9800 5 10 0 0 0 6 1
device=OUTPUT
T 4000 9500 5 10 1 1 0 6 1
value=LED0
T 4900 9500 5 10 0 1 180 6 1
net=LED0:1
}
C 4900 7600 1 0 1 EMBEDDEDoutput-1.sym
[
L 4200 7600 4700 7600 3 0 0 0 -1 -1
L 4100 7700 4200 7600 3 0 0 0 -1 -1
L 4200 7800 4100 7700 3 0 0 0 -1 -1
L 4700 7800 4200 7800 3 0 0 0 -1 -1
L 4700 7800 4700 7600 3 0 0 0 -1 -1
P 4900 7700 4700 7700 1 0 0
{
T 4650 7650 5 6 0 1 0 6 1
pinnumber=1
T 4650 7650 5 6 0 0 0 6 1
pinseq=1
}
T 4800 7900 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4800 7900 5 10 0 0 0 6 1
device=OUTPUT
T 4000 7600 5 10 1 1 0 6 1
value=LED1
T 4900 7600 5 10 0 1 180 6 1
net=LED1:1
}
C 6300 8600 1 0 0 EMBEDDEDbtn_tl1105.sym
[
P 6300 9100 6600 9100 1 0 0
{
T 6300 9100 5 10 0 0 0 0 1
pintype=unknown
T 6655 9095 5 10 0 1 0 0 1
pinlabel=unknown
T 6505 9145 5 10 1 1 0 6 1
pinnumber=1
T 6300 9100 5 10 0 0 0 0 1
pinseq=1
}
P 7300 9100 7000 9100 1 0 0
{
T 7300 9100 5 10 0 0 0 6 1
pintype=unknown
T 6945 9095 5 10 0 1 0 6 1
pinlabel=unknown
T 7095 9145 5 10 1 1 0 0 1
pinnumber=2
T 7300 9100 5 10 0 0 0 6 1
pinseq=2
}
P 6300 8600 6600 8600 1 0 0
{
T 6300 8600 5 10 0 0 0 0 1
pintype=unknown
T 6655 8595 5 10 0 1 0 0 1
pinlabel=unknown
T 6505 8645 5 10 1 1 0 6 1
pinnumber=3
T 6300 8600 5 10 0 0 0 0 1
pinseq=3
}
P 7300 8600 7000 8600 1 0 0
{
T 7300 8600 5 10 0 0 0 6 1
pintype=unknown
T 6945 8595 5 10 0 1 0 6 1
pinlabel=unknown
T 7095 8645 5 10 1 1 0 0 1
pinnumber=4
T 7300 8600 5 10 0 0 0 6 1
pinseq=4
}
L 6600 9100 7000 9100 3 0 0 0 -1 -1
L 6600 8600 7000 8600 3 0 0 0 -1 -1
L 6800 8700 6800 8600 3 0 0 0 -1 -1
L 6800 9100 6800 9000 3 0 0 0 -1 -1
L 6900 8700 6900 9000 3 0 0 0 -1 -1
L 6900 8900 7000 8900 3 0 0 0 -1 -1
L 7000 8900 7000 8800 3 0 0 0 -1 -1
L 7000 8800 6900 8800 3 0 0 0 -1 -1
T 6295 8595 8 10 0 1 0 0 1
footprint=btn_tl1105
T 6295 8595 8 10 0 1 0 0 1
device=btn_tl1105
]
{
T 6295 8595 5 10 0 1 0 0 1
footprint=btn_kmr241
T 6295 8595 5 10 0 1 0 0 1
device=btn_tl1105
T 6500 8400 5 10 1 1 0 0 1
refdes=BTN201
}
C 6300 6700 1 0 0 EMBEDDEDbtn_tl1105.sym
[
P 6300 7200 6600 7200 1 0 0
{
T 6300 7200 5 10 0 0 0 0 1
pintype=unknown
T 6655 7195 5 10 0 1 0 0 1
pinlabel=unknown
T 6505 7245 5 10 1 1 0 6 1
pinnumber=1
T 6300 7200 5 10 0 0 0 0 1
pinseq=1
}
P 7300 7200 7000 7200 1 0 0
{
T 7300 7200 5 10 0 0 0 6 1
pintype=unknown
T 6945 7195 5 10 0 1 0 6 1
pinlabel=unknown
T 7095 7245 5 10 1 1 0 0 1
pinnumber=2
T 7300 7200 5 10 0 0 0 6 1
pinseq=2
}
P 6300 6700 6600 6700 1 0 0
{
T 6300 6700 5 10 0 0 0 0 1
pintype=unknown
T 6655 6695 5 10 0 1 0 0 1
pinlabel=unknown
T 6505 6745 5 10 1 1 0 6 1
pinnumber=3
T 6300 6700 5 10 0 0 0 0 1
pinseq=3
}
P 7300 6700 7000 6700 1 0 0
{
T 7300 6700 5 10 0 0 0 6 1
pintype=unknown
T 6945 6695 5 10 0 1 0 6 1
pinlabel=unknown
T 7095 6745 5 10 1 1 0 0 1
pinnumber=4
T 7300 6700 5 10 0 0 0 6 1
pinseq=4
}
L 6600 7200 7000 7200 3 0 0 0 -1 -1
L 6600 6700 7000 6700 3 0 0 0 -1 -1
L 6800 6800 6800 6700 3 0 0 0 -1 -1
L 6800 7200 6800 7100 3 0 0 0 -1 -1
L 6900 6800 6900 7100 3 0 0 0 -1 -1
L 6900 7000 7000 7000 3 0 0 0 -1 -1
L 7000 7000 7000 6900 3 0 0 0 -1 -1
L 7000 6900 6900 6900 3 0 0 0 -1 -1
T 6295 6695 8 10 0 1 0 0 1
footprint=btn_tl1105
T 6295 6695 8 10 0 1 0 0 1
device=btn_tl1105
]
{
T 6295 6695 5 10 0 1 0 0 1
footprint=btn_kmr241
T 6295 6695 5 10 0 1 0 0 1
device=btn_tl1105
T 6500 6500 5 10 1 1 0 0 1
refdes=BTN202
}
C 4900 9000 1 0 1 EMBEDDEDoutput-1.sym
[
P 4900 9100 4700 9100 1 0 0
{
T 4650 9050 5 6 0 0 0 6 1
pinseq=1
T 4650 9050 5 6 0 1 0 6 1
pinnumber=1
}
L 4700 9200 4700 9000 3 0 0 0 -1 -1
L 4700 9200 4200 9200 3 0 0 0 -1 -1
L 4200 9200 4100 9100 3 0 0 0 -1 -1
L 4100 9100 4200 9000 3 0 0 0 -1 -1
L 4200 9000 4700 9000 3 0 0 0 -1 -1
T 4800 9300 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4800 9300 5 10 0 0 0 6 1
device=OUTPUT
T 4000 9000 5 10 1 1 0 6 1
value=BTN0
T 4900 9000 5 10 0 1 180 6 1
net=BTN0:1
}
C 4900 7100 1 0 1 EMBEDDEDoutput-1.sym
[
P 4900 7200 4700 7200 1 0 0
{
T 4650 7150 5 6 0 0 0 6 1
pinseq=1
T 4650 7150 5 6 0 1 0 6 1
pinnumber=1
}
L 4700 7300 4700 7100 3 0 0 0 -1 -1
L 4700 7300 4200 7300 3 0 0 0 -1 -1
L 4200 7300 4100 7200 3 0 0 0 -1 -1
L 4100 7200 4200 7100 3 0 0 0 -1 -1
L 4200 7100 4700 7100 3 0 0 0 -1 -1
T 4800 7400 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4800 7400 5 10 0 0 0 6 1
device=OUTPUT
T 4000 7100 5 10 1 1 0 6 1
value=BTN1
T 4900 7100 5 10 0 1 180 6 1
net=BTN1:1
}
N 6300 9100 4900 9100 4
N 4900 7200 6300 7200 4
N 7300 8600 7400 8600 4
N 7300 6700 7400 6700 4
T 4100 10200 9 10 1 0 0 0 2
On-board User I/O
2x LEDs, 2x Buttons (use FPGA pullups)
C 19300 16600 1 180 0 EMBEDDEDheader28-1.sym
[
T 18700 10900 8 10 0 1 180 0 1
refdes=J?
T 17700 12000 8 10 0 0 180 0 1
device=HEADER28
T 17700 11800 8 10 0 0 180 0 1
class=IO
T 17700 11600 8 10 0 0 180 0 1
pins=34
P 18200 16400 17900 16400 1 0 1
{
T 18050 16350 5 8 1 1 180 0 1
pinnumber=1
T 18050 16350 5 8 0 0 180 0 1
pinseq=1
T 18050 16350 5 8 0 1 180 0 1
pinlabel=1
T 18050 16350 5 8 0 1 180 0 1
pintype=pas
}
P 19300 16400 19000 16400 1 0 0
{
T 19100 16350 5 8 1 1 180 6 1
pinnumber=2
T 19100 16350 5 8 0 0 180 6 1
pinseq=2
T 19100 16350 5 8 0 1 180 6 1
pinlabel=2
T 19100 16350 5 8 0 1 180 6 1
pintype=pas
}
P 18200 16000 17900 16000 1 0 1
{
T 18050 15950 5 8 1 1 180 0 1
pinnumber=3
T 18050 15950 5 8 0 0 180 0 1
pinseq=3
T 18050 15950 5 8 0 1 180 0 1
pinlabel=3
T 18050 15950 5 8 0 1 180 0 1
pintype=pas
}
P 19300 16000 19000 16000 1 0 0
{
T 19100 15950 5 8 1 1 180 6 1
pinnumber=4
T 19100 15950 5 8 0 0 180 6 1
pinseq=4
T 19100 15950 5 8 0 1 180 6 1
pinlabel=4
T 19100 15950 5 8 0 1 180 6 1
pintype=pas
}
P 18200 15600 17900 15600 1 0 1
{
T 18050 15550 5 8 1 1 180 0 1
pinnumber=5
T 18050 15550 5 8 0 0 180 0 1
pinseq=5
T 18050 15550 5 8 0 1 180 0 1
pinlabel=5
T 18050 15550 5 8 0 1 180 0 1
pintype=pas
}
P 19300 15600 19000 15600 1 0 0
{
T 19100 15550 5 8 1 1 180 6 1
pinnumber=6
T 19100 15550 5 8 0 0 180 6 1
pinseq=6
T 19100 15550 5 8 0 1 180 6 1
pinlabel=6
T 19100 15550 5 8 0 1 180 6 1
pintype=pas
}
P 18200 15200 17900 15200 1 0 1
{
T 18050 15150 5 8 1 1 180 0 1
pinnumber=7
T 18050 15150 5 8 0 0 180 0 1
pinseq=7
T 18050 15150 5 8 0 1 180 0 1
pinlabel=7
T 18050 15150 5 8 0 1 180 0 1
pintype=pas
}
P 19300 15200 19000 15200 1 0 0
{
T 19100 15150 5 8 1 1 180 6 1
pinnumber=8
T 19100 15150 5 8 0 0 180 6 1
pinseq=8
T 19100 15150 5 8 0 1 180 6 1
pinlabel=8
T 19100 15150 5 8 0 1 180 6 1
pintype=pas
}
P 18200 14800 17900 14800 1 0 1
{
T 18050 14750 5 8 1 1 180 0 1
pinnumber=9
T 18050 14750 5 8 0 0 180 0 1
pinseq=9
T 18050 14750 5 8 0 1 180 0 1
pinlabel=9
T 18050 14750 5 8 0 1 180 0 1
pintype=pas
}
P 19300 14800 19000 14800 1 0 0
{
T 19100 14750 5 8 1 1 180 6 1
pinnumber=10
T 19100 14750 5 8 0 0 180 6 1
pinseq=10
T 19100 14750 5 8 0 1 180 6 1
pinlabel=10
T 19100 14750 5 8 0 1 180 6 1
pintype=pas
}
P 18200 14400 17900 14400 1 0 1
{
T 18050 14350 5 8 1 1 180 0 1
pinnumber=11
T 18050 14350 5 8 0 0 180 0 1
pinseq=11
T 18050 14350 5 8 0 1 180 0 1
pinlabel=11
T 18050 14350 5 8 0 1 180 0 1
pintype=pas
}
P 19300 14400 19000 14400 1 0 0
{
T 19100 14350 5 8 1 1 180 6 1
pinnumber=12
T 19100 14350 5 8 0 0 180 6 1
pinseq=12
T 19100 14350 5 8 0 1 180 6 1
pinlabel=12
T 19100 14350 5 8 0 1 180 6 1
pintype=pas
}
P 18200 14000 17900 14000 1 0 1
{
T 18050 13950 5 8 1 1 180 0 1
pinnumber=13
T 18050 13950 5 8 0 0 180 0 1
pinseq=13
T 18050 13950 5 8 0 1 180 0 1
pinlabel=13
T 18050 13950 5 8 0 1 180 0 1
pintype=pas
}
P 19300 14000 19000 14000 1 0 0
{
T 19100 13950 5 8 1 1 180 6 1
pinnumber=14
T 19100 13950 5 8 0 0 180 6 1
pinseq=14
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