From c1733ea2fff2ba6c4a9e1c386cac6693d0e780d3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fin=20Maa=C3=9F?= Date: Thu, 12 Sep 2024 09:48:15 +0200 Subject: [PATCH] build: io: make oe2 of DDRTristate optional MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit make oe2 of DDRTristate optional. Signed-off-by: Fin Maaß --- litex/build/efinix/common.py | 2 +- litex/build/io.py | 8 ++++---- litex/build/lattice/common.py | 3 ++- litex/build/xilinx/common.py | 2 +- 4 files changed, 8 insertions(+), 7 deletions(-) diff --git a/litex/build/efinix/common.py b/litex/build/efinix/common.py index 50d78a8d98..1eba70f4e7 100644 --- a/litex/build/efinix/common.py +++ b/litex/build/efinix/common.py @@ -275,7 +275,7 @@ def lower(dr): class EfinixDDRTristateImpl(LiteXModule): def __init__(self, io, o1, o2, oe1, oe2, i1, i2, clk): - assert oe1 == oe2 + assert oe2 is None assert_is_signal_or_clocksignal(clk) platform = LiteXContext.platform io_name = platform.get_pin_name(io) diff --git a/litex/build/io.py b/litex/build/io.py index b83cac4780..20d53443a6 100644 --- a/litex/build/io.py +++ b/litex/build/io.py @@ -190,20 +190,20 @@ def __init__(self, io, o1, o2, oe1, oe2, i1, i2, clk): _oe = Signal() _i = Signal() self.specials += DDROutput(o1, o2, _o, clk) - self.specials += DDROutput(oe1, oe2, _oe, clk) + self.specials += DDROutput(oe1, oe2, _oe, clk) if oe2 is not None else SDROutput(oe1, _oe, clk) self.specials += DDRInput(_i, i1, i2, clk) self.specials += Tristate(io, _o, _oe, _i) class DDRTristate(Special): - def __init__(self, io, o1, o2, oe1, oe2, i1, i2, clk=None): + def __init__(self, io, o1, o2, oe1, oe2=None, i1=None, i2=None, clk=None): Special.__init__(self) self.io = io self.o1 = o1 self.o2 = o2 self.oe1 = oe1 self.oe2 = oe2 - self.i1 = i1 - self.i2 = i2 + self.i1 = i1 if i1 is not None else Signal() + self.i2 = i2 if i2 is not None else Signal() self.clk = clk if clk is not None else ClockSignal() def iter_expressions(self): diff --git a/litex/build/lattice/common.py b/litex/build/lattice/common.py index 3f3f78e637..cec5ca51dc 100644 --- a/litex/build/lattice/common.py +++ b/litex/build/lattice/common.py @@ -305,11 +305,12 @@ def lower(dr): class LatticeNXDDRTristateImpl(Module): def __init__(self, io, o1, o2, oe1, oe2, i1, i2, clk): + assert oe2 is None _o = Signal() _oe = Signal() _i = Signal() self.specials += DDROutput(o1, o2, _o, clk) - self.specials += SDROutput(oe1 | oe2, _oe, clk) + self.specials += SDROutput(oe1, _oe, clk) self.specials += DDRInput(_i, i1, i2, clk) self.specials += Tristate(io, _o, _oe, _i) _oe.attr.add("syn_useioff") diff --git a/litex/build/xilinx/common.py b/litex/build/xilinx/common.py index d0d6bf0f63..0f2231f70b 100644 --- a/litex/build/xilinx/common.py +++ b/litex/build/xilinx/common.py @@ -164,7 +164,7 @@ def __init__(self, io, o1, o2, oe1, oe2, i1, i2, clk): _oe_n = Signal() _i = Signal() self.specials += DDROutput(o1, o2, _o, clk) - self.specials += DDROutput(~oe1, ~oe2, _oe_n, clk) + self.specials += DDROutput(~oe1, ~oe2, _oe_n, clk) if oe2 is not None else SDROutput(~oe1, _oe_n, clk) self.specials += DDRInput(_i, i1, i2, clk) self.specials += Instance("IOBUF", io_IO = io,