diff --git a/esp-hal/src/dma/gdma.rs b/esp-hal/src/dma/gdma.rs
index 559d979d98b..83c422cb3bb 100644
--- a/esp-hal/src/dma/gdma.rs
+++ b/esp-hal/src/dma/gdma.rs
@@ -147,6 +147,12 @@ impl<const N: u8> RegisterAccess for Channel<N> {
             .modify(|_, w| w.outlink_start().set_bit());
     }
 
+    fn stop_out() {
+        Self::ch()
+            .out_link()
+            .modify(|_, w| w.outlink_stop().set_bit());
+    }
+
     fn last_out_dscr_address() -> usize {
         Self::ch()
             .out_eof_des_addr()
@@ -225,6 +231,12 @@ impl<const N: u8> RegisterAccess for Channel<N> {
             .modify(|_, w| w.inlink_start().set_bit());
     }
 
+    fn stop_in() {
+        Self::ch()
+            .in_link()
+            .modify(|_, w| w.inlink_stop().set_bit());
+    }
+
     fn listen_out(interrupts: impl Into<EnumSet<DmaTxInterrupt>>) {
         Self::out_int().ena().modify(|_, w| {
             for interrupt in interrupts.into() {
diff --git a/esp-hal/src/dma/mod.rs b/esp-hal/src/dma/mod.rs
index 29ca3e50921..264615e7433 100644
--- a/esp-hal/src/dma/mod.rs
+++ b/esp-hal/src/dma/mod.rs
@@ -1378,6 +1378,8 @@ pub trait Rx: crate::private::Sealed {
 
     fn start_transfer(&mut self) -> Result<(), DmaError>;
 
+    fn stop_transfer(&mut self);
+
     #[cfg(esp32s3)]
     fn set_ext_mem_block_size(&self, size: DmaExtMemBKSize);
 
@@ -1455,6 +1457,10 @@ where
         }
     }
 
+    fn stop_transfer(&mut self) {
+        R::stop_in();
+    }
+
     fn waker() -> &'static embassy_sync::waitqueue::AtomicWaker;
 }
 
@@ -1549,6 +1555,10 @@ where
         self.rx_impl.start_transfer()
     }
 
+    fn stop_transfer(&mut self) {
+        self.rx_impl.stop_transfer()
+    }
+
     #[cfg(esp32s3)]
     fn set_ext_mem_block_size(&self, size: DmaExtMemBKSize) {
         CH::Channel::set_in_ext_mem_block_size(size);
@@ -1622,6 +1632,8 @@ pub trait Tx: crate::private::Sealed {
 
     fn start_transfer(&mut self) -> Result<(), DmaError>;
 
+    fn stop_transfer(&mut self);
+
     #[cfg(esp32s3)]
     fn set_ext_mem_block_size(&self, size: DmaExtMemBKSize);
 
@@ -1677,6 +1689,10 @@ where
         }
     }
 
+    fn stop_transfer(&mut self) {
+        R::stop_out();
+    }
+
     fn listen_out(&self, interrupts: impl Into<EnumSet<DmaTxInterrupt>>) {
         R::listen_out(interrupts)
     }
@@ -1783,6 +1799,10 @@ where
         self.tx_impl.start_transfer()
     }
 
+    fn stop_transfer(&mut self) {
+        self.tx_impl.stop_transfer()
+    }
+
     #[cfg(esp32s3)]
     fn set_ext_mem_block_size(&self, size: DmaExtMemBKSize) {
         CH::Channel::set_out_ext_mem_block_size(size);
@@ -1834,6 +1854,7 @@ pub trait RegisterAccess: crate::private::Sealed {
     fn set_out_descriptors(address: u32);
     fn set_out_peripheral(peripheral: u8);
     fn start_out();
+    fn stop_out();
 
     fn listen_out(interrupts: impl Into<EnumSet<DmaTxInterrupt>>);
     fn unlisten_out(interrupts: impl Into<EnumSet<DmaTxInterrupt>>);
@@ -1858,6 +1879,7 @@ pub trait RegisterAccess: crate::private::Sealed {
     fn set_in_descriptors(address: u32);
     fn set_in_peripheral(peripheral: u8);
     fn start_in();
+    fn stop_in();
 }
 
 /// DMA Channel
diff --git a/esp-hal/src/dma/pdma.rs b/esp-hal/src/dma/pdma.rs
index 96c50bf5a47..20d47b0cfdf 100644
--- a/esp-hal/src/dma/pdma.rs
+++ b/esp-hal/src/dma/pdma.rs
@@ -79,6 +79,11 @@ macro_rules! ImplSpiChannel {
                     spi.dma_out_link().modify(|_, w| w.outlink_start().set_bit());
                 }
 
+                fn stop_out() {
+                    let spi = unsafe { &*crate::peripherals::[<SPI $num>]::PTR };
+                    spi.dma_out_link().modify(|_, w| w.outlink_stop().set_bit());
+                }
+
                 fn last_out_dscr_address() -> usize {
                     let spi = unsafe { &*crate::peripherals::[<SPI $num>]::PTR };
                     spi.out_eof_des_addr().read().dma_out_eof_des_addr().bits() as usize
@@ -123,6 +128,11 @@ macro_rules! ImplSpiChannel {
                     spi.dma_in_link().modify(|_, w| w.inlink_start().set_bit());
                 }
 
+                fn stop_in() {
+                    let spi = unsafe { &*crate::peripherals::[<SPI $num>]::PTR };
+                    spi.dma_in_link().modify(|_, w| w.inlink_stop().set_bit());
+                }
+
                 fn listen_out(interrupts: impl Into<EnumSet<DmaTxInterrupt>>) {
                     let spi = unsafe { &*crate::peripherals::[<SPI $num>]::PTR };
                     spi.dma_int_ena().modify(|_, w| {
@@ -462,6 +472,11 @@ macro_rules! ImplI2sChannel {
                     reg_block.out_link().modify(|_, w| w.outlink_start().set_bit());
                 }
 
+                fn stop_out() {
+                    let reg_block = unsafe { &*crate::peripherals::[<$peripheral>]::PTR };
+                    reg_block.out_link().modify(|_, w| w.outlink_stop().set_bit());
+                }
+
                 fn last_out_dscr_address() -> usize {
                     let reg_block = unsafe { &*crate::peripherals::[<$peripheral>]::PTR };
                     reg_block.out_eof_des_addr().read().out_eof_des_addr().bits() as usize
@@ -510,6 +525,11 @@ macro_rules! ImplI2sChannel {
                     reg_block.in_link().modify(|_, w| w.inlink_start().set_bit());
                 }
 
+                fn stop_in() {
+                    let reg_block = unsafe { &*crate::peripherals::[<$peripheral>]::PTR };
+                    reg_block.in_link().modify(|_, w| w.inlink_stop().set_bit());
+                }
+
                 fn listen_out(interrupts: impl Into<EnumSet<DmaTxInterrupt>>) {
                     let reg_block = unsafe { &*crate::peripherals::[<$peripheral>]::PTR };
                     reg_block.int_ena().modify(|_, w| {