From 06cf7df9868875e9c22b605d90165bd4c6e4b7a9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?D=C3=A1niel=20Buga?= <bugadani@gmail.com>
Date: Wed, 13 Nov 2024 19:08:14 +0100
Subject: [PATCH] Reset channel async status when re-creating

---
 esp-hal/src/dma/mod.rs | 14 ++++++++++++++
 esp-hal/src/lib.rs     | 12 ++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/esp-hal/src/dma/mod.rs b/esp-hal/src/dma/mod.rs
index 1a14f1edf0f..575d33d6439 100644
--- a/esp-hal/src/dma/mod.rs
+++ b/esp-hal/src/dma/mod.rs
@@ -1679,6 +1679,13 @@ where
         // channel was previously used for a mem2mem transfer.
         rx_impl.set_mem2mem_mode(false);
 
+        if let Some(interrupt) = rx_impl.peripheral_interrupt() {
+            for cpu in Cpu::all() {
+                crate::interrupt::disable(cpu, interrupt);
+            }
+        }
+        rx_impl.set_async(false);
+
         Self {
             burst_mode: false,
             rx_impl,
@@ -1962,6 +1969,13 @@ where
     CH: DmaChannel,
 {
     fn new(tx_impl: CH::Tx) -> Self {
+        if let Some(interrupt) = tx_impl.peripheral_interrupt() {
+            for cpu in Cpu::all() {
+                crate::interrupt::disable(cpu, interrupt);
+            }
+        }
+        tx_impl.set_async(false);
+
         Self {
             burst_mode: false,
             tx_impl,
diff --git a/esp-hal/src/lib.rs b/esp-hal/src/lib.rs
index 8e17996ebc8..98dae292d8b 100644
--- a/esp-hal/src/lib.rs
+++ b/esp-hal/src/lib.rs
@@ -398,6 +398,18 @@ impl Cpu {
             }
         }
     }
+
+    /// Returns an iterator over all cores.
+    #[inline(always)]
+    pub fn all() -> impl Iterator<Item = Self> {
+        cfg_if::cfg_if! {
+            if #[cfg(multi_core)] {
+                [Cpu::ProCpu, Cpu::AppCpu].into_iter()
+            } else {
+                [Cpu::ProCpu].into_iter()
+            }
+        }
+    }
 }
 
 /// Returns the raw value of the mhartid register.