From 4d9441ef99f83f61dd98695a653c0aa3626b1401 Mon Sep 17 00:00:00 2001 From: Scott Mabin Date: Thu, 30 May 2024 15:22:03 +0100 Subject: [PATCH] Enable the CI feature to check more features in MSRV checks (#1641) * enable the CI feature to check more features in MSRV checks * Rename eh1 feature in esp-lp-hal --- .github/workflows/ci.yml | 20 +++++++------------- esp-hal/Cargo.toml | 1 + esp-lp-hal/Cargo.toml | 2 +- 3 files changed, 9 insertions(+), 14 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index f560db83e29..688bebc337e 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -201,16 +201,13 @@ jobs: components: rust-src - uses: Swatinem/rust-cache@v2 - # TODO: - # - Enable additional (all?) features for MSRV check - # Verify the MSRV for all RISC-V chips. - name: msrv (esp-hal) run: | - cargo xtask build-package --features=esp32c2 --target=riscv32imc-unknown-none-elf esp-hal - cargo xtask build-package --features=esp32c3 --target=riscv32imc-unknown-none-elf esp-hal - cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-hal - cargo xtask build-package --features=esp32h2 --target=riscv32imac-unknown-none-elf esp-hal + cargo xtask build-package --features=esp32c2,ci --target=riscv32imc-unknown-none-elf esp-hal + cargo xtask build-package --features=esp32c3,ci --target=riscv32imc-unknown-none-elf esp-hal + cargo xtask build-package --features=esp32c6,ci --target=riscv32imac-unknown-none-elf esp-hal + cargo xtask build-package --features=esp32h2,ci --target=riscv32imac-unknown-none-elf esp-hal - name: msrv (esp-lp-hal) run: | cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal @@ -222,9 +219,6 @@ jobs: env: RUSTC_BOOTSTRAP: 1 - # TODO: - # - Enable additional (all?) features for MSRV check - steps: - uses: actions/checkout@v4 - uses: esp-rs/xtensa-toolchain@v1.5 @@ -236,9 +230,9 @@ jobs: # Verify the MSRV for all Xtensa chips: - name: msrv (esp-hal) run: | - cargo xtask build-package --toolchain=esp --features=esp32 --target=xtensa-esp32-none-elf esp-hal - cargo xtask build-package --toolchain=esp --features=esp32s2 --target=xtensa-esp32s2-none-elf esp-hal - cargo xtask build-package --toolchain=esp --features=esp32s3 --target=xtensa-esp32s3-none-elf esp-hal + cargo xtask build-package --toolchain=esp --features=esp32,ci --target=xtensa-esp32-none-elf esp-hal + cargo xtask build-package --toolchain=esp --features=esp32s2,ci --target=xtensa-esp32s2-none-elf esp-hal + cargo xtask build-package --toolchain=esp --features=esp32s3,ci --target=xtensa-esp32s3-none-elf esp-hal # -------------------------------------------------------------------------- # Lint & Format diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml index b0ee327b13c..a597a42cddc 100644 --- a/esp-hal/Cargo.toml +++ b/esp-hal/Cargo.toml @@ -216,6 +216,7 @@ ci = [ "async", "embassy", "embassy-time-timg0", + "embedded-io" ] [lints.clippy] diff --git a/esp-lp-hal/Cargo.toml b/esp-lp-hal/Cargo.toml index 4b32db7cea9..bfc8327b414 100644 --- a/esp-lp-hal/Cargo.toml +++ b/esp-lp-hal/Cargo.toml @@ -42,7 +42,7 @@ esp-build = { version = "0.1.0", path = "../esp-build" } default = ["embedded-hal-02"] embedded-hal-02 = ["dep:embedded-hal-02"] -embedded-hal-1 = ["dep:embedded-hal-1"] +embedded-hal = ["dep:embedded-hal-1"] esp32c6 = ["dep:esp32c6-lp", "procmacros/is-lp-core", "dep:nb", "dep:paste"] esp32s2 = ["dep:esp32s2-ulp", "procmacros/is-ulp-core"]