From 53e43a3b7e1a6bed52ecd8ee0004cbeb8335858e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?D=C3=A1niel=20Buga?= <bugadani@gmail.com>
Date: Thu, 19 Sep 2024 19:50:33 +0200
Subject: [PATCH] Attempt to fix test GPIO assingment

---
 hil-test/src/lib.rs    | 20 ++++++++++++++++----
 hil-test/tests/qspi.rs | 19 ++++++++++++++-----
 2 files changed, 30 insertions(+), 9 deletions(-)

diff --git a/hil-test/src/lib.rs b/hil-test/src/lib.rs
index 66c3f5f517f..8b0e99ab7c8 100644
--- a/hil-test/src/lib.rs
+++ b/hil-test/src/lib.rs
@@ -60,11 +60,23 @@ macro_rules! common_test_pins {
     }};
 }
 
+// A GPIO that's not connected to anything. We use the BOOT pin for this, but
+// beware: it has a pullup.
 #[macro_export]
-macro_rules! unconnected_test_pins {
+macro_rules! unconnected_pin {
     ($io:expr) => {{
-        let (a, _) = $crate::common_test_pins!($io);
-        let (_, b) = $crate::i2c_pins!($io);
-        (a, b)
+        cfg_if::cfg_if! {
+            if #[cfg(any(esp32, esp32s2, esp32s3))] {
+                $io.pins.gpio0
+            } else if #[cfg(esp32c6)] {
+                $io.pins.gpio9
+            } else if #[cfg(esp32h2)] {
+                $io.pins.gpio9
+            } else if #[cfg(esp32c2)] {
+                $io.pins.gpio8
+            } else {
+                $io.pins.gpio9
+            }
+        }
     }};
 }
diff --git a/hil-test/tests/qspi.rs b/hil-test/tests/qspi.rs
index c4fe2320eb6..1a53ecca3d1 100644
--- a/hil-test/tests/qspi.rs
+++ b/hil-test/tests/qspi.rs
@@ -1,6 +1,7 @@
 //! QSPI Test Suite
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: defmt
 
 #![no_std]
 #![no_main]
@@ -161,7 +162,7 @@ mod tests {
         let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
 
         let (pin, pin_mirror) = hil_test::common_test_pins!(io);
-        let (unconnected_pin, _) = hil_test::i2c_pins!(io);
+        let unconnected_pin = hil_test::unconnected_pin!(io);
 
         let dma = Dma::new(peripherals.DMA);
 
@@ -296,7 +297,9 @@ mod tests {
     #[timeout(3)]
     #[cfg(pcnt)]
     fn test_spi_writes_correctly_to_pin_0(ctx: Context) {
-        let [mosi, _, _] = ctx.gpios;
+        // For PCNT-using tests we swap the pins around so that the PCNT is not pulled
+        // up by a resistor if the command phase doesn't drive its line.
+        let [_, _, mosi] = ctx.gpios;
 
         let pcnt = Pcnt::new(ctx.pcnt);
         let unit = pcnt.unit0;
@@ -316,7 +319,9 @@ mod tests {
     #[timeout(3)]
     #[cfg(pcnt)]
     fn test_spi_writes_correctly_to_pin_1(ctx: Context) {
-        let [mosi, _, gpio] = ctx.gpios;
+        // For PCNT-using tests we swap the pins around so that the PCNT is not pulled
+        // up by a resistor if the command phase doesn't drive its line.
+        let [gpio, _, mosi] = ctx.gpios;
 
         let pcnt = Pcnt::new(ctx.pcnt);
         let unit = pcnt.unit0;
@@ -340,7 +345,9 @@ mod tests {
     #[timeout(3)]
     #[cfg(pcnt)]
     fn test_spi_writes_correctly_to_pin_2(ctx: Context) {
-        let [mosi, _, gpio] = ctx.gpios;
+        // For PCNT-using tests we swap the pins around so that the PCNT is not pulled
+        // up by a resistor if the command phase doesn't drive its line.
+        let [gpio, _, mosi] = ctx.gpios;
 
         let pcnt = Pcnt::new(ctx.pcnt);
         let unit = pcnt.unit0;
@@ -364,7 +371,9 @@ mod tests {
     #[timeout(3)]
     #[cfg(pcnt)]
     fn test_spi_writes_correctly_to_pin_3(ctx: Context) {
-        let [mosi, _, gpio] = ctx.gpios;
+        // For PCNT-using tests we swap the pins around so that the PCNT is not pulled
+        // up by a resistor if the command phase doesn't drive its line.
+        let [gpio, _, mosi] = ctx.gpios;
 
         let pcnt = Pcnt::new(ctx.pcnt);
         let unit = pcnt.unit0;