From d54f8440a5925f7eb25cf180660703ed8f0d51e8 Mon Sep 17 00:00:00 2001 From: Juraj Sadel Date: Wed, 4 Dec 2024 13:03:39 +0100 Subject: [PATCH] HIL(QOL): Use global timeout instead of timeout macros (#2489) * HIL(QOL): Add missing timeouts to various tests * Increase timeouts for ECC * Use global timeout in hil tests * sha: increase test_digest_of_size_1_to_200 timeout from 10 to 15 seconds --- hil-test/Cargo.toml | 2 +- hil-test/tests/aes.rs | 2 +- hil-test/tests/aes_dma.rs | 2 +- hil-test/tests/clock_monitor.rs | 2 +- hil-test/tests/crc.rs | 2 +- hil-test/tests/critical_section.rs | 2 +- hil-test/tests/delay.rs | 5 +---- hil-test/tests/delay_async.rs | 11 +--------- hil-test/tests/dma_macros.rs | 2 +- hil-test/tests/dma_mem2mem.rs | 2 +- hil-test/tests/ecc.rs | 3 ++- hil-test/tests/embassy_interrupt_executor.rs | 4 +--- hil-test/tests/embassy_interrupt_spi_dma.rs | 4 +--- hil-test/tests/embassy_timers_executors.rs | 12 +---------- hil-test/tests/esp_wifi_floats.rs | 5 +---- hil-test/tests/get_time.rs | 5 +---- hil-test/tests/gpio.rs | 2 +- hil-test/tests/i2c.rs | 5 +---- hil-test/tests/i2s.rs | 2 +- hil-test/tests/init.rs | 6 +----- hil-test/tests/interrupt.rs | 2 +- hil-test/tests/lcd_cam_i8080.rs | 2 +- hil-test/tests/lcd_cam_i8080_async.rs | 2 +- hil-test/tests/parl_io_tx.rs | 4 +--- hil-test/tests/parl_io_tx_async.rs | 4 +--- hil-test/tests/pcnt.rs | 2 +- hil-test/tests/qspi.rs | 14 +------------ hil-test/tests/rmt.rs | 4 +--- hil-test/tests/rsa.rs | 5 +---- hil-test/tests/rsa_async.rs | 5 +---- hil-test/tests/sha.rs | 3 ++- hil-test/tests/spi_full_duplex.rs | 20 +------------------ hil-test/tests/spi_half_duplex_read.rs | 4 +--- hil-test/tests/spi_half_duplex_write.rs | 4 +--- hil-test/tests/spi_half_duplex_write_psram.rs | 4 +--- hil-test/tests/spi_slave.rs | 3 +-- hil-test/tests/systimer.rs | 5 +---- hil-test/tests/twai.rs | 3 +-- hil-test/tests/uart.rs | 5 +---- hil-test/tests/uart_async.rs | 3 +-- hil-test/tests/uart_regression.rs | 3 +-- hil-test/tests/uart_tx_rx.rs | 4 +--- hil-test/tests/uart_tx_rx_async.rs | 3 +-- hil-test/tests/usb_serial_jtag.rs | 2 +- 44 files changed, 46 insertions(+), 144 deletions(-) diff --git a/hil-test/Cargo.toml b/hil-test/Cargo.toml index 19dc56ed5c3..97204555d4e 100644 --- a/hil-test/Cargo.toml +++ b/hil-test/Cargo.toml @@ -220,7 +220,7 @@ digest = { version = "0.10.7", default-features = false } elliptic-curve = { version = "0.13.8", default-features = false, features = ["sec1"] } embassy-executor = { version = "0.6.0", default-features = false } # Add the `embedded-test/defmt` feature for more verbose testing -embedded-test = { version = "0.5.0", default-features = false } +embedded-test = { version = "0.5.0", git = "https://github.com/probe-rs/embedded-test.git", rev = "7109473", default-features = false } fugit = "0.3.7" hex-literal = "0.4.1" nb = "1.1.0" diff --git a/hil-test/tests/aes.rs b/hil-test/tests/aes.rs index bf474107cf6..27d223ba55e 100644 --- a/hil-test/tests/aes.rs +++ b/hil-test/tests/aes.rs @@ -16,7 +16,7 @@ struct Context<'a> { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/aes_dma.rs b/hil-test/tests/aes_dma.rs index be8eb3d804e..56db3ee82d7 100644 --- a/hil-test/tests/aes_dma.rs +++ b/hil-test/tests/aes_dma.rs @@ -15,7 +15,7 @@ use hil_test as _; const DMA_BUFFER_SIZE: usize = 16; #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/clock_monitor.rs b/hil-test/tests/clock_monitor.rs index 31ac0715e63..e8ed1f3f15a 100644 --- a/hil-test/tests/clock_monitor.rs +++ b/hil-test/tests/clock_monitor.rs @@ -13,7 +13,7 @@ struct Context<'a> { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/crc.rs b/hil-test/tests/crc.rs index 22bd7c2041f..b7e8981d53c 100644 --- a/hil-test/tests/crc.rs +++ b/hil-test/tests/crc.rs @@ -11,7 +11,7 @@ use esp_hal::rom::{crc, md5}; use hil_test as _; #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/critical_section.rs b/hil-test/tests/critical_section.rs index e9cad327b52..f49ffe7fb15 100644 --- a/hil-test/tests/critical_section.rs +++ b/hil-test/tests/critical_section.rs @@ -10,7 +10,7 @@ use hil_test as _; #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use esp_hal::sync::Locked; diff --git a/hil-test/tests/delay.rs b/hil-test/tests/delay.rs index 53a8daac625..62d66b848dd 100644 --- a/hil-test/tests/delay.rs +++ b/hil-test/tests/delay.rs @@ -14,7 +14,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 2)] mod tests { use super::*; @@ -27,7 +27,6 @@ mod tests { } #[test] - #[timeout(2)] fn delay_ns(mut ctx: Context) { let t1 = esp_hal::time::now(); ctx.delay.delay_ns(600_000_000); @@ -42,7 +41,6 @@ mod tests { } #[test] - #[timeout(2)] fn delay_700millis(ctx: Context) { let t1 = esp_hal::time::now(); ctx.delay.delay_millis(700); @@ -57,7 +55,6 @@ mod tests { } #[test] - #[timeout(2)] fn delay_1_500_000us(mut ctx: Context) { let t1 = esp_hal::time::now(); ctx.delay.delay_us(1_500_000); diff --git a/hil-test/tests/delay_async.rs b/hil-test/tests/delay_async.rs index 130a679711a..c4ef014f240 100644 --- a/hil-test/tests/delay_async.rs +++ b/hil-test/tests/delay_async.rs @@ -69,7 +69,7 @@ async fn test_async_delay_ms(mut timer: impl DelayNs, duration: u32) { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 2, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; @@ -82,7 +82,6 @@ mod tests { #[cfg(systimer)] #[test] - #[timeout(2)] async fn test_systimer_async_delay_ns(ctx: Context) { let alarms = SystemTimer::new(ctx.peripherals.SYSTIMER); @@ -90,7 +89,6 @@ mod tests { } #[test] - #[timeout(2)] async fn test_timg0_async_delay_ns(ctx: Context) { let timg0 = TimerGroup::new(ctx.peripherals.TIMG0); @@ -101,7 +99,6 @@ mod tests { #[cfg(timg1)] #[test] - #[timeout(2)] async fn test_timg1_async_delay_ns(ctx: Context) { let timg1 = TimerGroup::new(ctx.peripherals.TIMG1); @@ -112,7 +109,6 @@ mod tests { #[cfg(systimer)] #[test] - #[timeout(2)] async fn test_systimer_async_delay_us(ctx: Context) { let alarms = SystemTimer::new(ctx.peripherals.SYSTIMER); @@ -120,7 +116,6 @@ mod tests { } #[test] - #[timeout(2)] async fn test_timg0_async_delay_us(ctx: Context) { let timg0 = TimerGroup::new(ctx.peripherals.TIMG0); @@ -131,7 +126,6 @@ mod tests { #[cfg(timg1)] #[test] - #[timeout(2)] async fn test_timg1_async_delay_us(ctx: Context) { let timg1 = TimerGroup::new(ctx.peripherals.TIMG1); @@ -142,7 +136,6 @@ mod tests { #[cfg(systimer)] #[test] - #[timeout(2)] async fn test_systimer_async_delay_ms(ctx: Context) { let alarms = SystemTimer::new(ctx.peripherals.SYSTIMER); @@ -150,7 +143,6 @@ mod tests { } #[test] - #[timeout(2)] async fn test_timg0_async_delay_ms(ctx: Context) { let timg0 = TimerGroup::new(ctx.peripherals.TIMG0); @@ -161,7 +153,6 @@ mod tests { #[cfg(timg1)] #[test] - #[timeout(2)] async fn test_timg1_async_delay_ms(ctx: Context) { let timg1 = TimerGroup::new(ctx.peripherals.TIMG1); diff --git a/hil-test/tests/dma_macros.rs b/hil-test/tests/dma_macros.rs index d88b15aed36..a017471e923 100644 --- a/hil-test/tests/dma_macros.rs +++ b/hil-test/tests/dma_macros.rs @@ -22,7 +22,7 @@ pub(crate) const fn compute_circular_size(size: usize, chunk_size: usize) -> usi } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { // defmt::* is load-bearing, it ensures that the assert in dma_buffers! is not // using defmt's non-const assert. Doing so would result in a compile error. diff --git a/hil-test/tests/dma_mem2mem.rs b/hil-test/tests/dma_mem2mem.rs index 09961d2517a..57430e9baf6 100644 --- a/hil-test/tests/dma_mem2mem.rs +++ b/hil-test/tests/dma_mem2mem.rs @@ -29,7 +29,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/ecc.rs b/hil-test/tests/ecc.rs index 773043d1e76..894605e70b0 100644 --- a/hil-test/tests/ecc.rs +++ b/hil-test/tests/ecc.rs @@ -48,7 +48,7 @@ struct Context<'a> { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 10)] mod tests { use super::*; @@ -64,6 +64,7 @@ mod tests { } #[test] + #[timeout(5)] fn test_ecc_affine_point_multiplication(mut ctx: Context<'static>) { for &prime_field in TEST_PARAMS_VECTOR.prime_fields { match prime_field.len() { diff --git a/hil-test/tests/embassy_interrupt_executor.rs b/hil-test/tests/embassy_interrupt_executor.rs index f4ddd521f82..7731aa9fa0e 100644 --- a/hil-test/tests/embassy_interrupt_executor.rs +++ b/hil-test/tests/embassy_interrupt_executor.rs @@ -48,7 +48,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod test { use super::*; @@ -91,7 +91,6 @@ mod test { } #[test] - #[timeout(3)] async fn run_interrupt_executor_test(ctx: Context) { let interrupt_executor = mk_static!(InterruptExecutor<1>, InterruptExecutor::new(ctx.interrupt)); @@ -112,7 +111,6 @@ mod test { #[test] #[cfg(multi_core)] - #[timeout(3)] async fn run_interrupt_executor_test_on_core_1(mut ctx: Context) { let app_core_stack = mk_static!(Stack<8192>, Stack::new()); let response = &*mk_static!(Signal, Signal::new()); diff --git a/hil-test/tests/embassy_interrupt_spi_dma.rs b/hil-test/tests/embassy_interrupt_spi_dma.rs index a1dfc346cad..cf1d7e3f1fb 100644 --- a/hil-test/tests/embassy_interrupt_spi_dma.rs +++ b/hil-test/tests/embassy_interrupt_spi_dma.rs @@ -75,12 +75,11 @@ async fn interrupt_driven_task(mut i2s_tx: esp_hal::i2s::master::I2sTx<'static, } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod test { use super::*; #[test] - #[timeout(3)] async fn dma_does_not_lock_up_when_used_in_different_executors() { let peripherals = esp_hal::init(esp_hal::Config::default()); @@ -199,7 +198,6 @@ mod test { // Reproducer of https://github.com/esp-rs/esp-hal/issues/2369 #[cfg(multi_core)] #[test] - #[timeout(3)] async fn dma_does_not_lock_up_on_core_1() { use embassy_time::Timer; use esp_hal::peripherals::SPI2; diff --git a/hil-test/tests/embassy_timers_executors.rs b/hil-test/tests/embassy_timers_executors.rs index a8327acbb55..88f33023596 100644 --- a/hil-test/tests/embassy_timers_executors.rs +++ b/hil-test/tests/embassy_timers_executors.rs @@ -122,7 +122,7 @@ fn set_up_embassy_with_systimer(peripherals: Peripherals) { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod test { use super::*; use crate::test_cases::*; @@ -135,7 +135,6 @@ mod test { } #[test] - #[timeout(3)] async fn test_one_shot_timg(peripherals: Peripherals) { set_up_embassy_with_timg0(peripherals); @@ -143,7 +142,6 @@ mod test { } #[test] - #[timeout(3)] #[cfg(not(feature = "esp32"))] async fn test_one_shot_systimer(peripherals: Peripherals) { set_up_embassy_with_systimer(peripherals); @@ -152,7 +150,6 @@ mod test { } #[test] - #[timeout(3)] fn test_periodic_timg(peripherals: Peripherals) { let timg0 = TimerGroup::new(peripherals.TIMG0); @@ -160,7 +157,6 @@ mod test { } #[test] - #[timeout(3)] #[cfg(not(feature = "esp32"))] fn test_periodic_systimer(peripherals: Peripherals) { let systimer = SystemTimer::new(peripherals.SYSTIMER); @@ -169,7 +165,6 @@ mod test { } #[test] - #[timeout(3)] fn test_periodic_oneshot_timg(peripherals: Peripherals) { let mut timg0 = TimerGroup::new(peripherals.TIMG0); run_test_periodic_timer(&mut timg0.timer0); @@ -177,7 +172,6 @@ mod test { } #[test] - #[timeout(3)] #[cfg(not(feature = "esp32"))] fn test_periodic_oneshot_systimer(peripherals: Peripherals) { let mut systimer = SystemTimer::new(peripherals.SYSTIMER); @@ -186,7 +180,6 @@ mod test { } #[test] - #[timeout(3)] async fn test_join_timg(peripherals: Peripherals) { set_up_embassy_with_timg0(peripherals); @@ -194,7 +187,6 @@ mod test { } #[test] - #[timeout(3)] #[cfg(not(feature = "esp32"))] async fn test_join_systimer(peripherals: Peripherals) { set_up_embassy_with_systimer(peripherals); @@ -204,7 +196,6 @@ mod test { /// Test that the ticker works in tasks ran by the interrupt executors. #[test] - #[timeout(3)] #[cfg(not(feature = "esp32"))] async fn test_interrupt_executor(peripherals: Peripherals) { let timg0 = TimerGroup::new(peripherals.TIMG0); @@ -257,7 +248,6 @@ mod test { /// Test that timg0 and systimer don't have vastly different tick rates. #[test] - #[timeout(3)] async fn tick_test_timer_tick_rates(peripherals: Peripherals) { set_up_embassy_with_timg0(peripherals); diff --git a/hil-test/tests/esp_wifi_floats.rs b/hil-test/tests/esp_wifi_floats.rs index d8eff121747..07ee7d91a53 100644 --- a/hil-test/tests/esp_wifi_floats.rs +++ b/hil-test/tests/esp_wifi_floats.rs @@ -50,7 +50,7 @@ cfg_if::cfg_if! { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -70,7 +70,6 @@ mod tests { #[cfg(multi_core)] #[test] - #[timeout(3)] fn fpu_is_enabled_on_core1(peripherals: Peripherals) { let mut cpu_control = CpuControl::new(peripherals.CPU_CTRL); @@ -94,7 +93,6 @@ mod tests { } #[test] - #[timeout(3)] fn fpu_stays_enabled_with_wifi(peripherals: Peripherals) { let timg0 = TimerGroup::new(peripherals.TIMG0); let _init = esp_wifi::init( @@ -124,7 +122,6 @@ mod tests { #[cfg(multi_core)] #[test] - #[timeout(3)] fn fpu_stays_enabled_with_wifi_on_core1(peripherals: Peripherals) { let mut cpu_control = CpuControl::new(peripherals.CPU_CTRL); diff --git a/hil-test/tests/get_time.rs b/hil-test/tests/get_time.rs index 5d5448e686e..b68f8264802 100644 --- a/hil-test/tests/get_time.rs +++ b/hil-test/tests/get_time.rs @@ -21,7 +21,7 @@ fn time_moves_forward_during(ctx: Context, f: F) { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -35,7 +35,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_current_time(ctx: Context) { let t1 = esp_hal::time::now(); ctx.delay.delay_millis(500); @@ -47,7 +46,6 @@ mod tests { #[cfg(systimer)] #[test] - #[timeout(3)] fn test_current_time_construct_systimer(ctx: Context) { time_moves_forward_during(ctx, |_| { // construct the timer in between calls to current_time @@ -59,7 +57,6 @@ mod tests { #[cfg(esp32)] #[test] - #[timeout(3)] fn test_current_time_construct_timg0(ctx: Context) { time_moves_forward_during(ctx, |_| { // construct the timer in between calls to current_time diff --git a/hil-test/tests/gpio.rs b/hil-test/tests/gpio.rs index 6b6888083bc..7ff28cb4c84 100644 --- a/hil-test/tests/gpio.rs +++ b/hil-test/tests/gpio.rs @@ -39,7 +39,7 @@ pub fn interrupt_handler() { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod tests { use embassy_time::{Duration, Timer}; use esp_hal::gpio::{Event, Flex, OutputOpenDrain}; diff --git a/hil-test/tests/i2c.rs b/hil-test/tests/i2c.rs index b30980ab8b8..14c1620478c 100644 --- a/hil-test/tests/i2c.rs +++ b/hil-test/tests/i2c.rs @@ -28,7 +28,7 @@ const DUT_ADDRESS: u8 = 0x77; const NON_EXISTENT_ADDRESS: u8 = 0x6b; #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -49,7 +49,6 @@ mod tests { } #[test] - #[timeout(3)] fn empty_write_returns_ack_error_for_unknown_address(mut ctx: Context) { assert_eq!( ctx.i2c.write(NON_EXISTENT_ADDRESS, &[]), @@ -59,7 +58,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_read_cali(mut ctx: Context) { let mut read_data = [0u8; 22]; @@ -78,7 +76,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_read_cali_with_transactions(mut ctx: Context) { let mut read_data = [0u8; 22]; diff --git a/hil-test/tests/i2s.rs b/hil-test/tests/i2s.rs index 77bb587e1c5..26fcd78911f 100644 --- a/hil-test/tests/i2s.rs +++ b/hil-test/tests/i2s.rs @@ -97,7 +97,7 @@ fn enable_loopback() { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; diff --git a/hil-test/tests/init.rs b/hil-test/tests/init.rs index cec885c7319..e9991161fef 100644 --- a/hil-test/tests/init.rs +++ b/hil-test/tests/init.rs @@ -16,12 +16,11 @@ use esp_hal::{ use hil_test as _; #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; #[test] - #[timeout(3)] fn test_feeding_timg0_wdt() { let peripherals = esp_hal::init({ let mut config = Config::default(); @@ -41,7 +40,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(timg1)] fn test_feeding_timg1_wdt() { let peripherals = esp_hal::init({ @@ -62,7 +60,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_feeding_timg0_wdt_max_clock() { let peripherals = esp_hal::init({ let mut config = Config::default(); @@ -100,7 +97,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_default_config() { esp_hal::init(Config::default()); diff --git a/hil-test/tests/interrupt.rs b/hil-test/tests/interrupt.rs index 54fc77bfb48..cd34ed6a2af 100644 --- a/hil-test/tests/interrupt.rs +++ b/hil-test/tests/interrupt.rs @@ -58,7 +58,7 @@ fn interrupt20() { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/lcd_cam_i8080.rs b/hil-test/tests/lcd_cam_i8080.rs index 1eb15a5ed7f..fe2d7a04b1d 100644 --- a/hil-test/tests/lcd_cam_i8080.rs +++ b/hil-test/tests/lcd_cam_i8080.rs @@ -43,7 +43,7 @@ struct Context<'d> { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/lcd_cam_i8080_async.rs b/hil-test/tests/lcd_cam_i8080_async.rs index f72d6dec896..482f75667f7 100644 --- a/hil-test/tests/lcd_cam_i8080_async.rs +++ b/hil-test/tests/lcd_cam_i8080_async.rs @@ -28,7 +28,7 @@ struct Context<'d> { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; diff --git a/hil-test/tests/parl_io_tx.rs b/hil-test/tests/parl_io_tx.rs index 501d6a07775..80606c442fc 100644 --- a/hil-test/tests/parl_io_tx.rs +++ b/hil-test/tests/parl_io_tx.rs @@ -41,7 +41,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use defmt::info; @@ -74,7 +74,6 @@ mod tests { #[cfg(esp32c6)] #[test] - #[timeout(3)] fn test_parl_io_tx_16bit_valid_clock_count(ctx: Context) { const BUFFER_SIZE: usize = 64; let tx_buffer = [0u16; BUFFER_SIZE]; @@ -122,7 +121,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_parl_io_tx_8bit_valid_clock_count(ctx: Context) { const BUFFER_SIZE: usize = 64; let tx_buffer = [0u8; BUFFER_SIZE]; diff --git a/hil-test/tests/parl_io_tx_async.rs b/hil-test/tests/parl_io_tx_async.rs index 8b9a6a8a04e..f3f82bcf1dd 100644 --- a/hil-test/tests/parl_io_tx_async.rs +++ b/hil-test/tests/parl_io_tx_async.rs @@ -43,7 +43,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod tests { use defmt::info; @@ -76,7 +76,6 @@ mod tests { #[cfg(esp32c6)] #[test] - #[timeout(3)] async fn test_parl_io_tx_async_16bit_valid_clock_count(ctx: Context) { const BUFFER_SIZE: usize = 64; let tx_buffer = [0u16; BUFFER_SIZE]; @@ -124,7 +123,6 @@ mod tests { } #[test] - #[timeout(3)] async fn test_parl_io_tx_async_8bit_valid_clock_count(ctx: Context) { const BUFFER_SIZE: usize = 64; let tx_buffer = [0u8; BUFFER_SIZE]; diff --git a/hil-test/tests/pcnt.rs b/hil-test/tests/pcnt.rs index 482e7e256a3..758e18f5b86 100644 --- a/hil-test/tests/pcnt.rs +++ b/hil-test/tests/pcnt.rs @@ -20,7 +20,7 @@ struct Context<'d> { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; diff --git a/hil-test/tests/qspi.rs b/hil-test/tests/qspi.rs index c2a0a1d8fbc..b95538f8a84 100644 --- a/hil-test/tests/qspi.rs +++ b/hil-test/tests/qspi.rs @@ -184,7 +184,7 @@ fn execute_write( } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -230,7 +230,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_0(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -241,7 +240,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_1(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -252,7 +250,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_2(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -263,7 +260,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin_3(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -274,7 +270,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_writes_and_reads_correctly_pin_0(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -285,7 +280,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_writes_and_reads_correctly_pin_1(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -296,7 +290,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_writes_and_reads_correctly_pin_2(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -307,7 +300,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_writes_and_reads_correctly_pin_3(ctx: Context) { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); @@ -318,7 +310,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_spi_writes_correctly_to_pin_0(ctx: Context) { // For PCNT-using tests we swap the pins around so that the PCNT is not pulled @@ -342,7 +333,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_spi_writes_correctly_to_pin_1(ctx: Context) { // For PCNT-using tests we swap the pins around so that the PCNT is not pulled @@ -376,7 +366,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_spi_writes_correctly_to_pin_2(ctx: Context) { // For PCNT-using tests we swap the pins around so that the PCNT is not pulled @@ -410,7 +399,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_spi_writes_correctly_to_pin_3(ctx: Context) { // For PCNT-using tests we swap the pins around so that the PCNT is not pulled diff --git a/hil-test/tests/rmt.rs b/hil-test/tests/rmt.rs index 8d7622f2661..1b5320472c9 100644 --- a/hil-test/tests/rmt.rs +++ b/hil-test/tests/rmt.rs @@ -12,7 +12,7 @@ use esp_hal::{ use hil_test as _; #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 1)] mod tests { use esp_hal::rmt::Error; @@ -22,7 +22,6 @@ mod tests { fn init() {} #[test] - #[timeout(1)] fn rmt_loopback() { let peripherals = esp_hal::init(esp_hal::Config::default()); @@ -97,7 +96,6 @@ mod tests { } #[test] - #[timeout(1)] fn rmt_single_shot_fails_without_end_marker() { let peripherals = esp_hal::init(esp_hal::Config::default()); diff --git a/hil-test/tests/rsa.rs b/hil-test/tests/rsa.rs index fed0ffcb6ca..e8f16c66f70 100644 --- a/hil-test/tests/rsa.rs +++ b/hil-test/tests/rsa.rs @@ -49,7 +49,7 @@ const fn compute_mprime(modulus: &U512) -> u32 { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 5)] mod tests { use super::*; @@ -63,7 +63,6 @@ mod tests { } #[test] - #[timeout(5)] fn test_modular_exponentiation(mut ctx: Context<'static>) { const EXPECTED_OUTPUT: [u32; U512::LIMBS] = [ 1601059419, 3994655875, 2600857657, 1530060852, 64828275, 4221878473, 2751381085, @@ -90,7 +89,6 @@ mod tests { } #[test] - #[timeout(5)] fn test_modular_multiplication(mut ctx: Context<'static>) { const EXPECTED_OUTPUT: [u32; U512::LIMBS] = [ 1868256644, 833470784, 4187374062, 2684021027, 191862388, 1279046003, 1929899870, @@ -113,7 +111,6 @@ mod tests { } #[test] - #[timeout(5)] fn test_multiplication(mut ctx: Context<'static>) { const EXPECTED_OUTPUT: [u32; U1024::LIMBS] = [ 1264702968, 3552243420, 2602501218, 498422249, 2431753435, 2307424767, 349202767, diff --git a/hil-test/tests/rsa_async.rs b/hil-test/tests/rsa_async.rs index 671c853a8f4..c200122d23d 100644 --- a/hil-test/tests/rsa_async.rs +++ b/hil-test/tests/rsa_async.rs @@ -49,7 +49,7 @@ const fn compute_mprime(modulus: &U512) -> u32 { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 5, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; @@ -63,7 +63,6 @@ mod tests { } #[test] - #[timeout(5)] async fn modular_exponentiation(mut ctx: Context<'static>) { const EXPECTED_OUTPUT: [u32; U512::LIMBS] = [ 1601059419, 3994655875, 2600857657, 1530060852, 64828275, 4221878473, 2751381085, @@ -91,7 +90,6 @@ mod tests { } #[test] - #[timeout(5)] async fn test_modular_multiplication(mut ctx: Context<'static>) { const EXPECTED_OUTPUT: [u32; U512::LIMBS] = [ 1868256644, 833470784, 4187374062, 2684021027, 191862388, 1279046003, 1929899870, @@ -115,7 +113,6 @@ mod tests { } #[test] - #[timeout(5)] async fn test_multiplication(mut ctx: Context<'static>) { const EXPECTED_OUTPUT: [u32; U1024::LIMBS] = [ 1264702968, 3552243420, 2602501218, 498422249, 2431753435, 2307424767, 349202767, diff --git a/hil-test/tests/sha.rs b/hil-test/tests/sha.rs index 3a97d7618ec..41939ec59d8 100644 --- a/hil-test/tests/sha.rs +++ b/hil-test/tests/sha.rs @@ -158,7 +158,7 @@ pub struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 6)] mod tests { use super::*; @@ -216,6 +216,7 @@ mod tests { /// A test that runs a hashing on a digest of every size between 1 and 200 /// inclusively. #[test] + #[timeout(15)] fn test_digest_of_size_1_to_200(mut ctx: Context) { for i in 1..=200 { assert_sha::(&mut ctx.sha, &SOURCE_DATA[..i]); diff --git a/hil-test/tests/spi_full_duplex.rs b/hil-test/tests/spi_full_duplex.rs index df4c44466dc..58ad1e46213 100644 --- a/hil-test/tests/spi_full_duplex.rs +++ b/hil-test/tests/spi_full_duplex.rs @@ -50,7 +50,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; @@ -98,7 +98,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_symmetric_transfer(mut ctx: Context) { let write = [0xde, 0xad, 0xbe, 0xef]; let mut read: [u8; 4] = [0x00u8; 4]; @@ -109,7 +108,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_asymmetric_transfer(mut ctx: Context) { let write = [0xde, 0xad, 0xbe, 0xef]; let mut read: [u8; 4] = [0x00; 4]; @@ -121,7 +119,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_asymmetric_write(mut ctx: Context) { let write = [0xde, 0xad, 0xbe, 0xef]; @@ -140,7 +137,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_asymmetric_write_transfer(mut ctx: Context) { let write = [0xde, 0xad, 0xbe, 0xef]; @@ -159,7 +155,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_symmetric_transfer_huge_buffer(mut ctx: Context) { let mut write = [0x55u8; 4096]; for byte in 0..write.len() { @@ -172,7 +167,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_symmetric_transfer_huge_buffer_no_alloc(mut ctx: Context) { let mut write = [0x55u8; 4096]; for byte in 0..write.len() { @@ -188,7 +182,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_dma_read_dma_write_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 5; @@ -225,7 +218,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] fn test_dma_read_dma_transfer_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 5; @@ -292,7 +284,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_asymmetric_dma_transfer(ctx: Context) { let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(2, 4); let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); @@ -321,7 +312,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_dma_bus_symmetric_transfer(ctx: Context) { let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4); let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); @@ -341,7 +331,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_dma_bus_asymmetric_transfer(ctx: Context) { let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(4); let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); @@ -361,7 +350,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_dma_bus_symmetric_transfer_huge_buffer(ctx: Context) { const DMA_BUFFER_SIZE: usize = 4096; @@ -383,7 +371,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] async fn test_async_dma_read_dma_write_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 5; @@ -417,7 +404,6 @@ mod tests { } #[test] - #[timeout(3)] #[cfg(pcnt)] async fn test_async_dma_read_dma_transfer_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 5; @@ -453,7 +439,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_write_read(ctx: Context) { let spi = ctx .spi @@ -497,7 +482,6 @@ mod tests { } #[test] - #[timeout(2)] fn cancel_stops_transaction(mut ctx: Context) { // Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds. // This means that without working cancellation, the test case should @@ -522,7 +506,6 @@ mod tests { } #[test] - #[timeout(3)] fn can_transmit_after_cancel(mut ctx: Context) { // Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds. ctx.spi @@ -560,7 +543,6 @@ mod tests { } #[test] - #[timeout(3)] async fn cancelling_an_awaited_transfer_does_nothing(ctx: Context) { // Set up a large buffer that would trigger a timeout let dma_rx_buf = DmaRxBuf::new(ctx.rx_descriptors, ctx.rx_buffer).unwrap(); diff --git a/hil-test/tests/spi_half_duplex_read.rs b/hil-test/tests/spi_half_duplex_read.rs index e3e104ff8c6..5309d7efbb5 100644 --- a/hil-test/tests/spi_half_duplex_read.rs +++ b/hil-test/tests/spi_half_duplex_read.rs @@ -25,7 +25,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -61,7 +61,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_reads_correctly_from_gpio_pin(mut ctx: Context) { const DMA_BUFFER_SIZE: usize = 4; @@ -109,7 +108,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spidmabus_reads_correctly_from_gpio_pin(mut ctx: Context) { const DMA_BUFFER_SIZE: usize = 4; diff --git a/hil-test/tests/spi_half_duplex_write.rs b/hil-test/tests/spi_half_duplex_write.rs index 92ca07daee4..1c92ee205c4 100644 --- a/hil-test/tests/spi_half_duplex_write.rs +++ b/hil-test/tests/spi_half_duplex_write.rs @@ -27,7 +27,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -69,7 +69,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_writes_are_correctly_by_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 4; @@ -119,7 +118,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spidmabus_writes_are_correctly_by_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 4; diff --git a/hil-test/tests/spi_half_duplex_write_psram.rs b/hil-test/tests/spi_half_duplex_write_psram.rs index c2e84892acf..c21b8daae71 100644 --- a/hil-test/tests/spi_half_duplex_write_psram.rs +++ b/hil-test/tests/spi_half_duplex_write_psram.rs @@ -44,7 +44,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -81,7 +81,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spi_writes_are_correctly_by_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 4; const DMA_ALIGNMENT: DmaBufBlkSize = DmaBufBlkSize::Size32; @@ -133,7 +132,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_spidmabus_writes_are_correctly_by_pcnt(ctx: Context) { const DMA_BUFFER_SIZE: usize = 4; const DMA_ALIGNMENT: DmaBufBlkSize = DmaBufBlkSize::Size32; // matches dcache line size diff --git a/hil-test/tests/spi_slave.rs b/hil-test/tests/spi_slave.rs index 5a0472619bc..30ec18b88bb 100644 --- a/hil-test/tests/spi_slave.rs +++ b/hil-test/tests/spi_slave.rs @@ -94,7 +94,7 @@ impl BitbangSpi { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 10, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; @@ -136,7 +136,6 @@ mod tests { } #[test] - #[timeout(10)] fn test_basic(mut ctx: Context) { const DMA_SIZE: usize = 32; let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(DMA_SIZE); diff --git a/hil-test/tests/systimer.rs b/hil-test/tests/systimer.rs index 112e4393c19..647b265cf9d 100644 --- a/hil-test/tests/systimer.rs +++ b/hil-test/tests/systimer.rs @@ -87,7 +87,7 @@ fn target_fail_test_if_called_twice() { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -103,7 +103,6 @@ mod tests { } #[test] - #[timeout(3)] fn target_interrupt_is_handled(ctx: Context) { let mut alarm0 = OneShotTimer::new(ctx.alarm0); @@ -120,7 +119,6 @@ mod tests { } #[test] - #[timeout(3)] fn target_interrupt_is_handled_once(ctx: Context) { let mut alarm0 = OneShotTimer::new(ctx.alarm0); let mut alarm1 = PeriodicTimer::new(ctx.alarm1); @@ -145,7 +143,6 @@ mod tests { } #[test] - #[timeout(3)] fn periodic_interrupt_is_handled(ctx: Context) { let mut alarm1 = PeriodicTimer::new(ctx.alarm1); diff --git a/hil-test/tests/twai.rs b/hil-test/tests/twai.rs index a201ccea9c7..86c95864290 100644 --- a/hil-test/tests/twai.rs +++ b/hil-test/tests/twai.rs @@ -19,7 +19,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -51,7 +51,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_send_receive(mut ctx: Context) { let frame = EspTwaiFrame::new_self_reception(StandardId::ZERO, &[1, 2, 3]).unwrap(); block!(ctx.twai.transmit(&frame)).unwrap(); diff --git a/hil-test/tests/uart.rs b/hil-test/tests/uart.rs index 4fed45a776a..807b179a85d 100644 --- a/hil-test/tests/uart.rs +++ b/hil-test/tests/uart.rs @@ -19,7 +19,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -37,7 +37,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_send_receive(mut ctx: Context) { ctx.uart.write(0x42).ok(); let read = block!(ctx.uart.read()); @@ -45,7 +44,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_send_receive_buffer(mut ctx: Context) { const BUF_SIZE: usize = 128; // UART_FIFO_SIZE @@ -71,7 +69,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_send_receive_different_baud_rates_and_clock_sources(mut ctx: Context) { // The default baud rate for the UART is 115,200, so we will try to // send/receive with some other common baud rates to ensure this is diff --git a/hil-test/tests/uart_async.rs b/hil-test/tests/uart_async.rs index 82eede75cb7..7c60ab9647b 100644 --- a/hil-test/tests/uart_async.rs +++ b/hil-test/tests/uart_async.rs @@ -17,7 +17,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; @@ -35,7 +35,6 @@ mod tests { } #[test] - #[timeout(3)] async fn test_send_receive(mut ctx: Context) { const SEND: &[u8] = b"Hello ESP32"; let mut buf = [0u8; SEND.len()]; diff --git a/hil-test/tests/uart_regression.rs b/hil-test/tests/uart_regression.rs index a88124196d1..26ed3bb66d3 100644 --- a/hil-test/tests/uart_regression.rs +++ b/hil-test/tests/uart_regression.rs @@ -6,7 +6,7 @@ #![no_main] #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use esp_hal::{ gpio::OutputPin, @@ -17,7 +17,6 @@ mod tests { use nb::block; #[test] - #[timeout(3)] fn test_that_creating_tx_does_not_cause_a_pulse() { let peripherals = esp_hal::init(esp_hal::Config::default()); diff --git a/hil-test/tests/uart_tx_rx.rs b/hil-test/tests/uart_tx_rx.rs index 20c3fc18612..5a4c67226b1 100644 --- a/hil-test/tests/uart_tx_rx.rs +++ b/hil-test/tests/uart_tx_rx.rs @@ -19,7 +19,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use super::*; @@ -36,7 +36,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_send_receive(mut ctx: Context) { let byte = [0x42]; @@ -48,7 +47,6 @@ mod tests { } #[test] - #[timeout(3)] fn test_send_receive_bytes(mut ctx: Context) { let bytes = [0x42, 0x43, 0x44]; let mut buf = [0u8; 3]; diff --git a/hil-test/tests/uart_tx_rx_async.rs b/hil-test/tests/uart_tx_rx_async.rs index 8fbb0c226c2..30b916e7584 100644 --- a/hil-test/tests/uart_tx_rx_async.rs +++ b/hil-test/tests/uart_tx_rx_async.rs @@ -18,7 +18,7 @@ struct Context { } #[cfg(test)] -#[embedded_test::tests(executor = esp_hal_embassy::Executor::new())] +#[embedded_test::tests(default_timeout = 3, executor = esp_hal_embassy::Executor::new())] mod tests { use super::*; @@ -39,7 +39,6 @@ mod tests { } #[test] - #[timeout(3)] async fn test_send_receive(mut ctx: Context) { let byte = [0x42]; let mut read = [0u8; 1]; diff --git a/hil-test/tests/usb_serial_jtag.rs b/hil-test/tests/usb_serial_jtag.rs index 4f7cdb32813..f441a91b54f 100644 --- a/hil-test/tests/usb_serial_jtag.rs +++ b/hil-test/tests/usb_serial_jtag.rs @@ -6,7 +6,7 @@ #![no_main] #[cfg(test)] -#[embedded_test::tests] +#[embedded_test::tests(default_timeout = 3)] mod tests { use esp_hal::{timer::timg::TimerGroup, usb_serial_jtag::UsbSerialJtag}; use hil_test as _;