diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md index 58598d36dd6..c70d94ef36a 100644 --- a/esp-hal/CHANGELOG.md +++ b/esp-hal/CHANGELOG.md @@ -54,6 +54,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Changed how `Spi`, (split or unsplit) `Uart`, `LpUart`, `I8080`, `Camera`, `DPI` and `I2C` drivers are constructed (#2610) - I8080, camera, DPI: The various standalone configuration options have been merged into `Config` (#2610) - Dropped GPIO futures stop listening for interrupts (#2625) +- UART driver's `StopBits` enum variants now correctly use UpperCamelCase (#2669) ### Fixed diff --git a/esp-hal/src/uart.rs b/esp-hal/src/uart.rs index 9e5dc7ce61a..be07a6dea2f 100644 --- a/esp-hal/src/uart.rs +++ b/esp-hal/src/uart.rs @@ -374,11 +374,11 @@ pub enum Parity { pub enum StopBits { /// 1 stop bit. #[default] - STOP1 = 1, + Stop1 = 1, /// 1.5 stop bits. - STOP1P5 = 2, + Stop1P5 = 2, /// 2 stop bits. - STOP2 = 3, + Stop2 = 3, } /// UART Configuration @@ -461,7 +461,7 @@ impl Config { _ => 1, }; length += match self.stop_bits { - StopBits::STOP1 => 1, + StopBits::Stop1 => 1, _ => 2, // esp-idf also counts 2 bits for settings 1.5 and 2 stop bits }; length @@ -2549,13 +2549,13 @@ impl Info { #[cfg(esp32)] { // workaround for hardware issue, when UART stop bit set as 2-bit mode. - if stop_bits == StopBits::STOP2 { + if stop_bits == StopBits::Stop2 { self.register_block() .rs485_conf() - .modify(|_, w| w.dl1_en().bit(stop_bits == StopBits::STOP2)); + .modify(|_, w| w.dl1_en().bit(stop_bits == StopBits::Stop2)); self.register_block().conf0().modify(|_, w| { - if stop_bits == StopBits::STOP2 { + if stop_bits == StopBits::Stop2 { unsafe { w.stop_bit_num().bits(1) } } else { unsafe { w.stop_bit_num().bits(stop_bits as u8) }