From c478ceb183271ab43ce7a81f7a29246f6f0dea8f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Thu, 29 Aug 2024 09:41:52 +0200 Subject: [PATCH 1/3] Re-add packages to workspace --- .vscode/settings.json.example | 25 +++++++++++++++++++ Cargo.toml | 17 ++++++++++--- esp-lp-hal/.cargo/config.toml | 4 +-- esp-lp-hal/Cargo.toml | 6 ++--- .../examples/{blinky.rs => lp_blinky.rs} | 0 esp-lp-hal/examples/{i2c.rs => lp_i2c.rs} | 0 esp-lp-hal/examples/{uart.rs => lp_uart.rs} | 0 examples/Cargo.toml | 9 ------- examples/src/bin/lp_core_basic.rs | 2 +- examples/src/bin/lp_core_i2c.rs | 3 +-- examples/src/bin/lp_core_uart.rs | 2 +- examples/src/bin/ulp_riscv_core_basic.rs | 2 +- xtask/src/lib.rs | 4 +-- 13 files changed, 50 insertions(+), 24 deletions(-) create mode 100644 .vscode/settings.json.example rename esp-lp-hal/examples/{blinky.rs => lp_blinky.rs} (100%) rename esp-lp-hal/examples/{i2c.rs => lp_i2c.rs} (100%) rename esp-lp-hal/examples/{uart.rs => lp_uart.rs} (100%) diff --git a/.vscode/settings.json.example b/.vscode/settings.json.example new file mode 100644 index 00000000000..fe35ce53bc1 --- /dev/null +++ b/.vscode/settings.json.example @@ -0,0 +1,25 @@ +{ + // These are recommended settings. + // Should you wish to disable rust-analyzer, you can replace all of this with + // `"rust-analyzer.files.excludeDirs": ["."]`. + // You can also omit all this, but that will cause r-a to try + // (and after a long while, fail) initializing. + // Note that we are not telling rust-analyzer to use an embedded target. + // This results in a few pointer width related errors, but it also means r-a is able + // to cope with xtask and its dependencies. + "rust-analyzer.cargo.allTargets": false, + "rust-analyzer.cargo.targetDir": "target/rust-analyzer", + "rust-analyzer.procMacro.attributes.enable": false, + "rust-analyzer.cargo.features": [ + "esp32c6", + "esp-hal/async", + "esp-hal/log", + "esp-hal-procmacros/has-lp-core", + "esp-backtrace/println", + "esp-backtrace/panic-handler", + "esp-backtrace/exception-handler", + "esp-println/uart", + "esp-println/log", + ], + "editor.formatOnSave": true, +} \ No newline at end of file diff --git a/Cargo.toml b/Cargo.toml index a7c4172d717..6938bc8589f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,11 +1,11 @@ [workspace] resolver = "2" -members = ["xtask"] -exclude = [ +members = [ + "xtask", + "esp-hal", "esp-alloc", "esp-backtrace", "esp-build", - "esp-hal", "esp-hal-embassy", "esp-hal-procmacros", "esp-hal-smartled", @@ -20,8 +20,19 @@ exclude = [ "extras/bench-server", "extras/esp-wifishark", "extras/ieee802154-sniffer", +] +exclude = [ "hil-test", "xtensa-lx", "xtensa-lx-rt", "xtensa-lx-rt/procmacros", ] + +[profile.release] +codegen-units = 1 +debug = 2 +debug-assertions = false +incremental = false +opt-level = 3 +lto = 'fat' +overflow-checks = false diff --git a/esp-lp-hal/.cargo/config.toml b/esp-lp-hal/.cargo/config.toml index 3cf0f9207b6..62bc6838311 100644 --- a/esp-lp-hal/.cargo/config.toml +++ b/esp-lp-hal/.cargo/config.toml @@ -1,7 +1,7 @@ [alias] esp32c6 = "build --release --examples --features=esp32c6 --target riscv32imac-unknown-none-elf" -esp32s2 = "build --release --example=blinky --features=esp32s2 --target riscv32imc-unknown-none-elf" -esp32s3 = "build --release --example=blinky --features=esp32s3 --target riscv32imc-unknown-none-elf" +esp32s2 = "build --release --example=lp_blinky --features=esp32s2 --target riscv32imc-unknown-none-elf" +esp32s3 = "build --release --example=lp_blinky --features=esp32s3 --target riscv32imc-unknown-none-elf" [build] # target = "riscv32imc-unknown-none-elf" # ESP32-S2 + ESP32-S3 diff --git a/esp-lp-hal/Cargo.toml b/esp-lp-hal/Cargo.toml index 72db1c35d42..4f2854a9b39 100644 --- a/esp-lp-hal/Cargo.toml +++ b/esp-lp-hal/Cargo.toml @@ -73,15 +73,15 @@ embedded-hal = ["dep:embedded-hal", "dep:embedded-hal-nb"] embedded-io = ["dep:embedded-io"] [[example]] -name = "blinky" +name = "lp_blinky" required-features = ["embedded-hal-02"] [[example]] -name = "i2c" +name = "lp_i2c" required-features = ["embedded-hal-02", "esp32c6"] [[example]] -name = "uart" +name = "lp_uart" required-features = ["embedded-hal-02", "esp32c6"] [lints.rust] diff --git a/esp-lp-hal/examples/blinky.rs b/esp-lp-hal/examples/lp_blinky.rs similarity index 100% rename from esp-lp-hal/examples/blinky.rs rename to esp-lp-hal/examples/lp_blinky.rs diff --git a/esp-lp-hal/examples/i2c.rs b/esp-lp-hal/examples/lp_i2c.rs similarity index 100% rename from esp-lp-hal/examples/i2c.rs rename to esp-lp-hal/examples/lp_i2c.rs diff --git a/esp-lp-hal/examples/uart.rs b/esp-lp-hal/examples/lp_uart.rs similarity index 100% rename from esp-lp-hal/examples/uart.rs rename to esp-lp-hal/examples/lp_uart.rs diff --git a/examples/Cargo.toml b/examples/Cargo.toml index c05bee62d00..f06e7465459 100644 --- a/examples/Cargo.toml +++ b/examples/Cargo.toml @@ -80,12 +80,3 @@ embassy-generic-timers = ["embassy-time/generic-queue-8"] opsram-2m = ["esp-hal/opsram-2m"] psram-2m = ["esp-hal/psram-2m"] - -[profile.release] -codegen-units = 1 -debug = 2 -debug-assertions = false -incremental = false -opt-level = 3 -lto = 'fat' -overflow-checks = false diff --git a/examples/src/bin/lp_core_basic.rs b/examples/src/bin/lp_core_basic.rs index 81dc1a7a632..1474f189534 100644 --- a/examples/src/bin/lp_core_basic.rs +++ b/examples/src/bin/lp_core_basic.rs @@ -36,7 +36,7 @@ fn main() -> ! { // load code to LP core let lp_core_code = - load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/blinky"); + load_lp_code!("target/riscv32imac-unknown-none-elf/release/examples/lp_blinky"); // start LP core lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_pin); diff --git a/examples/src/bin/lp_core_i2c.rs b/examples/src/bin/lp_core_i2c.rs index b285b4b172d..7b2b937df9f 100644 --- a/examples/src/bin/lp_core_i2c.rs +++ b/examples/src/bin/lp_core_i2c.rs @@ -40,8 +40,7 @@ fn main() -> ! { println!("lp core stopped"); // load code to LP core - let lp_core_code = - load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/i2c"); + let lp_core_code = load_lp_code!("target/riscv32imac-unknown-none-elf/release/examples/lp_i2c"); // start LP core lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_i2c); diff --git a/examples/src/bin/lp_core_uart.rs b/examples/src/bin/lp_core_uart.rs index df795db9682..d07a8bf6b2b 100644 --- a/examples/src/bin/lp_core_uart.rs +++ b/examples/src/bin/lp_core_uart.rs @@ -59,7 +59,7 @@ fn main() -> ! { // Load code to LP core: let lp_core_code = - load_lp_code!("../esp-lp-hal/target/riscv32imac-unknown-none-elf/release/examples/uart"); + load_lp_code!("target/riscv32imac-unknown-none-elf/release/examples/lp_uart"); // Start LP core: lp_core_code.run(&mut lp_core, LpCoreWakeupSource::HpCpu, lp_uart); diff --git a/examples/src/bin/ulp_riscv_core_basic.rs b/examples/src/bin/ulp_riscv_core_basic.rs index 578e7e6a31d..4af8f2eff9e 100644 --- a/examples/src/bin/ulp_riscv_core_basic.rs +++ b/examples/src/bin/ulp_riscv_core_basic.rs @@ -37,7 +37,7 @@ fn main() -> ! { // load code to LP core let lp_core_code = - load_lp_code!("../esp-lp-hal/target/riscv32imc-unknown-none-elf/release/examples/blinky"); + load_lp_code!("target/riscv32imc-unknown-none-elf/release/examples/lp_blinky"); // start LP core lp_core_code.run(&mut ulp_core, ulp_core::UlpCoreWakeupSource::HpCpu, pin); diff --git a/xtask/src/lib.rs b/xtask/src/lib.rs index 6eb98fcbd89..61fed2aede9 100644 --- a/xtask/src/lib.rs +++ b/xtask/src/lib.rs @@ -144,10 +144,10 @@ pub fn build_documentation( let docs_path = windows_safe_path( &workspace - .join(package.to_string()) .join("target") .join(target) - .join("doc"), + .join("doc") + .join(package.to_string().replace('-', "_")), ); Ok(docs_path) From 99107561a60d7f7da26a7401b175c6a7e07078d0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Mon, 2 Sep 2024 11:37:38 +0200 Subject: [PATCH 2/3] Disable all proc macros for now --- .vscode/settings.json.example | 2 +- Cargo.toml | 14 ++++++++++++-- hil-test/Cargo.toml | 19 ------------------- 3 files changed, 13 insertions(+), 22 deletions(-) diff --git a/.vscode/settings.json.example b/.vscode/settings.json.example index fe35ce53bc1..dda8f5d7156 100644 --- a/.vscode/settings.json.example +++ b/.vscode/settings.json.example @@ -9,7 +9,7 @@ // to cope with xtask and its dependencies. "rust-analyzer.cargo.allTargets": false, "rust-analyzer.cargo.targetDir": "target/rust-analyzer", - "rust-analyzer.procMacro.attributes.enable": false, + "rust-analyzer.procMacro.enable": false, "rust-analyzer.cargo.features": [ "esp32c6", "esp-hal/async", diff --git a/Cargo.toml b/Cargo.toml index 6938bc8589f..b8c8fce3dc4 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -20,19 +20,29 @@ members = [ "extras/bench-server", "extras/esp-wifishark", "extras/ieee802154-sniffer", + "hil-test", ] exclude = [ - "hil-test", "xtensa-lx", "xtensa-lx-rt", "xtensa-lx-rt/procmacros", ] +# https://doc.rust-lang.org/cargo/reference/profiles.html#test +# Test and bench profiles inherit from dev and release respectively. +[profile.dev] +codegen-units = 1 +debug = 2 +debug-assertions = true +incremental = false +opt-level = "z" +overflow-checks = true + [profile.release] codegen-units = 1 debug = 2 debug-assertions = false incremental = false opt-level = 3 -lto = 'fat' +lto = "fat" overflow-checks = false diff --git a/hil-test/Cargo.toml b/hil-test/Cargo.toml index 0251bf8fb26..480048b94c0 100644 --- a/hil-test/Cargo.toml +++ b/hil-test/Cargo.toml @@ -228,22 +228,3 @@ generic-queue = [ integrated-timers = [ "esp-hal-embassy/integrated-timers", ] - -# https://doc.rust-lang.org/cargo/reference/profiles.html#test -# Test and bench profiles inherit from dev and release respectively. -[profile.dev] -codegen-units = 1 -debug = 2 -debug-assertions = true -incremental = false -opt-level = "z" -overflow-checks = true - -[profile.release] -codegen-units = 1 -debug = 2 -debug-assertions = false -incremental = false -opt-level = 3 -lto = "fat" -overflow-checks = false From 5194bb3fdb74ae2a6c743004a46a01b4e39050f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Mon, 2 Sep 2024 14:23:59 +0200 Subject: [PATCH 3/3] Update hil test collection --- .github/workflows/hil.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/hil.yml b/.github/workflows/hil.yml index c30091df688..d8deab2deac 100644 --- a/.github/workflows/hil.yml +++ b/.github/workflows/hil.yml @@ -124,7 +124,7 @@ jobs: mkdir -p tests # Find ELF files in the specified path and move them to 'tests' - find "hil-test/target/${{ matrix.target.rust-target }}/release/deps/" -type f -exec file {} + | \ + find "target/${{ matrix.target.rust-target }}/release/deps/" -type f -exec file {} + | \ grep ELF | \ awk -F: '{print $1}' | \ xargs -I {} mv {} tests