diff --git a/hw/misc/esp32c3_aes.c b/hw/misc/esp32c3_aes.c
index 90a1b7f1ebe6..66b3ddec1f6e 100644
--- a/hw/misc/esp32c3_aes.c
+++ b/hw/misc/esp32c3_aes.c
@@ -12,7 +12,7 @@
 #include "hw/misc/esp32c3_aes.h"
 #include "qemu/error-report.h"
 #include <gcrypt.h>
-#include <endian.h>
+#include "qemu/bswap.h"
 #include "hw/irq.h"
 #include "crypto/aes.h"
 
@@ -51,19 +51,19 @@ static void esp32c3_aes_ctr_add_counter(ESP32C3AesState *s, uint32_t blocks)
         /* 128-bit mode, no native 128 integer type, use two 64-bit types */
         uint64_t* low_ptr = (uint64_t*) (s->iv_mem + sizeof(uint64_t));
         uint64_t* high_ptr = (uint64_t*) s->iv_mem;
-        const uint64_t original = be64toh(*low_ptr);
+        const uint64_t original = be64_to_cpu(*low_ptr);
         uint64_t value = original + blocks;
-        *low_ptr = htobe64(value);
+        *low_ptr = cpu_to_be64(value);
         /* If the value overflowed, we have to update the upper part too */
         if (original > value) {
-            value = be64toh(*high_ptr) + 1;
-            *high_ptr = htobe64(value);
+            value = be64_to_cpu(*high_ptr) + 1;
+            *high_ptr = cpu_to_be64(value);
         }
     } else {
         /* 32-bit mode */
         uint32_t* counter_ptr = (uint32_t*) &s->iv_mem[ESP32C3_AES_IV_REG_CNT - sizeof(uint32_t)];
-        const uint32_t value = be32toh(*counter_ptr) + blocks;
-        *counter_ptr = htobe32(value);
+        const uint32_t value = be32_to_cpu(*counter_ptr) + blocks;
+        *counter_ptr = cpu_to_be32(value);
     }
 }