Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

ESP32-S3 Blink not working (QEMU-204) #99

Open
dzungpv opened this issue Jul 11, 2024 · 0 comments
Open

ESP32-S3 Blink not working (QEMU-204) #99

dzungpv opened this issue Jul 11, 2024 · 0 comments

Comments

@dzungpv
Copy link

dzungpv commented Jul 11, 2024

I try the QEMU for S3 but it not working, It work for ESP32 QEMU and on ESP32S3 Devkit.
I use Arduino as IDF component, IDF 4.4.8, pre build arch64 on the Mac M2

Sketch:

#include <Arduino.h>

#ifdef CONFIG_IDF_TARGET_ESP32
#define LED_PIN 2
#else
#define LED_PIN 48+49
#endif

// the setup function runs once when you press reset or power the board
void setup() {
  // initialize digital pin LED_BUILTIN as an output.
  pinMode(LED_PIN, OUTPUT);
  // Serial.begin(115200);
}

// the loop function runs over and over again forever
void loop() {
  digitalWrite(LED_PIN, HIGH);  // turn the LED on (HIGH is the voltage level)
  delay(1000);                      // wait for a second
  ESP_LOGI("LED", "wait for a second");
  digitalWrite(LED_PIN, LOW);   // turn the LED off by making the voltage LOW
  delay(1000);                      // wait for a second
  ESP_LOGI("LED", "wait for another a second");
}

The command use to run:

qemu-system-xtensa -nographic \
   -machine esp32s3 \
   -drive file=flash_image_s3.bin,if=mtd,format=raw

On the QEMU it boot loop with logs:

ELF file SHA256: bdac268a01dd1c32

Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x4 (SPI_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x3fce3808,len:0x2150
load:0x403c9700,len:0xd74
load:0x403cc700,len:0x34ac
entry 0x403c999c
I (26778) boot: ESP-IDF v4.4.8-dirty 2nd stage bootloader
I (26778) boot: compile time 09:41:44
I (26778) boot: Multicore bootloader
D (26779) bootloader_flash: non-XMC chip detected by SFDP Read (00), skip.
D (26779) bootloader_flash: mmu set block paddr=0x00000000 (was 0xffffffff)
I (26779) boot: chip revision: v0.3
D (26780) boot.esp32s3: magic e9
D (26780) boot.esp32s3: segments 03
D (26780) boot.esp32s3: spi_mode 02
D (26780) boot.esp32s3: spi_speed 00
D (26780) boot.esp32s3: spi_size 02
I (26780) boot.esp32s3: Boot SPI Speed : 40MHz
I (26780) boot.esp32s3: SPI Mode       : DIO
I (26781) boot.esp32s3: SPI Flash Size : 4MB
D (26781) boot: Enabling RTCWDT(9000 ms)
I (26782) boot: Enabling RNG early entropy source...
D (26782) bootloader_flash: mmu set paddr=00000000 count=1 size=c00 src_addr=e000 src_addr_aligned=0
D (26783) boot: mapped partition table 0xe000 at 0x3c00e000
D (26783) flash_parts: partition table verified, 11 entries
I (26784) boot: Partition Table:
I (26784) boot: ## Label            Usage          Type ST Offset   Length
D (26784) boot: load partition table entry 0x3c00e000
D (26784) boot: type=1 subtype=2
I (26784) boot:  0 nvs              WiFi data        01 02 00011000 0000c000
D (26784) boot: load partition table entry 0x3c00e020
D (26784) boot: type=1 subtype=0
I (26785) boot:  1 otadata          OTA data         01 00 0001d000 00002000
D (26785) boot: load partition table entry 0x3c00e040
D (26785) boot: type=1 subtype=1
I (26785) boot:  2 phy_init         RF data          01 01 0001f000 00001000
D (26785) boot: load partition table entry 0x3c00e060
D (26785) boot: type=0 subtype=10
I (26786) boot:  3 app0             OTA app          00 10 00020000 001e0000
D (26786) boot: load partition table entry 0x3c00e080
D (26786) boot: type=0 subtype=11
I (26786) boot:  4 app1             OTA app          00 11 00200000 001e0000
D (26786) boot: load partition table entry 0x3c00e0a0
D (26786) boot: type=1 subtype=82
I (26786) boot:  5 spiffs           Unknown data     01 82 003e0000 00011000
D (26787) boot: load partition table entry 0x3c00e0c0
D (26787) boot: type=1 subtype=3
I (26787) boot:  6 coredump         Unknown data     01 03 003f1000 00008000
D (26787) boot: load partition table entry 0x3c00e0e0
D (26787) boot: type=1 subtype=2
I (26787) boot:  7 esp_secure_cert  WiFi data        01 02 003f9000 00002000
D (26788) boot: load partition table entry 0x3c00e100
D (26788) boot: type=1 subtype=2
I (26788) boot:  8 fctry            WiFi data        01 02 003fb000 00004000
D (26788) boot: load partition table entry 0x3c00e120
D (26788) boot: type=1 subtype=4
I (26788) boot:  9 nvs_keys         NVS keys         01 04 003ff000 00001000
I (26789) boot: End of partition table
D (26789) boot: OTA data offset 0x1d000
D (26789) bootloader_flash: mmu set paddr=00010000 count=1 size=2000 src_addr=1d000 src_addr_aligned=10000
D (26789) boot: otadata[0]: sequence values 0x00000001
D (26789) boot: otadata[1]: sequence values 0xffffffff
D (26790) boot_comm: Only otadata[0] is valid
D (26790) boot: Active otadata[0]
D (26790) boot: Mapping seq 0 -> OTA slot 0
D (26790) boot: Trying partition index 0 offs 0x20000 size 0x1e0000
D (26790) esp_image: reading image header @ 0x20000
D (26790) bootloader_flash: mmu set block paddr=0x00020000 (was 0xffffffff)
D (26791) esp_image: image header: 0xe9 0x06 0x02 0x02 403753c4
V (26791) esp_image: loading segment header 0 at offset 0x20018
V (26791) esp_image: segment data length 0xb754 data starts 0x20020
V (26791) esp_image: segment 0 map_segment 1 segment_data_offs 0x20020 load_addr 0x3c020020
I (26792) esp_image: segment 0: paddr=00020020 vaddr=3c020020 size=0b754h ( 46932) map
D (26792) esp_image: free data page_count 0x0000003f
D (26792) bootloader_flash: mmu set paddr=00020000 count=1 size=b754 src_addr=20020 src_addr_aligned=20000
V (26796) esp_image: loading segment header 1 at offset 0x2b774
D (26796) bootloader_flash: mmu set block paddr=0x00020000 (was 0xffffffff)
V (26797) esp_image: segment data length 0x21ac data starts 0x2b77c
V (26797) esp_image: segment 1 map_segment 0 segment_data_offs 0x2b77c load_addr 0x3fc92930
I (26797) esp_image: segment 1: paddr=0002b77c vaddr=3fc92930 size=021ach (  8620) load
D (26797) esp_image: free data page_count 0x0000003f
D (26798) bootloader_flash: mmu set paddr=00020000 count=1 size=21ac src_addr=2b77c src_addr_aligned=20000
V (26799) esp_image: loading segment header 2 at offset 0x2d928
D (26799) bootloader_flash: mmu set block paddr=0x00020000 (was 0xffffffff)
V (26799) esp_image: segment data length 0x26e8 data starts 0x2d930
V (26799) esp_image: segment 2 map_segment 0 segment_data_offs 0x2d930 load_addr 0x40374000
I (26799) esp_image: segment 2: paddr=0002d930 vaddr=40374000 size=026e8h (  9960) load
D (26800) esp_image: free data page_count 0x0000003f
D (26800) bootloader_flash: mmu set paddr=00020000 count=2 size=26e8 src_addr=2d930 src_addr_aligned=20000
V (26802) esp_image: loading segment header 3 at offset 0x30018
D (26802) bootloader_flash: mmu set block paddr=0x00030000 (was 0xffffffff)
V (26802) esp_image: segment data length 0x1f9fc data starts 0x30020
V (26802) esp_image: segment 3 map_segment 1 segment_data_offs 0x30020 load_addr 0x42000020
I (26803) esp_image: segment 3: paddr=00030020 vaddr=42000020 size=1f9fch (129532) map
D (26803) esp_image: free data page_count 0x0000003f
D (26803) bootloader_flash: mmu set paddr=00030000 count=2 size=1f9fc src_addr=30020 src_addr_aligned=30000
V (26813) esp_image: loading segment header 4 at offset 0x4fa1c
D (26813) bootloader_flash: mmu set block paddr=0x00040000 (was 0xffffffff)
V (26814) esp_image: segment data length 0xc244 data starts 0x4fa24
V (26814) esp_image: segment 4 map_segment 0 segment_data_offs 0x4fa24 load_addr 0x403766e8
I (26814) esp_image: segment 4: paddr=0004fa24 vaddr=403766e8 size=0c244h ( 49732) load
D (26814) esp_image: free data page_count 0x0000003f
D (26814) bootloader_flash: mmu set paddr=00040000 count=2 size=c244 src_addr=4fa24 src_addr_aligned=40000
V (26822) esp_image: loading segment header 5 at offset 0x5bc68
D (26823) bootloader_flash: mmu set block paddr=0x00050000 (was 0xffffffff)
V (26823) esp_image: segment data length 0x4360 data starts 0x5bc70
V (26823) esp_image: segment 5 map_segment 0 segment_data_offs 0x5bc70 load_addr 0x0
I (26823) esp_image: segment 5: paddr=0005bc70 vaddr=00000000 size=04360h ( 17248) 
D (26823) esp_image: free data page_count 0x0000003f
D (26824) bootloader_flash: mmu set paddr=00050000 count=1 size=4360 src_addr=5bc70 src_addr_aligned=50000
V (26825) esp_image: image start 0x00020000 end of last section 0x0005ffd0
D (26825) bootloader_flash: mmu set block paddr=0x00050000 (was 0xffffffff)
D (26826) boot: Calculated hash: cc977f5bbf32d1cf8586e439096261ba4d040980ba32161fb0c6a7c92123b7c4
I (26826) boot: Loaded app from partition at offset 0x20000
I (26826) boot: Disabling RNG early entropy source...
D (26827) boot: Mapping segment 0 as DROM
D (26827) boot: Mapping segment 3 as IROM
D (26827) boot: calling set_cache_and_start_app
D (26827) boot: configure drom and irom and start
V (26827) boot: d mmu set paddr=00020000 vaddr=3c020000 size=46932 n=1
V (26828) boot: rc=0
V (26828) boot: i mmu set paddr=00030000 vaddr=42000000 size=129532 n=2
V (26828) boot: rc=0
D (26828) boot: start: 0x403753c4
I (26828) cpu_start: Multicore app
I (26830) cpu_start: Pro cpu up.
I (26830) cpu_start: Starting app cpu, entry point is 0x40375284
I (4141) cpu_start: App cpu up.
I (26840) cpu_start: Pro cpu start user code
I (26840) cpu_start: cpu freq: 160000000
I (26840) cpu_start: Application information:
I (26840) cpu_start: Project name:     dmesp32acbuild
I (26840) cpu_start: App version:      2.0.0-10-g83faf86-dirty
I (26840) cpu_start: Compile time:     Jul 11 2024 09:41:37
I (26840) cpu_start: ELF file SHA256:  bdac268a01dd1c32...
I (26840) cpu_start: ESP-IDF:          v4.4.8-dirty
I (26840) cpu_start: Min chip rev:     v0.0
I (26840) cpu_start: Max chip rev:     v0.99 
I (26840) cpu_start: Chip rev:         v0.3
I (26840) heap_init: Initializing. RAM available for dynamic allocation:
I (26840) heap_init: At 3FC955B0 len 00054160 (336 KiB): D/IRAM
I (26840) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DIRAM
I (26840) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (26841) heap_init: At 600FE000 len 00002000 (8 KiB): RTCRAM
I (26842) spi_flash: detected chip: gd
I (26842) spi_flash: flash io: dio

assert failed: 0x40378396 <cached disabled>:244 (<cached disabled>)


Backtrace: 0x40375c4e:0x3fcea920 0x4037b029:0x3fcea940 0x40380d35:0x3fcea960 0x40378396:0x3fceaa80 0x4037849e:0x3fceaac0 0x4200b675:0x3fceaaf0 0x4200b80b:0x3fceaba0 0x4200b907:0x3fceabc0 0x4200f72c:0x3fceabe0 0x4200ac96:0x3fceac00 0x4200abfb:0x3fceb1f0 0x4200ac47:0x3fceb280 0x42001ddd:0x3fceb2a0 0x42001ff4:0x3fceb2c0 0x40375595:0x3fceb300 0x403cdb5c:0x3fceb330 0x403ce0a1:0x3fceb380 0x403c9a05:0x3fceb4b0 0x40045c01:0x3fceb570 0x40043ab6:0x3fceb6f0 0x40034c45:0x3fceb710




ELF file SHA256: bdac268a01dd1c32

Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x4 (SPI_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x3fce3808,len:0x2150
load:0x403c9700,len:0xd74
load:0x403cc700,len:0x34ac
entry 0x403c999c
I (123) boot: ESP-IDF v4.4.8-dirty 2nd stage bootloader

@github-actions github-actions bot changed the title ESP32-S3 Blink not working ESP32-S3 Blink not working (QEMU-204) Jul 11, 2024
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Projects
None yet
Development

No branches or pull requests

2 participants