diff --git a/meta-facebook/yv3-vf/src/platform/plat_gpio.c b/meta-facebook/yv3-vf/src/platform/plat_gpio.c index f2e17a0058..97bae3c0a3 100644 --- a/meta-facebook/yv3-vf/src/platform/plat_gpio.c +++ b/meta-facebook/yv3-vf/src/platform/plat_gpio.c @@ -40,13 +40,13 @@ GPIO_CFG plat_gpio_cfg[] = { // chip, number, is_init, is_latch, direction, status, property, int_type, int_cb // GPIO A group { CHIP_GPIO, 0, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_EDGE_BOTH, - dev_12v_fault_hander_dev3 }, + dev_12v_fault_handler_dev3 }, { CHIP_GPIO, 1, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_EDGE_BOTH, - dev_12v_fault_hander_dev2 }, + dev_12v_fault_handler_dev2 }, { CHIP_GPIO, 2, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_EDGE_BOTH, - dev_12v_fault_hander_dev1 }, + dev_12v_fault_handler_dev1 }, { CHIP_GPIO, 3, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_EDGE_BOTH, - dev_12v_fault_hander_dev0 }, + dev_12v_fault_handler_dev0 }, { CHIP_GPIO, 4, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_DISABLE, NULL }, { CHIP_GPIO, 5, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_DISABLE, NULL }, { CHIP_GPIO, 6, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_DISABLE, NULL }, @@ -121,8 +121,8 @@ GPIO_CFG plat_gpio_cfg[] = { NULL }, { CHIP_GPIO, 45, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_DISABLE, NULL }, - { CHIP_GPIO, 46, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_DISABLE, - NULL }, + { CHIP_GPIO, 46, ENABLE, DISABLE, GPIO_INPUT, GPIO_HIGH, PUSH_PULL, GPIO_INT_EDGE_BOTH, + p12v_edge_fault_sel }, { CHIP_GPIO, 47, DISABLE, DISABLE, GPIO_INPUT, GPIO_LOW, PUSH_PULL, GPIO_INT_DISABLE, NULL }, // GPIO G group diff --git a/meta-facebook/yv3-vf/src/platform/plat_init.c b/meta-facebook/yv3-vf/src/platform/plat_init.c index 36f9ab5c12..74d382e4f9 100644 --- a/meta-facebook/yv3-vf/src/platform/plat_init.c +++ b/meta-facebook/yv3-vf/src/platform/plat_init.c @@ -91,6 +91,7 @@ void pal_set_sys_status() set_DC_status(FM_POWER_EN); set_DC_on_delayed_status(); + check_irq_fault(); // BIC up 1 sec handler k_work_schedule(&up_1sec_handler, K_SECONDS(1)); // BIC up 5 sec handler diff --git a/meta-facebook/yv3-vf/src/platform/plat_isr.c b/meta-facebook/yv3-vf/src/platform/plat_isr.c index edb39a8036..717e3c2d6c 100644 --- a/meta-facebook/yv3-vf/src/platform/plat_isr.c +++ b/meta-facebook/yv3-vf/src/platform/plat_isr.c @@ -1,21 +1,6 @@ -/* - * Copyright (c) Meta Platforms, Inc. and affiliates. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - #include #include +#include #include "libipmi.h" #include "power_status.h" @@ -28,7 +13,9 @@ #include "plat_util.h" #include "plat_isr.h" -void dev_12v_fault_hander(void) +LOG_MODULE_REGISTER(plat_isr); + +void dev_12v_fault_handler(void) { const uint8_t all_12v_pwrgd = check_12v_dev_pwrgd(); @@ -49,7 +36,7 @@ void pwrgd_p12v_aux_int_handler(void) m2_dev_power_switch(i, val); } - dev_12v_fault_hander(); // control PWRGD_EXP_PWROK & LED_PWRGD_P12V_E1S_ALL + dev_12v_fault_handler(); // control PWRGD_EXP_PWROK & LED_PWRGD_P12V_E1S_ALL delay_function((val ? 110 : 1), pwrgd_p12v_aux_100ms_set, val, 0); } @@ -149,6 +136,81 @@ void prsnt_int_handler(uint32_t idx, uint32_t arg1) device_all_power_set((uint8_t)idx, val); } +void irq_fault_sel(uint8_t idx, uint8_t type, uint8_t is_check) +{ + uint8_t pin = 0xFF; + uint8_t event_data1 = 0xFF; + uint8_t en_pin = 0xFF; + + switch (type) { + case P12V_E1S: + event_data1 = IPMI_EVENT_OFFSET_SYS_IRQ_P12V_E1S_FLT; + pin = (idx == 0) ? IRQ_P12V_E1S_0_FLT_N : + (idx == 1) ? IRQ_P12V_E1S_1_FLT_N : + (idx == 2) ? IRQ_P12V_E1S_2_FLT_N : + (idx == 3) ? IRQ_P12V_E1S_3_FLT_N : + 0xFF; + en_pin = (idx == 0) ? FM_P12V_E1S_0_EN : + (idx == 1) ? FM_P12V_E1S_1_EN : + (idx == 2) ? FM_P12V_E1S_2_EN : + (idx == 3) ? FM_P12V_E1S_3_EN : + 0xFF; + break; + case P3V3_E1S: + event_data1 = IPMI_EVENT_OFFSET_SYS_IRQ_P3V3_E1S_FLT; + pin = (idx == 0) ? IRQ_P3V3_E1S_0_FLT_N : + (idx == 1) ? IRQ_P3V3_E1S_1_FLT_N : + (idx == 2) ? IRQ_P3V3_E1S_2_FLT_N : + (idx == 3) ? IRQ_P3V3_E1S_3_FLT_N : + 0xFF; + en_pin = (idx == 0) ? FM_P3V3_E1S_0_SW_EN : + (idx == 1) ? FM_P3V3_E1S_1_SW_EN : + (idx == 2) ? FM_P3V3_E1S_2_SW_EN : + (idx == 3) ? FM_P3V3_E1S_3_SW_EN : + 0xFF; + break; + case P12V_EDGE: + event_data1 = IPMI_EVENT_OFFSET_SYS_IRQ_P12V_EDGE_FLT; + pin = IRQ_P12V_EDGE_FLT_N; + en_pin = FM_P12V_EDGE_EN; + break; + default: + LOG_DBG("invaild irq fault type: %d!\n", type); + return; + } + + if (is_check) { + // run in init, if irq_pin still low + if (!gpio_get(pin)) { + add_sel(IPMI_OEM_SENSOR_TYPE_OEM, IPMI_EVENT_TYPE_SENSOR_SPECIFIC, + SENSOR_NUM_SYS_STA, event_data1, E1S_BOARD_TYPE, idx); + } + return; + } + + // check enable pin + if (!gpio_get(en_pin)) { + LOG_DBG("enable pin %d does not set high!\n", en_pin); + return; + } + + uint8_t event_type = + gpio_get(pin) ? IPMI_OEM_EVENT_TYPE_DEASSART : IPMI_EVENT_TYPE_SENSOR_SPECIFIC; + + add_sel(IPMI_OEM_SENSOR_TYPE_OEM, event_type, SENSOR_NUM_SYS_STA, event_data1, + E1S_BOARD_TYPE, idx); +} + +void check_irq_fault(void) +{ + uint8_t i; + for (i = 0; i < M2_IDX_E_MAX; i++) + irq_fault_sel(i, P12V_E1S, 1); + for (i = 0; i < M2_IDX_E_MAX; i++) + irq_fault_sel(i, P3V3_E1S, 1); + irq_fault_sel(0, P12V_EDGE, 1); +} + #define DEV_PRSNT_HANDLER(idx) \ void prsnt_int_handler_dev##idx(void) \ { \ @@ -162,11 +224,41 @@ void prsnt_int_handler(uint32_t idx, uint32_t arg1) } #define DEV_FAULT_HANDLER(idx) \ - void dev_12v_fault_hander_dev##idx(void) \ + void dev_12v_fault_handler_dev##idx(void) \ { \ - dev_12v_fault_hander(); \ + dev_12v_fault_handler(); \ + static int64_t pre_time[M2_IDX_E_MAX]; \ + int64_t current_time = k_uptime_get(); \ + if ((current_time - pre_time[idx]) < 10) { \ + return; \ + } \ + pre_time[idx] = current_time; \ + irq_fault_sel(idx, P12V_E1S, 0); \ } +#define DEV_3V3_FAULT_HANDLER(idx) \ + void dev_3v3_fault_handler_dev##idx(void) \ + { \ + static int64_t pre_time[M2_IDX_E_MAX]; \ + int64_t current_time = k_uptime_get(); \ + if ((current_time - pre_time[idx]) < 10) { \ + return; \ + } \ + pre_time[idx] = current_time; \ + irq_fault_sel(idx, P3V3_E1S, 0); \ + } + +void p12v_edge_fault_sel(void) +{ + static int64_t pre_time; + int64_t current_time = k_uptime_get(); + if ((current_time - pre_time) < 10) { + return; + } + pre_time = current_time; + irq_fault_sel(0, P12V_EDGE, 0); +} + DEV_PRSNT_HANDLER(0); DEV_PRSNT_HANDLER(1); DEV_PRSNT_HANDLER(2); diff --git a/meta-facebook/yv3-vf/src/platform/plat_isr.h b/meta-facebook/yv3-vf/src/platform/plat_isr.h index 8be8870a02..83e613ead8 100644 --- a/meta-facebook/yv3-vf/src/platform/plat_isr.h +++ b/meta-facebook/yv3-vf/src/platform/plat_isr.h @@ -17,28 +17,41 @@ #ifndef PLAT_ISR_H #define PLAT_ISR_H -void dev_12v_fault_hander(void); +enum IRQ_FLT_TYPE { + P12V_E1S = 0, + P3V3_E1S, + P12V_EDGE, +}; + +void dev_12v_fault_handler(void); void pwrgd_p12v_aux_int_handler(void); void dev_rst(void); uint8_t check_12v_dev_pwrgd(void); -void dev_12v_fault_hander(void); +void dev_12v_fault_handler(void); void aux_pwr_en_int_handler(void); void power_en_int_handler(void); void rst_mb_n_int_handler(void); +void check_irq_fault(void); void prsnt_int_handler_dev0(); void prsnt_int_handler_dev1(); void prsnt_int_handler_dev2(); void prsnt_int_handler_dev3(); -void dev_12v_fault_hander_dev0(void); -void dev_12v_fault_hander_dev1(void); -void dev_12v_fault_hander_dev2(void); -void dev_12v_fault_hander_dev3(void); +void dev_12v_fault_handler_dev0(void); +void dev_12v_fault_handler_dev1(void); +void dev_12v_fault_handler_dev2(void); +void dev_12v_fault_handler_dev3(void); void ina231_alert_handler_m2_dev0(void); void ina231_alert_handler_m2_dev1(void); void ina231_alert_handler_m2_dev2(void); void ina231_alert_handler_m2_dev3(void); +void dev_3v3_fault_handler_dev0(void); // IRQ_P3V3_E1S_0_FLT_N +void dev_3v3_fault_handler_dev1(void); // IRQ_P3V3_E1S_1_FLT_N +void dev_3v3_fault_handler_dev2(void); // IRQ_P3V3_E1S_2_FLT_N +void dev_3v3_fault_handler_dev3(void); // IRQ_P3V3_E1S_3_FLT_N +void p12v_edge_fault_sel(void); // IRQ_P12V_EDGE_FLT_N + #endif diff --git a/meta-facebook/yv3-vf/src/platform/plat_m2.c b/meta-facebook/yv3-vf/src/platform/plat_m2.c index 007635c193..af508dcdd0 100644 --- a/meta-facebook/yv3-vf/src/platform/plat_m2.c +++ b/meta-facebook/yv3-vf/src/platform/plat_m2.c @@ -115,7 +115,6 @@ uint8_t m2_prsnt(uint8_t idx) uint8_t rst_edsff(uint8_t idx, uint8_t val) { - printf("%s()[%d][%d] idx: %d, val: %d\n", __func__, __LINE__, k_uptime_get_32(), idx, val); const uint8_t pin = (idx == M2_IDX_E_A) ? RST_BIC_E1S_0_N : (idx == M2_IDX_E_B) ? RST_BIC_E1S_1_N : (idx == M2_IDX_E_C) ? RST_BIC_E1S_2_N : diff --git a/meta-facebook/yv3-vf/src/platform/plat_power_seq.c b/meta-facebook/yv3-vf/src/platform/plat_power_seq.c index ec9cd9d427..f32d83b6bd 100644 --- a/meta-facebook/yv3-vf/src/platform/plat_power_seq.c +++ b/meta-facebook/yv3-vf/src/platform/plat_power_seq.c @@ -158,7 +158,7 @@ void check_dc_off_process(void) } if (i == M2_IDX_E_MAX) { - dev_12v_fault_hander(); // control PWRGD_EXP_PWROK & LED_PWRGD_P12V_E1S_ALL + dev_12v_fault_handler(); // control PWRGD_EXP_PWROK & LED_PWRGD_P12V_E1S_ALL gpio_set(FM_P12V_EDGE_EN, 0); gpio_set(FM_CLKBUF_EN, 0); } diff --git a/meta-facebook/yv3-vf/src/platform/plat_util.h b/meta-facebook/yv3-vf/src/platform/plat_util.h index 13905b05d2..0afcf8a6e5 100644 --- a/meta-facebook/yv3-vf/src/platform/plat_util.h +++ b/meta-facebook/yv3-vf/src/platform/plat_util.h @@ -20,6 +20,9 @@ #define IPMI_EVENT_OFFSET_SYS_M2PRESENT 0x80 #define IPMI_EVENT_OFFSET_SYS_INA231_PWR_ALERT 0x81 #define IPMI_EVENT_OFFSET_SYS_HSC_PWR_ALERT 0x82 +#define IPMI_EVENT_OFFSET_SYS_IRQ_P12V_E1S_FLT 0x83 +#define IPMI_EVENT_OFFSET_SYS_IRQ_P3V3_E1S_FLT 0x84 +#define IPMI_EVENT_OFFSET_SYS_IRQ_P12V_EDGE_FLT 0x85 #define E1S_BOARD_TYPE 0x07