Question regarding the internals of pyhdl-if

[penguali]

I know that external tasks and functions can be connected to the simulator in two different ways, either through the VPI or through the DPI-C. If I understand correctly, cocotb relies on the VPI and generalizes several other APIs in one abstract GPI.
Any cocotb function registers a simulation callback call at specific points during a simulation time step, which helps execute Python functions externally.

Now, pyhdl-if as described in the documentation, relies on the DPI-C, which can either import Python functions or export SV functions, which eventually helps calling them from Python.
Do I understand correctly that, the import/ export functions are implemented through the DPI-C, and calling these functions is similar to cocotb, through the VPI?
So pyhdl-if uses both APIs kinda?

I really appreciate any information you can provide.
Ali

[mballance]

First off, your issue made me realize that I hadn't enabled discussions for this repository yet. Yours is now the first discussion thread. Thank you!

You are correct that SystemVerilog supports two different C APIs that allow external code to interact with the design/testbench during simulation. While there is some overlap between the capabilities of the two interfaces, they are also quite different.

• VPI - VPI provides APIs that allow callers to navigate through the module hierarchy of a Verilog design, read and modify the value of regs/nets, and get callbacks when the value of a net/get changes or simtime elapses. VPI also allows external code to define system tasks that can be called from SystemVerilog. VPI does not allow C code to invoke a SystemVerilog function or task.
• DPI - DPI enables cross-calling between SystemVerilog and C code under somewhat-restrictive (but very useful) conditions. DPI doesn't provide any features for traversing through the module hierarchy or reading/writing the value of nets/regs.

You are correct that coctb uses VPI to access the nets/regs within a design. cocotb doesn't allow you to call Python from SytsemVerilog or allow Python to call SystemVerilog.

pyhdl-if supports calling SystemVerilog from Python and calling Python from SystemVerilog. It provides Python access to the raw VPI interface, but otherwise does not provide any features for reading/writing the value of regs/nets.

You can certainly use cocotb and pyhdl-if together. Use cocotb when you need to read/write the value of signals from Python. Use pyhdl-if when you need to make task/function calls between Python and SystemVerilog.

Hope this helps!

Matthew

[penguali]

Thanks for the answer :)