From 167807d725c17d08105ac62ccf8c2ea9ab956b0b Mon Sep 17 00:00:00 2001
From: "Meng, Hengyu" <hengyu.meng@intel.com>
Date: Tue, 18 Jun 2024 06:14:04 +0000
Subject: [PATCH] fix workgroup size hardcode

---
 ggml-sycl/presets.hpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/ggml-sycl/presets.hpp b/ggml-sycl/presets.hpp
index dcf0261102e914..5e6b61813ab491 100644
--- a/ggml-sycl/presets.hpp
+++ b/ggml-sycl/presets.hpp
@@ -18,8 +18,6 @@
 #define GGML_SYCL_MAX_DEVICES       48
 #define GGML_SYCL_NAME "SYCL"
 
-// FIXME: 1024 from cuda
-#define GROUP_SIZE 1024
 #define WARP_SIZE 32
 #define MATRIX_ROW_PADDING 512 // last row of quant. matrices is a multiple of this to avoid out-of-bounds memory accesses