sycl: add ROLL operation support

ggml/src/ggml-sycl/backend.hpp

@@ -32,6 +32,7 @@
 #include "pad.hpp"
 #include "quantize.hpp"
 #include "quants.hpp"
+#include "roll.hpp"
 #include "rope.hpp"
 #include "set_rows.hpp"
 #include "softmax.hpp"

ggml/src/ggml-sycl/ggml-sycl.cpp

@@ -3836,6 +3836,9 @@ static bool ggml_sycl_compute_forward(ggml_backend_sycl_context & ctx, struct gg
         case GGML_OP_GATED_LINEAR_ATTN:
             ggml_sycl_op_gated_linear_attn(ctx, dst);
             break;
+        case GGML_OP_ROLL:
+            ggml_sycl_roll(ctx, dst);
+            break;
         case GGML_OP_ARANGE:
             ggml_sycl_arange(ctx, dst);
             break;
@@ -4491,6 +4494,8 @@ static bool ggml_backend_sycl_device_supports_op(ggml_backend_dev_t dev, const g
         case GGML_OP_RWKV_WKV7:
         case GGML_OP_GATED_LINEAR_ATTN:
             return true;
+        case GGML_OP_ROLL:
+            return op->type == GGML_TYPE_F32;
         case GGML_OP_ARANGE:
             return op->type == GGML_TYPE_F32;
         default:

ggml/src/ggml-sycl/roll.cpp

@@ -0,0 +1,82 @@
+#include "roll.hpp"
+#include "common.hpp"
+
+using namespace sycl;
+
+static void kernel_roll_multi_axis(queue &q, const ggml_tensor *src, ggml_tensor *dst,
+                                    int shift0, int shift1, int shift2, int shift3) {
+    if (!src || !dst) throw std::runtime_error("null tensor");
+    if (src->type != GGML_TYPE_F32 || dst->type != GGML_TYPE_F32)
+        throw std::runtime_error("only F32 supported in SYCL roll");
+
+    const int64_t ne0 = dst->ne[0];
+    const int64_t ne1 = dst->ne[1];
+    const int64_t ne2 = dst->ne[2];
+    const int64_t ne3 = dst->ne[3];
+
+    if (ne0 != src->ne[0] || ne1 != src->ne[1] || ne2 != src->ne[2] || ne3 != src->ne[3])
+        throw std::runtime_error("src/dst shape mismatch");
+
+    // Normalize shifts to be within bounds
+    const int64_t sh0 = ne0 > 0 ? ((int64_t)shift0 % ne0 + ne0) % ne0 : 0;
+    const int64_t sh1 = ne1 > 0 ? ((int64_t)shift1 % ne1 + ne1) % ne1 : 0;
+    const int64_t sh2 = ne2 > 0 ? ((int64_t)shift2 % ne2 + ne2) % ne2 : 0;
+    const int64_t sh3 = ne3 > 0 ? ((int64_t)shift3 % ne3 + ne3) % ne3 : 0;
+
+    const float *src_d = (const float*) src->data;
+    float *dst_d = (float*) dst->data;
+
+    if (!src_d || !dst_d) throw std::runtime_error("null data pointers");
+
+    q.submit([&](handler &h) {
+        range<3> r((size_t)ne3, (size_t)ne2, (size_t)ne1);
+        h.parallel_for(r, [=](id<3> idx) {
+            const int64_t i3 = idx[0];
+            const int64_t i2 = idx[1];
+            const int64_t i1 = idx[2];
+
+            for (int64_t i0 = 0; i0 < ne0; i0++) {
+                const int64_t idx_dst = i0 + i1 * ne0 + i2 * ne0 * ne1 + i3 * ne0 * ne1 * ne2;
+
+                // Apply shift to each dimension
+                const int64_t src_i0 = (i0 - sh0 + ne0) % ne0;
+                const int64_t src_i1 = (i1 - sh1 + ne1) % ne1;
+                const int64_t src_i2 = (i2 - sh2 + ne2) % ne2;
+                const int64_t src_i3 = (i3 - sh3 + ne3) % ne3;
+
+                const int64_t idx_src = src_i0 + src_i1 * ne0 +
+                                        src_i2 * ne0 * ne1 + src_i3 * ne0 * ne1 * ne2;
+
+                dst_d[idx_dst] = src_d[idx_src];
+            }
+        });
+    }).wait();
+}
+
+void ggml_sycl_roll(ggml_backend_sycl_context & ctx, ggml_tensor *dst) {
+    GGML_ASSERT(dst->type == GGML_TYPE_F32);
+
+    const ggml_tensor *src = dst->src[0];
+
+    const int32_t *params = (const int32_t *)dst->op_params;
+    const int shift0 = params[0];
+    const int shift1 = params[1];
+    const int shift2 = params[2];
+    const int shift3 = params[3];
+
+    // Check if all shifts are zero
+    if (shift0 == 0 && shift1 == 0 && shift2 == 0 && shift3 == 0) {
+        const size_t nb = ggml_nbytes(src);
+        queue *q = ctx.stream();
+        SYCL_CHECK(CHECK_TRY_ERROR(q->memcpy(dst->data, src->data, nb).wait()));
+        return;
+    }
+
+    try {
+        queue *q = ctx.stream();
+        kernel_roll_multi_axis(*q, src, dst, shift0, shift1, shift2, shift3);
+    } catch (const std::exception &e) {
+        std::fprintf(stderr, "[SYCL-ROLL] ERROR: %s\n", e.what());
+        throw;
+    }
+}

ggml/src/ggml-sycl/roll.hpp

@@ -0,0 +1,20 @@
+//
+// MIT license
+// Copyright (C) 2024 Intel Corporation
+// SPDX-License-Identifier: MIT
+//
+
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+
+#ifndef GGML_SYCL_ROLL_HPP
+#define GGML_SYCL_ROLL_HPP
+
+#include "common.hpp"
+
+void ggml_sycl_roll(ggml_backend_sycl_context & ctx, ggml_tensor *dst);
+
+#endif // GGML_SYCL_ROLL_HPP