From e321c820956ce313d7b1e50216a4ea5eb5c9b08a Mon Sep 17 00:00:00 2001 From: Sonny Jeon Date: Tue, 1 Aug 2017 09:45:53 -0600 Subject: [PATCH] Fixed RAMPS control pin conflict [fix] RAMPS soft-reset control pin interfered with Z-enable. Shifted all control pins by plus one on the analog pins. RAMPS defines these pins as belonging to the AUX 2 port, which is assumed to be unused. --- doc/log/commit_log_v1.0d.txt | 96 ++++++++++++++++++++++++++++++++++++ grbl/cpu_map.h | 38 +++++++------- grbl/grbl.h | 2 +- 3 files changed, 116 insertions(+), 20 deletions(-) diff --git a/doc/log/commit_log_v1.0d.txt b/doc/log/commit_log_v1.0d.txt index 4d3c83942..5dd037578 100644 --- a/doc/log/commit_log_v1.0d.txt +++ b/doc/log/commit_log_v1.0d.txt @@ -1,3 +1,99 @@ +---------------- +Date: 2017-07-17 +Author: Sonny Jeon +Subject: Merge pull request #28 from docwelch/Ramps-1.4 + +Add Ramps 1.4 Board Support. Note: This is highly experimental and your mileage may vary. This will be polished soon. + +---------------- +Date: 2017-07-17 +Author: Sonny Jeon +Subject: Merge branch 'edge' into Ramps-1.4 + +---------------- +Date: 2017-07-17 +Author: Sonny Jeon +Subject: Syncing mainstream v1.1f + +- See details in mainstream commits from 1/14/17 to 7/17/17. + + +---------------- +Date: 2017-06-26 +Author: docwelch +Subject: Add Ramps 1.4 Board Support + +Changes based on @jekhor’s work +Uses D8 as the spindle pin + + +---------------- +Date: 2017-03-19 +Author: Sonny Jeon +Subject: Moved Grbl logo files to separate repo. + + +---------------- +Date: 2017-03-19 +Author: Sonny Jeon +Subject: Update README.md + +---------------- +Date: 2017-03-19 +Author: Sonny Jeon +Subject: Update README.md + +---------------- +Date: 2017-01-14 +Author: Sonny Jeon +Subject: Pulled in Grbl-328p changes. + +- [fix] Spindle enable pin behavior corrected to be independent of the +PWM output. There was some crossover behavior. + +- [fix] Tool numbers are now tracking and reporting correctly. + +- [fix] G-code parser error when G0 is commanded without a feed rate +word while in inverse time mode. + +- [fix] Config file was missing an option for probing behavior. + +- [doc] Updated documentation. + + +---------------- +Date: 2016-12-19 +Author: Sonny Jeon +Subject: Alarm handling bug fix. + +- Applied an alarm handling bug fix that would not show the correct +alarm code, nor clear the alarm. It would occasionally go into an +infinite loop and would usually happen during a homing cycle fail. + + +---------------- +Date: 2016-12-19 +Author: Sonny Jeon +Subject: Spindle PWM update for Mega2560 + +- Spindle PWM is set with a 16-bit value, rather than 8-bit on a 328p. +Updated stepper.c to reflect this change. + + +---------------- +Date: 2016-12-19 +Author: Sonny Jeon +Subject: Grbl v1.1e port to Mega2560 branch + +- v1.1e + +- Ported all current changes from the main Grbl 328p repo to the +Mega2560 branch. Main differences are increased planner, RX, TX, and +line buffers. And an optional sleep timeout feature. + +- WARNING: Code compiles, but has not been tested. + + ---------------- Date: 2016-08-31 Author: chamnit diff --git a/grbl/cpu_map.h b/grbl/cpu_map.h index db6a1786a..6cef4d9c3 100644 --- a/grbl/cpu_map.h +++ b/grbl/cpu_map.h @@ -152,9 +152,9 @@ #define STEP_PORT_0 F #define STEP_PORT_1 F #define STEP_PORT_2 L - #define STEP_BIT_0 0 - #define STEP_BIT_1 6 - #define STEP_BIT_2 3 + #define STEP_BIT_0 0 // X Step - Pin A0 + #define STEP_BIT_1 6 // Y Step - Pin A6 + #define STEP_BIT_2 3 // Z Step - Pin D46 #define _STEP_BIT(i) STEP_BIT_##i #define STEP_BIT(i) _STEP_BIT(i) #define STEP_DDR(i) _DDR(STEP_PORT_##i) @@ -166,9 +166,9 @@ #define DIRECTION_PORT_0 F #define DIRECTION_PORT_1 F #define DIRECTION_PORT_2 L - #define DIRECTION_BIT_0 1 - #define DIRECTION_BIT_1 7 - #define DIRECTION_BIT_2 1 + #define DIRECTION_BIT_0 1 // X Dir - Pin A1 + #define DIRECTION_BIT_1 7 // Y Dir - Pin A7 + #define DIRECTION_BIT_2 1 // Z Dir - Pin D48 #define _DIRECTION_BIT(i) DIRECTION_BIT_##i #define DIRECTION_BIT(i) _DIRECTION_BIT(i) #define DIRECTION_DDR(i) _DDR(DIRECTION_PORT_##i) @@ -180,9 +180,9 @@ #define STEPPER_DISABLE_PORT_0 D #define STEPPER_DISABLE_PORT_1 F #define STEPPER_DISABLE_PORT_2 K - #define STEPPER_DISABLE_BIT_0 7 - #define STEPPER_DISABLE_BIT_1 2 - #define STEPPER_DISABLE_BIT_2 0 + #define STEPPER_DISABLE_BIT_0 7 // X Enable - Pin D38 + #define STEPPER_DISABLE_BIT_1 2 // Y Enable - Pin A2 + #define STEPPER_DISABLE_BIT_2 0 // Z Enable - Pin A8 #define STEPPER_DISABLE_BIT(i) STEPPER_DISABLE_BIT_##i #define STEPPER_DISABLE_DDR(i) _DDR(STEPPER_DISABLE_PORT_##i) #define STEPPER_DISABLE_PORT(i) _PORT(STEPPER_DISABLE_PORT_##i) @@ -192,9 +192,9 @@ #define MIN_LIMIT_PORT_0 E #define MIN_LIMIT_PORT_1 J #define MIN_LIMIT_PORT_2 D - #define MIN_LIMIT_BIT_0 5 - #define MIN_LIMIT_BIT_1 1 - #define MIN_LIMIT_BIT_2 3 + #define MIN_LIMIT_BIT_0 5 // X Limit Min - Pin D3 + #define MIN_LIMIT_BIT_1 1 // Y Limit Min - Pin D14 + #define MIN_LIMIT_BIT_2 3 // Z Limit Min - Pin D18 #define _MIN_LIMIT_BIT(i) MIN_LIMIT_BIT_##i #define MIN_LIMIT_BIT(i) _MIN_LIMIT_BIT(i) #define MIN_LIMIT_DDR(i) _DDR(MIN_LIMIT_PORT_##i) @@ -204,9 +204,9 @@ #define MAX_LIMIT_PORT_0 E #define MAX_LIMIT_PORT_1 J #define MAX_LIMIT_PORT_2 D - #define MAX_LIMIT_BIT_0 4 - #define MAX_LIMIT_BIT_1 0 - #define MAX_LIMIT_BIT_2 2 + #define MAX_LIMIT_BIT_0 4 // X Limit Max - Pin D2 + #define MAX_LIMIT_BIT_1 0 // Y Limit Max - Pin D15 + #define MAX_LIMIT_BIT_2 2 // Z Limit Max - Pin D19 #define _MAX_LIMIT_BIT(i) MAX_LIMIT_BIT_##i #define MAX_LIMIT_BIT(i) _MAX_LIMIT_BIT(i) #define MAX_LIMIT_DDR(i) _DDR(MAX_LIMIT_PORT_##i) @@ -240,10 +240,10 @@ #define CONTROL_DDR DDRK #define CONTROL_PIN PINK #define CONTROL_PORT PORTK - #define CONTROL_RESET_BIT 0 // MEGA2560 Analog Pin 8 - #define CONTROL_FEED_HOLD_BIT 1 // MEGA2560 Analog Pin 9 - #define CONTROL_CYCLE_START_BIT 2 // MEGA2560 Analog Pin 10 - #define CONTROL_SAFETY_DOOR_BIT 3 // MEGA2560 Analog Pin 11 + #define CONTROL_RESET_BIT 1 // Pin A9 - RAMPS Aux 2 Port + #define CONTROL_FEED_HOLD_BIT 2 // Pin A10 - RAMPS Aux 2 Port + #define CONTROL_CYCLE_START_BIT 3 // Pin A11 - RAMPS Aux 2 Port + #define CONTROL_SAFETY_DOOR_BIT 4 // Pin A12 - RAMPS Aux 2 Port #define CONTROL_INT PCIE2 // Pin change interrupt enable pin #define CONTROL_INT_vect PCINT2_vect #define CONTROL_PCMSK PCMSK2 // Pin change interrupt register diff --git a/grbl/grbl.h b/grbl/grbl.h index 614d00906..74a3cae12 100644 --- a/grbl/grbl.h +++ b/grbl/grbl.h @@ -23,7 +23,7 @@ // Grbl versioning system #define GRBL_VERSION "1.1f" -#define GRBL_VERSION_BUILD "20170717" +#define GRBL_VERSION_BUILD "20170801" // Define standard libraries used by Grbl. #include