-
Notifications
You must be signed in to change notification settings - Fork 6
/
boards.cfg
98 lines (89 loc) · 8.14 KB
/
boards.cfg
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
#
# List of boards
#
# Syntax:
# white-space separated list of entries;
# each entry has the fields documented below.
#
# Unused fields can be specified as "-", or omitted if they
# are the last field on the line.
#
# Lines starting with '#' are comments.
# Blank lines are ignored.
#
# The CPU field takes the form:
# cpu[:spl_cpu]
# If spl_cpu is specified the make variable CPU will be set to this
# during the SPL build.
#
# The options field takes the form:
# <board config name>[:comma separated config options]
# Each config option has the form (value defaults to "1"):
# option[=value]
# So if you have:
# FOO:HAS_BAR,BAZ=64
# The file include/configs/FOO.h will be used, and these defines created:
# #define CONFIG_HAS_BAR 1
# #define CONFIG_BAZ 64
#
# The list should be ordered according to the following fields,
# from most to least significant:
#
# ARCH, CPU, SoC, Vendor, Target
#
# To keep the list sorted, use something like
# :.,$! sort -bdf -k2,2 -k3,3 -k6,6 -k5,5 -k1,1
#
# To reformat the list, use something like
# :.,$! column -t
#
# Target ARCH CPU Board name Vendor SoC Options
####################################################################################
isvp_t10_sfcnor mips xburst isvp_t10 ingenic t10 isvp_t10:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SFC_NOR,JZ_MMC_MSC0
isvp_t10_sfcnor_lite mips xburst isvp_t10 ingenic t10 isvp_t10:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SFC_NOR,JZ_MMC_MSC0,LITE_VERSION
isvp_t20_sfcnor mips xburst isvp_t20 ingenic t20 isvp_t20:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SFC_NOR,JZ_MMC_MSC0
isvp_t20_sfcnor_lite mips xburst isvp_t20 ingenic t20 isvp_t20:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SFC_NOR,JZ_MMC_MSC0,LITE_VERSION
isvp_t20_sfcnor_ddr128M mips xburst isvp_t20 ingenic t20 isvp_t20:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SFC_NOR,JZ_MMC_MSC0,DDR2_128M
isvp_t21_sfcnor mips xburst isvp_t21 ingenic t21 isvp_t21:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0
isvp_t23n_sfcnor mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,T23N
isvp_t23n_sfcnor_hp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,T23N,HP
isvp_t23n_sfcnor_lp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,T23N,LP
isvp_t23n_sfcnor_mmc1bit mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,T23N,JZ_MMC_1BIT
isvp_t30_sfcnor mips xburst isvp_t30 ingenic t30 isvp_t30:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0
isvp_t30_sfcnor_ddr128M mips xburst isvp_t30 ingenic t30 isvp_t30:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,DDR2_128M
isvp_t30_sfcnor_lite mips xburst isvp_t30 ingenic t30 isvp_t30:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,LITE_VERSION
isvp_t30a_sfcnor_ddr128M mips xburst isvp_t30 ingenic t30 isvp_t30:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,DDR2_128M,T30A
isvp_t30a1_sfcnor_ddr128M mips xburst isvp_t30 ingenic t30 isvp_t30:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,DDR3_128M,T30A
isvp_t31_sfcnor mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0
isvp_t31_sfcnor_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,DDR2_128M
isvp_t31_sfcnor_msc1_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,JZ_MMC_MSC1,DDR2_128M
isvp_t31_sfcnor_lite mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,LITE_VERSION
isvp_t31a_sfcnor_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,DDR3_128M,T31A
isvp_t31al_sfcnor_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,DDR2_128M,T31AL
isvp_t31lc_sfcnor mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,T31LC
isvp_t31_xiaomi_sfcnor mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_SUPPORT,ENV_IS_IN_SPI_FLASH,SPL_SFC_NOR,JZ_MMC_MSC0,LITE_VERSION,XIAOMI_SPL
isvp_t10_msc0 mips xburst isvp_t10 ingenic t10 isvp_t10:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,LITE_VERSION
isvp_t20_msc0 mips xburst isvp_t20 ingenic t20 isvp_t20:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,LITE_VERSION
isvp_t21_msc0 mips xburst isvp_t21 ingenic t21 isvp_t21:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND
isvp_t23n_msc0 mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,T23N
isvp_t23n_msc0_hp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,T23N,HP
isvp_t23n_msc0_lp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,T23N,LP
isvp_t23n_msc1 mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC1,SFC_COMMAND,T23N
isvp_t23n_msc1_hp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC1,SFC_COMMAND,T23N,HP
isvp_t23n_msc1_lp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC1,SFC_COMMAND,T23N,LP
isvp_t30_msc0 mips xburst isvp_t30 ingenic t30 isvp_t30:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,LITE_VERSION
isvp_t31_msc0 mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND
isvp_t31_msc0_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,DDR2_128M
isvp_t31_msc0_lite mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,LITE_VERSION
isvp_t31a_msc0_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,DDR3_128M,T31A
isvp_t31al_msc0_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_MMC_SUPPORT,ENV_IS_IN_MMC,GPT_CREATOR,JZ_MMC_MSC0,SFC_COMMAND,DDR2_128M,T31AL
isvp_t23n_sfcnand mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_SFC_NAND,JZ_MMC_MSC0,T23N
isvp_t23n_sfcnand_hp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_SFC_NAND,JZ_MMC_MSC0,T23N,HP
isvp_t23n_sfcnand_lp mips xburst isvp_t23 ingenic t23 isvp_t23:SPL_SFC_NAND,JZ_MMC_MSC0,T23N,LP
isvp_t31_sfcnand mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_NAND,JZ_MMC_MSC0
isvp_t31_sfcnand_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_NAND,JZ_MMC_MSC0,DDR2_128M
isvp_t31_sfcnand_lite mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_NAND,JZ_MMC_MSC0,LITE_VERSION
isvp_t31a_sfcnand_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_NAND,JZ_MMC_MSC0,DDR3_128M,T31A
isvp_t31al_sfcnand_ddr128M mips xburst isvp_t31 ingenic t31 isvp_t31:SPL_SFC_NAND,JZ_MMC_MSC0,DDR2_128M,T31AL
# Target ARCH CPU Board name Vendor SoC Options
########################################################################################