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bmg160.h
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/** \mainpage
*
****************************************************************************
* Copyright (C) 2010 - 2015 Bosch Sensortec GmbH
*
* File : bmg160.h
*
* Date : 2015/04/29
*
* Revision : 2.0.4 $
*
* Usage: Sensor Driver for BMG160 sensor
*
****************************************************************************
*
* \section License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the copyright holder nor the names of the
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
* CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER
* OR CONTRIBUTORS BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
* OR CONSEQUENTIAL DAMAGES(INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
* The information provided is believed to be accurate and reliable.
* The copyright holder assumes no responsibility
* for the consequences of use
* of such information nor for any infringement of patents or
* other rights of third parties which may result from its use.
* No license is granted by implication or otherwise under any patent or
* patent rights of the copyright holder.
**************************************************************************/
/*! \file BMG160.h
\brief Header for BMG160 API */
/* user defined code to be added here ... */
#ifndef __BMG160_H__
#define __BMG160_H__
/*!
* @brief The following definition uses for define the data types
*
* @note While porting the API please consider the following
* @note Please check the version of C standard
* @note Are you using Linux platform
*/
/*!
* @brief For the Linux platform support
* Please use the types.h for your data types definitions
*/
#ifdef __KERNEL__
#include <linux/types.h>
/* singed integer type*/
typedef int8_t s8;/**< used for signed 8bit */
typedef int16_t s16;/**< used for signed 16bit */
typedef int32_t s32;/**< used for signed 32bit */
typedef int64_t s64;/**< used for signed 64bit */
typedef u_int8_t u8;/**< used for unsigned 8bit */
typedef u_int16_t u16;/**< used for unsigned 16bit */
typedef u_int32_t u32;/**< used for unsigned 32bit */
typedef u_int64_t u64;/**< used for unsigned 64bit */
#else /* ! __KERNEL__ */
/**********************************************************
* These definition uses for define the C
* standard version data types
***********************************************************/
# if !defined(__STDC_VERSION__)
/************************************************
* compiler is C11 C standard
************************************************/
#if (__STDC_VERSION__ == 201112L)
/************************************************/
#include <stdint.h>
/************************************************/
/*unsigned integer types*/
typedef uint8_t u8;/**< used for unsigned 8bit */
typedef uint16_t u16;/**< used for unsigned 16bit */
typedef uint32_t u32;/**< used for unsigned 32bit */
typedef uint64_t u64;/**< used for unsigned 64bit */
/*signed integer types*/
typedef int8_t s8;/**< used for signed 8bit */
typedef int16_t s16;/**< used for signed 16bit */
typedef int32_t s32;/**< used for signed 32bit */
typedef int64_t s64;/**< used for signed 64bit */
/************************************************
* compiler is C99 C standard
************************************************/
#elif (__STDC_VERSION__ == 199901L)
/* stdint.h is a C99 supported c library.
which is used to fixed the integer size*/
/************************************************/
#include <stdint.h>
/************************************************/
/*unsigned integer types*/
typedef uint8_t u8;/**< used for unsigned 8bit */
typedef uint16_t u16;/**< used for unsigned 16bit */
typedef uint32_t u32;/**< used for unsigned 32bit */
typedef uint64_t u64;/**< used for unsigned 64bit */
/*signed integer types*/
typedef int8_t s8;/**< used for signed 8bit */
typedef int16_t s16;/**< used for signed 16bit */
typedef int32_t s32;/**< used for signed 32bit */
typedef int64_t s64;/**< used for signed 64bit */
/************************************************
* compiler is C89 or other C standard
************************************************/
#else /* !defined(__STDC_VERSION__) */
/*!
* @brief By default it is defined as 32 bit machine configuration
* define your data types based on your
* machine/compiler/controller configuration
*/
#define MACHINE_32_BIT
/*! @brief
* If your machine support 16 bit
* define the MACHINE_16_BIT
*/
#ifdef MACHINE_16_BIT
#include <limits.h>
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed long int s32;/**< used for signed 32bit */
#if defined(LONG_MAX) && LONG_MAX == 0x7fffffffffffffffL
typedef long int s64;/**< used for signed 64bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#elif defined(LLONG_MAX) && (LLONG_MAX == 0x7fffffffffffffffLL)
typedef long long int s64;/**< used for signed 64bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
#else
#warning Either the correct data type for signed 64 bit integer \
could not be found, or 64 bit integers are not supported in your environment.
#warning If 64 bit integers are supported on your platform, \
please set s64 manually.
#endif
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned long int u32;/**< used for unsigned 32bit */
/* If your machine support 32 bit
define the MACHINE_32_BIT*/
#elif defined MACHINE_32_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
/* If your machine support 64 bit
define the MACHINE_64_BIT*/
#elif defined MACHINE_64_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#else
#warning The data types defined above which not supported \
define the data types manually
#endif
#endif
/*** This else will execute for the compilers
* which are not supported the C standards
* Like C89/C99/C11***/
#else
/*!
* @brief By default it is defined as 32 bit machine configuration
* define your data types based on your
* machine/compiler/controller configuration
*/
#define MACHINE_32_BIT
/* If your machine support 16 bit
define the MACHINE_16_BIT*/
#ifdef MACHINE_16_BIT
#include <limits.h>
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed long int s32;/**< used for signed 32bit */
#if defined(LONG_MAX) && LONG_MAX == 0x7fffffffffffffffL
typedef long int s64;/**< used for signed 64bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#elif defined(LLONG_MAX) && (LLONG_MAX == 0x7fffffffffffffffLL)
typedef long long int s64;/**< used for signed 64bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
#else
#warning Either the correct data type for signed 64 bit integer \
could not be found, or 64 bit integers are not supported in your environment.
#warning If 64 bit integers are supported on your platform, \
please set s64 manually.
#endif
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned long int u32;/**< used for unsigned 32bit */
/*! @brief If your machine support 32 bit
define the MACHINE_32_BIT*/
#elif defined MACHINE_32_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long long int u64;/**< used for unsigned 64bit */
/* If your machine support 64 bit
define the MACHINE_64_BIT*/
#elif defined MACHINE_64_BIT
/*signed integer types*/
typedef signed char s8;/**< used for signed 8bit */
typedef signed short int s16;/**< used for signed 16bit */
typedef signed int s32;/**< used for signed 32bit */
typedef signed long int s64;/**< used for signed 64bit */
/*unsigned integer types*/
typedef unsigned char u8;/**< used for unsigned 8bit */
typedef unsigned short int u16;/**< used for unsigned 16bit */
typedef unsigned int u32;/**< used for unsigned 32bit */
typedef unsigned long int u64;/**< used for unsigned 64bit */
#else
#warning The data types defined above which not supported \
define the data types manually
#endif
#endif
#endif
/***************************************************************/
/**\name BUS READ AND WRITE FUNCTION POINTERS */
/***************************************************************/
/*!
@brief Define the calling convention of YOUR bus communication routine.
@note This includes types of parameters. This example shows the
configuration for an SPI bus link.
If your communication function looks like this:
write_my_bus_xy(u8 device_addr, u8 register_addr,
u8 * data, u8 length);
The BMG160_WR_FUNC_PTR would equal:
BMG160_WR_FUNC_PTR s8 (* bus_write)(u8,
u8, u8 *, u8)
Parameters can be mixed as needed refer to the
refer BMG160_BUS_WRITE_FUNC macro.
*/
/* defines the calling parameter types of the BMG160_WR_FUNCTION */
#define BMG160_BUS_WR_RETURN_TYPE s8
/* links the order of parameters defined in
BMG160_BUS_WR_PARAM_TYPE to function calls used inside the API*/
#define BMG160_BUS_WR_PARAM_TYPES u8, u8,\
u8 *, u8
/* links the order of parameters defined in
BMG160_BUS_WR_PARAM_TYPE to function calls used inside the API*/
#define BMG160_BUS_WR_PARAM_ORDER(device_addr, register_addr,\
register_data, wr_len)
/* never change this line */
#define BMG160_BUS_WRITE_FUNC(device_addr, register_addr,\
register_data, wr_len) bus_write(device_addr, register_addr,\
register_data, wr_len)
/**< link macro between API function calls and bus read function
@note The bus write function can change since this is a
system dependant issue.
If the bus_read parameter calling order is like: reg_addr,
reg_data, wr_len it would be as it is here.
If the parameters are differently ordered or your communication
function like I2C need to know the device address,
you can change this macro accordingly.
BMG160_BUS_READ_FUNC(dev_addr, reg_addr, reg_data, wr_len)\
bus_read(dev_addr, reg_addr, reg_data, wr_len)
This macro lets all API functions call YOUR communication routine in a
way that equals your definition in the
refer BMG160_WR_FUNC_PTR definition.
@note: this macro also includes the "MSB='1'
for reading BMG160 addresses.
*/
/*defines the return parameter type of the BMG160_RD_FUNCTION
*/
#define BMG160_BUS_RD_RETURN_TYPE s8
/* defines the calling parameter types of the BMG160_RD_FUNCTION
*/
#define BMG160_BUS_RD_PARAM_TYPES u8, u8,\
u8 *, u8
/* links the order of parameters defined in \
BMG160_BUS_RD_PARAM_TYPE to function calls used inside the API
*/
#define BMG160_BUS_RD_PARAM_ORDER (device_addr, register_addr,\
register_data)
/* never change this line */
#define BMG160_BUS_READ_FUNC(device_addr, register_addr,\
register_data, rd_len)bus_read(device_addr, register_addr,\
register_data, rd_len)
/* defines the return parameter type of the BMG160_RD_FUNCTION
*/
#define BMG160_BURST_RD_RETURN_TYPE s8
/* defines the calling parameter types of the BMG160_RD_FUNCTION
*/
#define BMG160_BURST_RD_PARAM_TYPES u8,\
u8, u8 *, s32
/* links the order of parameters defined in \
BMG160_BURST_RD_PARAM_TYPE to function calls used inside the API
*/
#define BMG160_BURST_RD_PARAM_ORDER (device_addr, register_addr,\
register_data)
/* never change this line */
#define BMG160_BURST_READ_FUNC(device_addr, register_addr,\
register_data, rd_len)burst_read(device_addr, \
register_addr, register_data, rd_len)
/*!
* @brief defines the return parameter type of the BMG160_DELAY_FUNCTION
*/
#define BMG160_DELAY_RETURN_TYPE void
/* never change this line */
#define BMG160_DELAY_FUNC(delay_in_msec)\
delay_func(delay_in_msec)
#define BMG160_RETURN_FUNCTION_TYPE s8
/*This refers BMG160 return type as signed */
/***************************************************************/
/**\name DEVICE ADDRESS OF BMG160 */
/***************************************************************/
#define BMG160_I2C_ADDR1 (0x68)
#define BMG160_I2C_ADDR2 (0x69)
/***************************************************************/
/**\name REGISTER ADDRESS DEFINITION */
/***************************************************************/
/*******************************************/
/**\name CHIP ID */
/*******************************************/
#define BMG160_CHIP_ID_ADDR (0x00)
/**<Address of Chip ID Register*/
/*******************************************/
/**\name DATA REGISTER */
/*******************************************/
#define BMG160_RATE_X_LSB_ADDR (0x02)
/**< Address of X axis Rate LSB Register */
#define BMG160_RATE_X_MSB_ADDR (0x03)
/**< Address of X axis Rate MSB Register */
#define BMG160_RATE_Y_LSB_ADDR (0x04)
/**< Address of Y axis Rate LSB Register */
#define BMG160_RATE_Y_MSB_ADDR (0x05)
/**< Address of Y axis Rate MSB Register */
#define BMG160_RATE_Z_LSB_ADDR (0x06)
/**< Address of Z axis Rate LSB Register */
#define BMG160_RATE_Z_MSB_ADDR (0x07)
/**< Address of Z axis Rate MSB Register */
#define BMG160_TEMP_ADDR (0x08)
/**< Address of Temperature Data LSB Register */
/*******************************************/
/**\name STATUS REGISTER */
/*******************************************/
#define BMG160_INTR_STAT0_ADDR (0x09)
/**< Address of Interrupt status Register */
#define BMG160_INTR_STAT1_ADDR (0x0A)
/**< Address of Interrupt status Register */
#define BMG160_INTR_STAT2_ADDR (0x0B)
/**< Address of Interrupt status Register */
#define BMG160_INTR_STAT3_ADDR (0x0C)
/**< Address of Interrupt status Register */
#define BMG160_FIFO_STAT_ADDR (0x0E)
/**< Address of FIFO status Register */
/*******************************************/
/**\name CONTROL REGISTER */
/*******************************************/
#define BMG160_RANGE_ADDR (0x0F)
/**< Address of Range address Register */
#define BMG160_BW_ADDR (0x10)
/**< Address of Bandwidth Register */
#define BMG160_MODE_LPM1_ADDR (0x11)
/**< Address of Mode LPM1 Register */
#define BMG160_MODE_LPM2_ADDR (0x12)
/**< Address of Mode LPM2 Register */
#define BMG160_HIGH_BW_ADDR (0x13)
/**< Address of Rate HIGH_BW Register */
#define BMG160_BGW_SOFT_RST_ADDR (0x14)
/**< Address of BGW Softreset Register */
/*******************************************/
/**\name INTERRUPT STATUS REGISTERS */
/*******************************************/
#define BMG160_INTR_ENABLE0_ADDR (0x15)
/**< Address of Interrupt Enable */
#define BMG160_INTR_ENABLE1_ADDR (0x16)
/**< Address of Interrupt Enable */
#define BMG160_INTR_MAP_ZERO_ADDR (0x17)
/**< Address of Interrupt MAP */
#define BMG160_INTR_MAP_ONE_ADDR (0x18)
/**< Address of Interrupt MAP */
#define BMG160_INTR_MAP_TWO_ADDR (0x19)
/**< Address of Interrupt MAP */
#define BMG160_INTR_ZERO_ADDR (0x1A)
/**< Address of Interrupt register */
#define BMG160_INTR_ONE_ADDR (0x1B)
/**< Address of Interrupt register */
#define BMG160_INTR_TWO_ADDR (0x1C)
/**< Address of Interrupt register */
#define BMG160_INTR_4_ADDR (0x1E)
/**< Address of Interrupt register */
#define BMG160_RST_LATCH_ADDR (0x21)
/**< Address of Reset Latch Register */
/***********************************************/
/**\name INTERRUPT HIGH RATE CONFIGURATION REGISTER */
/***********************************************/
#define BMG160_HIGHRATE_THRES_X_ADDR (0x22)
/**< Address of High Th x Address register */
#define BMG160_HIGHRATE_DURN_X_ADDR (0x23)
/**< Address of High Dur x Address register */
#define BMG160_HIGHRATE_THRES_Y_ADDR (0x24)
/**< Address of High Th y Address register */
#define BMG160_HIGHRATE_DURN_Y_ADDR (0x25)
/**< Address of High Dur y Address register */
#define BMG160_HIGHRATE_THRES_Z_ADDR (0x26)
/**< Address of High Th z Address register */
#define BMG160_HIGHRATE_DURN_Z_ADDR (0x27)
/**< Address of High Dur z Address register */
#define BMG160_SOC_ADDR (0x31)
/**< Address of SOC register */
/***********************************************/
/**\name OFFSET REGISTER */
/***********************************************/
#define BMG160_A_FOC_ADDR (0x32)
/**< Address of A_FOC Register */
/***********************************************/
/**\name NVM CONTROL REGISTER */
/***********************************************/
#define BMG160_TRIM_NVM_CTRL_ADDR (0x33)
/**< Address of Trim NVM control register */
#define BMG160_BGW_SPI3_WDT_ADDR (0x34)
/**< Address of BGW SPI3,WDT Register */
/***********************************************/
/**\name OFFSET OCNFIGURATION REGISTER */
/***********************************************/
/* Trim Register */
#define BMG160_OFFSET_OFC1_ADDR (0x36)
/**< Address of OFC1 Register */
#define BMG160_OFC2_ADDR (0x37)
/**< Address of OFC2 Register */
#define BMG160_OFC3_ADDR (0x38)
/**< Address of OFC3 Register */
#define BMG160_OFC4_ADDR (0x39)
/**< Address of OFC4 Register */
#define BMG160_TRIM_GP0_ADDR (0x3A)
/**< Address of Trim GP0 Register */
#define BMG160_TRIM_GP1_ADDR (0x3B)
/**< Address of Trim GP1 Register */
/***********************************************/
/**\name SELFTEST REGISTER */
/***********************************************/
#define BMG160_SELFTEST_ADDR (0x3C)
/**< Address of BGW Self test Register */
/***********************************************/
/**\name FIFO REGISTER */
/***********************************************/
/* Control Register */
#define BMG160_FIFO_CGF1_ADDR (0x3D)
/**< Address of FIFO CGF0 Register */
#define BMG160_FIFO_CGF0_ADDR (0x3E)
/**< Address of FIFO CGF1 Register */
/* Data Register */
#define BMG160_FIFO_DATA_ADDR (0x3F)
/**< Address of FIFO Data Register */
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE DATA REGISTERS */
/***********************************************/
/* Rate X LSB Register */
#define BMG160_RATE_X_LSB_BIT__POS (0)
/**< Last (8) bits of RateX LSB Registers */
#define BMG160_RATE_X_LSB_BIT__LEN (8)
#define BMG160_RATE_X_LSB_BIT__MSK (0xFF)
#define BMG160_RATE_X_LSB_BIT__REG (BMG160_RATE_X_LSB_ADDR)
/* Rate Y LSB Register */
/**< Last (8) bits of RateY LSB Registers */
#define BMG160_RATE_Y_LSB_BIT__POS (0)
#define BMG160_RATE_Y_LSB_BIT__LEN (8)
#define BMG160_RATE_Y_LSB_BIT__MSK (0xFF)
#define BMG160_RATE_Y_LSB_BIT__REG (BMG160_RATE_Y_LSB_ADDR)
/* Rate Z LSB Register */
/**< Last (8) bits of RateZ LSB Registers */
#define BMG160_RATE_Z_LSB_BIT__POS (0)
#define BMG160_RATE_Z_LSB_BIT__LEN (8)
#define BMG160_RATE_Z_LSB_BIT__MSK (0xFF)
#define BMG160_RATE_Z_LSB_BIT__REG (BMG160_RATE_Z_LSB_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK,
POSITION FOR THE INTERRUPT STATUS REGISTERS */
/***********************************************/
/* Interrupt status (0) Register */
/**< 2th bit of Interrupt status register */
#define BMG160_INTR_STAT0_ANY_MOTION_INTR__POS (2)
#define BMG160_INTR_STAT0_ANY_MOTION_INTR__LEN (1)
#define BMG160_INTR_STAT0_ANY_MOTION_INTR__MSK (0x04)
#define BMG160_INTR_STAT0_ANY_MOTION_INTR__REG (BMG160_INTR_STAT0_ADDR)
/**< 1st bit of Interrupt status register */
#define BMG160_INTR_STAT0_HIGHRATE_INTR__POS (1)
#define BMG160_INTR_STAT0_HIGHRATE_INTR__LEN (1)
#define BMG160_INTR_STAT0_HIGHRATE_INTR__MSK (0x02)
#define BMG160_INTR_STAT0_HIGHRATE_INTR__REG (BMG160_INTR_STAT0_ADDR)
/**< 1st and 2nd bit of Interrupt status register */
#define BMG160_INTR_STAT_ZERO__POS (1)
#define BMG160_INTR_STAT_ZERO__LEN (2)
#define BMG160_INTR_STAT_ZERO__MSK (0x06)
#define BMG160_INTR_STAT_ZERO__REG (BMG160_INTR_STAT0_ADDR)
/* Interrupt status (1) Register */
/**< 7th bit of Interrupt status register */
#define BMG160_INTR_STAT1_DATA_INTR__POS (7)
#define BMG160_INTR_STAT1_DATA_INTR__LEN (1)
#define BMG160_INTR_STAT1_DATA_INTR__MSK (0x80)
#define BMG160_INTR_STAT1_DATA_INTR__REG (BMG160_INTR_STAT1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE OFFSET STATUS REGISTERS */
/***********************************************/
/**< 6th bit of Interrupt status register */
#define BMG160_INTR_STAT1_AUTO_OFFSET_INTR__POS (6)
#define BMG160_INTR_STAT1_AUTO_OFFSET_INTR__LEN (1)
#define BMG160_INTR_STAT1_AUTO_OFFSET_INTR__MSK (0x40)
#define BMG160_INTR_STAT1_AUTO_OFFSET_INTR__REG (BMG160_INTR_STAT1_ADDR)
/**< 5th bit of Interrupt status register */
#define BMG160_INTR_STAT1_FAST_OFFSET_INTR__POS (5)
#define BMG160_INTR_STAT1_FAST_OFFSET_INTR__LEN (1)
#define BMG160_INTR_STAT1_FAST_OFFSET_INTR__MSK (0x20)
#define BMG160_INTR_STAT1_FAST_OFFSET_INTR__REG (BMG160_INTR_STAT1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE FIFO STATUS REGISTERS */
/***********************************************/
/**< 4th bit of Interrupt status register */
#define BMG160_INTR_STAT1_FIFO_INTR__POS (4)
#define BMG160_INTR_STAT1_FIFO_INTR__LEN (1)
#define BMG160_INTR_STAT1_FIFO_INTR__MSK (0x10)
#define BMG160_INTR_STAT1_FIFO_INTR__REG (BMG160_INTR_STAT1_ADDR)
/**< MSB (4) bits of Interrupt status1 register */
#define BMG160_INTR_STAT_ONE__POS (4)
#define BMG160_INTR_STAT_ONE__LEN (4)
#define BMG160_INTR_STAT_ONE__MSK (0xF0)
#define BMG160_INTR_STAT_ONE__REG (BMG160_INTR_STAT1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR
THE ANY MOTION CONFIGURATION REGISTERS */
/***********************************************/
/* Interrupt status (2) Register */
/**< 3th bit of Interrupt status register */
#define BMG160_INTR_STAT2_ANY_MOTION_SIGN_INTR__POS (3)
#define BMG160_INTR_STAT2_ANY_MOTION_SIGN_INTR__LEN (1)
#define BMG160_INTR_STAT2_ANY_MOTION_SIGN_INTR__MSK (0x08)
#define BMG160_INTR_STAT2_ANY_MOTION_SIGN_INTR__REG (BMG160_INTR_STAT2_ADDR)
/**< 2th bit of Interrupt status register */
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTZ_INTR__POS (2)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTZ_INTR__LEN (1)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTZ_INTR__MSK (0x04)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTZ_INTR__REG (BMG160_INTR_STAT2_ADDR)
/**< 1st bit of Interrupt status register */
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTY_INTR__POS (1)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTY_INTR__LEN (1)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTY_INTR__MSK (0x02)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTY_INTR__REG (BMG160_INTR_STAT2_ADDR)
/**< 0th bit of Interrupt status register */
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTX_INTR__POS (0)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTX_INTR__LEN (1)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTX_INTR__MSK (0x01)
#define BMG160_INTR_STAT2_ANY_MOTION_FIRSTX_INTR__REG (BMG160_INTR_STAT2_ADDR)
/**< (4) bits of Interrupt status register */
#define BMG160_INTR_STAT_TWO__POS (0)
#define BMG160_INTR_STAT_TWO__LEN (4)
#define BMG160_INTR_STAT_TWO__MSK (0x0F)
#define BMG160_INTR_STAT_TWO__REG (BMG160_INTR_STAT2_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR
THE HIGH RATE XYZ SIGN REGISTERS */
/***********************************************/
/* Interrupt status (3) Register */
/**< 3th bit of Interrupt status register */
#define BMG160_INTR_STAT3_HIGHRATE_SIGN_INTR__POS (3)
#define BMG160_INTR_STAT3_HIGHRATE_SIGN_INTR__LEN (1)
#define BMG160_INTR_STAT3_HIGHRATE_SIGN_INTR__MSK (0x08)
#define BMG160_INTR_STAT3_HIGHRATE_SIGN_INTR__REG (BMG160_INTR_STAT3_ADDR)
/**< 2th bit of Interrupt status register */
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTZ_INTR__POS (2)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTZ_INTR__LEN (1)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTZ_INTR__MSK (0x04)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTZ_INTR__REG (BMG160_INTR_STAT3_ADDR)
/**< 1st bit of Interrupt status register */
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTY_INTR__POS (1)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTY_INTR__LEN (1)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTY_INTR__MSK (0x02)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTY_INTR__REG (BMG160_INTR_STAT3_ADDR)
/**< 0th bit of Interrupt status register */
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTX_INTR__POS (0)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTX_INTR__LEN (1)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTX_INTR__MSK (0x01)
#define BMG160_INTR_STAT3_HIGHRATE_FIRSTX_INTR__REG (BMG160_INTR_STAT3_ADDR)
/**< LSB (4) bits of Interrupt status register */
#define BMG160_INTR_STAT_THREE__POS (0)
#define BMG160_INTR_STAT_THREE__LEN (4)
#define BMG160_INTR_STAT_THREE__MSK (0x0F)
#define BMG160_INTR_STAT_THREE__REG (BMG160_INTR_STAT3_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE FIFO OVERRUN */
/***********************************************/
/* BMG160 FIFO Status Register */
/**< 7th bit of FIFO status Register */
#define BMG160_FIFO_STAT_OVERRUN__POS (7)
#define BMG160_FIFO_STAT_OVERRUN__LEN (1)
#define BMG160_FIFO_STAT_OVERRUN__MSK (0x80)
#define BMG160_FIFO_STAT_OVERRUN__REG (BMG160_FIFO_STAT_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE FIFO FRAME COUNT */
/***********************************************/
/**< First (7) bits of FIFO status Register */
#define BMG160_FIFO_STAT_FRAME_COUNTER__POS (0)
#define BMG160_FIFO_STAT_FRAME_COUNTER__LEN (7)
#define BMG160_FIFO_STAT_FRAME_COUNTER__MSK (0x7F)
#define BMG160_FIFO_STAT_FRAME_COUNTER__REG (BMG160_FIFO_STAT_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE RANGE */
/***********************************************/
/**< First (3) bits of range Registers */
#define BMG160_RANGE_ADDR_RANGE__POS (0)
#define BMG160_RANGE_ADDR_RANGE__LEN (3)
#define BMG160_RANGE_ADDR_RANGE__MSK (0x07)
#define BMG160_RANGE_ADDR_RANGE__REG (BMG160_RANGE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE BANDWIDTH */
/***********************************************/
/**< First (3) bits of Bandwidth Registers */
#define BMG160_BW_ADDR__POS (0)
#define BMG160_BW_ADDR__LEN (3)
#define BMG160_BW_ADDR__MSK (0x07)
#define BMG160_BW_ADDR__REG (BMG160_BW_ADDR)
/**< 5th and 7th bit of LPM1 Register */
#define BMG160_MODE_LPM1__POS (5)
#define BMG160_MODE_LPM1__LEN (3)
#define BMG160_MODE_LPM1__MSK (0xA0)
#define BMG160_MODE_LPM1__REG (BMG160_MODE_LPM1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE POWER MODE */
/***********************************************/
/**< 1st to 3rd bit of LPM1 Register */
#define BMG160_MODELPM1_ADDR_SLEEP_DURN__POS (1)
#define BMG160_MODELPM1_ADDR_SLEEP_DURN__LEN (3)
#define BMG160_MODELPM1_ADDR_SLEEP_DURN__MSK (0x0E)
#define BMG160_MODELPM1_ADDR_SLEEP_DURN__REG \
(BMG160_MODE_LPM1_ADDR)
/**< 7th bit of Mode LPM2 Register */
#define BMG160_MODE_LPM2_ADDR_FAST_POWERUP__POS (7)
#define BMG160_MODE_LPM2_ADDR_FAST_POWERUP__LEN (1)
#define BMG160_MODE_LPM2_ADDR_FAST_POWERUP__MSK (0x80)
#define BMG160_MODE_LPM2_ADDR_FAST_POWERUP__REG \
(BMG160_MODE_LPM2_ADDR)
/**< 6th bit of Mode LPM2 Register */
#define BMG160_MODE_LPM2_ADDR_ADV_POWERSAVING__POS (6)
#define BMG160_MODE_LPM2_ADDR_ADV_POWERSAVING__LEN (1)
#define BMG160_MODE_LPM2_ADDR_ADV_POWERSAVING__MSK (0x40)
#define BMG160_MODE_LPM2_ADDR_ADV_POWERSAVING__REG \
(BMG160_MODE_LPM2_ADDR)
/**< 4th & 5th bit of Mode LPM2 Register */
#define BMG160_MODE_LPM2_ADDR_EXT_TRI_SELECT__POS (4)
#define BMG160_MODE_LPM2_ADDR_EXT_TRI_SELECT__LEN (2)
#define BMG160_MODE_LPM2_ADDR_EXT_TRI_SELECT__MSK (0x30)
#define BMG160_MODE_LPM2_ADDR_EXT_TRI_SELECT__REG \
(BMG160_MODE_LPM2_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE AUTO SLEEP DURATION */
/***********************************************/
/**< 0th to 2nd bit of LPM2 Register */
#define BMG160_MODE_LPM2_ADDR_AUTO_SLEEP_DURN__POS (0)
#define BMG160_MODE_LPM2_ADDR_AUTO_SLEEP_DURN__LEN (3)
#define BMG160_MODE_LPM2_ADDR_AUTO_SLEEP_DURN__MSK (0x07)
#define BMG160_MODE_LPM2_ADDR_AUTO_SLEEP_DURN__REG (BMG160_MODE_LPM2_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE HIGH BANDWIDTH */
/***********************************************/
/**< 7th bit of HIGH_BW Register */
#define BMG160_HIGH_BW__POS (7)
#define BMG160_HIGH_BW__LEN (1)
#define BMG160_HIGH_BW__MSK (0x80)
#define BMG160_HIGH_BW__REG (BMG160_HIGH_BW_ADDR)
/**< 6th bit of HIGH_BW Register */
#define BMG160_SHADOW_DIS__POS (6)
#define BMG160_SHADOW_DIS__LEN (1)
#define BMG160_SHADOW_DIS__MSK (0x40)
#define BMG160_SHADOW_DIS__REG (BMG160_HIGH_BW_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE DATA INTERRUPT */
/***********************************************/
/**< 7th bit of Interrupt Enable Registers */
#define BMG160_INTR_ENABLE0_DATA__POS (7)
#define BMG160_INTR_ENABLE0_DATA__LEN (1)
#define BMG160_INTR_ENABLE0_DATA__MSK (0x80)
#define BMG160_INTR_ENABLE0_DATA__REG (BMG160_INTR_ENABLE0_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE FIFO INTERRUPT */
/***********************************************/
/**< 6th bit of Interrupt Enable Registers */
#define BMG160_INTR_ENABLE0_FIFO__POS (6)
#define BMG160_INTR_ENABLE0_FIFO__LEN (1)
#define BMG160_INTR_ENABLE0_FIFO__MSK (0x40)
#define BMG160_INTR_ENABLE0_FIFO__REG (BMG160_INTR_ENABLE0_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION
FOR THE AUTO OFFSET INTERRUPT */
/***********************************************/
/**< 2nd bit of Interrupt Enable Registers */
#define BMG160_INTR_ENABLE0_AUTO_OFFSET__POS (2)
#define BMG160_INTR_ENABLE0_AUTO_OFFSET__LEN (1)
#define BMG160_INTR_ENABLE0_AUTO_OFFSET__MSK (0x04)
#define BMG160_INTR_ENABLE0_AUTO_OFFSET__REG (BMG160_INTR_ENABLE0_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE OUTPUT TYPE */
/***********************************************/
/**< 3rd bit of Interrupt Enable Registers */
#define BMG160_INTR_ENABLE1_IT2_OUTPUT_TYPE__POS (3)
#define BMG160_INTR_ENABLE1_IT2_OUTPUT_TYPE__LEN (1)
#define BMG160_INTR_ENABLE1_IT2_OUTPUT_TYPE__MSK (0x08)
#define BMG160_INTR_ENABLE1_IT2_OUTPUT_TYPE__REG \
(BMG160_INTR_ENABLE1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE LEVEL */
/***********************************************/
/**< 2nd bit of Interrupt Enable Registers */
#define BMG160_INTR_ENABLE1_IT2_LEVEL__POS (2)
#define BMG160_INTR_ENABLE1_IT2_LEVEL__LEN (1)
#define BMG160_INTR_ENABLE1_IT2_LEVEL__MSK (0x04)
#define BMG160_INTR_ENABLE1_IT2_LEVEL__REG \
(BMG160_INTR_ENABLE1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE OUTPUT TYPE */
/***********************************************/
/**< 1st bit of Interrupt Enable Registers */
#define BMG160_INTR_ENABLE1_IT1_OUTPUT_TYPE__POS (1)
#define BMG160_INTR_ENABLE1_IT1_OUTPUT_TYPE__LEN (1)
#define BMG160_INTR_ENABLE1_IT1_OUTPUT_TYPE__MSK (0x02)
#define BMG160_INTR_ENABLE1_IT1_OUTPUT_TYPE__REG \
(BMG160_INTR_ENABLE1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR THE LEVEL */
/***********************************************/
/**< 0th bit of Interrupt Enable Registers */
#define BMG160_INTR_ENABLE1_IT1_LEVEL__POS (0)
#define BMG160_INTR_ENABLE1_IT1_LEVEL__LEN (1)
#define BMG160_INTR_ENABLE1_IT1_LEVEL__MSK (0x01)
#define BMG160_INTR_ENABLE1_IT1_LEVEL__REG \
(BMG160_INTR_ENABLE1_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR HIGH RATE INTERRUPT */
/***********************************************/
/**< 3rd bit of Interrupt MAP (0) Registers */
#define BMG160_INTR_MAP_ZERO_INTR1_HIGHRATE__POS (3)
#define BMG160_INTR_MAP_ZERO_INTR1_HIGHRATE__LEN (1)
#define BMG160_INTR_MAP_ZERO_INTR1_HIGHRATE__MSK (0x08)
#define BMG160_INTR_MAP_ZERO_INTR1_HIGHRATE__REG \
(BMG160_INTR_MAP_ZERO_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR ANY_MOTION INTERRUPT */
/***********************************************/
/**< 1st bit of Interrupt MAP Registers */
#define BMG160_INTR_MAP_ZERO_INTR1_ANY_MOTION__POS (1)
#define BMG160_INTR_MAP_ZERO_INTR1_ANY_MOTION__LEN (1)
#define BMG160_INTR_MAP_ZERO_INTR1_ANY_MOTION__MSK (0x02)
#define BMG160_INTR_MAP_ZERO_INTR1_ANY_MOTION__REG \
(BMG160_INTR_MAP_ZERO_ADDR)
/**< 7th bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR2_DATA__POS (7)
#define BMG160_MAP_ONE_INTR2_DATA__LEN (1)
#define BMG160_MAP_ONE_INTR2_DATA__MSK (0x80)
#define BMG160_MAP_ONE_INTR2_DATA__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR FAST OFFSET INTERRUPT */
/***********************************************/
/**< 6th bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR2_FAST_OFFSET__POS (6)
#define BMG160_MAP_ONE_INTR2_FAST_OFFSET__LEN (1)
#define BMG160_MAP_ONE_INTR2_FAST_OFFSET__MSK (0x40)
#define BMG160_MAP_ONE_INTR2_FAST_OFFSET__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR FIFO INTERRUPT */
/***********************************************/
/**< 5th bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR2_FIFO__POS (5)
#define BMG160_MAP_ONE_INTR2_FIFO__LEN (1)
#define BMG160_MAP_ONE_INTR2_FIFO__MSK (0x20)
#define BMG160_MAP_ONE_INTR2_FIFO__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR AUTO OFFSET INTERRUPT */
/***********************************************/
/**< 4th bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR2_AUTO_OFFSET__POS (4)
#define BMG160_MAP_ONE_INTR2_AUTO_OFFSET__LEN (1)
#define BMG160_MAP_ONE_INTR2_AUTO_OFFSET__MSK (0x10)
#define BMG160_MAP_ONE_INTR2_AUTO_OFFSET__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/**< 3rd bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR1_AUTO_OFFSET__POS (3)
#define BMG160_MAP_ONE_INTR1_AUTO_OFFSET__LEN (1)
#define BMG160_MAP_ONE_INTR1_AUTO_OFFSET__MSK (0x08)
#define BMG160_MAP_ONE_INTR1_AUTO_OFFSET__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR FIFO INTERRUPT */
/**********************************************/
/**< 2nd bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR1_FIFO__POS (2)
#define BMG160_MAP_ONE_INTR1_FIFO__LEN (1)
#define BMG160_MAP_ONE_INTR1_FIFO__MSK (0x04)
#define BMG160_MAP_ONE_INTR1_FIFO__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR FAST OFFSET INTERRUPT */
/**********************************************/
/**< 1st bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR1_FAST_OFFSET__POS (1)
#define BMG160_MAP_ONE_INTR1_FAST_OFFSET__LEN (1)
#define BMG160_MAP_ONE_INTR1_FAST_OFFSET__MSK (0x02)
#define BMG160_MAP_ONE_INTR1_FAST_OFFSET__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR DATA INTERRUPT */
/**********************************************/
/**< 0th bit of MAP_1Registers */
#define BMG160_MAP_ONE_INTR1_DATA__POS (0)
#define BMG160_MAP_ONE_INTR1_DATA__LEN (1)
#define BMG160_MAP_ONE_INTR1_DATA__MSK (0x01)
#define BMG160_MAP_ONE_INTR1_DATA__REG \
(BMG160_INTR_MAP_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR HIGH RATE INTERRUPT */
/**********************************************/
/**< 3rd bit of Interrupt Map Registers */
#define BMG160_INTR_MAP_TWO_INTR2_HIGHRATE__POS (3)
#define BMG160_INTR_MAP_TWO_INTR2_HIGHRATE__LEN (1)
#define BMG160_INTR_MAP_TWO_INTR2_HIGHRATE__MSK (0x08)
#define BMG160_INTR_MAP_TWO_INTR2_HIGHRATE__REG \
(BMG160_INTR_MAP_TWO_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR ANY MOTION INTERRUPT */
/**********************************************/
/**< 1st bit of Interrupt Map Registers */
#define BMG160_INTR_MAP_TWO_INTR2_ANY_MOTION__POS (1)
#define BMG160_INTR_MAP_TWO_INTR2_ANY_MOTION__LEN (1)
#define BMG160_INTR_MAP_TWO_INTR2_ANY_MOTION__MSK (0x02)
#define BMG160_INTR_MAP_TWO_INTR2_ANY_MOTION__REG \
(BMG160_INTR_MAP_TWO_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR SLOW OFFSET UNFILT */
/**********************************************/
/**< 5th bit of Interrupt Registers */
#define BMG160_INTR_ZERO_ADDR_SLOW_OFFSET_UNFILT__POS (5)
#define BMG160_INTR_ZERO_ADDR_SLOW_OFFSET_UNFILT__LEN (1)
#define BMG160_INTR_ZERO_ADDR_SLOW_OFFSET_UNFILT__MSK (0x20)
#define BMG160_INTR_ZERO_ADDR_SLOW_OFFSET_UNFILT__REG \
(BMG160_INTR_ZERO_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR HIGH RATE UNFILT */
/**********************************************/
/**< 3rd bit of Interrupt Registers */
#define BMG160_INTR_ZERO_ADDR_HIGHRATE_UNFILT_DATA__POS (3)
#define BMG160_INTR_ZERO_ADDR_HIGHRATE_UNFILT_DATA__LEN (1)
#define BMG160_INTR_ZERO_ADDR_HIGHRATE_UNFILT_DATA__MSK (0x08)
#define BMG160_INTR_ZERO_ADDR_HIGHRATE_UNFILT_DATA__REG \
(BMG160_INTR_ZERO_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR ANY MOTION UNFILT */
/**********************************************/
/**< 1st bit of Interrupt (0) Registers */
#define BMG160_INTR_ZERO_ADDR_ANY_MOTION_UNFILT_DATA__POS (1)
#define BMG160_INTR_ZERO_ADDR_ANY_MOTION_UNFILT_DATA__LEN (1)
#define BMG160_INTR_ZERO_ADDR_ANY_MOTION_UNFILT_DATA__MSK (0x02)
#define BMG160_INTR_ZERO_ADDR_ANY_MOTION_UNFILT_DATA__REG \
(BMG160_INTR_ZERO_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR FAST OFFSET UNFILT */
/**********************************************/
/**< 7th bit of INT_1 Registers */
#define BMG160_INTR_ONE_ADDR_FAST_OFFSET_UNFILT__POS (7)
#define BMG160_INTR_ONE_ADDR_FAST_OFFSET_UNFILT__LEN (1)
#define BMG160_INTR_ONE_ADDR_FAST_OFFSET_UNFILT__MSK (0x80)
#define BMG160_INTR_ONE_ADDR_FAST_OFFSET_UNFILT__REG \
(BMG160_INTR_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR ANY MOTION THRESHOLD */
/**********************************************/
/**< First (7) bits of INT_1 Registers */
#define BMG160_INTR_ONE_ADDR_ANY_MOTION_THRES__POS (0)
#define BMG160_INTR_ONE_ADDR_ANY_MOTION_THRES__LEN (7)
#define BMG160_INTR_ONE_ADDR_ANY_MOTION_THRES__MSK (0x7F)
#define BMG160_INTR_ONE_ADDR_ANY_MOTION_THRES__REG \
(BMG160_INTR_ONE_ADDR)
/***********************************************/
/**\name BIT LENGTH, MASK, POSITION FOR AWAKE DURATION */
/**********************************************/
/**< Last (2) bits of INT 2Registers */
#define BMG160_INTR_TWO_ADDR_AWAKE_DURN__POS (6)
#define BMG160_INTR_TWO_ADDR_AWAKE_DURN__LEN (2)
#define BMG160_INTR_TWO_ADDR_AWAKE_DURN__MSK (0xC0)