From 59d128eb537b386f5fde4ed15f9363ddd8d38120 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 21 Aug 2024 10:54:50 -0400 Subject: [PATCH 01/19] revert changes to AArch64 machine passes --- .../AArch64DeadRegisterDefinitionsPass.cpp | 199 +----------------- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 15 -- 2 files changed, 1 insertion(+), 213 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp b/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp index 7763bd67e2b1..3e04cbae8acf 100644 --- a/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp +++ b/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp @@ -116,204 +116,7 @@ static bool atomicReadDroppedOnZero(unsigned Opcode) { void AArch64DeadRegisterDefinitions::processMachineBasicBlock( MachineBasicBlock &MBB) { const MachineFunction &MF = *MBB.getParent(); - for (MachineBasicBlock::iterator II = MBB.begin(), E = MBB.end(); II != E; ++II) { - MachineInstr &MI = *II; - if (MI.mayLoadOrStore()) { - bool tag = true; - unsigned operand_number = 0; - /* - * TODO: check if we need to do anything for LDRDl, LDRQl, LDRSWl, LDRSl, - * LDRWl and LDRXl. They load literals and have no GPR64sp operands but - * are marked as may load - */ - switch (MI.getOpcode()) { - case AArch64::LDRBBroW: - case AArch64::LDRBBroX: - case AArch64::LDRBBui: - case AArch64::LDRBroW: - case AArch64::LDRBroX: - case AArch64::LDRBui: - case AArch64::LDRDroW: - case AArch64::LDRDroX: - case AArch64::LDRDui: - case AArch64::LDRHHroW: - case AArch64::LDRHHroX: - case AArch64::LDRHHui: - case AArch64::LDRHroW: - case AArch64::LDRHroX: - case AArch64::LDRHui: - case AArch64::LDRQroW: - case AArch64::LDRQroX: - case AArch64::LDRQui: - case AArch64::LDRSBWroW: - case AArch64::LDRSBWroX: - case AArch64::LDRSBWui: - case AArch64::LDRSBXroW: - case AArch64::LDRSBXroX: - case AArch64::LDRSBXui: - case AArch64::LDRSHWroW: - case AArch64::LDRSHWroX: - case AArch64::LDRSHWui: - case AArch64::LDRSHXroW: - case AArch64::LDRSHXroX: - case AArch64::LDRSHXui: - case AArch64::LDRSWroW: - case AArch64::LDRSWroX: - case AArch64::LDRSWui: - case AArch64::LDRSroW: - case AArch64::LDRSroX: - case AArch64::LDRSui: - case AArch64::LDRWroW: - case AArch64::LDRWroX: - case AArch64::LDRWui: - case AArch64::LDRXroW: - case AArch64::LDRXroX: - case AArch64::LDRXui: - case AArch64::LDR_PXI: - case AArch64::LDR_TX: - case AArch64::LDR_ZXI: - case AArch64::LDRAAindexed: - case AArch64::LDRABindexed: - case AArch64::STRBBroW: - case AArch64::STRBBroX: - case AArch64::STRBBui: - case AArch64::STRBroW: - case AArch64::STRBroX: - case AArch64::STRBui: - case AArch64::STRDroW: - case AArch64::STRDroX: - case AArch64::STRDui: - case AArch64::STRHHroW: - case AArch64::STRHHroX: - case AArch64::STRHHui: - case AArch64::STRHroW: - case AArch64::STRHroX: - case AArch64::STRHui: - case AArch64::STRQroW: - case AArch64::STRQroX: - case AArch64::STRQui: - case AArch64::STRSroW: - case AArch64::STRSroX: - case AArch64::STRSui: - case AArch64::STRWroW: - case AArch64::STRWroX: - case AArch64::STRWui: - case AArch64::STRXroW: - case AArch64::STRXroX: - case AArch64::STRXui: - case AArch64::STR_PXI: - case AArch64::STR_TX: - case AArch64::STR_ZXI: - operand_number = 1; - break; - case AArch64::LDPDi: - case AArch64::LDPQi: - case AArch64::LDPSWi: - case AArch64::LDPSi: - case AArch64::LDPWi: - case AArch64::LDPXi: - case AArch64::LDRAAwriteback: - case AArch64::LDRABwriteback: - case AArch64::LDRBBpost: - case AArch64::LDRBBpre: - case AArch64::LDRBpost: - case AArch64::LDRBpre: - case AArch64::LDRDpost: - case AArch64::LDRDpre: - case AArch64::LDRHHpost: - case AArch64::LDRHHpre: - case AArch64::LDRHpost: - case AArch64::LDRHpre: - case AArch64::LDRQpost: - case AArch64::LDRQpre: - case AArch64::LDRSBWpost: - case AArch64::LDRSBWpre: - case AArch64::LDRSBXpost: - case AArch64::LDRSBXpre: - case AArch64::LDRSHWpost: - case AArch64::LDRSHWpre: - case AArch64::LDRSHXpost: - case AArch64::LDRSHXpre: - case AArch64::LDRSWpost: - case AArch64::LDRSWpre: - case AArch64::LDRSpost: - case AArch64::LDRSpre: - case AArch64::LDRWpost: - case AArch64::LDRWpre: - case AArch64::LDRXpost: - case AArch64::LDRXpre: - case AArch64::STPDi: - case AArch64::STPQi: - case AArch64::STPSi: - case AArch64::STPWi: - case AArch64::STPXi: - case AArch64::STRBBpost: - case AArch64::STRBBpre: - case AArch64::STRBpost: - case AArch64::STRBpre: - case AArch64::STRDpost: - case AArch64::STRDpre: - case AArch64::STRHHpost: - case AArch64::STRHHpre: - case AArch64::STRHpost: - case AArch64::STRHpre: - case AArch64::STRQpost: - case AArch64::STRQpre: - case AArch64::STRSpost: - case AArch64::STRSpre: - case AArch64::STRWpost: - case AArch64::STRWpre: - case AArch64::STRXpost: - case AArch64::STRXpre: - operand_number = 2; - break; - case AArch64::LDPDpost: - case AArch64::LDPDpre: - case AArch64::LDPQpost: - case AArch64::LDPQpre: - case AArch64::LDPSWpost: - case AArch64::LDPSWpre: - case AArch64::LDPSpost: - case AArch64::LDPSpre: - case AArch64::LDPWpost: - case AArch64::LDPWpre: - case AArch64::LDPXpost: - case AArch64::LDPXpre: - case AArch64::LDR_ZA: - case AArch64::STPDpost: - case AArch64::STPDpre: - case AArch64::STPQpost: - case AArch64::STPQpre: - case AArch64::STPSpost: - case AArch64::STPSpre: - case AArch64::STPWpost: - case AArch64::STPWpre: - case AArch64::STPXpost: - case AArch64::STPXpre: - case AArch64::STR_ZA: - operand_number = 3; - break; - default: - tag = false; - break; - } - assert(tag); - const MCInstrDesc &EXTRII = TII->get(AArch64::EXTRWrri); - - auto op = MI.getOperand(operand_number); - LLVM_DEBUG(dbgs() << "opcode num is " << MI.getOpcode() << " checking operand " << operand_number << "\n"); - assert(op.isReg()); - auto reg = op.getReg(); - MachineInstrBuilder MIB2 = BuildMI(MBB, MI, MI.getDebugLoc(), EXTRII); - MIB2.addReg(reg).addReg(reg).addReg(AArch64::X18).addImm(56); - - MachineInstrBuilder MIB3 = BuildMI(MBB, MI, MI.getDebugLoc(), EXTRII); - MIB3.addReg(reg).addReg(reg).addReg(reg).addImm(4); - II = MIB3; - II++; - Changed = true; - continue; - } + for (MachineInstr &MI : MBB) { if (usesFrameIndex(MI)) { // We need to skip this instruction because while it appears to have a // dead def it uses a frame index which might expand into a multi diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index a46f959617df..62cf6a2c47ac 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -66,7 +66,6 @@ #include "llvm/Support/Casting.h" #include "llvm/Support/CodeGen.h" #include "llvm/Support/Compiler.h" -#include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/MathExtras.h" #include @@ -75,8 +74,6 @@ #include #include -#define DEBUG_TYPE "aarch64-fastisel" - using namespace llvm; namespace { @@ -2141,18 +2138,6 @@ bool AArch64FastISel::emitStore(MVT VT, unsigned SrcReg, Address Addr, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II).addReg(SrcReg); addLoadStoreOperands(Addr, MIB, MachineMemOperand::MOStore, ScaleFactor, MMO); - //bool sp_relative = Addr.isFIBase(); - //bool reg_offset = !Addr.getOffsetReg(); - //if (!sp_relative) { - // const MCInstrDesc &II2 = TII.get(AArch64::EXTRXrri); - // MachineInstrBuilder MIB2 = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II2); - // MIB2.addReg(Addr.getReg()).addReg(Addr.getReg()).addReg(AArch64::X18).addImm(56); - - // const MCInstrDesc &II3 = TII.get(AArch64::EXTRXrri); - // MachineInstrBuilder MIB3 = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II3); - // MIB3.addReg(Addr.getReg()).addReg(Addr.getReg()).addReg(Addr.getReg()).addImm(8); - //} - return true; } From eea89c4cba3a32d78d7f5dfd264780d5dd440839 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 21 Aug 2024 10:51:53 -0400 Subject: [PATCH 02/19] add AArch64LoadStoreTagging pass operating on LLVM IR --- .../Utils/AArch64LoadStoreTagging.h | 25 +++++++ llvm/lib/Passes/PassBuilderPipelines.cpp | 5 ++ .../Utils/AArch64LoadStoreTagging.cpp | 71 +++++++++++++++++++ llvm/lib/Transforms/Utils/CMakeLists.txt | 1 + 4 files changed, 102 insertions(+) create mode 100644 llvm/include/llvm/Transforms/Utils/AArch64LoadStoreTagging.h create mode 100644 llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp diff --git a/llvm/include/llvm/Transforms/Utils/AArch64LoadStoreTagging.h b/llvm/include/llvm/Transforms/Utils/AArch64LoadStoreTagging.h new file mode 100644 index 000000000000..2911382984b2 --- /dev/null +++ b/llvm/include/llvm/Transforms/Utils/AArch64LoadStoreTagging.h @@ -0,0 +1,25 @@ +//===-- AArch64LoadStoreTagging.h - Tag addrs used in loads and stores ----===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_TRANSFORMS_AARCH64LOADSTORETAGGING_H +#define LLVM_TRANSFORMS_AARCH64LOADSTORETAGGING_H + +#include "llvm/IR/PassManager.h" + +namespace llvm { + +class AArch64LoadStoreTaggingPass : public PassInfoMixin { +public: + PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); + + static bool isRequired() { return true; } +}; + +} // namespace llvm + +#endif // LLVM_TRANSFORMS_AARCH64LOADSTORETAGGING_H diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp b/llvm/lib/Passes/PassBuilderPipelines.cpp index 3bb2ce0ae346..a60c8ed25b74 100644 --- a/llvm/lib/Passes/PassBuilderPipelines.cpp +++ b/llvm/lib/Passes/PassBuilderPipelines.cpp @@ -123,6 +123,7 @@ #include "llvm/Transforms/Scalar/SpeculativeExecution.h" #include "llvm/Transforms/Scalar/TailRecursionElimination.h" #include "llvm/Transforms/Scalar/WarnMissedTransforms.h" +#include "llvm/Transforms/Utils/AArch64LoadStoreTagging.h" #include "llvm/Transforms/Utils/AddDiscriminators.h" #include "llvm/Transforms/Utils/AssumeBundleBuilder.h" #include "llvm/Transforms/Utils/CanonicalizeAliases.h" @@ -1174,6 +1175,8 @@ PassBuilder::buildModuleSimplificationPipeline(OptimizationLevel Level, MPM.addPass(AlwaysInlinerPass(/*InsertLifetimeIntrinsics=*/true)); + MPM.addPass(createModuleToFunctionPassAdaptor(AArch64LoadStoreTaggingPass())); + if (EnableModuleInliner) MPM.addPass(buildModuleInlinerPipeline(Level, Phase)); else @@ -2120,6 +2123,8 @@ ModulePassManager PassBuilder::buildO0DefaultPipeline(OptimizationLevel Level, MPM.addPass(createModuleToFunctionPassAdaptor(AnnotationRemarksPass())); + MPM.addPass(createModuleToFunctionPassAdaptor(AArch64LoadStoreTaggingPass())); + return MPM; } diff --git a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp new file mode 100644 index 000000000000..574ed1df15c3 --- /dev/null +++ b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp @@ -0,0 +1,71 @@ +//===-- AArch64LoadStoreTagging.cpp - Tag addrs used in loads and stores --===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "llvm/Transforms/Utils/AArch64LoadStoreTagging.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/Function.h" +#include "llvm/IR/IRBuilder.h" +#include "llvm/IR/Instruction.h" +#include "llvm/IR/Instructions.h" +#include "llvm/IR/Intrinsics.h" + +using namespace llvm; + +Value *readRegister(IRBuilder<> &IRB, StringRef Name) { + auto *C = &IRB.getContext(); + Module *M = IRB.GetInsertBlock()->getParent()->getParent(); + auto &DL = M->getDataLayout(); + Type *IntptrTy = IRB.getIntPtrTy(DL); + + Function *ReadRegister = + Intrinsic::getDeclaration(M, Intrinsic::read_register, IntptrTy); + MDNode *MD = MDNode::get(*C, {MDString::get(*C, Name)}); + Value *Args[] = {MetadataAsValue::get(*C, MD)}; + return IRB.CreateCall(ReadRegister, Args); +} + +PreservedAnalyses +AArch64LoadStoreTaggingPass::run(Function &F, FunctionAnalysisManager &AM) { + errs() << "instrumenting AArch64 loads/stores in " << F.getName() << "\n"; + + IRBuilder<> IRB(F.getContext()); + Module *M = F.getParent(); + auto &DL = M->getDataLayout(); + Type *IntptrTy = IRB.getIntPtrTy(DL); + Type *PtrTy = IRB.getPtrTy(); + + auto *FiftySix = ConstantInt::get(IntptrTy, 56); + + for (Function::iterator BB = F.begin(), BBE = F.end(); BB != BBE; ++BB) { + BasicBlock &B = *BB; + for (BasicBlock::iterator I = B.begin(), IE = B.end(); I != IE; ++I) { + StoreInst *SI = dyn_cast(&*I); + LoadInst *LI = dyn_cast(&*I); + if (LI || SI) { + IRBuilder<> IRB(&*I); + Value *ReadX18 = readRegister(IRB, "x18"); + Value *Pointer = SI ? SI->getPointerOperand() : LI->getPointerOperand(); + Value *PtrToInt = IRB.CreatePtrToInt(Pointer, IntptrTy, "makeint"); + + Value *Shl = IRB.CreateShl(ReadX18, FiftySix, "shift56"); + Value *Or = IRB.CreateOr(PtrToInt, Shl, "ortag"); + + Value *IntToPtrInst = IRB.CreateIntToPtr(Or, PtrTy, "makeptr"); + if (SI) { + SI->setOperand(SI->getPointerOperandIndex(), IntToPtrInst); + } else { + assert(LI); + LI->setOperand(LI->getPointerOperandIndex(), IntToPtrInst); + } + } + } + } + // return true; + + return PreservedAnalyses::all(); +} diff --git a/llvm/lib/Transforms/Utils/CMakeLists.txt b/llvm/lib/Transforms/Utils/CMakeLists.txt index 51e8821773c3..5989c0e5a4b4 100644 --- a/llvm/lib/Transforms/Utils/CMakeLists.txt +++ b/llvm/lib/Transforms/Utils/CMakeLists.txt @@ -1,4 +1,5 @@ add_llvm_component_library(LLVMTransformUtils + AArch64LoadStoreTagging.cpp AddDiscriminators.cpp AMDGPUEmitPrintf.cpp ASanStackFrameLayout.cpp From 7505a5615caf902457fd22241830b88d0bcf0017 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 21 Aug 2024 11:58:34 -0400 Subject: [PATCH 03/19] clarify error produced when -ffixed-x18 is not passed --- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 7947d73f9a4d..53bbf21d78c1 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -10463,7 +10463,10 @@ getRegisterByName(const char* RegName, LLT VT, const MachineFunction &MF) const unsigned DwarfRegNum = MRI->getDwarfRegNum(Reg, false); if (!Subtarget->isXRegisterReserved(DwarfRegNum) && !MRI->isReservedReg(MF, Reg)) - Reg = 0; + report_fatal_error( + Twine("Register \"" + StringRef(RegName) + + "\" is not reserved! Did you forget to pass -ffixed-" + + StringRef(RegName) + "?")); } if (Reg) return Reg; From 05420f8c7bb4282e411c675e8c6a7d24e5de4242 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Tue, 1 Oct 2024 14:27:20 -0400 Subject: [PATCH 04/19] change instruction sequence for tagging AArch64 pointers --- llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp index 574ed1df15c3..2929706aa23e 100644 --- a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp +++ b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp @@ -39,7 +39,7 @@ AArch64LoadStoreTaggingPass::run(Function &F, FunctionAnalysisManager &AM) { Type *IntptrTy = IRB.getIntPtrTy(DL); Type *PtrTy = IRB.getPtrTy(); - auto *FiftySix = ConstantInt::get(IntptrTy, 56); + auto *TopEightBitsSet = ConstantInt::get(IntptrTy, 0xff00'0000'0000'0000); for (Function::iterator BB = F.begin(), BBE = F.end(); BB != BBE; ++BB) { BasicBlock &B = *BB; @@ -52,8 +52,8 @@ AArch64LoadStoreTaggingPass::run(Function &F, FunctionAnalysisManager &AM) { Value *Pointer = SI ? SI->getPointerOperand() : LI->getPointerOperand(); Value *PtrToInt = IRB.CreatePtrToInt(Pointer, IntptrTy, "makeint"); - Value *Shl = IRB.CreateShl(ReadX18, FiftySix, "shift56"); - Value *Or = IRB.CreateOr(PtrToInt, Shl, "ortag"); + Value *And = IRB.CreateAnd(ReadX18, TopEightBitsSet, "andhighbitmask"); + Value *Or = IRB.CreateOr(PtrToInt, And, "ortag"); Value *IntToPtrInst = IRB.CreateIntToPtr(Or, PtrTy, "makeptr"); if (SI) { From 8759803036e171214c8ada3062cd5ad571a65f2d Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Tue, 1 Oct 2024 14:30:09 -0400 Subject: [PATCH 05/19] try to avoid tagging sp-relative accesses sp-relative instructions do not enforce MTE we check this by seeing if the pointer operand is an AllocaInst; I'm not 100% sure this is sufficient but it seems so thus far --- llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp index 2929706aa23e..47ea934f477f 100644 --- a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp +++ b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp @@ -47,9 +47,13 @@ AArch64LoadStoreTaggingPass::run(Function &F, FunctionAnalysisManager &AM) { StoreInst *SI = dyn_cast(&*I); LoadInst *LI = dyn_cast(&*I); if (LI || SI) { + Value *Pointer = SI ? SI->getPointerOperand() : LI->getPointerOperand(); + if (AllocaInst *AI = dyn_cast(Pointer)) { + continue; + } + IRBuilder<> IRB(&*I); Value *ReadX18 = readRegister(IRB, "x18"); - Value *Pointer = SI ? SI->getPointerOperand() : LI->getPointerOperand(); Value *PtrToInt = IRB.CreatePtrToInt(Pointer, IntptrTy, "makeint"); Value *And = IRB.CreateAnd(ReadX18, TopEightBitsSet, "andhighbitmask"); From 29239a7959be4e2e49891a66c8fa02f4f7d1d2e2 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 2 Oct 2024 23:15:24 -0400 Subject: [PATCH 06/19] add script to build compiler-rt --- cross-build-compiler-rt.sh | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100755 cross-build-compiler-rt.sh diff --git a/cross-build-compiler-rt.sh b/cross-build-compiler-rt.sh new file mode 100755 index 000000000000..1e76c1131730 --- /dev/null +++ b/cross-build-compiler-rt.sh @@ -0,0 +1,20 @@ +#!/bin/sh +# see https://llvm.org/docs/HowToCrossCompileBuiltinsOnArm.html +mkdir -p build-compiler-rt +cd build-compiler-rt +cross_flags="--gcc-toolchain=/usr -isystem /usr/aarch64-linux-gnu/include -march=armv8.5-a+memtag -ffixed-x18" +export LDFLAGS="-L/usr/aarch64-linux-gnu/lib" +cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ + -DCMAKE_BUILD_TYPE=RelWithDebInfo \ + -DCMAKE_C_FLAGS="$cross_flags --target=aarch64-linux-gnu" -DCMAKE_CXX_FLAGS="$cross_flags --target=aarch64-linux-gnu" \ + -DCMAKE_C_COMPILER="$(pwd)/../build/bin/clang" -DCMAKE_CXX_COMPILER="$(pwd)/../build/bin/clang" \ + -DCMAKE_BUILD_WITH_INSTALL_RPATH=true \ + -DCOMPILER_RT_BUILD_SANITIZERS=OFF -DCOMPILER_RT_BUILD_MEMPROF=OFF -DCOMPILER_RT_BUILD_ORC=OFF \ + -DCOMPILER_RT_BUILD_XRAY=OFF -DCOMPILER_RT_BUILD_LIBFUZZER=OFF \ + -DCOMPILER_RT_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ + ../compiler-rt +ninja +cd lib/linux +# rename CRT files to expected filenames +cp -a clang_rt.crtend-aarch64.o crtendS.o +cp -a clang_rt.crtbegin-aarch64.o crtbeginS.o From 0e724f285f9569a9b4b2d05235fb67fe21f5144a Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Fri, 18 Oct 2024 17:32:08 -0400 Subject: [PATCH 07/19] build other runtime components to avoid any system code in our runtime dependencies --- ...ild-compiler-rt.sh => cross-build-rtlibs.sh | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) rename cross-build-compiler-rt.sh => cross-build-rtlibs.sh (56%) diff --git a/cross-build-compiler-rt.sh b/cross-build-rtlibs.sh similarity index 56% rename from cross-build-compiler-rt.sh rename to cross-build-rtlibs.sh index 1e76c1131730..26a29034b902 100755 --- a/cross-build-compiler-rt.sh +++ b/cross-build-rtlibs.sh @@ -1,20 +1,22 @@ #!/bin/sh +# build compiler-rt, libcxx, libcxxabi, and libunwind with our patched clang # see https://llvm.org/docs/HowToCrossCompileBuiltinsOnArm.html -mkdir -p build-compiler-rt -cd build-compiler-rt -cross_flags="--gcc-toolchain=/usr -isystem /usr/aarch64-linux-gnu/include -march=armv8.5-a+memtag -ffixed-x18" +mkdir -p build-rtlibs +cd build-rtlibs +cross_flags="--sysroot=/usr/aarch64-linux-gnu/ --gcc-install-dir=/usr/lib/gcc/aarch64-linux-gnu/14.1.0 --rtlib=compiler-rt -march=armv8+memtag -ffixed-x18" export LDFLAGS="-L/usr/aarch64-linux-gnu/lib" cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ -DCMAKE_BUILD_TYPE=RelWithDebInfo \ -DCMAKE_C_FLAGS="$cross_flags --target=aarch64-linux-gnu" -DCMAKE_CXX_FLAGS="$cross_flags --target=aarch64-linux-gnu" \ -DCMAKE_C_COMPILER="$(pwd)/../build/bin/clang" -DCMAKE_CXX_COMPILER="$(pwd)/../build/bin/clang" \ -DCMAKE_BUILD_WITH_INSTALL_RPATH=true \ - -DCOMPILER_RT_BUILD_SANITIZERS=OFF -DCOMPILER_RT_BUILD_MEMPROF=OFF -DCOMPILER_RT_BUILD_ORC=OFF \ - -DCOMPILER_RT_BUILD_XRAY=OFF -DCOMPILER_RT_BUILD_LIBFUZZER=OFF \ - -DCOMPILER_RT_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ - ../compiler-rt + -DCMAKE_EXE_LINKER_FLAGS='--rtlib=compiler-rt' \ + -DCOMPILER_RT_BUILD_BUILTINS=ON \ + -DLIBCXX_USE_COMPILER_RT=YES \ + -DLLVM_ENABLE_RUNTIMES='libcxx;libcxxabi;compiler-rt;libunwind' \ + ../runtimes ninja -cd lib/linux +cd compiler-rt/lib/linux # rename CRT files to expected filenames cp -a clang_rt.crtend-aarch64.o crtendS.o cp -a clang_rt.crtbegin-aarch64.o crtbeginS.o From d8a86e2bd1cf4588c5bb0708e9f5322f24968e16 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Tue, 22 Oct 2024 13:52:25 -0400 Subject: [PATCH 08/19] probe CI --- cross-build-rtlibs.sh | 6 +++++- llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index 26a29034b902..5102081a497f 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -1,9 +1,13 @@ #!/bin/sh # build compiler-rt, libcxx, libcxxabi, and libunwind with our patched clang # see https://llvm.org/docs/HowToCrossCompileBuiltinsOnArm.html +set -x mkdir -p build-rtlibs cd build-rtlibs -cross_flags="--sysroot=/usr/aarch64-linux-gnu/ --gcc-install-dir=/usr/lib/gcc/aarch64-linux-gnu/14.1.0 --rtlib=compiler-rt -march=armv8+memtag -ffixed-x18" +ls -l /usr/lib/gcc/aarch64-linux-gnu +find /usr | fgrep crtbeginS.o +cross_flags="-B/usr/lib/gcc/aarch64-linux-gnu/14.1.0/ --sysroot=/usr/aarch64-linux-gnu -isystem /usr/aarch64-linux-gnu/include --rtlib=compiler-rt -march=armv8+memtag -ffixed-x18" +#--sysroot=/usr/aarch64-linux-gnu/ --gcc-install-dir=/usr/lib/gcc/aarch64-linux-gnu/14.1.0 export LDFLAGS="-L/usr/aarch64-linux-gnu/lib" cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ -DCMAKE_BUILD_TYPE=RelWithDebInfo \ diff --git a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp index 47ea934f477f..6c5f363770b1 100644 --- a/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp +++ b/llvm/lib/Transforms/Utils/AArch64LoadStoreTagging.cpp @@ -71,5 +71,5 @@ AArch64LoadStoreTaggingPass::run(Function &F, FunctionAnalysisManager &AM) { } // return true; - return PreservedAnalyses::all(); + return PreservedAnalyses::none(); } From f0e6afa34efb86142bbe64405a371d594c949b56 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Tue, 22 Oct 2024 14:24:36 -0400 Subject: [PATCH 09/19] search for crt dir --- cross-build-rtlibs.sh | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index 5102081a497f..01ac2a395ad5 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -5,8 +5,12 @@ set -x mkdir -p build-rtlibs cd build-rtlibs ls -l /usr/lib/gcc/aarch64-linux-gnu -find /usr | fgrep crtbeginS.o -cross_flags="-B/usr/lib/gcc/aarch64-linux-gnu/14.1.0/ --sysroot=/usr/aarch64-linux-gnu -isystem /usr/aarch64-linux-gnu/include --rtlib=compiler-rt -march=armv8+memtag -ffixed-x18" +find /usr/lib | fgrep crtbeginS.o +crt_candidates="$(ls -d /usr/lib/gcc/aarch64-linux-gnu/*) +$(ls -d /usr/lib/gcc-cross/aarch64-linux-gnu/*)" +crt_dir=$(echo $crt_candidates | sort -V | tail -n1) + +cross_flags="-B$crt_dir --sysroot=/usr/aarch64-linux-gnu --gcc-install-dir=$crt_dir -isystem /usr/aarch64-linux-gnu/include --rtlib=compiler-rt -march=armv8+memtag -ffixed-x18" #--sysroot=/usr/aarch64-linux-gnu/ --gcc-install-dir=/usr/lib/gcc/aarch64-linux-gnu/14.1.0 export LDFLAGS="-L/usr/aarch64-linux-gnu/lib" cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ From b510037a11c075be6eed8e007f2361bec7a8f07f Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Tue, 22 Oct 2024 19:59:49 -0400 Subject: [PATCH 10/19] futz about some more --- cross-build-rtlibs.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index 01ac2a395ad5..86088a26c3ef 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -10,7 +10,7 @@ crt_candidates="$(ls -d /usr/lib/gcc/aarch64-linux-gnu/*) $(ls -d /usr/lib/gcc-cross/aarch64-linux-gnu/*)" crt_dir=$(echo $crt_candidates | sort -V | tail -n1) -cross_flags="-B$crt_dir --sysroot=/usr/aarch64-linux-gnu --gcc-install-dir=$crt_dir -isystem /usr/aarch64-linux-gnu/include --rtlib=compiler-rt -march=armv8+memtag -ffixed-x18" +cross_flags="-B$crt_dir --sysroot=/usr/aarch64-linux-gnu --gcc-install-dir=$crt_dir -isystem /usr/aarch64-linux-gnu/include -march=armv8+memtag -ffixed-x18" #--sysroot=/usr/aarch64-linux-gnu/ --gcc-install-dir=/usr/lib/gcc/aarch64-linux-gnu/14.1.0 export LDFLAGS="-L/usr/aarch64-linux-gnu/lib" cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ @@ -18,8 +18,8 @@ cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aa -DCMAKE_C_FLAGS="$cross_flags --target=aarch64-linux-gnu" -DCMAKE_CXX_FLAGS="$cross_flags --target=aarch64-linux-gnu" \ -DCMAKE_C_COMPILER="$(pwd)/../build/bin/clang" -DCMAKE_CXX_COMPILER="$(pwd)/../build/bin/clang" \ -DCMAKE_BUILD_WITH_INSTALL_RPATH=true \ - -DCMAKE_EXE_LINKER_FLAGS='--rtlib=compiler-rt' \ -DCOMPILER_RT_BUILD_BUILTINS=ON \ + -DCOMPILER_RT_BUILD_SANITIZERS=OFF -DCOMPILER_RT_BUILD_MEMPROF=OFF -DCOMPILER_RT_BUILD_ORC=OFF -DCOMPILER_RT_BUILD_XRAY=OFF -DCOMPILER_RT_BUILD_LIBFUZZER=OFF \ -DLIBCXX_USE_COMPILER_RT=YES \ -DLLVM_ENABLE_RUNTIMES='libcxx;libcxxabi;compiler-rt;libunwind' \ ../runtimes From 2e55a4d66eb9bc7879140f5fcbe695c971c52edd Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 23 Oct 2024 10:16:47 -0400 Subject: [PATCH 11/19] build stub crt libs and avoid --sysroot --- cross-build-rtlibs.sh | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index 86088a26c3ef..c3e2412117e5 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -2,15 +2,24 @@ # build compiler-rt, libcxx, libcxxabi, and libunwind with our patched clang # see https://llvm.org/docs/HowToCrossCompileBuiltinsOnArm.html set -x + +# build stub crt object files to prevent wrong-arch ones from being selected +fake_crt_dir=$(pwd)/fake_crt +mkdir -p $fake_crt_dir +for crtobj in crtn.o crti.o Scrt1.o; do + aarch64-linux-gnu-gcc -c -x c /dev/null -o $fake_crt_dir/$crtobj +done + +# build runtime libs mkdir -p build-rtlibs cd build-rtlibs -ls -l /usr/lib/gcc/aarch64-linux-gnu -find /usr/lib | fgrep crtbeginS.o + +# find existing aarch64 crt for building test programs crt_candidates="$(ls -d /usr/lib/gcc/aarch64-linux-gnu/*) $(ls -d /usr/lib/gcc-cross/aarch64-linux-gnu/*)" crt_dir=$(echo $crt_candidates | sort -V | tail -n1) -cross_flags="-B$crt_dir --sysroot=/usr/aarch64-linux-gnu --gcc-install-dir=$crt_dir -isystem /usr/aarch64-linux-gnu/include -march=armv8+memtag -ffixed-x18" +cross_flags="-B$fake_crt_dir -B$crt_dir --gcc-toolchain=/usr --gcc-triple=aarch64-linux-gnu -v -isystem /usr/aarch64-linux-gnu/include -march=armv8+memtag -ffixed-x18" #--sysroot=/usr/aarch64-linux-gnu/ --gcc-install-dir=/usr/lib/gcc/aarch64-linux-gnu/14.1.0 export LDFLAGS="-L/usr/aarch64-linux-gnu/lib" cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ From 7e4d587bd0b05f7a6c43b9c3d06f866632fc64cd Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 23 Oct 2024 15:12:30 -0400 Subject: [PATCH 12/19] compile builtins with built compiler, passing -ffixed-x18 --- build.sh | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/build.sh b/build.sh index ff6488efac7d..bc9998805b22 100755 --- a/build.sh +++ b/build.sh @@ -3,9 +3,13 @@ # the default target triple to x86_64-linux-gnu mkdir -p build cd build +export CFLAGS="-ffixed-x18" +export CXXFLAGS="-ffixed-x18" cmake -GNinja -DLLVM_ENABLE_PROJECTS="clang" \ -DLLVM_TARGETS_TO_BUILD="AArch64" \ -DCMAKE_BUILD_TYPE=RelWithDebInfo \ + -DCOMPILER_RT_BUILD_BUILTINS=ON \ + -DLLVM_ENABLE_RUNTIMES="compiler-rt" \ -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ ../llvm -ninja clang +ninja clang builtins From 69d41c19f6fe1aca22b0cd3ca7fd00f5be98ef25 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 23 Oct 2024 15:12:40 -0400 Subject: [PATCH 13/19] remove -v --- cross-build-rtlibs.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index c3e2412117e5..d2176e5d9e83 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -19,7 +19,7 @@ crt_candidates="$(ls -d /usr/lib/gcc/aarch64-linux-gnu/*) $(ls -d /usr/lib/gcc-cross/aarch64-linux-gnu/*)" crt_dir=$(echo $crt_candidates | sort -V | tail -n1) -cross_flags="-B$fake_crt_dir -B$crt_dir --gcc-toolchain=/usr --gcc-triple=aarch64-linux-gnu -v -isystem /usr/aarch64-linux-gnu/include -march=armv8+memtag -ffixed-x18" +cross_flags="-B$fake_crt_dir -B$crt_dir --gcc-toolchain=/usr --gcc-triple=aarch64-linux-gnu -isystem /usr/aarch64-linux-gnu/include -march=armv8+memtag -ffixed-x18" #--sysroot=/usr/aarch64-linux-gnu/ --gcc-install-dir=/usr/lib/gcc/aarch64-linux-gnu/14.1.0 export LDFLAGS="-L/usr/aarch64-linux-gnu/lib" cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ From 98b848e731ae647206e82151d98efce1bc2eb38d Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 23 Oct 2024 15:12:56 -0400 Subject: [PATCH 14/19] add use_builtins_library --- cross-build-rtlibs.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index d2176e5d9e83..8662ebf1bcd8 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -28,6 +28,7 @@ cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aa -DCMAKE_C_COMPILER="$(pwd)/../build/bin/clang" -DCMAKE_CXX_COMPILER="$(pwd)/../build/bin/clang" \ -DCMAKE_BUILD_WITH_INSTALL_RPATH=true \ -DCOMPILER_RT_BUILD_BUILTINS=ON \ + -DCOMPILER_RT_USE_BUILTINS_LIBRARY=ON \ -DCOMPILER_RT_BUILD_SANITIZERS=OFF -DCOMPILER_RT_BUILD_MEMPROF=OFF -DCOMPILER_RT_BUILD_ORC=OFF -DCOMPILER_RT_BUILD_XRAY=OFF -DCOMPILER_RT_BUILD_LIBFUZZER=OFF \ -DLIBCXX_USE_COMPILER_RT=YES \ -DLLVM_ENABLE_RUNTIMES='libcxx;libcxxabi;compiler-rt;libunwind' \ From fca5f01eedb65eccb24b189eb5fb5bf907acc604 Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Wed, 23 Oct 2024 17:54:30 -0400 Subject: [PATCH 15/19] copy builtins to expected target triple --- build.sh | 2 ++ 1 file changed, 2 insertions(+) diff --git a/build.sh b/build.sh index bc9998805b22..9db93b70691d 100755 --- a/build.sh +++ b/build.sh @@ -13,3 +13,5 @@ cmake -GNinja -DLLVM_ENABLE_PROJECTS="clang" \ -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ ../llvm ninja clang builtins +# copy to expected target triple +cp -arv lib/clang/19/lib/aarch64-linux-gnu lib/clang/19/lib/aarch64-unknown-linux-gnu From 07990b55da80fb8010c364802f74007bd06e2f0b Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Thu, 24 Oct 2024 09:12:46 -0400 Subject: [PATCH 16/19] ci: try to save some disk space --- build.sh | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/build.sh b/build.sh index 9db93b70691d..921d1306d4d6 100755 --- a/build.sh +++ b/build.sh @@ -12,6 +12,14 @@ cmake -GNinja -DLLVM_ENABLE_PROJECTS="clang" \ -DLLVM_ENABLE_RUNTIMES="compiler-rt" \ -DLLVM_DEFAULT_TARGET_TRIPLE="aarch64-linux-gnu" \ ../llvm -ninja clang builtins +ninja clang +# free up disk space by stubbing out files that aren't needed for the next targets +rm -rf _CPack_Packages +for file in lib/libclangStaticAnalyzerCheckers.a lib/libclangCodeGen.a lib/libclangSema.a lib/libclangAST.a lib/libclangStaticAnalyzerCore.a lib/CodeGen/**/CMakeFiles/*.dir/*.o lib/Transforms/**/CMakeFiles/*.dir/*.o; do + mv $file $file.bak + touch $file --reference=$file.bak + rm $file.bak +done +ninja builtins # copy to expected target triple cp -arv lib/clang/19/lib/aarch64-linux-gnu lib/clang/19/lib/aarch64-unknown-linux-gnu From 84e8405ab09a7175d99ceea84b9bf4e325bac8fb Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Thu, 24 Oct 2024 13:55:05 -0400 Subject: [PATCH 17/19] don't build profile --- cross-build-rtlibs.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index 8662ebf1bcd8..7964395f87a1 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -29,7 +29,7 @@ cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aa -DCMAKE_BUILD_WITH_INSTALL_RPATH=true \ -DCOMPILER_RT_BUILD_BUILTINS=ON \ -DCOMPILER_RT_USE_BUILTINS_LIBRARY=ON \ - -DCOMPILER_RT_BUILD_SANITIZERS=OFF -DCOMPILER_RT_BUILD_MEMPROF=OFF -DCOMPILER_RT_BUILD_ORC=OFF -DCOMPILER_RT_BUILD_XRAY=OFF -DCOMPILER_RT_BUILD_LIBFUZZER=OFF \ + -DCOMPILER_RT_BUILD_SANITIZERS=OFF -DCOMPILER_RT_BUILD_PROFILE=OFF -DCOMPILER_RT_BUILD_MEMPROF=OFF -DCOMPILER_RT_BUILD_ORC=OFF -DCOMPILER_RT_BUILD_XRAY=OFF -DCOMPILER_RT_BUILD_LIBFUZZER=OFF \ -DLIBCXX_USE_COMPILER_RT=YES \ -DLLVM_ENABLE_RUNTIMES='libcxx;libcxxabi;compiler-rt;libunwind' \ ../runtimes From bb1e3621f80921c45fa806ecea93080b635b1d1e Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Thu, 24 Oct 2024 13:55:19 -0400 Subject: [PATCH 18/19] ci debugging: find libc++ headers --- cross-build-rtlibs.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/cross-build-rtlibs.sh b/cross-build-rtlibs.sh index 7964395f87a1..f51d26028767 100755 --- a/cross-build-rtlibs.sh +++ b/cross-build-rtlibs.sh @@ -34,6 +34,7 @@ cmake -GNinja -DLLVM_TARGETS_TO_BUILD="AArch64" -DLLVM_DEFAULT_TARGET_TRIPLE="aa -DLLVM_ENABLE_RUNTIMES='libcxx;libcxxabi;compiler-rt;libunwind' \ ../runtimes ninja +find include cd compiler-rt/lib/linux # rename CRT files to expected filenames cp -a clang_rt.crtend-aarch64.o crtendS.o From f593be8f7a8b58b18c093645416b1ecad67bdc5c Mon Sep 17 00:00:00 2001 From: Frances Wingerter Date: Thu, 24 Oct 2024 16:35:19 -0400 Subject: [PATCH 19/19] delete extra toolchain binaries after building compiler-rt --- build.sh | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/build.sh b/build.sh index 921d1306d4d6..b993303e77e4 100755 --- a/build.sh +++ b/build.sh @@ -21,5 +21,23 @@ for file in lib/libclangStaticAnalyzerCheckers.a lib/libclangCodeGen.a lib/libcl rm $file.bak done ninja builtins +# free up disk space by deleting binaries that aren't needed once builtins are built +unused_progs=(clang-tblgen +llvm-ar +llvm-min-tblgen +llvm-nm +llvm-objcopy +llvm-objdump +llvm-ranlib +llvm-readelf +llvm-readobj +llvm-size +llvm-strip +llvm-symbolizer +llvm-tblgen +sancov) +for prog in $unused_progs; do + rm bin/$prog +done # copy to expected target triple cp -arv lib/clang/19/lib/aarch64-linux-gnu lib/clang/19/lib/aarch64-unknown-linux-gnu