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sun50i-h6-orangepi-3.dts #3

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odibox opened this issue Oct 18, 2020 · 6 comments
Open

sun50i-h6-orangepi-3.dts #3

odibox opened this issue Oct 18, 2020 · 6 comments

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@odibox
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odibox commented Oct 18, 2020

Hello
Thank you for your work.

I have a question about the sun50i-h6-orangepi-3.dts file.

When I compile this, as you described.
With make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- -j4 orangepi_one_plus_defconfig
The linux Kernel loads sun50i-h6-orangepi-one-plus.dtb

So I changed u-boot to load sun50i-h6-orangepi-3.dts.
Then the orange Pi3 works but without pcie.

So I checked the dts files.
In the file sun50i-h6-pine-h64.dts, I found:
reg_pcie_slot: pcie-slot-power {
compatible = "regulator-fixed";
regulator-name = "pcie-slot-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
gpio = <&pio 2 15 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
and
&pcie {
vcc-supply = <&reg_bldo2>;
vdd-supply = <&reg_dcdcd>;
slot-supply = <&reg_pcie_slot>;
perst-gpio = <&pio 6 14 GPIO_ACTIVE_LOW>; /* PG14 */
status = "okay";
};

This is missing in the sun50i-h6-orangepi-3.dts.

My question is, why is this missing and which dtb file do you load during boot.

Thanks in advice for your answer.
Best regards,
Andreas

@ingamedeo
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ingamedeo commented Oct 18, 2020

The correct file to be used is sun50i-h6-orangepi-3.dts.
I have attached a version of the file with the correct pcie definitions.
Also attached you can find the u-boot config file to be compiled into a .src file.

boot.cmd.txt
sun50i-h6-orangepi-3.dts.txt

@odibox
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odibox commented Oct 19, 2020

Thank you.
I can confirm that it works. Now I see this during boot:
[ 2.230479] sunxi-pcie 5400000.pcie: host bridge /soc/pcie@5400000 ranges:
[ 2.230516] sunxi-pcie 5400000.pcie: IO 0x0005e00000..0x0005e0ffff -> 0x0000000000
[ 2.230534] sunxi-pcie 5400000.pcie: MEM 0x0005500000..0x0005cfffff -> 0x0005500000
[ 3.230754] sunxi-pcie 5400000.pcie: Phy link never came up
[ 3.432890] sunxi-pcie 5400000.pcie: Speed change timeout
[ 3.432895] sunxi-pcie 5400000.pcie: PCI-e speed of Gen1
[ 3.433036] sunxi-pcie 5400000.pcie: PCI host bridge to bus 0000:00
[ 3.433046] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 3.433053] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
[ 3.433060] pci_bus 0000:00: root bus resource [mem 0x05500000-0x05cfffff]
[ 3.433089] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400
[ 3.433120] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]
[ 3.433173] pci 0000:00:00.0: supports D1
[ 3.433180] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold
[ 3.436459] pci 0000:00:00.0: BAR 6: assigned [mem 0x05500000-0x0550ffff pref]
[ 3.436470] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[ 3.436791] pcieport 0000:00:00.0: PME: Signaling with IRQ 250
[ 3.437046] pcieport 0000:00:00.0: AER: enabled with IRQ 250

root@orangepi3:~# lspci
00:00.0 PCI bridge: Synopsys, Inc. DWC_usb3 (rev 01)

@ingamedeo
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Okay, very good.

Not all pcie cards work, if you try a card and it works write here the card model / controller, so we know. Thanks!

@waabyy
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waabyy commented Feb 19, 2021

Hello @ingamedeo @odibox ,
please I tried to fix my build according this chat but without success.

Compilation of "u-boot-el1-hyp-emmc" I tried it this way:

  • replace old file sun50i-h6-orangepi-3.dts in arch/arm/dts/ with new one from this chat
  • make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- -j4 orangepi3_defconfig
  • make -j8 ARCH=arm CROSS_COMPILE=aarch64-linux-gnu

It failed with following error:
....

OBJCOPY u-boot.srec
OBJCOPY u-boot-nodtb.bin
SYM u-boot.sym
DTC arch/arm/dts/sun50i-h6-orangepi-lite2.dtb
DTC arch/arm/dts/sun50i-h6-orangepi-one-plus.dtb
DTC arch/arm/dts/sun50i-h6-pine-h64.dtb
start=$(aarch64-linux-gnu-nm u-boot | grep __rel_dyn_start | cut -f 1 -d ' '); end=$(aarch64-linux-gnu-nm u-boot | grep __rel_dyn_end | cut -f 1 -d ' '); tools/relocate-rela u-boot-nodtb.bin 0x4a000000 $start $end

Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=<device_tree>' argument

dts/Makefile:28: recipe for target 'arch/arm/dts/sun50i-h6-orangepi-3.dtb' failed
make[1]: *** [arch/arm/dts/sun50i-h6-orangepi-3.dtb] Error 1
Makefile:1016: recipe for target 'dts/dt.dtb' failed

Then i found that sun50i-h6-orangepi-3.dtb is not supported by arch/arm/dts/Makefile :
....
sun50i-h5-orangepi-prime.dtb
sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_MACH_SUN50I_H6) +=
sun50i-h6-orangepi-lite2.dtb
sun50i-h6-orangepi-one-plus.dtb
sun50i-h6-pine-h64.dtb
dtb-$(CONFIG_MACH_SUN50I) +=
sun50i-a64-amarula-relic.dtb
sun50i-a64-bananapi-m64.dtb
......

but the structure of sun50i-h6-orangepi-3.dts seems different than orangepi-one-plus and the others.

So Iam not able to fix this. Could you please help me?
Also what is hte purpose of boot.cmd.txt ?

I spent with this problem more than one week.
Thank you in advance.
BR
Martin

@daryasyr
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daryasyr commented Nov 8, 2021

Thank you. I can confirm that it works. Now I see this during boot: [ 2.230479] sunxi-pcie 5400000.pcie: host bridge /soc/pcie@5400000 ranges: [ 2.230516] sunxi-pcie 5400000.pcie: IO 0x0005e00000..0x0005e0ffff -> 0x0000000000 [ 2.230534] sunxi-pcie 5400000.pcie: MEM 0x0005500000..0x0005cfffff -> 0x0005500000 [ 3.230754] sunxi-pcie 5400000.pcie: Phy link never came up [ 3.432890] sunxi-pcie 5400000.pcie: Speed change timeout [ 3.432895] sunxi-pcie 5400000.pcie: PCI-e speed of Gen1 [ 3.433036] sunxi-pcie 5400000.pcie: PCI host bridge to bus 0000:00 [ 3.433046] pci_bus 0000:00: root bus resource [bus 00-ff] [ 3.433053] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 3.433060] pci_bus 0000:00: root bus resource [mem 0x05500000-0x05cfffff] [ 3.433089] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400 [ 3.433120] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref] [ 3.433173] pci 0000:00:00.0: supports D1 [ 3.433180] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold [ 3.436459] pci 0000:00:00.0: BAR 6: assigned [mem 0x05500000-0x0550ffff pref] [ 3.436470] pci 0000:00:00.0: PCI bridge to [bus 01-ff] [ 3.436791] pcieport 0000:00:00.0: PME: Signaling with IRQ 250 [ 3.437046] pcieport 0000:00:00.0: AER: enabled with IRQ 250

root@orangepi3:~# lspci 00:00.0 PCI bridge: Synopsys, Inc. DWC_usb3 (rev 01)

Hi, can you send me a packaged image file, thank you very much

@fengjiannan2010
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谢谢你。 我可以确认它有效。现在我在启动时看到这个: [ 2.230479] sunxi-pcie 5400000.pcie: 主机桥 /soc/pcie@5400000 范围: [ 2.230516] sunxi-pcie 5400000.pcie: IO 0x0005e000000030x00000000000000000000000000003 PCIE 5400000.pcie:MEM 0x0005500000..0x0005cfffff - > 0x0005500000 [3.230754]孙鑫著作,-PCIE 5400000.pcie:物理层链路一直没上 [3.432890]孙鑫著作,-PCIE 5400000.pcie:变速超时 [3.432895]孙鑫著作,-PCIE 5400000.pcie : PCI-e 速度的 Gen1 [3.433036] sunxi-pcie 5400000.pcie: PCI 主机桥到总线 0000:00 [3.433046] pci_bus 0000:00: 根总线资源 [bus 00-ff] [3.433050000000]根总线资源 [io 0x0000-0xffff] [3.433060] pci_bus 0000:00: 根总线资源 [mem 0x05500000-0x05cffff] [3.433089] pci 0000:00:00.0: [16c3:abcd] 类型 01 类 0030000 :0306:03030:03030:04 mem 0x00000000-0x0000ffff pref] [ 3.433173] pci 0000:00:00.0: 支持 D1 [ 3.433180] pci 0000:00:00.0: 从 D0 分配的 PME# D1 D35AR39 :0606d.06d.06d.06d [mem 0x05500000-0x0550ffff pref] [ 3.436470] pci 0000:00:00.0: PCI 桥接至 [bus 01-ff] [ 3.436791] pcieport 0000:00:00.0: PME040 : Signaling: PME030 : Signaling : 00.0:AER:使用 IRQ 250 启用

root@orangepi3:~# lspci 00:00.0 PCI 桥:Synopsys, Inc. DWC_usb3 (rev 01)

Hi, can you send me a packaged image file, thank you very much

[email protected]

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