From 3207183a33da41aee478b78c6f4d48e24c03aa27 Mon Sep 17 00:00:00 2001 From: Pawel Szymichowski Date: Mon, 24 Feb 2025 11:28:35 +0000 Subject: [PATCH] Synchronization between branches --- IGC/VectorCompiler/lib/BiF/CMakeLists.txt | 40 +++++--- .../lib/BiF/cmake/Functions.cmake | 92 +++++++++++-------- .../test/GenXBuiltinFunctions/fdiv_f32.ll | 8 +- .../test/GenXBuiltinFunctions/fptoi_f16.ll | 6 +- .../test/GenXBuiltinFunctions/fptoi_f32.ll | 6 +- .../test/GenXBuiltinFunctions/fptoi_f64.ll | 6 +- .../test/GenXBuiltinFunctions/frem.ll | 8 +- .../test/GenXBuiltinFunctions/frem_llc.ll | 6 +- .../test/GenXBuiltinFunctions/fsqrt_llc.ll | 6 +- .../test/GenXTranslateSPIRVBuiltins/addc.ll | 10 +- .../GenXTranslateSPIRVBuiltins/addc_fatal.ll | 12 ++- .../test/GenXTranslateSPIRVBuiltins/assert.ll | 10 +- .../GenXTranslateSPIRVBuiltins/assert_decl.ll | 10 +- .../GenXTranslateSPIRVBuiltins/assert_fail.ll | 12 ++- .../GenXTranslateSPIRVBuiltins/atomic_fadd.ll | 10 +- .../atomic_fminmax.ll | 10 +- .../test/GenXTranslateSPIRVBuiltins/debug.ll | 10 +- .../test/GenXTranslateSPIRVBuiltins/dot.ll | 10 +- .../test/GenXTranslateSPIRVBuiltins/mulext.ll | 8 +- .../test/GenXTranslateSPIRVBuiltins/subb.ll | 10 +- .../test/ImportOCLBiF/spirv_builtin_log.ll | 10 +- .../test/PatternMatch/icmp-patt.ll | 10 +- .../test/PrintfResolution/arguments-m32.ll | 10 +- .../test/PrintfResolution/arguments.ll | 10 +- .../test/PrintfResolution/assert.ll | 10 +- .../test/PrintfResolution/attribute.ll | 10 +- .../test/PrintfResolution/debug.ll | 10 +- .../test/PrintfResolution/generic_format.ll | 10 +- .../test/PrintfResolution/hello_world.ll | 10 +- .../PrintfResolution/hello_world_legacy.ll | 10 +- .../PrintfResolution/spirv_hello_world.ll | 10 +- .../test/PrintfResolution/str_arg.ll | 10 +- .../test/PrintfResolution/str_arg_generic.ll | 10 +- .../test/PrintfResolution/str_arg_global.ll | 10 +- .../test/PrintfResolution/str_arg_legacy.ll | 10 +- .../test/PrintfResolution/str_vs_ptr.ll | 10 +- .../test/SPIRVBuiltins/atomic_builtins.ll | 10 +- .../atomic_float_with_integer.ll | 10 +- .../test/SPIRVBuiltins/bfloat16.ll | 9 +- .../test/SPIRVBuiltins/comparison.ll | 9 +- .../test/SPIRVBuiltins/exec_spirv_builtins.ll | 10 +- .../test/SPIRVBuiltins/gen_cast_to_ptr.ll | 10 +- .../test/SPIRVBuiltins/import_with_inline.ll | 9 +- .../test/SPIRVBuiltins/math_builtins.ll | 10 +- .../test/SPIRVBuiltins/math_half_builtins.ll | 9 +- .../SPIRVBuiltins/math_native_builtins.ll | 9 +- .../test/SPIRVBuiltins/rounding.ll | 9 +- .../test/SPIRVBuiltins/tensorfloat32.ll | 9 +- .../test/SPIRVBuiltins/timestamp.ll | 9 +- IGC/VectorCompiler/test/lit.cfg.py | 25 +++-- IGC/VectorCompiler/test/lit.site.cfg.py.in | 7 +- IGC/cmake/igc_llvm.cmake | 22 +---- 52 files changed, 347 insertions(+), 279 deletions(-) diff --git a/IGC/VectorCompiler/lib/BiF/CMakeLists.txt b/IGC/VectorCompiler/lib/BiF/CMakeLists.txt index fb4bc9f32962..4a69d5d2bf26 100644 --- a/IGC/VectorCompiler/lib/BiF/CMakeLists.txt +++ b/IGC/VectorCompiler/lib/BiF/CMakeLists.txt @@ -1,6 +1,6 @@ #=========================== begin_copyright_notice ============================ # -# Copyright (C) 2021-2023 Intel Corporation +# Copyright (C) 2021-2025 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -12,10 +12,14 @@ set(RESOURCE_EMBEDDER_SCRIPT ${IGC_SOURCE_DIR}/BiFModule/resource_embedder.py) set(VCB_EXE "vcb" CACHE STRING "") set(PRINTF_COMMON ${CMAKE_CURRENT_SOURCE_DIR}/Print/common.h) -vc_embed_bif(PRINTF_OCL_32 Print/ocl.cpp VCBiFPrintfOCL 32 DEPENDS ${PRINTF_COMMON}) -vc_embed_bif(PRINTF_OCL_64 Print/ocl.cpp VCBiFPrintfOCL 64 DEPENDS ${PRINTF_COMMON}) -vc_embed_bif(PRINTF_ZE_32 Print/ze.cpp VCBiFPrintfZE 32 DEPENDS ${PRINTF_COMMON}) -vc_embed_bif(PRINTF_ZE_64 Print/ze.cpp VCBiFPrintfZE 64 DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_OCL_32_TYPED_PTRS Print/ocl.cpp VCBiFPrintfOCL 32 FALSE DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_OCL_32_OPAQUE_PTRS Print/ocl.cpp VCBiFPrintfOCL 32 TRUE DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_OCL_64_TYPED_PTRS Print/ocl.cpp VCBiFPrintfOCL 64 FALSE DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_OCL_64_OPAQUE_PTRS Print/ocl.cpp VCBiFPrintfOCL 64 TRUE DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_ZE_32_TYPED_PTRS Print/ze.cpp VCBiFPrintfZE 32 FALSE DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_ZE_32_OPAQUE_PTRS Print/ze.cpp VCBiFPrintfZE 32 TRUE DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_ZE_64_TYPED_PTRS Print/ze.cpp VCBiFPrintfZE 64 FALSE DEPENDS ${PRINTF_COMMON}) +vc_embed_bif(PRINTF_ZE_64_OPAQUE_PTRS Print/ze.cpp VCBiFPrintfZE 64 TRUE DEPENDS ${PRINTF_COMMON}) #Define the macro if Khronos SPIR-V translator is used. if(IGC_OPTION__USE_KHRONOS_SPIRV_TRANSLATOR_IN_SC) @@ -31,7 +35,10 @@ set(SPIRV_BUILTIN_SOURCES Spirv/exec.cpp Spirv/math.cpp) -vc_embed_bif(SPIRV_BUILTINS "${SPIRV_BUILTIN_SOURCES}" VCSPIRVBuiltins 64 +vc_embed_bif(SPIRV_BUILTINS_TYPED_PTRS "${SPIRV_BUILTIN_SOURCES}" VCSPIRVBuiltins 64 FALSE + CLANG_INCLUDES ${IGC_SPIRV_HEADERS_INCLUDES} + CLANG_FLAGS ${CLANG_FLAGS_FOR_SPIRV_BUILTINS}) +vc_embed_bif(SPIRV_BUILTINS_OPAQUE_PTRS "${SPIRV_BUILTIN_SOURCES}" VCSPIRVBuiltins 64 TRUE CLANG_INCLUDES ${IGC_SPIRV_HEADERS_INCLUDES} CLANG_FLAGS ${CLANG_FLAGS_FOR_SPIRV_BUILTINS}) @@ -57,14 +64,21 @@ set(BUILTIN_SOURCES Library/Atomics/Local/binop.cpp) -vc_embed_optimized_bif(BUILTINS "${BUILTIN_SOURCES}" VCBuiltins 64) +vc_embed_optimized_bif(BUILTINS_TYPED_PTRS "${BUILTIN_SOURCES}" VCBuiltins 64 FALSE) +vc_embed_optimized_bif(BUILTINS_OPAQUE_PTRS "${BUILTIN_SOURCES}" VCBuiltins 64 TRUE) -add_custom_target(VCBiFPreparation - DEPENDS ${PRINTF_OCL_32} ${PRINTF_OCL_64} ${PRINTF_ZE_32} ${PRINTF_ZE_64} - ${BUILTINS} ${SPIRV_BUILTINS}) +set(BIF_OUTPUT_TYPED_PTRS ${PRINTF_OCL_32_TYPED_PTRS} ${PRINTF_OCL_64_TYPED_PTRS} + ${PRINTF_ZE_32_TYPED_PTRS} ${PRINTF_ZE_64_TYPED_PTRS} + ${BUILTINS_TYPED_PTRS} ${SPIRV_BUILTINS_TYPED_PTRS}) +set(BIF_OUTPUT_OPAQUE_PTRS ${PRINTF_OCL_32_OPAQUE_PTRS} ${PRINTF_OCL_64_OPAQUE_PTRS} + ${PRINTF_ZE_32_OPAQUE_PTRS} ${PRINTF_ZE_64_OPAQUE_PTRS} + ${BUILTINS_OPAQUE_PTRS} ${SPIRV_BUILTINS_OPAQUE_PTRS}) -add_library(VCEmbeddedBiF OBJECT - ${PRINTF_OCL_32} ${PRINTF_OCL_64} ${PRINTF_ZE_32} ${PRINTF_ZE_64} - ${BUILTINS} ${SPIRV_BUILTINS}) +add_custom_target(VCBiFPreparation DEPENDS ${BIF_OUTPUT_TYPED_PTRS} ${BIF_OUTPUT_OPAQUE_PTRS}) +if(IGC_OPTION__API_ENABLE_OPAQUE_POINTERS) + add_library(VCEmbeddedBiF OBJECT ${BIF_OUTPUT_OPAQUE_PTRS}) +else() + add_library(VCEmbeddedBiF OBJECT ${BIF_OUTPUT_TYPED_PTRS}) +endif() add_dependencies(VCEmbeddedBiF VCBiFPreparation) target_link_libraries(VCEmbeddedBiF VCHeaders) diff --git a/IGC/VectorCompiler/lib/BiF/cmake/Functions.cmake b/IGC/VectorCompiler/lib/BiF/cmake/Functions.cmake index e8eeea1163c3..ae8f8236d4c6 100644 --- a/IGC/VectorCompiler/lib/BiF/cmake/Functions.cmake +++ b/IGC/VectorCompiler/lib/BiF/cmake/Functions.cmake @@ -1,13 +1,11 @@ #=========================== begin_copyright_notice ============================ # -# Copyright (C) 2021-2023 Intel Corporation +# Copyright (C) 2021-2025 Intel Corporation # # SPDX-License-Identifier: MIT # #============================ end_copyright_notice ============================= -set(OPT_OPAQUE_ARG ${IGC_BUILD__OPAQUE_POINTERS_DEFAULT_ARG_OPT}) - # Args: # RES_LIST - generated list # REQUIRED_TARGET - target to link with @@ -31,8 +29,9 @@ endfunction() # Args: # RES_FILE - variable name to put generated file path into. # CMCL_SRC_PATH - multivalue. path to CMCL sources. -# BIF_NAME - name for all the generated files without extension. +# MANGLED_BIF_NAME - name for all the generated files without extension. # PTR_BIT_SIZE - bit size of a pointer, 32 or 64 are allowed. +# OPAQUE_PTRS - use opaque pointers during the generation. # # Optional arguments: # CLANG_INCLUDES - Argument representing extra include directories passed to @@ -41,7 +40,7 @@ endfunction() # DEPENDS - multivalue. Can be used to establish file-level dependency. # Useful if we want to have a dependency from auto-generated files # that are created by some other target(s). -function(vc_build_bif TARGET RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) +function(vc_build_bif RES_FILE CMCL_SRC_PATH MANGLED_BIF_NAME PTR_BIT_SIZE OPAQUE_PTRS) cmake_parse_arguments(PARSE_ARGV 4 EXTRA "" @@ -51,12 +50,22 @@ function(vc_build_bif TARGET RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) if((NOT (${PTR_BIT_SIZE} EQUAL 32)) AND (NOT (${PTR_BIT_SIZE} EQUAL 64))) message(FATAL_ERROR "vc_build_bif: wrong argument: PTR_BIT_SIZE = ${PTR_BIT_SIZE}: ptr size can only be 32 or 64") endif() - set(MANGLED_BIF_NAME ${BIF_NAME}${PTR_BIT_SIZE}) - set(BIF_CLANG_BC_NAME_FINAL ${MANGLED_BIF_NAME}.clang.bc) + if (OPAQUE_PTRS) + set(OPT_OPAQUE_ARG ${IGC_BUILD__OPAQUE_POINTERS_ENABLE_OPT}) + set(CLANG_OPAQUE_ARG ${IGC_BUILD__OPAQUE_POINTERS_ENABLE_CLANG}) + set(OPAQUE_SUFFIX "opaque") + set(TARGET_NAME "${MANGLED_BIF_NAME}OpaquePtrs-BC") + else() + set(OPT_OPAQUE_ARG ${IGC_BUILD__OPAQUE_POINTERS_DISABLE_OPT}) + set(CLANG_OPAQUE_ARG ${IGC_BUILD__OPAQUE_POINTERS_DISABLE_CLANG}) + set(OPAQUE_SUFFIX "typed") + set(TARGET_NAME "${MANGLED_BIF_NAME}TypedPtrs-BC") + endif() + set(BIF_CLANG_BC_NAME_FINAL ${MANGLED_BIF_NAME}.${OPAQUE_SUFFIX}.clang.bc) set(BIF_CLANG_BC_PATH_FINAL ${CMAKE_CURRENT_BINARY_DIR}/${BIF_CLANG_BC_NAME_FINAL}) - set(BIF_CMCL_BC_NAME ${MANGLED_BIF_NAME}.cmcl.bc) + set(BIF_CMCL_BC_NAME ${MANGLED_BIF_NAME}.${OPAQUE_SUFFIX}.cmcl.bc) set(BIF_CMCL_BC_PATH ${CMAKE_CURRENT_BINARY_DIR}/${BIF_CMCL_BC_NAME}) - set(BIF_OPT_BC_NAME ${MANGLED_BIF_NAME}.opt.bc) + set(BIF_OPT_BC_NAME ${MANGLED_BIF_NAME}.${OPAQUE_SUFFIX}.opt.bc) set(BIF_OPT_BC_PATH ${CMAKE_CURRENT_BINARY_DIR}/${BIF_OPT_BC_NAME}) if(EXTRA_DEPENDS) @@ -80,22 +89,17 @@ function(vc_build_bif TARGET RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) endif() file(RELATIVE_PATH SRC_NAME ${CMAKE_CURRENT_SOURCE_DIR} ${CMCL_SRC}) if (LENGTH_CMCL_SRC_PATH GREATER 1) - set(BIF_CLANG_BC_NAME ${SRC_NAME}.${PTR_BIT_SIZE}.clang.bc) + set(BIF_CLANG_BC_NAME ${SRC_NAME}.${PTR_BIT_SIZE}.${OPAQUE_SUFFIX}.clang.bc) else() set(BIF_CLANG_BC_NAME ${BIF_CLANG_BC_NAME_FINAL}) endif() set(BIF_CLANG_BC_PATH ${CMAKE_CURRENT_BINARY_DIR}/${BIF_CLANG_BC_NAME}) get_filename_component(BIF_CLANG_BC_PATH_DIR ${BIF_CLANG_BC_PATH} DIRECTORY) - set(SPECIAL_CLANG_ARG "") - if (OPT_OPAQUE_ARG) - set(SPECIAL_CLANG_ARG -mllvm ${OPT_OPAQUE_ARG} ) - endif() - add_custom_command(OUTPUT "${BIF_CLANG_BC_PATH}" COMMAND ${CMAKE_COMMAND} -E make_directory ${BIF_CLANG_BC_PATH_DIR} COMMAND clang-tool -cc1 ${CMCL_INCLUDES} ${VC_INCLUDES} - ${EXTRA_CLANG_INCLUDES} ${SPECIAL_CLANG_ARG} ${IGC_BUILD__OPAQUE_POINTERS_DEFAULT_ARG_CLANG} ${EXTRA_CLANG_FLAGS} + ${EXTRA_CLANG_INCLUDES} ${CLANG_OPAQUE_ARG} ${EXTRA_CLANG_FLAGS} -x cl -cl-std=clc++ -triple=${SPIR_TARGET} -O2 -disable-llvm-passes -discard-value-names -emit-llvm-bc -o "${BIF_CLANG_BC_PATH}" ${CMCL_SRC} COMMENT "vc_build_bif: Compiling CMCL source ${CMCL_SRC} to BC ${BIF_CLANG_BC_NAME}" @@ -103,7 +107,6 @@ function(vc_build_bif TARGET RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) COMMAND_EXPAND_LISTS) list(APPEND BC_PATH_LIST ${BIF_CLANG_BC_PATH}) endforeach() - set(OPT_BC_DEPENDS ${BC_PATH_LIST}) if (LENGTH_CMCL_SRC_PATH GREATER 1) add_custom_command(OUTPUT ${BIF_CLANG_BC_PATH_FINAL} @@ -113,7 +116,6 @@ function(vc_build_bif TARGET RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) COMMAND_EXPAND_LISTS) set(OPT_BC_DEPENDS ${BIF_CLANG_BC_PATH_FINAL}) endif() - add_custom_command( OUTPUT ${BIF_OPT_BC_PATH} COMMENT "vc_build_bif: Translating CMCL builtins: ${BIF_CLANG_BC_NAME_FINAL} -> ${BIF_OPT_BC_NAME}" @@ -121,7 +123,7 @@ function(vc_build_bif TARGET RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) COMMAND ${LLVM_OPT_EXE} ${OPT_OPAQUE_ARG} --O2 -o ${BIF_OPT_BC_PATH} ${BIF_CMCL_BC_PATH} DEPENDS CMCLTranslatorTool ${LLVM_OPT_EXE} ${OPT_BC_DEPENDS}) - add_custom_target(${TARGET} + add_custom_target(${TARGET_NAME} DEPENDS ${BIF_OPT_BC_PATH} SOURCES ${CMCL_SRC_PATH}) set(${RES_FILE} ${BIF_OPT_BC_PATH} PARENT_SCOPE) @@ -137,9 +139,16 @@ endfunction() # RES_FILE - variable name to put generated file path into. # BIF_OPT_BC_PATH - path to the binary data that needs to be embedded. # MANGLED_BIF_NAME - the desired name for the embeddable source file. +# OPAQUE_PTRS - use opaque pointers during the generation. # Path to resulting CPP source code is stored in the specified cmake variable. -function(vc_generate_embeddable_source TARGET RES_FILE BIF_OPT_BC_PATH MANGLED_BIF_NAME) - set(BIF_CPP_NAME ${MANGLED_BIF_NAME}.cpp) +function(vc_generate_embeddable_source RES_FILE BIF_OPT_BC_PATH MANGLED_BIF_NAME OPAQUE_PTRS) + if (OPAQUE_PTRS) + set(BIF_CPP_NAME "${MANGLED_BIF_NAME}.opaque.cpp") + set(TARGET_NAME "${MANGLED_BIF_NAME}OpaquePtrs") + else() + set(BIF_CPP_NAME "${MANGLED_BIF_NAME}.typed.cpp") + set(TARGET_NAME "${MANGLED_BIF_NAME}TypedPtrs") + endif() set(BIF_CPP_PATH ${CMAKE_CURRENT_BINARY_DIR}/${BIF_CPP_NAME}) file(RELATIVE_PATH BIF_OPT_BC_NAME ${CMAKE_CURRENT_BINARY_DIR} ${BIF_OPT_BC_PATH}) set(BIF_SYMBOL ${MANGLED_BIF_NAME}RawData) @@ -150,7 +159,7 @@ function(vc_generate_embeddable_source TARGET RES_FILE BIF_OPT_BC_PATH MANGLED_B COMMAND ${PYTHON_EXECUTABLE} ${RESOURCE_EMBEDDER_SCRIPT} ${BIF_OPT_BC_PATH} ${BIF_CPP_PATH} ${BIF_SYMBOL} no_attr DEPENDS ${PYTHON_EXECUTABLE} ${RESOURCE_EMBEDDER_SCRIPT} ${BIF_OPT_BC_PATH}) - add_custom_target(${TARGET} + add_custom_target(${TARGET_NAME} DEPENDS ${BIF_CPP_PATH}) set(${RES_FILE} ${BIF_CPP_PATH} PARENT_SCOPE) endfunction() @@ -172,25 +181,34 @@ endfunction() # RES_FILE - variable name to put generated file path into. # BIF_OPT_BC_PATH - path to generic library (in a form of bitcode). # MANGLED_BIF_NAME - the desired name for the generated source file. +# OPAQUE_PTRS - use opaque pointers during the generation. # Path to resulting CPP source code is stored in the specified cmake variable. -function(vc_generate_optimized_bif TARGET RES_FILE BIF_OPT_BC_PATH MANGLED_BIF_NAME) - set(BIF_CPP_NAME ${MANGLED_BIF_NAME}.cpp) +function(vc_generate_optimized_bif RES_FILE BIF_OPT_BC_PATH MANGLED_BIF_NAME OPAQUE_PTRS) + if (OPAQUE_PTRS) + set(OPT_OPAQUE_ARG ${IGC_BUILD__OPAQUE_POINTERS_ENABLE_OPT}) + set(OPAQUE_SUFFIX "opaque") + set(TARGET_NAME "${MANGLED_BIF_NAME}OpaquePtrs") + else() + set(OPT_OPAQUE_ARG ${IGC_BUILD__OPAQUE_POINTERS_DISABLE_OPT}) + set(OPAQUE_SUFFIX "typed") + set(TARGET_NAME "${MANGLED_BIF_NAME}TypedPtrs") + endif() + set(BIF_CPP_NAME ${MANGLED_BIF_NAME}.${OPAQUE_SUFFIX}.cpp) set(BIF_CPP_PATH ${CMAKE_CURRENT_BINARY_DIR}/${BIF_CPP_NAME}) set(BIF_SYMBOL ${MANGLED_BIF_NAME}RawData) - set(BIF_CONF_NAME "${MANGLED_BIF_NAME}.conf") + set(BIF_CONF_NAME "${MANGLED_BIF_NAME}.${OPAQUE_SUFFIX}.conf") set(BIF_CONF_PATH ${CMAKE_CURRENT_BINARY_DIR}/${BIF_CONF_NAME}) set(PLTF_BC_PATH_LIST "") - foreach(PLTF IN LISTS SUPPORTED_VC_PLATFORMS) - set(PLTF_BC_NAME "${MANGLED_BIF_NAME}_${PLTF}.vccg.bc") + set(PLTF_BC_NAME "${MANGLED_BIF_NAME}_${PLTF}.${OPAQUE_SUFFIX}.vccg.bc") set(PLTF_BC_PATH ${CMAKE_CURRENT_BINARY_DIR}/${PLTF_BC_NAME}) add_custom_command( OUTPUT ${PLTF_BC_PATH} COMMENT "vc_generate_optimized_bif: compile optimized BiF for ${PLTF}" COMMAND ${VCB_EXE} ${OPT_OPAQUE_ARG} -o ${PLTF_BC_PATH} -cpu ${PLTF} ${BIF_OPT_BC_PATH} DEPENDS ${VCB_EXE} ${BIF_OPT_BC_PATH}) - add_custom_target("${TARGET}-${PLTF}-BC" + add_custom_target("${TARGET_NAME}-${PLTF}-BC" DEPENDS ${PLTF_BC_PATH}) list(APPEND PLTF_BC_PATH_LIST ${PLTF_BC_PATH}) endforeach() @@ -202,7 +220,7 @@ function(vc_generate_optimized_bif TARGET RES_FILE BIF_OPT_BC_PATH MANGLED_BIF_N COMMENT "vc_generate_optimized_bif: create hashed version of optimized functions" COMMAND ${VCB_EXE} -BiFUnique -symb ${BIF_SYMBOL} -o ${BIF_CPP_PATH} ${BIF_CONF_PATH} DEPENDS ${VCB_EXE} ${BIF_CONF_PATH} ${PLTF_BC_PATH_LIST}) - add_custom_target(${TARGET} + add_custom_target(${TARGET_NAME} DEPENDS ${BIF_CPP_PATH}) set(${RES_FILE} ${BIF_CPP_PATH} PARENT_SCOPE) endfunction() @@ -211,19 +229,18 @@ endfunction() # containing the resulting LLVM bitcode (as a C array). # See vc_build_bif and vc_generate_embeddable_source for more details. # Path to resulting CPP source code is stored in the specified cmake variable. -function(vc_embed_bif RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) - - cmake_parse_arguments(PARSE_ARGV 4 +function(vc_embed_bif RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE OPAQUE_PTRS) + cmake_parse_arguments(PARSE_ARGV 5 EXTRA "" "CLANG_INCLUDES;CLANG_FLAGS" "DEPENDS") set(MANGLED_BIF_NAME ${BIF_NAME}${PTR_BIT_SIZE}) - vc_build_bif("${BIF_NAME}${PTR_BIT_SIZE}-BC" RES_FILE_VC_EMBED "${CMCL_SRC_PATH}" "${BIF_NAME}" "${PTR_BIT_SIZE}" + vc_build_bif(RES_FILE_VC_EMBED "${CMCL_SRC_PATH}" "${MANGLED_BIF_NAME}" "${PTR_BIT_SIZE}" "${OPAQUE_PTRS}" CLANG_INCLUDES "${EXTRA_CLANG_INCLUDES}" CLANG_FLAGS "${EXTRA_CLANG_FLAGS}" DEPENDS "${EXTRA_DEPENDS}") - vc_generate_embeddable_source("${BIF_NAME}${PTR_BIT_SIZE}" RES_FILE_EMBED_GEN "${RES_FILE_VC_EMBED}" "${MANGLED_BIF_NAME}") + vc_generate_embeddable_source(RES_FILE_EMBED_GEN "${RES_FILE_VC_EMBED}" "${MANGLED_BIF_NAME}" "${OPAQUE_PTRS}") set(${RES_FILE} ${RES_FILE_EMBED_GEN} PARENT_SCOPE) endfunction() @@ -232,10 +249,9 @@ endfunction() # platform-optimized version of the emulation library during the runtime. # See vc_build_bif and vc_generate_optimized_bif for details # Path to resulting CPP source code is stored in the specified cmake variable. -function(vc_embed_optimized_bif RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE) +function(vc_embed_optimized_bif RES_FILE CMCL_SRC_PATH BIF_NAME PTR_BIT_SIZE OPAQUE_PTRS) set(MANGLED_BIF_NAME ${BIF_NAME}${PTR_BIT_SIZE}) - vc_build_bif("${BIF_NAME}${PTR_BIT_SIZE}-BC" RES_FILE_VC_EMBED "${CMCL_SRC_PATH}" "${BIF_NAME}" "${PTR_BIT_SIZE}") - vc_generate_optimized_bif("${BIF_NAME}${PTR_BIT_SIZE}" RES_FILE_EMBED_GEN "${RES_FILE_VC_EMBED}" - "${MANGLED_BIF_NAME}") + vc_build_bif(RES_FILE_VC_EMBED "${CMCL_SRC_PATH}" "${BIF_NAME}" "${PTR_BIT_SIZE}" "${OPAQUE_PTRS}") + vc_generate_optimized_bif(RES_FILE_EMBED_GEN "${RES_FILE_VC_EMBED}" "${MANGLED_BIF_NAME}" "${OPAQUE_PTRS}") set(${RES_FILE} ${RES_FILE_EMBED_GEN} PARENT_SCOPE) endfunction() diff --git a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fdiv_f32.ll b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fdiv_f32.ll index ab8ef2697147..b83e9029ff4e 100644 --- a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fdiv_f32.ll +++ b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fdiv_f32.ll @@ -1,17 +1,17 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2023 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; RUN: %opt %use_old_pass_manager% -GenXBuiltinFunctions -march=genx64 \ -; RUN: -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLPG% -mcpu=XeLPG \ +; RUN: -vc-builtins-bif-path=%VC_BIF_XeLPG% -mcpu=XeLPG \ ; RUN: -mtriple=spir64-unknown-unknown -S < %s 2>&1 | FileCheck %s ; RUN: %opt %use_old_pass_manager% -GenXBuiltinFunctions -march=genx64 \ -; RUN: -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeHPC% -mcpu=XeHPC \ +; RUN: -vc-builtins-bif-path=%VC_BIF_XeHPC% -mcpu=XeHPC \ ; RUN: -mtriple=spir64-unknown-unknown -S < %s 2>&1 | FileCheck %s \ ; RUN: --check-prefix=CHECK-NOEMU @@ -26,4 +26,4 @@ define dllexport spir_kernel void @test_kernel(<32 x float> %l, <32 x float> %r) ; CHECK-NOEMU: = call <32 x float> @llvm.genx.ieee.div.v32f32 %2 = call <32 x float> @llvm.genx.ieee.div.v32f32(<32 x float> %l, <32 x float> %r) ret void -} \ No newline at end of file +} diff --git a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f16.ll b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f16.ll index e7200c4bd5c8..5656768d1cda 100644 --- a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f16.ll +++ b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f16.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2023 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLP% \ +; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BIF_XeLP% \ ; RUN: -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ ; RUN: -mcpu=XeLP -S < %s | FileCheck %s -; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BUILTINS_BIF_Gen9% \ +; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BIF_Gen9% \ ; RUN: -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ ; RUN: -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=CHECK-NOEMU diff --git a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f32.ll b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f32.ll index 71c41b378457..2372724b715e 100644 --- a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f32.ll +++ b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f32.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2023 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLP% \ +; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BIF_XeLP% \ ; RUN: -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ ; RUN: -mcpu=XeLP -S < %s | FileCheck %s -; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BUILTINS_BIF_Gen9% \ +; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BIF_Gen9% \ ; RUN: -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ ; RUN: -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=CHECK-NOEMU diff --git a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f64.ll b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f64.ll index a02f140144ea..6ca93324020a 100644 --- a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f64.ll +++ b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fptoi_f64.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2023 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLPG% \ +; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BIF_XeLPG% \ ; RUN: -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ ; RUN: -mcpu=XeLPG -S < %s | FileCheck %s -; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BUILTINS_BIF_Gen9% \ +; RUN: %opt %use_old_pass_manager% -vc-builtins-bif-path=%VC_BIF_Gen9% \ ; RUN: -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ ; RUN: -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=CHECK-NOEMU diff --git a/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem.ll b/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem.ll index d9d51c7a52f8..f30096845c33 100644 --- a/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem.ll +++ b/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2024 Intel Corporation +; Copyright (C) 2024-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; RUN: %opt %use_old_pass_manager% -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ -; RUN: -mcpu=XeLPG -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLPG% -S %s 2>&1 | FileCheck %s +; RUN: -mcpu=XeLPG -vc-builtins-bif-path=%VC_BIF_XeLPG% -S %s 2>&1 | FileCheck %s ; RUN: %opt %use_old_pass_manager% -GenXBuiltinFunctions -march=genx64 -mtriple=spir64-unknown-unknown \ -; RUN: -mcpu=XeHPC -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeHPC% -S %s 2>&1 | FileCheck %s --check-prefix=CHECK-FDIV +; RUN: -mcpu=XeHPC -vc-builtins-bif-path=%VC_BIF_XeHPC% -S %s 2>&1 | FileCheck %s --check-prefix=CHECK-FDIV ; CHECK-NOT: WARNING @@ -58,4 +58,4 @@ define dllexport spir_kernel void @test_V4_float(<4 x float> %a, <4 x float> %b) ; Float-control mask = 0x4c0 = RTNE | DoublePrecisionDenorm | SinglePrecisionDenorm | HalfPrecisionDenorm = ; 0 << 4 | 1 << 6 | 1 << 7 | 1 << 10 ; CHECK-FDIV-DAG: attributes #[[REF_SC]] = {{.*}} "CMFloatControl"="1216" {{.*}} -; CHECK-FDIV-DAG: attributes #[[REF_V]] = {{.*}} "CMFloatControl"="1216" {{.*}} \ No newline at end of file +; CHECK-FDIV-DAG: attributes #[[REF_V]] = {{.*}} "CMFloatControl"="1216" {{.*}} diff --git a/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem_llc.ll b/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem_llc.ll index 7f565f6d2fd3..3e1403e111f7 100644 --- a/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem_llc.ll +++ b/IGC/VectorCompiler/test/GenXBuiltinFunctions/frem_llc.ll @@ -1,14 +1,14 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2024 Intel Corporation +; Copyright (C) 2024-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %llc_typed_ptrs %s -march=genx64 -mcpu=XeLP -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLP% \ +; RUN: %llc_typed_ptrs %s -march=genx64 -mcpu=XeLP -vc-builtins-bif-path=%VC_BIF_XeLP_TYPED_PTRS% \ ; RUN: -vc-skip-ocl-runtime-info -finalizer-opts='-asmToConsole' -o /dev/null | FileCheck %s -; RUN: %llc_opaque_ptrs %s -march=genx64 -mcpu=XeLP -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLP% \ +; RUN: %llc_opaque_ptrs %s -march=genx64 -mcpu=XeLP -vc-builtins-bif-path=%VC_BIF_XeLP_OPAQUE_PTRS% \ ; RUN: -vc-skip-ocl-runtime-info -finalizer-opts='-asmToConsole' -o /dev/null | FileCheck %s ; CHECK-NOT: ERROR diff --git a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fsqrt_llc.ll b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fsqrt_llc.ll index 22c9bf978518..628a844da91a 100644 --- a/IGC/VectorCompiler/test/GenXBuiltinFunctions/fsqrt_llc.ll +++ b/IGC/VectorCompiler/test/GenXBuiltinFunctions/fsqrt_llc.ll @@ -1,14 +1,14 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2024 Intel Corporation +; Copyright (C) 2024-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %llc_typed_ptrs %s -march=genx64 -mcpu=XeLPG -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLPG% \ +; RUN: %llc_typed_ptrs %s -march=genx64 -mcpu=XeLPG -vc-builtins-bif-path=%VC_BIF_XeLPG_TYPED_PTRS% \ ; RUN: -vc-skip-ocl-runtime-info -finalizer-opts='-asmToConsole' -o /dev/null | FileCheck %s -; RUN: %llc_opaque_ptrs %s -march=genx64 -mcpu=XeLPG -vc-builtins-bif-path=%VC_BUILTINS_BIF_XeLPG% \ +; RUN: %llc_opaque_ptrs %s -march=genx64 -mcpu=XeLPG -vc-builtins-bif-path=%VC_BIF_XeLPG_OPAQUE_PTRS% \ ; RUN: -vc-skip-ocl-runtime-info -finalizer-opts='-asmToConsole' -o /dev/null | FileCheck %s ; CHECK-NOT: ERROR diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc.ll index 05f6ffbe2389..bb5c6f41d95a 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc.ll @@ -1,22 +1,22 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; ; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc_fatal.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc_fatal.ll index 9dc5b4fcc8e2..b6568357bfcd 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc_fatal.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/addc_fatal.ll @@ -1,16 +1,22 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2024 Intel Corporation +; Copyright (C) 2024-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; ; RUN: %not_legacy %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ +; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s +; RUN: %not_legacy %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s ; RUN: %not_new_pm %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ +; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s +; RUN: %not_new_pm %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert.ll index add5ded88a32..f4196deef263 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert.ll @@ -1,22 +1,22 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; ; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_decl.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_decl.ll index 41813ee69bbc..c48aca60f8d7 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_decl.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_decl.ll @@ -1,22 +1,22 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; ; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_fail.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_fail.ll index 1c3c815fe1d5..4b2babac63d6 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_fail.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/assert_fail.ll @@ -1,16 +1,22 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; ; RUN: %not_legacy %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ +; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s +; RUN: %not_legacy %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s ; RUN: %not_new_pm %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ +; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s +; RUN: %not_new_pm %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S %s 2>&1 | FileCheck %s ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fadd.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fadd.ll index d68da0621927..be7ea2e10e12 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fadd.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fadd.ll @@ -1,15 +1,15 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s -; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins ; ------------------------------------------------ diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fminmax.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fminmax.ll index d68e12900207..3c4c903f92e2 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fminmax.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/atomic_fminmax.ll @@ -1,15 +1,15 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2024 Intel Corporation +; Copyright (C) 2024-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefix=CHECK-OPAQUE-PTRS declare spir_func float @_Z21__spirv_AtomicFMinEXTPU3AS4fiif(float addrspace(4)*, i32, i32, float) #0 declare spir_func float @_Z21__spirv_AtomicFMaxEXTPU3AS4fiif(float addrspace(4)*, i32, i32, float) #0 diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/debug.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/debug.ll index 11ee7297d0e7..2b68fb024d7a 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/debug.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/debug.ll @@ -1,15 +1,15 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2022-2024 Intel Corporation +; Copyright (C) 2022-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins ; ------------------------------------------------ diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/dot.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/dot.ll index 0531530b7379..e9c5b3c460d6 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/dot.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/dot.ll @@ -1,22 +1,22 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2024 Intel Corporation +; Copyright (C) 2024-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; ; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s ; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s ; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s ; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s ; ; ------------------------------------------------ diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/mulext.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/mulext.ll index 401ac3ceb349..b8f2a41ddb43 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/mulext.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/mulext.ll @@ -7,16 +7,16 @@ ;============================ end_copyright_notice ============================= ; ; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; ------------------------------------------------ ; GenXTranslateSPIRVBuiltins diff --git a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/subb.ll b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/subb.ll index a86ad2a49019..df40a875dc1c 100644 --- a/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/subb.ll +++ b/IGC/VectorCompiler/test/GenXTranslateSPIRVBuiltins/subb.ll @@ -1,22 +1,22 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; ; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS ; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 \ ; RUN: -mtriple=spir64-unknown-unknown -mcpu=XeHPC -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; ; ------------------------------------------------ diff --git a/IGC/VectorCompiler/test/ImportOCLBiF/spirv_builtin_log.ll b/IGC/VectorCompiler/test/ImportOCLBiF/spirv_builtin_log.ll index dfc5b22d6e4c..8a300cf695de 100644 --- a/IGC/VectorCompiler/test/ImportOCLBiF/spirv_builtin_log.ll +++ b/IGC/VectorCompiler/test/ImportOCLBiF/spirv_builtin_log.ll @@ -1,14 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -GenXImportOCLBiF -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK -; TODO: Expected default spirv-builtins build w/o opaque pointers -; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins,GenXImportOCLBiF -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -GenXImportOCLBiF -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -GenXImportOCLBiF -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK + +; TODO: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins,GenXImportOCLBiF -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins,GenXImportOCLBiF -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK target datalayout = "e-p:64:64-i64:64-n8:16:32" ; COM: datalayout should stay the same diff --git a/IGC/VectorCompiler/test/PatternMatch/icmp-patt.ll b/IGC/VectorCompiler/test/PatternMatch/icmp-patt.ll index 646ff71f76e0..a238c90155f7 100644 --- a/IGC/VectorCompiler/test/PatternMatch/icmp-patt.ll +++ b/IGC/VectorCompiler/test/PatternMatch/icmp-patt.ll @@ -1,12 +1,13 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt %use_old_pass_manager% -GenXPatternMatch -march=genx64 -mcpu=XeLP -mtriple=spir64-unknown-unknown -S < %s | FileCheck %s +; RUN: %opt_typed_ptrs %use_old_pass_manager% -GenXPatternMatch -march=genx64 -mcpu=XeLP -mtriple=spir64-unknown-unknown -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_opaque_ptrs %use_old_pass_manager% -GenXPatternMatch -march=genx64 -mcpu=XeLP -mtriple=spir64-unknown-unknown -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; CHECK-LABEL: @test_icmp ; CHECK: (<16 x i32> [[VEC:%[A-Za-z0-9_.]+]], <16 x i1> [[FLAG1:%[A-Za-z0-9_.]+]], <16 x i1> [[FLAG2:%[A-Za-z0-9_.]+]], <16 x i1> [[FLAG3:%[A-Za-z0-9_.]+]], <2 x i32> [[INS:%[A-Za-z0-9_.]+]]) @@ -92,8 +93,9 @@ declare <16 x i32> @llvm.genx.wrregionf.v16i32.v1i32.i16.v16i1(<16 x i32>, <1 x ; CHECK-LABEL: test_addrspacecast define i1 @test_addrspacecast(i64 %in) { -; CHECK: %res = icmp ne [17 x i8] addrspace(1)* %b, null +; CHECK-TYPED-PTRS: %res = icmp ne [17 x i8] addrspace(1)* %b, null +; CHECK-OPAQUE-PTRS: %res = icmp ne ptr addrspace(1) %b, null %b = inttoptr i64 %in to [17 x i8] addrspace(1)* %res = icmp ne [17 x i8] addrspace(1)* %b, addrspacecast ([17 x i8] addrspace(4)* null to [17 x i8] addrspace(1)*) ret i1 %res -} \ No newline at end of file +} diff --git a/IGC/VectorCompiler/test/PrintfResolution/arguments-m32.ll b/IGC/VectorCompiler/test/PrintfResolution/arguments-m32.ll index f6deca4911bd..0548739d0a7b 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/arguments-m32.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/arguments-m32.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx32 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:32:32-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/arguments.ll b/IGC/VectorCompiler/test/PrintfResolution/arguments.ll index 916e134a7805..28fd1b4c8216 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/arguments.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/arguments.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/assert.ll b/IGC/VectorCompiler/test/PrintfResolution/assert.ll index 37a22f188d69..1c5579281fb2 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/assert.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/assert.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/attribute.ll b/IGC/VectorCompiler/test/PrintfResolution/attribute.ll index d69eed5455a4..ad96dd23a8d2 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/attribute.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/attribute.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/debug.ll b/IGC/VectorCompiler/test/PrintfResolution/debug.ll index 0381ba438427..67b30918eb40 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/debug.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/debug.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2022-2024 Intel Corporation +; Copyright (C) 2022-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mtriple=spir64-unknown-unknown -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS ; ------------------------------------------------ ; GenXPrintfResolution ; ------------------------------------------------ diff --git a/IGC/VectorCompiler/test/PrintfResolution/generic_format.ll b/IGC/VectorCompiler/test/PrintfResolution/generic_format.ll index b56b54d1c060..9308b9283f1a 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/generic_format.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/generic_format.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2022-2024 Intel Corporation +; Copyright (C) 2022-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-p6:32:32-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/hello_world.ll b/IGC/VectorCompiler/test/PrintfResolution/hello_world.ll index 38e21bd28c4f..580f51c1f238 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/hello_world.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/hello_world.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/hello_world_legacy.ll b/IGC/VectorCompiler/test/PrintfResolution/hello_world_legacy.ll index 00934bdcd528..5e78e2679a56 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/hello_world_legacy.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/hello_world_legacy.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/spirv_hello_world.ll b/IGC/VectorCompiler/test/PrintfResolution/spirv_hello_world.ll index 25c94ee9d9b0..1cf9f7a454de 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/spirv_hello_world.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/spirv_hello_world.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/str_arg.ll b/IGC/VectorCompiler/test/PrintfResolution/str_arg.ll index c4abee8006f7..dca785f20e6c 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/str_arg.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/str_arg.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/str_arg_generic.ll b/IGC/VectorCompiler/test/PrintfResolution/str_arg_generic.ll index b09c4950d609..670cb7ba94d4 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/str_arg_generic.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/str_arg_generic.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2022-2024 Intel Corporation +; Copyright (C) 2022-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-p6:32:32-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/str_arg_global.ll b/IGC/VectorCompiler/test/PrintfResolution/str_arg_global.ll index ba53023ee104..420737d923bb 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/str_arg_global.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/str_arg_global.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2022-2024 Intel Corporation +; Copyright (C) 2022-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-p6:32:32-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/str_arg_legacy.ll b/IGC/VectorCompiler/test/PrintfResolution/str_arg_legacy.ll index fbad5be35cf3..90c4124438da 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/str_arg_legacy.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/str_arg_legacy.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/PrintfResolution/str_vs_ptr.ll b/IGC/VectorCompiler/test/PrintfResolution/str_vs_ptr.ll index 6a599b1662bf..8c8e93f1fa71 100644 --- a/IGC/VectorCompiler/test/PrintfResolution/str_vs_ptr.ll +++ b/IGC/VectorCompiler/test/PrintfResolution/str_vs_ptr.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRITF_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXPrintfResolution -vc-printf-bif-path=%VC_PRINTF_OCL_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32:64" diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_builtins.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_builtins.ll index ca0975284fd3..c6348f58b590 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_builtins.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_builtins.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s target datalayout = "e-p:64:64-i64:64-n8:16:32" ; COM: datalayout should stay the same diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_float_with_integer.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_float_with_integer.ll index 0f5dd82bf912..a046689e5ff8 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_float_with_integer.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/atomic_float_with_integer.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32" ; COM: datalayout should stay the same diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/bfloat16.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/bfloat16.ll index f14abd93d641..5d2c27c86e05 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/bfloat16.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/bfloat16.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=XeHPG -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=XeHPG -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=XeHPG -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=XeHPG -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=XeHPG -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=XeHPG -S < %s | FileCheck %s declare spir_func float @_Z27__spirv_ConvertBF16ToFINTELs(i16) #0 declare spir_func <16 x float> @_Z27__spirv_ConvertBF16ToFINTELDv16_s(<16 x i16>) #0 diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/comparison.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/comparison.ll index c26327391661..b4b2261a5b42 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/comparison.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/comparison.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s target datalayout = "e-p:64:64-i64:64-n8:16:32" ; COM: datalayout should stay the same diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/exec_spirv_builtins.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/exec_spirv_builtins.ll index 557a3c312d15..d80fc3b59f84 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/exec_spirv_builtins.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/exec_spirv_builtins.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s target datalayout = "e-p:64:64-i64:64-n8:16:32" ; COM: datalayout should stay the same @@ -26,6 +29,5 @@ define spir_func i64 @test_num_workgroups() { ret i64 %res } - ; CHECK: define internal spir_func {{(noundef )?}}i64 @_Z33__spirv_BuiltInGlobalInvocationIdi(i32 ; CHECK: define internal spir_func {{(noundef )?}}i64 @_Z28__spirv_BuiltInNumWorkgroupsi(i32 diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/gen_cast_to_ptr.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/gen_cast_to_ptr.ll index 3ce3f960d5c5..bfdcb7d99cc0 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/gen_cast_to_ptr.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/gen_cast_to_ptr.ll @@ -1,16 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023-2024 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS -; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-TYPED-PTRS +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-OPAQUE-PTRS target datalayout = "e-p:64:64-i64:64-n8:16:32" diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/import_with_inline.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/import_with_inline.ll index 6e1144749557..8da584a5f2e9 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/import_with_inline.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/import_with_inline.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=%SPV_CHECK_PREFIX% -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=%SPV_CHECK_PREFIX% +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=%SPV_CHECK_PREFIX% +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=%SPV_CHECK_PREFIX% + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=%SPV_CHECK_PREFIX% +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefix=%SPV_CHECK_PREFIX% declare spir_func <16 x double> @_Z15__spirv_ocl_logDv16_d(<16 x double>) diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/math_builtins.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/math_builtins.ll index d445b8e1db2a..eb4ec57f5e36 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/math_builtins.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/math_builtins.ll @@ -1,23 +1,23 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2021-2024 Intel Corporation +; Copyright (C) 2021-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= ; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 \ ; RUN: -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK ; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 \ ; RUN: -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK ; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 \ ; RUN: -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK ; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins \ -; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 \ +; RUN: -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 \ ; RUN: -S < %s | FileCheck %s --check-prefixes=%SPV_CHECK_PREFIX%,CHECK target datalayout = "e-p:64:64-i64:64-n8:16:32" diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/math_half_builtins.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/math_half_builtins.ll index b4ccc2c19fa1..1fcb4453d616 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/math_half_builtins.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/math_half_builtins.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s target datalayout = "e-p:64:64-i64:64-n8:16:32" ; COM: datalayout should stay the same diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/math_native_builtins.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/math_native_builtins.ll index 4e32994bd463..55446c811c70 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/math_native_builtins.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/math_native_builtins.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s --check-prefixes=CHECK +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s target datalayout = "e-p:64:64-i64:64-n8:16:32" ; COM: datalayout should stay the same diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/rounding.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/rounding.ll index 60a1bf01de3b..b3bf947d1313 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/rounding.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/rounding.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2022 Intel Corporation +; Copyright (C) 2022-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s declare spir_func float @_Z16__spirv_ocl_ceilf(float) #0 ; CHECK-LABEL: define internal spir_func {{(noundef )?}}float @_Z16__spirv_ocl_ceilf diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/tensorfloat32.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/tensorfloat32.ll index 4da86164397f..97ce6f3e3a08 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/tensorfloat32.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/tensorfloat32.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2023 Intel Corporation +; Copyright (C) 2023-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=XeHPC -S < %s | FileCheck %s declare spir_func float @_Z27__spirv_RoundFToTF32INTELf(float) #0 declare spir_func <16 x float> @_Z27__spirv_RoundFToTF32INTELDv16_f(<16 x float>) #0 diff --git a/IGC/VectorCompiler/test/SPIRVBuiltins/timestamp.ll b/IGC/VectorCompiler/test/SPIRVBuiltins/timestamp.ll index db1ae8f2046b..65e0f1c404cd 100644 --- a/IGC/VectorCompiler/test/SPIRVBuiltins/timestamp.ll +++ b/IGC/VectorCompiler/test/SPIRVBuiltins/timestamp.ll @@ -1,13 +1,16 @@ ;=========================== begin_copyright_notice ============================ ; -; Copyright (C) 2024 Intel Corporation +; Copyright (C) 2024-2025 Intel Corporation ; ; SPDX-License-Identifier: MIT ; ;============================ end_copyright_notice ============================= -; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s -; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_OCL_BIF% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_typed %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_legacy_opaque %use_old_pass_manager% -GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s + +; RUN: %opt_new_pm_typed -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_TYPED_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s +; RUN: %opt_new_pm_opaque -passes=GenXTranslateSPIRVBuiltins -vc-spirv-builtins-bif-path=%VC_SPIRV_BIF_OPAQUE_PTRS% -march=genx64 -mcpu=Gen9 -S < %s | FileCheck %s target datalayout = "e-p:64:64-i64:64-n8:16:32" diff --git a/IGC/VectorCompiler/test/lit.cfg.py b/IGC/VectorCompiler/test/lit.cfg.py index f0bd82699c0a..040f8a819b69 100644 --- a/IGC/VectorCompiler/test/lit.cfg.py +++ b/IGC/VectorCompiler/test/lit.cfg.py @@ -41,13 +41,22 @@ llvm_config.use_default_substitutions() config.substitutions.append(('%PATH%', config.environment['PATH'])) -config.substitutions.append(('%VC_PRITF_OCL_BIF%', config.vc_printf_ocl_bif)) -config.substitutions.append(('%VC_SPIRV_OCL_BIF%', config.vc_spirv_ocl_bif)) +config.substitutions.append(('%VC_PRINTF_OCL_BIF_TYPED_PTRS%', '{}/VCBiFPrintfOCL64.typed.opt.bc'.format(config.vc_bif_binary_dir))) +config.substitutions.append(('%VC_PRINTF_OCL_BIF_OPAQUE_PTRS%', '{}/VCBiFPrintfOCL64.opaque.opt.bc'.format(config.vc_bif_binary_dir))) +config.substitutions.append(('%VC_SPIRV_BIF_TYPED_PTRS%', '{}/VCSPIRVBuiltins64.typed.opt.bc'.format(config.vc_bif_binary_dir))) +config.substitutions.append(('%VC_SPIRV_BIF_OPAQUE_PTRS%', '{}/VCSPIRVBuiltins64.opaque.opt.bc'.format(config.vc_bif_binary_dir))) platforms = config.vc_platform_list.split(";") for platform in platforms: - builtins_path = '{}_{}.vccg.bc'.format(config.vc_builtins_bif_prefix, platform) - config.substitutions.append(('%VC_BUILTINS_BIF_{}%'.format(platform), builtins_path)) + bif_file_typed_ptrs = '{}/VCBuiltins64_{}.typed.vccg.bc'.format(config.vc_bif_binary_dir, platform) + bif_file_opaque_ptrs = '{}/VCBuiltins64_{}.opaque.vccg.bc'.format(config.vc_bif_binary_dir, platform) + if config.opaque_pointers_enabled == 1: + bif_file_default = bif_file_opaque_ptrs + else: + bif_file_default = bif_file_typed_ptrs + config.substitutions.append(('%VC_BIF_{}%'.format(platform), bif_file_default)) + config.substitutions.append(('%VC_BIF_{}_TYPED_PTRS%'.format(platform), bif_file_typed_ptrs)) + config.substitutions.append(('%VC_BIF_{}_OPAQUE_PTRS%'.format(platform), bif_file_opaque_ptrs)) if config.use_khronos_spirv_translator_in_sc == "1": config.substitutions.append(('%SPV_CHECK_PREFIX%', 'CHECK-KHR')) @@ -63,11 +72,11 @@ vc_extra_args_legacy_pm = ['-load', config.llvm_plugin] vc_extra_args_new_pm = ['-load-pass-plugin', config.llvm_new_pm_plugin] -extra_args_typed_legacy = vc_extra_args_legacy_pm+['-opaque-pointers=0'] -extra_args_opaque_legacy = vc_extra_args_legacy_pm+['-opaque-pointers=1'] +extra_args_typed_legacy = vc_extra_args_legacy_pm+[config.opaque_pointers_disable_opt] +extra_args_opaque_legacy = vc_extra_args_legacy_pm+[config.opaque_pointers_enable_opt] extra_args_default = vc_extra_args_legacy_pm+[config.opaque_pointers_default_arg_opt] -extra_args_typed_new_pm = vc_extra_args_new_pm+['-opaque-pointers=0'] -extra_args_opaque_new_pm = vc_extra_args_new_pm+['-opaque-pointers=1'] +extra_args_typed_new_pm = vc_extra_args_new_pm+[config.opaque_pointers_disable_opt] +extra_args_opaque_new_pm = vc_extra_args_new_pm+[config.opaque_pointers_enable_opt] if int(config.llvm_version) >= 16: command_opt_legacy = 'true ||' diff --git a/IGC/VectorCompiler/test/lit.site.cfg.py.in b/IGC/VectorCompiler/test/lit.site.cfg.py.in index ecc49b737b21..aafdfb424c1c 100644 --- a/IGC/VectorCompiler/test/lit.site.cfg.py.in +++ b/IGC/VectorCompiler/test/lit.site.cfg.py.in @@ -1,6 +1,6 @@ # ========================== begin_copyright_notice ============================ # -# Copyright (C) 2020-2024 Intel Corporation +# Copyright (C) 2020-2025 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -23,12 +23,11 @@ config.cm_opt_lib_dir = "@IGC_BUILD__CMOPT_DIR@/lib" config.oneapi_readelf_dir = "@IGC_BUILD__ONEAPI_READELF_DIR@" config.llvm_plugin = "$<$:$>" config.llvm_new_pm_plugin = "$<$:$>" -config.vc_printf_ocl_bif = "$/VCBiFPrintfOCL64.opt.bc" -config.vc_spirv_ocl_bif = "$/VCSPIRVBuiltins64.opt.bc" -config.vc_builtins_bif_prefix = "$/VCBuiltins64" +config.vc_bif_binary_dir = "$" config.vc_platform_list = "@SUPPORTED_VC_PLATFORMS@" config.use_khronos_spirv_translator_in_sc = "$" config.llvm_version = "@LLVM_VERSION_MAJOR@" +config.opaque_pointers_enabled = "@IGC_OPTION__API_ENABLE_OPAQUE_POINTERS@" config.opaque_pointers_default_arg_opt = "@IGC_BUILD__OPAQUE_POINTERS_DEFAULT_ARG_OPT@" config.opaque_pointers_disable_opt = "@IGC_BUILD__OPAQUE_POINTERS_DISABLE_OPT@" config.opaque_pointers_enable_opt = "@IGC_BUILD__OPAQUE_POINTERS_ENABLE_OPT@" diff --git a/IGC/cmake/igc_llvm.cmake b/IGC/cmake/igc_llvm.cmake index 07700979c216..9bbef5a21ce5 100644 --- a/IGC/cmake/igc_llvm.cmake +++ b/IGC/cmake/igc_llvm.cmake @@ -1,6 +1,6 @@ #=========================== begin_copyright_notice ============================ # -# Copyright (C) 2021 Intel Corporation +# Copyright (C) 2021-2025 Intel Corporation # # SPDX-License-Identifier: MIT # @@ -69,22 +69,10 @@ list(TRANSFORM LLVM_INCLUDE_DIRS PREPEND "-I=" OUTPUT_VARIABLE LLVM_TABLEGEN_FLA # Add major version definition for llvm wrapper. add_compile_definitions(LLVM_VERSION_MAJOR=${LLVM_VERSION_MAJOR}) -set(IGC_BUILD__OPAQUE_POINTERS_DISABLE_OPT "") -set(IGC_BUILD__OPAQUE_POINTERS_ENABLE_OPT "") -if(LLVM_VERSION_MAJOR EQUAL 14) - set(IGC_BUILD__OPAQUE_POINTERS_ENABLE_OPT "-opaque-pointers=1") -elseif(LLVM_VERSION_MAJOR GREATER 14) - set(IGC_BUILD__OPAQUE_POINTERS_DISABLE_OPT "-opaque-pointers=0") -endif() - -set(IGC_BUILD__OPAQUE_POINTERS_DISABLE_CLANG "") -set(IGC_BUILD__OPAQUE_POINTERS_ENABLE_CLANG "") -# NB: The option to do the below only got introduced post-LLVM 14 -# if(IGC_BUILD__CLANG_VERSION_MAJOR EQUAL 14) -# set(IGC_BUILD__OPAQUE_POINTERS_ENABLE_CLANG "-opaque-pointers" -# endif() -# (see github.com/llvm/llvm-project/commit/d69e9f9d8) -if(IGC_BUILD__CLANG_VERSION_MAJOR GREATER 14) +set(IGC_BUILD__OPAQUE_POINTERS_ENABLE_OPT "-opaque-pointers=1") +set(IGC_BUILD__OPAQUE_POINTERS_DISABLE_OPT "-opaque-pointers=0") +set(IGC_BUILD__OPAQUE_POINTERS_ENABLE_CLANG "-opaque-pointers") +if(LLVM_VERSION_MAJOR GREATER 14) set(IGC_BUILD__OPAQUE_POINTERS_DISABLE_CLANG "-no-opaque-pointers") endif()