diff --git a/tdx-compliance/tdx-compliance-cr.h b/tdx-compliance/tdx-compliance-cr.h
index a809819..0a78d50 100644
--- a/tdx-compliance/tdx-compliance-cr.h
+++ b/tdx-compliance/tdx-compliance-cr.h
@@ -216,7 +216,8 @@ struct test_cr cr_list[] = {
 	 * TD attempts to modify them results in a #VE,
 	 * bits VMXE(13) and SMXE(14) are fixed to 0.
 	 */
-	DEF_XCH_CR4(X86_CR4_VMXE | X86_CR4_SMXE, X86_TRAP_VE, NO_PRE_COND, VER1_0 | VER1_5),
+	DEF_XCH_CR4(X86_CR4_VMXE, X86_TRAP_VE, NO_PRE_COND, VER1_0 | VER1_5),
+	DEF_XCH_CR4(X86_CR4_SMXE, X86_TRAP_VE, NO_PRE_COND, VER1_0 | VER1_5),
 
 	/*
 	 * TD attempts to modify bit MCE(6) results in a #VE,
diff --git a/tdx-compliance/tdx-compliance-msr.h b/tdx-compliance/tdx-compliance-msr.h
index 967aeb9..eabbbe2 100644
--- a/tdx-compliance/tdx-compliance-msr.h
+++ b/tdx-compliance/tdx-compliance-msr.h
@@ -531,7 +531,8 @@ struct test_msr msr_cases[] = {
 
 	DEF_READ_MSR(MSR_IA32_PLATFORM_ID, X86_TRAP_VE, NO_PRE_COND, VER1_5),
 	DEF_WRITE_MSR(MSR_IA32_PLATFORM_ID, X86_TRAP_VE, NO_PRE_COND, VER1_5),
-	DEF_READ_MSR(MSR_IA32_APICBASE, X86_TRAP_VE, NO_PRE_COND, VER1_5),
+	/* according to MSR Index & Name, Ihis is a Guest behavior. */
+	DEF_READ_MSR(MSR_IA32_APICBASE, NO_EXCP, NO_PRE_COND, VER1_5),
 	DEF_WRITE_MSR(MSR_IA32_APICBASE, X86_TRAP_VE, NO_PRE_COND, VER1_5),
 	DEF_READ_MSR(MSR_TEST_CTRL, X86_TRAP_VE, NO_PRE_COND, VER1_5),
 	DEF_WRITE_MSR(MSR_TEST_CTRL, X86_TRAP_VE, NO_PRE_COND, VER1_5),