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Some case modification #131

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merged 2 commits into from
Nov 9, 2023
Merged

Some case modification #131

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ee29af5
Modify MSR_IA32_APICBASE case.
CrescentLove Nov 9, 2023
8795e5f
Modify X86_CR4_VMXE | X86_CR4_SMXE case
CrescentLove Nov 9, 2023
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3 changes: 2 additions & 1 deletion tdx-compliance/tdx-compliance-cr.h
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Original file line number Diff line number Diff line change
Expand Up @@ -216,7 +216,8 @@ struct test_cr cr_list[] = {
* TD attempts to modify them results in a #VE,
* bits VMXE(13) and SMXE(14) are fixed to 0.
*/
DEF_XCH_CR4(X86_CR4_VMXE | X86_CR4_SMXE, X86_TRAP_VE, NO_PRE_COND, VER1_0 | VER1_5),
DEF_XCH_CR4(X86_CR4_VMXE, X86_TRAP_VE, NO_PRE_COND, VER1_0 | VER1_5),
DEF_XCH_CR4(X86_CR4_SMXE, X86_TRAP_VE, NO_PRE_COND, VER1_0 | VER1_5),

/*
* TD attempts to modify bit MCE(6) results in a #VE,
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3 changes: 2 additions & 1 deletion tdx-compliance/tdx-compliance-msr.h
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Expand Up @@ -531,7 +531,8 @@ struct test_msr msr_cases[] = {

DEF_READ_MSR(MSR_IA32_PLATFORM_ID, X86_TRAP_VE, NO_PRE_COND, VER1_5),
DEF_WRITE_MSR(MSR_IA32_PLATFORM_ID, X86_TRAP_VE, NO_PRE_COND, VER1_5),
DEF_READ_MSR(MSR_IA32_APICBASE, X86_TRAP_VE, NO_PRE_COND, VER1_5),
/* according to MSR Index & Name, Ihis is a Guest behavior. */
DEF_READ_MSR(MSR_IA32_APICBASE, NO_EXCP, NO_PRE_COND, VER1_5),
DEF_WRITE_MSR(MSR_IA32_APICBASE, X86_TRAP_VE, NO_PRE_COND, VER1_5),
DEF_READ_MSR(MSR_TEST_CTRL, X86_TRAP_VE, NO_PRE_COND, VER1_5),
DEF_WRITE_MSR(MSR_TEST_CTRL, X86_TRAP_VE, NO_PRE_COND, VER1_5),
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