⚡ RAM Register Array Design --- Change Enable to go Through Demultiplexer

[jameshughes89]

What

Change the design of the RAM's register array to have the write enable signal go through a demultiplexer instead of ANDing the write enable signal with the output of the decoder.

Why

It simplifies the design

Where

In the "4x4_ram.dig" design. --- see the below image.

The images and related text discussing the images in the "Registers and RAM" topic will need to change too. Specifically, the images

• "4x4_ram_with_plexers_clock_en.png"
• "x4_memory_write_en.png"

How

Use a demultiplexer to send the signal of the write enable to the specified output line.