From 276836475e39727aa96136482c947b6676f6246f Mon Sep 17 00:00:00 2001
From: Carl Yan <94885426+Carl7yan@users.noreply.github.com>
Date: Fri, 15 Mar 2024 18:50:58 +0800
Subject: [PATCH] Update bACS_213.v

Should use combinational logic to calculate suma and sumb, and sequential logic to calculate acs_ppm_out and acs_Bx_out
---
 Vit_b213/src/bACS_213.v | 101 +++++++++++++++++++++++-----------------
 1 file changed, 59 insertions(+), 42 deletions(-)

diff --git a/Vit_b213/src/bACS_213.v b/Vit_b213/src/bACS_213.v
index 5cd2497..3aaa52d 100644
--- a/Vit_b213/src/bACS_213.v
+++ b/Vit_b213/src/bACS_213.v
@@ -34,48 +34,65 @@ module bACS_213 (acs_ppm_out, acs_Bx_out,
    reg [`W-1:0]    sumb;   
 
 
-
-always @(posedge clock or posedge reset)
-   begin
-      if (reset)
-        suma <=0;
-      else
-	begin
-           if (ae && acs_ppm_ina==4'b1111)
-	     suma <= acs_ppm_ina;
-           else if (ae)
-             suma <= acs_ppm_ina + HD_ina;
-	end
-   end
-
-always @(posedge clock or posedge reset)
-   begin
-      if (reset)
-         sumb <=0;
-      else
-	begin
-           if (ae && acs_ppm_inb ==4'b1111)
-	     sumb <=acs_ppm_inb;
-	   else if (ae)
-             sumb <= acs_ppm_inb + HD_inb;
-	end
-   end
-
-
-
-always @(suma or sumb)
-   begin 
-      if (suma <=sumb && ae)
-         begin
-            acs_ppm_out =suma;
-            acs_Bx_out  =1'b0; //Select Upper Backward Path
-         end
-      else
-         begin
-            acs_ppm_out =sumb;
-            acs_Bx_out  =1'b1; //Select Lower Backward Path
-         end
-   end
+always @* begin
+  suma = acs_ppm_ina + HD_ina;
+end
+//always @(posedge clock or posedge reset)
+//   begin
+//      if (reset)
+//        suma <=0;
+//      else
+//	begin
+//           if (ae && acs_ppm_ina==4'b1111)
+//	     suma <= acs_ppm_ina;
+//           else if (ae)
+//             suma <= acs_ppm_ina + HD_ina;
+//	end
+//   end
+
+always @* begin
+  sumb = acs_ppm_inb + HD_inb;
+end
+//always @(posedge clock or posedge reset)
+//   begin
+//      if (reset)
+//         sumb <=0;
+//      else
+//	begin
+//           if (ae && acs_ppm_inb ==4'b1111)
+//	     sumb <=acs_ppm_inb;
+//	   else if (ae)
+//             sumb <= acs_ppm_inb + HD_inb;
+//	end
+//   end
+
+
+always @(posedge clock or posedge reset) begin
+  if(reset)
+    {acs_ppm_out, acs_Bx_out} <= 0;
+  else begin
+    if(suma<=sumb && ae) begin
+      acs_ppm_out <= suma;
+      acs_Bx_out <= 1'b0;
+    end if(suma>=sumb && ae) begin
+      acs_ppm_out <= sumb;
+      acs_Bx_out <= 1'b1;
+    end
+  end
+end
+//always @(suma or sumb)
+//   begin 
+//      if (suma <=sumb && ae)
+//         begin
+//            acs_ppm_out =suma;
+//            acs_Bx_out  =1'b0; //Select Upper Backward Path
+//         end
+//      else
+//         begin
+//            acs_ppm_out =sumb;
+//            acs_Bx_out  =1'b1; //Select Lower Backward Path
+//         end
+//   end