From 329950be7c46bb2e9bbf9024beb9e3c6f5b6d778 Mon Sep 17 00:00:00 2001 From: Jiajie Chen Date: Wed, 13 Dec 2023 18:16:37 +0800 Subject: [PATCH] Fix intrinsics mismatch --- check_lsx.py | 1 + gcc_lsxintrin.h | 10 +++++----- main.py | 4 ++-- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/check_lsx.py b/check_lsx.py index 778ae560..ca2c7a94 100644 --- a/check_lsx.py +++ b/check_lsx.py @@ -4,6 +4,7 @@ # Update gh-pages before running: # git fetch origin # git worktree add -f ../gh-pages gh-pages +# git -C ../gh-pages reset origin/gh-pages --hard # gcc intrinsics gcc_intrinsics = set() diff --git a/gcc_lsxintrin.h b/gcc_lsxintrin.h index 3d95bf56..cb4a6b63 100644 --- a/gcc_lsxintrin.h +++ b/gcc_lsxintrin.h @@ -349,13 +349,13 @@ __m128i __lsx_vmin_d (__m128i, __m128i); __m128i __lsx_vmin_du (__m128i, __m128i); __m128i __lsx_vmin_h (__m128i, __m128i); __m128i __lsx_vmin_hu (__m128i, __m128i); -__m128i __lsx_vmini_b (__m128i, imm_n16_15) +__m128i __lsx_vmini_b (__m128i, imm_n16_15); __m128i __lsx_vmini_bu (__m128i, imm0_31); -__m128i __lsx_vmini_d (__m128i, imm_n16_15) +__m128i __lsx_vmini_d (__m128i, imm_n16_15); __m128i __lsx_vmini_du (__m128i, imm0_31); -__m128i __lsx_vmini_h (__m128i, imm_n16_15) +__m128i __lsx_vmini_h (__m128i, imm_n16_15); __m128i __lsx_vmini_hu (__m128i, imm0_31); -__m128i __lsx_vmini_w (__m128i, imm_n16_15) +__m128i __lsx_vmini_w (__m128i, imm_n16_15); __m128i __lsx_vmini_wu (__m128i, imm0_31); __m128i __lsx_vmin_w (__m128i, __m128i); __m128i __lsx_vmin_wu (__m128i, __m128i); @@ -585,7 +585,7 @@ __m128i __lsx_vsrari_w (__m128i, imm0_31); __m128i __lsx_vsrarn_b_h (__m128i, __m128i); __m128i __lsx_vsrarn_h_w (__m128i, __m128i); __m128i __lsx_vsrarni_b_h (__m128i, __m128i, imm0_15); -__m128i __lsx_vsrarni_d_q (__m128i, __m128i, imm0_127) +__m128i __lsx_vsrarni_d_q (__m128i, __m128i, imm0_127); __m128i __lsx_vsrarni_h_w (__m128i, __m128i, imm0_31); __m128i __lsx_vsrarni_w_d (__m128i, __m128i, imm0_63); __m128i __lsx_vsrarn_w_d (__m128i, __m128i); diff --git a/main.py b/main.py index faa3ca32..04f966d6 100644 --- a/main.py +++ b/main.py @@ -704,7 +704,7 @@ def vslti(name): if signedness == "signed": imm_range = "imm_n16_15" else: - imm_range = "imm_0_31" + imm_range = "imm0_31" return instruction( intrinsic=f"__m128i __lsx_vslti_{name} (__m128i a, {imm_range} imm)", instr=f"vslti.{name} vr, vr, imm", @@ -1289,7 +1289,7 @@ def vftint_l_s(rounding, low_high): def vftint_w_d(rounding): rounding_mode = get_rounding_mode(rounding) return instruction( - intrinsic=f"__m128i __lsx_vftint{rounding}_w_d (__m128 a, __m128 b)", + intrinsic=f"__m128i __lsx_vftint{rounding}_w_d (__m128d a, __m128d b)", instr=f"vftint{rounding}.w.d vr, vr", desc=f"Convert double-precision floating point elements in `a` and `b` to 32-bit integer, {rounding_mode}.", )