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+ +

Unofficial LoongArch Intrinsics Guide

+

This is the Unofficial LoongArch Intrinsics Guide by Jiajie Chen et, al. The documentation is arranged from the following sources:

+
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  • QEMU
  • +
  • GCC
  • +
  • Observations from real hardware incl. 3C5000 and 3A6000
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+ +
+ + + + + Next » + + +
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+ + +
+ +
+
+
    +
  • + + +
  • +
  • +
+
+
+
+
+ +

Bitwise Operations

+

__m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vbitsel.v vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute bitwise selection: for each bit position, if the bit in c equals to one, copy the bit from b to dst, otherwise copy from a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (c.dword[i] & b.dword[i]) | (~c.dword[i] & a.dword[i]);
+}
+
+

__m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vbitseli.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute bitwise selection: for each bit position, if the bit in a equals to one, copy the bit from imm to dst, otherwise copy from b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (~a.byte[i] & b.byte[i]) | (a.byte[i] & (u8)imm);
+}
+
+

__m128i __lsx_vbitclr_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitclr_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitclr.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by elements in b from 8-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] & (~((u8)1 << (b.byte[i] % 8)));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitclr_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitclr_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitclr.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by elements in b from 16-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] & (~((u16)1 << (b.half[i] % 16)));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitclr_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitclr_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitclr.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by elements in b from 32-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] & (~((u32)1 << (b.word[i] % 32)));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitclr_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitclr_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitclr.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by elements in b from 64-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] & (~((u64)1 << (b.dword[i] % 64)));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm)

+

Synopsis

+
__m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm)
+#include <lsxintrin.h>
+Instruction: vbitclri.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by imm from 8-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] & (~((u8)1 << imm));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm)

+

Synopsis

+
__m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm)
+#include <lsxintrin.h>
+Instruction: vbitclri.h vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by imm from 16-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] & (~((u16)1 << imm));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vbitclri.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by imm from 32-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] & (~((u32)1 << imm));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm)

+

Synopsis

+
__m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm)
+#include <lsxintrin.h>
+Instruction: vbitclri.d vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Clear the bit specified by imm from 64-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] & (~((u64)1 << imm));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitset_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitset_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitset.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by elements in b from 8-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] | ((u8)1 << (b.byte[i] % 8));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitset_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitset_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitset.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by elements in b from 16-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] | ((u16)1 << (b.half[i] % 16));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitset_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitset_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitset.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by elements in b from 32-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] | ((u32)1 << (b.word[i] % 32));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitset_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitset_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitset.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by elements in b from 64-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] | ((u64)1 << (b.dword[i] % 64));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm)

+

Synopsis

+
__m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm)
+#include <lsxintrin.h>
+Instruction: vbitseti.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by imm from 8-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] | ((u8)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm)

+

Synopsis

+
__m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm)
+#include <lsxintrin.h>
+Instruction: vbitseti.h vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by imm from 16-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] | ((u16)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vbitseti.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by imm from 32-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] | ((u32)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm)

+

Synopsis

+
__m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm)
+#include <lsxintrin.h>
+Instruction: vbitseti.d vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Set the bit specified by imm from 64-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] | ((u64)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrev_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitrev_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitrev.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by elements in b from 8-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] ^ ((u8)1 << (b.byte[i] % 8));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrev_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitrev_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitrev.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by elements in b from 16-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] ^ ((u16)1 << (b.half[i] % 16));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrev_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitrev_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitrev.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by elements in b from 32-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] ^ ((u32)1 << (b.word[i] % 32));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrev_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vbitrev_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vbitrev.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by elements in b from 64-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] ^ ((u64)1 << (b.dword[i] % 64));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm)

+

Synopsis

+
__m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm)
+#include <lsxintrin.h>
+Instruction: vbitrevi.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by imm from 8-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] ^ ((u8)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm)

+

Synopsis

+
__m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm)
+#include <lsxintrin.h>
+Instruction: vbitrevi.h vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by imm from 16-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] ^ ((u16)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vbitrevi.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by imm from 32-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] ^ ((u32)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm)

+

Synopsis

+
__m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm)
+#include <lsxintrin.h>
+Instruction: vbitrevi.d vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Toggle the bit specified by imm from 64-bit elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] ^ ((u64)1 << imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clo_b (__m128i a)

+

Synopsis

+
__m128i __lsx_clo_b (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclo.b vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading ones of 8-bit elements in a.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = clo(a.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clo_h (__m128i a)

+

Synopsis

+
__m128i __lsx_clo_h (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclo.h vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading ones of 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = clo(a.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clo_w (__m128i a)

+

Synopsis

+
__m128i __lsx_clo_w (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclo.w vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading ones of 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = clo(a.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clo_d (__m128i a)

+

Synopsis

+
__m128i __lsx_clo_d (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclo.d vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading ones of 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = clo(a.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clz_b (__m128i a)

+

Synopsis

+
__m128i __lsx_clz_b (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclz.b vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading zeros of 8-bit elements in a.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = clz(a.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clz_h (__m128i a)

+

Synopsis

+
__m128i __lsx_clz_h (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclz.h vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading zeros of 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = clz(a.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clz_w (__m128i a)

+

Synopsis

+
__m128i __lsx_clz_w (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclz.w vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading zeros of 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = clz(a.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_clz_d (__m128i a)

+

Synopsis

+
__m128i __lsx_clz_d (__m128i a)
+#include <lsxintrin.h>
+Instruction: vclz.d vr, vr
+CPU Flags: LSX
+
+

Description

+

Count leading zeros of 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = clz(a.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_h_b (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_h_b (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.h.b vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend signed 8-bit elements in the higher half of a to 16-bit.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)(s8)a.byte[8 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_hu_bu (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_hu_bu (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.hu.bu vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend unsigned 8-bit elements in the higher half of a to 16-bit.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[8 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_w_h (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_w_h (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.w.h vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend signed 16-bit elements in the higher half of a to 32-bit.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)a.half[4 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_wu_hu (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_wu_hu (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.wu.hu vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend unsigned 16-bit elements in the higher half of a to 32-bit.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[4 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_d_w (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_d_w (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.d.w vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend signed 32-bit elements in the higher half of a to 64-bit.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)a.word[2 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_du_wu (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_du_wu (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.du.wu vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend unsigned 32-bit elements in the higher half of a to 64-bit.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_q_d (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_q_d (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.q.d vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend signed 64-bit elements in the higher half of a to 128-bit.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[1 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vexth_qu_du (__m128i a)

+

Synopsis

+
__m128i __lsx_vexth_qu_du (__m128i a)
+#include <lsxintrin.h>
+Instruction: vexth.qu.du vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend unsigned 64-bit elements in the higher half of a to 128-bit.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[1 + i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vextl_q_d (__m128i a)

+

Synopsis

+
__m128i __lsx_vextl_q_d (__m128i a)
+#include <lsxintrin.h>
+Instruction: vextl.q.d vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend signed 64-bit elements in the lower half of a to 128-bit.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vextl_qu_du (__m128i a)

+

Synopsis

+
__m128i __lsx_vextl_qu_du (__m128i a)
+#include <lsxintrin.h>
+Instruction: vextl.qu.du vr, vr
+CPU Flags: LSX
+
+

Description

+

Extend unsigned 64-bit elements in the lower half of a to 128-bit.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vextrins.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Extract one 8-bit element in b and insert it to a according to imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i == ((imm >> 4) & 15)) ? b.byte[imm & 15] : a.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vextrins.h vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Extract one 16-bit element in b and insert it to a according to imm.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i == ((imm >> 4) & 7)) ? b.half[imm & 7] : a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vextrins.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Extract one 32-bit element in b and insert it to a according to imm.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i == ((imm >> 4) & 3)) ? b.word[imm & 3] : a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vextrins.d vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Extract one 64-bit element in b and insert it to a according to imm.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i == ((imm >> 4) & 1)) ? b.dword[imm & 1] : a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_pcnt_b (__m128i a)

+

Synopsis

+
__m128i __lsx_pcnt_b (__m128i a)
+#include <lsxintrin.h>
+Instruction: vpcnt.b vr, vr
+CPU Flags: LSX
+
+

Description

+

Count the number of ones in 8-bit elements in a.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = popcount(a.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_pcnt_h (__m128i a)

+

Synopsis

+
__m128i __lsx_pcnt_h (__m128i a)
+#include <lsxintrin.h>
+Instruction: vpcnt.h vr, vr
+CPU Flags: LSX
+
+

Description

+

Count the number of ones in 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = popcount(a.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_pcnt_w (__m128i a)

+

Synopsis

+
__m128i __lsx_pcnt_w (__m128i a)
+#include <lsxintrin.h>
+Instruction: vpcnt.w vr, vr
+CPU Flags: LSX
+
+

Description

+

Count the number of ones in 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = popcount(a.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_pcnt_d (__m128i a)

+

Synopsis

+
__m128i __lsx_pcnt_d (__m128i a)
+#include <lsxintrin.h>
+Instruction: vpcnt.d vr, vr
+CPU Flags: LSX
+
+

Description

+

Count the number of ones in 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = popcount(a.dword[i]);
+}
+
+

Tested on real machine.

+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/float_comparison/index.html b/lsx/float_comparison/index.html new file mode 100644 index 00000000..e936efa8 --- /dev/null +++ b/lsx/float_comparison/index.html @@ -0,0 +1,1384 @@ + + + + + + + + Floating Point Comparison - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
  • + + +
  • +
  • +
+
+
+
+
+ +

Floating Point Comparison

+

__m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.caf.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_caf(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.caf.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_caf(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.ceq.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_ceq(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.ceq.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_ceq(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cle.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cle(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cle.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cle(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.clt.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_clt(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.clt.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_clt(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cne.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cne(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cne.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cne(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cor.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cor(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cor.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cor(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cueq.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cueq(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cueq.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cueq(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cule.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cule(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cule.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cule(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cult.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cult(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cult.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cult(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cun.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cun(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cun.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cun(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cune.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_cune(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.cune.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst. Do not trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_cune(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.saf.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_saf(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.saf.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_saf(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.seq.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_seq(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.seq.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_seq(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sle.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sle(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sle.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sle(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.slt.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_slt(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.slt.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_slt(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sne.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sne(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sne.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sne(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sor.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sor(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sor.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sor(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sueq.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sueq(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sueq.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sueq(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sule.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sule(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sule.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sule(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sult.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sult(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sult.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sult(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sun.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sun(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sun.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sun(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b)

+

Synopsis

+
__m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sune.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare single precision elements in a and b, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    if (fp_compare_sune(a.fp32[i], b.fp32[i])) {
+        dst.word[i] = 0xFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+

__m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b)

+

Synopsis

+
__m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcmp.sune.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare double precision elements in a and b, save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst. Trap for QNaN.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    if (fp_compare_sune(a.fp64[i], b.fp64[i])) {
+        dst.word[i] = 0xFFFFFFFFFFFFFFFF;
+    } else {
+        dst.word[i] = 0;
+    }
+}
+
+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/float_computation/index.html b/lsx/float_computation/index.html new file mode 100644 index 00000000..bc9d5d10 --- /dev/null +++ b/lsx/float_computation/index.html @@ -0,0 +1,248 @@ + + + + + + + + Floating Point Computation - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
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+
+
+
+
+ +

Floating Point Computation

+

__m128d __lsx_vfadd_d (__m128d a, __m128d b)

+

Synopsis

+
__m128d __lsx_vfadd_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfadd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add double precision floating point elements in a to b and store the result in dst.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    dst.fp64[i] = a.fp64[i] + b.fp64[i];
+}
+
+

__m128 __lsx_vfadd_s (__m128 a, __m128 b)

+

Synopsis

+
__m128d __lsx_vfadd_s (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfadd.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add single precision floating point elements in a to b and store the result in dst.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    dst.fp32[i] = a.fp32[i] + b.fp32[i];
+}
+
+

__m128 __lsx_vfdiv_s (__m128 a, __m128 b)

+

Synopsis

+
__m128 __lsx_vfdiv_s (__m128 a, __m128 b)
+#include <lsxintrin.h>
+Instruction: vfdiv.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide __m128 precision floating point elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.fp32[i] = a.fp32[i] / b.fp32[i];
+}
+
+

__m128d __lsx_vfdiv_d (__m128d a, __m128d b)

+

Synopsis

+
__m128d __lsx_vfdiv_d (__m128d a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfdiv.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide __m128d precision floating point elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.fp64[i] = a.fp64[i] / b.fp64[i];
+}
+
+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/float_conversion/index.html b/lsx/float_conversion/index.html new file mode 100644 index 00000000..eccd14e9 --- /dev/null +++ b/lsx/float_conversion/index.html @@ -0,0 +1,228 @@ + + + + + + + + Floating Point Conversion - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
  • + + +
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  • +
+
+
+
+
+ +

Floating Point Conversion

+

__m128d __lsx_vfcvth_d_s (__m128 a)

+

Synopsis

+
__m128d __lsx_vfcvth_d_s (__m128 a)
+#include <lsxintrin.h>
+Instruction: vfcvth.d.s vr, vr
+CPU Flags: LSX
+
+

Description

+

Convert single precision floating point elements in higher half of a to double precision.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.fp64[i] = a.fp32[2 + i];
+}
+
+

__m128d __lsx_vfcvtl_d_s (__m128 a)

+

Synopsis

+
__m128d __lsx_vfcvtl_d_s (__m128 a)
+#include <lsxintrin.h>
+Instruction: vfcvtl.d.s vr, vr
+CPU Flags: LSX
+
+

Description

+

Convert single precision floating point elements in lower half of a to double precision.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.fp64[i] = a.fp32[i];
+}
+
+

__m128 __lsx_vfcvt_s_d (__m128d a, __m128d b)

+

Synopsis

+
__m128 __lsx_vfcvt_s_d (__m128a, __m128d b)
+#include <lsxintrin.h>
+Instruction: vfcvt.s.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Convert double precision floating point elements in a and b to double precision.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  if (i < 2) {
+    dst.fp32[i] = b.fp64[i];
+  } else {
+    dst.fp32[i] = a.fp64[i - 2];
+  }
+}
+
+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/float_misc/index.html b/lsx/float_misc/index.html new file mode 100644 index 00000000..a5596988 --- /dev/null +++ b/lsx/float_misc/index.html @@ -0,0 +1,200 @@ + + + + + + + + Floatint Point Misc - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
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  • +
+
+
+
+
+ +

Floatint Point Misc

+

__m128i __lsx_vfclass_d (__m128d a)

+

Synopsis

+
__m128i __lsx_vfclass_d (__m128d a)
+#include <lsxintrin.h>
+Instruction: vfclass.d vr, vr
+CPU Flags: LSX
+
+

Description

+

Classifiy each double precision floating point elements in a.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    dst.dword[i] = fp_classify(a.fp64[i]);
+}
+
+

__m128i __lsx_vfclass_s (__m128 a)

+

Synopsis

+
__m128i __lsx_vfclass_s (__m128d a)
+#include <lsxintrin.h>
+Instruction: vfclass.s vr, vr
+CPU Flags: LSX
+
+

Description

+

Classifiy each single precision floating point elements in a.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    dst.word[i] = fp_classify(a.fp32[i]);
+}
+
+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/fma/index.html b/lsx/fma/index.html new file mode 100644 index 00000000..de78c005 --- /dev/null +++ b/lsx/fma/index.html @@ -0,0 +1,344 @@ + + + + + + + + Fused Multiply-Add - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
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  • +
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+
+
+
+
+ +

Fused Multiply-Add

+

__m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c)

+

Synopsis

+
__m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c)
+#include <lsxintrin.h>
+Instruction: vfmadd.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, accumulate to elements in c and store the result in dst.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    dst.fp32[i] = a.fp32[i] * b.fp32[i] + c.fp32[i];
+}
+
+

__m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c)

+

Synopsis

+
__m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c)
+#include <lsxintrin.h>
+Instruction: vfmadd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, accumulate to elements in c and store the result in dst.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    dst.fp64[i] = a.fp64[i] * b.fp64[i] + c.fp64[i];
+}
+
+

__m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c)

+

Synopsis

+
__m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c)
+#include <lsxintrin.h>
+Instruction: vfmsub.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, subtract elements in c and store the result in dst.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    dst.fp32[i] = a.fp32[i] * b.fp32[i] - c.fp32[i];
+}
+
+

__m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c)

+

Synopsis

+
__m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c)
+#include <lsxintrin.h>
+Instruction: vfmsub.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, subtract elements in c and store the result in dst.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    dst.fp64[i] = a.fp64[i] * b.fp64[i] - c.fp64[i];
+}
+
+

__m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c)

+

Synopsis

+
__m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c)
+#include <lsxintrin.h>
+Instruction: vfnmadd.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, accumulate to elements in c and store the negated result in dst.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    dst.fp32[i] = -(a.fp32[i] * b.fp32[i] + c.fp32[i]);
+}
+
+

__m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c)

+

Synopsis

+
__m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c)
+#include <lsxintrin.h>
+Instruction: vfnmadd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, accumulate to elements in c and store the negated result in dst.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    dst.fp64[i] = (a.fp64[i] * b.fp64[i] + c.fp64[i]);
+}
+
+

__m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c)

+

Synopsis

+
__m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c)
+#include <lsxintrin.h>
+Instruction: vfnmsub.s vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, subtract elements in c and store the negated result in dst.

+

Operation

+
for (int i = 0;i < 4;i++) {
+    dst.fp32[i] = -(a.fp32[i] * b.fp32[i] - c.fp32[i]);
+}
+
+

__m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c)

+

Synopsis

+
__m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c)
+#include <lsxintrin.h>
+Instruction: vfnmsub.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b, subtract elements in c and store the negated result in dst.

+

Operation

+
for (int i = 0;i < 2;i++) {
+    dst.fp64[i] = -(a.fp64[i] * b.fp64[i] - c.fp64[i]);
+}
+
+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/integer_comparison/index.html b/lsx/integer_comparison/index.html new file mode 100644 index 00000000..059701ce --- /dev/null +++ b/lsx/integer_comparison/index.html @@ -0,0 +1,652 @@ + + + + + + + + Integer Comparison - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
  • + + +
  • +
  • +
+
+
+
+
+ +

Integer Comparison

+

__m128i __lsx_vseq_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vseq_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vseq.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the 8-bit elements in a and b, store all-ones to dst if equal, zero otherwise.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (a.byte[i] == b.byte[i]) ? 0xFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vseq_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vseq_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vseq.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the 16-bit elements in a and b, store all-ones to dst if equal, zero otherwise.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (a.half[i] == b.half[i]) ? 0xFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vseq_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vseq_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vseq.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the 32-bit elements in a and b, store all-ones to dst if equal, zero otherwise.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (a.word[i] == b.word[i]) ? 0xFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vseq_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vseq_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vseq.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the 64-bit elements in a and b, store all-ones to dst if equal, zero otherwise.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (a.dword[i] == b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 8-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 8-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 16-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 16-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 32-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 32-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 64-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 64-bit elements in a and b, store all-ones to dst if corresponding element in a is less than b, zero otherwise.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 8-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 8-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 16-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 16-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 32-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 32-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the signed 64-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vslt_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vslt_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vslt.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compare the unsigned 64-bit elements in a and b, store all-ones to dst if corresponding element in a is less than or equal b, zero otherwise.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0;
+}
+
+

Tested on real machine.

+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/integer_computation/index.html b/lsx/integer_computation/index.html new file mode 100644 index 00000000..beecf776 --- /dev/null +++ b/lsx/integer_computation/index.html @@ -0,0 +1,5248 @@ + + + + + + + + Integer Computation - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
  • + + +
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  • +
+
+
+
+
+ +

Integer Computation

+

__m128i __lsx_vadd_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadd_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadd.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] + b.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadd_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadd_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadd.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] + b.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadd_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadd_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadd.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] + b.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadd_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadd_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] + b.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadd_q (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadd_q (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadd.q vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add 128-bit elements in a and b, save the result in dst.

+

Operation

+
dst.qword[0] = a.qword[0] + b.qword[0];
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of signed 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((s8)a.byte[i] > (s8)b.byte[i]) ? (a.byte[i] - b.byte[i])
+                                                : (b.byte[i] - a.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of unsigned 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((u8)a.byte[i] > (u8)b.byte[i]) ? (a.byte[i] - b.byte[i])
+                                                : (b.byte[i] - a.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of signed 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((s16)a.half[i] > (s16)b.half[i]) ? (a.half[i] - b.half[i])
+                                                  : (b.half[i] - a.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of unsigned 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((u16)a.half[i] > (u16)b.half[i]) ? (a.half[i] - b.half[i])
+                                                  : (b.half[i] - a.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of signed 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((s32)a.word[i] > (s32)b.word[i]) ? (a.word[i] - b.word[i])
+                                                  : (b.word[i] - a.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of unsigned 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((u32)a.word[i] > (u32)b.word[i]) ? (a.word[i] - b.word[i])
+                                                  : (b.word[i] - a.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of signed 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((s64)a.dword[i] > (s64)b.dword[i])
+                     ? (a.dword[i] - b.dword[i])
+                     : (b.dword[i] - a.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vabsd_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vabsd_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vabsd.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute absolute difference of unsigned 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((u64)a.dword[i] > (u64)b.dword[i])
+                     ? (a.dword[i] - b.dword[i])
+                     : (b.dword[i] - a.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadda_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadda_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadda.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add absolute of 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = abs((s8)a.byte[i]) + abs((s8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadda_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadda_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadda.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add absolute of 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = abs((s16)a.half[i]) + abs((s16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadda_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadda_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadda.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add absolute of 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = abs((s32)a.word[i]) + abs((s32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vadda_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vadda_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vadda.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add absolute of 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = abs((s64)a.dword[i]) + abs((s64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vaddi.bu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Add 8-bit elements in a and imm, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] + imm;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vaddi.hu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Add 16-bit elements in a and imm, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] + imm;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vaddi.wu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Add 32-bit elements in a and imm, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] + imm;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddi_du (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vaddi_du (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vaddi.du vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Add 64-bit elements in a and imm, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] + imm;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned signed 8-bit elements in a and signed elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.h.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 8-bit elements in a and unsigned elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.h.bu.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 8-bit elements in a and signed elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned signed 16-bit elements in a and signed elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.w.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 16-bit elements in a and unsigned elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.w.hu.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 16-bit elements in a and signed elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned signed 32-bit elements in a and signed elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.d.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 32-bit elements in a and unsigned elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.d.wu.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 32-bit elements in a and signed elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned signed 64-bit elements in a and signed elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.q.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 64-bit elements in a and unsigned elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.q.du.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add even-positioned unsigned 64-bit elements in a and signed elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 8-bit elements in a and signed elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.h.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 8-bit elements in a and unsigned elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.h.bu.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 8-bit elements in a and signed elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 16-bit elements in a and signed elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.w.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 16-bit elements in a and unsigned elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.w.hu.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 16-bit elements in a and signed elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 32-bit elements in a and signed elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.d.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 32-bit elements in a and unsigned elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.d.wu.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 32-bit elements in a and signed elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 64-bit elements in a and signed elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.q.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 64-bit elements in a and unsigned elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vaddwev.q.du.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 64-bit elements in a and signed elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of signed 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] =
+      ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) + (a.byte[i] & b.byte[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of unsigned 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] =
+      ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) + (a.byte[i] & b.byte[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of signed 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) +
+                (a.half[i] & b.half[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of unsigned 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) +
+                (a.half[i] & b.half[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of signed 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) +
+                (a.word[i] & b.word[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of unsigned 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) +
+                (a.word[i] & b.word[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of signed 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) +
+                 (a.dword[i] & b.dword[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavg_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavg_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavg.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards negative infinity) of unsigned 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) +
+                 (a.dword[i] & b.dword[i] & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of signed 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) +
+                ((a.byte[i] | b.byte[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of unsigned 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) +
+                ((a.byte[i] | b.byte[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of signed 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) +
+                ((a.half[i] | b.half[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of unsigned 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) +
+                ((a.half[i] | b.half[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of signed 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) +
+                ((a.word[i] | b.word[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of unsigned 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) +
+                ((a.word[i] | b.word[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of signed 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) +
+                 ((a.dword[i] | b.dword[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vavgr_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vavgr_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vavgr.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute the average (rounded towards positive infinity) of unsigned 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) +
+                 ((a.dword[i] | b.dword[i]) & 1);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide signed 8-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] / (s8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide unsigned 8-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] / (u8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide signed 16-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] / (s16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide unsigned 16-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] / (u16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide signed 32-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] / (s32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide unsigned 32-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] / (u32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide signed 64-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] / (s64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_div_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_div_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vdiv.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Divide unsigned 64-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] / (u64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_h_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_h_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 8-bit elements in a to even-positioned signed 8-bit elements in 'b' to get 16-bit result.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.hu.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 8-bit elements in a to even-positioned unsigned 8-bit elements in 'b' to get 16-bit result.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (u16)(u8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_w_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_w_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 16-bit elements in a to even-positioned signed 16-bit elements in 'b' to get 32-bit result.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.wu.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 16-bit elements in a to even-positioned unsigned 16-bit elements in 'b' to get 32-bit result.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (u32)(u16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_d_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_d_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 32-bit elements in a to even-positioned signed 32-bit elements in 'b' to get 64-bit result.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.du.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 32-bit elements in a to even-positioned unsigned 32-bit elements in 'b' to get 64-bit result.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (u64)(u32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_q_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_q_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned signed 64-bit elements in a to even-positioned signed 64-bit elements in 'b' to get 128-bit result.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhaddw.qu.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Add odd-positioned unsigned 64-bit elements in a to even-positioned unsigned 64-bit elements in 'b' to get 128-bit result.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (u128)(u64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_h_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_h_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned signed 8-bit elements in a by even-positioned signed 8-bit elements in 'b' to get 16-bit result.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)(s8)a.byte[2 * i + 1] - (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.hu.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned unsigned 8-bit elements in a by even-positioned unsigned 8-bit elements in 'b' to get 16-bit result.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i + 1] - (u16)(u8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_w_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_w_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned signed 16-bit elements in a by even-positioned signed 16-bit elements in 'b' to get 32-bit result.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)a.half[2 * i + 1] - (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.wu.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned unsigned 16-bit elements in a by even-positioned unsigned 16-bit elements in 'b' to get 32-bit result.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i + 1] - (u32)(u16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_d_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_d_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned signed 32-bit elements in a by even-positioned signed 32-bit elements in 'b' to get 64-bit result.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)a.word[2 * i + 1] - (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.du.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned unsigned 32-bit elements in a by even-positioned unsigned 32-bit elements in 'b' to get 64-bit result.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i + 1] - (u64)(u32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_q_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_q_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned signed 64-bit elements in a by even-positioned signed 64-bit elements in 'b' to get 128-bit result.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] - (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vhsubw.qu.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract odd-positioned unsigned 64-bit elements in a by even-positioned unsigned 64-bit elements in 'b' to get 128-bit result.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] - (u128)(u64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmadd.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 8-bit elements in b and c, add to elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = b.byte[i] * c.byte[i] + a.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmadd.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 16-bit elements in b and c, add to elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = b.half[i] * c.half[i] + a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmadd.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 32-bit elements in b and c, add to elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = b.word[i] * c.word[i] + a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmadd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 64-bit elements in b and c, add to elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = b.dword[i] * c.dword[i] + a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 8-bit elements in b and signed elements in c, add to 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] =
+      (s16)(s8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.h.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 8-bit elements in b and unsigned elements in c, add to 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] =
+      (u16)(u8)b.byte[2 * i] * (u16)(u8)c.byte[2 * i] + (u16)a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.h.bu.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 8-bit elements in b and signed elements in c, add to 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] =
+      (u16)(u8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 16-bit elements in b and signed elements in c, add to 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] =
+      (s32)(s16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.w.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 16-bit elements in b and unsigned elements in c, add to 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] =
+      (u32)(u16)b.half[2 * i] * (u32)(u16)c.half[2 * i] + (u32)a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.w.hu.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 16-bit elements in b and signed elements in c, add to 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] =
+      (u32)(u16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 32-bit elements in b and signed elements in c, add to 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] =
+      (s64)(s32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.d.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 32-bit elements in b and unsigned elements in c, add to 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] =
+      (u64)(u32)b.word[2 * i] * (u64)(u32)c.word[2 * i] + (u64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.d.wu.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 32-bit elements in b and signed elements in c, add to 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] =
+      (u64)(u32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 64-bit elements in b and signed elements in c, add to 128-bit elements in a.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] =
+      (s128)(s64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.q.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 64-bit elements in b and unsigned elements in c, add to 128-bit elements in a.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] =
+      (u128)(u64)b.dword[2 * i] * (u128)(u64)c.dword[2 * i] + (u128)a.qword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwev.q.du.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 64-bit elements in b and signed elements in c, add to 128-bit elements in a.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] =
+      (u128)(u64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned signed 8-bit elements in b and signed elements in c, add to 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] =
+      (s16)(s8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.h.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 8-bit elements in b and unsigned elements in c, add to 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] =
+      (u16)(u8)b.byte[2 * i + 1] * (u16)(u8)c.byte[2 * i + 1] + (u16)a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.h.bu.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 8-bit elements in b and signed elements in c, add to 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] =
+      (u16)(u8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned signed 16-bit elements in b and signed elements in c, add to 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] +
+                (s32)a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.w.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 16-bit elements in b and unsigned elements in c, add to 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (u32)(u16)c.half[2 * i + 1] +
+                (u32)a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.w.hu.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 16-bit elements in b and signed elements in c, add to 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] +
+                (s32)a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned signed 32-bit elements in b and signed elements in c, add to 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] +
+                 (s64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.d.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 32-bit elements in b and unsigned elements in c, add to 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (u64)(u32)c.word[2 * i + 1] +
+                 (u64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.d.wu.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 32-bit elements in b and signed elements in c, add to 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] +
+                 (s64)a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned signed 64-bit elements in b and signed elements in c, add to 128-bit elements in a.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] +
+                 (s128)a.qword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.q.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 64-bit elements in b and unsigned elements in c, add to 128-bit elements in a.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (u128)(u64)c.dword[2 * i + 1] +
+                 (u128)a.qword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmaddwod.q.du.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply odd-positioned unsigned 64-bit elements in b and signed elements in c, add to 128-bit elements in a.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] +
+                 (s128)a.qword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 8-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = max((s8)a.byte[i], (s8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 8-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = max((u8)a.byte[i], (u8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 16-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = max((s16)a.half[i], (s16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 16-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = max((u16)a.half[i], (u16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 32-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = max((s32)a.word[i], (s32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 32-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = max((u32)a.word[i], (u32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 64-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = max((s64)a.dword[i], (s64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmax_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmax_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmax.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 64-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = max((u64)a.dword[i], (u64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 8-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = max((s8)a.byte[i], (s8)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_bu (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_bu (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.bu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 8-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = max((u8)a.byte[i], (u8)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.h vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 16-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = max((s16)a.half[i], (s16)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_hu (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_hu (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.hu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 16-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = max((u16)a.half[i], (u16)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 32-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = max((s32)a.word[i], (s32)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_wu (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_wu (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.wu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 32-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = max((u32)a.word[i], (u32)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.d vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for signed 64-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = max((s64)a.dword[i], (s64)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmaxi_du (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmaxi_du (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmaxi.du vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise maximum for unsigned 64-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = max((u64)a.dword[i], (u64)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 8-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = min((s8)a.byte[i], (s8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 8-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = min((u8)a.byte[i], (u8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 16-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = min((s16)a.half[i], (s16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 16-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = min((u16)a.half[i], (u16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 32-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = min((s32)a.word[i], (s32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 32-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = min((u32)a.word[i], (u32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 64-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = min((s64)a.dword[i], (s64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmin_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmin_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmin.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 64-bit elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = min((u64)a.dword[i], (u64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmini.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 8-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = min((s8)a.byte[i], (s8)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_bu (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmini_bu (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmini.bu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 8-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = min((u8)a.byte[i], (u8)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmini.h vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 16-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = min((s16)a.half[i], (s16)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_hu (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmini_hu (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmini.hu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 16-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = min((u16)a.half[i], (u16)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmini.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 32-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = min((s32)a.word[i], (s32)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_wu (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmini_wu (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmini.wu vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 32-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = min((u32)a.word[i], (u32)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm)

+

Synopsis

+
__m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm)
+#include <lsxintrin.h>
+Instruction: vmini.d vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for signed 64-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = min((s64)a.dword[i], (s64)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmini_du (__m128i a, imm_0_31 imm)

+

Synopsis

+
__m128i __lsx_vmini_du (__m128i a, imm_0_31 imm)
+#include <lsxintrin.h>
+Instruction: vmini.du vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute elementwise minimum for unsigned 64-bit elements in a and imm.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = min((u64)a.dword[i], (u64)imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual signed 8-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] % (s8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual unsigned 8-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] % (u8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual signed 16-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] % (s16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual unsigned 16-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] % (u16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual signed 32-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] % (s32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual unsigned 32-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] % (u32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual signed 64-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] % (s64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmod_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmod_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmod.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Modulo residual unsigned 64-bit elements in a by elements in b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] % (u64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmsub.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 8-bit elements in b and c, negate and add elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = -b.byte[i] * c.byte[i] + a.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmsub.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 16-bit elements in b and c, negate and add elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = -b.half[i] * c.half[i] + a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmsub.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 32-bit elements in b and c, negate and add elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = -b.word[i] * c.word[i] + a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vmsub.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 64-bit elements in b and c, negate and add elements in a, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = -b.dword[i] * c.dword[i] + a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply signed 8-bit elements in a and b, save the high 8-bit result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (((s16)(s8)a.byte[i] * (s16)(s8)b.byte[i])) >> 8;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply unsigned 8-bit elements in a and b, save the high 8-bit result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (((u16)(u8)a.byte[i] * (u16)(u8)b.byte[i])) >> 8;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply signed 16-bit elements in a and b, save the high 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (((s32)(s16)a.half[i] * (s32)(s16)b.half[i])) >> 16;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply unsigned 16-bit elements in a and b, save the high 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (((u32)(u16)a.half[i] * (u32)(u16)b.half[i])) >> 16;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply signed 32-bit elements in a and b, save the high 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (((s64)(s32)a.word[i] * (s64)(s32)b.word[i])) >> 32;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply unsigned 32-bit elements in a and b, save the high 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (((u64)(u32)a.word[i] * (u64)(u32)b.word[i])) >> 32;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply signed 64-bit elements in a and b, save the high 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (((s128)(s64)a.dword[i] * (s128)(s64)b.dword[i])) >> 64;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmuh_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmuh_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmuh.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply unsigned 64-bit elements in a and b, save the high 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (((u128)(u64)a.dword[i] * (u128)(u64)b.dword[i])) >> 64;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmul_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmul_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmul.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] * b.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmul_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmul_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmul.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] * b.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmul_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmul_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmul.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] * b.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmul_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmul_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmul.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] * b.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_h_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_h_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 8-bit elements in a and signed elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)(s8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.h.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 8-bit elements in a and unsigned elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i] * (u16)(u8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.h.bu.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 8-bit elements in a and signed elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_w_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_w_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 16-bit elements in a and signed elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)a.half[2 * i] * (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.w.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 16-bit elements in a and unsigned elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i] * (u32)(u16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.w.hu.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 16-bit elements in a and signed elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i] * (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_d_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_d_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 32-bit elements in a and signed elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)a.word[2 * i] * (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.d.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 32-bit elements in a and unsigned elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i] * (u64)(u32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.d.wu.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 32-bit elements in a and signed elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i] * (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_q_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_q_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned signed 64-bit elements in a and signed elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_q_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_q_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.q.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 64-bit elements in a and unsigned elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i] * (u128)(u64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vmulwev.q.du.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Multiply even-positioned unsigned 64-bit elements in a and signed elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 8-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 16-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 32-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 64-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 8-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 16-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 32-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsadd_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsadd_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsadd.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Saturing add the signed 64-bit elements in a and b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsub_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsub_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsub.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract 8-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] - b.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsub_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsub_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsub.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract 16-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] - b.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsub_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsub_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsub.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract 32-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] - b.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsub_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsub_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsub.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract 64-bit elements in a and b, save the result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] - b.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsub_q (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsub_q (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsub.q vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract 128-bit elements in a and b, save the result in dst.

+

Operation

+
dst.qword[0] = a.qword[0] - b.qword[0];
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_h_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_h_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.h.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned signed 8-bit elements in a and signed elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (s16)(s8)a.byte[2 * i] - (s16)(s8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.h.bu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned unsigned 8-bit elements in a and unsigned elements in b, save the 16-bit result in dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (u16)(u8)a.byte[2 * i] - (u16)(u8)b.byte[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_w_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_w_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.w.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned signed 16-bit elements in a and signed elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (s32)(s16)a.half[2 * i] - (s32)(s16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.w.hu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned unsigned 16-bit elements in a and unsigned elements in b, save the 32-bit result in dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (u32)(u16)a.half[2 * i] - (u32)(u16)b.half[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_d_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_d_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.d.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned signed 32-bit elements in a and signed elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (s64)(s32)a.word[2 * i] - (s64)(s32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.d.wu vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned unsigned 32-bit elements in a and unsigned elements in b, save the 64-bit result in dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (u64)(u32)a.word[2 * i] - (u64)(u32)b.word[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_q_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_q_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.q.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned signed 64-bit elements in a and signed elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (s128)(s64)a.dword[2 * i] - (s128)(s64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsubwev_q_du (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsubwev_q_du (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsubwev.q.du vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Subtract even-positioned unsigned 64-bit elements in a and unsigned elements in b, save the 128-bit result in dst.

+

Operation

+
for (int i = 0; i < 1; i++) {
+  dst.qword[i] = (u128)(u64)a.dword[2 * i] - (u128)(u64)b.dword[2 * i];
+}
+
+

Tested on real machine.

+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/logical/index.html b/lsx/logical/index.html new file mode 100644 index 00000000..867cf80e --- /dev/null +++ b/lsx/logical/index.html @@ -0,0 +1,402 @@ + + + + + + + + Logical - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
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Logical

+

__m128i __lsx_vand_v (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vand_v (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vand.v vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute bitwise AND between elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] & b.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vandi_b (__m128i a, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vandi_b (__m128i a, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vandi.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute bitwise AND between elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] & imm;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vandn_v (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vandn_v (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vandn.v vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute bitwise ANDN between elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = b.dword[i] & (~a.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vnor_v (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vnor_v (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vnor.v vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute bitwise NOR between elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ~(a.dword[i] | b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vnori_b (__m128i a, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vnori_b (__m128i a, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vnori.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute bitwise NOR between elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ~(a.byte[i] | imm);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vor_v (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vor_v (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vor.v vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute bitwise OR between elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] | b.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vori_b (__m128i a, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vori_b (__m128i a, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vori.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute bitwise OR between elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] | imm;
+}
+
+

Tested on real machine.

+

__m128i __lsx_vorn_v (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vorn_v (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vorn.v vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute bitwise ORN between elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] | (~b.dword[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vxor_v (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vxor_v (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vxor.v vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Compute bitwise XOR between elements in a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] ^ b.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vxori_b (__m128i a, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vxori_b (__m128i a, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vxori.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute bitwise XOR between elements in a and imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] ^ imm;
+}
+
+

Tested on real machine.

+ +
+
+ +
+
+ +
+ +
+ +
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+ + + + + + + + + diff --git a/lsx/memory/index.html b/lsx/memory/index.html new file mode 100644 index 00000000..dc98930a --- /dev/null +++ b/lsx/memory/index.html @@ -0,0 +1,428 @@ + + + + + + + + Memory Load & Store - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
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+ +

Memory Load & Store

+

__m128i __lsx_vld (void * addr, imm_n2048_2047 offset)

+

Synopsis

+
__m128i __lsx_vld (void * addr, imm_n2048_2047 offset)
+#include <lsxintrin.h>
+Instruction: vld vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Read 128-bit data from memory address addr + offset, save the data into dst.

+

Operation

+
dst = memory_load(128, addr + offset);
+
+

__m128i __lsx_vldx (void * addr, long int offset)

+

Synopsis

+
__m128i __lsx_vldx (void * addr, long int offset);
+#include <lsxintrin.h>
+Instruction: vldx vr, r, r
+CPU Flags: LSX
+
+

Description

+

Read 128-bit data from memory address addr + offset, save the data into dst.

+

Operation

+
dst = memory_load(128, addr + offset);
+
+

__m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset)

+

Synopsis

+
__m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset)
+#include <lsxintrin.h>
+Instruction: vldrepl.b vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Read 8-bit data from memory address addr + (offset << 0), replicate the data to all vector lanes and save into dst.

+

Operation

+
u8 data = memory_load(8, addr + offset);
+for (int i = 0; i < 16; i++) {
+  dst.byte[i] = data;
+}
+
+

__m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset)

+

Synopsis

+
__m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset)
+#include <lsxintrin.h>
+Instruction: vldrepl.h vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Read 16-bit data from memory address addr + (offset << 1), replicate the data to all vector lanes and save into dst.

+

Operation

+
u16 data = memory_load(16, addr + (offset << 1));
+for (int i = 0; i < 8; i++) {
+  dst.half[i] = data;
+}
+
+

__m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset)

+

Synopsis

+
__m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset)
+#include <lsxintrin.h>
+Instruction: vldrepl.w vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Read 32-bit data from memory address addr + (offset << 2), replicate the data to all vector lanes and save into dst.

+

Operation

+
u32 data = memory_load(32, addr + (offset << 2));
+for (int i = 0; i < 4; i++) {
+  dst.word[i] = data;
+}
+
+

__m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset)

+

Synopsis

+
__m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset)
+#include <lsxintrin.h>
+Instruction: vldrepl.d vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Read 64-bit data from memory address addr + (offset << 3), replicate the data to all vector lanes and save into dst.

+

Operation

+
u64 data = memory_load(64, addr + (offset << 3));
+for (int i = 0; i < 2; i++) {
+  dst.dword[i] = data;
+}
+
+

void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)

+

Synopsis

+
void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)
+#include <lsxintrin.h>
+Instruction: vst vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Write 128-bit data in data to memory address addr + offset.

+

Operation

+
memory_store(128, data, addr + offset);
+
+

void __lsx_vstx (__m128i data, void * addr, long int offset)

+

Synopsis

+
void __lsx_vstx (__m128i data, void * addr, long int offset)
+#include <lsxintrin.h>
+Instruction: vstx vr, r, r
+CPU Flags: LSX
+
+

Description

+

Write 128-bit data in data to memory address addr + offset.

+

Operation

+
memory_store(128, data, addr + offset);
+
+

void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane)

+

Synopsis

+
void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane)
+#include <lsxintrin.h>
+Instruction: vstelm.b vr, r, imm, imm
+CPU Flags: LSX
+
+

Description

+

Store the element in data specified by lane to memory address addr + offset.

+

Operation

+
memory_store(8, data.byte[lane], addr + offset);
+
+

void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane)

+

Synopsis

+
void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane)
+#include <lsxintrin.h>
+Instruction: vstelm.h vr, r, imm, imm
+CPU Flags: LSX
+
+

Description

+

Store the element in data specified by lane to memory address addr + offset.

+

Operation

+
memory_store(16, data.half[lane], addr + offset);
+
+

void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane)

+

Synopsis

+
void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane)
+#include <lsxintrin.h>
+Instruction: vstelm.w vr, r, imm, imm
+CPU Flags: LSX
+
+

Description

+

Store the element in data specified by lane to memory address addr + offset.

+

Operation

+
memory_store(32, data.word[lane], addr + offset);
+
+

void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane)

+

Synopsis

+
void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane)
+#include <lsxintrin.h>
+Instruction: vstelm.d vr, r, imm, imm
+CPU Flags: LSX
+
+

Description

+

Store the element in data specified by lane to memory address addr + offset.

+

Operation

+
memory_store(64, data.dword[lane], addr + offset);
+
+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/misc/index.html b/lsx/misc/index.html new file mode 100644 index 00000000..62227d49 --- /dev/null +++ b/lsx/misc/index.html @@ -0,0 +1,1156 @@ + + + + + + + + Misc - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
  • + + +
  • +
  • +
+
+
+
+
+ +

Misc

+

__m128i __lsx_vilvh_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvh_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvh.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 8-bit elements in higher half of a and b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2 + 8] : b.byte[i / 2 + 8];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vilvh_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvh_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvh.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 16-bit elements in higher half of a and b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i % 2 == 1) ? a.half[i / 2 + 4] : b.half[i / 2 + 4];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vilvh_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvh_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvh.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 32-bit elements in higher half of a and b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i % 2 == 1) ? a.word[i / 2 + 2] : b.word[i / 2 + 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vilvh_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvh_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvh.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 64-bit elements in higher half of a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2 + 1] : b.dword[i / 2 + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vilvl_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvl_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvl.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 8-bit elements in lower half of a and b.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2] : b.byte[i / 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vilvl_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvl_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvl.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 16-bit elements in lower half of a and b.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i % 2 == 1) ? a.half[i / 2] : b.half[i / 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vilvl_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvl_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvl.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 32-bit elements in lower half of a and b.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i % 2 == 1) ? a.word[i / 2] : b.word[i / 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vilvl_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vilvl_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vilvl.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Interleave 64-bit elements in lower half of a and b.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2] : b.dword[i / 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_insgr2vr_b (__m128i a, int b, imm0_15 imm)

+

Synopsis

+
__m128i __lsx_insgr2vr_b (__m128i a, int b, imm0_15 imm)
+#include <lsxintrin.h>
+Instruction: vinsgr2vr.b vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Insert 8-bit element into lane indexed imm.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i == imm) ? b : a.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_insgr2vr_h (__m128i a, int b, imm0_7 imm)

+

Synopsis

+
__m128i __lsx_insgr2vr_h (__m128i a, int b, imm0_7 imm)
+#include <lsxintrin.h>
+Instruction: vinsgr2vr.h vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Insert 16-bit element into lane indexed imm.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i == imm) ? b : a.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_insgr2vr_w (__m128i a, int b, imm0_3 imm)

+

Synopsis

+
__m128i __lsx_insgr2vr_w (__m128i a, int b, imm0_3 imm)
+#include <lsxintrin.h>
+Instruction: vinsgr2vr.w vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Insert 32-bit element into lane indexed imm.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i == imm) ? b : a.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_insgr2vr_d (__m128i a, long int b, imm0_1 imm)

+

Synopsis

+
__m128i __lsx_insgr2vr_d (__m128i a, long int b, imm0_1 imm)
+#include <lsxintrin.h>
+Instruction: vinsgr2vr.d vr, r, imm
+CPU Flags: LSX
+
+

Description

+

Insert 64-bit element into lane indexed imm.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i == imm) ? b : a.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackev_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackev_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackev.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack even-positioned 8-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i % 2 == 1) ? a.byte[i - 1] : b.byte[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackev_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackev_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackev.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack even-positioned 16-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i % 2 == 1) ? a.half[i - 1] : b.half[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackev_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackev_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackev.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack even-positioned 32-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i % 2 == 1) ? a.word[i - 1] : b.word[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackev_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackev_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackev.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack even-positioned 64-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i % 2 == 1) ? a.dword[i - 1] : b.dword[i];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackod_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackod_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackod.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack odd-positioned 8-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i % 2 == 1) ? a.byte[i] : b.byte[i + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackod_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackod_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackod.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack odd-positioned 16-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i % 2 == 1) ? a.half[i] : b.half[i + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackod_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackod_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackod.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack odd-positioned 32-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i % 2 == 1) ? a.word[i] : b.word[i + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpackod_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpackod_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpackod.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Collect and pack odd-positioned 64-bit elements in a and b and store dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i % 2 == 1) ? a.dword[i] : b.dword[i + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickev_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickev_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickev.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick even-positioned 8-bit elements in b first, then pick even-positioned 8-bit elements in a.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i < 8) ? b.byte[i * 2] : a.byte[(i - 8) * 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickev_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickev_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickev.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick even-positioned 16-bit elements in b first, then pick even-positioned 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i < 4) ? b.half[i * 2] : a.half[(i - 4) * 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickev_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickev_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickev.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick even-positioned 32-bit elements in b first, then pick even-positioned 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i < 2) ? b.word[i * 2] : a.word[(i - 2) * 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickev_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickev_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickev.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick even-positioned 64-bit elements in b first, then pick even-positioned 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i < 1) ? b.dword[i * 2] : a.dword[(i - 1) * 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickod_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickod_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickod.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick odd-positioned 8-bit elements in b first, then pick odd-positioned 8-bit elements in a.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = (i < 8) ? b.byte[i * 2 + 1] : a.byte[(i - 8) * 2 + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickod_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickod_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickod.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick odd-positioned 16-bit elements in b first, then pick odd-positioned 16-bit elements in a.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (i < 4) ? b.half[i * 2 + 1] : a.half[(i - 4) * 2 + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickod_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickod_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickod.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick odd-positioned 32-bit elements in b first, then pick odd-positioned 32-bit elements in a.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (i < 2) ? b.word[i * 2 + 1] : a.word[(i - 2) * 2 + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vpickod_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vpickod_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vpickod.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Pick odd-positioned 64-bit elements in b first, then pick odd-positioned 64-bit elements in a.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (i < 1) ? b.dword[i * 2 + 1] : a.dword[(i - 1) * 2 + 1];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplve_b (__m128i a, int idx)

+

Synopsis

+
__m128i __lsx_vreplve_b (__m128i a, int idx)
+#include <lsxintrin.h>
+Instruction: vreplve.b vr, vr, r
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[idx % 16];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplve_h (__m128i a, int idx)

+

Synopsis

+
__m128i __lsx_vreplve_h (__m128i a, int idx)
+#include <lsxintrin.h>
+Instruction: vreplve.h vr, vr, r
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[idx % 8];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplve_w (__m128i a, int idx)

+

Synopsis

+
__m128i __lsx_vreplve_w (__m128i a, int idx)
+#include <lsxintrin.h>
+Instruction: vreplve.w vr, vr, r
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[idx % 4];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplve_d (__m128i a, int idx)

+

Synopsis

+
__m128i __lsx_vreplve_d (__m128i a, int idx)
+#include <lsxintrin.h>
+Instruction: vreplve.d vr, vr, r
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[idx % 2];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx)

+

Synopsis

+
__m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx)
+#include <lsxintrin.h>
+Instruction: vreplvei.b vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[idx];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx)

+

Synopsis

+
__m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx)
+#include <lsxintrin.h>
+Instruction: vreplvei.h vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[idx];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx)

+

Synopsis

+
__m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx)
+#include <lsxintrin.h>
+Instruction: vreplvei.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[idx];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx)

+

Synopsis

+
__m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx)
+#include <lsxintrin.h>
+Instruction: vreplvei.d vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Repeat the element in lane idx of a to whole vector.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[idx];
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsigncov_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsigncov_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsigncov.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

If the 8-bit element in a equals to zero, set the result to zero. If the signed 8-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] =
+      (a.byte[i] == 0) ? 0 : ((s8)a.byte[i] > 0 ? b.byte[i] : -b.byte[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsigncov_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsigncov_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsigncov.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

If the 16-bit element in a equals to zero, set the result to zero. If the signed 16-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] =
+      (a.half[i] == 0) ? 0 : ((s16)a.half[i] > 0 ? b.half[i] : -b.half[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsigncov_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsigncov_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsigncov.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

If the 32-bit element in a equals to zero, set the result to zero. If the signed 32-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] =
+      (a.word[i] == 0) ? 0 : ((s32)a.word[i] > 0 ? b.word[i] : -b.word[i]);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsigncov_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsigncov_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsigncov.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

If the 64-bit element in a equals to zero, set the result to zero. If the signed 64-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] =
+      (a.dword[i] == 0) ? 0 : ((s64)a.dword[i] > 0 ? b.dword[i] : -b.dword[i]);
+}
+
+

Tested on real machine.

+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/permutation/index.html b/lsx/permutation/index.html new file mode 100644 index 00000000..dfe4a5a7 --- /dev/null +++ b/lsx/permutation/index.html @@ -0,0 +1,177 @@ + + + + + + + + Permutation - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
  • + + +
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+
+
+
+
+ +

Permutation

+

__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)

+

Synopsis

+
__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)
+#include <lsxintrin.h>
+Instruction: vpermi.w vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Permute words from a and b with indices recorded in imm and store into dst.

+

Operation

+
dst.word[0] = b.word[imm & 0x3];
+dst.word[1] = b.word[(imm >> 2) & 0x3];
+dst.word[2] = a.word[(imm >> 4) & 0x3];
+dst.word[3] = a.word[(imm >> 6) & 0x3];
+
+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/shift/index.html b/lsx/shift/index.html new file mode 100644 index 00000000..a691ab24 --- /dev/null +++ b/lsx/shift/index.html @@ -0,0 +1,842 @@ + + + + + + + + Shift - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
    +
  • + + +
  • +
  • +
+
+
+
+
+ +

Shift

+

__m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vbsll.v vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute 128-bit a shifted left by imm * 8 bits.

+

Operation

+
int shift = (imm * 8) % 128;
+dst.qword[0] = (u128)a.qword[0] << shift;
+
+

__m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm)

+

Synopsis

+
__m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm)
+#include <lsxintrin.h>
+Instruction: vbsrl.v vr, vr, imm
+CPU Flags: LSX
+
+

Description

+

Compute 128-bit a shifted right by imm * 8 bits.

+

Operation

+
int shift = (imm * 8) % 128;
+dst.qword[0] = (u128)a.qword[0] >> shift;
+
+

__m128i __lsx_vsll_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsll_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsll.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical left shift the unsigned 8-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] << (b.byte[i] & 0x7);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsll_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsll_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsll.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical left shift the unsigned 16-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] << (b.half[i] & 0xf);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsll_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsll_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsll.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical left shift the unsigned 32-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] << (b.word[i] & 0x1f);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsll_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsll_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsll.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical left shift the unsigned 64-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] << (b.dword[i] & 0x3f);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrl_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrl_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrl.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift the unsigned 8-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = a.byte[i] >> (b.byte[i] & 0x7);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrl_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrl_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrl.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift the unsigned 16-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = a.half[i] >> (b.half[i] & 0xf);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrl_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrl_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrl.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift the unsigned 32-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = a.word[i] >> (b.word[i] & 0x1f);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrl_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrl_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrl.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift the unsigned 64-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = a.dword[i] >> (b.dword[i] & 0x3f);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrlr_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrlr_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrlr.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift (with rounding) the unsigned 8-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  if ((b.byte[i] & 0x7) == 0) {
+    dst.byte[i] = a.byte[i];
+  } else {
+    dst.byte[i] = (a.byte[i] >> (b.byte[i] & 0x7)) +
+                  ((a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrlr_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrlr_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrlr.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift (with rounding) the unsigned 16-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  if ((b.half[i] & 0xf) == 0) {
+    dst.half[i] = a.half[i];
+  } else {
+    dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) +
+                  ((a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrlr_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrlr_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrlr.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift (with rounding) the unsigned 32-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  if ((b.word[i] & 0x1f) == 0) {
+    dst.word[i] = a.word[i];
+  } else {
+    dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) +
+                  ((a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrlr_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrlr_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrlr.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Logical right shift (with rounding) the unsigned 64-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  if ((b.dword[i] & 0x3f) == 0) {
+    dst.dword[i] = a.dword[i];
+  } else {
+    dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) +
+                   ((a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsra_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsra_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsra.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift the signed 8-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] = ((s8)a.byte[i]) >> (b.byte[i] & 0x7);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsra_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsra_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsra.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift the signed 16-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = ((s16)a.half[i]) >> (b.half[i] & 0xf);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsra_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsra_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsra.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift the signed 32-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = ((s32)a.word[i]) >> (b.word[i] & 0x1f);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsra_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsra_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsra.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift the signed 64-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = ((s64)a.dword[i]) >> (b.dword[i] & 0x3f);
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrar_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrar_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrar.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift (with rounding) the signed 8-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  if ((b.byte[i] & 0x7) == 0) {
+    dst.byte[i] = a.byte[i];
+  } else {
+    dst.byte[i] = ((s8)a.byte[i] >> (b.byte[i] & 0x7)) +
+                  (((s8)a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrar_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrar_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrar.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift (with rounding) the signed 16-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  if ((b.half[i] & 0xf) == 0) {
+    dst.half[i] = a.half[i];
+  } else {
+    dst.half[i] = ((s16)a.half[i] >> (b.half[i] & 0xf)) +
+                  (((s16)a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrar_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrar_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrar.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift (with rounding) the signed 32-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  if ((b.word[i] & 0x1f) == 0) {
+    dst.word[i] = a.word[i];
+  } else {
+    dst.word[i] = ((s32)a.word[i] >> (b.word[i] & 0x1f)) +
+                  (((s32)a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vsrar_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vsrar_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vsrar.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Arithmetic right shift (with rounding) the signed 64-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  if ((b.dword[i] & 0x3f) == 0) {
+    dst.dword[i] = a.dword[i];
+  } else {
+    dst.dword[i] = ((s64)a.dword[i] >> (b.dword[i] & 0x3f)) +
+                   (((s64)a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1);
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vrotr_b (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vrotr_b (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vrotr.b vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Rotate right the unsigned 8-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  dst.byte[i] =
+      (a.byte[i] >> (b.byte[i] & 0x7)) | (a.byte[i] << (8 - (b.byte[i] & 0x7)));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vrotr_h (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vrotr_h (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vrotr.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Rotate right the unsigned 16-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) |
+                (a.half[i] << (16 - (b.half[i] & 0xf)));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vrotr_w (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vrotr_w (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vrotr.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Rotate right the unsigned 32-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) |
+                (a.word[i] << (32 - (b.word[i] & 0x1f)));
+}
+
+

Tested on real machine.

+

__m128i __lsx_vrotr_d (__m128i a, __m128i b)

+

Synopsis

+
__m128i __lsx_vrotr_d (__m128i a, __m128i b)
+#include <lsxintrin.h>
+Instruction: vrotr.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Rotate right the unsigned 64-bit elements in a by elements in b, store the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) |
+                 (a.dword[i] << (64 - (b.dword[i] & 0x3f)));
+}
+
+

Tested on real machine.

+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + Next » + + +
+ + + + + + + + + diff --git a/lsx/shuffling/index.html b/lsx/shuffling/index.html new file mode 100644 index 00000000..e1c1a78f --- /dev/null +++ b/lsx/shuffling/index.html @@ -0,0 +1,277 @@ + + + + + + + + Shuffling - Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + + + +
+ + +
+ +
+
+
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+
+
+
+ +

Shuffling

+

__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vshuf.b vr, vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Shuffle bytes from a and b with indices from c.

+

Caveat: the indices are placed in c, while in other vshuf intrinsics they are placed in a.

+

Operation

+
for (int i = 0; i < 16; i++) {
+  if (c.byte[i] >= 64 && MACHINE_3C5000) {
+    // Caveat: observed in 3C5000
+    dst.byte[i] = 0;
+  } else if ((c.byte[i] % 32) < 16) {
+    dst.byte[i] = b.byte[c.byte[i] % 16];
+  } else {
+    dst.byte[i] = a.byte[c.byte[i] % 16];
+  }
+}
+
+

__m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vshuf.h vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Shuffle 16-bit elements in b and c with indices from a, save the result to dst.

+

Operation

+
for (int i = 0; i < 8; i++) {
+  if ((a.half[i] % 256) >= 64 && MACHINE_3C5000) {
+    // Caveat: observed in 3C5000
+    dst.half[i] = 0;
+  } else if ((a.half[i] % 16) < 8) {
+    dst.half[i] = c.half[a.half[i] % 8];
+  } else {
+    dst.half[i] = b.half[a.half[i] % 8];
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vshuf.w vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Shuffle 32-bit elements in b and c with indices from a, save the result to dst.

+

Operation

+
for (int i = 0; i < 4; i++) {
+  if ((a.word[i] % 256) >= 64 && MACHINE_3C5000) {
+    // Caveat: observed in 3C5000
+    dst.word[i] = 0;
+  } else if ((a.word[i] % 8) < 4) {
+    dst.word[i] = c.word[a.word[i] % 4];
+  } else {
+    dst.word[i] = b.word[a.word[i] % 4];
+  }
+}
+
+

Tested on real machine.

+

__m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c)

+

Synopsis

+
__m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c)
+#include <lsxintrin.h>
+Instruction: vshuf.d vr, vr, vr
+CPU Flags: LSX
+
+

Description

+

Shuffle 64-bit elements in b and c with indices from a, save the result to dst.

+

Operation

+
for (int i = 0; i < 2; i++) {
+  if ((a.dword[i] % 256) >= 64 && MACHINE_3C5000) {
+    // Caveat: observed in 3C5000
+    dst.dword[i] = 0;
+  } else if ((a.dword[i] % 4) < 2) {
+    dst.dword[i] = c.dword[a.dword[i] % 2];
+  } else {
+    dst.dword[i] = b.dword[a.dword[i] % 2];
+  }
+}
+
+

Tested on real machine.

+ +
+
+ +
+
+ +
+ +
+ +
+ + + + « Previous + + + +
+ + + + + + + + + diff --git a/search.html b/search.html new file mode 100644 index 00000000..16d2f421 --- /dev/null +++ b/search.html @@ -0,0 +1,144 @@ + + + + + + + + Unofficial LoongArch Intrinsics Guide + + + + + + + + + + + +
+ + +
+ +
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+
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Search Results

+ + + +
+ Searching... +
+ + +
+
+ +
+
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+ +
+ +
+ + + + + +
+ + + + + + + + + diff --git a/search/lunr.js b/search/lunr.js new file mode 100644 index 00000000..aca0a167 --- /dev/null +++ b/search/lunr.js @@ -0,0 +1,3475 @@ +/** + * lunr - http://lunrjs.com - A bit like Solr, but much smaller and not as bright - 2.3.9 + * Copyright (C) 2020 Oliver Nightingale + * @license MIT + */ + +;(function(){ + +/** + * A convenience function for configuring and constructing + * a new lunr Index. + * + * A lunr.Builder instance is created and the pipeline setup + * with a trimmer, stop word filter and stemmer. + * + * This builder object is yielded to the configuration function + * that is passed as a parameter, allowing the list of fields + * and other builder parameters to be customised. + * + * All documents _must_ be added within the passed config function. + * + * @example + * var idx = lunr(function () { + * this.field('title') + * this.field('body') + * this.ref('id') + * + * documents.forEach(function (doc) { + * this.add(doc) + * }, this) + * }) + * + * @see {@link lunr.Builder} + * @see {@link lunr.Pipeline} + * @see {@link lunr.trimmer} + * @see {@link lunr.stopWordFilter} + * @see {@link lunr.stemmer} + * @namespace {function} lunr + */ +var lunr = function (config) { + var builder = new lunr.Builder + + builder.pipeline.add( + lunr.trimmer, + lunr.stopWordFilter, + lunr.stemmer + ) + + builder.searchPipeline.add( + lunr.stemmer + ) + + config.call(builder, builder) + return builder.build() +} + +lunr.version = "2.3.9" +/*! + * lunr.utils + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A namespace containing utils for the rest of the lunr library + * @namespace lunr.utils + */ +lunr.utils = {} + +/** + * Print a warning message to the console. + * + * @param {String} message The message to be printed. + * @memberOf lunr.utils + * @function + */ +lunr.utils.warn = (function (global) { + /* eslint-disable no-console */ + return function (message) { + if (global.console && console.warn) { + console.warn(message) + } + } + /* eslint-enable no-console */ +})(this) + +/** + * Convert an object to a string. + * + * In the case of `null` and `undefined` the function returns + * the empty string, in all other cases the result of calling + * `toString` on the passed object is returned. + * + * @param {Any} obj The object to convert to a string. + * @return {String} string representation of the passed object. + * @memberOf lunr.utils + */ +lunr.utils.asString = function (obj) { + if (obj === void 0 || obj === null) { + return "" + } else { + return obj.toString() + } +} + +/** + * Clones an object. + * + * Will create a copy of an existing object such that any mutations + * on the copy cannot affect the original. + * + * Only shallow objects are supported, passing a nested object to this + * function will cause a TypeError. + * + * Objects with primitives, and arrays of primitives are supported. + * + * @param {Object} obj The object to clone. + * @return {Object} a clone of the passed object. + * @throws {TypeError} when a nested object is passed. + * @memberOf Utils + */ +lunr.utils.clone = function (obj) { + if (obj === null || obj === undefined) { + return obj + } + + var clone = Object.create(null), + keys = Object.keys(obj) + + for (var i = 0; i < keys.length; i++) { + var key = keys[i], + val = obj[key] + + if (Array.isArray(val)) { + clone[key] = val.slice() + continue + } + + if (typeof val === 'string' || + typeof val === 'number' || + typeof val === 'boolean') { + clone[key] = val + continue + } + + throw new TypeError("clone is not deep and does not support nested objects") + } + + return clone +} +lunr.FieldRef = function (docRef, fieldName, stringValue) { + this.docRef = docRef + this.fieldName = fieldName + this._stringValue = stringValue +} + +lunr.FieldRef.joiner = "/" + +lunr.FieldRef.fromString = function (s) { + var n = s.indexOf(lunr.FieldRef.joiner) + + if (n === -1) { + throw "malformed field ref string" + } + + var fieldRef = s.slice(0, n), + docRef = s.slice(n + 1) + + return new lunr.FieldRef (docRef, fieldRef, s) +} + +lunr.FieldRef.prototype.toString = function () { + if (this._stringValue == undefined) { + this._stringValue = this.fieldName + lunr.FieldRef.joiner + this.docRef + } + + return this._stringValue +} +/*! + * lunr.Set + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A lunr set. + * + * @constructor + */ +lunr.Set = function (elements) { + this.elements = Object.create(null) + + if (elements) { + this.length = elements.length + + for (var i = 0; i < this.length; i++) { + this.elements[elements[i]] = true + } + } else { + this.length = 0 + } +} + +/** + * A complete set that contains all elements. + * + * @static + * @readonly + * @type {lunr.Set} + */ +lunr.Set.complete = { + intersect: function (other) { + return other + }, + + union: function () { + return this + }, + + contains: function () { + return true + } +} + +/** + * An empty set that contains no elements. + * + * @static + * @readonly + * @type {lunr.Set} + */ +lunr.Set.empty = { + intersect: function () { + return this + }, + + union: function (other) { + return other + }, + + contains: function () { + return false + } +} + +/** + * Returns true if this set contains the specified object. + * + * @param {object} object - Object whose presence in this set is to be tested. + * @returns {boolean} - True if this set contains the specified object. + */ +lunr.Set.prototype.contains = function (object) { + return !!this.elements[object] +} + +/** + * Returns a new set containing only the elements that are present in both + * this set and the specified set. + * + * @param {lunr.Set} other - set to intersect with this set. + * @returns {lunr.Set} a new set that is the intersection of this and the specified set. + */ + +lunr.Set.prototype.intersect = function (other) { + var a, b, elements, intersection = [] + + if (other === lunr.Set.complete) { + return this + } + + if (other === lunr.Set.empty) { + return other + } + + if (this.length < other.length) { + a = this + b = other + } else { + a = other + b = this + } + + elements = Object.keys(a.elements) + + for (var i = 0; i < elements.length; i++) { + var element = elements[i] + if (element in b.elements) { + intersection.push(element) + } + } + + return new lunr.Set (intersection) +} + +/** + * Returns a new set combining the elements of this and the specified set. + * + * @param {lunr.Set} other - set to union with this set. + * @return {lunr.Set} a new set that is the union of this and the specified set. + */ + +lunr.Set.prototype.union = function (other) { + if (other === lunr.Set.complete) { + return lunr.Set.complete + } + + if (other === lunr.Set.empty) { + return this + } + + return new lunr.Set(Object.keys(this.elements).concat(Object.keys(other.elements))) +} +/** + * A function to calculate the inverse document frequency for + * a posting. This is shared between the builder and the index + * + * @private + * @param {object} posting - The posting for a given term + * @param {number} documentCount - The total number of documents. + */ +lunr.idf = function (posting, documentCount) { + var documentsWithTerm = 0 + + for (var fieldName in posting) { + if (fieldName == '_index') continue // Ignore the term index, its not a field + documentsWithTerm += Object.keys(posting[fieldName]).length + } + + var x = (documentCount - documentsWithTerm + 0.5) / (documentsWithTerm + 0.5) + + return Math.log(1 + Math.abs(x)) +} + +/** + * A token wraps a string representation of a token + * as it is passed through the text processing pipeline. + * + * @constructor + * @param {string} [str=''] - The string token being wrapped. + * @param {object} [metadata={}] - Metadata associated with this token. + */ +lunr.Token = function (str, metadata) { + this.str = str || "" + this.metadata = metadata || {} +} + +/** + * Returns the token string that is being wrapped by this object. + * + * @returns {string} + */ +lunr.Token.prototype.toString = function () { + return this.str +} + +/** + * A token update function is used when updating or optionally + * when cloning a token. + * + * @callback lunr.Token~updateFunction + * @param {string} str - The string representation of the token. + * @param {Object} metadata - All metadata associated with this token. + */ + +/** + * Applies the given function to the wrapped string token. + * + * @example + * token.update(function (str, metadata) { + * return str.toUpperCase() + * }) + * + * @param {lunr.Token~updateFunction} fn - A function to apply to the token string. + * @returns {lunr.Token} + */ +lunr.Token.prototype.update = function (fn) { + this.str = fn(this.str, this.metadata) + return this +} + +/** + * Creates a clone of this token. Optionally a function can be + * applied to the cloned token. + * + * @param {lunr.Token~updateFunction} [fn] - An optional function to apply to the cloned token. + * @returns {lunr.Token} + */ +lunr.Token.prototype.clone = function (fn) { + fn = fn || function (s) { return s } + return new lunr.Token (fn(this.str, this.metadata), this.metadata) +} +/*! + * lunr.tokenizer + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A function for splitting a string into tokens ready to be inserted into + * the search index. Uses `lunr.tokenizer.separator` to split strings, change + * the value of this property to change how strings are split into tokens. + * + * This tokenizer will convert its parameter to a string by calling `toString` and + * then will split this string on the character in `lunr.tokenizer.separator`. + * Arrays will have their elements converted to strings and wrapped in a lunr.Token. + * + * Optional metadata can be passed to the tokenizer, this metadata will be cloned and + * added as metadata to every token that is created from the object to be tokenized. + * + * @static + * @param {?(string|object|object[])} obj - The object to convert into tokens + * @param {?object} metadata - Optional metadata to associate with every token + * @returns {lunr.Token[]} + * @see {@link lunr.Pipeline} + */ +lunr.tokenizer = function (obj, metadata) { + if (obj == null || obj == undefined) { + return [] + } + + if (Array.isArray(obj)) { + return obj.map(function (t) { + return new lunr.Token( + lunr.utils.asString(t).toLowerCase(), + lunr.utils.clone(metadata) + ) + }) + } + + var str = obj.toString().toLowerCase(), + len = str.length, + tokens = [] + + for (var sliceEnd = 0, sliceStart = 0; sliceEnd <= len; sliceEnd++) { + var char = str.charAt(sliceEnd), + sliceLength = sliceEnd - sliceStart + + if ((char.match(lunr.tokenizer.separator) || sliceEnd == len)) { + + if (sliceLength > 0) { + var tokenMetadata = lunr.utils.clone(metadata) || {} + tokenMetadata["position"] = [sliceStart, sliceLength] + tokenMetadata["index"] = tokens.length + + tokens.push( + new lunr.Token ( + str.slice(sliceStart, sliceEnd), + tokenMetadata + ) + ) + } + + sliceStart = sliceEnd + 1 + } + + } + + return tokens +} + +/** + * The separator used to split a string into tokens. Override this property to change the behaviour of + * `lunr.tokenizer` behaviour when tokenizing strings. By default this splits on whitespace and hyphens. + * + * @static + * @see lunr.tokenizer + */ +lunr.tokenizer.separator = /[\s\-]+/ +/*! + * lunr.Pipeline + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.Pipelines maintain an ordered list of functions to be applied to all + * tokens in documents entering the search index and queries being ran against + * the index. + * + * An instance of lunr.Index created with the lunr shortcut will contain a + * pipeline with a stop word filter and an English language stemmer. Extra + * functions can be added before or after either of these functions or these + * default functions can be removed. + * + * When run the pipeline will call each function in turn, passing a token, the + * index of that token in the original list of all tokens and finally a list of + * all the original tokens. + * + * The output of functions in the pipeline will be passed to the next function + * in the pipeline. To exclude a token from entering the index the function + * should return undefined, the rest of the pipeline will not be called with + * this token. + * + * For serialisation of pipelines to work, all functions used in an instance of + * a pipeline should be registered with lunr.Pipeline. Registered functions can + * then be loaded. If trying to load a serialised pipeline that uses functions + * that are not registered an error will be thrown. + * + * If not planning on serialising the pipeline then registering pipeline functions + * is not necessary. + * + * @constructor + */ +lunr.Pipeline = function () { + this._stack = [] +} + +lunr.Pipeline.registeredFunctions = Object.create(null) + +/** + * A pipeline function maps lunr.Token to lunr.Token. A lunr.Token contains the token + * string as well as all known metadata. A pipeline function can mutate the token string + * or mutate (or add) metadata for a given token. + * + * A pipeline function can indicate that the passed token should be discarded by returning + * null, undefined or an empty string. This token will not be passed to any downstream pipeline + * functions and will not be added to the index. + * + * Multiple tokens can be returned by returning an array of tokens. Each token will be passed + * to any downstream pipeline functions and all will returned tokens will be added to the index. + * + * Any number of pipeline functions may be chained together using a lunr.Pipeline. + * + * @interface lunr.PipelineFunction + * @param {lunr.Token} token - A token from the document being processed. + * @param {number} i - The index of this token in the complete list of tokens for this document/field. + * @param {lunr.Token[]} tokens - All tokens for this document/field. + * @returns {(?lunr.Token|lunr.Token[])} + */ + +/** + * Register a function with the pipeline. + * + * Functions that are used in the pipeline should be registered if the pipeline + * needs to be serialised, or a serialised pipeline needs to be loaded. + * + * Registering a function does not add it to a pipeline, functions must still be + * added to instances of the pipeline for them to be used when running a pipeline. + * + * @param {lunr.PipelineFunction} fn - The function to check for. + * @param {String} label - The label to register this function with + */ +lunr.Pipeline.registerFunction = function (fn, label) { + if (label in this.registeredFunctions) { + lunr.utils.warn('Overwriting existing registered function: ' + label) + } + + fn.label = label + lunr.Pipeline.registeredFunctions[fn.label] = fn +} + +/** + * Warns if the function is not registered as a Pipeline function. + * + * @param {lunr.PipelineFunction} fn - The function to check for. + * @private + */ +lunr.Pipeline.warnIfFunctionNotRegistered = function (fn) { + var isRegistered = fn.label && (fn.label in this.registeredFunctions) + + if (!isRegistered) { + lunr.utils.warn('Function is not registered with pipeline. This may cause problems when serialising the index.\n', fn) + } +} + +/** + * Loads a previously serialised pipeline. + * + * All functions to be loaded must already be registered with lunr.Pipeline. + * If any function from the serialised data has not been registered then an + * error will be thrown. + * + * @param {Object} serialised - The serialised pipeline to load. + * @returns {lunr.Pipeline} + */ +lunr.Pipeline.load = function (serialised) { + var pipeline = new lunr.Pipeline + + serialised.forEach(function (fnName) { + var fn = lunr.Pipeline.registeredFunctions[fnName] + + if (fn) { + pipeline.add(fn) + } else { + throw new Error('Cannot load unregistered function: ' + fnName) + } + }) + + return pipeline +} + +/** + * Adds new functions to the end of the pipeline. + * + * Logs a warning if the function has not been registered. + * + * @param {lunr.PipelineFunction[]} functions - Any number of functions to add to the pipeline. + */ +lunr.Pipeline.prototype.add = function () { + var fns = Array.prototype.slice.call(arguments) + + fns.forEach(function (fn) { + lunr.Pipeline.warnIfFunctionNotRegistered(fn) + this._stack.push(fn) + }, this) +} + +/** + * Adds a single function after a function that already exists in the + * pipeline. + * + * Logs a warning if the function has not been registered. + * + * @param {lunr.PipelineFunction} existingFn - A function that already exists in the pipeline. + * @param {lunr.PipelineFunction} newFn - The new function to add to the pipeline. + */ +lunr.Pipeline.prototype.after = function (existingFn, newFn) { + lunr.Pipeline.warnIfFunctionNotRegistered(newFn) + + var pos = this._stack.indexOf(existingFn) + if (pos == -1) { + throw new Error('Cannot find existingFn') + } + + pos = pos + 1 + this._stack.splice(pos, 0, newFn) +} + +/** + * Adds a single function before a function that already exists in the + * pipeline. + * + * Logs a warning if the function has not been registered. + * + * @param {lunr.PipelineFunction} existingFn - A function that already exists in the pipeline. + * @param {lunr.PipelineFunction} newFn - The new function to add to the pipeline. + */ +lunr.Pipeline.prototype.before = function (existingFn, newFn) { + lunr.Pipeline.warnIfFunctionNotRegistered(newFn) + + var pos = this._stack.indexOf(existingFn) + if (pos == -1) { + throw new Error('Cannot find existingFn') + } + + this._stack.splice(pos, 0, newFn) +} + +/** + * Removes a function from the pipeline. + * + * @param {lunr.PipelineFunction} fn The function to remove from the pipeline. + */ +lunr.Pipeline.prototype.remove = function (fn) { + var pos = this._stack.indexOf(fn) + if (pos == -1) { + return + } + + this._stack.splice(pos, 1) +} + +/** + * Runs the current list of functions that make up the pipeline against the + * passed tokens. + * + * @param {Array} tokens The tokens to run through the pipeline. + * @returns {Array} + */ +lunr.Pipeline.prototype.run = function (tokens) { + var stackLength = this._stack.length + + for (var i = 0; i < stackLength; i++) { + var fn = this._stack[i] + var memo = [] + + for (var j = 0; j < tokens.length; j++) { + var result = fn(tokens[j], j, tokens) + + if (result === null || result === void 0 || result === '') continue + + if (Array.isArray(result)) { + for (var k = 0; k < result.length; k++) { + memo.push(result[k]) + } + } else { + memo.push(result) + } + } + + tokens = memo + } + + return tokens +} + +/** + * Convenience method for passing a string through a pipeline and getting + * strings out. This method takes care of wrapping the passed string in a + * token and mapping the resulting tokens back to strings. + * + * @param {string} str - The string to pass through the pipeline. + * @param {?object} metadata - Optional metadata to associate with the token + * passed to the pipeline. + * @returns {string[]} + */ +lunr.Pipeline.prototype.runString = function (str, metadata) { + var token = new lunr.Token (str, metadata) + + return this.run([token]).map(function (t) { + return t.toString() + }) +} + +/** + * Resets the pipeline by removing any existing processors. + * + */ +lunr.Pipeline.prototype.reset = function () { + this._stack = [] +} + +/** + * Returns a representation of the pipeline ready for serialisation. + * + * Logs a warning if the function has not been registered. + * + * @returns {Array} + */ +lunr.Pipeline.prototype.toJSON = function () { + return this._stack.map(function (fn) { + lunr.Pipeline.warnIfFunctionNotRegistered(fn) + + return fn.label + }) +} +/*! + * lunr.Vector + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A vector is used to construct the vector space of documents and queries. These + * vectors support operations to determine the similarity between two documents or + * a document and a query. + * + * Normally no parameters are required for initializing a vector, but in the case of + * loading a previously dumped vector the raw elements can be provided to the constructor. + * + * For performance reasons vectors are implemented with a flat array, where an elements + * index is immediately followed by its value. E.g. [index, value, index, value]. This + * allows the underlying array to be as sparse as possible and still offer decent + * performance when being used for vector calculations. + * + * @constructor + * @param {Number[]} [elements] - The flat list of element index and element value pairs. + */ +lunr.Vector = function (elements) { + this._magnitude = 0 + this.elements = elements || [] +} + + +/** + * Calculates the position within the vector to insert a given index. + * + * This is used internally by insert and upsert. If there are duplicate indexes then + * the position is returned as if the value for that index were to be updated, but it + * is the callers responsibility to check whether there is a duplicate at that index + * + * @param {Number} insertIdx - The index at which the element should be inserted. + * @returns {Number} + */ +lunr.Vector.prototype.positionForIndex = function (index) { + // For an empty vector the tuple can be inserted at the beginning + if (this.elements.length == 0) { + return 0 + } + + var start = 0, + end = this.elements.length / 2, + sliceLength = end - start, + pivotPoint = Math.floor(sliceLength / 2), + pivotIndex = this.elements[pivotPoint * 2] + + while (sliceLength > 1) { + if (pivotIndex < index) { + start = pivotPoint + } + + if (pivotIndex > index) { + end = pivotPoint + } + + if (pivotIndex == index) { + break + } + + sliceLength = end - start + pivotPoint = start + Math.floor(sliceLength / 2) + pivotIndex = this.elements[pivotPoint * 2] + } + + if (pivotIndex == index) { + return pivotPoint * 2 + } + + if (pivotIndex > index) { + return pivotPoint * 2 + } + + if (pivotIndex < index) { + return (pivotPoint + 1) * 2 + } +} + +/** + * Inserts an element at an index within the vector. + * + * Does not allow duplicates, will throw an error if there is already an entry + * for this index. + * + * @param {Number} insertIdx - The index at which the element should be inserted. + * @param {Number} val - The value to be inserted into the vector. + */ +lunr.Vector.prototype.insert = function (insertIdx, val) { + this.upsert(insertIdx, val, function () { + throw "duplicate index" + }) +} + +/** + * Inserts or updates an existing index within the vector. + * + * @param {Number} insertIdx - The index at which the element should be inserted. + * @param {Number} val - The value to be inserted into the vector. + * @param {function} fn - A function that is called for updates, the existing value and the + * requested value are passed as arguments + */ +lunr.Vector.prototype.upsert = function (insertIdx, val, fn) { + this._magnitude = 0 + var position = this.positionForIndex(insertIdx) + + if (this.elements[position] == insertIdx) { + this.elements[position + 1] = fn(this.elements[position + 1], val) + } else { + this.elements.splice(position, 0, insertIdx, val) + } +} + +/** + * Calculates the magnitude of this vector. + * + * @returns {Number} + */ +lunr.Vector.prototype.magnitude = function () { + if (this._magnitude) return this._magnitude + + var sumOfSquares = 0, + elementsLength = this.elements.length + + for (var i = 1; i < elementsLength; i += 2) { + var val = this.elements[i] + sumOfSquares += val * val + } + + return this._magnitude = Math.sqrt(sumOfSquares) +} + +/** + * Calculates the dot product of this vector and another vector. + * + * @param {lunr.Vector} otherVector - The vector to compute the dot product with. + * @returns {Number} + */ +lunr.Vector.prototype.dot = function (otherVector) { + var dotProduct = 0, + a = this.elements, b = otherVector.elements, + aLen = a.length, bLen = b.length, + aVal = 0, bVal = 0, + i = 0, j = 0 + + while (i < aLen && j < bLen) { + aVal = a[i], bVal = b[j] + if (aVal < bVal) { + i += 2 + } else if (aVal > bVal) { + j += 2 + } else if (aVal == bVal) { + dotProduct += a[i + 1] * b[j + 1] + i += 2 + j += 2 + } + } + + return dotProduct +} + +/** + * Calculates the similarity between this vector and another vector. + * + * @param {lunr.Vector} otherVector - The other vector to calculate the + * similarity with. + * @returns {Number} + */ +lunr.Vector.prototype.similarity = function (otherVector) { + return this.dot(otherVector) / this.magnitude() || 0 +} + +/** + * Converts the vector to an array of the elements within the vector. + * + * @returns {Number[]} + */ +lunr.Vector.prototype.toArray = function () { + var output = new Array (this.elements.length / 2) + + for (var i = 1, j = 0; i < this.elements.length; i += 2, j++) { + output[j] = this.elements[i] + } + + return output +} + +/** + * A JSON serializable representation of the vector. + * + * @returns {Number[]} + */ +lunr.Vector.prototype.toJSON = function () { + return this.elements +} +/* eslint-disable */ +/*! + * lunr.stemmer + * Copyright (C) 2020 Oliver Nightingale + * Includes code from - http://tartarus.org/~martin/PorterStemmer/js.txt + */ + +/** + * lunr.stemmer is an english language stemmer, this is a JavaScript + * implementation of the PorterStemmer taken from http://tartarus.org/~martin + * + * @static + * @implements {lunr.PipelineFunction} + * @param {lunr.Token} token - The string to stem + * @returns {lunr.Token} + * @see {@link lunr.Pipeline} + * @function + */ +lunr.stemmer = (function(){ + var step2list = { + "ational" : "ate", + "tional" : "tion", + "enci" : "ence", + "anci" : "ance", + "izer" : "ize", + "bli" : "ble", + "alli" : "al", + "entli" : "ent", + "eli" : "e", + "ousli" : "ous", + "ization" : "ize", + "ation" : "ate", + "ator" : "ate", + "alism" : "al", + "iveness" : "ive", + "fulness" : "ful", + "ousness" : "ous", + "aliti" : "al", + "iviti" : "ive", + "biliti" : "ble", + "logi" : "log" + }, + + step3list = { + "icate" : "ic", + "ative" : "", + "alize" : "al", + "iciti" : "ic", + "ical" : "ic", + "ful" : "", + "ness" : "" + }, + + c = "[^aeiou]", // consonant + v = "[aeiouy]", // vowel + C = c + "[^aeiouy]*", // consonant sequence + V = v + "[aeiou]*", // vowel sequence + + mgr0 = "^(" + C + ")?" + V + C, // [C]VC... is m>0 + meq1 = "^(" + C + ")?" + V + C + "(" + V + ")?$", // [C]VC[V] is m=1 + mgr1 = "^(" + C + ")?" + V + C + V + C, // [C]VCVC... is m>1 + s_v = "^(" + C + ")?" + v; // vowel in stem + + var re_mgr0 = new RegExp(mgr0); + var re_mgr1 = new RegExp(mgr1); + var re_meq1 = new RegExp(meq1); + var re_s_v = new RegExp(s_v); + + var re_1a = /^(.+?)(ss|i)es$/; + var re2_1a = /^(.+?)([^s])s$/; + var re_1b = /^(.+?)eed$/; + var re2_1b = /^(.+?)(ed|ing)$/; + var re_1b_2 = /.$/; + var re2_1b_2 = /(at|bl|iz)$/; + var re3_1b_2 = new RegExp("([^aeiouylsz])\\1$"); + var re4_1b_2 = new RegExp("^" + C + v + "[^aeiouwxy]$"); + + var re_1c = /^(.+?[^aeiou])y$/; + var re_2 = /^(.+?)(ational|tional|enci|anci|izer|bli|alli|entli|eli|ousli|ization|ation|ator|alism|iveness|fulness|ousness|aliti|iviti|biliti|logi)$/; + + var re_3 = /^(.+?)(icate|ative|alize|iciti|ical|ful|ness)$/; + + var re_4 = /^(.+?)(al|ance|ence|er|ic|able|ible|ant|ement|ment|ent|ou|ism|ate|iti|ous|ive|ize)$/; + var re2_4 = /^(.+?)(s|t)(ion)$/; + + var re_5 = /^(.+?)e$/; + var re_5_1 = /ll$/; + var re3_5 = new RegExp("^" + C + v + "[^aeiouwxy]$"); + + var porterStemmer = function porterStemmer(w) { + var stem, + suffix, + firstch, + re, + re2, + re3, + re4; + + if (w.length < 3) { return w; } + + firstch = w.substr(0,1); + if (firstch == "y") { + w = firstch.toUpperCase() + w.substr(1); + } + + // Step 1a + re = re_1a + re2 = re2_1a; + + if (re.test(w)) { w = w.replace(re,"$1$2"); } + else if (re2.test(w)) { w = w.replace(re2,"$1$2"); } + + // Step 1b + re = re_1b; + re2 = re2_1b; + if (re.test(w)) { + var fp = re.exec(w); + re = re_mgr0; + if (re.test(fp[1])) { + re = re_1b_2; + w = w.replace(re,""); + } + } else if (re2.test(w)) { + var fp = re2.exec(w); + stem = fp[1]; + re2 = re_s_v; + if (re2.test(stem)) { + w = stem; + re2 = re2_1b_2; + re3 = re3_1b_2; + re4 = re4_1b_2; + if (re2.test(w)) { w = w + "e"; } + else if (re3.test(w)) { re = re_1b_2; w = w.replace(re,""); } + else if (re4.test(w)) { w = w + "e"; } + } + } + + // Step 1c - replace suffix y or Y by i if preceded by a non-vowel which is not the first letter of the word (so cry -> cri, by -> by, say -> say) + re = re_1c; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + w = stem + "i"; + } + + // Step 2 + re = re_2; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + suffix = fp[2]; + re = re_mgr0; + if (re.test(stem)) { + w = stem + step2list[suffix]; + } + } + + // Step 3 + re = re_3; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + suffix = fp[2]; + re = re_mgr0; + if (re.test(stem)) { + w = stem + step3list[suffix]; + } + } + + // Step 4 + re = re_4; + re2 = re2_4; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + re = re_mgr1; + if (re.test(stem)) { + w = stem; + } + } else if (re2.test(w)) { + var fp = re2.exec(w); + stem = fp[1] + fp[2]; + re2 = re_mgr1; + if (re2.test(stem)) { + w = stem; + } + } + + // Step 5 + re = re_5; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + re = re_mgr1; + re2 = re_meq1; + re3 = re3_5; + if (re.test(stem) || (re2.test(stem) && !(re3.test(stem)))) { + w = stem; + } + } + + re = re_5_1; + re2 = re_mgr1; + if (re.test(w) && re2.test(w)) { + re = re_1b_2; + w = w.replace(re,""); + } + + // and turn initial Y back to y + + if (firstch == "y") { + w = firstch.toLowerCase() + w.substr(1); + } + + return w; + }; + + return function (token) { + return token.update(porterStemmer); + } +})(); + +lunr.Pipeline.registerFunction(lunr.stemmer, 'stemmer') +/*! + * lunr.stopWordFilter + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.generateStopWordFilter builds a stopWordFilter function from the provided + * list of stop words. + * + * The built in lunr.stopWordFilter is built using this generator and can be used + * to generate custom stopWordFilters for applications or non English languages. + * + * @function + * @param {Array} token The token to pass through the filter + * @returns {lunr.PipelineFunction} + * @see lunr.Pipeline + * @see lunr.stopWordFilter + */ +lunr.generateStopWordFilter = function (stopWords) { + var words = stopWords.reduce(function (memo, stopWord) { + memo[stopWord] = stopWord + return memo + }, {}) + + return function (token) { + if (token && words[token.toString()] !== token.toString()) return token + } +} + +/** + * lunr.stopWordFilter is an English language stop word list filter, any words + * contained in the list will not be passed through the filter. + * + * This is intended to be used in the Pipeline. If the token does not pass the + * filter then undefined will be returned. + * + * @function + * @implements {lunr.PipelineFunction} + * @params {lunr.Token} token - A token to check for being a stop word. + * @returns {lunr.Token} + * @see {@link lunr.Pipeline} + */ +lunr.stopWordFilter = lunr.generateStopWordFilter([ + 'a', + 'able', + 'about', + 'across', + 'after', + 'all', + 'almost', + 'also', + 'am', + 'among', + 'an', + 'and', + 'any', + 'are', + 'as', + 'at', + 'be', + 'because', + 'been', + 'but', + 'by', + 'can', + 'cannot', + 'could', + 'dear', + 'did', + 'do', + 'does', + 'either', + 'else', + 'ever', + 'every', + 'for', + 'from', + 'get', + 'got', + 'had', + 'has', + 'have', + 'he', + 'her', + 'hers', + 'him', + 'his', + 'how', + 'however', + 'i', + 'if', + 'in', + 'into', + 'is', + 'it', + 'its', + 'just', + 'least', + 'let', + 'like', + 'likely', + 'may', + 'me', + 'might', + 'most', + 'must', + 'my', + 'neither', + 'no', + 'nor', + 'not', + 'of', + 'off', + 'often', + 'on', + 'only', + 'or', + 'other', + 'our', + 'own', + 'rather', + 'said', + 'say', + 'says', + 'she', + 'should', + 'since', + 'so', + 'some', + 'than', + 'that', + 'the', + 'their', + 'them', + 'then', + 'there', + 'these', + 'they', + 'this', + 'tis', + 'to', + 'too', + 'twas', + 'us', + 'wants', + 'was', + 'we', + 'were', + 'what', + 'when', + 'where', + 'which', + 'while', + 'who', + 'whom', + 'why', + 'will', + 'with', + 'would', + 'yet', + 'you', + 'your' +]) + +lunr.Pipeline.registerFunction(lunr.stopWordFilter, 'stopWordFilter') +/*! + * lunr.trimmer + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.trimmer is a pipeline function for trimming non word + * characters from the beginning and end of tokens before they + * enter the index. + * + * This implementation may not work correctly for non latin + * characters and should either be removed or adapted for use + * with languages with non-latin characters. + * + * @static + * @implements {lunr.PipelineFunction} + * @param {lunr.Token} token The token to pass through the filter + * @returns {lunr.Token} + * @see lunr.Pipeline + */ +lunr.trimmer = function (token) { + return token.update(function (s) { + return s.replace(/^\W+/, '').replace(/\W+$/, '') + }) +} + +lunr.Pipeline.registerFunction(lunr.trimmer, 'trimmer') +/*! + * lunr.TokenSet + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A token set is used to store the unique list of all tokens + * within an index. Token sets are also used to represent an + * incoming query to the index, this query token set and index + * token set are then intersected to find which tokens to look + * up in the inverted index. + * + * A token set can hold multiple tokens, as in the case of the + * index token set, or it can hold a single token as in the + * case of a simple query token set. + * + * Additionally token sets are used to perform wildcard matching. + * Leading, contained and trailing wildcards are supported, and + * from this edit distance matching can also be provided. + * + * Token sets are implemented as a minimal finite state automata, + * where both common prefixes and suffixes are shared between tokens. + * This helps to reduce the space used for storing the token set. + * + * @constructor + */ +lunr.TokenSet = function () { + this.final = false + this.edges = {} + this.id = lunr.TokenSet._nextId + lunr.TokenSet._nextId += 1 +} + +/** + * Keeps track of the next, auto increment, identifier to assign + * to a new tokenSet. + * + * TokenSets require a unique identifier to be correctly minimised. + * + * @private + */ +lunr.TokenSet._nextId = 1 + +/** + * Creates a TokenSet instance from the given sorted array of words. + * + * @param {String[]} arr - A sorted array of strings to create the set from. + * @returns {lunr.TokenSet} + * @throws Will throw an error if the input array is not sorted. + */ +lunr.TokenSet.fromArray = function (arr) { + var builder = new lunr.TokenSet.Builder + + for (var i = 0, len = arr.length; i < len; i++) { + builder.insert(arr[i]) + } + + builder.finish() + return builder.root +} + +/** + * Creates a token set from a query clause. + * + * @private + * @param {Object} clause - A single clause from lunr.Query. + * @param {string} clause.term - The query clause term. + * @param {number} [clause.editDistance] - The optional edit distance for the term. + * @returns {lunr.TokenSet} + */ +lunr.TokenSet.fromClause = function (clause) { + if ('editDistance' in clause) { + return lunr.TokenSet.fromFuzzyString(clause.term, clause.editDistance) + } else { + return lunr.TokenSet.fromString(clause.term) + } +} + +/** + * Creates a token set representing a single string with a specified + * edit distance. + * + * Insertions, deletions, substitutions and transpositions are each + * treated as an edit distance of 1. + * + * Increasing the allowed edit distance will have a dramatic impact + * on the performance of both creating and intersecting these TokenSets. + * It is advised to keep the edit distance less than 3. + * + * @param {string} str - The string to create the token set from. + * @param {number} editDistance - The allowed edit distance to match. + * @returns {lunr.Vector} + */ +lunr.TokenSet.fromFuzzyString = function (str, editDistance) { + var root = new lunr.TokenSet + + var stack = [{ + node: root, + editsRemaining: editDistance, + str: str + }] + + while (stack.length) { + var frame = stack.pop() + + // no edit + if (frame.str.length > 0) { + var char = frame.str.charAt(0), + noEditNode + + if (char in frame.node.edges) { + noEditNode = frame.node.edges[char] + } else { + noEditNode = new lunr.TokenSet + frame.node.edges[char] = noEditNode + } + + if (frame.str.length == 1) { + noEditNode.final = true + } + + stack.push({ + node: noEditNode, + editsRemaining: frame.editsRemaining, + str: frame.str.slice(1) + }) + } + + if (frame.editsRemaining == 0) { + continue + } + + // insertion + if ("*" in frame.node.edges) { + var insertionNode = frame.node.edges["*"] + } else { + var insertionNode = new lunr.TokenSet + frame.node.edges["*"] = insertionNode + } + + if (frame.str.length == 0) { + insertionNode.final = true + } + + stack.push({ + node: insertionNode, + editsRemaining: frame.editsRemaining - 1, + str: frame.str + }) + + // deletion + // can only do a deletion if we have enough edits remaining + // and if there are characters left to delete in the string + if (frame.str.length > 1) { + stack.push({ + node: frame.node, + editsRemaining: frame.editsRemaining - 1, + str: frame.str.slice(1) + }) + } + + // deletion + // just removing the last character from the str + if (frame.str.length == 1) { + frame.node.final = true + } + + // substitution + // can only do a substitution if we have enough edits remaining + // and if there are characters left to substitute + if (frame.str.length >= 1) { + if ("*" in frame.node.edges) { + var substitutionNode = frame.node.edges["*"] + } else { + var substitutionNode = new lunr.TokenSet + frame.node.edges["*"] = substitutionNode + } + + if (frame.str.length == 1) { + substitutionNode.final = true + } + + stack.push({ + node: substitutionNode, + editsRemaining: frame.editsRemaining - 1, + str: frame.str.slice(1) + }) + } + + // transposition + // can only do a transposition if there are edits remaining + // and there are enough characters to transpose + if (frame.str.length > 1) { + var charA = frame.str.charAt(0), + charB = frame.str.charAt(1), + transposeNode + + if (charB in frame.node.edges) { + transposeNode = frame.node.edges[charB] + } else { + transposeNode = new lunr.TokenSet + frame.node.edges[charB] = transposeNode + } + + if (frame.str.length == 1) { + transposeNode.final = true + } + + stack.push({ + node: transposeNode, + editsRemaining: frame.editsRemaining - 1, + str: charA + frame.str.slice(2) + }) + } + } + + return root +} + +/** + * Creates a TokenSet from a string. + * + * The string may contain one or more wildcard characters (*) + * that will allow wildcard matching when intersecting with + * another TokenSet. + * + * @param {string} str - The string to create a TokenSet from. + * @returns {lunr.TokenSet} + */ +lunr.TokenSet.fromString = function (str) { + var node = new lunr.TokenSet, + root = node + + /* + * Iterates through all characters within the passed string + * appending a node for each character. + * + * When a wildcard character is found then a self + * referencing edge is introduced to continually match + * any number of any characters. + */ + for (var i = 0, len = str.length; i < len; i++) { + var char = str[i], + final = (i == len - 1) + + if (char == "*") { + node.edges[char] = node + node.final = final + + } else { + var next = new lunr.TokenSet + next.final = final + + node.edges[char] = next + node = next + } + } + + return root +} + +/** + * Converts this TokenSet into an array of strings + * contained within the TokenSet. + * + * This is not intended to be used on a TokenSet that + * contains wildcards, in these cases the results are + * undefined and are likely to cause an infinite loop. + * + * @returns {string[]} + */ +lunr.TokenSet.prototype.toArray = function () { + var words = [] + + var stack = [{ + prefix: "", + node: this + }] + + while (stack.length) { + var frame = stack.pop(), + edges = Object.keys(frame.node.edges), + len = edges.length + + if (frame.node.final) { + /* In Safari, at this point the prefix is sometimes corrupted, see: + * https://github.com/olivernn/lunr.js/issues/279 Calling any + * String.prototype method forces Safari to "cast" this string to what + * it's supposed to be, fixing the bug. */ + frame.prefix.charAt(0) + words.push(frame.prefix) + } + + for (var i = 0; i < len; i++) { + var edge = edges[i] + + stack.push({ + prefix: frame.prefix.concat(edge), + node: frame.node.edges[edge] + }) + } + } + + return words +} + +/** + * Generates a string representation of a TokenSet. + * + * This is intended to allow TokenSets to be used as keys + * in objects, largely to aid the construction and minimisation + * of a TokenSet. As such it is not designed to be a human + * friendly representation of the TokenSet. + * + * @returns {string} + */ +lunr.TokenSet.prototype.toString = function () { + // NOTE: Using Object.keys here as this.edges is very likely + // to enter 'hash-mode' with many keys being added + // + // avoiding a for-in loop here as it leads to the function + // being de-optimised (at least in V8). From some simple + // benchmarks the performance is comparable, but allowing + // V8 to optimize may mean easy performance wins in the future. + + if (this._str) { + return this._str + } + + var str = this.final ? '1' : '0', + labels = Object.keys(this.edges).sort(), + len = labels.length + + for (var i = 0; i < len; i++) { + var label = labels[i], + node = this.edges[label] + + str = str + label + node.id + } + + return str +} + +/** + * Returns a new TokenSet that is the intersection of + * this TokenSet and the passed TokenSet. + * + * This intersection will take into account any wildcards + * contained within the TokenSet. + * + * @param {lunr.TokenSet} b - An other TokenSet to intersect with. + * @returns {lunr.TokenSet} + */ +lunr.TokenSet.prototype.intersect = function (b) { + var output = new lunr.TokenSet, + frame = undefined + + var stack = [{ + qNode: b, + output: output, + node: this + }] + + while (stack.length) { + frame = stack.pop() + + // NOTE: As with the #toString method, we are using + // Object.keys and a for loop instead of a for-in loop + // as both of these objects enter 'hash' mode, causing + // the function to be de-optimised in V8 + var qEdges = Object.keys(frame.qNode.edges), + qLen = qEdges.length, + nEdges = Object.keys(frame.node.edges), + nLen = nEdges.length + + for (var q = 0; q < qLen; q++) { + var qEdge = qEdges[q] + + for (var n = 0; n < nLen; n++) { + var nEdge = nEdges[n] + + if (nEdge == qEdge || qEdge == '*') { + var node = frame.node.edges[nEdge], + qNode = frame.qNode.edges[qEdge], + final = node.final && qNode.final, + next = undefined + + if (nEdge in frame.output.edges) { + // an edge already exists for this character + // no need to create a new node, just set the finality + // bit unless this node is already final + next = frame.output.edges[nEdge] + next.final = next.final || final + + } else { + // no edge exists yet, must create one + // set the finality bit and insert it + // into the output + next = new lunr.TokenSet + next.final = final + frame.output.edges[nEdge] = next + } + + stack.push({ + qNode: qNode, + output: next, + node: node + }) + } + } + } + } + + return output +} +lunr.TokenSet.Builder = function () { + this.previousWord = "" + this.root = new lunr.TokenSet + this.uncheckedNodes = [] + this.minimizedNodes = {} +} + +lunr.TokenSet.Builder.prototype.insert = function (word) { + var node, + commonPrefix = 0 + + if (word < this.previousWord) { + throw new Error ("Out of order word insertion") + } + + for (var i = 0; i < word.length && i < this.previousWord.length; i++) { + if (word[i] != this.previousWord[i]) break + commonPrefix++ + } + + this.minimize(commonPrefix) + + if (this.uncheckedNodes.length == 0) { + node = this.root + } else { + node = this.uncheckedNodes[this.uncheckedNodes.length - 1].child + } + + for (var i = commonPrefix; i < word.length; i++) { + var nextNode = new lunr.TokenSet, + char = word[i] + + node.edges[char] = nextNode + + this.uncheckedNodes.push({ + parent: node, + char: char, + child: nextNode + }) + + node = nextNode + } + + node.final = true + this.previousWord = word +} + +lunr.TokenSet.Builder.prototype.finish = function () { + this.minimize(0) +} + +lunr.TokenSet.Builder.prototype.minimize = function (downTo) { + for (var i = this.uncheckedNodes.length - 1; i >= downTo; i--) { + var node = this.uncheckedNodes[i], + childKey = node.child.toString() + + if (childKey in this.minimizedNodes) { + node.parent.edges[node.char] = this.minimizedNodes[childKey] + } else { + // Cache the key for this node since + // we know it can't change anymore + node.child._str = childKey + + this.minimizedNodes[childKey] = node.child + } + + this.uncheckedNodes.pop() + } +} +/*! + * lunr.Index + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * An index contains the built index of all documents and provides a query interface + * to the index. + * + * Usually instances of lunr.Index will not be created using this constructor, instead + * lunr.Builder should be used to construct new indexes, or lunr.Index.load should be + * used to load previously built and serialized indexes. + * + * @constructor + * @param {Object} attrs - The attributes of the built search index. + * @param {Object} attrs.invertedIndex - An index of term/field to document reference. + * @param {Object} attrs.fieldVectors - Field vectors + * @param {lunr.TokenSet} attrs.tokenSet - An set of all corpus tokens. + * @param {string[]} attrs.fields - The names of indexed document fields. + * @param {lunr.Pipeline} attrs.pipeline - The pipeline to use for search terms. + */ +lunr.Index = function (attrs) { + this.invertedIndex = attrs.invertedIndex + this.fieldVectors = attrs.fieldVectors + this.tokenSet = attrs.tokenSet + this.fields = attrs.fields + this.pipeline = attrs.pipeline +} + +/** + * A result contains details of a document matching a search query. + * @typedef {Object} lunr.Index~Result + * @property {string} ref - The reference of the document this result represents. + * @property {number} score - A number between 0 and 1 representing how similar this document is to the query. + * @property {lunr.MatchData} matchData - Contains metadata about this match including which term(s) caused the match. + */ + +/** + * Although lunr provides the ability to create queries using lunr.Query, it also provides a simple + * query language which itself is parsed into an instance of lunr.Query. + * + * For programmatically building queries it is advised to directly use lunr.Query, the query language + * is best used for human entered text rather than program generated text. + * + * At its simplest queries can just be a single term, e.g. `hello`, multiple terms are also supported + * and will be combined with OR, e.g `hello world` will match documents that contain either 'hello' + * or 'world', though those that contain both will rank higher in the results. + * + * Wildcards can be included in terms to match one or more unspecified characters, these wildcards can + * be inserted anywhere within the term, and more than one wildcard can exist in a single term. Adding + * wildcards will increase the number of documents that will be found but can also have a negative + * impact on query performance, especially with wildcards at the beginning of a term. + * + * Terms can be restricted to specific fields, e.g. `title:hello`, only documents with the term + * hello in the title field will match this query. Using a field not present in the index will lead + * to an error being thrown. + * + * Modifiers can also be added to terms, lunr supports edit distance and boost modifiers on terms. A term + * boost will make documents matching that term score higher, e.g. `foo^5`. Edit distance is also supported + * to provide fuzzy matching, e.g. 'hello~2' will match documents with hello with an edit distance of 2. + * Avoid large values for edit distance to improve query performance. + * + * Each term also supports a presence modifier. By default a term's presence in document is optional, however + * this can be changed to either required or prohibited. For a term's presence to be required in a document the + * term should be prefixed with a '+', e.g. `+foo bar` is a search for documents that must contain 'foo' and + * optionally contain 'bar'. Conversely a leading '-' sets the terms presence to prohibited, i.e. it must not + * appear in a document, e.g. `-foo bar` is a search for documents that do not contain 'foo' but may contain 'bar'. + * + * To escape special characters the backslash character '\' can be used, this allows searches to include + * characters that would normally be considered modifiers, e.g. `foo\~2` will search for a term "foo~2" instead + * of attempting to apply a boost of 2 to the search term "foo". + * + * @typedef {string} lunr.Index~QueryString + * @example Simple single term query + * hello + * @example Multiple term query + * hello world + * @example term scoped to a field + * title:hello + * @example term with a boost of 10 + * hello^10 + * @example term with an edit distance of 2 + * hello~2 + * @example terms with presence modifiers + * -foo +bar baz + */ + +/** + * Performs a search against the index using lunr query syntax. + * + * Results will be returned sorted by their score, the most relevant results + * will be returned first. For details on how the score is calculated, please see + * the {@link https://lunrjs.com/guides/searching.html#scoring|guide}. + * + * For more programmatic querying use lunr.Index#query. + * + * @param {lunr.Index~QueryString} queryString - A string containing a lunr query. + * @throws {lunr.QueryParseError} If the passed query string cannot be parsed. + * @returns {lunr.Index~Result[]} + */ +lunr.Index.prototype.search = function (queryString) { + return this.query(function (query) { + var parser = new lunr.QueryParser(queryString, query) + parser.parse() + }) +} + +/** + * A query builder callback provides a query object to be used to express + * the query to perform on the index. + * + * @callback lunr.Index~queryBuilder + * @param {lunr.Query} query - The query object to build up. + * @this lunr.Query + */ + +/** + * Performs a query against the index using the yielded lunr.Query object. + * + * If performing programmatic queries against the index, this method is preferred + * over lunr.Index#search so as to avoid the additional query parsing overhead. + * + * A query object is yielded to the supplied function which should be used to + * express the query to be run against the index. + * + * Note that although this function takes a callback parameter it is _not_ an + * asynchronous operation, the callback is just yielded a query object to be + * customized. + * + * @param {lunr.Index~queryBuilder} fn - A function that is used to build the query. + * @returns {lunr.Index~Result[]} + */ +lunr.Index.prototype.query = function (fn) { + // for each query clause + // * process terms + // * expand terms from token set + // * find matching documents and metadata + // * get document vectors + // * score documents + + var query = new lunr.Query(this.fields), + matchingFields = Object.create(null), + queryVectors = Object.create(null), + termFieldCache = Object.create(null), + requiredMatches = Object.create(null), + prohibitedMatches = Object.create(null) + + /* + * To support field level boosts a query vector is created per + * field. An empty vector is eagerly created to support negated + * queries. + */ + for (var i = 0; i < this.fields.length; i++) { + queryVectors[this.fields[i]] = new lunr.Vector + } + + fn.call(query, query) + + for (var i = 0; i < query.clauses.length; i++) { + /* + * Unless the pipeline has been disabled for this term, which is + * the case for terms with wildcards, we need to pass the clause + * term through the search pipeline. A pipeline returns an array + * of processed terms. Pipeline functions may expand the passed + * term, which means we may end up performing multiple index lookups + * for a single query term. + */ + var clause = query.clauses[i], + terms = null, + clauseMatches = lunr.Set.empty + + if (clause.usePipeline) { + terms = this.pipeline.runString(clause.term, { + fields: clause.fields + }) + } else { + terms = [clause.term] + } + + for (var m = 0; m < terms.length; m++) { + var term = terms[m] + + /* + * Each term returned from the pipeline needs to use the same query + * clause object, e.g. the same boost and or edit distance. The + * simplest way to do this is to re-use the clause object but mutate + * its term property. + */ + clause.term = term + + /* + * From the term in the clause we create a token set which will then + * be used to intersect the indexes token set to get a list of terms + * to lookup in the inverted index + */ + var termTokenSet = lunr.TokenSet.fromClause(clause), + expandedTerms = this.tokenSet.intersect(termTokenSet).toArray() + + /* + * If a term marked as required does not exist in the tokenSet it is + * impossible for the search to return any matches. We set all the field + * scoped required matches set to empty and stop examining any further + * clauses. + */ + if (expandedTerms.length === 0 && clause.presence === lunr.Query.presence.REQUIRED) { + for (var k = 0; k < clause.fields.length; k++) { + var field = clause.fields[k] + requiredMatches[field] = lunr.Set.empty + } + + break + } + + for (var j = 0; j < expandedTerms.length; j++) { + /* + * For each term get the posting and termIndex, this is required for + * building the query vector. + */ + var expandedTerm = expandedTerms[j], + posting = this.invertedIndex[expandedTerm], + termIndex = posting._index + + for (var k = 0; k < clause.fields.length; k++) { + /* + * For each field that this query term is scoped by (by default + * all fields are in scope) we need to get all the document refs + * that have this term in that field. + * + * The posting is the entry in the invertedIndex for the matching + * term from above. + */ + var field = clause.fields[k], + fieldPosting = posting[field], + matchingDocumentRefs = Object.keys(fieldPosting), + termField = expandedTerm + "/" + field, + matchingDocumentsSet = new lunr.Set(matchingDocumentRefs) + + /* + * if the presence of this term is required ensure that the matching + * documents are added to the set of required matches for this clause. + * + */ + if (clause.presence == lunr.Query.presence.REQUIRED) { + clauseMatches = clauseMatches.union(matchingDocumentsSet) + + if (requiredMatches[field] === undefined) { + requiredMatches[field] = lunr.Set.complete + } + } + + /* + * if the presence of this term is prohibited ensure that the matching + * documents are added to the set of prohibited matches for this field, + * creating that set if it does not yet exist. + */ + if (clause.presence == lunr.Query.presence.PROHIBITED) { + if (prohibitedMatches[field] === undefined) { + prohibitedMatches[field] = lunr.Set.empty + } + + prohibitedMatches[field] = prohibitedMatches[field].union(matchingDocumentsSet) + + /* + * Prohibited matches should not be part of the query vector used for + * similarity scoring and no metadata should be extracted so we continue + * to the next field + */ + continue + } + + /* + * The query field vector is populated using the termIndex found for + * the term and a unit value with the appropriate boost applied. + * Using upsert because there could already be an entry in the vector + * for the term we are working with. In that case we just add the scores + * together. + */ + queryVectors[field].upsert(termIndex, clause.boost, function (a, b) { return a + b }) + + /** + * If we've already seen this term, field combo then we've already collected + * the matching documents and metadata, no need to go through all that again + */ + if (termFieldCache[termField]) { + continue + } + + for (var l = 0; l < matchingDocumentRefs.length; l++) { + /* + * All metadata for this term/field/document triple + * are then extracted and collected into an instance + * of lunr.MatchData ready to be returned in the query + * results + */ + var matchingDocumentRef = matchingDocumentRefs[l], + matchingFieldRef = new lunr.FieldRef (matchingDocumentRef, field), + metadata = fieldPosting[matchingDocumentRef], + fieldMatch + + if ((fieldMatch = matchingFields[matchingFieldRef]) === undefined) { + matchingFields[matchingFieldRef] = new lunr.MatchData (expandedTerm, field, metadata) + } else { + fieldMatch.add(expandedTerm, field, metadata) + } + + } + + termFieldCache[termField] = true + } + } + } + + /** + * If the presence was required we need to update the requiredMatches field sets. + * We do this after all fields for the term have collected their matches because + * the clause terms presence is required in _any_ of the fields not _all_ of the + * fields. + */ + if (clause.presence === lunr.Query.presence.REQUIRED) { + for (var k = 0; k < clause.fields.length; k++) { + var field = clause.fields[k] + requiredMatches[field] = requiredMatches[field].intersect(clauseMatches) + } + } + } + + /** + * Need to combine the field scoped required and prohibited + * matching documents into a global set of required and prohibited + * matches + */ + var allRequiredMatches = lunr.Set.complete, + allProhibitedMatches = lunr.Set.empty + + for (var i = 0; i < this.fields.length; i++) { + var field = this.fields[i] + + if (requiredMatches[field]) { + allRequiredMatches = allRequiredMatches.intersect(requiredMatches[field]) + } + + if (prohibitedMatches[field]) { + allProhibitedMatches = allProhibitedMatches.union(prohibitedMatches[field]) + } + } + + var matchingFieldRefs = Object.keys(matchingFields), + results = [], + matches = Object.create(null) + + /* + * If the query is negated (contains only prohibited terms) + * we need to get _all_ fieldRefs currently existing in the + * index. This is only done when we know that the query is + * entirely prohibited terms to avoid any cost of getting all + * fieldRefs unnecessarily. + * + * Additionally, blank MatchData must be created to correctly + * populate the results. + */ + if (query.isNegated()) { + matchingFieldRefs = Object.keys(this.fieldVectors) + + for (var i = 0; i < matchingFieldRefs.length; i++) { + var matchingFieldRef = matchingFieldRefs[i] + var fieldRef = lunr.FieldRef.fromString(matchingFieldRef) + matchingFields[matchingFieldRef] = new lunr.MatchData + } + } + + for (var i = 0; i < matchingFieldRefs.length; i++) { + /* + * Currently we have document fields that match the query, but we + * need to return documents. The matchData and scores are combined + * from multiple fields belonging to the same document. + * + * Scores are calculated by field, using the query vectors created + * above, and combined into a final document score using addition. + */ + var fieldRef = lunr.FieldRef.fromString(matchingFieldRefs[i]), + docRef = fieldRef.docRef + + if (!allRequiredMatches.contains(docRef)) { + continue + } + + if (allProhibitedMatches.contains(docRef)) { + continue + } + + var fieldVector = this.fieldVectors[fieldRef], + score = queryVectors[fieldRef.fieldName].similarity(fieldVector), + docMatch + + if ((docMatch = matches[docRef]) !== undefined) { + docMatch.score += score + docMatch.matchData.combine(matchingFields[fieldRef]) + } else { + var match = { + ref: docRef, + score: score, + matchData: matchingFields[fieldRef] + } + matches[docRef] = match + results.push(match) + } + } + + /* + * Sort the results objects by score, highest first. + */ + return results.sort(function (a, b) { + return b.score - a.score + }) +} + +/** + * Prepares the index for JSON serialization. + * + * The schema for this JSON blob will be described in a + * separate JSON schema file. + * + * @returns {Object} + */ +lunr.Index.prototype.toJSON = function () { + var invertedIndex = Object.keys(this.invertedIndex) + .sort() + .map(function (term) { + return [term, this.invertedIndex[term]] + }, this) + + var fieldVectors = Object.keys(this.fieldVectors) + .map(function (ref) { + return [ref, this.fieldVectors[ref].toJSON()] + }, this) + + return { + version: lunr.version, + fields: this.fields, + fieldVectors: fieldVectors, + invertedIndex: invertedIndex, + pipeline: this.pipeline.toJSON() + } +} + +/** + * Loads a previously serialized lunr.Index + * + * @param {Object} serializedIndex - A previously serialized lunr.Index + * @returns {lunr.Index} + */ +lunr.Index.load = function (serializedIndex) { + var attrs = {}, + fieldVectors = {}, + serializedVectors = serializedIndex.fieldVectors, + invertedIndex = Object.create(null), + serializedInvertedIndex = serializedIndex.invertedIndex, + tokenSetBuilder = new lunr.TokenSet.Builder, + pipeline = lunr.Pipeline.load(serializedIndex.pipeline) + + if (serializedIndex.version != lunr.version) { + lunr.utils.warn("Version mismatch when loading serialised index. Current version of lunr '" + lunr.version + "' does not match serialized index '" + serializedIndex.version + "'") + } + + for (var i = 0; i < serializedVectors.length; i++) { + var tuple = serializedVectors[i], + ref = tuple[0], + elements = tuple[1] + + fieldVectors[ref] = new lunr.Vector(elements) + } + + for (var i = 0; i < serializedInvertedIndex.length; i++) { + var tuple = serializedInvertedIndex[i], + term = tuple[0], + posting = tuple[1] + + tokenSetBuilder.insert(term) + invertedIndex[term] = posting + } + + tokenSetBuilder.finish() + + attrs.fields = serializedIndex.fields + + attrs.fieldVectors = fieldVectors + attrs.invertedIndex = invertedIndex + attrs.tokenSet = tokenSetBuilder.root + attrs.pipeline = pipeline + + return new lunr.Index(attrs) +} +/*! + * lunr.Builder + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.Builder performs indexing on a set of documents and + * returns instances of lunr.Index ready for querying. + * + * All configuration of the index is done via the builder, the + * fields to index, the document reference, the text processing + * pipeline and document scoring parameters are all set on the + * builder before indexing. + * + * @constructor + * @property {string} _ref - Internal reference to the document reference field. + * @property {string[]} _fields - Internal reference to the document fields to index. + * @property {object} invertedIndex - The inverted index maps terms to document fields. + * @property {object} documentTermFrequencies - Keeps track of document term frequencies. + * @property {object} documentLengths - Keeps track of the length of documents added to the index. + * @property {lunr.tokenizer} tokenizer - Function for splitting strings into tokens for indexing. + * @property {lunr.Pipeline} pipeline - The pipeline performs text processing on tokens before indexing. + * @property {lunr.Pipeline} searchPipeline - A pipeline for processing search terms before querying the index. + * @property {number} documentCount - Keeps track of the total number of documents indexed. + * @property {number} _b - A parameter to control field length normalization, setting this to 0 disabled normalization, 1 fully normalizes field lengths, the default value is 0.75. + * @property {number} _k1 - A parameter to control how quickly an increase in term frequency results in term frequency saturation, the default value is 1.2. + * @property {number} termIndex - A counter incremented for each unique term, used to identify a terms position in the vector space. + * @property {array} metadataWhitelist - A list of metadata keys that have been whitelisted for entry in the index. + */ +lunr.Builder = function () { + this._ref = "id" + this._fields = Object.create(null) + this._documents = Object.create(null) + this.invertedIndex = Object.create(null) + this.fieldTermFrequencies = {} + this.fieldLengths = {} + this.tokenizer = lunr.tokenizer + this.pipeline = new lunr.Pipeline + this.searchPipeline = new lunr.Pipeline + this.documentCount = 0 + this._b = 0.75 + this._k1 = 1.2 + this.termIndex = 0 + this.metadataWhitelist = [] +} + +/** + * Sets the document field used as the document reference. Every document must have this field. + * The type of this field in the document should be a string, if it is not a string it will be + * coerced into a string by calling toString. + * + * The default ref is 'id'. + * + * The ref should _not_ be changed during indexing, it should be set before any documents are + * added to the index. Changing it during indexing can lead to inconsistent results. + * + * @param {string} ref - The name of the reference field in the document. + */ +lunr.Builder.prototype.ref = function (ref) { + this._ref = ref +} + +/** + * A function that is used to extract a field from a document. + * + * Lunr expects a field to be at the top level of a document, if however the field + * is deeply nested within a document an extractor function can be used to extract + * the right field for indexing. + * + * @callback fieldExtractor + * @param {object} doc - The document being added to the index. + * @returns {?(string|object|object[])} obj - The object that will be indexed for this field. + * @example Extracting a nested field + * function (doc) { return doc.nested.field } + */ + +/** + * Adds a field to the list of document fields that will be indexed. Every document being + * indexed should have this field. Null values for this field in indexed documents will + * not cause errors but will limit the chance of that document being retrieved by searches. + * + * All fields should be added before adding documents to the index. Adding fields after + * a document has been indexed will have no effect on already indexed documents. + * + * Fields can be boosted at build time. This allows terms within that field to have more + * importance when ranking search results. Use a field boost to specify that matches within + * one field are more important than other fields. + * + * @param {string} fieldName - The name of a field to index in all documents. + * @param {object} attributes - Optional attributes associated with this field. + * @param {number} [attributes.boost=1] - Boost applied to all terms within this field. + * @param {fieldExtractor} [attributes.extractor] - Function to extract a field from a document. + * @throws {RangeError} fieldName cannot contain unsupported characters '/' + */ +lunr.Builder.prototype.field = function (fieldName, attributes) { + if (/\//.test(fieldName)) { + throw new RangeError ("Field '" + fieldName + "' contains illegal character '/'") + } + + this._fields[fieldName] = attributes || {} +} + +/** + * A parameter to tune the amount of field length normalisation that is applied when + * calculating relevance scores. A value of 0 will completely disable any normalisation + * and a value of 1 will fully normalise field lengths. The default is 0.75. Values of b + * will be clamped to the range 0 - 1. + * + * @param {number} number - The value to set for this tuning parameter. + */ +lunr.Builder.prototype.b = function (number) { + if (number < 0) { + this._b = 0 + } else if (number > 1) { + this._b = 1 + } else { + this._b = number + } +} + +/** + * A parameter that controls the speed at which a rise in term frequency results in term + * frequency saturation. The default value is 1.2. Setting this to a higher value will give + * slower saturation levels, a lower value will result in quicker saturation. + * + * @param {number} number - The value to set for this tuning parameter. + */ +lunr.Builder.prototype.k1 = function (number) { + this._k1 = number +} + +/** + * Adds a document to the index. + * + * Before adding fields to the index the index should have been fully setup, with the document + * ref and all fields to index already having been specified. + * + * The document must have a field name as specified by the ref (by default this is 'id') and + * it should have all fields defined for indexing, though null or undefined values will not + * cause errors. + * + * Entire documents can be boosted at build time. Applying a boost to a document indicates that + * this document should rank higher in search results than other documents. + * + * @param {object} doc - The document to add to the index. + * @param {object} attributes - Optional attributes associated with this document. + * @param {number} [attributes.boost=1] - Boost applied to all terms within this document. + */ +lunr.Builder.prototype.add = function (doc, attributes) { + var docRef = doc[this._ref], + fields = Object.keys(this._fields) + + this._documents[docRef] = attributes || {} + this.documentCount += 1 + + for (var i = 0; i < fields.length; i++) { + var fieldName = fields[i], + extractor = this._fields[fieldName].extractor, + field = extractor ? extractor(doc) : doc[fieldName], + tokens = this.tokenizer(field, { + fields: [fieldName] + }), + terms = this.pipeline.run(tokens), + fieldRef = new lunr.FieldRef (docRef, fieldName), + fieldTerms = Object.create(null) + + this.fieldTermFrequencies[fieldRef] = fieldTerms + this.fieldLengths[fieldRef] = 0 + + // store the length of this field for this document + this.fieldLengths[fieldRef] += terms.length + + // calculate term frequencies for this field + for (var j = 0; j < terms.length; j++) { + var term = terms[j] + + if (fieldTerms[term] == undefined) { + fieldTerms[term] = 0 + } + + fieldTerms[term] += 1 + + // add to inverted index + // create an initial posting if one doesn't exist + if (this.invertedIndex[term] == undefined) { + var posting = Object.create(null) + posting["_index"] = this.termIndex + this.termIndex += 1 + + for (var k = 0; k < fields.length; k++) { + posting[fields[k]] = Object.create(null) + } + + this.invertedIndex[term] = posting + } + + // add an entry for this term/fieldName/docRef to the invertedIndex + if (this.invertedIndex[term][fieldName][docRef] == undefined) { + this.invertedIndex[term][fieldName][docRef] = Object.create(null) + } + + // store all whitelisted metadata about this token in the + // inverted index + for (var l = 0; l < this.metadataWhitelist.length; l++) { + var metadataKey = this.metadataWhitelist[l], + metadata = term.metadata[metadataKey] + + if (this.invertedIndex[term][fieldName][docRef][metadataKey] == undefined) { + this.invertedIndex[term][fieldName][docRef][metadataKey] = [] + } + + this.invertedIndex[term][fieldName][docRef][metadataKey].push(metadata) + } + } + + } +} + +/** + * Calculates the average document length for this index + * + * @private + */ +lunr.Builder.prototype.calculateAverageFieldLengths = function () { + + var fieldRefs = Object.keys(this.fieldLengths), + numberOfFields = fieldRefs.length, + accumulator = {}, + documentsWithField = {} + + for (var i = 0; i < numberOfFields; i++) { + var fieldRef = lunr.FieldRef.fromString(fieldRefs[i]), + field = fieldRef.fieldName + + documentsWithField[field] || (documentsWithField[field] = 0) + documentsWithField[field] += 1 + + accumulator[field] || (accumulator[field] = 0) + accumulator[field] += this.fieldLengths[fieldRef] + } + + var fields = Object.keys(this._fields) + + for (var i = 0; i < fields.length; i++) { + var fieldName = fields[i] + accumulator[fieldName] = accumulator[fieldName] / documentsWithField[fieldName] + } + + this.averageFieldLength = accumulator +} + +/** + * Builds a vector space model of every document using lunr.Vector + * + * @private + */ +lunr.Builder.prototype.createFieldVectors = function () { + var fieldVectors = {}, + fieldRefs = Object.keys(this.fieldTermFrequencies), + fieldRefsLength = fieldRefs.length, + termIdfCache = Object.create(null) + + for (var i = 0; i < fieldRefsLength; i++) { + var fieldRef = lunr.FieldRef.fromString(fieldRefs[i]), + fieldName = fieldRef.fieldName, + fieldLength = this.fieldLengths[fieldRef], + fieldVector = new lunr.Vector, + termFrequencies = this.fieldTermFrequencies[fieldRef], + terms = Object.keys(termFrequencies), + termsLength = terms.length + + + var fieldBoost = this._fields[fieldName].boost || 1, + docBoost = this._documents[fieldRef.docRef].boost || 1 + + for (var j = 0; j < termsLength; j++) { + var term = terms[j], + tf = termFrequencies[term], + termIndex = this.invertedIndex[term]._index, + idf, score, scoreWithPrecision + + if (termIdfCache[term] === undefined) { + idf = lunr.idf(this.invertedIndex[term], this.documentCount) + termIdfCache[term] = idf + } else { + idf = termIdfCache[term] + } + + score = idf * ((this._k1 + 1) * tf) / (this._k1 * (1 - this._b + this._b * (fieldLength / this.averageFieldLength[fieldName])) + tf) + score *= fieldBoost + score *= docBoost + scoreWithPrecision = Math.round(score * 1000) / 1000 + // Converts 1.23456789 to 1.234. + // Reducing the precision so that the vectors take up less + // space when serialised. Doing it now so that they behave + // the same before and after serialisation. Also, this is + // the fastest approach to reducing a number's precision in + // JavaScript. + + fieldVector.insert(termIndex, scoreWithPrecision) + } + + fieldVectors[fieldRef] = fieldVector + } + + this.fieldVectors = fieldVectors +} + +/** + * Creates a token set of all tokens in the index using lunr.TokenSet + * + * @private + */ +lunr.Builder.prototype.createTokenSet = function () { + this.tokenSet = lunr.TokenSet.fromArray( + Object.keys(this.invertedIndex).sort() + ) +} + +/** + * Builds the index, creating an instance of lunr.Index. + * + * This completes the indexing process and should only be called + * once all documents have been added to the index. + * + * @returns {lunr.Index} + */ +lunr.Builder.prototype.build = function () { + this.calculateAverageFieldLengths() + this.createFieldVectors() + this.createTokenSet() + + return new lunr.Index({ + invertedIndex: this.invertedIndex, + fieldVectors: this.fieldVectors, + tokenSet: this.tokenSet, + fields: Object.keys(this._fields), + pipeline: this.searchPipeline + }) +} + +/** + * Applies a plugin to the index builder. + * + * A plugin is a function that is called with the index builder as its context. + * Plugins can be used to customise or extend the behaviour of the index + * in some way. A plugin is just a function, that encapsulated the custom + * behaviour that should be applied when building the index. + * + * The plugin function will be called with the index builder as its argument, additional + * arguments can also be passed when calling use. The function will be called + * with the index builder as its context. + * + * @param {Function} plugin The plugin to apply. + */ +lunr.Builder.prototype.use = function (fn) { + var args = Array.prototype.slice.call(arguments, 1) + args.unshift(this) + fn.apply(this, args) +} +/** + * Contains and collects metadata about a matching document. + * A single instance of lunr.MatchData is returned as part of every + * lunr.Index~Result. + * + * @constructor + * @param {string} term - The term this match data is associated with + * @param {string} field - The field in which the term was found + * @param {object} metadata - The metadata recorded about this term in this field + * @property {object} metadata - A cloned collection of metadata associated with this document. + * @see {@link lunr.Index~Result} + */ +lunr.MatchData = function (term, field, metadata) { + var clonedMetadata = Object.create(null), + metadataKeys = Object.keys(metadata || {}) + + // Cloning the metadata to prevent the original + // being mutated during match data combination. + // Metadata is kept in an array within the inverted + // index so cloning the data can be done with + // Array#slice + for (var i = 0; i < metadataKeys.length; i++) { + var key = metadataKeys[i] + clonedMetadata[key] = metadata[key].slice() + } + + this.metadata = Object.create(null) + + if (term !== undefined) { + this.metadata[term] = Object.create(null) + this.metadata[term][field] = clonedMetadata + } +} + +/** + * An instance of lunr.MatchData will be created for every term that matches a + * document. However only one instance is required in a lunr.Index~Result. This + * method combines metadata from another instance of lunr.MatchData with this + * objects metadata. + * + * @param {lunr.MatchData} otherMatchData - Another instance of match data to merge with this one. + * @see {@link lunr.Index~Result} + */ +lunr.MatchData.prototype.combine = function (otherMatchData) { + var terms = Object.keys(otherMatchData.metadata) + + for (var i = 0; i < terms.length; i++) { + var term = terms[i], + fields = Object.keys(otherMatchData.metadata[term]) + + if (this.metadata[term] == undefined) { + this.metadata[term] = Object.create(null) + } + + for (var j = 0; j < fields.length; j++) { + var field = fields[j], + keys = Object.keys(otherMatchData.metadata[term][field]) + + if (this.metadata[term][field] == undefined) { + this.metadata[term][field] = Object.create(null) + } + + for (var k = 0; k < keys.length; k++) { + var key = keys[k] + + if (this.metadata[term][field][key] == undefined) { + this.metadata[term][field][key] = otherMatchData.metadata[term][field][key] + } else { + this.metadata[term][field][key] = this.metadata[term][field][key].concat(otherMatchData.metadata[term][field][key]) + } + + } + } + } +} + +/** + * Add metadata for a term/field pair to this instance of match data. + * + * @param {string} term - The term this match data is associated with + * @param {string} field - The field in which the term was found + * @param {object} metadata - The metadata recorded about this term in this field + */ +lunr.MatchData.prototype.add = function (term, field, metadata) { + if (!(term in this.metadata)) { + this.metadata[term] = Object.create(null) + this.metadata[term][field] = metadata + return + } + + if (!(field in this.metadata[term])) { + this.metadata[term][field] = metadata + return + } + + var metadataKeys = Object.keys(metadata) + + for (var i = 0; i < metadataKeys.length; i++) { + var key = metadataKeys[i] + + if (key in this.metadata[term][field]) { + this.metadata[term][field][key] = this.metadata[term][field][key].concat(metadata[key]) + } else { + this.metadata[term][field][key] = metadata[key] + } + } +} +/** + * A lunr.Query provides a programmatic way of defining queries to be performed + * against a {@link lunr.Index}. + * + * Prefer constructing a lunr.Query using the {@link lunr.Index#query} method + * so the query object is pre-initialized with the right index fields. + * + * @constructor + * @property {lunr.Query~Clause[]} clauses - An array of query clauses. + * @property {string[]} allFields - An array of all available fields in a lunr.Index. + */ +lunr.Query = function (allFields) { + this.clauses = [] + this.allFields = allFields +} + +/** + * Constants for indicating what kind of automatic wildcard insertion will be used when constructing a query clause. + * + * This allows wildcards to be added to the beginning and end of a term without having to manually do any string + * concatenation. + * + * The wildcard constants can be bitwise combined to select both leading and trailing wildcards. + * + * @constant + * @default + * @property {number} wildcard.NONE - The term will have no wildcards inserted, this is the default behaviour + * @property {number} wildcard.LEADING - Prepend the term with a wildcard, unless a leading wildcard already exists + * @property {number} wildcard.TRAILING - Append a wildcard to the term, unless a trailing wildcard already exists + * @see lunr.Query~Clause + * @see lunr.Query#clause + * @see lunr.Query#term + * @example query term with trailing wildcard + * query.term('foo', { wildcard: lunr.Query.wildcard.TRAILING }) + * @example query term with leading and trailing wildcard + * query.term('foo', { + * wildcard: lunr.Query.wildcard.LEADING | lunr.Query.wildcard.TRAILING + * }) + */ + +lunr.Query.wildcard = new String ("*") +lunr.Query.wildcard.NONE = 0 +lunr.Query.wildcard.LEADING = 1 +lunr.Query.wildcard.TRAILING = 2 + +/** + * Constants for indicating what kind of presence a term must have in matching documents. + * + * @constant + * @enum {number} + * @see lunr.Query~Clause + * @see lunr.Query#clause + * @see lunr.Query#term + * @example query term with required presence + * query.term('foo', { presence: lunr.Query.presence.REQUIRED }) + */ +lunr.Query.presence = { + /** + * Term's presence in a document is optional, this is the default value. + */ + OPTIONAL: 1, + + /** + * Term's presence in a document is required, documents that do not contain + * this term will not be returned. + */ + REQUIRED: 2, + + /** + * Term's presence in a document is prohibited, documents that do contain + * this term will not be returned. + */ + PROHIBITED: 3 +} + +/** + * A single clause in a {@link lunr.Query} contains a term and details on how to + * match that term against a {@link lunr.Index}. + * + * @typedef {Object} lunr.Query~Clause + * @property {string[]} fields - The fields in an index this clause should be matched against. + * @property {number} [boost=1] - Any boost that should be applied when matching this clause. + * @property {number} [editDistance] - Whether the term should have fuzzy matching applied, and how fuzzy the match should be. + * @property {boolean} [usePipeline] - Whether the term should be passed through the search pipeline. + * @property {number} [wildcard=lunr.Query.wildcard.NONE] - Whether the term should have wildcards appended or prepended. + * @property {number} [presence=lunr.Query.presence.OPTIONAL] - The terms presence in any matching documents. + */ + +/** + * Adds a {@link lunr.Query~Clause} to this query. + * + * Unless the clause contains the fields to be matched all fields will be matched. In addition + * a default boost of 1 is applied to the clause. + * + * @param {lunr.Query~Clause} clause - The clause to add to this query. + * @see lunr.Query~Clause + * @returns {lunr.Query} + */ +lunr.Query.prototype.clause = function (clause) { + if (!('fields' in clause)) { + clause.fields = this.allFields + } + + if (!('boost' in clause)) { + clause.boost = 1 + } + + if (!('usePipeline' in clause)) { + clause.usePipeline = true + } + + if (!('wildcard' in clause)) { + clause.wildcard = lunr.Query.wildcard.NONE + } + + if ((clause.wildcard & lunr.Query.wildcard.LEADING) && (clause.term.charAt(0) != lunr.Query.wildcard)) { + clause.term = "*" + clause.term + } + + if ((clause.wildcard & lunr.Query.wildcard.TRAILING) && (clause.term.slice(-1) != lunr.Query.wildcard)) { + clause.term = "" + clause.term + "*" + } + + if (!('presence' in clause)) { + clause.presence = lunr.Query.presence.OPTIONAL + } + + this.clauses.push(clause) + + return this +} + +/** + * A negated query is one in which every clause has a presence of + * prohibited. These queries require some special processing to return + * the expected results. + * + * @returns boolean + */ +lunr.Query.prototype.isNegated = function () { + for (var i = 0; i < this.clauses.length; i++) { + if (this.clauses[i].presence != lunr.Query.presence.PROHIBITED) { + return false + } + } + + return true +} + +/** + * Adds a term to the current query, under the covers this will create a {@link lunr.Query~Clause} + * to the list of clauses that make up this query. + * + * The term is used as is, i.e. no tokenization will be performed by this method. Instead conversion + * to a token or token-like string should be done before calling this method. + * + * The term will be converted to a string by calling `toString`. Multiple terms can be passed as an + * array, each term in the array will share the same options. + * + * @param {object|object[]} term - The term(s) to add to the query. + * @param {object} [options] - Any additional properties to add to the query clause. + * @returns {lunr.Query} + * @see lunr.Query#clause + * @see lunr.Query~Clause + * @example adding a single term to a query + * query.term("foo") + * @example adding a single term to a query and specifying search fields, term boost and automatic trailing wildcard + * query.term("foo", { + * fields: ["title"], + * boost: 10, + * wildcard: lunr.Query.wildcard.TRAILING + * }) + * @example using lunr.tokenizer to convert a string to tokens before using them as terms + * query.term(lunr.tokenizer("foo bar")) + */ +lunr.Query.prototype.term = function (term, options) { + if (Array.isArray(term)) { + term.forEach(function (t) { this.term(t, lunr.utils.clone(options)) }, this) + return this + } + + var clause = options || {} + clause.term = term.toString() + + this.clause(clause) + + return this +} +lunr.QueryParseError = function (message, start, end) { + this.name = "QueryParseError" + this.message = message + this.start = start + this.end = end +} + +lunr.QueryParseError.prototype = new Error +lunr.QueryLexer = function (str) { + this.lexemes = [] + this.str = str + this.length = str.length + this.pos = 0 + this.start = 0 + this.escapeCharPositions = [] +} + +lunr.QueryLexer.prototype.run = function () { + var state = lunr.QueryLexer.lexText + + while (state) { + state = state(this) + } +} + +lunr.QueryLexer.prototype.sliceString = function () { + var subSlices = [], + sliceStart = this.start, + sliceEnd = this.pos + + for (var i = 0; i < this.escapeCharPositions.length; i++) { + sliceEnd = this.escapeCharPositions[i] + subSlices.push(this.str.slice(sliceStart, sliceEnd)) + sliceStart = sliceEnd + 1 + } + + subSlices.push(this.str.slice(sliceStart, this.pos)) + this.escapeCharPositions.length = 0 + + return subSlices.join('') +} + +lunr.QueryLexer.prototype.emit = function (type) { + this.lexemes.push({ + type: type, + str: this.sliceString(), + start: this.start, + end: this.pos + }) + + this.start = this.pos +} + +lunr.QueryLexer.prototype.escapeCharacter = function () { + this.escapeCharPositions.push(this.pos - 1) + this.pos += 1 +} + +lunr.QueryLexer.prototype.next = function () { + if (this.pos >= this.length) { + return lunr.QueryLexer.EOS + } + + var char = this.str.charAt(this.pos) + this.pos += 1 + return char +} + +lunr.QueryLexer.prototype.width = function () { + return this.pos - this.start +} + +lunr.QueryLexer.prototype.ignore = function () { + if (this.start == this.pos) { + this.pos += 1 + } + + this.start = this.pos +} + +lunr.QueryLexer.prototype.backup = function () { + this.pos -= 1 +} + +lunr.QueryLexer.prototype.acceptDigitRun = function () { + var char, charCode + + do { + char = this.next() + charCode = char.charCodeAt(0) + } while (charCode > 47 && charCode < 58) + + if (char != lunr.QueryLexer.EOS) { + this.backup() + } +} + +lunr.QueryLexer.prototype.more = function () { + return this.pos < this.length +} + +lunr.QueryLexer.EOS = 'EOS' +lunr.QueryLexer.FIELD = 'FIELD' +lunr.QueryLexer.TERM = 'TERM' +lunr.QueryLexer.EDIT_DISTANCE = 'EDIT_DISTANCE' +lunr.QueryLexer.BOOST = 'BOOST' +lunr.QueryLexer.PRESENCE = 'PRESENCE' + +lunr.QueryLexer.lexField = function (lexer) { + lexer.backup() + lexer.emit(lunr.QueryLexer.FIELD) + lexer.ignore() + return lunr.QueryLexer.lexText +} + +lunr.QueryLexer.lexTerm = function (lexer) { + if (lexer.width() > 1) { + lexer.backup() + lexer.emit(lunr.QueryLexer.TERM) + } + + lexer.ignore() + + if (lexer.more()) { + return lunr.QueryLexer.lexText + } +} + +lunr.QueryLexer.lexEditDistance = function (lexer) { + lexer.ignore() + lexer.acceptDigitRun() + lexer.emit(lunr.QueryLexer.EDIT_DISTANCE) + return lunr.QueryLexer.lexText +} + +lunr.QueryLexer.lexBoost = function (lexer) { + lexer.ignore() + lexer.acceptDigitRun() + lexer.emit(lunr.QueryLexer.BOOST) + return lunr.QueryLexer.lexText +} + +lunr.QueryLexer.lexEOS = function (lexer) { + if (lexer.width() > 0) { + lexer.emit(lunr.QueryLexer.TERM) + } +} + +// This matches the separator used when tokenising fields +// within a document. These should match otherwise it is +// not possible to search for some tokens within a document. +// +// It is possible for the user to change the separator on the +// tokenizer so it _might_ clash with any other of the special +// characters already used within the search string, e.g. :. +// +// This means that it is possible to change the separator in +// such a way that makes some words unsearchable using a search +// string. +lunr.QueryLexer.termSeparator = lunr.tokenizer.separator + +lunr.QueryLexer.lexText = function (lexer) { + while (true) { + var char = lexer.next() + + if (char == lunr.QueryLexer.EOS) { + return lunr.QueryLexer.lexEOS + } + + // Escape character is '\' + if (char.charCodeAt(0) == 92) { + lexer.escapeCharacter() + continue + } + + if (char == ":") { + return lunr.QueryLexer.lexField + } + + if (char == "~") { + lexer.backup() + if (lexer.width() > 0) { + lexer.emit(lunr.QueryLexer.TERM) + } + return lunr.QueryLexer.lexEditDistance + } + + if (char == "^") { + lexer.backup() + if (lexer.width() > 0) { + lexer.emit(lunr.QueryLexer.TERM) + } + return lunr.QueryLexer.lexBoost + } + + // "+" indicates term presence is required + // checking for length to ensure that only + // leading "+" are considered + if (char == "+" && lexer.width() === 1) { + lexer.emit(lunr.QueryLexer.PRESENCE) + return lunr.QueryLexer.lexText + } + + // "-" indicates term presence is prohibited + // checking for length to ensure that only + // leading "-" are considered + if (char == "-" && lexer.width() === 1) { + lexer.emit(lunr.QueryLexer.PRESENCE) + return lunr.QueryLexer.lexText + } + + if (char.match(lunr.QueryLexer.termSeparator)) { + return lunr.QueryLexer.lexTerm + } + } +} + +lunr.QueryParser = function (str, query) { + this.lexer = new lunr.QueryLexer (str) + this.query = query + this.currentClause = {} + this.lexemeIdx = 0 +} + +lunr.QueryParser.prototype.parse = function () { + this.lexer.run() + this.lexemes = this.lexer.lexemes + + var state = lunr.QueryParser.parseClause + + while (state) { + state = state(this) + } + + return this.query +} + +lunr.QueryParser.prototype.peekLexeme = function () { + return this.lexemes[this.lexemeIdx] +} + +lunr.QueryParser.prototype.consumeLexeme = function () { + var lexeme = this.peekLexeme() + this.lexemeIdx += 1 + return lexeme +} + +lunr.QueryParser.prototype.nextClause = function () { + var completedClause = this.currentClause + this.query.clause(completedClause) + this.currentClause = {} +} + +lunr.QueryParser.parseClause = function (parser) { + var lexeme = parser.peekLexeme() + + if (lexeme == undefined) { + return + } + + switch (lexeme.type) { + case lunr.QueryLexer.PRESENCE: + return lunr.QueryParser.parsePresence + case lunr.QueryLexer.FIELD: + return lunr.QueryParser.parseField + case lunr.QueryLexer.TERM: + return lunr.QueryParser.parseTerm + default: + var errorMessage = "expected either a field or a term, found " + lexeme.type + + if (lexeme.str.length >= 1) { + errorMessage += " with value '" + lexeme.str + "'" + } + + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } +} + +lunr.QueryParser.parsePresence = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + switch (lexeme.str) { + case "-": + parser.currentClause.presence = lunr.Query.presence.PROHIBITED + break + case "+": + parser.currentClause.presence = lunr.Query.presence.REQUIRED + break + default: + var errorMessage = "unrecognised presence operator'" + lexeme.str + "'" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + var errorMessage = "expecting term or field, found nothing" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.FIELD: + return lunr.QueryParser.parseField + case lunr.QueryLexer.TERM: + return lunr.QueryParser.parseTerm + default: + var errorMessage = "expecting term or field, found '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseField = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + if (parser.query.allFields.indexOf(lexeme.str) == -1) { + var possibleFields = parser.query.allFields.map(function (f) { return "'" + f + "'" }).join(', '), + errorMessage = "unrecognised field '" + lexeme.str + "', possible fields: " + possibleFields + + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + parser.currentClause.fields = [lexeme.str] + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + var errorMessage = "expecting term, found nothing" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + return lunr.QueryParser.parseTerm + default: + var errorMessage = "expecting term, found '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseTerm = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + parser.currentClause.term = lexeme.str.toLowerCase() + + if (lexeme.str.indexOf("*") != -1) { + parser.currentClause.usePipeline = false + } + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + parser.nextClause() + return + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + parser.nextClause() + return lunr.QueryParser.parseTerm + case lunr.QueryLexer.FIELD: + parser.nextClause() + return lunr.QueryParser.parseField + case lunr.QueryLexer.EDIT_DISTANCE: + return lunr.QueryParser.parseEditDistance + case lunr.QueryLexer.BOOST: + return lunr.QueryParser.parseBoost + case lunr.QueryLexer.PRESENCE: + parser.nextClause() + return lunr.QueryParser.parsePresence + default: + var errorMessage = "Unexpected lexeme type '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseEditDistance = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + var editDistance = parseInt(lexeme.str, 10) + + if (isNaN(editDistance)) { + var errorMessage = "edit distance must be numeric" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + parser.currentClause.editDistance = editDistance + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + parser.nextClause() + return + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + parser.nextClause() + return lunr.QueryParser.parseTerm + case lunr.QueryLexer.FIELD: + parser.nextClause() + return lunr.QueryParser.parseField + case lunr.QueryLexer.EDIT_DISTANCE: + return lunr.QueryParser.parseEditDistance + case lunr.QueryLexer.BOOST: + return lunr.QueryParser.parseBoost + case lunr.QueryLexer.PRESENCE: + parser.nextClause() + return lunr.QueryParser.parsePresence + default: + var errorMessage = "Unexpected lexeme type '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseBoost = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + var boost = parseInt(lexeme.str, 10) + + if (isNaN(boost)) { + var errorMessage = "boost must be numeric" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + parser.currentClause.boost = boost + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + parser.nextClause() + return + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + parser.nextClause() + return lunr.QueryParser.parseTerm + case lunr.QueryLexer.FIELD: + parser.nextClause() + return lunr.QueryParser.parseField + case lunr.QueryLexer.EDIT_DISTANCE: + return lunr.QueryParser.parseEditDistance + case lunr.QueryLexer.BOOST: + return lunr.QueryParser.parseBoost + case lunr.QueryLexer.PRESENCE: + parser.nextClause() + return lunr.QueryParser.parsePresence + default: + var errorMessage = "Unexpected lexeme type '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + + /** + * export the module via AMD, CommonJS or as a browser global + * Export code from https://github.com/umdjs/umd/blob/master/returnExports.js + */ + ;(function (root, factory) { + if (typeof define === 'function' && define.amd) { + // AMD. Register as an anonymous module. + define(factory) + } else if (typeof exports === 'object') { + /** + * Node. Does not work with strict CommonJS, but + * only CommonJS-like environments that support module.exports, + * like Node. + */ + module.exports = factory() + } else { + // Browser globals (root is window) + root.lunr = factory() + } + }(this, function () { + /** + * Just return a value to define the module export. + * This example returns an object, but the module + * can return a function as the exported value. + */ + return lunr + })) +})(); diff --git a/search/main.js b/search/main.js new file mode 100644 index 00000000..a5e469d7 --- /dev/null +++ b/search/main.js @@ -0,0 +1,109 @@ +function getSearchTermFromLocation() { + var sPageURL = window.location.search.substring(1); + var sURLVariables = sPageURL.split('&'); + for (var i = 0; i < sURLVariables.length; i++) { + var sParameterName = sURLVariables[i].split('='); + if (sParameterName[0] == 'q') { + return decodeURIComponent(sParameterName[1].replace(/\+/g, '%20')); + } + } +} + +function joinUrl (base, path) { + if (path.substring(0, 1) === "/") { + // path starts with `/`. Thus it is absolute. + return path; + } + if (base.substring(base.length-1) === "/") { + // base ends with `/` + return base + path; + } + return base + "/" + path; +} + +function escapeHtml (value) { + return value.replace(/&/g, '&') + .replace(/"/g, '"') + .replace(//g, '>'); +} + +function formatResult (location, title, summary) { + return ''; +} + +function displayResults (results) { + var search_results = document.getElementById("mkdocs-search-results"); + while (search_results.firstChild) { + search_results.removeChild(search_results.firstChild); + } + if (results.length > 0){ + for (var i=0; i < results.length; i++){ + var result = results[i]; + var html = formatResult(result.location, result.title, result.summary); + search_results.insertAdjacentHTML('beforeend', html); + } + } else { + var noResultsText = search_results.getAttribute('data-no-results-text'); + if (!noResultsText) { + noResultsText = "No results found"; + } + search_results.insertAdjacentHTML('beforeend', '

' + noResultsText + '

'); + } +} + +function doSearch () { + var query = document.getElementById('mkdocs-search-query').value; + if (query.length > min_search_length) { + if (!window.Worker) { + displayResults(search(query)); + } else { + searchWorker.postMessage({query: query}); + } + } else { + // Clear results for short queries + displayResults([]); + } +} + +function initSearch () { + var search_input = document.getElementById('mkdocs-search-query'); + if (search_input) { + search_input.addEventListener("keyup", doSearch); + } + var term = getSearchTermFromLocation(); + if (term) { + search_input.value = term; + doSearch(); + } +} + +function onWorkerMessage (e) { + if (e.data.allowSearch) { + initSearch(); + } else if (e.data.results) { + var results = e.data.results; + displayResults(results); + } else if (e.data.config) { + min_search_length = e.data.config.min_search_length-1; + } +} + +if (!window.Worker) { + console.log('Web Worker API not supported'); + // load index in main thread + $.getScript(joinUrl(base_url, "search/worker.js")).done(function () { + console.log('Loaded worker'); + init(); + window.postMessage = function (msg) { + onWorkerMessage({data: msg}); + }; + }).fail(function (jqxhr, settings, exception) { + console.error('Could not load worker.js'); + }); +} else { + // Wrap search in a web worker + var searchWorker = new Worker(joinUrl(base_url, "search/worker.js")); + searchWorker.postMessage({init: true}); + searchWorker.onmessage = onWorkerMessage; +} diff --git a/search/search_index.json b/search/search_index.json new file mode 100644 index 00000000..69a296d4 --- /dev/null +++ b/search/search_index.json @@ -0,0 +1 @@ +{"config":{"indexing":"full","lang":["en"],"min_search_length":3,"prebuild_index":false,"separator":"[\\s\\-]+"},"docs":[{"location":"","text":"Unofficial LoongArch Intrinsics Guide This is the Unofficial LoongArch Intrinsics Guide by Jiajie Chen et, al. The documentation is arranged from the following sources: QEMU GCC Observations from real hardware incl. 3C5000 and 3A6000","title":"Unofficial LoongArch Intrinsics Guide"},{"location":"#unofficial-loongarch-intrinsics-guide","text":"This is the Unofficial LoongArch Intrinsics Guide by Jiajie Chen et, al. The documentation is arranged from the following sources: QEMU GCC Observations from real hardware incl. 3C5000 and 3A6000","title":"Unofficial LoongArch Intrinsics Guide"},{"location":"lsx/bitwise_operations/","text":"Bitwise Operations __m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c) #include Instruction: vbitsel.v vr, vr, vr CPU Flags: LSX Description Compute bitwise selection: for each bit position, if the bit in c equals to one, copy the bit from b to dst , otherwise copy from a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (c.dword[i] & b.dword[i]) | (~c.dword[i] & a.dword[i]); } __m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm) Synopsis __m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vbitseli.b vr, vr, imm CPU Flags: LSX Description Compute bitwise selection: for each bit position, if the bit in a equals to one, copy the bit from imm to dst , otherwise copy from b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (~a.byte[i] & b.byte[i]) | (a.byte[i] & (u8)imm); } __m128i __lsx_vbitclr_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitclr_b (__m128i a, __m128i b) #include Instruction: vbitclr.b vr, vr, vr CPU Flags: LSX Description Clear the bit specified by elements in b from 8-bit elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] & (~((u8)1 << (b.byte[i] % 8))); } Tested on real machine. __m128i __lsx_vbitclr_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitclr_h (__m128i a, __m128i b) #include Instruction: vbitclr.h vr, vr, vr CPU Flags: LSX Description Clear the bit specified by elements in b from 16-bit elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] & (~((u16)1 << (b.half[i] % 16))); } Tested on real machine. __m128i __lsx_vbitclr_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitclr_w (__m128i a, __m128i b) #include Instruction: vbitclr.w vr, vr, vr CPU Flags: LSX Description Clear the bit specified by elements in b from 32-bit elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] & (~((u32)1 << (b.word[i] % 32))); } Tested on real machine. __m128i __lsx_vbitclr_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitclr_d (__m128i a, __m128i b) #include Instruction: vbitclr.d vr, vr, vr CPU Flags: LSX Description Clear the bit specified by elements in b from 64-bit elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] & (~((u64)1 << (b.dword[i] % 64))); } Tested on real machine. __m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm) Synopsis __m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm) #include Instruction: vbitclri.b vr, vr, imm CPU Flags: LSX Description Clear the bit specified by imm from 8-bit elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] & (~((u8)1 << imm)); } Tested on real machine. __m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm) Synopsis __m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm) #include Instruction: vbitclri.h vr, vr, imm CPU Flags: LSX Description Clear the bit specified by imm from 16-bit elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] & (~((u16)1 << imm)); } Tested on real machine. __m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm) #include Instruction: vbitclri.w vr, vr, imm CPU Flags: LSX Description Clear the bit specified by imm from 32-bit elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] & (~((u32)1 << imm)); } Tested on real machine. __m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm) Synopsis __m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm) #include Instruction: vbitclri.d vr, vr, imm CPU Flags: LSX Description Clear the bit specified by imm from 64-bit elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] & (~((u64)1 << imm)); } Tested on real machine. __m128i __lsx_vbitset_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitset_b (__m128i a, __m128i b) #include Instruction: vbitset.b vr, vr, vr CPU Flags: LSX Description Set the bit specified by elements in b from 8-bit elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] | ((u8)1 << (b.byte[i] % 8)); } Tested on real machine. __m128i __lsx_vbitset_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitset_h (__m128i a, __m128i b) #include Instruction: vbitset.h vr, vr, vr CPU Flags: LSX Description Set the bit specified by elements in b from 16-bit elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] | ((u16)1 << (b.half[i] % 16)); } Tested on real machine. __m128i __lsx_vbitset_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitset_w (__m128i a, __m128i b) #include Instruction: vbitset.w vr, vr, vr CPU Flags: LSX Description Set the bit specified by elements in b from 32-bit elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] | ((u32)1 << (b.word[i] % 32)); } Tested on real machine. __m128i __lsx_vbitset_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitset_d (__m128i a, __m128i b) #include Instruction: vbitset.d vr, vr, vr CPU Flags: LSX Description Set the bit specified by elements in b from 64-bit elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | ((u64)1 << (b.dword[i] % 64)); } Tested on real machine. __m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm) Synopsis __m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm) #include Instruction: vbitseti.b vr, vr, imm CPU Flags: LSX Description Set the bit specified by imm from 8-bit elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] | ((u8)1 << imm); } Tested on real machine. __m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm) Synopsis __m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm) #include Instruction: vbitseti.h vr, vr, imm CPU Flags: LSX Description Set the bit specified by imm from 16-bit elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] | ((u16)1 << imm); } Tested on real machine. __m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm) #include Instruction: vbitseti.w vr, vr, imm CPU Flags: LSX Description Set the bit specified by imm from 32-bit elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] | ((u32)1 << imm); } Tested on real machine. __m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm) Synopsis __m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm) #include Instruction: vbitseti.d vr, vr, imm CPU Flags: LSX Description Set the bit specified by imm from 64-bit elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | ((u64)1 << imm); } Tested on real machine. __m128i __lsx_vbitrev_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitrev_b (__m128i a, __m128i b) #include Instruction: vbitrev.b vr, vr, vr CPU Flags: LSX Description Toggle the bit specified by elements in b from 8-bit elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] ^ ((u8)1 << (b.byte[i] % 8)); } Tested on real machine. __m128i __lsx_vbitrev_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitrev_h (__m128i a, __m128i b) #include Instruction: vbitrev.h vr, vr, vr CPU Flags: LSX Description Toggle the bit specified by elements in b from 16-bit elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] ^ ((u16)1 << (b.half[i] % 16)); } Tested on real machine. __m128i __lsx_vbitrev_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitrev_w (__m128i a, __m128i b) #include Instruction: vbitrev.w vr, vr, vr CPU Flags: LSX Description Toggle the bit specified by elements in b from 32-bit elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] ^ ((u32)1 << (b.word[i] % 32)); } Tested on real machine. __m128i __lsx_vbitrev_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vbitrev_d (__m128i a, __m128i b) #include Instruction: vbitrev.d vr, vr, vr CPU Flags: LSX Description Toggle the bit specified by elements in b from 64-bit elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] ^ ((u64)1 << (b.dword[i] % 64)); } Tested on real machine. __m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm) Synopsis __m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm) #include Instruction: vbitrevi.b vr, vr, imm CPU Flags: LSX Description Toggle the bit specified by imm from 8-bit elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] ^ ((u8)1 << imm); } Tested on real machine. __m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm) Synopsis __m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm) #include Instruction: vbitrevi.h vr, vr, imm CPU Flags: LSX Description Toggle the bit specified by imm from 16-bit elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] ^ ((u16)1 << imm); } Tested on real machine. __m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm) #include Instruction: vbitrevi.w vr, vr, imm CPU Flags: LSX Description Toggle the bit specified by imm from 32-bit elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] ^ ((u32)1 << imm); } Tested on real machine. __m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm) Synopsis __m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm) #include Instruction: vbitrevi.d vr, vr, imm CPU Flags: LSX Description Toggle the bit specified by imm from 64-bit elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] ^ ((u64)1 << imm); } Tested on real machine. __m128i __lsx_clo_b (__m128i a) Synopsis __m128i __lsx_clo_b (__m128i a) #include Instruction: vclo.b vr, vr CPU Flags: LSX Description Count leading ones of 8-bit elements in a . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = clo(a.byte[i]); } Tested on real machine. __m128i __lsx_clo_h (__m128i a) Synopsis __m128i __lsx_clo_h (__m128i a) #include Instruction: vclo.h vr, vr CPU Flags: LSX Description Count leading ones of 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = clo(a.half[i]); } Tested on real machine. __m128i __lsx_clo_w (__m128i a) Synopsis __m128i __lsx_clo_w (__m128i a) #include Instruction: vclo.w vr, vr CPU Flags: LSX Description Count leading ones of 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = clo(a.word[i]); } Tested on real machine. __m128i __lsx_clo_d (__m128i a) Synopsis __m128i __lsx_clo_d (__m128i a) #include Instruction: vclo.d vr, vr CPU Flags: LSX Description Count leading ones of 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = clo(a.dword[i]); } Tested on real machine. __m128i __lsx_clz_b (__m128i a) Synopsis __m128i __lsx_clz_b (__m128i a) #include Instruction: vclz.b vr, vr CPU Flags: LSX Description Count leading zeros of 8-bit elements in a . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = clz(a.byte[i]); } Tested on real machine. __m128i __lsx_clz_h (__m128i a) Synopsis __m128i __lsx_clz_h (__m128i a) #include Instruction: vclz.h vr, vr CPU Flags: LSX Description Count leading zeros of 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = clz(a.half[i]); } Tested on real machine. __m128i __lsx_clz_w (__m128i a) Synopsis __m128i __lsx_clz_w (__m128i a) #include Instruction: vclz.w vr, vr CPU Flags: LSX Description Count leading zeros of 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = clz(a.word[i]); } Tested on real machine. __m128i __lsx_clz_d (__m128i a) Synopsis __m128i __lsx_clz_d (__m128i a) #include Instruction: vclz.d vr, vr CPU Flags: LSX Description Count leading zeros of 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = clz(a.dword[i]); } Tested on real machine. __m128i __lsx_vexth_h_b (__m128i a) Synopsis __m128i __lsx_vexth_h_b (__m128i a) #include Instruction: vexth.h.b vr, vr CPU Flags: LSX Description Extend signed 8-bit elements in the higher half of a to 16-bit. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[8 + i]; } Tested on real machine. __m128i __lsx_vexth_hu_bu (__m128i a) Synopsis __m128i __lsx_vexth_hu_bu (__m128i a) #include Instruction: vexth.hu.bu vr, vr CPU Flags: LSX Description Extend unsigned 8-bit elements in the higher half of a to 16-bit. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[8 + i]; } Tested on real machine. __m128i __lsx_vexth_w_h (__m128i a) Synopsis __m128i __lsx_vexth_w_h (__m128i a) #include Instruction: vexth.w.h vr, vr CPU Flags: LSX Description Extend signed 16-bit elements in the higher half of a to 32-bit. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[4 + i]; } Tested on real machine. __m128i __lsx_vexth_wu_hu (__m128i a) Synopsis __m128i __lsx_vexth_wu_hu (__m128i a) #include Instruction: vexth.wu.hu vr, vr CPU Flags: LSX Description Extend unsigned 16-bit elements in the higher half of a to 32-bit. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[4 + i]; } Tested on real machine. __m128i __lsx_vexth_d_w (__m128i a) Synopsis __m128i __lsx_vexth_d_w (__m128i a) #include Instruction: vexth.d.w vr, vr CPU Flags: LSX Description Extend signed 32-bit elements in the higher half of a to 64-bit. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 + i]; } Tested on real machine. __m128i __lsx_vexth_du_wu (__m128i a) Synopsis __m128i __lsx_vexth_du_wu (__m128i a) #include Instruction: vexth.du.wu vr, vr CPU Flags: LSX Description Extend unsigned 32-bit elements in the higher half of a to 64-bit. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 + i]; } Tested on real machine. __m128i __lsx_vexth_q_d (__m128i a) Synopsis __m128i __lsx_vexth_q_d (__m128i a) #include Instruction: vexth.q.d vr, vr CPU Flags: LSX Description Extend signed 64-bit elements in the higher half of a to 128-bit. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[1 + i]; } Tested on real machine. __m128i __lsx_vexth_qu_du (__m128i a) Synopsis __m128i __lsx_vexth_qu_du (__m128i a) #include Instruction: vexth.qu.du vr, vr CPU Flags: LSX Description Extend unsigned 64-bit elements in the higher half of a to 128-bit. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[1 + i]; } Tested on real machine. __m128i __lsx_vextl_q_d (__m128i a) Synopsis __m128i __lsx_vextl_q_d (__m128i a) #include Instruction: vextl.q.d vr, vr CPU Flags: LSX Description Extend signed 64-bit elements in the lower half of a to 128-bit. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[i]; } Tested on real machine. __m128i __lsx_vextl_qu_du (__m128i a) Synopsis __m128i __lsx_vextl_qu_du (__m128i a) #include Instruction: vextl.qu.du vr, vr CPU Flags: LSX Description Extend unsigned 64-bit elements in the lower half of a to 128-bit. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[i]; } Tested on real machine. __m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm) Synopsis __m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.b vr, vr, imm CPU Flags: LSX Description Extract one 8-bit element in b and insert it to a according to imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i == ((imm >> 4) & 15)) ? b.byte[imm & 15] : a.byte[i]; } Tested on real machine. __m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm) Synopsis __m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.h vr, vr, imm CPU Flags: LSX Description Extract one 16-bit element in b and insert it to a according to imm . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i == ((imm >> 4) & 7)) ? b.half[imm & 7] : a.half[i]; } Tested on real machine. __m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm) Synopsis __m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.w vr, vr, imm CPU Flags: LSX Description Extract one 32-bit element in b and insert it to a according to imm . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i == ((imm >> 4) & 3)) ? b.word[imm & 3] : a.word[i]; } Tested on real machine. __m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm) Synopsis __m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.d vr, vr, imm CPU Flags: LSX Description Extract one 64-bit element in b and insert it to a according to imm . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i == ((imm >> 4) & 1)) ? b.dword[imm & 1] : a.dword[i]; } Tested on real machine. __m128i __lsx_pcnt_b (__m128i a) Synopsis __m128i __lsx_pcnt_b (__m128i a) #include Instruction: vpcnt.b vr, vr CPU Flags: LSX Description Count the number of ones in 8-bit elements in a . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = popcount(a.byte[i]); } Tested on real machine. __m128i __lsx_pcnt_h (__m128i a) Synopsis __m128i __lsx_pcnt_h (__m128i a) #include Instruction: vpcnt.h vr, vr CPU Flags: LSX Description Count the number of ones in 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = popcount(a.half[i]); } Tested on real machine. __m128i __lsx_pcnt_w (__m128i a) Synopsis __m128i __lsx_pcnt_w (__m128i a) #include Instruction: vpcnt.w vr, vr CPU Flags: LSX Description Count the number of ones in 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = popcount(a.word[i]); } Tested on real machine. __m128i __lsx_pcnt_d (__m128i a) Synopsis __m128i __lsx_pcnt_d (__m128i a) #include Instruction: vpcnt.d vr, vr CPU Flags: LSX Description Count the number of ones in 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = popcount(a.dword[i]); } Tested on real machine.","title":"Bitwise Operations"},{"location":"lsx/bitwise_operations/#bitwise-operations","text":"","title":"Bitwise Operations"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitsel_v-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/bitwise_operations/#synopsis","text":"__m128i __lsx_vbitsel_v (__m128i a, __m128i b, __m128i c) #include Instruction: vbitsel.v vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description","text":"Compute bitwise selection: for each bit position, if the bit in c equals to one, copy the bit from b to dst , otherwise copy from a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (c.dword[i] & b.dword[i]) | (~c.dword[i] & a.dword[i]); }","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitseli_b-__m128i-a-__m128i-b-imm0_255-imm","text":"","title":"__m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm)"},{"location":"lsx/bitwise_operations/#synopsis_1","text":"__m128i __lsx_vbitseli_b (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vbitseli.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_1","text":"Compute bitwise selection: for each bit position, if the bit in a equals to one, copy the bit from imm to dst , otherwise copy from b .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_1","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (~a.byte[i] & b.byte[i]) | (a.byte[i] & (u8)imm); }","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclr_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitclr_b (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_2","text":"__m128i __lsx_vbitclr_b (__m128i a, __m128i b) #include Instruction: vbitclr.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_2","text":"Clear the bit specified by elements in b from 8-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_2","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] & (~((u8)1 << (b.byte[i] % 8))); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclr_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitclr_h (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_3","text":"__m128i __lsx_vbitclr_h (__m128i a, __m128i b) #include Instruction: vbitclr.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_3","text":"Clear the bit specified by elements in b from 16-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_3","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] & (~((u16)1 << (b.half[i] % 16))); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclr_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitclr_w (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_4","text":"__m128i __lsx_vbitclr_w (__m128i a, __m128i b) #include Instruction: vbitclr.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_4","text":"Clear the bit specified by elements in b from 32-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_4","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] & (~((u32)1 << (b.word[i] % 32))); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclr_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitclr_d (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_5","text":"__m128i __lsx_vbitclr_d (__m128i a, __m128i b) #include Instruction: vbitclr.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_5","text":"Clear the bit specified by elements in b from 64-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_5","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] & (~((u64)1 << (b.dword[i] % 64))); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclri_b-__m128i-a-imm0_7-imm","text":"","title":"__m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm)"},{"location":"lsx/bitwise_operations/#synopsis_6","text":"__m128i __lsx_vbitclri_b (__m128i a, imm0_7 imm) #include Instruction: vbitclri.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_6","text":"Clear the bit specified by imm from 8-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_6","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] & (~((u8)1 << imm)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclri_h-__m128i-a-imm0_15-imm","text":"","title":"__m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm)"},{"location":"lsx/bitwise_operations/#synopsis_7","text":"__m128i __lsx_vbitclri_h (__m128i a, imm0_15 imm) #include Instruction: vbitclri.h vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_7","text":"Clear the bit specified by imm from 16-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_7","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] & (~((u16)1 << imm)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclri_w-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm)"},{"location":"lsx/bitwise_operations/#synopsis_8","text":"__m128i __lsx_vbitclri_w (__m128i a, imm0_31 imm) #include Instruction: vbitclri.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_8","text":"Clear the bit specified by imm from 32-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_8","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] & (~((u32)1 << imm)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitclri_d-__m128i-a-imm0_63-imm","text":"","title":"__m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm)"},{"location":"lsx/bitwise_operations/#synopsis_9","text":"__m128i __lsx_vbitclri_d (__m128i a, imm0_63 imm) #include Instruction: vbitclri.d vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_9","text":"Clear the bit specified by imm from 64-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_9","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] & (~((u64)1 << imm)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitset_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitset_b (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_10","text":"__m128i __lsx_vbitset_b (__m128i a, __m128i b) #include Instruction: vbitset.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_10","text":"Set the bit specified by elements in b from 8-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_10","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] | ((u8)1 << (b.byte[i] % 8)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitset_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitset_h (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_11","text":"__m128i __lsx_vbitset_h (__m128i a, __m128i b) #include Instruction: vbitset.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_11","text":"Set the bit specified by elements in b from 16-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_11","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] | ((u16)1 << (b.half[i] % 16)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitset_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitset_w (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_12","text":"__m128i __lsx_vbitset_w (__m128i a, __m128i b) #include Instruction: vbitset.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_12","text":"Set the bit specified by elements in b from 32-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_12","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] | ((u32)1 << (b.word[i] % 32)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitset_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitset_d (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_13","text":"__m128i __lsx_vbitset_d (__m128i a, __m128i b) #include Instruction: vbitset.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_13","text":"Set the bit specified by elements in b from 64-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_13","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | ((u64)1 << (b.dword[i] % 64)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitseti_b-__m128i-a-imm0_7-imm","text":"","title":"__m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm)"},{"location":"lsx/bitwise_operations/#synopsis_14","text":"__m128i __lsx_vbitseti_b (__m128i a, imm0_7 imm) #include Instruction: vbitseti.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_14","text":"Set the bit specified by imm from 8-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_14","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] | ((u8)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitseti_h-__m128i-a-imm0_15-imm","text":"","title":"__m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm)"},{"location":"lsx/bitwise_operations/#synopsis_15","text":"__m128i __lsx_vbitseti_h (__m128i a, imm0_15 imm) #include Instruction: vbitseti.h vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_15","text":"Set the bit specified by imm from 16-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_15","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] | ((u16)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitseti_w-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm)"},{"location":"lsx/bitwise_operations/#synopsis_16","text":"__m128i __lsx_vbitseti_w (__m128i a, imm0_31 imm) #include Instruction: vbitseti.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_16","text":"Set the bit specified by imm from 32-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_16","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] | ((u32)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitseti_d-__m128i-a-imm0_63-imm","text":"","title":"__m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm)"},{"location":"lsx/bitwise_operations/#synopsis_17","text":"__m128i __lsx_vbitseti_d (__m128i a, imm0_63 imm) #include Instruction: vbitseti.d vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_17","text":"Set the bit specified by imm from 64-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_17","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | ((u64)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrev_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitrev_b (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_18","text":"__m128i __lsx_vbitrev_b (__m128i a, __m128i b) #include Instruction: vbitrev.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_18","text":"Toggle the bit specified by elements in b from 8-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_18","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] ^ ((u8)1 << (b.byte[i] % 8)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrev_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitrev_h (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_19","text":"__m128i __lsx_vbitrev_h (__m128i a, __m128i b) #include Instruction: vbitrev.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_19","text":"Toggle the bit specified by elements in b from 16-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_19","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] ^ ((u16)1 << (b.half[i] % 16)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrev_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitrev_w (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_20","text":"__m128i __lsx_vbitrev_w (__m128i a, __m128i b) #include Instruction: vbitrev.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_20","text":"Toggle the bit specified by elements in b from 32-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_20","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] ^ ((u32)1 << (b.word[i] % 32)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrev_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vbitrev_d (__m128i a, __m128i b)"},{"location":"lsx/bitwise_operations/#synopsis_21","text":"__m128i __lsx_vbitrev_d (__m128i a, __m128i b) #include Instruction: vbitrev.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_21","text":"Toggle the bit specified by elements in b from 64-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_21","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] ^ ((u64)1 << (b.dword[i] % 64)); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrevi_b-__m128i-a-imm0_7-imm","text":"","title":"__m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm)"},{"location":"lsx/bitwise_operations/#synopsis_22","text":"__m128i __lsx_vbitrevi_b (__m128i a, imm0_7 imm) #include Instruction: vbitrevi.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_22","text":"Toggle the bit specified by imm from 8-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_22","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] ^ ((u8)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrevi_h-__m128i-a-imm0_15-imm","text":"","title":"__m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm)"},{"location":"lsx/bitwise_operations/#synopsis_23","text":"__m128i __lsx_vbitrevi_h (__m128i a, imm0_15 imm) #include Instruction: vbitrevi.h vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_23","text":"Toggle the bit specified by imm from 16-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_23","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] ^ ((u16)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrevi_w-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm)"},{"location":"lsx/bitwise_operations/#synopsis_24","text":"__m128i __lsx_vbitrevi_w (__m128i a, imm0_31 imm) #include Instruction: vbitrevi.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_24","text":"Toggle the bit specified by imm from 32-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_24","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] ^ ((u32)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vbitrevi_d-__m128i-a-imm0_63-imm","text":"","title":"__m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm)"},{"location":"lsx/bitwise_operations/#synopsis_25","text":"__m128i __lsx_vbitrevi_d (__m128i a, imm0_63 imm) #include Instruction: vbitrevi.d vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_25","text":"Toggle the bit specified by imm from 64-bit elements in a , save the result in dst .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_25","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] ^ ((u64)1 << imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clo_b-__m128i-a","text":"","title":"__m128i __lsx_clo_b (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_26","text":"__m128i __lsx_clo_b (__m128i a) #include Instruction: vclo.b vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_26","text":"Count leading ones of 8-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_26","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = clo(a.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clo_h-__m128i-a","text":"","title":"__m128i __lsx_clo_h (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_27","text":"__m128i __lsx_clo_h (__m128i a) #include Instruction: vclo.h vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_27","text":"Count leading ones of 16-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_27","text":"for (int i = 0; i < 8; i++) { dst.half[i] = clo(a.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clo_w-__m128i-a","text":"","title":"__m128i __lsx_clo_w (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_28","text":"__m128i __lsx_clo_w (__m128i a) #include Instruction: vclo.w vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_28","text":"Count leading ones of 32-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_28","text":"for (int i = 0; i < 4; i++) { dst.word[i] = clo(a.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clo_d-__m128i-a","text":"","title":"__m128i __lsx_clo_d (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_29","text":"__m128i __lsx_clo_d (__m128i a) #include Instruction: vclo.d vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_29","text":"Count leading ones of 64-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_29","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = clo(a.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clz_b-__m128i-a","text":"","title":"__m128i __lsx_clz_b (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_30","text":"__m128i __lsx_clz_b (__m128i a) #include Instruction: vclz.b vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_30","text":"Count leading zeros of 8-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_30","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = clz(a.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clz_h-__m128i-a","text":"","title":"__m128i __lsx_clz_h (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_31","text":"__m128i __lsx_clz_h (__m128i a) #include Instruction: vclz.h vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_31","text":"Count leading zeros of 16-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_31","text":"for (int i = 0; i < 8; i++) { dst.half[i] = clz(a.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clz_w-__m128i-a","text":"","title":"__m128i __lsx_clz_w (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_32","text":"__m128i __lsx_clz_w (__m128i a) #include Instruction: vclz.w vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_32","text":"Count leading zeros of 32-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_32","text":"for (int i = 0; i < 4; i++) { dst.word[i] = clz(a.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_clz_d-__m128i-a","text":"","title":"__m128i __lsx_clz_d (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_33","text":"__m128i __lsx_clz_d (__m128i a) #include Instruction: vclz.d vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_33","text":"Count leading zeros of 64-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_33","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = clz(a.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_h_b-__m128i-a","text":"","title":"__m128i __lsx_vexth_h_b (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_34","text":"__m128i __lsx_vexth_h_b (__m128i a) #include Instruction: vexth.h.b vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_34","text":"Extend signed 8-bit elements in the higher half of a to 16-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_34","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[8 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_hu_bu-__m128i-a","text":"","title":"__m128i __lsx_vexth_hu_bu (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_35","text":"__m128i __lsx_vexth_hu_bu (__m128i a) #include Instruction: vexth.hu.bu vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_35","text":"Extend unsigned 8-bit elements in the higher half of a to 16-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_35","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[8 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_w_h-__m128i-a","text":"","title":"__m128i __lsx_vexth_w_h (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_36","text":"__m128i __lsx_vexth_w_h (__m128i a) #include Instruction: vexth.w.h vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_36","text":"Extend signed 16-bit elements in the higher half of a to 32-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_36","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[4 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_wu_hu-__m128i-a","text":"","title":"__m128i __lsx_vexth_wu_hu (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_37","text":"__m128i __lsx_vexth_wu_hu (__m128i a) #include Instruction: vexth.wu.hu vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_37","text":"Extend unsigned 16-bit elements in the higher half of a to 32-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_37","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[4 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_d_w-__m128i-a","text":"","title":"__m128i __lsx_vexth_d_w (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_38","text":"__m128i __lsx_vexth_d_w (__m128i a) #include Instruction: vexth.d.w vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_38","text":"Extend signed 32-bit elements in the higher half of a to 64-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_38","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_du_wu-__m128i-a","text":"","title":"__m128i __lsx_vexth_du_wu (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_39","text":"__m128i __lsx_vexth_du_wu (__m128i a) #include Instruction: vexth.du.wu vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_39","text":"Extend unsigned 32-bit elements in the higher half of a to 64-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_39","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_q_d-__m128i-a","text":"","title":"__m128i __lsx_vexth_q_d (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_40","text":"__m128i __lsx_vexth_q_d (__m128i a) #include Instruction: vexth.q.d vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_40","text":"Extend signed 64-bit elements in the higher half of a to 128-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_40","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[1 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vexth_qu_du-__m128i-a","text":"","title":"__m128i __lsx_vexth_qu_du (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_41","text":"__m128i __lsx_vexth_qu_du (__m128i a) #include Instruction: vexth.qu.du vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_41","text":"Extend unsigned 64-bit elements in the higher half of a to 128-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_41","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[1 + i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vextl_q_d-__m128i-a","text":"","title":"__m128i __lsx_vextl_q_d (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_42","text":"__m128i __lsx_vextl_q_d (__m128i a) #include Instruction: vextl.q.d vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_42","text":"Extend signed 64-bit elements in the lower half of a to 128-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_42","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vextl_qu_du-__m128i-a","text":"","title":"__m128i __lsx_vextl_qu_du (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_43","text":"__m128i __lsx_vextl_qu_du (__m128i a) #include Instruction: vextl.qu.du vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_43","text":"Extend unsigned 64-bit elements in the lower half of a to 128-bit.","title":"Description"},{"location":"lsx/bitwise_operations/#operation_43","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vextrins_b-__m128i-a-__m128i-b-imm0_255-imm","text":"","title":"__m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm)"},{"location":"lsx/bitwise_operations/#synopsis_44","text":"__m128i __lsx_vextrins_b (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_44","text":"Extract one 8-bit element in b and insert it to a according to imm .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_44","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i == ((imm >> 4) & 15)) ? b.byte[imm & 15] : a.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vextrins_h-__m128i-a-__m128i-b-imm0_255-imm","text":"","title":"__m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm)"},{"location":"lsx/bitwise_operations/#synopsis_45","text":"__m128i __lsx_vextrins_h (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.h vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_45","text":"Extract one 16-bit element in b and insert it to a according to imm .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_45","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i == ((imm >> 4) & 7)) ? b.half[imm & 7] : a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vextrins_w-__m128i-a-__m128i-b-imm0_255-imm","text":"","title":"__m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm)"},{"location":"lsx/bitwise_operations/#synopsis_46","text":"__m128i __lsx_vextrins_w (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_46","text":"Extract one 32-bit element in b and insert it to a according to imm .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_46","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i == ((imm >> 4) & 3)) ? b.word[imm & 3] : a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_vextrins_d-__m128i-a-__m128i-b-imm0_255-imm","text":"","title":"__m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm)"},{"location":"lsx/bitwise_operations/#synopsis_47","text":"__m128i __lsx_vextrins_d (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vextrins.d vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_47","text":"Extract one 64-bit element in b and insert it to a according to imm .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_47","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i == ((imm >> 4) & 1)) ? b.dword[imm & 1] : a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_pcnt_b-__m128i-a","text":"","title":"__m128i __lsx_pcnt_b (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_48","text":"__m128i __lsx_pcnt_b (__m128i a) #include Instruction: vpcnt.b vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_48","text":"Count the number of ones in 8-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_48","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = popcount(a.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_pcnt_h-__m128i-a","text":"","title":"__m128i __lsx_pcnt_h (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_49","text":"__m128i __lsx_pcnt_h (__m128i a) #include Instruction: vpcnt.h vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_49","text":"Count the number of ones in 16-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_49","text":"for (int i = 0; i < 8; i++) { dst.half[i] = popcount(a.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_pcnt_w-__m128i-a","text":"","title":"__m128i __lsx_pcnt_w (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_50","text":"__m128i __lsx_pcnt_w (__m128i a) #include Instruction: vpcnt.w vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_50","text":"Count the number of ones in 32-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_50","text":"for (int i = 0; i < 4; i++) { dst.word[i] = popcount(a.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/bitwise_operations/#__m128i-__lsx_pcnt_d-__m128i-a","text":"","title":"__m128i __lsx_pcnt_d (__m128i a)"},{"location":"lsx/bitwise_operations/#synopsis_51","text":"__m128i __lsx_pcnt_d (__m128i a) #include Instruction: vpcnt.d vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/bitwise_operations/#description_51","text":"Count the number of ones in 64-bit elements in a .","title":"Description"},{"location":"lsx/bitwise_operations/#operation_51","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = popcount(a.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/float_comparison/","text":"Floating Point Comparison __m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b) #include Instruction: vfcmp.caf.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_caf(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b) #include Instruction: vfcmp.caf.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_caf(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b) #include Instruction: vfcmp.ceq.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_ceq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b) #include Instruction: vfcmp.ceq.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_ceq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b) #include Instruction: vfcmp.cle.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cle(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b) #include Instruction: vfcmp.cle.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cle(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b) #include Instruction: vfcmp.clt.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_clt(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b) #include Instruction: vfcmp.clt.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_clt(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b) #include Instruction: vfcmp.cne.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cne(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b) #include Instruction: vfcmp.cne.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cne(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b) #include Instruction: vfcmp.cor.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cor(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b) #include Instruction: vfcmp.cor.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cor(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b) #include Instruction: vfcmp.cueq.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cueq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b) #include Instruction: vfcmp.cueq.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cueq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b) #include Instruction: vfcmp.cule.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cule(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b) #include Instruction: vfcmp.cule.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cule(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b) #include Instruction: vfcmp.cult.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cult(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b) #include Instruction: vfcmp.cult.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cult(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b) #include Instruction: vfcmp.cun.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cun(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b) #include Instruction: vfcmp.cun.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cun(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b) #include Instruction: vfcmp.cune.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_cune(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b) #include Instruction: vfcmp.cune.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Do not trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_cune(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b) #include Instruction: vfcmp.saf.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_saf(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b) #include Instruction: vfcmp.saf.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_saf(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b) #include Instruction: vfcmp.seq.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_seq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b) #include Instruction: vfcmp.seq.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_seq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b) #include Instruction: vfcmp.sle.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sle(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b) #include Instruction: vfcmp.sle.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sle(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b) #include Instruction: vfcmp.slt.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_slt(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b) #include Instruction: vfcmp.slt.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_slt(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b) #include Instruction: vfcmp.sne.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sne(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b) #include Instruction: vfcmp.sne.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sne(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b) #include Instruction: vfcmp.sor.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sor(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b) #include Instruction: vfcmp.sor.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sor(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b) #include Instruction: vfcmp.sueq.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sueq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b) #include Instruction: vfcmp.sueq.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sueq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b) #include Instruction: vfcmp.sule.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sule(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b) #include Instruction: vfcmp.sule.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sule(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b) #include Instruction: vfcmp.sult.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sult(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b) #include Instruction: vfcmp.sult.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sult(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b) #include Instruction: vfcmp.sun.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sun(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b) #include Instruction: vfcmp.sun.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sun(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b) Synopsis __m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b) #include Instruction: vfcmp.sune.s vr, vr, vr CPU Flags: LSX Description Compare single precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 4;i++) { if (fp_compare_sune(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } } __m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b) Synopsis __m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b) #include Instruction: vfcmp.sune.d vr, vr, vr CPU Flags: LSX Description Compare double precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Trap for QNaN. Operation for (int i = 0;i < 2;i++) { if (fp_compare_sune(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Floating Point Comparison"},{"location":"lsx/float_comparison/#floating-point-comparison","text":"","title":"Floating Point Comparison"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_caf_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis","text":"__m128i __lsx_vfcmp_caf_s (__m128 a, __m128 b) #include Instruction: vfcmp.caf.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description","text":"Compare single precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation","text":"for (int i = 0;i < 4;i++) { if (fp_compare_caf(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_caf_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_1","text":"__m128i __lsx_vfcmp_caf_d (__m128d a, __m128d b) #include Instruction: vfcmp.caf.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_1","text":"Compare double precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_1","text":"for (int i = 0;i < 2;i++) { if (fp_compare_caf(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_ceq_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_2","text":"__m128i __lsx_vfcmp_ceq_s (__m128 a, __m128 b) #include Instruction: vfcmp.ceq.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_2","text":"Compare single precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_2","text":"for (int i = 0;i < 4;i++) { if (fp_compare_ceq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_ceq_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_3","text":"__m128i __lsx_vfcmp_ceq_d (__m128d a, __m128d b) #include Instruction: vfcmp.ceq.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_3","text":"Compare double precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_3","text":"for (int i = 0;i < 2;i++) { if (fp_compare_ceq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cle_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_4","text":"__m128i __lsx_vfcmp_cle_s (__m128 a, __m128 b) #include Instruction: vfcmp.cle.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_4","text":"Compare single precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_4","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cle(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cle_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_5","text":"__m128i __lsx_vfcmp_cle_d (__m128d a, __m128d b) #include Instruction: vfcmp.cle.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_5","text":"Compare double precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_5","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cle(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_clt_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_6","text":"__m128i __lsx_vfcmp_clt_s (__m128 a, __m128 b) #include Instruction: vfcmp.clt.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_6","text":"Compare single precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_6","text":"for (int i = 0;i < 4;i++) { if (fp_compare_clt(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_clt_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_7","text":"__m128i __lsx_vfcmp_clt_d (__m128d a, __m128d b) #include Instruction: vfcmp.clt.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_7","text":"Compare double precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_7","text":"for (int i = 0;i < 2;i++) { if (fp_compare_clt(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cne_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_8","text":"__m128i __lsx_vfcmp_cne_s (__m128 a, __m128 b) #include Instruction: vfcmp.cne.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_8","text":"Compare single precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_8","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cne(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cne_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_9","text":"__m128i __lsx_vfcmp_cne_d (__m128d a, __m128d b) #include Instruction: vfcmp.cne.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_9","text":"Compare double precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_9","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cne(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cor_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_10","text":"__m128i __lsx_vfcmp_cor_s (__m128 a, __m128 b) #include Instruction: vfcmp.cor.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_10","text":"Compare single precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_10","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cor(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cor_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_11","text":"__m128i __lsx_vfcmp_cor_d (__m128d a, __m128d b) #include Instruction: vfcmp.cor.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_11","text":"Compare double precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_11","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cor(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cueq_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_12","text":"__m128i __lsx_vfcmp_cueq_s (__m128 a, __m128 b) #include Instruction: vfcmp.cueq.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_12","text":"Compare single precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_12","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cueq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cueq_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_13","text":"__m128i __lsx_vfcmp_cueq_d (__m128d a, __m128d b) #include Instruction: vfcmp.cueq.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_13","text":"Compare double precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_13","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cueq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cule_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_14","text":"__m128i __lsx_vfcmp_cule_s (__m128 a, __m128 b) #include Instruction: vfcmp.cule.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_14","text":"Compare single precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_14","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cule(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cule_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_15","text":"__m128i __lsx_vfcmp_cule_d (__m128d a, __m128d b) #include Instruction: vfcmp.cule.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_15","text":"Compare double precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_15","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cule(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cult_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_16","text":"__m128i __lsx_vfcmp_cult_s (__m128 a, __m128 b) #include Instruction: vfcmp.cult.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_16","text":"Compare single precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_16","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cult(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cult_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_17","text":"__m128i __lsx_vfcmp_cult_d (__m128d a, __m128d b) #include Instruction: vfcmp.cult.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_17","text":"Compare double precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_17","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cult(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cun_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_18","text":"__m128i __lsx_vfcmp_cun_s (__m128 a, __m128 b) #include Instruction: vfcmp.cun.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_18","text":"Compare single precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_18","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cun(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cun_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_19","text":"__m128i __lsx_vfcmp_cun_d (__m128d a, __m128d b) #include Instruction: vfcmp.cun.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_19","text":"Compare double precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_19","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cun(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cune_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_20","text":"__m128i __lsx_vfcmp_cune_s (__m128 a, __m128 b) #include Instruction: vfcmp.cune.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_20","text":"Compare single precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_20","text":"for (int i = 0;i < 4;i++) { if (fp_compare_cune(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_cune_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_21","text":"__m128i __lsx_vfcmp_cune_d (__m128d a, __m128d b) #include Instruction: vfcmp.cune.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_21","text":"Compare double precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Do not trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_21","text":"for (int i = 0;i < 2;i++) { if (fp_compare_cune(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_saf_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_22","text":"__m128i __lsx_vfcmp_saf_s (__m128 a, __m128 b) #include Instruction: vfcmp.saf.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_22","text":"Compare single precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_22","text":"for (int i = 0;i < 4;i++) { if (fp_compare_saf(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_saf_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_23","text":"__m128i __lsx_vfcmp_saf_d (__m128d a, __m128d b) #include Instruction: vfcmp.saf.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_23","text":"Compare double precision elements in a and b , save the comparison result (all ones if AF(Always False), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_23","text":"for (int i = 0;i < 2;i++) { if (fp_compare_saf(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_seq_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_24","text":"__m128i __lsx_vfcmp_seq_s (__m128 a, __m128 b) #include Instruction: vfcmp.seq.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_24","text":"Compare single precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_24","text":"for (int i = 0;i < 4;i++) { if (fp_compare_seq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_seq_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_25","text":"__m128i __lsx_vfcmp_seq_d (__m128d a, __m128d b) #include Instruction: vfcmp.seq.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_25","text":"Compare double precision elements in a and b , save the comparison result (all ones if EQ(Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_25","text":"for (int i = 0;i < 2;i++) { if (fp_compare_seq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sle_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_26","text":"__m128i __lsx_vfcmp_sle_s (__m128 a, __m128 b) #include Instruction: vfcmp.sle.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_26","text":"Compare single precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_26","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sle(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sle_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_27","text":"__m128i __lsx_vfcmp_sle_d (__m128d a, __m128d b) #include Instruction: vfcmp.sle.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_27","text":"Compare double precision elements in a and b , save the comparison result (all ones if LE(Less than or Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_27","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sle(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_slt_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_28","text":"__m128i __lsx_vfcmp_slt_s (__m128 a, __m128 b) #include Instruction: vfcmp.slt.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_28","text":"Compare single precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_28","text":"for (int i = 0;i < 4;i++) { if (fp_compare_slt(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_slt_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_29","text":"__m128i __lsx_vfcmp_slt_d (__m128d a, __m128d b) #include Instruction: vfcmp.slt.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_29","text":"Compare double precision elements in a and b , save the comparison result (all ones if LT(Less than), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_29","text":"for (int i = 0;i < 2;i++) { if (fp_compare_slt(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sne_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_30","text":"__m128i __lsx_vfcmp_sne_s (__m128 a, __m128 b) #include Instruction: vfcmp.sne.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_30","text":"Compare single precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_30","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sne(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sne_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_31","text":"__m128i __lsx_vfcmp_sne_d (__m128d a, __m128d b) #include Instruction: vfcmp.sne.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_31","text":"Compare double precision elements in a and b , save the comparison result (all ones if NE(Not Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_31","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sne(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sor_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_32","text":"__m128i __lsx_vfcmp_sor_s (__m128 a, __m128 b) #include Instruction: vfcmp.sor.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_32","text":"Compare single precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_32","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sor(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sor_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_33","text":"__m128i __lsx_vfcmp_sor_d (__m128d a, __m128d b) #include Instruction: vfcmp.sor.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_33","text":"Compare double precision elements in a and b , save the comparison result (all ones if OR(Ordered), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_33","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sor(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sueq_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_34","text":"__m128i __lsx_vfcmp_sueq_s (__m128 a, __m128 b) #include Instruction: vfcmp.sueq.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_34","text":"Compare single precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_34","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sueq(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sueq_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_35","text":"__m128i __lsx_vfcmp_sueq_d (__m128d a, __m128d b) #include Instruction: vfcmp.sueq.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_35","text":"Compare double precision elements in a and b , save the comparison result (all ones if UEQ(Unordered or Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_35","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sueq(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sule_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_36","text":"__m128i __lsx_vfcmp_sule_s (__m128 a, __m128 b) #include Instruction: vfcmp.sule.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_36","text":"Compare single precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_36","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sule(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sule_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_37","text":"__m128i __lsx_vfcmp_sule_d (__m128d a, __m128d b) #include Instruction: vfcmp.sule.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_37","text":"Compare double precision elements in a and b , save the comparison result (all ones if ULE(Unordered, Less than or Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_37","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sule(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sult_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_38","text":"__m128i __lsx_vfcmp_sult_s (__m128 a, __m128 b) #include Instruction: vfcmp.sult.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_38","text":"Compare single precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_38","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sult(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sult_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_39","text":"__m128i __lsx_vfcmp_sult_d (__m128d a, __m128d b) #include Instruction: vfcmp.sult.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_39","text":"Compare double precision elements in a and b , save the comparison result (all ones if ULT(Unordered or Less than), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_39","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sult(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sun_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_40","text":"__m128i __lsx_vfcmp_sun_s (__m128 a, __m128 b) #include Instruction: vfcmp.sun.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_40","text":"Compare single precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_40","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sun(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sun_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_41","text":"__m128i __lsx_vfcmp_sun_d (__m128d a, __m128d b) #include Instruction: vfcmp.sun.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_41","text":"Compare double precision elements in a and b , save the comparison result (all ones if UN(Unordered), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_41","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sun(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sune_s-__m128-a-__m128-b","text":"","title":"__m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b)"},{"location":"lsx/float_comparison/#synopsis_42","text":"__m128i __lsx_vfcmp_sune_s (__m128 a, __m128 b) #include Instruction: vfcmp.sune.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_42","text":"Compare single precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_42","text":"for (int i = 0;i < 4;i++) { if (fp_compare_sune(a.fp32[i], b.fp32[i])) { dst.word[i] = 0xFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_comparison/#__m128i-__lsx_vfcmp_sune_d-__m128d-a-__m128d-b","text":"","title":"__m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b)"},{"location":"lsx/float_comparison/#synopsis_43","text":"__m128i __lsx_vfcmp_sune_d (__m128d a, __m128d b) #include Instruction: vfcmp.sune.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_comparison/#description_43","text":"Compare double precision elements in a and b , save the comparison result (all ones if UNE(Unordered or Not Equal), all zeros otherwise) into dst . Trap for QNaN.","title":"Description"},{"location":"lsx/float_comparison/#operation_43","text":"for (int i = 0;i < 2;i++) { if (fp_compare_sune(a.fp64[i], b.fp64[i])) { dst.word[i] = 0xFFFFFFFFFFFFFFFF; } else { dst.word[i] = 0; } }","title":"Operation"},{"location":"lsx/float_computation/","text":"Floating Point Computation __m128d __lsx_vfadd_d (__m128d a, __m128d b) Synopsis __m128d __lsx_vfadd_d (__m128d a, __m128d b) #include Instruction: vfadd.d vr, vr, vr CPU Flags: LSX Description Add double precision floating point elements in a to b and store the result in dst . Operation for (int i = 0;i < 2;i++) { dst.fp64[i] = a.fp64[i] + b.fp64[i]; } __m128 __lsx_vfadd_s (__m128 a, __m128 b) Synopsis __m128d __lsx_vfadd_s (__m128d a, __m128d b) #include Instruction: vfadd.s vr, vr, vr CPU Flags: LSX Description Add single precision floating point elements in a to b and store the result in dst . Operation for (int i = 0;i < 4;i++) { dst.fp32[i] = a.fp32[i] + b.fp32[i]; } __m128 __lsx_vfdiv_s (__m128 a, __m128 b) Synopsis __m128 __lsx_vfdiv_s (__m128 a, __m128 b) #include Instruction: vfdiv.s vr, vr, vr CPU Flags: LSX Description Divide __m128 precision floating point elements in a by elements in b . Operation for (int i = 0; i < 2; i++) { dst.fp32[i] = a.fp32[i] / b.fp32[i]; } __m128d __lsx_vfdiv_d (__m128d a, __m128d b) Synopsis __m128d __lsx_vfdiv_d (__m128d a, __m128d b) #include Instruction: vfdiv.d vr, vr, vr CPU Flags: LSX Description Divide __m128d precision floating point elements in a by elements in b . Operation for (int i = 0; i < 2; i++) { dst.fp64[i] = a.fp64[i] / b.fp64[i]; }","title":"Floating Point Computation"},{"location":"lsx/float_computation/#floating-point-computation","text":"","title":"Floating Point Computation"},{"location":"lsx/float_computation/#__m128d-__lsx_vfadd_d-__m128d-a-__m128d-b","text":"","title":"__m128d __lsx_vfadd_d (__m128d a, __m128d b)"},{"location":"lsx/float_computation/#synopsis","text":"__m128d __lsx_vfadd_d (__m128d a, __m128d b) #include Instruction: vfadd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_computation/#description","text":"Add double precision floating point elements in a to b and store the result in dst .","title":"Description"},{"location":"lsx/float_computation/#operation","text":"for (int i = 0;i < 2;i++) { dst.fp64[i] = a.fp64[i] + b.fp64[i]; }","title":"Operation"},{"location":"lsx/float_computation/#__m128-__lsx_vfadd_s-__m128-a-__m128-b","text":"","title":"__m128 __lsx_vfadd_s (__m128 a, __m128 b)"},{"location":"lsx/float_computation/#synopsis_1","text":"__m128d __lsx_vfadd_s (__m128d a, __m128d b) #include Instruction: vfadd.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_computation/#description_1","text":"Add single precision floating point elements in a to b and store the result in dst .","title":"Description"},{"location":"lsx/float_computation/#operation_1","text":"for (int i = 0;i < 4;i++) { dst.fp32[i] = a.fp32[i] + b.fp32[i]; }","title":"Operation"},{"location":"lsx/float_computation/#__m128-__lsx_vfdiv_s-__m128-a-__m128-b","text":"","title":"__m128 __lsx_vfdiv_s (__m128 a, __m128 b)"},{"location":"lsx/float_computation/#synopsis_2","text":"__m128 __lsx_vfdiv_s (__m128 a, __m128 b) #include Instruction: vfdiv.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_computation/#description_2","text":"Divide __m128 precision floating point elements in a by elements in b .","title":"Description"},{"location":"lsx/float_computation/#operation_2","text":"for (int i = 0; i < 2; i++) { dst.fp32[i] = a.fp32[i] / b.fp32[i]; }","title":"Operation"},{"location":"lsx/float_computation/#__m128d-__lsx_vfdiv_d-__m128d-a-__m128d-b","text":"","title":"__m128d __lsx_vfdiv_d (__m128d a, __m128d b)"},{"location":"lsx/float_computation/#synopsis_3","text":"__m128d __lsx_vfdiv_d (__m128d a, __m128d b) #include Instruction: vfdiv.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_computation/#description_3","text":"Divide __m128d precision floating point elements in a by elements in b .","title":"Description"},{"location":"lsx/float_computation/#operation_3","text":"for (int i = 0; i < 2; i++) { dst.fp64[i] = a.fp64[i] / b.fp64[i]; }","title":"Operation"},{"location":"lsx/float_conversion/","text":"Floating Point Conversion __m128d __lsx_vfcvth_d_s (__m128 a) Synopsis __m128d __lsx_vfcvth_d_s (__m128 a) #include Instruction: vfcvth.d.s vr, vr CPU Flags: LSX Description Convert single precision floating point elements in higher half of a to double precision. Operation for (int i = 0; i < 2; i++) { dst.fp64[i] = a.fp32[2 + i]; } __m128d __lsx_vfcvtl_d_s (__m128 a) Synopsis __m128d __lsx_vfcvtl_d_s (__m128 a) #include Instruction: vfcvtl.d.s vr, vr CPU Flags: LSX Description Convert single precision floating point elements in lower half of a to double precision. Operation for (int i = 0; i < 2; i++) { dst.fp64[i] = a.fp32[i]; } __m128 __lsx_vfcvt_s_d (__m128d a, __m128d b) Synopsis __m128 __lsx_vfcvt_s_d (__m128a, __m128d b) #include Instruction: vfcvt.s.d vr, vr, vr CPU Flags: LSX Description Convert double precision floating point elements in a and b to double precision. Operation for (int i = 0; i < 4; i++) { if (i < 2) { dst.fp32[i] = b.fp64[i]; } else { dst.fp32[i] = a.fp64[i - 2]; } }","title":"Floating Point Conversion"},{"location":"lsx/float_conversion/#floating-point-conversion","text":"","title":"Floating Point Conversion"},{"location":"lsx/float_conversion/#__m128d-__lsx_vfcvth_d_s-__m128-a","text":"","title":"__m128d __lsx_vfcvth_d_s (__m128 a)"},{"location":"lsx/float_conversion/#synopsis","text":"__m128d __lsx_vfcvth_d_s (__m128 a) #include Instruction: vfcvth.d.s vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_conversion/#description","text":"Convert single precision floating point elements in higher half of a to double precision.","title":"Description"},{"location":"lsx/float_conversion/#operation","text":"for (int i = 0; i < 2; i++) { dst.fp64[i] = a.fp32[2 + i]; }","title":"Operation"},{"location":"lsx/float_conversion/#__m128d-__lsx_vfcvtl_d_s-__m128-a","text":"","title":"__m128d __lsx_vfcvtl_d_s (__m128 a)"},{"location":"lsx/float_conversion/#synopsis_1","text":"__m128d __lsx_vfcvtl_d_s (__m128 a) #include Instruction: vfcvtl.d.s vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_conversion/#description_1","text":"Convert single precision floating point elements in lower half of a to double precision.","title":"Description"},{"location":"lsx/float_conversion/#operation_1","text":"for (int i = 0; i < 2; i++) { dst.fp64[i] = a.fp32[i]; }","title":"Operation"},{"location":"lsx/float_conversion/#__m128-__lsx_vfcvt_s_d-__m128d-a-__m128d-b","text":"","title":"__m128 __lsx_vfcvt_s_d (__m128d a, __m128d b)"},{"location":"lsx/float_conversion/#synopsis_2","text":"__m128 __lsx_vfcvt_s_d (__m128a, __m128d b) #include Instruction: vfcvt.s.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_conversion/#description_2","text":"Convert double precision floating point elements in a and b to double precision.","title":"Description"},{"location":"lsx/float_conversion/#operation_2","text":"for (int i = 0; i < 4; i++) { if (i < 2) { dst.fp32[i] = b.fp64[i]; } else { dst.fp32[i] = a.fp64[i - 2]; } }","title":"Operation"},{"location":"lsx/float_misc/","text":"Floatint Point Misc __m128i __lsx_vfclass_d (__m128d a) Synopsis __m128i __lsx_vfclass_d (__m128d a) #include Instruction: vfclass.d vr, vr CPU Flags: LSX Description Classifiy each double precision floating point elements in a . Operation for (int i = 0;i < 2;i++) { dst.dword[i] = fp_classify(a.fp64[i]); } __m128i __lsx_vfclass_s (__m128 a) Synopsis __m128i __lsx_vfclass_s (__m128d a) #include Instruction: vfclass.s vr, vr CPU Flags: LSX Description Classifiy each single precision floating point elements in a . Operation for (int i = 0;i < 4;i++) { dst.word[i] = fp_classify(a.fp32[i]); }","title":"Floatint Point Misc"},{"location":"lsx/float_misc/#floatint-point-misc","text":"","title":"Floatint Point Misc"},{"location":"lsx/float_misc/#__m128i-__lsx_vfclass_d-__m128d-a","text":"","title":"__m128i __lsx_vfclass_d (__m128d a)"},{"location":"lsx/float_misc/#synopsis","text":"__m128i __lsx_vfclass_d (__m128d a) #include Instruction: vfclass.d vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_misc/#description","text":"Classifiy each double precision floating point elements in a .","title":"Description"},{"location":"lsx/float_misc/#operation","text":"for (int i = 0;i < 2;i++) { dst.dword[i] = fp_classify(a.fp64[i]); }","title":"Operation"},{"location":"lsx/float_misc/#__m128i-__lsx_vfclass_s-__m128-a","text":"","title":"__m128i __lsx_vfclass_s (__m128 a)"},{"location":"lsx/float_misc/#synopsis_1","text":"__m128i __lsx_vfclass_s (__m128d a) #include Instruction: vfclass.s vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/float_misc/#description_1","text":"Classifiy each single precision floating point elements in a .","title":"Description"},{"location":"lsx/float_misc/#operation_1","text":"for (int i = 0;i < 4;i++) { dst.word[i] = fp_classify(a.fp32[i]); }","title":"Operation"},{"location":"lsx/fma/","text":"Fused Multiply-Add __m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c) Synopsis __m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfmadd.s vr, vr, vr CPU Flags: LSX Description Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the result in dst . Operation for (int i = 0;i < 4;i++) { dst.fp32[i] = a.fp32[i] * b.fp32[i] + c.fp32[i]; } __m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c) Synopsis __m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfmadd.d vr, vr, vr CPU Flags: LSX Description Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the result in dst . Operation for (int i = 0;i < 2;i++) { dst.fp64[i] = a.fp64[i] * b.fp64[i] + c.fp64[i]; } __m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c) Synopsis __m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfmsub.s vr, vr, vr CPU Flags: LSX Description Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the result in dst . Operation for (int i = 0;i < 4;i++) { dst.fp32[i] = a.fp32[i] * b.fp32[i] - c.fp32[i]; } __m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c) Synopsis __m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfmsub.d vr, vr, vr CPU Flags: LSX Description Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the result in dst . Operation for (int i = 0;i < 2;i++) { dst.fp64[i] = a.fp64[i] * b.fp64[i] - c.fp64[i]; } __m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c) Synopsis __m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfnmadd.s vr, vr, vr CPU Flags: LSX Description Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the negated result in dst . Operation for (int i = 0;i < 4;i++) { dst.fp32[i] = -(a.fp32[i] * b.fp32[i] + c.fp32[i]); } __m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c) Synopsis __m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfnmadd.d vr, vr, vr CPU Flags: LSX Description Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the negated result in dst . Operation for (int i = 0;i < 2;i++) { dst.fp64[i] = (a.fp64[i] * b.fp64[i] + c.fp64[i]); } __m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c) Synopsis __m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfnmsub.s vr, vr, vr CPU Flags: LSX Description Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the negated result in dst . Operation for (int i = 0;i < 4;i++) { dst.fp32[i] = -(a.fp32[i] * b.fp32[i] - c.fp32[i]); } __m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c) Synopsis __m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfnmsub.d vr, vr, vr CPU Flags: LSX Description Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the negated result in dst . Operation for (int i = 0;i < 2;i++) { dst.fp64[i] = -(a.fp64[i] * b.fp64[i] - c.fp64[i]); }","title":"Fused Multiply-Add"},{"location":"lsx/fma/#fused-multiply-add","text":"","title":"Fused Multiply-Add"},{"location":"lsx/fma/#__m128-__lsx_vfmadd_s-__m128-a-__m128-b-__m128-c","text":"","title":"__m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c)"},{"location":"lsx/fma/#synopsis","text":"__m128 __lsx_vfmadd_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfmadd.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description","text":"Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the result in dst .","title":"Description"},{"location":"lsx/fma/#operation","text":"for (int i = 0;i < 4;i++) { dst.fp32[i] = a.fp32[i] * b.fp32[i] + c.fp32[i]; }","title":"Operation"},{"location":"lsx/fma/#__m128d-__lsx_vfmadd_d-__m128d-a-__m128d-b-__m128d-c","text":"","title":"__m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c)"},{"location":"lsx/fma/#synopsis_1","text":"__m128d __lsx_vfmadd_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfmadd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description_1","text":"Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the result in dst .","title":"Description"},{"location":"lsx/fma/#operation_1","text":"for (int i = 0;i < 2;i++) { dst.fp64[i] = a.fp64[i] * b.fp64[i] + c.fp64[i]; }","title":"Operation"},{"location":"lsx/fma/#__m128-__lsx_vfmsub_s-__m128-a-__m128-b-__m128-c","text":"","title":"__m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c)"},{"location":"lsx/fma/#synopsis_2","text":"__m128 __lsx_vfmsub_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfmsub.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description_2","text":"Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the result in dst .","title":"Description"},{"location":"lsx/fma/#operation_2","text":"for (int i = 0;i < 4;i++) { dst.fp32[i] = a.fp32[i] * b.fp32[i] - c.fp32[i]; }","title":"Operation"},{"location":"lsx/fma/#__m128d-__lsx_vfmsub_d-__m128d-a-__m128d-b-__m128d-c","text":"","title":"__m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c)"},{"location":"lsx/fma/#synopsis_3","text":"__m128d __lsx_vfmsub_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfmsub.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description_3","text":"Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the result in dst .","title":"Description"},{"location":"lsx/fma/#operation_3","text":"for (int i = 0;i < 2;i++) { dst.fp64[i] = a.fp64[i] * b.fp64[i] - c.fp64[i]; }","title":"Operation"},{"location":"lsx/fma/#__m128-__lsx_vfnmadd_s-__m128-a-__m128-b-__m128-c","text":"","title":"__m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c)"},{"location":"lsx/fma/#synopsis_4","text":"__m128 __lsx_vfnmadd_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfnmadd.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description_4","text":"Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the negated result in dst .","title":"Description"},{"location":"lsx/fma/#operation_4","text":"for (int i = 0;i < 4;i++) { dst.fp32[i] = -(a.fp32[i] * b.fp32[i] + c.fp32[i]); }","title":"Operation"},{"location":"lsx/fma/#__m128d-__lsx_vfnmadd_d-__m128d-a-__m128d-b-__m128d-c","text":"","title":"__m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c)"},{"location":"lsx/fma/#synopsis_5","text":"__m128d __lsx_vfnmadd_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfnmadd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description_5","text":"Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , accumulate to elements in c and store the negated result in dst .","title":"Description"},{"location":"lsx/fma/#operation_5","text":"for (int i = 0;i < 2;i++) { dst.fp64[i] = (a.fp64[i] * b.fp64[i] + c.fp64[i]); }","title":"Operation"},{"location":"lsx/fma/#__m128-__lsx_vfnmsub_s-__m128-a-__m128-b-__m128-c","text":"","title":"__m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c)"},{"location":"lsx/fma/#synopsis_6","text":"__m128 __lsx_vfnmsub_s (__m128 a, __m128 b, __m128 c) #include Instruction: vfnmsub.s vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description_6","text":"Compute packed single precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the negated result in dst .","title":"Description"},{"location":"lsx/fma/#operation_6","text":"for (int i = 0;i < 4;i++) { dst.fp32[i] = -(a.fp32[i] * b.fp32[i] - c.fp32[i]); }","title":"Operation"},{"location":"lsx/fma/#__m128d-__lsx_vfnmsub_d-__m128d-a-__m128d-b-__m128d-c","text":"","title":"__m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c)"},{"location":"lsx/fma/#synopsis_7","text":"__m128d __lsx_vfnmsub_d (__m128d a, __m128d b, __m128d c) #include Instruction: vfnmsub.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/fma/#description_7","text":"Compute packed double precision floating point FMA(Fused Multiply-Add): multiply elements in a and b , subtract elements in c and store the negated result in dst .","title":"Description"},{"location":"lsx/fma/#operation_7","text":"for (int i = 0;i < 2;i++) { dst.fp64[i] = -(a.fp64[i] * b.fp64[i] - c.fp64[i]); }","title":"Operation"},{"location":"lsx/integer_comparison/","text":"Integer Comparison __m128i __lsx_vseq_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vseq_b (__m128i a, __m128i b) #include Instruction: vseq.b vr, vr, vr CPU Flags: LSX Description Compare the 8-bit elements in a and b , store all-ones to dst if equal, zero otherwise. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (a.byte[i] == b.byte[i]) ? 0xFF : 0; } Tested on real machine. __m128i __lsx_vseq_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vseq_h (__m128i a, __m128i b) #include Instruction: vseq.h vr, vr, vr CPU Flags: LSX Description Compare the 16-bit elements in a and b , store all-ones to dst if equal, zero otherwise. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (a.half[i] == b.half[i]) ? 0xFFFF : 0; } Tested on real machine. __m128i __lsx_vseq_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vseq_w (__m128i a, __m128i b) #include Instruction: vseq.w vr, vr, vr CPU Flags: LSX Description Compare the 32-bit elements in a and b , store all-ones to dst if equal, zero otherwise. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (a.word[i] == b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vseq_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vseq_d (__m128i a, __m128i b) #include Instruction: vseq.d vr, vr, vr CPU Flags: LSX Description Compare the 64-bit elements in a and b , store all-ones to dst if equal, zero otherwise. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (a.dword[i] == b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_b (__m128i a, __m128i b) #include Instruction: vslt.b vr, vr, vr CPU Flags: LSX Description Compare the signed 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0; } Tested on real machine. __m128i __lsx_vslt_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_bu (__m128i a, __m128i b) #include Instruction: vslt.bu vr, vr, vr CPU Flags: LSX Description Compare the unsigned 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0; } Tested on real machine. __m128i __lsx_vslt_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_h (__m128i a, __m128i b) #include Instruction: vslt.h vr, vr, vr CPU Flags: LSX Description Compare the signed 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_hu (__m128i a, __m128i b) #include Instruction: vslt.hu vr, vr, vr CPU Flags: LSX Description Compare the unsigned 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_w (__m128i a, __m128i b) #include Instruction: vslt.w vr, vr, vr CPU Flags: LSX Description Compare the signed 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_wu (__m128i a, __m128i b) #include Instruction: vslt.wu vr, vr, vr CPU Flags: LSX Description Compare the unsigned 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_d (__m128i a, __m128i b) #include Instruction: vslt.d vr, vr, vr CPU Flags: LSX Description Compare the signed 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_du (__m128i a, __m128i b) #include Instruction: vslt.du vr, vr, vr CPU Flags: LSX Description Compare the unsigned 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_b (__m128i a, __m128i b) #include Instruction: vslt.b vr, vr, vr CPU Flags: LSX Description Compare the signed 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0; } Tested on real machine. __m128i __lsx_vslt_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_bu (__m128i a, __m128i b) #include Instruction: vslt.bu vr, vr, vr CPU Flags: LSX Description Compare the unsigned 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0; } Tested on real machine. __m128i __lsx_vslt_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_h (__m128i a, __m128i b) #include Instruction: vslt.h vr, vr, vr CPU Flags: LSX Description Compare the signed 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_hu (__m128i a, __m128i b) #include Instruction: vslt.hu vr, vr, vr CPU Flags: LSX Description Compare the unsigned 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_w (__m128i a, __m128i b) #include Instruction: vslt.w vr, vr, vr CPU Flags: LSX Description Compare the signed 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_wu (__m128i a, __m128i b) #include Instruction: vslt.wu vr, vr, vr CPU Flags: LSX Description Compare the unsigned 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_d (__m128i a, __m128i b) #include Instruction: vslt.d vr, vr, vr CPU Flags: LSX Description Compare the signed 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine. __m128i __lsx_vslt_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vslt_du (__m128i a, __m128i b) #include Instruction: vslt.du vr, vr, vr CPU Flags: LSX Description Compare the unsigned 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine.","title":"Integer Comparison"},{"location":"lsx/integer_comparison/#integer-comparison","text":"","title":"Integer Comparison"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vseq_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vseq_b (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis","text":"__m128i __lsx_vseq_b (__m128i a, __m128i b) #include Instruction: vseq.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description","text":"Compare the 8-bit elements in a and b , store all-ones to dst if equal, zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (a.byte[i] == b.byte[i]) ? 0xFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vseq_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vseq_h (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_1","text":"__m128i __lsx_vseq_h (__m128i a, __m128i b) #include Instruction: vseq.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_1","text":"Compare the 16-bit elements in a and b , store all-ones to dst if equal, zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_1","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (a.half[i] == b.half[i]) ? 0xFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vseq_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vseq_w (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_2","text":"__m128i __lsx_vseq_w (__m128i a, __m128i b) #include Instruction: vseq.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_2","text":"Compare the 32-bit elements in a and b , store all-ones to dst if equal, zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_2","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (a.word[i] == b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vseq_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vseq_d (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_3","text":"__m128i __lsx_vseq_d (__m128i a, __m128i b) #include Instruction: vseq.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_3","text":"Compare the 64-bit elements in a and b , store all-ones to dst if equal, zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_3","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (a.dword[i] == b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_b (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_4","text":"__m128i __lsx_vslt_b (__m128i a, __m128i b) #include Instruction: vslt.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_4","text":"Compare the signed 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_4","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_5","text":"__m128i __lsx_vslt_bu (__m128i a, __m128i b) #include Instruction: vslt.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_5","text":"Compare the unsigned 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_5","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_h (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_6","text":"__m128i __lsx_vslt_h (__m128i a, __m128i b) #include Instruction: vslt.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_6","text":"Compare the signed 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_6","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_7","text":"__m128i __lsx_vslt_hu (__m128i a, __m128i b) #include Instruction: vslt.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_7","text":"Compare the unsigned 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_7","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_w (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_8","text":"__m128i __lsx_vslt_w (__m128i a, __m128i b) #include Instruction: vslt.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_8","text":"Compare the signed 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_8","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_9","text":"__m128i __lsx_vslt_wu (__m128i a, __m128i b) #include Instruction: vslt.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_9","text":"Compare the unsigned 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_9","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_d (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_10","text":"__m128i __lsx_vslt_d (__m128i a, __m128i b) #include Instruction: vslt.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_10","text":"Compare the signed 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_10","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vslt_du (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_11","text":"__m128i __lsx_vslt_du (__m128i a, __m128i b) #include Instruction: vslt.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_11","text":"Compare the unsigned 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_11","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_b-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_b (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_12","text":"__m128i __lsx_vslt_b (__m128i a, __m128i b) #include Instruction: vslt.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_12","text":"Compare the signed 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_12","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] < (s8)b.byte[i]) ? 0xFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_bu-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_13","text":"__m128i __lsx_vslt_bu (__m128i a, __m128i b) #include Instruction: vslt.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_13","text":"Compare the unsigned 8-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_13","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] < (u8)b.byte[i]) ? 0xFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_h-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_h (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_14","text":"__m128i __lsx_vslt_h (__m128i a, __m128i b) #include Instruction: vslt.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_14","text":"Compare the signed 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_14","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] < (s16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_hu-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_15","text":"__m128i __lsx_vslt_hu (__m128i a, __m128i b) #include Instruction: vslt.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_15","text":"Compare the unsigned 16-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_15","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] < (u16)b.half[i]) ? 0xFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_w-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_w (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_16","text":"__m128i __lsx_vslt_w (__m128i a, __m128i b) #include Instruction: vslt.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_16","text":"Compare the signed 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_16","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] < (s32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_wu-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_17","text":"__m128i __lsx_vslt_wu (__m128i a, __m128i b) #include Instruction: vslt.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_17","text":"Compare the unsigned 32-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_17","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] < (u32)b.word[i]) ? 0xFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_d-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_d (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_18","text":"__m128i __lsx_vslt_d (__m128i a, __m128i b) #include Instruction: vslt.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_18","text":"Compare the signed 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_18","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] < (s64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_comparison/#__m128i-__lsx_vslt_du-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vslt_du (__m128i a, __m128i b)"},{"location":"lsx/integer_comparison/#synopsis_19","text":"__m128i __lsx_vslt_du (__m128i a, __m128i b) #include Instruction: vslt.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_comparison/#description_19","text":"Compare the unsigned 64-bit elements in a and b , store all-ones to dst if corresponding element in a is less than or equal b , zero otherwise.","title":"Description"},{"location":"lsx/integer_comparison/#operation_19","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] < (u64)b.dword[i]) ? 0xFFFFFFFFFFFFFFFF : 0; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/","text":"Integer Computation __m128i __lsx_vadd_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vadd_b (__m128i a, __m128i b) #include Instruction: vadd.b vr, vr, vr CPU Flags: LSX Description Add 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] + b.byte[i]; } Tested on real machine. __m128i __lsx_vadd_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vadd_h (__m128i a, __m128i b) #include Instruction: vadd.h vr, vr, vr CPU Flags: LSX Description Add 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] + b.half[i]; } Tested on real machine. __m128i __lsx_vadd_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vadd_w (__m128i a, __m128i b) #include Instruction: vadd.w vr, vr, vr CPU Flags: LSX Description Add 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] + b.word[i]; } Tested on real machine. __m128i __lsx_vadd_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vadd_d (__m128i a, __m128i b) #include Instruction: vadd.d vr, vr, vr CPU Flags: LSX Description Add 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] + b.dword[i]; } Tested on real machine. __m128i __lsx_vadd_q (__m128i a, __m128i b) Synopsis __m128i __lsx_vadd_q (__m128i a, __m128i b) #include Instruction: vadd.q vr, vr, vr CPU Flags: LSX Description Add 128-bit elements in a and b , save the result in dst . Operation dst.qword[0] = a.qword[0] + b.qword[0]; Tested on real machine. __m128i __lsx_vabsd_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_b (__m128i a, __m128i b) #include Instruction: vabsd.b vr, vr, vr CPU Flags: LSX Description Compute absolute difference of signed 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] > (s8)b.byte[i]) ? (a.byte[i] - b.byte[i]) : (b.byte[i] - a.byte[i]); } Tested on real machine. __m128i __lsx_vabsd_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_bu (__m128i a, __m128i b) #include Instruction: vabsd.bu vr, vr, vr CPU Flags: LSX Description Compute absolute difference of unsigned 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] > (u8)b.byte[i]) ? (a.byte[i] - b.byte[i]) : (b.byte[i] - a.byte[i]); } Tested on real machine. __m128i __lsx_vabsd_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_h (__m128i a, __m128i b) #include Instruction: vabsd.h vr, vr, vr CPU Flags: LSX Description Compute absolute difference of signed 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] > (s16)b.half[i]) ? (a.half[i] - b.half[i]) : (b.half[i] - a.half[i]); } Tested on real machine. __m128i __lsx_vabsd_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_hu (__m128i a, __m128i b) #include Instruction: vabsd.hu vr, vr, vr CPU Flags: LSX Description Compute absolute difference of unsigned 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] > (u16)b.half[i]) ? (a.half[i] - b.half[i]) : (b.half[i] - a.half[i]); } Tested on real machine. __m128i __lsx_vabsd_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_w (__m128i a, __m128i b) #include Instruction: vabsd.w vr, vr, vr CPU Flags: LSX Description Compute absolute difference of signed 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] > (s32)b.word[i]) ? (a.word[i] - b.word[i]) : (b.word[i] - a.word[i]); } Tested on real machine. __m128i __lsx_vabsd_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_wu (__m128i a, __m128i b) #include Instruction: vabsd.wu vr, vr, vr CPU Flags: LSX Description Compute absolute difference of unsigned 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] > (u32)b.word[i]) ? (a.word[i] - b.word[i]) : (b.word[i] - a.word[i]); } Tested on real machine. __m128i __lsx_vabsd_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_d (__m128i a, __m128i b) #include Instruction: vabsd.d vr, vr, vr CPU Flags: LSX Description Compute absolute difference of signed 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] > (s64)b.dword[i]) ? (a.dword[i] - b.dword[i]) : (b.dword[i] - a.dword[i]); } Tested on real machine. __m128i __lsx_vabsd_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vabsd_du (__m128i a, __m128i b) #include Instruction: vabsd.du vr, vr, vr CPU Flags: LSX Description Compute absolute difference of unsigned 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] > (u64)b.dword[i]) ? (a.dword[i] - b.dword[i]) : (b.dword[i] - a.dword[i]); } Tested on real machine. __m128i __lsx_vadda_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vadda_b (__m128i a, __m128i b) #include Instruction: vadda.b vr, vr, vr CPU Flags: LSX Description Add absolute of 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = abs((s8)a.byte[i]) + abs((s8)b.byte[i]); } Tested on real machine. __m128i __lsx_vadda_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vadda_h (__m128i a, __m128i b) #include Instruction: vadda.h vr, vr, vr CPU Flags: LSX Description Add absolute of 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = abs((s16)a.half[i]) + abs((s16)b.half[i]); } Tested on real machine. __m128i __lsx_vadda_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vadda_w (__m128i a, __m128i b) #include Instruction: vadda.w vr, vr, vr CPU Flags: LSX Description Add absolute of 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = abs((s32)a.word[i]) + abs((s32)b.word[i]); } Tested on real machine. __m128i __lsx_vadda_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vadda_d (__m128i a, __m128i b) #include Instruction: vadda.d vr, vr, vr CPU Flags: LSX Description Add absolute of 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = abs((s64)a.dword[i]) + abs((s64)b.dword[i]); } Tested on real machine. __m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm) #include Instruction: vaddi.bu vr, vr, imm CPU Flags: LSX Description Add 8-bit elements in a and imm , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] + imm; } Tested on real machine. __m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm) #include Instruction: vaddi.hu vr, vr, imm CPU Flags: LSX Description Add 16-bit elements in a and imm , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] + imm; } Tested on real machine. __m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm) #include Instruction: vaddi.wu vr, vr, imm CPU Flags: LSX Description Add 32-bit elements in a and imm , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] + imm; } Tested on real machine. __m128i __lsx_vaddi_du (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vaddi_du (__m128i a, imm0_31 imm) #include Instruction: vaddi.du vr, vr, imm CPU Flags: LSX Description Add 64-bit elements in a and imm , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] + imm; } Tested on real machine. __m128i __lsx_vaddwev_h_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_h_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.b vr, vr, vr CPU Flags: LSX Description Add even-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu.b vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 8-bit elements in a and signed elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_w_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_w_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.h vr, vr, vr CPU Flags: LSX Description Add even-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu.h vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 16-bit elements in a and signed elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_d_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_d_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.w vr, vr, vr CPU Flags: LSX Description Add even-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu.w vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 32-bit elements in a and signed elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_q_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_q_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.d vr, vr, vr CPU Flags: LSX Description Add even-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_q_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_q_du (__m128i a, __m128i b) #include Instruction: vaddwev.q.du vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.du.d vr, vr, vr CPU Flags: LSX Description Add even-positioned unsigned 64-bit elements in a and signed elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_h_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_h_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.b vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu.b vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 8-bit elements in a and signed elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_w_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_w_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.h vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu.h vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 16-bit elements in a and signed elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_d_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_d_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.w vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu.w vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 32-bit elements in a and signed elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_q_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_q_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.d vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_q_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_q_du (__m128i a, __m128i b) #include Instruction: vaddwev.q.du vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.du.d vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 64-bit elements in a and signed elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vavg_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_b (__m128i a, __m128i b) #include Instruction: vavg.b vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of signed 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) + (a.byte[i] & b.byte[i] & 1); } Tested on real machine. __m128i __lsx_vavg_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_bu (__m128i a, __m128i b) #include Instruction: vavg.bu vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of unsigned 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) + (a.byte[i] & b.byte[i] & 1); } Tested on real machine. __m128i __lsx_vavg_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_h (__m128i a, __m128i b) #include Instruction: vavg.h vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of signed 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) + (a.half[i] & b.half[i] & 1); } Tested on real machine. __m128i __lsx_vavg_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_hu (__m128i a, __m128i b) #include Instruction: vavg.hu vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of unsigned 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) + (a.half[i] & b.half[i] & 1); } Tested on real machine. __m128i __lsx_vavg_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_w (__m128i a, __m128i b) #include Instruction: vavg.w vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of signed 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) + (a.word[i] & b.word[i] & 1); } Tested on real machine. __m128i __lsx_vavg_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_wu (__m128i a, __m128i b) #include Instruction: vavg.wu vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of unsigned 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) + (a.word[i] & b.word[i] & 1); } Tested on real machine. __m128i __lsx_vavg_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_d (__m128i a, __m128i b) #include Instruction: vavg.d vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of signed 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) + (a.dword[i] & b.dword[i] & 1); } Tested on real machine. __m128i __lsx_vavg_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vavg_du (__m128i a, __m128i b) #include Instruction: vavg.du vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards negative infinity) of unsigned 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) + (a.dword[i] & b.dword[i] & 1); } Tested on real machine. __m128i __lsx_vavgr_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_b (__m128i a, __m128i b) #include Instruction: vavgr.b vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of signed 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) + ((a.byte[i] | b.byte[i]) & 1); } Tested on real machine. __m128i __lsx_vavgr_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_bu (__m128i a, __m128i b) #include Instruction: vavgr.bu vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of unsigned 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) + ((a.byte[i] | b.byte[i]) & 1); } Tested on real machine. __m128i __lsx_vavgr_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_h (__m128i a, __m128i b) #include Instruction: vavgr.h vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of signed 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) + ((a.half[i] | b.half[i]) & 1); } Tested on real machine. __m128i __lsx_vavgr_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_hu (__m128i a, __m128i b) #include Instruction: vavgr.hu vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of unsigned 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) + ((a.half[i] | b.half[i]) & 1); } Tested on real machine. __m128i __lsx_vavgr_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_w (__m128i a, __m128i b) #include Instruction: vavgr.w vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of signed 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) + ((a.word[i] | b.word[i]) & 1); } Tested on real machine. __m128i __lsx_vavgr_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_wu (__m128i a, __m128i b) #include Instruction: vavgr.wu vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of unsigned 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) + ((a.word[i] | b.word[i]) & 1); } Tested on real machine. __m128i __lsx_vavgr_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_d (__m128i a, __m128i b) #include Instruction: vavgr.d vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of signed 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) + ((a.dword[i] | b.dword[i]) & 1); } Tested on real machine. __m128i __lsx_vavgr_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vavgr_du (__m128i a, __m128i b) #include Instruction: vavgr.du vr, vr, vr CPU Flags: LSX Description Compute the average (rounded towards positive infinity) of unsigned 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) + ((a.dword[i] | b.dword[i]) & 1); } Tested on real machine. __m128i __lsx_div_b (__m128i a, __m128i b) Synopsis __m128i __lsx_div_b (__m128i a, __m128i b) #include Instruction: vdiv.b vr, vr, vr CPU Flags: LSX Description Divide signed 8-bit elements in a by elements in b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] / (s8)b.byte[i]); } Tested on real machine. __m128i __lsx_div_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_div_bu (__m128i a, __m128i b) #include Instruction: vdiv.bu vr, vr, vr CPU Flags: LSX Description Divide unsigned 8-bit elements in a by elements in b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] / (u8)b.byte[i]); } Tested on real machine. __m128i __lsx_div_h (__m128i a, __m128i b) Synopsis __m128i __lsx_div_h (__m128i a, __m128i b) #include Instruction: vdiv.h vr, vr, vr CPU Flags: LSX Description Divide signed 16-bit elements in a by elements in b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] / (s16)b.half[i]); } Tested on real machine. __m128i __lsx_div_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_div_hu (__m128i a, __m128i b) #include Instruction: vdiv.hu vr, vr, vr CPU Flags: LSX Description Divide unsigned 16-bit elements in a by elements in b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] / (u16)b.half[i]); } Tested on real machine. __m128i __lsx_div_w (__m128i a, __m128i b) Synopsis __m128i __lsx_div_w (__m128i a, __m128i b) #include Instruction: vdiv.w vr, vr, vr CPU Flags: LSX Description Divide signed 32-bit elements in a by elements in b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] / (s32)b.word[i]); } Tested on real machine. __m128i __lsx_div_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_div_wu (__m128i a, __m128i b) #include Instruction: vdiv.wu vr, vr, vr CPU Flags: LSX Description Divide unsigned 32-bit elements in a by elements in b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] / (u32)b.word[i]); } Tested on real machine. __m128i __lsx_div_d (__m128i a, __m128i b) Synopsis __m128i __lsx_div_d (__m128i a, __m128i b) #include Instruction: vdiv.d vr, vr, vr CPU Flags: LSX Description Divide signed 64-bit elements in a by elements in b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] / (s64)b.dword[i]); } Tested on real machine. __m128i __lsx_div_du (__m128i a, __m128i b) Synopsis __m128i __lsx_div_du (__m128i a, __m128i b) #include Instruction: vdiv.du vr, vr, vr CPU Flags: LSX Description Divide unsigned 64-bit elements in a by elements in b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] / (u64)b.dword[i]); } Tested on real machine. __m128i __lsx_vhaddw_h_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_h_b (__m128i a, __m128i b) #include Instruction: vhaddw.h.b vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 8-bit elements in a to even-positioned signed 8-bit elements in 'b' to get 16-bit result. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b) #include Instruction: vhaddw.hu.bu vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 8-bit elements in a to even-positioned unsigned 8-bit elements in 'b' to get 16-bit result. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (u16)(u8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vhaddw_w_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_w_h (__m128i a, __m128i b) #include Instruction: vhaddw.w.h vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 16-bit elements in a to even-positioned signed 16-bit elements in 'b' to get 32-bit result. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b) #include Instruction: vhaddw.wu.hu vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 16-bit elements in a to even-positioned unsigned 16-bit elements in 'b' to get 32-bit result. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (u32)(u16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vhaddw_d_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_d_w (__m128i a, __m128i b) #include Instruction: vhaddw.d.w vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 32-bit elements in a to even-positioned signed 32-bit elements in 'b' to get 64-bit result. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b) #include Instruction: vhaddw.du.wu vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 32-bit elements in a to even-positioned unsigned 32-bit elements in 'b' to get 64-bit result. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (u64)(u32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vhaddw_q_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_q_d (__m128i a, __m128i b) #include Instruction: vhaddw.q.d vr, vr, vr CPU Flags: LSX Description Add odd-positioned signed 64-bit elements in a to even-positioned signed 64-bit elements in 'b' to get 128-bit result. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b) #include Instruction: vhaddw.qu.du vr, vr, vr CPU Flags: LSX Description Add odd-positioned unsigned 64-bit elements in a to even-positioned unsigned 64-bit elements in 'b' to get 128-bit result. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (u128)(u64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_h_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_h_b (__m128i a, __m128i b) #include Instruction: vhsubw.h.b vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned signed 8-bit elements in a by even-positioned signed 8-bit elements in 'b' to get 16-bit result. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i + 1] - (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b) #include Instruction: vhsubw.hu.bu vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned unsigned 8-bit elements in a by even-positioned unsigned 8-bit elements in 'b' to get 16-bit result. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i + 1] - (u16)(u8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_w_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_w_h (__m128i a, __m128i b) #include Instruction: vhsubw.w.h vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned signed 16-bit elements in a by even-positioned signed 16-bit elements in 'b' to get 32-bit result. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i + 1] - (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b) #include Instruction: vhsubw.wu.hu vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned unsigned 16-bit elements in a by even-positioned unsigned 16-bit elements in 'b' to get 32-bit result. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i + 1] - (u32)(u16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_d_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_d_w (__m128i a, __m128i b) #include Instruction: vhsubw.d.w vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned signed 32-bit elements in a by even-positioned signed 32-bit elements in 'b' to get 64-bit result. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i + 1] - (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b) #include Instruction: vhsubw.du.wu vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned unsigned 32-bit elements in a by even-positioned unsigned 32-bit elements in 'b' to get 64-bit result. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i + 1] - (u64)(u32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_q_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_q_d (__m128i a, __m128i b) #include Instruction: vhsubw.q.d vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned signed 64-bit elements in a by even-positioned signed 64-bit elements in 'b' to get 128-bit result. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] - (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b) #include Instruction: vhsubw.qu.du vr, vr, vr CPU Flags: LSX Description Subtract odd-positioned unsigned 64-bit elements in a by even-positioned unsigned 64-bit elements in 'b' to get 128-bit result. Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] - (u128)(u64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.b vr, vr, vr CPU Flags: LSX Description Multiply 8-bit elements in b and c , add to elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = b.byte[i] * c.byte[i] + a.byte[i]; } Tested on real machine. __m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.h vr, vr, vr CPU Flags: LSX Description Multiply 16-bit elements in b and c , add to elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = b.half[i] * c.half[i] + a.half[i]; } Tested on real machine. __m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.w vr, vr, vr CPU Flags: LSX Description Multiply 32-bit elements in b and c , add to elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = b.word[i] * c.word[i] + a.word[i]; } Tested on real machine. __m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.d vr, vr, vr CPU Flags: LSX Description Multiply 64-bit elements in b and c , add to elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = b.dword[i] * c.dword[i] + a.dword[i]; } Tested on real machine. __m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.h.b vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 8-bit elements in b and signed elements in c , add to 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i]; } Tested on real machine. __m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.h.bu vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 8-bit elements in b and unsigned elements in c , add to 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i] * (u16)(u8)c.byte[2 * i] + (u16)a.half[i]; } Tested on real machine. __m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.h.bu.b vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 8-bit elements in b and signed elements in c , add to 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i]; } Tested on real machine. __m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.w.h vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 16-bit elements in b and signed elements in c , add to 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i]; } Tested on real machine. __m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.w.hu vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 16-bit elements in b and unsigned elements in c , add to 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i] * (u32)(u16)c.half[2 * i] + (u32)a.word[i]; } Tested on real machine. __m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.w.hu.h vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 16-bit elements in b and signed elements in c , add to 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i]; } Tested on real machine. __m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.d.w vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 32-bit elements in b and signed elements in c , add to 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i]; } Tested on real machine. __m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.d.wu vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 32-bit elements in b and unsigned elements in c , add to 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i] * (u64)(u32)c.word[2 * i] + (u64)a.dword[i]; } Tested on real machine. __m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.d.wu.w vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 32-bit elements in b and signed elements in c , add to 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i]; } Tested on real machine. __m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.q.d vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 64-bit elements in b and signed elements in c , add to 128-bit elements in a . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i]; } Tested on real machine. __m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.q.du vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 64-bit elements in b and unsigned elements in c , add to 128-bit elements in a . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i] * (u128)(u64)c.dword[2 * i] + (u128)a.qword[i]; } Tested on real machine. __m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.q.du.d vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 64-bit elements in b and signed elements in c , add to 128-bit elements in a . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i]; } Tested on real machine. __m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.h.b vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned signed 8-bit elements in b and signed elements in c , add to 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i]; } Tested on real machine. __m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.h.bu vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 8-bit elements in b and unsigned elements in c , add to 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i + 1] * (u16)(u8)c.byte[2 * i + 1] + (u16)a.half[i]; } Tested on real machine. __m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.h.bu.b vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 8-bit elements in b and signed elements in c , add to 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i]; } Tested on real machine. __m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.w.h vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned signed 16-bit elements in b and signed elements in c , add to 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] + (s32)a.word[i]; } Tested on real machine. __m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.w.hu vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 16-bit elements in b and unsigned elements in c , add to 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (u32)(u16)c.half[2 * i + 1] + (u32)a.word[i]; } Tested on real machine. __m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.w.hu.h vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 16-bit elements in b and signed elements in c , add to 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] + (s32)a.word[i]; } Tested on real machine. __m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.d.w vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned signed 32-bit elements in b and signed elements in c , add to 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] + (s64)a.dword[i]; } Tested on real machine. __m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.d.wu vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 32-bit elements in b and unsigned elements in c , add to 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (u64)(u32)c.word[2 * i + 1] + (u64)a.dword[i]; } Tested on real machine. __m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.d.wu.w vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 32-bit elements in b and signed elements in c , add to 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] + (s64)a.dword[i]; } Tested on real machine. __m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.q.d vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned signed 64-bit elements in b and signed elements in c , add to 128-bit elements in a . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] + (s128)a.qword[i]; } Tested on real machine. __m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.q.du vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 64-bit elements in b and unsigned elements in c , add to 128-bit elements in a . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (u128)(u64)c.dword[2 * i + 1] + (u128)a.qword[i]; } Tested on real machine. __m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.q.du.d vr, vr, vr CPU Flags: LSX Description Multiply odd-positioned unsigned 64-bit elements in b and signed elements in c , add to 128-bit elements in a . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] + (s128)a.qword[i]; } Tested on real machine. __m128i __lsx_vmax_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_b (__m128i a, __m128i b) #include Instruction: vmax.b vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for signed 8-bit elements in a and b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = max((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine. __m128i __lsx_vmax_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_bu (__m128i a, __m128i b) #include Instruction: vmax.bu vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for unsigned 8-bit elements in a and b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = max((u8)a.byte[i], (u8)b.byte[i]); } Tested on real machine. __m128i __lsx_vmax_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_h (__m128i a, __m128i b) #include Instruction: vmax.h vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for signed 16-bit elements in a and b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = max((s16)a.half[i], (s16)b.half[i]); } Tested on real machine. __m128i __lsx_vmax_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_hu (__m128i a, __m128i b) #include Instruction: vmax.hu vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for unsigned 16-bit elements in a and b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = max((u16)a.half[i], (u16)b.half[i]); } Tested on real machine. __m128i __lsx_vmax_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_w (__m128i a, __m128i b) #include Instruction: vmax.w vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for signed 32-bit elements in a and b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = max((s32)a.word[i], (s32)b.word[i]); } Tested on real machine. __m128i __lsx_vmax_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_wu (__m128i a, __m128i b) #include Instruction: vmax.wu vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for unsigned 32-bit elements in a and b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = max((u32)a.word[i], (u32)b.word[i]); } Tested on real machine. __m128i __lsx_vmax_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_d (__m128i a, __m128i b) #include Instruction: vmax.d vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for signed 64-bit elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = max((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine. __m128i __lsx_vmax_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vmax_du (__m128i a, __m128i b) #include Instruction: vmax.du vr, vr, vr CPU Flags: LSX Description Compute elementwise maximum for unsigned 64-bit elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = max((u64)a.dword[i], (u64)b.dword[i]); } Tested on real machine. __m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.b vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for signed 8-bit elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = max((s8)a.byte[i], (s8)imm); } Tested on real machine. __m128i __lsx_vmaxi_bu (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmaxi_bu (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.bu vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for unsigned 8-bit elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = max((u8)a.byte[i], (u8)imm); } Tested on real machine. __m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.h vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for signed 16-bit elements in a and imm . Operation for (int i = 0; i < 8; i++) { dst.half[i] = max((s16)a.half[i], (s16)imm); } Tested on real machine. __m128i __lsx_vmaxi_hu (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmaxi_hu (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.hu vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for unsigned 16-bit elements in a and imm . Operation for (int i = 0; i < 8; i++) { dst.half[i] = max((u16)a.half[i], (u16)imm); } Tested on real machine. __m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.w vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for signed 32-bit elements in a and imm . Operation for (int i = 0; i < 4; i++) { dst.word[i] = max((s32)a.word[i], (s32)imm); } Tested on real machine. __m128i __lsx_vmaxi_wu (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmaxi_wu (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.wu vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for unsigned 32-bit elements in a and imm . Operation for (int i = 0; i < 4; i++) { dst.word[i] = max((u32)a.word[i], (u32)imm); } Tested on real machine. __m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.d vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for signed 64-bit elements in a and imm . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = max((s64)a.dword[i], (s64)imm); } Tested on real machine. __m128i __lsx_vmaxi_du (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmaxi_du (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.du vr, vr, imm CPU Flags: LSX Description Compute elementwise maximum for unsigned 64-bit elements in a and imm . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = max((u64)a.dword[i], (u64)imm); } Tested on real machine. __m128i __lsx_vmin_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_b (__m128i a, __m128i b) #include Instruction: vmin.b vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for signed 8-bit elements in a and b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = min((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine. __m128i __lsx_vmin_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_bu (__m128i a, __m128i b) #include Instruction: vmin.bu vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for unsigned 8-bit elements in a and b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = min((u8)a.byte[i], (u8)b.byte[i]); } Tested on real machine. __m128i __lsx_vmin_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_h (__m128i a, __m128i b) #include Instruction: vmin.h vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for signed 16-bit elements in a and b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = min((s16)a.half[i], (s16)b.half[i]); } Tested on real machine. __m128i __lsx_vmin_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_hu (__m128i a, __m128i b) #include Instruction: vmin.hu vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for unsigned 16-bit elements in a and b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = min((u16)a.half[i], (u16)b.half[i]); } Tested on real machine. __m128i __lsx_vmin_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_w (__m128i a, __m128i b) #include Instruction: vmin.w vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for signed 32-bit elements in a and b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = min((s32)a.word[i], (s32)b.word[i]); } Tested on real machine. __m128i __lsx_vmin_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_wu (__m128i a, __m128i b) #include Instruction: vmin.wu vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for unsigned 32-bit elements in a and b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = min((u32)a.word[i], (u32)b.word[i]); } Tested on real machine. __m128i __lsx_vmin_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_d (__m128i a, __m128i b) #include Instruction: vmin.d vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for signed 64-bit elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = min((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine. __m128i __lsx_vmin_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vmin_du (__m128i a, __m128i b) #include Instruction: vmin.du vr, vr, vr CPU Flags: LSX Description Compute elementwise minimum for unsigned 64-bit elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = min((u64)a.dword[i], (u64)b.dword[i]); } Tested on real machine. __m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm) #include Instruction: vmini.b vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for signed 8-bit elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = min((s8)a.byte[i], (s8)imm); } Tested on real machine. __m128i __lsx_vmini_bu (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmini_bu (__m128i a, imm_0_31 imm) #include Instruction: vmini.bu vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for unsigned 8-bit elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = min((u8)a.byte[i], (u8)imm); } Tested on real machine. __m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm) #include Instruction: vmini.h vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for signed 16-bit elements in a and imm . Operation for (int i = 0; i < 8; i++) { dst.half[i] = min((s16)a.half[i], (s16)imm); } Tested on real machine. __m128i __lsx_vmini_hu (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmini_hu (__m128i a, imm_0_31 imm) #include Instruction: vmini.hu vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for unsigned 16-bit elements in a and imm . Operation for (int i = 0; i < 8; i++) { dst.half[i] = min((u16)a.half[i], (u16)imm); } Tested on real machine. __m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm) #include Instruction: vmini.w vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for signed 32-bit elements in a and imm . Operation for (int i = 0; i < 4; i++) { dst.word[i] = min((s32)a.word[i], (s32)imm); } Tested on real machine. __m128i __lsx_vmini_wu (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmini_wu (__m128i a, imm_0_31 imm) #include Instruction: vmini.wu vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for unsigned 32-bit elements in a and imm . Operation for (int i = 0; i < 4; i++) { dst.word[i] = min((u32)a.word[i], (u32)imm); } Tested on real machine. __m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm) Synopsis __m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm) #include Instruction: vmini.d vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for signed 64-bit elements in a and imm . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = min((s64)a.dword[i], (s64)imm); } Tested on real machine. __m128i __lsx_vmini_du (__m128i a, imm_0_31 imm) Synopsis __m128i __lsx_vmini_du (__m128i a, imm_0_31 imm) #include Instruction: vmini.du vr, vr, imm CPU Flags: LSX Description Compute elementwise minimum for unsigned 64-bit elements in a and imm . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = min((u64)a.dword[i], (u64)imm); } Tested on real machine. __m128i __lsx_vmod_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_b (__m128i a, __m128i b) #include Instruction: vmod.b vr, vr, vr CPU Flags: LSX Description Modulo residual signed 8-bit elements in a by elements in b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] % (s8)b.byte[i]); } Tested on real machine. __m128i __lsx_vmod_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_bu (__m128i a, __m128i b) #include Instruction: vmod.bu vr, vr, vr CPU Flags: LSX Description Modulo residual unsigned 8-bit elements in a by elements in b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] % (u8)b.byte[i]); } Tested on real machine. __m128i __lsx_vmod_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_h (__m128i a, __m128i b) #include Instruction: vmod.h vr, vr, vr CPU Flags: LSX Description Modulo residual signed 16-bit elements in a by elements in b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] % (s16)b.half[i]); } Tested on real machine. __m128i __lsx_vmod_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_hu (__m128i a, __m128i b) #include Instruction: vmod.hu vr, vr, vr CPU Flags: LSX Description Modulo residual unsigned 16-bit elements in a by elements in b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] % (u16)b.half[i]); } Tested on real machine. __m128i __lsx_vmod_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_w (__m128i a, __m128i b) #include Instruction: vmod.w vr, vr, vr CPU Flags: LSX Description Modulo residual signed 32-bit elements in a by elements in b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] % (s32)b.word[i]); } Tested on real machine. __m128i __lsx_vmod_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_wu (__m128i a, __m128i b) #include Instruction: vmod.wu vr, vr, vr CPU Flags: LSX Description Modulo residual unsigned 32-bit elements in a by elements in b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] % (u32)b.word[i]); } Tested on real machine. __m128i __lsx_vmod_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_d (__m128i a, __m128i b) #include Instruction: vmod.d vr, vr, vr CPU Flags: LSX Description Modulo residual signed 64-bit elements in a by elements in b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] % (s64)b.dword[i]); } Tested on real machine. __m128i __lsx_vmod_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vmod_du (__m128i a, __m128i b) #include Instruction: vmod.du vr, vr, vr CPU Flags: LSX Description Modulo residual unsigned 64-bit elements in a by elements in b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] % (u64)b.dword[i]); } Tested on real machine. __m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.b vr, vr, vr CPU Flags: LSX Description Multiply 8-bit elements in b and c , negate and add elements in a , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = -b.byte[i] * c.byte[i] + a.byte[i]; } Tested on real machine. __m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.h vr, vr, vr CPU Flags: LSX Description Multiply 16-bit elements in b and c , negate and add elements in a , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = -b.half[i] * c.half[i] + a.half[i]; } Tested on real machine. __m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.w vr, vr, vr CPU Flags: LSX Description Multiply 32-bit elements in b and c , negate and add elements in a , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = -b.word[i] * c.word[i] + a.word[i]; } Tested on real machine. __m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.d vr, vr, vr CPU Flags: LSX Description Multiply 64-bit elements in b and c , negate and add elements in a , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = -b.dword[i] * c.dword[i] + a.dword[i]; } Tested on real machine. __m128i __lsx_vmuh_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_b (__m128i a, __m128i b) #include Instruction: vmuh.b vr, vr, vr CPU Flags: LSX Description Multiply signed 8-bit elements in a and b , save the high 8-bit result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (((s16)(s8)a.byte[i] * (s16)(s8)b.byte[i])) >> 8; } Tested on real machine. __m128i __lsx_vmuh_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_bu (__m128i a, __m128i b) #include Instruction: vmuh.bu vr, vr, vr CPU Flags: LSX Description Multiply unsigned 8-bit elements in a and b , save the high 8-bit result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (((u16)(u8)a.byte[i] * (u16)(u8)b.byte[i])) >> 8; } Tested on real machine. __m128i __lsx_vmuh_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_h (__m128i a, __m128i b) #include Instruction: vmuh.h vr, vr, vr CPU Flags: LSX Description Multiply signed 16-bit elements in a and b , save the high 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (((s32)(s16)a.half[i] * (s32)(s16)b.half[i])) >> 16; } Tested on real machine. __m128i __lsx_vmuh_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_hu (__m128i a, __m128i b) #include Instruction: vmuh.hu vr, vr, vr CPU Flags: LSX Description Multiply unsigned 16-bit elements in a and b , save the high 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (((u32)(u16)a.half[i] * (u32)(u16)b.half[i])) >> 16; } Tested on real machine. __m128i __lsx_vmuh_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_w (__m128i a, __m128i b) #include Instruction: vmuh.w vr, vr, vr CPU Flags: LSX Description Multiply signed 32-bit elements in a and b , save the high 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (((s64)(s32)a.word[i] * (s64)(s32)b.word[i])) >> 32; } Tested on real machine. __m128i __lsx_vmuh_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_wu (__m128i a, __m128i b) #include Instruction: vmuh.wu vr, vr, vr CPU Flags: LSX Description Multiply unsigned 32-bit elements in a and b , save the high 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (((u64)(u32)a.word[i] * (u64)(u32)b.word[i])) >> 32; } Tested on real machine. __m128i __lsx_vmuh_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_d (__m128i a, __m128i b) #include Instruction: vmuh.d vr, vr, vr CPU Flags: LSX Description Multiply signed 64-bit elements in a and b , save the high 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (((s128)(s64)a.dword[i] * (s128)(s64)b.dword[i])) >> 64; } Tested on real machine. __m128i __lsx_vmuh_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vmuh_du (__m128i a, __m128i b) #include Instruction: vmuh.du vr, vr, vr CPU Flags: LSX Description Multiply unsigned 64-bit elements in a and b , save the high 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (((u128)(u64)a.dword[i] * (u128)(u64)b.dword[i])) >> 64; } Tested on real machine. __m128i __lsx_vmul_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vmul_b (__m128i a, __m128i b) #include Instruction: vmul.b vr, vr, vr CPU Flags: LSX Description Multiply 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] * b.byte[i]; } Tested on real machine. __m128i __lsx_vmul_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vmul_h (__m128i a, __m128i b) #include Instruction: vmul.h vr, vr, vr CPU Flags: LSX Description Multiply 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] * b.half[i]; } Tested on real machine. __m128i __lsx_vmul_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vmul_w (__m128i a, __m128i b) #include Instruction: vmul.w vr, vr, vr CPU Flags: LSX Description Multiply 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] * b.word[i]; } Tested on real machine. __m128i __lsx_vmul_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vmul_d (__m128i a, __m128i b) #include Instruction: vmul.d vr, vr, vr CPU Flags: LSX Description Multiply 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] * b.dword[i]; } Tested on real machine. __m128i __lsx_vmulwev_h_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_h_b (__m128i a, __m128i b) #include Instruction: vmulwev.h.b vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b) #include Instruction: vmulwev.h.bu vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] * (u16)(u8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b) #include Instruction: vmulwev.h.bu.b vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 8-bit elements in a and signed elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_w_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_w_h (__m128i a, __m128i b) #include Instruction: vmulwev.w.h vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] * (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b) #include Instruction: vmulwev.w.hu vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] * (u32)(u16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b) #include Instruction: vmulwev.w.hu.h vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 16-bit elements in a and signed elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] * (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_d_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_d_w (__m128i a, __m128i b) #include Instruction: vmulwev.d.w vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] * (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b) #include Instruction: vmulwev.d.wu vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] * (u64)(u32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b) #include Instruction: vmulwev.d.wu.w vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 32-bit elements in a and signed elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] * (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_q_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_q_d (__m128i a, __m128i b) #include Instruction: vmulwev.q.d vr, vr, vr CPU Flags: LSX Description Multiply even-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_q_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_q_du (__m128i a, __m128i b) #include Instruction: vmulwev.q.du vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] * (u128)(u64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b) #include Instruction: vmulwev.q.du.d vr, vr, vr CPU Flags: LSX Description Multiply even-positioned unsigned 64-bit elements in a and signed elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vsadd_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_b (__m128i a, __m128i b) #include Instruction: vsadd.b vr, vr, vr CPU Flags: LSX Description Saturing add the signed 8-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine. __m128i __lsx_vsadd_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_h (__m128i a, __m128i b) #include Instruction: vsadd.h vr, vr, vr CPU Flags: LSX Description Saturing add the signed 16-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]); } Tested on real machine. __m128i __lsx_vsadd_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_w (__m128i a, __m128i b) #include Instruction: vsadd.w vr, vr, vr CPU Flags: LSX Description Saturing add the signed 32-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]); } Tested on real machine. __m128i __lsx_vsadd_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_d (__m128i a, __m128i b) #include Instruction: vsadd.d vr, vr, vr CPU Flags: LSX Description Saturing add the signed 64-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine. __m128i __lsx_vsadd_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_b (__m128i a, __m128i b) #include Instruction: vsadd.b vr, vr, vr CPU Flags: LSX Description Saturing add the signed 8-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine. __m128i __lsx_vsadd_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_h (__m128i a, __m128i b) #include Instruction: vsadd.h vr, vr, vr CPU Flags: LSX Description Saturing add the signed 16-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]); } Tested on real machine. __m128i __lsx_vsadd_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_w (__m128i a, __m128i b) #include Instruction: vsadd.w vr, vr, vr CPU Flags: LSX Description Saturing add the signed 32-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]); } Tested on real machine. __m128i __lsx_vsadd_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsadd_d (__m128i a, __m128i b) #include Instruction: vsadd.d vr, vr, vr CPU Flags: LSX Description Saturing add the signed 64-bit elements in a and b , store the result to dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine. __m128i __lsx_vsub_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsub_b (__m128i a, __m128i b) #include Instruction: vsub.b vr, vr, vr CPU Flags: LSX Description Subtract 8-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] - b.byte[i]; } Tested on real machine. __m128i __lsx_vsub_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsub_h (__m128i a, __m128i b) #include Instruction: vsub.h vr, vr, vr CPU Flags: LSX Description Subtract 16-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] - b.half[i]; } Tested on real machine. __m128i __lsx_vsub_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsub_w (__m128i a, __m128i b) #include Instruction: vsub.w vr, vr, vr CPU Flags: LSX Description Subtract 32-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] - b.word[i]; } Tested on real machine. __m128i __lsx_vsub_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsub_d (__m128i a, __m128i b) #include Instruction: vsub.d vr, vr, vr CPU Flags: LSX Description Subtract 64-bit elements in a and b , save the result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] - b.dword[i]; } Tested on real machine. __m128i __lsx_vsub_q (__m128i a, __m128i b) Synopsis __m128i __lsx_vsub_q (__m128i a, __m128i b) #include Instruction: vsub.q vr, vr, vr CPU Flags: LSX Description Subtract 128-bit elements in a and b , save the result in dst . Operation dst.qword[0] = a.qword[0] - b.qword[0]; Tested on real machine. __m128i __lsx_vsubwev_h_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_h_b (__m128i a, __m128i b) #include Instruction: vsubwev.h.b vr, vr, vr CPU Flags: LSX Description Subtract even-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] - (s16)(s8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b) #include Instruction: vsubwev.h.bu vr, vr, vr CPU Flags: LSX Description Subtract even-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] - (u16)(u8)b.byte[2 * i]; } Tested on real machine. __m128i __lsx_vsubwev_w_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_w_h (__m128i a, __m128i b) #include Instruction: vsubwev.w.h vr, vr, vr CPU Flags: LSX Description Subtract even-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] - (s32)(s16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b) #include Instruction: vsubwev.w.hu vr, vr, vr CPU Flags: LSX Description Subtract even-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] - (u32)(u16)b.half[2 * i]; } Tested on real machine. __m128i __lsx_vsubwev_d_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_d_w (__m128i a, __m128i b) #include Instruction: vsubwev.d.w vr, vr, vr CPU Flags: LSX Description Subtract even-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] - (s64)(s32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b) #include Instruction: vsubwev.d.wu vr, vr, vr CPU Flags: LSX Description Subtract even-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] - (u64)(u32)b.word[2 * i]; } Tested on real machine. __m128i __lsx_vsubwev_q_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_q_d (__m128i a, __m128i b) #include Instruction: vsubwev.q.d vr, vr, vr CPU Flags: LSX Description Subtract even-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] - (s128)(s64)b.dword[2 * i]; } Tested on real machine. __m128i __lsx_vsubwev_q_du (__m128i a, __m128i b) Synopsis __m128i __lsx_vsubwev_q_du (__m128i a, __m128i b) #include Instruction: vsubwev.q.du vr, vr, vr CPU Flags: LSX Description Subtract even-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst . Operation for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] - (u128)(u64)b.dword[2 * i]; } Tested on real machine.","title":"Integer Computation"},{"location":"lsx/integer_computation/#integer-computation","text":"","title":"Integer Computation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadd_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadd_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis","text":"__m128i __lsx_vadd_b (__m128i a, __m128i b) #include Instruction: vadd.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description","text":"Add 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] + b.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadd_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadd_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_1","text":"__m128i __lsx_vadd_h (__m128i a, __m128i b) #include Instruction: vadd.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_1","text":"Add 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_1","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] + b.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadd_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadd_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_2","text":"__m128i __lsx_vadd_w (__m128i a, __m128i b) #include Instruction: vadd.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_2","text":"Add 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_2","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] + b.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadd_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadd_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_3","text":"__m128i __lsx_vadd_d (__m128i a, __m128i b) #include Instruction: vadd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_3","text":"Add 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_3","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] + b.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadd_q-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadd_q (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_4","text":"__m128i __lsx_vadd_q (__m128i a, __m128i b) #include Instruction: vadd.q vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_4","text":"Add 128-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_4","text":"dst.qword[0] = a.qword[0] + b.qword[0]; Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_5","text":"__m128i __lsx_vabsd_b (__m128i a, __m128i b) #include Instruction: vabsd.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_5","text":"Compute absolute difference of signed 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_5","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] > (s8)b.byte[i]) ? (a.byte[i] - b.byte[i]) : (b.byte[i] - a.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_6","text":"__m128i __lsx_vabsd_bu (__m128i a, __m128i b) #include Instruction: vabsd.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_6","text":"Compute absolute difference of unsigned 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_6","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] > (u8)b.byte[i]) ? (a.byte[i] - b.byte[i]) : (b.byte[i] - a.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_7","text":"__m128i __lsx_vabsd_h (__m128i a, __m128i b) #include Instruction: vabsd.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_7","text":"Compute absolute difference of signed 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_7","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] > (s16)b.half[i]) ? (a.half[i] - b.half[i]) : (b.half[i] - a.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_8","text":"__m128i __lsx_vabsd_hu (__m128i a, __m128i b) #include Instruction: vabsd.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_8","text":"Compute absolute difference of unsigned 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_8","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] > (u16)b.half[i]) ? (a.half[i] - b.half[i]) : (b.half[i] - a.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_9","text":"__m128i __lsx_vabsd_w (__m128i a, __m128i b) #include Instruction: vabsd.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_9","text":"Compute absolute difference of signed 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_9","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] > (s32)b.word[i]) ? (a.word[i] - b.word[i]) : (b.word[i] - a.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_10","text":"__m128i __lsx_vabsd_wu (__m128i a, __m128i b) #include Instruction: vabsd.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_10","text":"Compute absolute difference of unsigned 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_10","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] > (u32)b.word[i]) ? (a.word[i] - b.word[i]) : (b.word[i] - a.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_11","text":"__m128i __lsx_vabsd_d (__m128i a, __m128i b) #include Instruction: vabsd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_11","text":"Compute absolute difference of signed 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_11","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] > (s64)b.dword[i]) ? (a.dword[i] - b.dword[i]) : (b.dword[i] - a.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vabsd_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vabsd_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_12","text":"__m128i __lsx_vabsd_du (__m128i a, __m128i b) #include Instruction: vabsd.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_12","text":"Compute absolute difference of unsigned 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_12","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] > (u64)b.dword[i]) ? (a.dword[i] - b.dword[i]) : (b.dword[i] - a.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadda_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadda_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_13","text":"__m128i __lsx_vadda_b (__m128i a, __m128i b) #include Instruction: vadda.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_13","text":"Add absolute of 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_13","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = abs((s8)a.byte[i]) + abs((s8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadda_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadda_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_14","text":"__m128i __lsx_vadda_h (__m128i a, __m128i b) #include Instruction: vadda.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_14","text":"Add absolute of 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_14","text":"for (int i = 0; i < 8; i++) { dst.half[i] = abs((s16)a.half[i]) + abs((s16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadda_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadda_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_15","text":"__m128i __lsx_vadda_w (__m128i a, __m128i b) #include Instruction: vadda.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_15","text":"Add absolute of 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_15","text":"for (int i = 0; i < 4; i++) { dst.word[i] = abs((s32)a.word[i]) + abs((s32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vadda_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vadda_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_16","text":"__m128i __lsx_vadda_d (__m128i a, __m128i b) #include Instruction: vadda.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_16","text":"Add absolute of 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_16","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = abs((s64)a.dword[i]) + abs((s64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddi_bu-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_17","text":"__m128i __lsx_vaddi_bu (__m128i a, imm0_31 imm) #include Instruction: vaddi.bu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_17","text":"Add 8-bit elements in a and imm , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_17","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] + imm; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddi_hu-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_18","text":"__m128i __lsx_vaddi_hu (__m128i a, imm0_31 imm) #include Instruction: vaddi.hu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_18","text":"Add 16-bit elements in a and imm , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_18","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] + imm; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddi_wu-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_19","text":"__m128i __lsx_vaddi_wu (__m128i a, imm0_31 imm) #include Instruction: vaddi.wu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_19","text":"Add 32-bit elements in a and imm , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_19","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] + imm; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddi_du-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vaddi_du (__m128i a, imm0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_20","text":"__m128i __lsx_vaddi_du (__m128i a, imm0_31 imm) #include Instruction: vaddi.du vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_20","text":"Add 64-bit elements in a and imm , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_20","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] + imm; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_h_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_21","text":"__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_21","text":"Add even-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_21","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_h_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_22","text":"__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_22","text":"Add even-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_22","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_h_bu_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_23","text":"__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_23","text":"Add even-positioned unsigned 8-bit elements in a and signed elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_23","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_w_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_24","text":"__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_24","text":"Add even-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_24","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_w_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_25","text":"__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_25","text":"Add even-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_25","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_w_hu_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_26","text":"__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_26","text":"Add even-positioned unsigned 16-bit elements in a and signed elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_26","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_d_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_27","text":"__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_27","text":"Add even-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_27","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_d_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_28","text":"__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_28","text":"Add even-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_28","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_d_wu_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_29","text":"__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_29","text":"Add even-positioned unsigned 32-bit elements in a and signed elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_29","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_q_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_30","text":"__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_30","text":"Add even-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_30","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_q_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_31","text":"__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b) #include Instruction: vaddwev.q.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_31","text":"Add even-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_31","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_q_du_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_32","text":"__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.du.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_32","text":"Add even-positioned unsigned 64-bit elements in a and signed elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_32","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_h_b-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_33","text":"__m128i __lsx_vaddwev_h_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_33","text":"Add odd-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_33","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_h_bu-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_34","text":"__m128i __lsx_vaddwev_h_bu (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_34","text":"Add odd-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_34","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (u16)(u8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_h_bu_b-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_35","text":"__m128i __lsx_vaddwev_h_bu_b (__m128i a, __m128i b) #include Instruction: vaddwev.h.bu.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_35","text":"Add odd-positioned unsigned 8-bit elements in a and signed elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_35","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] + (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_w_h-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_36","text":"__m128i __lsx_vaddwev_w_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_36","text":"Add odd-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_36","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_w_hu-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_37","text":"__m128i __lsx_vaddwev_w_hu (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_37","text":"Add odd-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_37","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (u32)(u16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_w_hu_h-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_38","text":"__m128i __lsx_vaddwev_w_hu_h (__m128i a, __m128i b) #include Instruction: vaddwev.w.hu.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_38","text":"Add odd-positioned unsigned 16-bit elements in a and signed elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_38","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] + (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_d_w-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_39","text":"__m128i __lsx_vaddwev_d_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_39","text":"Add odd-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_39","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_d_wu-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_40","text":"__m128i __lsx_vaddwev_d_wu (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_40","text":"Add odd-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_40","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (u64)(u32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_d_wu_w-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_41","text":"__m128i __lsx_vaddwev_d_wu_w (__m128i a, __m128i b) #include Instruction: vaddwev.d.wu.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_41","text":"Add odd-positioned unsigned 32-bit elements in a and signed elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_41","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] + (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_q_d-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_42","text":"__m128i __lsx_vaddwev_q_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_42","text":"Add odd-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_42","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_q_du-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_43","text":"__m128i __lsx_vaddwev_q_du (__m128i a, __m128i b) #include Instruction: vaddwev.q.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_43","text":"Add odd-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_43","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (u128)(u64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vaddwev_q_du_d-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_44","text":"__m128i __lsx_vaddwev_q_du_d (__m128i a, __m128i b) #include Instruction: vaddwev.q.du.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_44","text":"Add odd-positioned unsigned 64-bit elements in a and signed elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_44","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] + (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_45","text":"__m128i __lsx_vavg_b (__m128i a, __m128i b) #include Instruction: vavg.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_45","text":"Compute the average (rounded towards negative infinity) of signed 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_45","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) + (a.byte[i] & b.byte[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_46","text":"__m128i __lsx_vavg_bu (__m128i a, __m128i b) #include Instruction: vavg.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_46","text":"Compute the average (rounded towards negative infinity) of unsigned 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_46","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) + (a.byte[i] & b.byte[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_47","text":"__m128i __lsx_vavg_h (__m128i a, __m128i b) #include Instruction: vavg.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_47","text":"Compute the average (rounded towards negative infinity) of signed 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_47","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) + (a.half[i] & b.half[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_48","text":"__m128i __lsx_vavg_hu (__m128i a, __m128i b) #include Instruction: vavg.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_48","text":"Compute the average (rounded towards negative infinity) of unsigned 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_48","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) + (a.half[i] & b.half[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_49","text":"__m128i __lsx_vavg_w (__m128i a, __m128i b) #include Instruction: vavg.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_49","text":"Compute the average (rounded towards negative infinity) of signed 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_49","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) + (a.word[i] & b.word[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_50","text":"__m128i __lsx_vavg_wu (__m128i a, __m128i b) #include Instruction: vavg.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_50","text":"Compute the average (rounded towards negative infinity) of unsigned 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_50","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) + (a.word[i] & b.word[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_51","text":"__m128i __lsx_vavg_d (__m128i a, __m128i b) #include Instruction: vavg.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_51","text":"Compute the average (rounded towards negative infinity) of signed 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_51","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) + (a.dword[i] & b.dword[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavg_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavg_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_52","text":"__m128i __lsx_vavg_du (__m128i a, __m128i b) #include Instruction: vavg.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_52","text":"Compute the average (rounded towards negative infinity) of unsigned 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_52","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) + (a.dword[i] & b.dword[i] & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_53","text":"__m128i __lsx_vavgr_b (__m128i a, __m128i b) #include Instruction: vavgr.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_53","text":"Compute the average (rounded towards positive infinity) of signed 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_53","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i] >> 1) + ((s8)b.byte[i] >> 1) + ((a.byte[i] | b.byte[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_54","text":"__m128i __lsx_vavgr_bu (__m128i a, __m128i b) #include Instruction: vavgr.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_54","text":"Compute the average (rounded towards positive infinity) of unsigned 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_54","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((u8)a.byte[i] >> 1) + ((u8)b.byte[i] >> 1) + ((a.byte[i] | b.byte[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_55","text":"__m128i __lsx_vavgr_h (__m128i a, __m128i b) #include Instruction: vavgr.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_55","text":"Compute the average (rounded towards positive infinity) of signed 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_55","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i] >> 1) + ((s16)b.half[i] >> 1) + ((a.half[i] | b.half[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_56","text":"__m128i __lsx_vavgr_hu (__m128i a, __m128i b) #include Instruction: vavgr.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_56","text":"Compute the average (rounded towards positive infinity) of unsigned 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_56","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((u16)a.half[i] >> 1) + ((u16)b.half[i] >> 1) + ((a.half[i] | b.half[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_57","text":"__m128i __lsx_vavgr_w (__m128i a, __m128i b) #include Instruction: vavgr.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_57","text":"Compute the average (rounded towards positive infinity) of signed 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_57","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i] >> 1) + ((s32)b.word[i] >> 1) + ((a.word[i] | b.word[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_58","text":"__m128i __lsx_vavgr_wu (__m128i a, __m128i b) #include Instruction: vavgr.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_58","text":"Compute the average (rounded towards positive infinity) of unsigned 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_58","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((u32)a.word[i] >> 1) + ((u32)b.word[i] >> 1) + ((a.word[i] | b.word[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_59","text":"__m128i __lsx_vavgr_d (__m128i a, __m128i b) #include Instruction: vavgr.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_59","text":"Compute the average (rounded towards positive infinity) of signed 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_59","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i] >> 1) + ((s64)b.dword[i] >> 1) + ((a.dword[i] | b.dword[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vavgr_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vavgr_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_60","text":"__m128i __lsx_vavgr_du (__m128i a, __m128i b) #include Instruction: vavgr.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_60","text":"Compute the average (rounded towards positive infinity) of unsigned 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_60","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((u64)a.dword[i] >> 1) + ((u64)b.dword[i] >> 1) + ((a.dword[i] | b.dword[i]) & 1); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_61","text":"__m128i __lsx_div_b (__m128i a, __m128i b) #include Instruction: vdiv.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_61","text":"Divide signed 8-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_61","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] / (s8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_62","text":"__m128i __lsx_div_bu (__m128i a, __m128i b) #include Instruction: vdiv.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_62","text":"Divide unsigned 8-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_62","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] / (u8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_63","text":"__m128i __lsx_div_h (__m128i a, __m128i b) #include Instruction: vdiv.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_63","text":"Divide signed 16-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_63","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] / (s16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_64","text":"__m128i __lsx_div_hu (__m128i a, __m128i b) #include Instruction: vdiv.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_64","text":"Divide unsigned 16-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_64","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] / (u16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_65","text":"__m128i __lsx_div_w (__m128i a, __m128i b) #include Instruction: vdiv.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_65","text":"Divide signed 32-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_65","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] / (s32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_66","text":"__m128i __lsx_div_wu (__m128i a, __m128i b) #include Instruction: vdiv.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_66","text":"Divide unsigned 32-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_66","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] / (u32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_67","text":"__m128i __lsx_div_d (__m128i a, __m128i b) #include Instruction: vdiv.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_67","text":"Divide signed 64-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_67","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] / (s64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_div_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_div_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_68","text":"__m128i __lsx_div_du (__m128i a, __m128i b) #include Instruction: vdiv.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_68","text":"Divide unsigned 64-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_68","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] / (u64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_h_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_h_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_69","text":"__m128i __lsx_vhaddw_h_b (__m128i a, __m128i b) #include Instruction: vhaddw.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_69","text":"Add odd-positioned signed 8-bit elements in a to even-positioned signed 8-bit elements in 'b' to get 16-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_69","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i + 1] + (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_hu_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_70","text":"__m128i __lsx_vhaddw_hu_bu (__m128i a, __m128i b) #include Instruction: vhaddw.hu.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_70","text":"Add odd-positioned unsigned 8-bit elements in a to even-positioned unsigned 8-bit elements in 'b' to get 16-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_70","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i + 1] + (u16)(u8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_w_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_w_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_71","text":"__m128i __lsx_vhaddw_w_h (__m128i a, __m128i b) #include Instruction: vhaddw.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_71","text":"Add odd-positioned signed 16-bit elements in a to even-positioned signed 16-bit elements in 'b' to get 32-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_71","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i + 1] + (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_wu_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_72","text":"__m128i __lsx_vhaddw_wu_hu (__m128i a, __m128i b) #include Instruction: vhaddw.wu.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_72","text":"Add odd-positioned unsigned 16-bit elements in a to even-positioned unsigned 16-bit elements in 'b' to get 32-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_72","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i + 1] + (u32)(u16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_d_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_d_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_73","text":"__m128i __lsx_vhaddw_d_w (__m128i a, __m128i b) #include Instruction: vhaddw.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_73","text":"Add odd-positioned signed 32-bit elements in a to even-positioned signed 32-bit elements in 'b' to get 64-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_73","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i + 1] + (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_du_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_74","text":"__m128i __lsx_vhaddw_du_wu (__m128i a, __m128i b) #include Instruction: vhaddw.du.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_74","text":"Add odd-positioned unsigned 32-bit elements in a to even-positioned unsigned 32-bit elements in 'b' to get 64-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_74","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i + 1] + (u64)(u32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_q_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_q_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_75","text":"__m128i __lsx_vhaddw_q_d (__m128i a, __m128i b) #include Instruction: vhaddw.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_75","text":"Add odd-positioned signed 64-bit elements in a to even-positioned signed 64-bit elements in 'b' to get 128-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_75","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] + (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhaddw_qu_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_76","text":"__m128i __lsx_vhaddw_qu_du (__m128i a, __m128i b) #include Instruction: vhaddw.qu.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_76","text":"Add odd-positioned unsigned 64-bit elements in a to even-positioned unsigned 64-bit elements in 'b' to get 128-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_76","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] + (u128)(u64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_h_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_h_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_77","text":"__m128i __lsx_vhsubw_h_b (__m128i a, __m128i b) #include Instruction: vhsubw.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_77","text":"Subtract odd-positioned signed 8-bit elements in a by even-positioned signed 8-bit elements in 'b' to get 16-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_77","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i + 1] - (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_hu_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_78","text":"__m128i __lsx_vhsubw_hu_bu (__m128i a, __m128i b) #include Instruction: vhsubw.hu.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_78","text":"Subtract odd-positioned unsigned 8-bit elements in a by even-positioned unsigned 8-bit elements in 'b' to get 16-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_78","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i + 1] - (u16)(u8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_w_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_w_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_79","text":"__m128i __lsx_vhsubw_w_h (__m128i a, __m128i b) #include Instruction: vhsubw.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_79","text":"Subtract odd-positioned signed 16-bit elements in a by even-positioned signed 16-bit elements in 'b' to get 32-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_79","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i + 1] - (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_wu_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_80","text":"__m128i __lsx_vhsubw_wu_hu (__m128i a, __m128i b) #include Instruction: vhsubw.wu.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_80","text":"Subtract odd-positioned unsigned 16-bit elements in a by even-positioned unsigned 16-bit elements in 'b' to get 32-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_80","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i + 1] - (u32)(u16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_d_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_d_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_81","text":"__m128i __lsx_vhsubw_d_w (__m128i a, __m128i b) #include Instruction: vhsubw.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_81","text":"Subtract odd-positioned signed 32-bit elements in a by even-positioned signed 32-bit elements in 'b' to get 64-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_81","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i + 1] - (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_du_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_82","text":"__m128i __lsx_vhsubw_du_wu (__m128i a, __m128i b) #include Instruction: vhsubw.du.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_82","text":"Subtract odd-positioned unsigned 32-bit elements in a by even-positioned unsigned 32-bit elements in 'b' to get 64-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_82","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i + 1] - (u64)(u32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_q_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_q_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_83","text":"__m128i __lsx_vhsubw_q_d (__m128i a, __m128i b) #include Instruction: vhsubw.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_83","text":"Subtract odd-positioned signed 64-bit elements in a by even-positioned signed 64-bit elements in 'b' to get 128-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_83","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i + 1] - (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vhsubw_qu_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_84","text":"__m128i __lsx_vhsubw_qu_du (__m128i a, __m128i b) #include Instruction: vhsubw.qu.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_84","text":"Subtract odd-positioned unsigned 64-bit elements in a by even-positioned unsigned 64-bit elements in 'b' to get 128-bit result.","title":"Description"},{"location":"lsx/integer_computation/#operation_84","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i + 1] - (u128)(u64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmadd_b-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_85","text":"__m128i __lsx_vmadd_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_85","text":"Multiply 8-bit elements in b and c , add to elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_85","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = b.byte[i] * c.byte[i] + a.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmadd_h-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_86","text":"__m128i __lsx_vmadd_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_86","text":"Multiply 16-bit elements in b and c , add to elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_86","text":"for (int i = 0; i < 8; i++) { dst.half[i] = b.half[i] * c.half[i] + a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmadd_w-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_87","text":"__m128i __lsx_vmadd_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_87","text":"Multiply 32-bit elements in b and c , add to elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_87","text":"for (int i = 0; i < 4; i++) { dst.word[i] = b.word[i] * c.word[i] + a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmadd_d-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_88","text":"__m128i __lsx_vmadd_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmadd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_88","text":"Multiply 64-bit elements in b and c , add to elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_88","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = b.dword[i] * c.dword[i] + a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_h_b-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_89","text":"__m128i __lsx_vmaddwev_h_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_89","text":"Multiply even-positioned signed 8-bit elements in b and signed elements in c , add to 16-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_89","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_h_bu-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_90","text":"__m128i __lsx_vmaddwev_h_bu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.h.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_90","text":"Multiply even-positioned unsigned 8-bit elements in b and unsigned elements in c , add to 16-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_90","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i] * (u16)(u8)c.byte[2 * i] + (u16)a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_h_bu_b-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_91","text":"__m128i __lsx_vmaddwev_h_bu_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.h.bu.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_91","text":"Multiply even-positioned unsigned 8-bit elements in b and signed elements in c , add to 16-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_91","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i] * (s16)(s8)c.byte[2 * i] + (s16)a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_w_h-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_92","text":"__m128i __lsx_vmaddwev_w_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_92","text":"Multiply even-positioned signed 16-bit elements in b and signed elements in c , add to 32-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_92","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_w_hu-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_93","text":"__m128i __lsx_vmaddwev_w_hu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.w.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_93","text":"Multiply even-positioned unsigned 16-bit elements in b and unsigned elements in c , add to 32-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_93","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i] * (u32)(u16)c.half[2 * i] + (u32)a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_w_hu_h-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_94","text":"__m128i __lsx_vmaddwev_w_hu_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.w.hu.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_94","text":"Multiply even-positioned unsigned 16-bit elements in b and signed elements in c , add to 32-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_94","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i] * (s32)(s16)c.half[2 * i] + (s32)a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_d_w-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_95","text":"__m128i __lsx_vmaddwev_d_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_95","text":"Multiply even-positioned signed 32-bit elements in b and signed elements in c , add to 64-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_95","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_d_wu-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_96","text":"__m128i __lsx_vmaddwev_d_wu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.d.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_96","text":"Multiply even-positioned unsigned 32-bit elements in b and unsigned elements in c , add to 64-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_96","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i] * (u64)(u32)c.word[2 * i] + (u64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_d_wu_w-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_97","text":"__m128i __lsx_vmaddwev_d_wu_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.d.wu.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_97","text":"Multiply even-positioned unsigned 32-bit elements in b and signed elements in c , add to 64-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_97","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i] * (s64)(s32)c.word[2 * i] + (s64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_q_d-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_98","text":"__m128i __lsx_vmaddwev_q_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_98","text":"Multiply even-positioned signed 64-bit elements in b and signed elements in c , add to 128-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_98","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_q_du-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_99","text":"__m128i __lsx_vmaddwev_q_du (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.q.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_99","text":"Multiply even-positioned unsigned 64-bit elements in b and unsigned elements in c , add to 128-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_99","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i] * (u128)(u64)c.dword[2 * i] + (u128)a.qword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwev_q_du_d-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_100","text":"__m128i __lsx_vmaddwev_q_du_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwev.q.du.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_100","text":"Multiply even-positioned unsigned 64-bit elements in b and signed elements in c , add to 128-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_100","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i] * (s128)(s64)c.dword[2 * i] + (s128)a.qword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_h_b-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_101","text":"__m128i __lsx_vmaddwod_h_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_101","text":"Multiply odd-positioned signed 8-bit elements in b and signed elements in c , add to 16-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_101","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_h_bu-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_102","text":"__m128i __lsx_vmaddwod_h_bu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.h.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_102","text":"Multiply odd-positioned unsigned 8-bit elements in b and unsigned elements in c , add to 16-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_102","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i + 1] * (u16)(u8)c.byte[2 * i + 1] + (u16)a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_h_bu_b-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_103","text":"__m128i __lsx_vmaddwod_h_bu_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.h.bu.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_103","text":"Multiply odd-positioned unsigned 8-bit elements in b and signed elements in c , add to 16-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_103","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)b.byte[2 * i + 1] * (s16)(s8)c.byte[2 * i + 1] + (s16)a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_w_h-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_104","text":"__m128i __lsx_vmaddwod_w_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_104","text":"Multiply odd-positioned signed 16-bit elements in b and signed elements in c , add to 32-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_104","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] + (s32)a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_w_hu-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_105","text":"__m128i __lsx_vmaddwod_w_hu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.w.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_105","text":"Multiply odd-positioned unsigned 16-bit elements in b and unsigned elements in c , add to 32-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_105","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (u32)(u16)c.half[2 * i + 1] + (u32)a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_w_hu_h-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_106","text":"__m128i __lsx_vmaddwod_w_hu_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.w.hu.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_106","text":"Multiply odd-positioned unsigned 16-bit elements in b and signed elements in c , add to 32-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_106","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)b.half[2 * i + 1] * (s32)(s16)c.half[2 * i + 1] + (s32)a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_d_w-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_107","text":"__m128i __lsx_vmaddwod_d_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_107","text":"Multiply odd-positioned signed 32-bit elements in b and signed elements in c , add to 64-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_107","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] + (s64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_d_wu-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_108","text":"__m128i __lsx_vmaddwod_d_wu (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.d.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_108","text":"Multiply odd-positioned unsigned 32-bit elements in b and unsigned elements in c , add to 64-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_108","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (u64)(u32)c.word[2 * i + 1] + (u64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_d_wu_w-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_109","text":"__m128i __lsx_vmaddwod_d_wu_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.d.wu.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_109","text":"Multiply odd-positioned unsigned 32-bit elements in b and signed elements in c , add to 64-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_109","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)b.word[2 * i + 1] * (s64)(s32)c.word[2 * i + 1] + (s64)a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_q_d-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_110","text":"__m128i __lsx_vmaddwod_q_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_110","text":"Multiply odd-positioned signed 64-bit elements in b and signed elements in c , add to 128-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_110","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] + (s128)a.qword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_q_du-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_111","text":"__m128i __lsx_vmaddwod_q_du (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.q.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_111","text":"Multiply odd-positioned unsigned 64-bit elements in b and unsigned elements in c , add to 128-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_111","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (u128)(u64)c.dword[2 * i + 1] + (u128)a.qword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaddwod_q_du_d-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_112","text":"__m128i __lsx_vmaddwod_q_du_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmaddwod.q.du.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_112","text":"Multiply odd-positioned unsigned 64-bit elements in b and signed elements in c , add to 128-bit elements in a .","title":"Description"},{"location":"lsx/integer_computation/#operation_112","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)b.dword[2 * i + 1] * (s128)(s64)c.dword[2 * i + 1] + (s128)a.qword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_113","text":"__m128i __lsx_vmax_b (__m128i a, __m128i b) #include Instruction: vmax.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_113","text":"Compute elementwise maximum for signed 8-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_113","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = max((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_114","text":"__m128i __lsx_vmax_bu (__m128i a, __m128i b) #include Instruction: vmax.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_114","text":"Compute elementwise maximum for unsigned 8-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_114","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = max((u8)a.byte[i], (u8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_115","text":"__m128i __lsx_vmax_h (__m128i a, __m128i b) #include Instruction: vmax.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_115","text":"Compute elementwise maximum for signed 16-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_115","text":"for (int i = 0; i < 8; i++) { dst.half[i] = max((s16)a.half[i], (s16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_116","text":"__m128i __lsx_vmax_hu (__m128i a, __m128i b) #include Instruction: vmax.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_116","text":"Compute elementwise maximum for unsigned 16-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_116","text":"for (int i = 0; i < 8; i++) { dst.half[i] = max((u16)a.half[i], (u16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_117","text":"__m128i __lsx_vmax_w (__m128i a, __m128i b) #include Instruction: vmax.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_117","text":"Compute elementwise maximum for signed 32-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_117","text":"for (int i = 0; i < 4; i++) { dst.word[i] = max((s32)a.word[i], (s32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_118","text":"__m128i __lsx_vmax_wu (__m128i a, __m128i b) #include Instruction: vmax.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_118","text":"Compute elementwise maximum for unsigned 32-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_118","text":"for (int i = 0; i < 4; i++) { dst.word[i] = max((u32)a.word[i], (u32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_119","text":"__m128i __lsx_vmax_d (__m128i a, __m128i b) #include Instruction: vmax.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_119","text":"Compute elementwise maximum for signed 64-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_119","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = max((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmax_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmax_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_120","text":"__m128i __lsx_vmax_du (__m128i a, __m128i b) #include Instruction: vmax.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_120","text":"Compute elementwise maximum for unsigned 64-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_120","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = max((u64)a.dword[i], (u64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_b-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_121","text":"__m128i __lsx_vmaxi_b (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_121","text":"Compute elementwise maximum for signed 8-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_121","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = max((s8)a.byte[i], (s8)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_bu-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmaxi_bu (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_122","text":"__m128i __lsx_vmaxi_bu (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.bu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_122","text":"Compute elementwise maximum for unsigned 8-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_122","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = max((u8)a.byte[i], (u8)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_h-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_123","text":"__m128i __lsx_vmaxi_h (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.h vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_123","text":"Compute elementwise maximum for signed 16-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_123","text":"for (int i = 0; i < 8; i++) { dst.half[i] = max((s16)a.half[i], (s16)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_hu-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmaxi_hu (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_124","text":"__m128i __lsx_vmaxi_hu (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.hu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_124","text":"Compute elementwise maximum for unsigned 16-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_124","text":"for (int i = 0; i < 8; i++) { dst.half[i] = max((u16)a.half[i], (u16)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_w-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_125","text":"__m128i __lsx_vmaxi_w (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_125","text":"Compute elementwise maximum for signed 32-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_125","text":"for (int i = 0; i < 4; i++) { dst.word[i] = max((s32)a.word[i], (s32)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_wu-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmaxi_wu (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_126","text":"__m128i __lsx_vmaxi_wu (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.wu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_126","text":"Compute elementwise maximum for unsigned 32-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_126","text":"for (int i = 0; i < 4; i++) { dst.word[i] = max((u32)a.word[i], (u32)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_d-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_127","text":"__m128i __lsx_vmaxi_d (__m128i a, imm_n16_15 imm) #include Instruction: vmaxi.d vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_127","text":"Compute elementwise maximum for signed 64-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_127","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = max((s64)a.dword[i], (s64)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmaxi_du-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmaxi_du (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_128","text":"__m128i __lsx_vmaxi_du (__m128i a, imm_0_31 imm) #include Instruction: vmaxi.du vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_128","text":"Compute elementwise maximum for unsigned 64-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_128","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = max((u64)a.dword[i], (u64)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_129","text":"__m128i __lsx_vmin_b (__m128i a, __m128i b) #include Instruction: vmin.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_129","text":"Compute elementwise minimum for signed 8-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_129","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = min((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_130","text":"__m128i __lsx_vmin_bu (__m128i a, __m128i b) #include Instruction: vmin.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_130","text":"Compute elementwise minimum for unsigned 8-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_130","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = min((u8)a.byte[i], (u8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_131","text":"__m128i __lsx_vmin_h (__m128i a, __m128i b) #include Instruction: vmin.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_131","text":"Compute elementwise minimum for signed 16-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_131","text":"for (int i = 0; i < 8; i++) { dst.half[i] = min((s16)a.half[i], (s16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_132","text":"__m128i __lsx_vmin_hu (__m128i a, __m128i b) #include Instruction: vmin.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_132","text":"Compute elementwise minimum for unsigned 16-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_132","text":"for (int i = 0; i < 8; i++) { dst.half[i] = min((u16)a.half[i], (u16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_133","text":"__m128i __lsx_vmin_w (__m128i a, __m128i b) #include Instruction: vmin.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_133","text":"Compute elementwise minimum for signed 32-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_133","text":"for (int i = 0; i < 4; i++) { dst.word[i] = min((s32)a.word[i], (s32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_134","text":"__m128i __lsx_vmin_wu (__m128i a, __m128i b) #include Instruction: vmin.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_134","text":"Compute elementwise minimum for unsigned 32-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_134","text":"for (int i = 0; i < 4; i++) { dst.word[i] = min((u32)a.word[i], (u32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_135","text":"__m128i __lsx_vmin_d (__m128i a, __m128i b) #include Instruction: vmin.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_135","text":"Compute elementwise minimum for signed 64-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_135","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = min((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmin_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmin_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_136","text":"__m128i __lsx_vmin_du (__m128i a, __m128i b) #include Instruction: vmin.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_136","text":"Compute elementwise minimum for unsigned 64-bit elements in a and b .","title":"Description"},{"location":"lsx/integer_computation/#operation_136","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = min((u64)a.dword[i], (u64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_b-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_137","text":"__m128i __lsx_vmini_b (__m128i a, imm_n16_15 imm) #include Instruction: vmini.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_137","text":"Compute elementwise minimum for signed 8-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_137","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = min((s8)a.byte[i], (s8)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_bu-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmini_bu (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_138","text":"__m128i __lsx_vmini_bu (__m128i a, imm_0_31 imm) #include Instruction: vmini.bu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_138","text":"Compute elementwise minimum for unsigned 8-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_138","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = min((u8)a.byte[i], (u8)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_h-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_139","text":"__m128i __lsx_vmini_h (__m128i a, imm_n16_15 imm) #include Instruction: vmini.h vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_139","text":"Compute elementwise minimum for signed 16-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_139","text":"for (int i = 0; i < 8; i++) { dst.half[i] = min((s16)a.half[i], (s16)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_hu-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmini_hu (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_140","text":"__m128i __lsx_vmini_hu (__m128i a, imm_0_31 imm) #include Instruction: vmini.hu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_140","text":"Compute elementwise minimum for unsigned 16-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_140","text":"for (int i = 0; i < 8; i++) { dst.half[i] = min((u16)a.half[i], (u16)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_w-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_141","text":"__m128i __lsx_vmini_w (__m128i a, imm_n16_15 imm) #include Instruction: vmini.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_141","text":"Compute elementwise minimum for signed 32-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_141","text":"for (int i = 0; i < 4; i++) { dst.word[i] = min((s32)a.word[i], (s32)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_wu-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmini_wu (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_142","text":"__m128i __lsx_vmini_wu (__m128i a, imm_0_31 imm) #include Instruction: vmini.wu vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_142","text":"Compute elementwise minimum for unsigned 32-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_142","text":"for (int i = 0; i < 4; i++) { dst.word[i] = min((u32)a.word[i], (u32)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_d-__m128i-a-imm_n16_15-imm","text":"","title":"__m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm)"},{"location":"lsx/integer_computation/#synopsis_143","text":"__m128i __lsx_vmini_d (__m128i a, imm_n16_15 imm) #include Instruction: vmini.d vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_143","text":"Compute elementwise minimum for signed 64-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_143","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = min((s64)a.dword[i], (s64)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmini_du-__m128i-a-imm_0_31-imm","text":"","title":"__m128i __lsx_vmini_du (__m128i a, imm_0_31 imm)"},{"location":"lsx/integer_computation/#synopsis_144","text":"__m128i __lsx_vmini_du (__m128i a, imm_0_31 imm) #include Instruction: vmini.du vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_144","text":"Compute elementwise minimum for unsigned 64-bit elements in a and imm .","title":"Description"},{"location":"lsx/integer_computation/#operation_144","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = min((u64)a.dword[i], (u64)imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_145","text":"__m128i __lsx_vmod_b (__m128i a, __m128i b) #include Instruction: vmod.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_145","text":"Modulo residual signed 8-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_145","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((s8)a.byte[i] % (s8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_146","text":"__m128i __lsx_vmod_bu (__m128i a, __m128i b) #include Instruction: vmod.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_146","text":"Modulo residual unsigned 8-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_146","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (b.byte[i] == 0) ? 0 : ((u8)a.byte[i] % (u8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_147","text":"__m128i __lsx_vmod_h (__m128i a, __m128i b) #include Instruction: vmod.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_147","text":"Modulo residual signed 16-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_147","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((s16)a.half[i] % (s16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_148","text":"__m128i __lsx_vmod_hu (__m128i a, __m128i b) #include Instruction: vmod.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_148","text":"Modulo residual unsigned 16-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_148","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (b.half[i] == 0) ? 0 : ((u16)a.half[i] % (u16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_149","text":"__m128i __lsx_vmod_w (__m128i a, __m128i b) #include Instruction: vmod.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_149","text":"Modulo residual signed 32-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_149","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((s32)a.word[i] % (s32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_150","text":"__m128i __lsx_vmod_wu (__m128i a, __m128i b) #include Instruction: vmod.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_150","text":"Modulo residual unsigned 32-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_150","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (b.word[i] == 0) ? 0 : ((u32)a.word[i] % (u32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_151","text":"__m128i __lsx_vmod_d (__m128i a, __m128i b) #include Instruction: vmod.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_151","text":"Modulo residual signed 64-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_151","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((s64)a.dword[i] % (s64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmod_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmod_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_152","text":"__m128i __lsx_vmod_du (__m128i a, __m128i b) #include Instruction: vmod.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_152","text":"Modulo residual unsigned 64-bit elements in a by elements in b .","title":"Description"},{"location":"lsx/integer_computation/#operation_152","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (b.dword[i] == 0) ? 0 : ((u64)a.dword[i] % (u64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmsub_b-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_153","text":"__m128i __lsx_vmsub_b (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_153","text":"Multiply 8-bit elements in b and c , negate and add elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_153","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = -b.byte[i] * c.byte[i] + a.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmsub_h-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_154","text":"__m128i __lsx_vmsub_h (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_154","text":"Multiply 16-bit elements in b and c , negate and add elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_154","text":"for (int i = 0; i < 8; i++) { dst.half[i] = -b.half[i] * c.half[i] + a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmsub_w-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_155","text":"__m128i __lsx_vmsub_w (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_155","text":"Multiply 32-bit elements in b and c , negate and add elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_155","text":"for (int i = 0; i < 4; i++) { dst.word[i] = -b.word[i] * c.word[i] + a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmsub_d-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/integer_computation/#synopsis_156","text":"__m128i __lsx_vmsub_d (__m128i a, __m128i b, __m128i c) #include Instruction: vmsub.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_156","text":"Multiply 64-bit elements in b and c , negate and add elements in a , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_156","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = -b.dword[i] * c.dword[i] + a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_157","text":"__m128i __lsx_vmuh_b (__m128i a, __m128i b) #include Instruction: vmuh.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_157","text":"Multiply signed 8-bit elements in a and b , save the high 8-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_157","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (((s16)(s8)a.byte[i] * (s16)(s8)b.byte[i])) >> 8; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_158","text":"__m128i __lsx_vmuh_bu (__m128i a, __m128i b) #include Instruction: vmuh.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_158","text":"Multiply unsigned 8-bit elements in a and b , save the high 8-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_158","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (((u16)(u8)a.byte[i] * (u16)(u8)b.byte[i])) >> 8; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_159","text":"__m128i __lsx_vmuh_h (__m128i a, __m128i b) #include Instruction: vmuh.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_159","text":"Multiply signed 16-bit elements in a and b , save the high 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_159","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (((s32)(s16)a.half[i] * (s32)(s16)b.half[i])) >> 16; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_160","text":"__m128i __lsx_vmuh_hu (__m128i a, __m128i b) #include Instruction: vmuh.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_160","text":"Multiply unsigned 16-bit elements in a and b , save the high 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_160","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (((u32)(u16)a.half[i] * (u32)(u16)b.half[i])) >> 16; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_161","text":"__m128i __lsx_vmuh_w (__m128i a, __m128i b) #include Instruction: vmuh.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_161","text":"Multiply signed 32-bit elements in a and b , save the high 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_161","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (((s64)(s32)a.word[i] * (s64)(s32)b.word[i])) >> 32; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_162","text":"__m128i __lsx_vmuh_wu (__m128i a, __m128i b) #include Instruction: vmuh.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_162","text":"Multiply unsigned 32-bit elements in a and b , save the high 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_162","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (((u64)(u32)a.word[i] * (u64)(u32)b.word[i])) >> 32; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_163","text":"__m128i __lsx_vmuh_d (__m128i a, __m128i b) #include Instruction: vmuh.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_163","text":"Multiply signed 64-bit elements in a and b , save the high 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_163","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (((s128)(s64)a.dword[i] * (s128)(s64)b.dword[i])) >> 64; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmuh_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmuh_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_164","text":"__m128i __lsx_vmuh_du (__m128i a, __m128i b) #include Instruction: vmuh.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_164","text":"Multiply unsigned 64-bit elements in a and b , save the high 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_164","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (((u128)(u64)a.dword[i] * (u128)(u64)b.dword[i])) >> 64; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmul_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmul_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_165","text":"__m128i __lsx_vmul_b (__m128i a, __m128i b) #include Instruction: vmul.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_165","text":"Multiply 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_165","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] * b.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmul_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmul_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_166","text":"__m128i __lsx_vmul_h (__m128i a, __m128i b) #include Instruction: vmul.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_166","text":"Multiply 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_166","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] * b.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmul_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmul_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_167","text":"__m128i __lsx_vmul_w (__m128i a, __m128i b) #include Instruction: vmul.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_167","text":"Multiply 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_167","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] * b.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmul_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmul_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_168","text":"__m128i __lsx_vmul_d (__m128i a, __m128i b) #include Instruction: vmul.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_168","text":"Multiply 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_168","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] * b.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_h_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_h_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_169","text":"__m128i __lsx_vmulwev_h_b (__m128i a, __m128i b) #include Instruction: vmulwev.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_169","text":"Multiply even-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_169","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_h_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_170","text":"__m128i __lsx_vmulwev_h_bu (__m128i a, __m128i b) #include Instruction: vmulwev.h.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_170","text":"Multiply even-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_170","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] * (u16)(u8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_h_bu_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_171","text":"__m128i __lsx_vmulwev_h_bu_b (__m128i a, __m128i b) #include Instruction: vmulwev.h.bu.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_171","text":"Multiply even-positioned unsigned 8-bit elements in a and signed elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_171","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] * (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_w_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_w_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_172","text":"__m128i __lsx_vmulwev_w_h (__m128i a, __m128i b) #include Instruction: vmulwev.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_172","text":"Multiply even-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_172","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] * (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_w_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_173","text":"__m128i __lsx_vmulwev_w_hu (__m128i a, __m128i b) #include Instruction: vmulwev.w.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_173","text":"Multiply even-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_173","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] * (u32)(u16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_w_hu_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_174","text":"__m128i __lsx_vmulwev_w_hu_h (__m128i a, __m128i b) #include Instruction: vmulwev.w.hu.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_174","text":"Multiply even-positioned unsigned 16-bit elements in a and signed elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_174","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] * (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_d_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_d_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_175","text":"__m128i __lsx_vmulwev_d_w (__m128i a, __m128i b) #include Instruction: vmulwev.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_175","text":"Multiply even-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_175","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] * (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_d_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_176","text":"__m128i __lsx_vmulwev_d_wu (__m128i a, __m128i b) #include Instruction: vmulwev.d.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_176","text":"Multiply even-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_176","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] * (u64)(u32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_d_wu_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_177","text":"__m128i __lsx_vmulwev_d_wu_w (__m128i a, __m128i b) #include Instruction: vmulwev.d.wu.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_177","text":"Multiply even-positioned unsigned 32-bit elements in a and signed elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_177","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] * (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_q_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_q_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_178","text":"__m128i __lsx_vmulwev_q_d (__m128i a, __m128i b) #include Instruction: vmulwev.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_178","text":"Multiply even-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_178","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_q_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_q_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_179","text":"__m128i __lsx_vmulwev_q_du (__m128i a, __m128i b) #include Instruction: vmulwev.q.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_179","text":"Multiply even-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_179","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] * (u128)(u64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vmulwev_q_du_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_180","text":"__m128i __lsx_vmulwev_q_du_d (__m128i a, __m128i b) #include Instruction: vmulwev.q.du.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_180","text":"Multiply even-positioned unsigned 64-bit elements in a and signed elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_180","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] * (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsadd_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_181","text":"__m128i __lsx_vsadd_b (__m128i a, __m128i b) #include Instruction: vsadd.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_181","text":"Saturing add the signed 8-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_181","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsadd_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_182","text":"__m128i __lsx_vsadd_h (__m128i a, __m128i b) #include Instruction: vsadd.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_182","text":"Saturing add the signed 16-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_182","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsadd_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_183","text":"__m128i __lsx_vsadd_w (__m128i a, __m128i b) #include Instruction: vsadd.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_183","text":"Saturing add the signed 32-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_183","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsadd_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_184","text":"__m128i __lsx_vsadd_d (__m128i a, __m128i b) #include Instruction: vsadd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_184","text":"Saturing add the signed 64-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_184","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_b-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vsadd_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_185","text":"__m128i __lsx_vsadd_b (__m128i a, __m128i b) #include Instruction: vsadd.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_185","text":"Saturing add the signed 8-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_185","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (s8)sadd((s8)a.byte[i], (s8)b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_h-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vsadd_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_186","text":"__m128i __lsx_vsadd_h (__m128i a, __m128i b) #include Instruction: vsadd.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_186","text":"Saturing add the signed 16-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_186","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)sadd((s16)a.half[i], (s16)b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_w-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vsadd_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_187","text":"__m128i __lsx_vsadd_w (__m128i a, __m128i b) #include Instruction: vsadd.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_187","text":"Saturing add the signed 32-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_187","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)sadd((s32)a.word[i], (s32)b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsadd_d-__m128i-a-__m128i-b_1","text":"","title":"__m128i __lsx_vsadd_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_188","text":"__m128i __lsx_vsadd_d (__m128i a, __m128i b) #include Instruction: vsadd.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_188","text":"Saturing add the signed 64-bit elements in a and b , store the result to dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_188","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)sadd((s64)a.dword[i], (s64)b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsub_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsub_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_189","text":"__m128i __lsx_vsub_b (__m128i a, __m128i b) #include Instruction: vsub.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_189","text":"Subtract 8-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_189","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] - b.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsub_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsub_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_190","text":"__m128i __lsx_vsub_h (__m128i a, __m128i b) #include Instruction: vsub.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_190","text":"Subtract 16-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_190","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] - b.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsub_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsub_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_191","text":"__m128i __lsx_vsub_w (__m128i a, __m128i b) #include Instruction: vsub.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_191","text":"Subtract 32-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_191","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] - b.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsub_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsub_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_192","text":"__m128i __lsx_vsub_d (__m128i a, __m128i b) #include Instruction: vsub.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_192","text":"Subtract 64-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_192","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] - b.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsub_q-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsub_q (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_193","text":"__m128i __lsx_vsub_q (__m128i a, __m128i b) #include Instruction: vsub.q vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_193","text":"Subtract 128-bit elements in a and b , save the result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_193","text":"dst.qword[0] = a.qword[0] - b.qword[0]; Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_h_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_h_b (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_194","text":"__m128i __lsx_vsubwev_h_b (__m128i a, __m128i b) #include Instruction: vsubwev.h.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_194","text":"Subtract even-positioned signed 8-bit elements in a and signed elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_194","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (s16)(s8)a.byte[2 * i] - (s16)(s8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_h_bu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_195","text":"__m128i __lsx_vsubwev_h_bu (__m128i a, __m128i b) #include Instruction: vsubwev.h.bu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_195","text":"Subtract even-positioned unsigned 8-bit elements in a and unsigned elements in b , save the 16-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_195","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (u16)(u8)a.byte[2 * i] - (u16)(u8)b.byte[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_w_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_w_h (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_196","text":"__m128i __lsx_vsubwev_w_h (__m128i a, __m128i b) #include Instruction: vsubwev.w.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_196","text":"Subtract even-positioned signed 16-bit elements in a and signed elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_196","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (s32)(s16)a.half[2 * i] - (s32)(s16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_w_hu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_197","text":"__m128i __lsx_vsubwev_w_hu (__m128i a, __m128i b) #include Instruction: vsubwev.w.hu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_197","text":"Subtract even-positioned unsigned 16-bit elements in a and unsigned elements in b , save the 32-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_197","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (u32)(u16)a.half[2 * i] - (u32)(u16)b.half[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_d_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_d_w (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_198","text":"__m128i __lsx_vsubwev_d_w (__m128i a, __m128i b) #include Instruction: vsubwev.d.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_198","text":"Subtract even-positioned signed 32-bit elements in a and signed elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_198","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (s64)(s32)a.word[2 * i] - (s64)(s32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_d_wu-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_199","text":"__m128i __lsx_vsubwev_d_wu (__m128i a, __m128i b) #include Instruction: vsubwev.d.wu vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_199","text":"Subtract even-positioned unsigned 32-bit elements in a and unsigned elements in b , save the 64-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_199","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (u64)(u32)a.word[2 * i] - (u64)(u32)b.word[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_q_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_q_d (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_200","text":"__m128i __lsx_vsubwev_q_d (__m128i a, __m128i b) #include Instruction: vsubwev.q.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_200","text":"Subtract even-positioned signed 64-bit elements in a and signed elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_200","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (s128)(s64)a.dword[2 * i] - (s128)(s64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/integer_computation/#__m128i-__lsx_vsubwev_q_du-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsubwev_q_du (__m128i a, __m128i b)"},{"location":"lsx/integer_computation/#synopsis_201","text":"__m128i __lsx_vsubwev_q_du (__m128i a, __m128i b) #include Instruction: vsubwev.q.du vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/integer_computation/#description_201","text":"Subtract even-positioned unsigned 64-bit elements in a and unsigned elements in b , save the 128-bit result in dst .","title":"Description"},{"location":"lsx/integer_computation/#operation_201","text":"for (int i = 0; i < 1; i++) { dst.qword[i] = (u128)(u64)a.dword[2 * i] - (u128)(u64)b.dword[2 * i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/","text":"Logical __m128i __lsx_vand_v (__m128i a, __m128i b) Synopsis __m128i __lsx_vand_v (__m128i a, __m128i b) #include Instruction: vand.v vr, vr, vr CPU Flags: LSX Description Compute bitwise AND between elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] & b.dword[i]; } Tested on real machine. __m128i __lsx_vandi_b (__m128i a, imm0_255 imm) Synopsis __m128i __lsx_vandi_b (__m128i a, imm0_255 imm) #include Instruction: vandi.b vr, vr, imm CPU Flags: LSX Description Compute bitwise AND between elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] & imm; } Tested on real machine. __m128i __lsx_vandn_v (__m128i a, __m128i b) Synopsis __m128i __lsx_vandn_v (__m128i a, __m128i b) #include Instruction: vandn.v vr, vr, vr CPU Flags: LSX Description Compute bitwise ANDN between elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = b.dword[i] & (~a.dword[i]); } Tested on real machine. __m128i __lsx_vnor_v (__m128i a, __m128i b) Synopsis __m128i __lsx_vnor_v (__m128i a, __m128i b) #include Instruction: vnor.v vr, vr, vr CPU Flags: LSX Description Compute bitwise NOR between elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ~(a.dword[i] | b.dword[i]); } Tested on real machine. __m128i __lsx_vnori_b (__m128i a, imm0_255 imm) Synopsis __m128i __lsx_vnori_b (__m128i a, imm0_255 imm) #include Instruction: vnori.b vr, vr, imm CPU Flags: LSX Description Compute bitwise NOR between elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ~(a.byte[i] | imm); } Tested on real machine. __m128i __lsx_vor_v (__m128i a, __m128i b) Synopsis __m128i __lsx_vor_v (__m128i a, __m128i b) #include Instruction: vor.v vr, vr, vr CPU Flags: LSX Description Compute bitwise OR between elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | b.dword[i]; } Tested on real machine. __m128i __lsx_vori_b (__m128i a, imm0_255 imm) Synopsis __m128i __lsx_vori_b (__m128i a, imm0_255 imm) #include Instruction: vori.b vr, vr, imm CPU Flags: LSX Description Compute bitwise OR between elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] | imm; } Tested on real machine. __m128i __lsx_vorn_v (__m128i a, __m128i b) Synopsis __m128i __lsx_vorn_v (__m128i a, __m128i b) #include Instruction: vorn.v vr, vr, vr CPU Flags: LSX Description Compute bitwise ORN between elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | (~b.dword[i]); } Tested on real machine. __m128i __lsx_vxor_v (__m128i a, __m128i b) Synopsis __m128i __lsx_vxor_v (__m128i a, __m128i b) #include Instruction: vxor.v vr, vr, vr CPU Flags: LSX Description Compute bitwise XOR between elements in a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] ^ b.dword[i]; } Tested on real machine. __m128i __lsx_vxori_b (__m128i a, imm0_255 imm) Synopsis __m128i __lsx_vxori_b (__m128i a, imm0_255 imm) #include Instruction: vxori.b vr, vr, imm CPU Flags: LSX Description Compute bitwise XOR between elements in a and imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] ^ imm; } Tested on real machine.","title":"Logical"},{"location":"lsx/logical/#logical","text":"","title":"Logical"},{"location":"lsx/logical/#__m128i-__lsx_vand_v-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vand_v (__m128i a, __m128i b)"},{"location":"lsx/logical/#synopsis","text":"__m128i __lsx_vand_v (__m128i a, __m128i b) #include Instruction: vand.v vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description","text":"Compute bitwise AND between elements in a and b .","title":"Description"},{"location":"lsx/logical/#operation","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] & b.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vandi_b-__m128i-a-imm0_255-imm","text":"","title":"__m128i __lsx_vandi_b (__m128i a, imm0_255 imm)"},{"location":"lsx/logical/#synopsis_1","text":"__m128i __lsx_vandi_b (__m128i a, imm0_255 imm) #include Instruction: vandi.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_1","text":"Compute bitwise AND between elements in a and imm .","title":"Description"},{"location":"lsx/logical/#operation_1","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] & imm; } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vandn_v-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vandn_v (__m128i a, __m128i b)"},{"location":"lsx/logical/#synopsis_2","text":"__m128i __lsx_vandn_v (__m128i a, __m128i b) #include Instruction: vandn.v vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_2","text":"Compute bitwise ANDN between elements in a and b .","title":"Description"},{"location":"lsx/logical/#operation_2","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = b.dword[i] & (~a.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vnor_v-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vnor_v (__m128i a, __m128i b)"},{"location":"lsx/logical/#synopsis_3","text":"__m128i __lsx_vnor_v (__m128i a, __m128i b) #include Instruction: vnor.v vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_3","text":"Compute bitwise NOR between elements in a and b .","title":"Description"},{"location":"lsx/logical/#operation_3","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ~(a.dword[i] | b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vnori_b-__m128i-a-imm0_255-imm","text":"","title":"__m128i __lsx_vnori_b (__m128i a, imm0_255 imm)"},{"location":"lsx/logical/#synopsis_4","text":"__m128i __lsx_vnori_b (__m128i a, imm0_255 imm) #include Instruction: vnori.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_4","text":"Compute bitwise NOR between elements in a and imm .","title":"Description"},{"location":"lsx/logical/#operation_4","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ~(a.byte[i] | imm); } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vor_v-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vor_v (__m128i a, __m128i b)"},{"location":"lsx/logical/#synopsis_5","text":"__m128i __lsx_vor_v (__m128i a, __m128i b) #include Instruction: vor.v vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_5","text":"Compute bitwise OR between elements in a and b .","title":"Description"},{"location":"lsx/logical/#operation_5","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | b.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vori_b-__m128i-a-imm0_255-imm","text":"","title":"__m128i __lsx_vori_b (__m128i a, imm0_255 imm)"},{"location":"lsx/logical/#synopsis_6","text":"__m128i __lsx_vori_b (__m128i a, imm0_255 imm) #include Instruction: vori.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_6","text":"Compute bitwise OR between elements in a and imm .","title":"Description"},{"location":"lsx/logical/#operation_6","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] | imm; } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vorn_v-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vorn_v (__m128i a, __m128i b)"},{"location":"lsx/logical/#synopsis_7","text":"__m128i __lsx_vorn_v (__m128i a, __m128i b) #include Instruction: vorn.v vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_7","text":"Compute bitwise ORN between elements in a and b .","title":"Description"},{"location":"lsx/logical/#operation_7","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] | (~b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vxor_v-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vxor_v (__m128i a, __m128i b)"},{"location":"lsx/logical/#synopsis_8","text":"__m128i __lsx_vxor_v (__m128i a, __m128i b) #include Instruction: vxor.v vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_8","text":"Compute bitwise XOR between elements in a and b .","title":"Description"},{"location":"lsx/logical/#operation_8","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] ^ b.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/logical/#__m128i-__lsx_vxori_b-__m128i-a-imm0_255-imm","text":"","title":"__m128i __lsx_vxori_b (__m128i a, imm0_255 imm)"},{"location":"lsx/logical/#synopsis_9","text":"__m128i __lsx_vxori_b (__m128i a, imm0_255 imm) #include Instruction: vxori.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/logical/#description_9","text":"Compute bitwise XOR between elements in a and imm .","title":"Description"},{"location":"lsx/logical/#operation_9","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] ^ imm; } Tested on real machine.","title":"Operation"},{"location":"lsx/memory/","text":"Memory Load & Store __m128i __lsx_vld (void * addr, imm_n2048_2047 offset) Synopsis __m128i __lsx_vld (void * addr, imm_n2048_2047 offset) #include Instruction: vld vr, r, imm CPU Flags: LSX Description Read 128-bit data from memory address addr + offset , save the data into dst . Operation dst = memory_load(128, addr + offset); __m128i __lsx_vldx (void * addr, long int offset) Synopsis __m128i __lsx_vldx (void * addr, long int offset); #include Instruction: vldx vr, r, r CPU Flags: LSX Description Read 128-bit data from memory address addr + offset , save the data into dst . Operation dst = memory_load(128, addr + offset); __m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset) Synopsis __m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset) #include Instruction: vldrepl.b vr, r, imm CPU Flags: LSX Description Read 8-bit data from memory address addr + (offset << 0) , replicate the data to all vector lanes and save into dst . Operation u8 data = memory_load(8, addr + offset); for (int i = 0; i < 16; i++) { dst.byte[i] = data; } __m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset) Synopsis __m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset) #include Instruction: vldrepl.h vr, r, imm CPU Flags: LSX Description Read 16-bit data from memory address addr + (offset << 1) , replicate the data to all vector lanes and save into dst . Operation u16 data = memory_load(16, addr + (offset << 1)); for (int i = 0; i < 8; i++) { dst.half[i] = data; } __m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset) Synopsis __m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset) #include Instruction: vldrepl.w vr, r, imm CPU Flags: LSX Description Read 32-bit data from memory address addr + (offset << 2) , replicate the data to all vector lanes and save into dst . Operation u32 data = memory_load(32, addr + (offset << 2)); for (int i = 0; i < 4; i++) { dst.word[i] = data; } __m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset) Synopsis __m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset) #include Instruction: vldrepl.d vr, r, imm CPU Flags: LSX Description Read 64-bit data from memory address addr + (offset << 3) , replicate the data to all vector lanes and save into dst . Operation u64 data = memory_load(64, addr + (offset << 3)); for (int i = 0; i < 2; i++) { dst.dword[i] = data; } void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset) Synopsis void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset) #include Instruction: vst vr, r, imm CPU Flags: LSX Description Write 128-bit data in data to memory address addr + offset . Operation memory_store(128, data, addr + offset); void __lsx_vstx (__m128i data, void * addr, long int offset) Synopsis void __lsx_vstx (__m128i data, void * addr, long int offset) #include Instruction: vstx vr, r, r CPU Flags: LSX Description Write 128-bit data in data to memory address addr + offset . Operation memory_store(128, data, addr + offset); void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane) Synopsis void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane) #include Instruction: vstelm.b vr, r, imm, imm CPU Flags: LSX Description Store the element in data specified by lane to memory address addr + offset . Operation memory_store(8, data.byte[lane], addr + offset); void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane) Synopsis void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane) #include Instruction: vstelm.h vr, r, imm, imm CPU Flags: LSX Description Store the element in data specified by lane to memory address addr + offset . Operation memory_store(16, data.half[lane], addr + offset); void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane) Synopsis void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane) #include Instruction: vstelm.w vr, r, imm, imm CPU Flags: LSX Description Store the element in data specified by lane to memory address addr + offset . Operation memory_store(32, data.word[lane], addr + offset); void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane) Synopsis void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane) #include Instruction: vstelm.d vr, r, imm, imm CPU Flags: LSX Description Store the element in data specified by lane to memory address addr + offset . Operation memory_store(64, data.dword[lane], addr + offset);","title":"Memory Load & Store"},{"location":"lsx/memory/#memory-load-store","text":"","title":"Memory Load & Store"},{"location":"lsx/memory/#__m128i-__lsx_vld-void-addr-imm_n2048_2047-offset","text":"","title":"__m128i __lsx_vld (void * addr, imm_n2048_2047 offset)"},{"location":"lsx/memory/#synopsis","text":"__m128i __lsx_vld (void * addr, imm_n2048_2047 offset) #include Instruction: vld vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description","text":"Read 128-bit data from memory address addr + offset , save the data into dst .","title":"Description"},{"location":"lsx/memory/#operation","text":"dst = memory_load(128, addr + offset);","title":"Operation"},{"location":"lsx/memory/#__m128i-__lsx_vldx-void-addr-long-int-offset","text":"","title":"__m128i __lsx_vldx (void * addr, long int offset)"},{"location":"lsx/memory/#synopsis_1","text":"__m128i __lsx_vldx (void * addr, long int offset); #include Instruction: vldx vr, r, r CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_1","text":"Read 128-bit data from memory address addr + offset , save the data into dst .","title":"Description"},{"location":"lsx/memory/#operation_1","text":"dst = memory_load(128, addr + offset);","title":"Operation"},{"location":"lsx/memory/#__m128i-__lsx_vldrepl_b-void-addr-imm_n2048_2047-offset","text":"","title":"__m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset)"},{"location":"lsx/memory/#synopsis_2","text":"__m128i __lsx_vldrepl_b (void * addr, imm_n2048_2047 offset) #include Instruction: vldrepl.b vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_2","text":"Read 8-bit data from memory address addr + (offset << 0) , replicate the data to all vector lanes and save into dst .","title":"Description"},{"location":"lsx/memory/#operation_2","text":"u8 data = memory_load(8, addr + offset); for (int i = 0; i < 16; i++) { dst.byte[i] = data; }","title":"Operation"},{"location":"lsx/memory/#__m128i-__lsx_vldrepl_h-void-addr-imm_n1024_1023-offset","text":"","title":"__m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset)"},{"location":"lsx/memory/#synopsis_3","text":"__m128i __lsx_vldrepl_h (void * addr, imm_n1024_1023 offset) #include Instruction: vldrepl.h vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_3","text":"Read 16-bit data from memory address addr + (offset << 1) , replicate the data to all vector lanes and save into dst .","title":"Description"},{"location":"lsx/memory/#operation_3","text":"u16 data = memory_load(16, addr + (offset << 1)); for (int i = 0; i < 8; i++) { dst.half[i] = data; }","title":"Operation"},{"location":"lsx/memory/#__m128i-__lsx_vldrepl_w-void-addr-imm_n512_511-offset","text":"","title":"__m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset)"},{"location":"lsx/memory/#synopsis_4","text":"__m128i __lsx_vldrepl_w (void * addr, imm_n512_511 offset) #include Instruction: vldrepl.w vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_4","text":"Read 32-bit data from memory address addr + (offset << 2) , replicate the data to all vector lanes and save into dst .","title":"Description"},{"location":"lsx/memory/#operation_4","text":"u32 data = memory_load(32, addr + (offset << 2)); for (int i = 0; i < 4; i++) { dst.word[i] = data; }","title":"Operation"},{"location":"lsx/memory/#__m128i-__lsx_vldrepl_d-void-addr-imm_n256_255-offset","text":"","title":"__m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset)"},{"location":"lsx/memory/#synopsis_5","text":"__m128i __lsx_vldrepl_d (void * addr, imm_n256_255 offset) #include Instruction: vldrepl.d vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_5","text":"Read 64-bit data from memory address addr + (offset << 3) , replicate the data to all vector lanes and save into dst .","title":"Description"},{"location":"lsx/memory/#operation_5","text":"u64 data = memory_load(64, addr + (offset << 3)); for (int i = 0; i < 2; i++) { dst.dword[i] = data; }","title":"Operation"},{"location":"lsx/memory/#void-__lsx_vst-__m128i-data-void-addr-imm_n2048_2047-offset","text":"","title":"void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset)"},{"location":"lsx/memory/#synopsis_6","text":"void __lsx_vst (__m128i data, void * addr, imm_n2048_2047 offset) #include Instruction: vst vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_6","text":"Write 128-bit data in data to memory address addr + offset .","title":"Description"},{"location":"lsx/memory/#operation_6","text":"memory_store(128, data, addr + offset);","title":"Operation"},{"location":"lsx/memory/#void-__lsx_vstx-__m128i-data-void-addr-long-int-offset","text":"","title":"void __lsx_vstx (__m128i data, void * addr, long int offset)"},{"location":"lsx/memory/#synopsis_7","text":"void __lsx_vstx (__m128i data, void * addr, long int offset) #include Instruction: vstx vr, r, r CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_7","text":"Write 128-bit data in data to memory address addr + offset .","title":"Description"},{"location":"lsx/memory/#operation_7","text":"memory_store(128, data, addr + offset);","title":"Operation"},{"location":"lsx/memory/#void-__lsx_vstelm_b-__m128i-data-void-addr-imm_n128_127-offset-imm0_15-lane","text":"","title":"void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane)"},{"location":"lsx/memory/#synopsis_8","text":"void __lsx_vstelm_b (__m128i data, void * addr, imm_n128_127 offset, imm0_15 lane) #include Instruction: vstelm.b vr, r, imm, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_8","text":"Store the element in data specified by lane to memory address addr + offset .","title":"Description"},{"location":"lsx/memory/#operation_8","text":"memory_store(8, data.byte[lane], addr + offset);","title":"Operation"},{"location":"lsx/memory/#void-__lsx_vstelm_h-__m128i-data-void-addr-imm_n128_127-offset-imm0_7-lane","text":"","title":"void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane)"},{"location":"lsx/memory/#synopsis_9","text":"void __lsx_vstelm_h (__m128i data, void * addr, imm_n128_127 offset, imm0_7 lane) #include Instruction: vstelm.h vr, r, imm, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_9","text":"Store the element in data specified by lane to memory address addr + offset .","title":"Description"},{"location":"lsx/memory/#operation_9","text":"memory_store(16, data.half[lane], addr + offset);","title":"Operation"},{"location":"lsx/memory/#void-__lsx_vstelm_w-__m128i-data-void-addr-imm_n128_127-offset-imm0_3-lane","text":"","title":"void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane)"},{"location":"lsx/memory/#synopsis_10","text":"void __lsx_vstelm_w (__m128i data, void * addr, imm_n128_127 offset, imm0_3 lane) #include Instruction: vstelm.w vr, r, imm, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_10","text":"Store the element in data specified by lane to memory address addr + offset .","title":"Description"},{"location":"lsx/memory/#operation_10","text":"memory_store(32, data.word[lane], addr + offset);","title":"Operation"},{"location":"lsx/memory/#void-__lsx_vstelm_d-__m128i-data-void-addr-imm_n128_127-offset-imm0_1-lane","text":"","title":"void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane)"},{"location":"lsx/memory/#synopsis_11","text":"void __lsx_vstelm_d (__m128i data, void * addr, imm_n128_127 offset, imm0_1 lane) #include Instruction: vstelm.d vr, r, imm, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/memory/#description_11","text":"Store the element in data specified by lane to memory address addr + offset .","title":"Description"},{"location":"lsx/memory/#operation_11","text":"memory_store(64, data.dword[lane], addr + offset);","title":"Operation"},{"location":"lsx/misc/","text":"Misc __m128i __lsx_vilvh_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvh_b (__m128i a, __m128i b) #include Instruction: vilvh.b vr, vr, vr CPU Flags: LSX Description Interleave 8-bit elements in higher half of a and b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2 + 8] : b.byte[i / 2 + 8]; } Tested on real machine. __m128i __lsx_vilvh_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvh_h (__m128i a, __m128i b) #include Instruction: vilvh.h vr, vr, vr CPU Flags: LSX Description Interleave 16-bit elements in higher half of a and b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i / 2 + 4] : b.half[i / 2 + 4]; } Tested on real machine. __m128i __lsx_vilvh_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvh_w (__m128i a, __m128i b) #include Instruction: vilvh.w vr, vr, vr CPU Flags: LSX Description Interleave 32-bit elements in higher half of a and b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i / 2 + 2] : b.word[i / 2 + 2]; } Tested on real machine. __m128i __lsx_vilvh_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvh_d (__m128i a, __m128i b) #include Instruction: vilvh.d vr, vr, vr CPU Flags: LSX Description Interleave 64-bit elements in higher half of a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2 + 1] : b.dword[i / 2 + 1]; } Tested on real machine. __m128i __lsx_vilvl_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvl_b (__m128i a, __m128i b) #include Instruction: vilvl.b vr, vr, vr CPU Flags: LSX Description Interleave 8-bit elements in lower half of a and b . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2] : b.byte[i / 2]; } Tested on real machine. __m128i __lsx_vilvl_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvl_h (__m128i a, __m128i b) #include Instruction: vilvl.h vr, vr, vr CPU Flags: LSX Description Interleave 16-bit elements in lower half of a and b . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i / 2] : b.half[i / 2]; } Tested on real machine. __m128i __lsx_vilvl_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvl_w (__m128i a, __m128i b) #include Instruction: vilvl.w vr, vr, vr CPU Flags: LSX Description Interleave 32-bit elements in lower half of a and b . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i / 2] : b.word[i / 2]; } Tested on real machine. __m128i __lsx_vilvl_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vilvl_d (__m128i a, __m128i b) #include Instruction: vilvl.d vr, vr, vr CPU Flags: LSX Description Interleave 64-bit elements in lower half of a and b . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2] : b.dword[i / 2]; } Tested on real machine. __m128i __lsx_insgr2vr_b (__m128i a, int b, imm0_15 imm) Synopsis __m128i __lsx_insgr2vr_b (__m128i a, int b, imm0_15 imm) #include Instruction: vinsgr2vr.b vr, r, imm CPU Flags: LSX Description Insert 8-bit element into lane indexed imm . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i == imm) ? b : a.byte[i]; } Tested on real machine. __m128i __lsx_insgr2vr_h (__m128i a, int b, imm0_7 imm) Synopsis __m128i __lsx_insgr2vr_h (__m128i a, int b, imm0_7 imm) #include Instruction: vinsgr2vr.h vr, r, imm CPU Flags: LSX Description Insert 16-bit element into lane indexed imm . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i == imm) ? b : a.half[i]; } Tested on real machine. __m128i __lsx_insgr2vr_w (__m128i a, int b, imm0_3 imm) Synopsis __m128i __lsx_insgr2vr_w (__m128i a, int b, imm0_3 imm) #include Instruction: vinsgr2vr.w vr, r, imm CPU Flags: LSX Description Insert 32-bit element into lane indexed imm . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i == imm) ? b : a.word[i]; } Tested on real machine. __m128i __lsx_insgr2vr_d (__m128i a, long int b, imm0_1 imm) Synopsis __m128i __lsx_insgr2vr_d (__m128i a, long int b, imm0_1 imm) #include Instruction: vinsgr2vr.d vr, r, imm CPU Flags: LSX Description Insert 64-bit element into lane indexed imm . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i == imm) ? b : a.dword[i]; } Tested on real machine. __m128i __lsx_vpackev_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackev_b (__m128i a, __m128i b) #include Instruction: vpackev.b vr, vr, vr CPU Flags: LSX Description Collect and pack even-positioned 8-bit elements in a and b and store dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i - 1] : b.byte[i]; } Tested on real machine. __m128i __lsx_vpackev_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackev_h (__m128i a, __m128i b) #include Instruction: vpackev.h vr, vr, vr CPU Flags: LSX Description Collect and pack even-positioned 16-bit elements in a and b and store dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i - 1] : b.half[i]; } Tested on real machine. __m128i __lsx_vpackev_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackev_w (__m128i a, __m128i b) #include Instruction: vpackev.w vr, vr, vr CPU Flags: LSX Description Collect and pack even-positioned 32-bit elements in a and b and store dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i - 1] : b.word[i]; } Tested on real machine. __m128i __lsx_vpackev_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackev_d (__m128i a, __m128i b) #include Instruction: vpackev.d vr, vr, vr CPU Flags: LSX Description Collect and pack even-positioned 64-bit elements in a and b and store dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i - 1] : b.dword[i]; } Tested on real machine. __m128i __lsx_vpackod_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackod_b (__m128i a, __m128i b) #include Instruction: vpackod.b vr, vr, vr CPU Flags: LSX Description Collect and pack odd-positioned 8-bit elements in a and b and store dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i] : b.byte[i + 1]; } Tested on real machine. __m128i __lsx_vpackod_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackod_h (__m128i a, __m128i b) #include Instruction: vpackod.h vr, vr, vr CPU Flags: LSX Description Collect and pack odd-positioned 16-bit elements in a and b and store dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i] : b.half[i + 1]; } Tested on real machine. __m128i __lsx_vpackod_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackod_w (__m128i a, __m128i b) #include Instruction: vpackod.w vr, vr, vr CPU Flags: LSX Description Collect and pack odd-positioned 32-bit elements in a and b and store dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i] : b.word[i + 1]; } Tested on real machine. __m128i __lsx_vpackod_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vpackod_d (__m128i a, __m128i b) #include Instruction: vpackod.d vr, vr, vr CPU Flags: LSX Description Collect and pack odd-positioned 64-bit elements in a and b and store dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i] : b.dword[i + 1]; } Tested on real machine. __m128i __lsx_vpickev_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickev_b (__m128i a, __m128i b) #include Instruction: vpickev.b vr, vr, vr CPU Flags: LSX Description Pick even-positioned 8-bit elements in b first, then pick even-positioned 8-bit elements in a . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i < 8) ? b.byte[i * 2] : a.byte[(i - 8) * 2]; } Tested on real machine. __m128i __lsx_vpickev_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickev_h (__m128i a, __m128i b) #include Instruction: vpickev.h vr, vr, vr CPU Flags: LSX Description Pick even-positioned 16-bit elements in b first, then pick even-positioned 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i < 4) ? b.half[i * 2] : a.half[(i - 4) * 2]; } Tested on real machine. __m128i __lsx_vpickev_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickev_w (__m128i a, __m128i b) #include Instruction: vpickev.w vr, vr, vr CPU Flags: LSX Description Pick even-positioned 32-bit elements in b first, then pick even-positioned 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i < 2) ? b.word[i * 2] : a.word[(i - 2) * 2]; } Tested on real machine. __m128i __lsx_vpickev_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickev_d (__m128i a, __m128i b) #include Instruction: vpickev.d vr, vr, vr CPU Flags: LSX Description Pick even-positioned 64-bit elements in b first, then pick even-positioned 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i < 1) ? b.dword[i * 2] : a.dword[(i - 1) * 2]; } Tested on real machine. __m128i __lsx_vpickod_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickod_b (__m128i a, __m128i b) #include Instruction: vpickod.b vr, vr, vr CPU Flags: LSX Description Pick odd-positioned 8-bit elements in b first, then pick odd-positioned 8-bit elements in a . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (i < 8) ? b.byte[i * 2 + 1] : a.byte[(i - 8) * 2 + 1]; } Tested on real machine. __m128i __lsx_vpickod_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickod_h (__m128i a, __m128i b) #include Instruction: vpickod.h vr, vr, vr CPU Flags: LSX Description Pick odd-positioned 16-bit elements in b first, then pick odd-positioned 16-bit elements in a . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (i < 4) ? b.half[i * 2 + 1] : a.half[(i - 4) * 2 + 1]; } Tested on real machine. __m128i __lsx_vpickod_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickod_w (__m128i a, __m128i b) #include Instruction: vpickod.w vr, vr, vr CPU Flags: LSX Description Pick odd-positioned 32-bit elements in b first, then pick odd-positioned 32-bit elements in a . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (i < 2) ? b.word[i * 2 + 1] : a.word[(i - 2) * 2 + 1]; } Tested on real machine. __m128i __lsx_vpickod_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vpickod_d (__m128i a, __m128i b) #include Instruction: vpickod.d vr, vr, vr CPU Flags: LSX Description Pick odd-positioned 64-bit elements in b first, then pick odd-positioned 64-bit elements in a . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (i < 1) ? b.dword[i * 2 + 1] : a.dword[(i - 1) * 2 + 1]; } Tested on real machine. __m128i __lsx_vreplve_b (__m128i a, int idx) Synopsis __m128i __lsx_vreplve_b (__m128i a, int idx) #include Instruction: vreplve.b vr, vr, r CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[idx % 16]; } Tested on real machine. __m128i __lsx_vreplve_h (__m128i a, int idx) Synopsis __m128i __lsx_vreplve_h (__m128i a, int idx) #include Instruction: vreplve.h vr, vr, r CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[idx % 8]; } Tested on real machine. __m128i __lsx_vreplve_w (__m128i a, int idx) Synopsis __m128i __lsx_vreplve_w (__m128i a, int idx) #include Instruction: vreplve.w vr, vr, r CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[idx % 4]; } Tested on real machine. __m128i __lsx_vreplve_d (__m128i a, int idx) Synopsis __m128i __lsx_vreplve_d (__m128i a, int idx) #include Instruction: vreplve.d vr, vr, r CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[idx % 2]; } Tested on real machine. __m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx) Synopsis __m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx) #include Instruction: vreplvei.b vr, vr, imm CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[idx]; } Tested on real machine. __m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx) Synopsis __m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx) #include Instruction: vreplvei.h vr, vr, imm CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[idx]; } Tested on real machine. __m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx) Synopsis __m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx) #include Instruction: vreplvei.w vr, vr, imm CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[idx]; } Tested on real machine. __m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx) Synopsis __m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx) #include Instruction: vreplvei.d vr, vr, imm CPU Flags: LSX Description Repeat the element in lane idx of a to whole vector. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[idx]; } Tested on real machine. __m128i __lsx_vsigncov_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsigncov_b (__m128i a, __m128i b) #include Instruction: vsigncov.b vr, vr, vr CPU Flags: LSX Description If the 8-bit element in a equals to zero, set the result to zero. If the signed 8-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result. Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (a.byte[i] == 0) ? 0 : ((s8)a.byte[i] > 0 ? b.byte[i] : -b.byte[i]); } Tested on real machine. __m128i __lsx_vsigncov_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsigncov_h (__m128i a, __m128i b) #include Instruction: vsigncov.h vr, vr, vr CPU Flags: LSX Description If the 16-bit element in a equals to zero, set the result to zero. If the signed 16-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result. Operation for (int i = 0; i < 8; i++) { dst.half[i] = (a.half[i] == 0) ? 0 : ((s16)a.half[i] > 0 ? b.half[i] : -b.half[i]); } Tested on real machine. __m128i __lsx_vsigncov_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsigncov_w (__m128i a, __m128i b) #include Instruction: vsigncov.w vr, vr, vr CPU Flags: LSX Description If the 32-bit element in a equals to zero, set the result to zero. If the signed 32-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result. Operation for (int i = 0; i < 4; i++) { dst.word[i] = (a.word[i] == 0) ? 0 : ((s32)a.word[i] > 0 ? b.word[i] : -b.word[i]); } Tested on real machine. __m128i __lsx_vsigncov_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsigncov_d (__m128i a, __m128i b) #include Instruction: vsigncov.d vr, vr, vr CPU Flags: LSX Description If the 64-bit element in a equals to zero, set the result to zero. If the signed 64-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result. Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (a.dword[i] == 0) ? 0 : ((s64)a.dword[i] > 0 ? b.dword[i] : -b.dword[i]); } Tested on real machine.","title":"Misc"},{"location":"lsx/misc/#misc","text":"","title":"Misc"},{"location":"lsx/misc/#__m128i-__lsx_vilvh_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvh_b (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis","text":"__m128i __lsx_vilvh_b (__m128i a, __m128i b) #include Instruction: vilvh.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description","text":"Interleave 8-bit elements in higher half of a and b .","title":"Description"},{"location":"lsx/misc/#operation","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2 + 8] : b.byte[i / 2 + 8]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vilvh_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvh_h (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_1","text":"__m128i __lsx_vilvh_h (__m128i a, __m128i b) #include Instruction: vilvh.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_1","text":"Interleave 16-bit elements in higher half of a and b .","title":"Description"},{"location":"lsx/misc/#operation_1","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i / 2 + 4] : b.half[i / 2 + 4]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vilvh_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvh_w (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_2","text":"__m128i __lsx_vilvh_w (__m128i a, __m128i b) #include Instruction: vilvh.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_2","text":"Interleave 32-bit elements in higher half of a and b .","title":"Description"},{"location":"lsx/misc/#operation_2","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i / 2 + 2] : b.word[i / 2 + 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vilvh_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvh_d (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_3","text":"__m128i __lsx_vilvh_d (__m128i a, __m128i b) #include Instruction: vilvh.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_3","text":"Interleave 64-bit elements in higher half of a and b .","title":"Description"},{"location":"lsx/misc/#operation_3","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2 + 1] : b.dword[i / 2 + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vilvl_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvl_b (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_4","text":"__m128i __lsx_vilvl_b (__m128i a, __m128i b) #include Instruction: vilvl.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_4","text":"Interleave 8-bit elements in lower half of a and b .","title":"Description"},{"location":"lsx/misc/#operation_4","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i / 2] : b.byte[i / 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vilvl_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvl_h (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_5","text":"__m128i __lsx_vilvl_h (__m128i a, __m128i b) #include Instruction: vilvl.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_5","text":"Interleave 16-bit elements in lower half of a and b .","title":"Description"},{"location":"lsx/misc/#operation_5","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i / 2] : b.half[i / 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vilvl_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvl_w (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_6","text":"__m128i __lsx_vilvl_w (__m128i a, __m128i b) #include Instruction: vilvl.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_6","text":"Interleave 32-bit elements in lower half of a and b .","title":"Description"},{"location":"lsx/misc/#operation_6","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i / 2] : b.word[i / 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vilvl_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vilvl_d (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_7","text":"__m128i __lsx_vilvl_d (__m128i a, __m128i b) #include Instruction: vilvl.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_7","text":"Interleave 64-bit elements in lower half of a and b .","title":"Description"},{"location":"lsx/misc/#operation_7","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i / 2] : b.dword[i / 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_insgr2vr_b-__m128i-a-int-b-imm0_15-imm","text":"","title":"__m128i __lsx_insgr2vr_b (__m128i a, int b, imm0_15 imm)"},{"location":"lsx/misc/#synopsis_8","text":"__m128i __lsx_insgr2vr_b (__m128i a, int b, imm0_15 imm) #include Instruction: vinsgr2vr.b vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_8","text":"Insert 8-bit element into lane indexed imm .","title":"Description"},{"location":"lsx/misc/#operation_8","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i == imm) ? b : a.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_insgr2vr_h-__m128i-a-int-b-imm0_7-imm","text":"","title":"__m128i __lsx_insgr2vr_h (__m128i a, int b, imm0_7 imm)"},{"location":"lsx/misc/#synopsis_9","text":"__m128i __lsx_insgr2vr_h (__m128i a, int b, imm0_7 imm) #include Instruction: vinsgr2vr.h vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_9","text":"Insert 16-bit element into lane indexed imm .","title":"Description"},{"location":"lsx/misc/#operation_9","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i == imm) ? b : a.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_insgr2vr_w-__m128i-a-int-b-imm0_3-imm","text":"","title":"__m128i __lsx_insgr2vr_w (__m128i a, int b, imm0_3 imm)"},{"location":"lsx/misc/#synopsis_10","text":"__m128i __lsx_insgr2vr_w (__m128i a, int b, imm0_3 imm) #include Instruction: vinsgr2vr.w vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_10","text":"Insert 32-bit element into lane indexed imm .","title":"Description"},{"location":"lsx/misc/#operation_10","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i == imm) ? b : a.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_insgr2vr_d-__m128i-a-long-int-b-imm0_1-imm","text":"","title":"__m128i __lsx_insgr2vr_d (__m128i a, long int b, imm0_1 imm)"},{"location":"lsx/misc/#synopsis_11","text":"__m128i __lsx_insgr2vr_d (__m128i a, long int b, imm0_1 imm) #include Instruction: vinsgr2vr.d vr, r, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_11","text":"Insert 64-bit element into lane indexed imm .","title":"Description"},{"location":"lsx/misc/#operation_11","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i == imm) ? b : a.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackev_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackev_b (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_12","text":"__m128i __lsx_vpackev_b (__m128i a, __m128i b) #include Instruction: vpackev.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_12","text":"Collect and pack even-positioned 8-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_12","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i - 1] : b.byte[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackev_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackev_h (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_13","text":"__m128i __lsx_vpackev_h (__m128i a, __m128i b) #include Instruction: vpackev.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_13","text":"Collect and pack even-positioned 16-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_13","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i - 1] : b.half[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackev_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackev_w (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_14","text":"__m128i __lsx_vpackev_w (__m128i a, __m128i b) #include Instruction: vpackev.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_14","text":"Collect and pack even-positioned 32-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_14","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i - 1] : b.word[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackev_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackev_d (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_15","text":"__m128i __lsx_vpackev_d (__m128i a, __m128i b) #include Instruction: vpackev.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_15","text":"Collect and pack even-positioned 64-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_15","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i - 1] : b.dword[i]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackod_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackod_b (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_16","text":"__m128i __lsx_vpackod_b (__m128i a, __m128i b) #include Instruction: vpackod.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_16","text":"Collect and pack odd-positioned 8-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_16","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i % 2 == 1) ? a.byte[i] : b.byte[i + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackod_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackod_h (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_17","text":"__m128i __lsx_vpackod_h (__m128i a, __m128i b) #include Instruction: vpackod.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_17","text":"Collect and pack odd-positioned 16-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_17","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i % 2 == 1) ? a.half[i] : b.half[i + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackod_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackod_w (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_18","text":"__m128i __lsx_vpackod_w (__m128i a, __m128i b) #include Instruction: vpackod.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_18","text":"Collect and pack odd-positioned 32-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_18","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i % 2 == 1) ? a.word[i] : b.word[i + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpackod_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpackod_d (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_19","text":"__m128i __lsx_vpackod_d (__m128i a, __m128i b) #include Instruction: vpackod.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_19","text":"Collect and pack odd-positioned 64-bit elements in a and b and store dst .","title":"Description"},{"location":"lsx/misc/#operation_19","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i % 2 == 1) ? a.dword[i] : b.dword[i + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickev_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickev_b (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_20","text":"__m128i __lsx_vpickev_b (__m128i a, __m128i b) #include Instruction: vpickev.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_20","text":"Pick even-positioned 8-bit elements in b first, then pick even-positioned 8-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_20","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i < 8) ? b.byte[i * 2] : a.byte[(i - 8) * 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickev_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickev_h (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_21","text":"__m128i __lsx_vpickev_h (__m128i a, __m128i b) #include Instruction: vpickev.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_21","text":"Pick even-positioned 16-bit elements in b first, then pick even-positioned 16-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_21","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i < 4) ? b.half[i * 2] : a.half[(i - 4) * 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickev_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickev_w (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_22","text":"__m128i __lsx_vpickev_w (__m128i a, __m128i b) #include Instruction: vpickev.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_22","text":"Pick even-positioned 32-bit elements in b first, then pick even-positioned 32-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_22","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i < 2) ? b.word[i * 2] : a.word[(i - 2) * 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickev_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickev_d (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_23","text":"__m128i __lsx_vpickev_d (__m128i a, __m128i b) #include Instruction: vpickev.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_23","text":"Pick even-positioned 64-bit elements in b first, then pick even-positioned 64-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_23","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i < 1) ? b.dword[i * 2] : a.dword[(i - 1) * 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickod_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickod_b (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_24","text":"__m128i __lsx_vpickod_b (__m128i a, __m128i b) #include Instruction: vpickod.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_24","text":"Pick odd-positioned 8-bit elements in b first, then pick odd-positioned 8-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_24","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (i < 8) ? b.byte[i * 2 + 1] : a.byte[(i - 8) * 2 + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickod_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickod_h (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_25","text":"__m128i __lsx_vpickod_h (__m128i a, __m128i b) #include Instruction: vpickod.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_25","text":"Pick odd-positioned 16-bit elements in b first, then pick odd-positioned 16-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_25","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (i < 4) ? b.half[i * 2 + 1] : a.half[(i - 4) * 2 + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickod_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickod_w (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_26","text":"__m128i __lsx_vpickod_w (__m128i a, __m128i b) #include Instruction: vpickod.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_26","text":"Pick odd-positioned 32-bit elements in b first, then pick odd-positioned 32-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_26","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (i < 2) ? b.word[i * 2 + 1] : a.word[(i - 2) * 2 + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vpickod_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vpickod_d (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_27","text":"__m128i __lsx_vpickod_d (__m128i a, __m128i b) #include Instruction: vpickod.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_27","text":"Pick odd-positioned 64-bit elements in b first, then pick odd-positioned 64-bit elements in a .","title":"Description"},{"location":"lsx/misc/#operation_27","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (i < 1) ? b.dword[i * 2 + 1] : a.dword[(i - 1) * 2 + 1]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplve_b-__m128i-a-int-idx","text":"","title":"__m128i __lsx_vreplve_b (__m128i a, int idx)"},{"location":"lsx/misc/#synopsis_28","text":"__m128i __lsx_vreplve_b (__m128i a, int idx) #include Instruction: vreplve.b vr, vr, r CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_28","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_28","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[idx % 16]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplve_h-__m128i-a-int-idx","text":"","title":"__m128i __lsx_vreplve_h (__m128i a, int idx)"},{"location":"lsx/misc/#synopsis_29","text":"__m128i __lsx_vreplve_h (__m128i a, int idx) #include Instruction: vreplve.h vr, vr, r CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_29","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_29","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[idx % 8]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplve_w-__m128i-a-int-idx","text":"","title":"__m128i __lsx_vreplve_w (__m128i a, int idx)"},{"location":"lsx/misc/#synopsis_30","text":"__m128i __lsx_vreplve_w (__m128i a, int idx) #include Instruction: vreplve.w vr, vr, r CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_30","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_30","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[idx % 4]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplve_d-__m128i-a-int-idx","text":"","title":"__m128i __lsx_vreplve_d (__m128i a, int idx)"},{"location":"lsx/misc/#synopsis_31","text":"__m128i __lsx_vreplve_d (__m128i a, int idx) #include Instruction: vreplve.d vr, vr, r CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_31","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_31","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[idx % 2]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplvei_b-__m128i-a-imm0_15-idx","text":"","title":"__m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx)"},{"location":"lsx/misc/#synopsis_32","text":"__m128i __lsx_vreplvei_b (__m128i a, imm0_15 idx) #include Instruction: vreplvei.b vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_32","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_32","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[idx]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplvei_h-__m128i-a-imm0_7-idx","text":"","title":"__m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx)"},{"location":"lsx/misc/#synopsis_33","text":"__m128i __lsx_vreplvei_h (__m128i a, imm0_7 idx) #include Instruction: vreplvei.h vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_33","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_33","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[idx]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplvei_w-__m128i-a-imm0_3-idx","text":"","title":"__m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx)"},{"location":"lsx/misc/#synopsis_34","text":"__m128i __lsx_vreplvei_w (__m128i a, imm0_3 idx) #include Instruction: vreplvei.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_34","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_34","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[idx]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vreplvei_d-__m128i-a-imm0_1-idx","text":"","title":"__m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx)"},{"location":"lsx/misc/#synopsis_35","text":"__m128i __lsx_vreplvei_d (__m128i a, imm0_1 idx) #include Instruction: vreplvei.d vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_35","text":"Repeat the element in lane idx of a to whole vector.","title":"Description"},{"location":"lsx/misc/#operation_35","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[idx]; } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vsigncov_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsigncov_b (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_36","text":"__m128i __lsx_vsigncov_b (__m128i a, __m128i b) #include Instruction: vsigncov.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_36","text":"If the 8-bit element in a equals to zero, set the result to zero. If the signed 8-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.","title":"Description"},{"location":"lsx/misc/#operation_36","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (a.byte[i] == 0) ? 0 : ((s8)a.byte[i] > 0 ? b.byte[i] : -b.byte[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vsigncov_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsigncov_h (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_37","text":"__m128i __lsx_vsigncov_h (__m128i a, __m128i b) #include Instruction: vsigncov.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_37","text":"If the 16-bit element in a equals to zero, set the result to zero. If the signed 16-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.","title":"Description"},{"location":"lsx/misc/#operation_37","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (a.half[i] == 0) ? 0 : ((s16)a.half[i] > 0 ? b.half[i] : -b.half[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vsigncov_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsigncov_w (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_38","text":"__m128i __lsx_vsigncov_w (__m128i a, __m128i b) #include Instruction: vsigncov.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_38","text":"If the 32-bit element in a equals to zero, set the result to zero. If the signed 32-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.","title":"Description"},{"location":"lsx/misc/#operation_38","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (a.word[i] == 0) ? 0 : ((s32)a.word[i] > 0 ? b.word[i] : -b.word[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/misc/#__m128i-__lsx_vsigncov_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsigncov_d (__m128i a, __m128i b)"},{"location":"lsx/misc/#synopsis_39","text":"__m128i __lsx_vsigncov_d (__m128i a, __m128i b) #include Instruction: vsigncov.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/misc/#description_39","text":"If the 64-bit element in a equals to zero, set the result to zero. If the signed 64-bit element in a is posiive, copy element in b to result. Otherwise, copy negated element in b to result.","title":"Description"},{"location":"lsx/misc/#operation_39","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (a.dword[i] == 0) ? 0 : ((s64)a.dword[i] > 0 ? b.dword[i] : -b.dword[i]); } Tested on real machine.","title":"Operation"},{"location":"lsx/permutation/","text":"Permutation __m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm) Synopsis __m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vpermi.w vr, vr, imm CPU Flags: LSX Description Permute words from a and b with indices recorded in imm and store into dst . Operation dst.word[0] = b.word[imm & 0x3]; dst.word[1] = b.word[(imm >> 2) & 0x3]; dst.word[2] = a.word[(imm >> 4) & 0x3]; dst.word[3] = a.word[(imm >> 6) & 0x3];","title":"Permutation"},{"location":"lsx/permutation/#permutation","text":"","title":"Permutation"},{"location":"lsx/permutation/#__m128i-__lsx_vpermi_w-__m128i-a-__m128i-b-imm0_255-imm","text":"","title":"__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm)"},{"location":"lsx/permutation/#synopsis","text":"__m128i __lsx_vpermi_w (__m128i a, __m128i b, imm0_255 imm) #include Instruction: vpermi.w vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/permutation/#description","text":"Permute words from a and b with indices recorded in imm and store into dst .","title":"Description"},{"location":"lsx/permutation/#operation","text":"dst.word[0] = b.word[imm & 0x3]; dst.word[1] = b.word[(imm >> 2) & 0x3]; dst.word[2] = a.word[(imm >> 4) & 0x3]; dst.word[3] = a.word[(imm >> 6) & 0x3];","title":"Operation"},{"location":"lsx/shift/","text":"Shift __m128i __lsx_vbsll_v (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vbsll_v (__m128i a, imm0_31 imm) #include Instruction: vbsll.v vr, vr, imm CPU Flags: LSX Description Compute 128-bit a shifted left by imm * 8 bits. Operation int shift = (imm * 8) % 128; dst.qword[0] = (u128)a.qword[0] << shift; __m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm) Synopsis __m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm) #include Instruction: vbsrl.v vr, vr, imm CPU Flags: LSX Description Compute 128-bit a shifted right by imm * 8 bits. Operation int shift = (imm * 8) % 128; dst.qword[0] = (u128)a.qword[0] >> shift; __m128i __lsx_vsll_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsll_b (__m128i a, __m128i b) #include Instruction: vsll.b vr, vr, vr CPU Flags: LSX Description Logical left shift the unsigned 8-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] << (b.byte[i] & 0x7); } Tested on real machine. __m128i __lsx_vsll_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsll_h (__m128i a, __m128i b) #include Instruction: vsll.h vr, vr, vr CPU Flags: LSX Description Logical left shift the unsigned 16-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] << (b.half[i] & 0xf); } Tested on real machine. __m128i __lsx_vsll_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsll_w (__m128i a, __m128i b) #include Instruction: vsll.w vr, vr, vr CPU Flags: LSX Description Logical left shift the unsigned 32-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] << (b.word[i] & 0x1f); } Tested on real machine. __m128i __lsx_vsll_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsll_d (__m128i a, __m128i b) #include Instruction: vsll.d vr, vr, vr CPU Flags: LSX Description Logical left shift the unsigned 64-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] << (b.dword[i] & 0x3f); } Tested on real machine. __m128i __lsx_vsrl_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrl_b (__m128i a, __m128i b) #include Instruction: vsrl.b vr, vr, vr CPU Flags: LSX Description Logical right shift the unsigned 8-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] >> (b.byte[i] & 0x7); } Tested on real machine. __m128i __lsx_vsrl_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrl_h (__m128i a, __m128i b) #include Instruction: vsrl.h vr, vr, vr CPU Flags: LSX Description Logical right shift the unsigned 16-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] >> (b.half[i] & 0xf); } Tested on real machine. __m128i __lsx_vsrl_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrl_w (__m128i a, __m128i b) #include Instruction: vsrl.w vr, vr, vr CPU Flags: LSX Description Logical right shift the unsigned 32-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] >> (b.word[i] & 0x1f); } Tested on real machine. __m128i __lsx_vsrl_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrl_d (__m128i a, __m128i b) #include Instruction: vsrl.d vr, vr, vr CPU Flags: LSX Description Logical right shift the unsigned 64-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] >> (b.dword[i] & 0x3f); } Tested on real machine. __m128i __lsx_vsrlr_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrlr_b (__m128i a, __m128i b) #include Instruction: vsrlr.b vr, vr, vr CPU Flags: LSX Description Logical right shift (with rounding) the unsigned 8-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 16; i++) { if ((b.byte[i] & 0x7) == 0) { dst.byte[i] = a.byte[i]; } else { dst.byte[i] = (a.byte[i] >> (b.byte[i] & 0x7)) + ((a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vsrlr_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrlr_h (__m128i a, __m128i b) #include Instruction: vsrlr.h vr, vr, vr CPU Flags: LSX Description Logical right shift (with rounding) the unsigned 16-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 8; i++) { if ((b.half[i] & 0xf) == 0) { dst.half[i] = a.half[i]; } else { dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) + ((a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vsrlr_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrlr_w (__m128i a, __m128i b) #include Instruction: vsrlr.w vr, vr, vr CPU Flags: LSX Description Logical right shift (with rounding) the unsigned 32-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 4; i++) { if ((b.word[i] & 0x1f) == 0) { dst.word[i] = a.word[i]; } else { dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) + ((a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vsrlr_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrlr_d (__m128i a, __m128i b) #include Instruction: vsrlr.d vr, vr, vr CPU Flags: LSX Description Logical right shift (with rounding) the unsigned 64-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 2; i++) { if ((b.dword[i] & 0x3f) == 0) { dst.dword[i] = a.dword[i]; } else { dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) + ((a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vsra_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsra_b (__m128i a, __m128i b) #include Instruction: vsra.b vr, vr, vr CPU Flags: LSX Description Arithmetic right shift the signed 8-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i]) >> (b.byte[i] & 0x7); } Tested on real machine. __m128i __lsx_vsra_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsra_h (__m128i a, __m128i b) #include Instruction: vsra.h vr, vr, vr CPU Flags: LSX Description Arithmetic right shift the signed 16-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i]) >> (b.half[i] & 0xf); } Tested on real machine. __m128i __lsx_vsra_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsra_w (__m128i a, __m128i b) #include Instruction: vsra.w vr, vr, vr CPU Flags: LSX Description Arithmetic right shift the signed 32-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i]) >> (b.word[i] & 0x1f); } Tested on real machine. __m128i __lsx_vsra_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsra_d (__m128i a, __m128i b) #include Instruction: vsra.d vr, vr, vr CPU Flags: LSX Description Arithmetic right shift the signed 64-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i]) >> (b.dword[i] & 0x3f); } Tested on real machine. __m128i __lsx_vsrar_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrar_b (__m128i a, __m128i b) #include Instruction: vsrar.b vr, vr, vr CPU Flags: LSX Description Arithmetic right shift (with rounding) the signed 8-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 16; i++) { if ((b.byte[i] & 0x7) == 0) { dst.byte[i] = a.byte[i]; } else { dst.byte[i] = ((s8)a.byte[i] >> (b.byte[i] & 0x7)) + (((s8)a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vsrar_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrar_h (__m128i a, __m128i b) #include Instruction: vsrar.h vr, vr, vr CPU Flags: LSX Description Arithmetic right shift (with rounding) the signed 16-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 8; i++) { if ((b.half[i] & 0xf) == 0) { dst.half[i] = a.half[i]; } else { dst.half[i] = ((s16)a.half[i] >> (b.half[i] & 0xf)) + (((s16)a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vsrar_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrar_w (__m128i a, __m128i b) #include Instruction: vsrar.w vr, vr, vr CPU Flags: LSX Description Arithmetic right shift (with rounding) the signed 32-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 4; i++) { if ((b.word[i] & 0x1f) == 0) { dst.word[i] = a.word[i]; } else { dst.word[i] = ((s32)a.word[i] >> (b.word[i] & 0x1f)) + (((s32)a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vsrar_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vsrar_d (__m128i a, __m128i b) #include Instruction: vsrar.d vr, vr, vr CPU Flags: LSX Description Arithmetic right shift (with rounding) the signed 64-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 2; i++) { if ((b.dword[i] & 0x3f) == 0) { dst.dword[i] = a.dword[i]; } else { dst.dword[i] = ((s64)a.dword[i] >> (b.dword[i] & 0x3f)) + (((s64)a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1); } } Tested on real machine. __m128i __lsx_vrotr_b (__m128i a, __m128i b) Synopsis __m128i __lsx_vrotr_b (__m128i a, __m128i b) #include Instruction: vrotr.b vr, vr, vr CPU Flags: LSX Description Rotate right the unsigned 8-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 16; i++) { dst.byte[i] = (a.byte[i] >> (b.byte[i] & 0x7)) | (a.byte[i] << (8 - (b.byte[i] & 0x7))); } Tested on real machine. __m128i __lsx_vrotr_h (__m128i a, __m128i b) Synopsis __m128i __lsx_vrotr_h (__m128i a, __m128i b) #include Instruction: vrotr.h vr, vr, vr CPU Flags: LSX Description Rotate right the unsigned 16-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 8; i++) { dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) | (a.half[i] << (16 - (b.half[i] & 0xf))); } Tested on real machine. __m128i __lsx_vrotr_w (__m128i a, __m128i b) Synopsis __m128i __lsx_vrotr_w (__m128i a, __m128i b) #include Instruction: vrotr.w vr, vr, vr CPU Flags: LSX Description Rotate right the unsigned 32-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 4; i++) { dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) | (a.word[i] << (32 - (b.word[i] & 0x1f))); } Tested on real machine. __m128i __lsx_vrotr_d (__m128i a, __m128i b) Synopsis __m128i __lsx_vrotr_d (__m128i a, __m128i b) #include Instruction: vrotr.d vr, vr, vr CPU Flags: LSX Description Rotate right the unsigned 64-bit elements in a by elements in b , store the result to dst . Operation for (int i = 0; i < 2; i++) { dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) | (a.dword[i] << (64 - (b.dword[i] & 0x3f))); } Tested on real machine.","title":"Shift"},{"location":"lsx/shift/#shift","text":"","title":"Shift"},{"location":"lsx/shift/#__m128i-__lsx_vbsll_v-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vbsll_v (__m128i a, imm0_31 imm)"},{"location":"lsx/shift/#synopsis","text":"__m128i __lsx_vbsll_v (__m128i a, imm0_31 imm) #include Instruction: vbsll.v vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description","text":"Compute 128-bit a shifted left by imm * 8 bits.","title":"Description"},{"location":"lsx/shift/#operation","text":"int shift = (imm * 8) % 128; dst.qword[0] = (u128)a.qword[0] << shift;","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vbsrl_v-__m128i-a-imm0_31-imm","text":"","title":"__m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm)"},{"location":"lsx/shift/#synopsis_1","text":"__m128i __lsx_vbsrl_v (__m128i a, imm0_31 imm) #include Instruction: vbsrl.v vr, vr, imm CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_1","text":"Compute 128-bit a shifted right by imm * 8 bits.","title":"Description"},{"location":"lsx/shift/#operation_1","text":"int shift = (imm * 8) % 128; dst.qword[0] = (u128)a.qword[0] >> shift;","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsll_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsll_b (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_2","text":"__m128i __lsx_vsll_b (__m128i a, __m128i b) #include Instruction: vsll.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_2","text":"Logical left shift the unsigned 8-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_2","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] << (b.byte[i] & 0x7); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsll_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsll_h (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_3","text":"__m128i __lsx_vsll_h (__m128i a, __m128i b) #include Instruction: vsll.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_3","text":"Logical left shift the unsigned 16-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_3","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] << (b.half[i] & 0xf); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsll_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsll_w (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_4","text":"__m128i __lsx_vsll_w (__m128i a, __m128i b) #include Instruction: vsll.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_4","text":"Logical left shift the unsigned 32-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_4","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] << (b.word[i] & 0x1f); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsll_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsll_d (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_5","text":"__m128i __lsx_vsll_d (__m128i a, __m128i b) #include Instruction: vsll.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_5","text":"Logical left shift the unsigned 64-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_5","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] << (b.dword[i] & 0x3f); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrl_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrl_b (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_6","text":"__m128i __lsx_vsrl_b (__m128i a, __m128i b) #include Instruction: vsrl.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_6","text":"Logical right shift the unsigned 8-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_6","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = a.byte[i] >> (b.byte[i] & 0x7); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrl_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrl_h (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_7","text":"__m128i __lsx_vsrl_h (__m128i a, __m128i b) #include Instruction: vsrl.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_7","text":"Logical right shift the unsigned 16-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_7","text":"for (int i = 0; i < 8; i++) { dst.half[i] = a.half[i] >> (b.half[i] & 0xf); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrl_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrl_w (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_8","text":"__m128i __lsx_vsrl_w (__m128i a, __m128i b) #include Instruction: vsrl.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_8","text":"Logical right shift the unsigned 32-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_8","text":"for (int i = 0; i < 4; i++) { dst.word[i] = a.word[i] >> (b.word[i] & 0x1f); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrl_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrl_d (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_9","text":"__m128i __lsx_vsrl_d (__m128i a, __m128i b) #include Instruction: vsrl.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_9","text":"Logical right shift the unsigned 64-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_9","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = a.dword[i] >> (b.dword[i] & 0x3f); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrlr_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrlr_b (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_10","text":"__m128i __lsx_vsrlr_b (__m128i a, __m128i b) #include Instruction: vsrlr.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_10","text":"Logical right shift (with rounding) the unsigned 8-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_10","text":"for (int i = 0; i < 16; i++) { if ((b.byte[i] & 0x7) == 0) { dst.byte[i] = a.byte[i]; } else { dst.byte[i] = (a.byte[i] >> (b.byte[i] & 0x7)) + ((a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrlr_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrlr_h (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_11","text":"__m128i __lsx_vsrlr_h (__m128i a, __m128i b) #include Instruction: vsrlr.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_11","text":"Logical right shift (with rounding) the unsigned 16-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_11","text":"for (int i = 0; i < 8; i++) { if ((b.half[i] & 0xf) == 0) { dst.half[i] = a.half[i]; } else { dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) + ((a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrlr_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrlr_w (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_12","text":"__m128i __lsx_vsrlr_w (__m128i a, __m128i b) #include Instruction: vsrlr.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_12","text":"Logical right shift (with rounding) the unsigned 32-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_12","text":"for (int i = 0; i < 4; i++) { if ((b.word[i] & 0x1f) == 0) { dst.word[i] = a.word[i]; } else { dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) + ((a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrlr_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrlr_d (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_13","text":"__m128i __lsx_vsrlr_d (__m128i a, __m128i b) #include Instruction: vsrlr.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_13","text":"Logical right shift (with rounding) the unsigned 64-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_13","text":"for (int i = 0; i < 2; i++) { if ((b.dword[i] & 0x3f) == 0) { dst.dword[i] = a.dword[i]; } else { dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) + ((a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsra_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsra_b (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_14","text":"__m128i __lsx_vsra_b (__m128i a, __m128i b) #include Instruction: vsra.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_14","text":"Arithmetic right shift the signed 8-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_14","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = ((s8)a.byte[i]) >> (b.byte[i] & 0x7); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsra_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsra_h (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_15","text":"__m128i __lsx_vsra_h (__m128i a, __m128i b) #include Instruction: vsra.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_15","text":"Arithmetic right shift the signed 16-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_15","text":"for (int i = 0; i < 8; i++) { dst.half[i] = ((s16)a.half[i]) >> (b.half[i] & 0xf); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsra_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsra_w (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_16","text":"__m128i __lsx_vsra_w (__m128i a, __m128i b) #include Instruction: vsra.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_16","text":"Arithmetic right shift the signed 32-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_16","text":"for (int i = 0; i < 4; i++) { dst.word[i] = ((s32)a.word[i]) >> (b.word[i] & 0x1f); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsra_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsra_d (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_17","text":"__m128i __lsx_vsra_d (__m128i a, __m128i b) #include Instruction: vsra.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_17","text":"Arithmetic right shift the signed 64-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_17","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = ((s64)a.dword[i]) >> (b.dword[i] & 0x3f); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrar_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrar_b (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_18","text":"__m128i __lsx_vsrar_b (__m128i a, __m128i b) #include Instruction: vsrar.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_18","text":"Arithmetic right shift (with rounding) the signed 8-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_18","text":"for (int i = 0; i < 16; i++) { if ((b.byte[i] & 0x7) == 0) { dst.byte[i] = a.byte[i]; } else { dst.byte[i] = ((s8)a.byte[i] >> (b.byte[i] & 0x7)) + (((s8)a.byte[i] >> ((b.byte[i] & 0x7) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrar_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrar_h (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_19","text":"__m128i __lsx_vsrar_h (__m128i a, __m128i b) #include Instruction: vsrar.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_19","text":"Arithmetic right shift (with rounding) the signed 16-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_19","text":"for (int i = 0; i < 8; i++) { if ((b.half[i] & 0xf) == 0) { dst.half[i] = a.half[i]; } else { dst.half[i] = ((s16)a.half[i] >> (b.half[i] & 0xf)) + (((s16)a.half[i] >> ((b.half[i] & 0xf) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrar_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrar_w (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_20","text":"__m128i __lsx_vsrar_w (__m128i a, __m128i b) #include Instruction: vsrar.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_20","text":"Arithmetic right shift (with rounding) the signed 32-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_20","text":"for (int i = 0; i < 4; i++) { if ((b.word[i] & 0x1f) == 0) { dst.word[i] = a.word[i]; } else { dst.word[i] = ((s32)a.word[i] >> (b.word[i] & 0x1f)) + (((s32)a.word[i] >> ((b.word[i] & 0x1f) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vsrar_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vsrar_d (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_21","text":"__m128i __lsx_vsrar_d (__m128i a, __m128i b) #include Instruction: vsrar.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_21","text":"Arithmetic right shift (with rounding) the signed 64-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_21","text":"for (int i = 0; i < 2; i++) { if ((b.dword[i] & 0x3f) == 0) { dst.dword[i] = a.dword[i]; } else { dst.dword[i] = ((s64)a.dword[i] >> (b.dword[i] & 0x3f)) + (((s64)a.dword[i] >> ((b.dword[i] & 0x3f) - 1)) & 0x1); } } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vrotr_b-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vrotr_b (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_22","text":"__m128i __lsx_vrotr_b (__m128i a, __m128i b) #include Instruction: vrotr.b vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_22","text":"Rotate right the unsigned 8-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_22","text":"for (int i = 0; i < 16; i++) { dst.byte[i] = (a.byte[i] >> (b.byte[i] & 0x7)) | (a.byte[i] << (8 - (b.byte[i] & 0x7))); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vrotr_h-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vrotr_h (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_23","text":"__m128i __lsx_vrotr_h (__m128i a, __m128i b) #include Instruction: vrotr.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_23","text":"Rotate right the unsigned 16-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_23","text":"for (int i = 0; i < 8; i++) { dst.half[i] = (a.half[i] >> (b.half[i] & 0xf)) | (a.half[i] << (16 - (b.half[i] & 0xf))); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vrotr_w-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vrotr_w (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_24","text":"__m128i __lsx_vrotr_w (__m128i a, __m128i b) #include Instruction: vrotr.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_24","text":"Rotate right the unsigned 32-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_24","text":"for (int i = 0; i < 4; i++) { dst.word[i] = (a.word[i] >> (b.word[i] & 0x1f)) | (a.word[i] << (32 - (b.word[i] & 0x1f))); } Tested on real machine.","title":"Operation"},{"location":"lsx/shift/#__m128i-__lsx_vrotr_d-__m128i-a-__m128i-b","text":"","title":"__m128i __lsx_vrotr_d (__m128i a, __m128i b)"},{"location":"lsx/shift/#synopsis_25","text":"__m128i __lsx_vrotr_d (__m128i a, __m128i b) #include Instruction: vrotr.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shift/#description_25","text":"Rotate right the unsigned 64-bit elements in a by elements in b , store the result to dst .","title":"Description"},{"location":"lsx/shift/#operation_25","text":"for (int i = 0; i < 2; i++) { dst.dword[i] = (a.dword[i] >> (b.dword[i] & 0x3f)) | (a.dword[i] << (64 - (b.dword[i] & 0x3f))); } Tested on real machine.","title":"Operation"},{"location":"lsx/shuffling/","text":"Shuffling __m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.b vr, vr, vr, vr CPU Flags: LSX Description Shuffle bytes from a and b with indices from c . Caveat: the indices are placed in c , while in other vshuf intrinsics they are placed in a . Operation for (int i = 0; i < 16; i++) { if (c.byte[i] >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.byte[i] = 0; } else if ((c.byte[i] % 32) < 16) { dst.byte[i] = b.byte[c.byte[i] % 16]; } else { dst.byte[i] = a.byte[c.byte[i] % 16]; } } __m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.h vr, vr, vr CPU Flags: LSX Description Shuffle 16-bit elements in b and c with indices from a , save the result to dst . Operation for (int i = 0; i < 8; i++) { if ((a.half[i] % 256) >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.half[i] = 0; } else if ((a.half[i] % 16) < 8) { dst.half[i] = c.half[a.half[i] % 8]; } else { dst.half[i] = b.half[a.half[i] % 8]; } } Tested on real machine. __m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.w vr, vr, vr CPU Flags: LSX Description Shuffle 32-bit elements in b and c with indices from a , save the result to dst . Operation for (int i = 0; i < 4; i++) { if ((a.word[i] % 256) >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.word[i] = 0; } else if ((a.word[i] % 8) < 4) { dst.word[i] = c.word[a.word[i] % 4]; } else { dst.word[i] = b.word[a.word[i] % 4]; } } Tested on real machine. __m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c) Synopsis __m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.d vr, vr, vr CPU Flags: LSX Description Shuffle 64-bit elements in b and c with indices from a , save the result to dst . Operation for (int i = 0; i < 2; i++) { if ((a.dword[i] % 256) >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.dword[i] = 0; } else if ((a.dword[i] % 4) < 2) { dst.dword[i] = c.dword[a.dword[i] % 2]; } else { dst.dword[i] = b.dword[a.dword[i] % 2]; } } Tested on real machine.","title":"Shuffling"},{"location":"lsx/shuffling/#shuffling","text":"","title":"Shuffling"},{"location":"lsx/shuffling/#__m128i-__lsx_vshuf_b-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/shuffling/#synopsis","text":"__m128i __lsx_vshuf_b (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.b vr, vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shuffling/#description","text":"Shuffle bytes from a and b with indices from c . Caveat: the indices are placed in c , while in other vshuf intrinsics they are placed in a .","title":"Description"},{"location":"lsx/shuffling/#operation","text":"for (int i = 0; i < 16; i++) { if (c.byte[i] >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.byte[i] = 0; } else if ((c.byte[i] % 32) < 16) { dst.byte[i] = b.byte[c.byte[i] % 16]; } else { dst.byte[i] = a.byte[c.byte[i] % 16]; } }","title":"Operation"},{"location":"lsx/shuffling/#__m128i-__lsx_vshuf_h-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/shuffling/#synopsis_1","text":"__m128i __lsx_vshuf_h (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.h vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shuffling/#description_1","text":"Shuffle 16-bit elements in b and c with indices from a , save the result to dst .","title":"Description"},{"location":"lsx/shuffling/#operation_1","text":"for (int i = 0; i < 8; i++) { if ((a.half[i] % 256) >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.half[i] = 0; } else if ((a.half[i] % 16) < 8) { dst.half[i] = c.half[a.half[i] % 8]; } else { dst.half[i] = b.half[a.half[i] % 8]; } } Tested on real machine.","title":"Operation"},{"location":"lsx/shuffling/#__m128i-__lsx_vshuf_w-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/shuffling/#synopsis_2","text":"__m128i __lsx_vshuf_w (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.w vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shuffling/#description_2","text":"Shuffle 32-bit elements in b and c with indices from a , save the result to dst .","title":"Description"},{"location":"lsx/shuffling/#operation_2","text":"for (int i = 0; i < 4; i++) { if ((a.word[i] % 256) >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.word[i] = 0; } else if ((a.word[i] % 8) < 4) { dst.word[i] = c.word[a.word[i] % 4]; } else { dst.word[i] = b.word[a.word[i] % 4]; } } Tested on real machine.","title":"Operation"},{"location":"lsx/shuffling/#__m128i-__lsx_vshuf_d-__m128i-a-__m128i-b-__m128i-c","text":"","title":"__m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c)"},{"location":"lsx/shuffling/#synopsis_3","text":"__m128i __lsx_vshuf_d (__m128i a, __m128i b, __m128i c) #include Instruction: vshuf.d vr, vr, vr CPU Flags: LSX","title":"Synopsis"},{"location":"lsx/shuffling/#description_3","text":"Shuffle 64-bit elements in b and c with indices from a , save the result to dst .","title":"Description"},{"location":"lsx/shuffling/#operation_3","text":"for (int i = 0; i < 2; i++) { if ((a.dword[i] % 256) >= 64 && MACHINE_3C5000) { // Caveat: observed in 3C5000 dst.dword[i] = 0; } else if ((a.dword[i] % 4) < 2) { dst.dword[i] = c.dword[a.dword[i] % 2]; } else { dst.dword[i] = b.dword[a.dword[i] % 2]; } } Tested on real machine.","title":"Operation"}]} \ No newline at end of file diff --git a/search/worker.js b/search/worker.js new file mode 100644 index 00000000..8628dbce --- /dev/null +++ b/search/worker.js @@ -0,0 +1,133 @@ +var base_path = 'function' === typeof importScripts ? '.' : '/search/'; +var allowSearch = false; +var index; +var documents = {}; +var lang = ['en']; +var data; + +function getScript(script, callback) { + console.log('Loading script: ' + script); + $.getScript(base_path + script).done(function () { + callback(); + }).fail(function (jqxhr, settings, exception) { + console.log('Error: ' + exception); + }); +} + +function getScriptsInOrder(scripts, callback) { + if (scripts.length === 0) { + callback(); + return; + } + getScript(scripts[0], function() { + getScriptsInOrder(scripts.slice(1), callback); + }); +} + +function loadScripts(urls, callback) { + if( 'function' === typeof importScripts ) { + importScripts.apply(null, urls); + callback(); + } else { + getScriptsInOrder(urls, callback); + } +} + +function onJSONLoaded () { + data = JSON.parse(this.responseText); + var scriptsToLoad = ['lunr.js']; + if (data.config && data.config.lang && data.config.lang.length) { + lang = data.config.lang; + } + if (lang.length > 1 || lang[0] !== "en") { + scriptsToLoad.push('lunr.stemmer.support.js'); + if (lang.length > 1) { + scriptsToLoad.push('lunr.multi.js'); + } + if (lang.includes("ja") || lang.includes("jp")) { + scriptsToLoad.push('tinyseg.js'); + } + for (var i=0; i < lang.length; i++) { + if (lang[i] != 'en') { + scriptsToLoad.push(['lunr', lang[i], 'js'].join('.')); + } + } + } + loadScripts(scriptsToLoad, onScriptsLoaded); +} + +function onScriptsLoaded () { + console.log('All search scripts loaded, building Lunr index...'); + if (data.config && data.config.separator && data.config.separator.length) { + lunr.tokenizer.separator = new RegExp(data.config.separator); + } + + if (data.index) { + index = lunr.Index.load(data.index); + data.docs.forEach(function (doc) { + documents[doc.location] = doc; + }); + console.log('Lunr pre-built index loaded, search ready'); + } else { + index = lunr(function () { + if (lang.length === 1 && lang[0] !== "en" && lunr[lang[0]]) { + this.use(lunr[lang[0]]); + } else if (lang.length > 1) { + this.use(lunr.multiLanguage.apply(null, lang)); // spread operator not supported in all browsers: https://developer.mozilla.org/en-US/docs/Web/JavaScript/Reference/Operators/Spread_operator#Browser_compatibility + } + this.field('title'); + this.field('text'); + this.ref('location'); + + for (var i=0; i < data.docs.length; i++) { + var doc = data.docs[i]; + this.add(doc); + documents[doc.location] = doc; + } + }); + console.log('Lunr index built, search ready'); + } + allowSearch = true; + postMessage({config: data.config}); + postMessage({allowSearch: allowSearch}); +} + +function init () { + var oReq = new XMLHttpRequest(); + oReq.addEventListener("load", onJSONLoaded); + var index_path = base_path + '/search_index.json'; + if( 'function' === typeof importScripts ){ + index_path = 'search_index.json'; + } + oReq.open("GET", index_path); + oReq.send(); +} + +function search (query) { + if (!allowSearch) { + console.error('Assets for search still loading'); + return; + } + + var resultDocuments = []; + var results = index.search(query); + for (var i=0; i < results.length; i++){ + var result = results[i]; + doc = documents[result.ref]; + doc.summary = doc.text.substring(0, 200); + resultDocuments.push(doc); + } + return resultDocuments; +} + +if( 'function' === typeof importScripts ) { + onmessage = function (e) { + if (e.data.init) { + init(); + } else if (e.data.query) { + postMessage({ results: search(e.data.query) }); + } else { + console.error("Worker - Unrecognized message: " + e); + } + }; +} diff --git a/sitemap.xml b/sitemap.xml new file mode 100644 index 00000000..167527e1 --- /dev/null +++ b/sitemap.xml @@ -0,0 +1,78 @@ + + + + https://jia.je/unofficial-loongarch-intrinsics-guide/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/bitwise_operations/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/float_comparison/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/float_computation/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/float_conversion/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/float_misc/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/fma/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/integer_comparison/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/integer_computation/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/logical/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/memory/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/permutation/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/shift/ + 2023-12-12 + daily + + + https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/shuffling/ + 2023-12-12 + daily + + \ No newline at end of file diff --git a/sitemap.xml.gz b/sitemap.xml.gz new file mode 100644 index 00000000..4f0fa0c3 Binary files /dev/null and b/sitemap.xml.gz differ