From 887acdd42c1551dbf0fcb65f58783c55cc45c620 Mon Sep 17 00:00:00 2001 From: Jiajie Chen Date: Tue, 9 Jul 2024 17:01:50 +0800 Subject: [PATCH] Fix typo reported by Yang Liu --- main.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/main.py b/main.py index 452885d7..19685c3d 100644 --- a/main.py +++ b/main.py @@ -567,7 +567,7 @@ def vhaddw(name, name2): return instruction( intrinsic=f"__m128i __lsx_vhaddw_{name}_{name2} (__m128i a, __m128i b)", instr=f"vhaddw.{name}.{name2} vr, vr, vr", - desc=f"Add odd-positioned {signedness} {width2}-bit elements in `a` to even-positioned {signedness} {width2}-bit elements in 'b' to get {width}-bit result.", + desc=f"Add odd-positioned {signedness} {width2}-bit elements in `a` to even-positioned {signedness} {width2}-bit elements in `b` to get {width}-bit result.", ) @my_macro(env) @@ -578,7 +578,7 @@ def vhsubw(name, name2): return instruction( intrinsic=f"__m128i __lsx_vhsubw_{name}_{name2} (__m128i a, __m128i b)", instr=f"vhsubw.{name}.{name2} vr, vr, vr", - desc=f"Subtract odd-positioned {signedness} {width2}-bit elements in `a` by even-positioned {signedness} {width2}-bit elements in 'b' to get {width}-bit result.", + desc=f"Subtract odd-positioned {signedness} {width2}-bit elements in `a` by even-positioned {signedness} {width2}-bit elements in `b` to get {width}-bit result.", ) @my_macro(env)