From dfa23f30a94dc69331182761a5cf0409ada0f522 Mon Sep 17 00:00:00 2001 From: Leonard Pfeiffer Date: Fri, 27 Oct 2023 12:16:37 +0200 Subject: [PATCH] Repair .gitignore remove indentations use empty lines instead --- .gitignore | 57 ++++++++++++++++++++++++++++++------------------------ 1 file changed, 32 insertions(+), 25 deletions(-) diff --git a/.gitignore b/.gitignore index 90186af..30647ac 100644 --- a/.gitignore +++ b/.gitignore @@ -1,33 +1,40 @@ # General - * - !*/ - !*.txt +* +!*/ +!*.txt + # VHDL - !*.sv # Note: .sv for SystemVerilog 2006 Standard instead of .v for Verliog 2001 standard - !*.vhdl - !*.vhd +!*.sv # Note: .sv for SystemVerilog 2006 Standard instead of .v for Verliog 2001 standard +!*.vhdl +!*.vhd + # Quartus - !*.qpf - !*.qsf - !*.sdc - !*.srf +!*.qpf +!*.qsf +!*.sdc +!*.srf + # Platform Designer (Qsys) - !*.qsys - !*.qip - !*.bsf +!*.qsys +!*.qip +!*.bsf + # Modelsim - !*.mpf - !*.vqm - !*.qrf - !*.do - !*.tcl +!*.mpf +!*.vqm +!*.qrf +!*.do +!*.tcl + # Doc - !*.tex - !*.md +!*.tex +!*.md + # Folders - *.vscode/ +*.vscode/ + # Software (alpha) - *.asm - *.c - *.cc - *.cpp +*.asm +*.c +*.cc +*.cpp