From 86f7935d96debd2defeed4cd67f2dedc157fec7f Mon Sep 17 00:00:00 2001
From: kekeandzeyu <kekeandzeyu@gmail.com>
Date: Tue, 15 Oct 2024 13:15:41 +0800
Subject: [PATCH] add more notes in data structures and algorithms

---
 Writerside/topics/Computer-Architecture.md | 32 ++++++++++------------
 Writerside/topics/Python-Programming.md    |  3 +-
 2 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/Writerside/topics/Computer-Architecture.md b/Writerside/topics/Computer-Architecture.md
index 1f3fa0d..9870e24 100644
--- a/Writerside/topics/Computer-Architecture.md
+++ b/Writerside/topics/Computer-Architecture.md
@@ -63,8 +63,7 @@ C++ programming</a>.</p>
         2\text{A}5\text{D}_{16} = 0\text{x}22400</math></p>
     </li>
     <li>
-        <p>A convenient shorthand for writing long sequences of bits.
-        </p>
+        <p>A convenient shorthand for writing long sequences of bits.</p>
     </li>
     </list>
 </li>
@@ -91,8 +90,7 @@ Conversion"/>
 
 <list type="bullet">
 <li>
-    <p>Check the powers of the base. For base-4: 256, 64, 16, 4, 1.
-    </p>
+    <p>Check the powers of the base. For base-4: 256, 64, 16, 4, 1.</p>
 </li>
 <li>
     <p>How many multiples of 64 fit in my number (73)?</p>
@@ -1168,20 +1166,20 @@ operations</p>
 
 <list type="bullet">
 <li>
-<p>Small memories of a fixed size.</p>
+    <p>Small memories of a fixed size.</p>
 </li>
 <li>
-<p>Can be read or written.</p>
+    <p>Can be read or written.</p>
 </li>
 <li>
-<p>Limited in number.</p>
+    <p>Limited in number.</p>
 </li>
 <li>
-<p>Very fast and low power to access.</p>
+    <p>Very fast and low power to access.</p>
 </li>
 </list>
 
-<table style = "both">
+<table style="both">
 <tr>
     <td></td>
     <td>Registers</td>
@@ -1207,25 +1205,25 @@ operations</p>
 </tr>
 </table>
 
-<img src="../images_architecture/a3-2-1.png" alt = "Registers"/>
+<img src="../images_architecture/a3-2-1.png" alt="Registers"/>
 
 <warning>
 <p>Some important notes about registers: </p>
 <list type="bullet">
 <li>
-<p>Each ISA has a predetermined number of registers, registers are 
-built in with hardware.</p>
+    <p>Each ISA has a predetermined number of registers, registers are 
+    built in with hardware.</p>
 </li>
 <li>
-<p>Register denoted by 'x' can be referenced by number (x0 - x31) or 
-by name.</p>
+    <p>Register denoted by 'x' can be referenced by number (x0 - x31) or 
+    by name.</p>
 </li>
 <li>
-<p>Registers have no type.</p>
+    <p>Registers have no type.</p>
 </li>
 <li>
-<p>Register zero (x0 or zero) always has the value 0 and cannot be 
-changed! Any instruction writing to x0 has no effect!</p>
+    <p>Register zero (x0 or zero) always has the value 0 and cannot be 
+    changed! Any instruction writing to x0 has no effect!</p>
 </li>
 <li>
 <p>In high-level languages, number of variables limited only by 
diff --git a/Writerside/topics/Python-Programming.md b/Writerside/topics/Python-Programming.md
index 55fc3d0..f727128 100644
--- a/Writerside/topics/Python-Programming.md
+++ b/Writerside/topics/Python-Programming.md
@@ -309,8 +309,7 @@ for key in list(dict.keys()):
     <p><format color="Fuchsia">Unicode:</format> </p>
     <list type="bullet">
     <li>
-        <p><format color="LawnGreen">UCS-2:</format> 2 bytes, 16 bits
-        .</p>
+        <p><format color="LawnGreen">UCS-2:</format> 2 bytes, 16 bits.</p>
     </li>
     <li>
         <p><format color="LawnGreen">UCS-4:</format> 4 bytes, 32 bits