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Nexys-A7

NI Digilent Nexys A7-100T FPGA Trainer Board

The NI Digilent Nexys A7 is a rebrand of the Nexys 4 DDR board with the addition of the Nexys A7-50T variant of the Nexys A7, which has a smaller gate array. The Nexys A7-100T variant is functionally identical to the Nexys 4 DDR. The Nexys A7-100T contains 15,850 logic slices each with 4 look-up tables (LUTs) and 8 flip-flops. The Nexys A7-50T that contains 8,150 logic slices was discontinued and is no longer available for purchase.

A Xilinx Design Constraints (XDC) file provides the physical pins on the FPGA in relation to the HDL code. Here are master XDC files for A7-100T and A7-50T boards with identical constraints:

The master XDC files of all Digilent boards can be found here.

Xilinx Downloads provide Xilinx Unified Installer: Windows (or Linux) Self Extracting Web Installer

  • Download, extract, and open Xilinx Unified Installer
    • To reduce installation time, disable any anti-virus software and power saving settings when running the installer
  • Provide Xilinx user account credentials to download the required files
  • Select "Download and Install Now"
  • Select Vivado > Vivado ML Standard
  • Design Tools > Vivado Design Suite that includes Vivado and Vitis HLS (high-level synthesis) -- uncheck all others such as
    • Vitis Model Composer (Xilinx Toolbox for MATLAB and Simulink. Includes the functionality of System Generator for DSP)
    • DocNav
  • Devices > 7 Series > Artix-7 -- uncheck all others
  • Installation Options > Install Cable Drivers -- this is required
    • To install cable drivers on Linux, follow the instructions on P. 47 in UG973 and enter the following commands as root
./tools/Xilinx/data/xicom/cable_drivers/lin64/install_script/install_drivers/install_drivers

install-1.png install-2.png

Nexys A7 FPGA Board

Create projects

  • Add sources with both target language and simulator language in VHDL
  • Add constraints (an XDC file)
  • Select the board from digilentinc.com
  • Select Nexys A7-100T (Part: xc7a100tcsg324-1)
  • Review New Project Summary" > Finish
  • Tools > Settings > Tool Settings > Text Editor > Syntax Checking > Vivado
  • Project VHDL and XDC files
    • Lab 1: Seven-Segment Decoder
    • Lab 2: Four-Digit Hex Counter
    • Lab 3: Bouncing Ball (VGA Display)
    • Lab 4: Hex Calculator (Pmod KYPD)
    • Lab 5: Digital-to-Analog Converter (DAC) Siren (Pmod I2S and Headphone)
    • Lab 6: Video Game PONG (Pmod AD1, Potentiometer, and VGA Display)
  • Digilent developed Peripheral Module (Pmod) Interface
  • Connecting devices other than Pmods may risk damaging the Nexys A7-100T board