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inv_mpu_core.c
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inv_mpu_core.c
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/*
* Copyright (C) 2012 Invensense, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/sysfs.h>
#include <linux/jiffies.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/kfifo.h>
#include <linux/poll.h>
#include <linux/miscdevice.h>
#include <linux/spinlock.h>
#include "inv_mpu_iio.h"
#include "sysfs.h"
#include "inv_test/inv_counters.h"
#include <linux/of_gpio.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/regulator/consumer.h>
s64 get_time_ns(void)
{
struct timespec ts;
ktime_get_ts(&ts);
return timespec_to_ns(&ts);
}
/* This is for compatibility for power state. Should remove once HAL
does not use power_state sysfs entry */
static bool fake_asleep;
static const struct inv_hw_s hw_info[INV_NUM_PARTS] = {
{119, "ITG3500"},
{ 63, "MPU3050"},
{117, "MPU6050"},
{118, "MPU9150"},
{128, "MPU6500"},
{128, "MPU9250"},
{128, "MPU9350"},
{128, "MPU6515"},
};
static const u8 reg_gyro_offset[] = {REG_XG_OFFS_USRH,
REG_XG_OFFS_USRH + 2,
REG_XG_OFFS_USRH + 4};
const u8 reg_6050_accel_offset[] = {REG_XA_OFFS_H,
REG_XA_OFFS_H + 2,
REG_XA_OFFS_H + 4};
const u8 reg_6500_accel_offset[] = {REG_6500_XA_OFFS_H,
REG_6500_YA_OFFS_H,
REG_6500_ZA_OFFS_H};
#ifdef CONFIG_INV_TESTING
static bool suspend_state;
static int inv_mpu_suspend(struct device *dev);
static int inv_mpu_resume(struct device *dev);
struct test_data_out {
bool gyro;
bool accel;
bool compass;
bool pressure;
bool LPQ;
bool SIXQ;
bool PEDQ;
};
static struct test_data_out data_out_control;
#endif
static void inv_setup_reg(struct inv_reg_map_s *reg)
{
reg->sample_rate_div = REG_SAMPLE_RATE_DIV;
reg->lpf = REG_CONFIG;
reg->bank_sel = REG_BANK_SEL;
reg->user_ctrl = REG_USER_CTRL;
reg->fifo_en = REG_FIFO_EN;
reg->gyro_config = REG_GYRO_CONFIG;
reg->accel_config = REG_ACCEL_CONFIG;
reg->fifo_count_h = REG_FIFO_COUNT_H;
reg->fifo_r_w = REG_FIFO_R_W;
reg->raw_accel = REG_RAW_ACCEL;
reg->temperature = REG_TEMPERATURE;
reg->int_enable = REG_INT_ENABLE;
reg->int_status = REG_INT_STATUS;
reg->pwr_mgmt_1 = REG_PWR_MGMT_1;
reg->pwr_mgmt_2 = REG_PWR_MGMT_2;
reg->mem_start_addr = REG_MEM_START_ADDR;
reg->mem_r_w = REG_MEM_RW;
reg->prgm_strt_addrh = REG_PRGM_STRT_ADDRH;
};
/**
* inv_i2c_read_base() - Read one or more bytes from the device registers.
* @st: Device driver instance.
* @i2c_addr: i2c address of device.
* @reg: First device register to be read from.
* @length: Number of bytes to read.
* @data: Data read from device.
* NOTE:This is not re-implementation of i2c_smbus_read because i2c
* address could be specified in this case. We could have two different
* i2c address due to secondary i2c interface.
*/
int inv_i2c_read_base(struct inv_mpu_state *st, u16 i2c_addr,
u8 reg, u16 length, u8 *data)
{
struct i2c_msg msgs[2];
int res;
if (!data)
return -EINVAL;
msgs[0].addr = i2c_addr;
msgs[0].flags = 0; /* write */
msgs[0].buf = ®
msgs[0].len = 1;
msgs[1].addr = i2c_addr;
msgs[1].flags = I2C_M_RD;
msgs[1].buf = data;
msgs[1].len = length;
res = i2c_transfer(st->sl_handle, msgs, 2);
if (res < 2) {
if (res >= 0)
res = -EIO;
} else
res = 0;
INV_I2C_INC_MPUWRITE(3);
INV_I2C_INC_MPUREAD(length);
#if CONFIG_DYNAMIC_DEBUG
{
char *read = 0;
pr_debug("%s RD%02X%02X%02X -> %s%s\n", st->hw->name,
i2c_addr, reg, length,
wr_pr_debug_begin(data, length, read),
wr_pr_debug_end(read));
}
#endif
return res;
}
/**
* inv_i2c_single_write_base() - Write a byte to a device register.
* @st: Device driver instance.
* @i2c_addr: I2C address of the device.
* @reg: Device register to be written to.
* @data: Byte to write to device.
* NOTE:This is not re-implementation of i2c_smbus_write because i2c
* address could be specified in this case. We could have two different
* i2c address due to secondary i2c interface.
*/
int inv_i2c_single_write_base(struct inv_mpu_state *st,
u16 i2c_addr, u8 reg, u8 data)
{
u8 tmp[2];
struct i2c_msg msg;
int res;
tmp[0] = reg;
tmp[1] = data;
msg.addr = i2c_addr;
msg.flags = 0; /* write */
msg.buf = tmp;
msg.len = 2;
pr_debug("%s WR%02X%02X%02X\n", st->hw->name, i2c_addr, reg, data);
INV_I2C_INC_MPUWRITE(3);
res = i2c_transfer(st->sl_handle, &msg, 1);
if (res < 1) {
if (res == 0)
res = -EIO;
return res;
} else
return 0;
}
static int inv_switch_engine(struct inv_mpu_state *st, bool en, u32 mask)
{
struct inv_reg_map_s *reg;
u8 data, mgmt_1;
int result;
reg = &st->reg;
/* Only when gyro is on, can
clock source be switched to gyro. Otherwise, it must be set to
internal clock */
if (BIT_PWR_GYRO_STBY == mask) {
result = inv_i2c_read(st, reg->pwr_mgmt_1, 1, &mgmt_1);
if (result)
return result;
mgmt_1 &= ~BIT_CLK_MASK;
}
if ((BIT_PWR_GYRO_STBY == mask) && (!en)) {
/* turning off gyro requires switch to internal clock first.
Then turn off gyro engine */
mgmt_1 |= INV_CLK_INTERNAL;
result = inv_i2c_single_write(st, reg->pwr_mgmt_1,
mgmt_1);
if (result)
return result;
}
result = inv_i2c_read(st, reg->pwr_mgmt_2, 1, &data);
if (result)
return result;
if (en)
data &= (~mask);
else
data |= mask;
result = inv_i2c_single_write(st, reg->pwr_mgmt_2, data);
if (result)
return result;
if ((BIT_PWR_GYRO_STBY == mask) && en) {
/* only gyro on needs sensor up time */
msleep(SENSOR_UP_TIME);
/* after gyro is on & stable, switch internal clock to PLL */
mgmt_1 |= INV_CLK_PLL;
result = inv_i2c_single_write(st, reg->pwr_mgmt_1,
mgmt_1);
if (result)
return result;
}
if ((BIT_PWR_ACCEL_STBY == mask) && en)
msleep(REG_UP_TIME);
return 0;
}
/*
* inv_lpa_freq() - store current low power frequency setting.
*/
static int inv_lpa_freq(struct inv_mpu_state *st, int lpa_freq)
{
unsigned long result;
u8 d;
struct inv_reg_map_s *reg;
/* this mapping makes 6500 and 6050 setting close */
/* 2, 4, 6, 7 corresponds to 0.98, 3.91, 15.63, 31.25 */
const u8 mpu6500_lpa_mapping[] = {2, 4, 6, 7};
if (lpa_freq > MAX_LPA_FREQ_PARAM)
return -EINVAL;
if (INV_MPU6500 == st->chip_type) {
d = mpu6500_lpa_mapping[lpa_freq];
result = inv_i2c_single_write(st, REG_6500_LP_ACCEL_ODR, d);
if (result)
return result;
} else {
reg = &st->reg;
result = inv_i2c_read(st, reg->pwr_mgmt_2, 1, &d);
if (result)
return result;
d &= ~BIT_LPA_FREQ;
d |= (u8)(lpa_freq << LPA_FREQ_SHIFT);
result = inv_i2c_single_write(st, reg->pwr_mgmt_2, d);
if (result)
return result;
}
st->chip_config.lpa_freq = lpa_freq;
return 0;
}
static int set_power_itg(struct inv_mpu_state *st, bool power_on)
{
struct inv_reg_map_s *reg;
u8 data;
int result;
if ((!power_on) == st->chip_config.is_asleep)
return 0;
reg = &st->reg;
if (power_on)
data = 0;
else
data = BIT_SLEEP;
result = inv_i2c_single_write(st, reg->pwr_mgmt_1, data);
if (result)
return result;
if (power_on) {
if (INV_MPU6500 == st->chip_type)
msleep(POWER_UP_TIME);
else
msleep(REG_UP_TIME);
}
st->chip_config.is_asleep = !power_on;
return 0;
}
/**
* inv_init_config() - Initialize hardware, disable FIFO.
* @indio_dev: Device driver instance.
* Initial configuration:
* FSR: +/- 2000DPS
* DLPF: 42Hz
* FIFO rate: 50Hz
*/
static int inv_init_config(struct iio_dev *indio_dev)
{
struct inv_reg_map_s *reg;
int result, i;
struct inv_mpu_state *st = iio_priv(indio_dev);
const u8 *ch;
u8 d[2];
reg = &st->reg;
result = inv_i2c_single_write(st, reg->gyro_config,
INV_FSR_2000DPS << GYRO_CONFIG_FSR_SHIFT);
if (result)
return result;
st->chip_config.fsr = INV_FSR_2000DPS;
result = inv_i2c_single_write(st, reg->lpf, INV_FILTER_42HZ);
if (result)
return result;
st->chip_config.lpf = INV_FILTER_42HZ;
result = inv_i2c_single_write(st, reg->sample_rate_div,
ONE_K_HZ / INIT_FIFO_RATE - 1);
if (result)
return result;
st->chip_config.fifo_rate = INIT_FIFO_RATE;
st->chip_config.new_fifo_rate = INIT_FIFO_RATE;
st->irq_dur_ns = INIT_DUR_TIME;
st->chip_config.prog_start_addr = DMP_START_ADDR;
if (INV_MPU6050 == st->chip_type)
st->self_test.samples = INIT_ST_MPU6050_SAMPLES;
else
st->self_test.samples = INIT_ST_SAMPLES;
st->self_test.threshold = INIT_ST_THRESHOLD;
st->batch.wake_fifo_on = true;
if (INV_ITG3500 != st->chip_type) {
st->chip_config.accel_fs = INV_FS_02G;
result = inv_i2c_single_write(st, reg->accel_config,
(INV_FS_02G << ACCEL_CONFIG_FSR_SHIFT));
if (result)
return result;
st->tap.time = INIT_TAP_TIME;
st->tap.thresh = INIT_TAP_THRESHOLD;
st->tap.min_count = INIT_TAP_MIN_COUNT;
st->sample_divider = INIT_SAMPLE_DIVIDER;
st->smd.threshold = MPU_INIT_SMD_THLD;
st->smd.delay = MPU_INIT_SMD_DELAY_THLD;
st->smd.delay2 = MPU_INIT_SMD_DELAY2_THLD;
result = inv_i2c_single_write(st, REG_ACCEL_MOT_DUR,
INIT_MOT_DUR);
if (result)
return result;
st->mot_int.mot_dur = INIT_MOT_DUR;
result = inv_i2c_single_write(st, REG_ACCEL_MOT_THR,
INIT_MOT_THR);
if (result)
return result;
st->mot_int.mot_thr = INIT_MOT_THR;
for (i = 0; i < 3; i++) {
result = inv_i2c_read(st, reg_gyro_offset[i], 2, d);
if (result)
return result;
st->rom_gyro_offset[i] =
(short)be16_to_cpup((__be16 *)(d));
st->input_gyro_offset[i] = 0;
st->input_gyro_dmp_bias[i] = 0;
}
if (INV_MPU6050 == st->chip_type)
ch = reg_6050_accel_offset;
else
ch = reg_6500_accel_offset;
for (i = 0; i < 3; i++) {
result = inv_i2c_read(st, ch[i], 2, d);
if (result)
return result;
st->rom_accel_offset[i] =
(short)be16_to_cpup((__be16 *)(d));
st->input_accel_offset[i] = 0;
st->input_accel_dmp_bias[i] = 0;
}
st->pedometer_step = 0;
st->pedometer_time = 0;
}
return 0;
}
/*
* inv_write_fsr() - Configure the gyro's scale range.
*/
static int inv_write_fsr(struct inv_mpu_state *st, int fsr)
{
struct inv_reg_map_s *reg;
int result;
reg = &st->reg;
if ((fsr < 0) || (fsr > MAX_GYRO_FS_PARAM))
return -EINVAL;
if (fsr == st->chip_config.fsr)
return 0;
if (INV_MPU3050 == st->chip_type)
result = inv_i2c_single_write(st, reg->lpf,
(fsr << GYRO_CONFIG_FSR_SHIFT) | st->chip_config.lpf);
else
result = inv_i2c_single_write(st, reg->gyro_config,
fsr << GYRO_CONFIG_FSR_SHIFT);
if (result)
return result;
st->chip_config.fsr = fsr;
return 0;
}
/*
* inv_write_accel_fs() - Configure the accelerometer's scale range.
*/
static int inv_write_accel_fs(struct inv_mpu_state *st, int fs)
{
int result;
struct inv_reg_map_s *reg;
reg = &st->reg;
if (fs < 0 || fs > MAX_ACCEL_FS_PARAM)
return -EINVAL;
if (fs == st->chip_config.accel_fs)
return 0;
if (INV_MPU3050 == st->chip_type)
result = st->slave_accel->set_fs(st, fs);
else
result = inv_i2c_single_write(st, reg->accel_config,
(fs << ACCEL_CONFIG_FSR_SHIFT));
if (result)
return result;
st->chip_config.accel_fs = fs;
return 0;
}
static int inv_set_offset_reg(struct inv_mpu_state *st, int reg, int val)
{
int result;
u8 d;
d = ((val >> 8) & 0xff);
result = inv_i2c_single_write(st, reg, d);
if (result)
return result;
d = (val & 0xff);
result = inv_i2c_single_write(st, reg + 1, d);
return result;
}
int inv_reset_offset_reg(struct inv_mpu_state *st, bool en)
{
const u8 *ch;
int i, result;
s16 gyro[3], accel[3];
if (en) {
for (i = 0; i < 3; i++) {
gyro[i] = st->rom_gyro_offset[i];
accel[i] = st->rom_accel_offset[i];
}
} else {
for (i = 0; i < 3; i++) {
gyro[i] = st->rom_gyro_offset[i] +
st->input_gyro_offset[i];
accel[i] = st->rom_accel_offset[i] +
(st->input_accel_offset[i] << 1);
}
}
if (INV_MPU6050 == st->chip_type)
ch = reg_6050_accel_offset;
else
ch = reg_6500_accel_offset;
for (i = 0; i < 3; i++) {
result = inv_set_offset_reg(st, reg_gyro_offset[i], gyro[i]);
if (result)
return result;
result = inv_set_offset_reg(st, ch[i], accel[i]);
if (result)
return result;
}
return 0;
}
/*
* inv_fifo_rate_store() - Set fifo rate.
*/
static int inv_fifo_rate_store(struct inv_mpu_state *st, int fifo_rate)
{
if ((fifo_rate < MIN_FIFO_RATE) || (fifo_rate > MAX_FIFO_RATE))
return -EINVAL;
if (fifo_rate == st->chip_config.fifo_rate)
return 0;
st->irq_dur_ns = NSEC_PER_SEC / fifo_rate;
st->chip_config.new_fifo_rate = fifo_rate;
return 0;
}
/*
* inv_reg_dump_show() - Register dump for testing.
*/
static ssize_t inv_reg_dump_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
int ii;
char data;
ssize_t bytes_printed = 0;
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu_state *st = iio_priv(indio_dev);
mutex_lock(&indio_dev->mlock);
for (ii = 0; ii < st->hw->num_reg; ii++) {
/* don't read fifo r/w register */
if (ii == st->reg.fifo_r_w)
data = 0;
else
inv_i2c_read(st, ii, 1, &data);
bytes_printed += sprintf(buf + bytes_printed, "%#2x: %#2x\n",
ii, data);
}
mutex_unlock(&indio_dev->mlock);
return bytes_printed;
}
int write_be32_key_to_mem(struct inv_mpu_state *st,
u32 data, int key)
{
cpu_to_be32s(&data);
return mem_w_key(key, sizeof(data), (u8 *)&data);
}
int inv_write_2bytes(struct inv_mpu_state *st, int k, int data)
{
u8 d[2];
if (data < 0 || data > USHRT_MAX)
return -EINVAL;
d[0] = (u8)((data >> 8) & 0xff);
d[1] = (u8)(data & 0xff);
return mem_w_key(k, ARRAY_SIZE(d), d);
}
static ssize_t _dmp_bias_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu_state *st = iio_priv(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
int result, data, tmp;
if (!st->chip_config.firmware_loaded)
return -EINVAL;
if (!st->chip_config.enable) {
result = st->set_power_state(st, true);
if (result)
return result;
}
result = kstrtoint(buf, 10, &data);
if (result)
goto dmp_bias_store_fail;
switch (this_attr->address) {
case ATTR_DMP_ACCEL_X_DMP_BIAS:
tmp = st->input_accel_dmp_bias[0];
st->input_accel_dmp_bias[0] = data;
result = inv_set_accel_bias_dmp(st);
if (result)
st->input_accel_dmp_bias[0] = tmp;
break;
case ATTR_DMP_ACCEL_Y_DMP_BIAS:
tmp = st->input_accel_dmp_bias[1];
st->input_accel_dmp_bias[1] = data;
result = inv_set_accel_bias_dmp(st);
if (result)
st->input_accel_dmp_bias[1] = tmp;
break;
case ATTR_DMP_ACCEL_Z_DMP_BIAS:
tmp = st->input_accel_dmp_bias[2];
st->input_accel_dmp_bias[2] = data;
result = inv_set_accel_bias_dmp(st);
if (result)
st->input_accel_dmp_bias[2] = tmp;
break;
case ATTR_DMP_GYRO_X_DMP_BIAS:
result = write_be32_key_to_mem(st, data,
KEY_CFG_EXT_GYRO_BIAS_X);
if (result)
goto dmp_bias_store_fail;
st->input_gyro_dmp_bias[0] = data;
break;
case ATTR_DMP_GYRO_Y_DMP_BIAS:
result = write_be32_key_to_mem(st, data,
KEY_CFG_EXT_GYRO_BIAS_Y);
if (result)
goto dmp_bias_store_fail;
st->input_gyro_dmp_bias[1] = data;
break;
case ATTR_DMP_GYRO_Z_DMP_BIAS:
result = write_be32_key_to_mem(st, data,
KEY_CFG_EXT_GYRO_BIAS_Z);
if (result)
goto dmp_bias_store_fail;
st->input_gyro_dmp_bias[2] = data;
break;
default:
break;
}
dmp_bias_store_fail:
if (!st->chip_config.enable)
result |= st->set_power_state(st, false);
if (result)
return result;
return count;
}
static ssize_t inv_dmp_bias_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
int result;
mutex_lock(&indio_dev->mlock);
result = _dmp_bias_store(dev, attr, buf, count);
mutex_unlock(&indio_dev->mlock);
return result;
}
static ssize_t _dmp_attr_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu_state *st = iio_priv(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
int result, data;
if (st->chip_config.enable)
return -EBUSY;
if (this_attr->address <= ATTR_DMP_DISPLAY_ORIENTATION_ON) {
if (!st->chip_config.firmware_loaded)
return -EINVAL;
result = st->set_power_state(st, true);
if (result)
return result;
}
result = kstrtoint(buf, 10, &data);
if (result)
goto dmp_attr_store_fail;
switch (this_attr->address) {
case ATTR_DMP_PED_INT_ON:
result = inv_enable_pedometer_interrupt(st, !!data);
if (result)
goto dmp_attr_store_fail;
st->chip_config.ped_int_on = !!data;
break;
case ATTR_DMP_PED_ON:
{
result = inv_enable_pedometer(st, !!data);
if (result)
goto dmp_attr_store_fail;
st->chip_config.ped_on = !!data;
break;
}
case ATTR_DMP_SMD_ENABLE:
result = inv_write_2bytes(st, KEY_SMD_ENABLE, !!data);
if (result)
goto dmp_attr_store_fail;
st->chip_config.smd_enable = !!data;
break;
case ATTR_DMP_SMD_THLD:
if (data < 0 || data > SHRT_MAX)
goto dmp_attr_store_fail;
result = write_be32_key_to_mem(st, data << 16,
KEY_SMD_ACCEL_THLD);
if (result)
goto dmp_attr_store_fail;
st->smd.threshold = data;
break;
case ATTR_DMP_SMD_DELAY_THLD:
if (data < 0 || data > INT_MAX / MPU_DEFAULT_DMP_FREQ)
goto dmp_attr_store_fail;
result = write_be32_key_to_mem(st, data * MPU_DEFAULT_DMP_FREQ,
KEY_SMD_DELAY_THLD);
if (result)
goto dmp_attr_store_fail;
st->smd.delay = data;
break;
case ATTR_DMP_SMD_DELAY_THLD2:
if (data < 0 || data > INT_MAX / MPU_DEFAULT_DMP_FREQ)
goto dmp_attr_store_fail;
result = write_be32_key_to_mem(st, data * MPU_DEFAULT_DMP_FREQ,
KEY_SMD_DELAY2_THLD);
if (result)
goto dmp_attr_store_fail;
st->smd.delay2 = data;
break;
case ATTR_DMP_TAP_ON:
result = inv_enable_tap_dmp(st, !!data);
if (result)
goto dmp_attr_store_fail;
st->chip_config.tap_on = !!data;
break;
case ATTR_DMP_TAP_THRESHOLD:
if (data < 0 || data > USHRT_MAX) {
result = -EINVAL;
goto dmp_attr_store_fail;
}
result = inv_set_tap_threshold_dmp(st, data);
if (result)
goto dmp_attr_store_fail;
st->tap.thresh = data;
break;
case ATTR_DMP_TAP_MIN_COUNT:
if (data < 0 || data > USHRT_MAX) {
result = -EINVAL;
goto dmp_attr_store_fail;
}
result = inv_set_min_taps_dmp(st, data);
if (result)
goto dmp_attr_store_fail;
st->tap.min_count = data;
break;
case ATTR_DMP_TAP_TIME:
if (data < 0 || data > USHRT_MAX) {
result = -EINVAL;
goto dmp_attr_store_fail;
}
result = inv_set_tap_time_dmp(st, data);
if (result)
goto dmp_attr_store_fail;
st->tap.time = data;
break;
case ATTR_DMP_DISPLAY_ORIENTATION_ON:
result = inv_set_display_orient_interrupt_dmp(st, !!data);
if (result)
goto dmp_attr_store_fail;
st->chip_config.display_orient_on = !!data;
break;
/* from here, power of chip is not turned on */
case ATTR_DMP_ON:
st->chip_config.dmp_on = !!data;
break;
case ATTR_DMP_INT_ON:
st->chip_config.dmp_int_on = !!data;
break;
case ATTR_DMP_EVENT_INT_ON:
st->chip_config.dmp_event_int_on = !!data;
break;
case ATTR_DMP_STEP_INDICATOR_ON:
st->chip_config.step_indicator_on = !!data;
break;
case ATTR_DMP_BATCHMODE_TIMEOUT:
if (data < 0 || data > INT_MAX) {
result = -EINVAL;
goto dmp_attr_store_fail;
}
st->batch.timeout = data;
break;
case ATTR_DMP_BATCHMODE_WAKE_FIFO_FULL:
st->batch.wake_fifo_on = !!data;
st->batch.overflow_on = 0;
break;
case ATTR_DMP_SIX_Q_ON:
st->sensor[SENSOR_SIXQ].on = !!data;
break;
case ATTR_DMP_SIX_Q_RATE:
if (data > MPU_DEFAULT_DMP_FREQ || data < 0) {
result = -EINVAL;
goto dmp_attr_store_fail;
}
st->sensor[SENSOR_SIXQ].rate = data;
st->sensor[SENSOR_SIXQ].dur = MPU_DEFAULT_DMP_FREQ / data;
st->sensor[SENSOR_SIXQ].dur *= DMP_INTERVAL_INIT;
break;
case ATTR_DMP_LPQ_ON:
st->sensor[SENSOR_LPQ].on = !!data;
break;
case ATTR_DMP_LPQ_RATE:
if (data > MPU_DEFAULT_DMP_FREQ || data < 0) {
result = -EINVAL;
goto dmp_attr_store_fail;
}
st->sensor[SENSOR_LPQ].rate = data;
st->sensor[SENSOR_LPQ].dur = MPU_DEFAULT_DMP_FREQ / data;
st->sensor[SENSOR_LPQ].dur *= DMP_INTERVAL_INIT;
break;
case ATTR_DMP_PED_Q_ON:
st->sensor[SENSOR_PEDQ].on = !!data;
break;
case ATTR_DMP_PED_Q_RATE:
if (data > MPU_DEFAULT_DMP_FREQ || data < 0) {
result = -EINVAL;
goto dmp_attr_store_fail;
}
st->sensor[SENSOR_PEDQ].rate = data;
st->sensor[SENSOR_PEDQ].dur = MPU_DEFAULT_DMP_FREQ / data;
st->sensor[SENSOR_PEDQ].dur *= DMP_INTERVAL_INIT;
break;
case ATTR_DMP_STEP_DETECTOR_ON:
st->sensor[SENSOR_STEP].on = !!data;
break;
#ifdef CONFIG_INV_TESTING
case ATTR_DEBUG_SMD_ENABLE_TESTP1:
{
u8 d[] = {0x42};
result = st->set_power_state(st, true);
if (result)
goto dmp_attr_store_fail;
result = mem_w_key(KEY_SMD_ENABLE_TESTPT1, ARRAY_SIZE(d), d);
if (result)
goto dmp_attr_store_fail;
}
break;
case ATTR_DEBUG_SMD_ENABLE_TESTP2:
{
u8 d[] = {0x42};
result = st->set_power_state(st, true);
if (result)
goto dmp_attr_store_fail;
result = mem_w_key(KEY_SMD_ENABLE_TESTPT2, ARRAY_SIZE(d), d);
if (result)
goto dmp_attr_store_fail;
}
break;
#endif
default:
result = -EINVAL;
goto dmp_attr_store_fail;
}
dmp_attr_store_fail:
if (this_attr->address <= ATTR_DMP_DISPLAY_ORIENTATION_ON)
result |= st->set_power_state(st, false);
if (result)
return result;
return count;
}
/*
* inv_dmp_attr_store() - calling this function will store current
* dmp parameter settings
*/
static ssize_t inv_dmp_attr_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
int result;
mutex_lock(&indio_dev->mlock);
result = _dmp_attr_store(dev, attr, buf, count);
mutex_unlock(&indio_dev->mlock);
return result;
}
static ssize_t inv_attr64_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu_state *st = iio_priv(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
int result;
u64 tmp;
u32 ped;
mutex_lock(&indio_dev->mlock);
if (!st->chip_config.enable || !st->chip_config.dmp_on) {
mutex_unlock(&indio_dev->mlock);
return -EINVAL;
}
switch (this_attr->address) {
case ATTR_DMP_PEDOMETER_STEPS:
result = inv_get_pedometer_steps(st, &ped);
tmp = st->pedometer_step + ped;
break;
case ATTR_DMP_PEDOMETER_TIME:
result = inv_get_pedometer_time(st, &ped);
tmp = st->pedometer_time + ped;
break;
default:
result = -EINVAL;
break;
}
mutex_unlock(&indio_dev->mlock);
if (result)
return -EINVAL;
return sprintf(buf, "%lld\n", tmp);
}
static ssize_t inv_attr64_store(struct device *dev,
struct device_attribute *attr, const char *buf, size_t count)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu_state *st = iio_priv(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
int result;
u64 data;
mutex_lock(&indio_dev->mlock);
if (st->chip_config.enable || (!st->chip_config.firmware_loaded)) {
mutex_unlock(&indio_dev->mlock);
return -EINVAL;
}
result = st->set_power_state(st, true);
if (result) {
mutex_unlock(&indio_dev->mlock);
return result;
}
result = kstrtoull(buf, 10, &data);
if (result)
goto attr64_store_fail;
switch (this_attr->address) {
case ATTR_DMP_PEDOMETER_STEPS:
result = write_be32_key_to_mem(st, 0, KEY_D_PEDSTD_STEPCTR);
if (result)
goto attr64_store_fail;
st->pedometer_step = data;
break;
case ATTR_DMP_PEDOMETER_TIME:
result = write_be32_key_to_mem(st, 0, KEY_D_PEDSTD_TIMECTR);
if (result)
goto attr64_store_fail;
st->pedometer_time = data;
break;
default:
result = -EINVAL;
break;
}
attr64_store_fail:
mutex_unlock(&indio_dev->mlock);
result = st->set_power_state(st, false);
if (result)
return result;
return count;
}
/*
* inv_attr_show() - calling this function will show current
* dmp parameters.
*/
static ssize_t inv_attr_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct iio_dev *indio_dev = dev_get_drvdata(dev);
struct inv_mpu_state *st = iio_priv(indio_dev);
struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
int result, axis;
s8 *m;