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I tried to use an M0 chip but ran into a few issues that were not present in the M4 project I have.
The first is that there is not a DWT present in most M0 chips, so it'll fail immediately (in srp/init.hpp, clock.hpp respectively). The second thing is that when the job_to_isr_mask gets invoked, it tries to do so with a job that has a negative index (SysTick_IRQn). It will throw warnings regarding permissiveness, but it will certainly not work. Lastly, as there is not a DWT timer, there should be a mechanism for using an alternate timer (or series of timers, as the resolution would be too low in many cases with purely 16-bit ones).
I'm not totally familiarized with the undergirding of crect yet, but if you don't have time to fix this, do you have any tips for me?
Hi, thanks for writing about this and bringing it to my attention.
Indeed, the Cortex-M0 support is severely lacking, and unfortunately I have had to place this project on the side for the time being.
If I remember correctly, 2 main issues needs to be fixed:
The use of DWT needs to be removed and use a 32-bit timer available in the MCU.
The priority masking algorithm (used for targets without BASEPRI) is currently disabled, which makes Cortex-M0 support broken. There was a bug in the metaprogramming around generating the mask which I never got to fixing before having to pause it.
If you want to use RTFM (crect), I'd currently recommend to use the Rust version which is actively maintained and can be found at https://github.com/japaric/cortex-m-rtfm
If you want to try and fix this, you are probably going to have a bad time unfortunately. I was in the middle of rewriteing the system backend from scratch to easily change between timers and other components, but this is a long way from finished, and the use of DWT it currently tightly tied into the core of the framework.
Sorry for the bad news there!
Cortex-M0(+) support is added from commit 46f24eb but it is not well tested.
TODO:
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