From 457fd38458ee945ffe99de0e7c13108a1f85d0f4 Mon Sep 17 00:00:00 2001
From: ccoffrin <carleton@coffrin.com>
Date: Mon, 13 May 2019 07:09:43 -0600
Subject: [PATCH] prep changelog and project for release

---
 CHANGELOG.md | 3 +++
 Project.toml | 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 1c49e3791..cbedff447 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -2,6 +2,9 @@ PowerModels.jl Change Log
 =========================
 
 ### Staged
+- nothing
+
+### v0.9.8
 - Added a test network with dangling buses, case5_db.m
 - Fixed voltage bound persistence bug in acr formulation (#497)
 
diff --git a/Project.toml b/Project.toml
index d011986fc..843d03264 100644
--- a/Project.toml
+++ b/Project.toml
@@ -2,7 +2,7 @@ name = "PowerModels"
 uuid = "c36e90e8-916a-50a6-bd94-075b64ef4655"
 authors = ["Carleton Coffrin"]
 repo = "https://github.com/lanl-ansi/PowerModels.jl"
-version = "0.9.7"
+version = "0.9.8"
 
 [deps]
 InfrastructureModels = "2030c09a-7f63-5d83-885d-db604e0e9cc0"