diff --git a/target/linux/realtek/base-files/etc/board.d/02_network b/target/linux/realtek/base-files/etc/board.d/02_network index 35c79cffa24b..e856ad7479ac 100644 --- a/target/linux/realtek/base-files/etc/board.d/02_network +++ b/target/linux/realtek/base-files/etc/board.d/02_network @@ -35,7 +35,9 @@ hpe,1920-8g|\ hpe,1920-8g-poe-65w|\ hpe,1920-8g-poe-180w|\ hpe,1920-16g|\ -hpe,1920-24g) +hpe,1920-24g|\ +hpe,1920-48g|\ +hpe,1920-48g-poe) label_mac=$(mtd_get_mac_binary factory 0x68) lan_mac=$label_mac mac_count1=$(hexdump -v -n 4 -s 0x110 -e '4 "%d"' $(find_mtd_part factory) 2>/dev/null) @@ -89,6 +91,11 @@ hpe,1920-8g-poe-65w) hpe,1920-8g-poe-180w) ucidef_set_poe 180 "$(filter_port_list_reverse "$lan_list" "lan9 lan10")" ;; +hpe,1920-48g-poe) + ucidef_set_poe 370 "lan8 lan7 lan6 lan5 lan4 lan3 lan2 lan1 lan16 lan15 lan14 lan13 lan12 lan11 lan10 lan9 lan24 lan23 + lan22 lan21 lan20 lan19 lan18 lan17 lan32 lan31 lan30 lan29 lan28 lan27 lan26 lan25 lan40 lan39 lan38 lan37 + lan36 lan35 lan34 lan33 lan48 lan47 lan46 lan45 lan44 lan43 lan42 lan41" + ;; netgear,gs110tpp-v1) ucidef_set_poe 130 "$(filter_port_list "$lan_list" "lan9 lan10")" ;; diff --git a/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi b/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi index 58f2c1f6c97e..262dd83d21c6 100644 --- a/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi +++ b/target/linux/realtek/dts/rtl8380_hpe_1920-8g.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "rtl838x.dtsi" -#include "rtl838x_hpe_1920.dtsi" +#include "rtl83xx_hpe_1920.dtsi" / { gpio1: rtl8231-gpio { diff --git a/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi b/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi index 5368b41c2769..af168067d4d9 100644 --- a/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi +++ b/target/linux/realtek/dts/rtl8382_hpe_1920.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "rtl838x.dtsi" -#include "rtl838x_hpe_1920.dtsi" +#include "rtl83xx_hpe_1920.dtsi" / { gpio1: rtl8231-gpio { diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts new file mode 100644 index 000000000000..e24277543412 --- /dev/null +++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "rtl8393_hpe_1920.dtsi" + +/ { + compatible = "hpe,1920-48g-poe", "realtek,rtl8393-soc"; + model = "HPE 1920-48G-PoE (JG928A)"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts new file mode 100644 index 000000000000..b6a6a1c433a7 --- /dev/null +++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "rtl8393_hpe_1920.dtsi" + +/ { + compatible = "hpe,1920-48g", "realtek,rtl8393-soc"; + model = "HPE 1920-48G (JG927A)"; +}; diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi new file mode 100644 index 000000000000..dda29e59e13b --- /dev/null +++ b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "rtl839x.dtsi" +#include "rtl83xx_hpe_1920.dtsi" + +#include + +/ { + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + leds { + compatible = "gpio-leds"; + + led_power: led-0 { + label = "green:power"; + color = ; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + }; + }; + + i2c0: i2c-gpio-0 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio0 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio0 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp0: sfp-p49 { + compatible = "sff,sfp"; + i2c-bus = <&i2c0>; + los-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio0 19 GPIO_ACTIVE_LOW>; + // tx-fault unconnected (TODO?) + // tx-disable connected to RTL8214FC (TODO?) + }; + + i2c1: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp1: sfp-p50 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>; + // tx-fault unconnected (TODO?) + // tx-disable connected to RTL8214FC (TODO?) + }; + + // not enabled due to shared I2C clock + i2c2: i2c-gpio-2 { + status = "disabled"; + compatible = "i2c-gpio"; + sda-gpios = <&gpio0 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio0 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp2: sfp-p51 { + compatible = "sff,sfp"; + i2c-bus = <&i2c2>; + los-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio0 22 GPIO_ACTIVE_LOW>; + // tx-fault unconnected (TODO?) + // tx-disable connected to RTL8214FC (TODO?) + }; + + // not enabled due to shared I2C clock + i2c3: i2c-gpio-3 { + status = "disabled"; + compatible = "i2c-gpio"; + sda-gpios = <&gpio0 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp3: sfp-p52 { + compatible = "sff,sfp"; + i2c-bus = <&i2c3>; + los-gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio0 15 GPIO_ACTIVE_LOW>; + // tx-fault unconnected (TODO?) + // tx-disable connected to RTL8214FC (TODO?) + }; +}; + +ðernet0 { + mdio: mdio-bus { + compatible = "realtek,rtl838x-mdio"; + regmap = <ðernet0>; + #address-cells = <1>; + #size-cells = <0>; + + EXTERNAL_PHY(0) + EXTERNAL_PHY(1) + EXTERNAL_PHY(2) + EXTERNAL_PHY(3) + EXTERNAL_PHY(4) + EXTERNAL_PHY(5) + EXTERNAL_PHY(6) + EXTERNAL_PHY(7) + + EXTERNAL_PHY(8) + EXTERNAL_PHY(9) + EXTERNAL_PHY(10) + EXTERNAL_PHY(11) + EXTERNAL_PHY(12) + EXTERNAL_PHY(13) + EXTERNAL_PHY(14) + EXTERNAL_PHY(15) + + EXTERNAL_PHY(16) + EXTERNAL_PHY(17) + EXTERNAL_PHY(18) + EXTERNAL_PHY(19) + EXTERNAL_PHY(20) + EXTERNAL_PHY(21) + EXTERNAL_PHY(22) + EXTERNAL_PHY(23) + + EXTERNAL_PHY(24) + EXTERNAL_PHY(25) + EXTERNAL_PHY(26) + EXTERNAL_PHY(27) + EXTERNAL_PHY(28) + EXTERNAL_PHY(29) + EXTERNAL_PHY(30) + EXTERNAL_PHY(31) + + EXTERNAL_PHY(32) + EXTERNAL_PHY(33) + EXTERNAL_PHY(34) + EXTERNAL_PHY(35) + EXTERNAL_PHY(36) + EXTERNAL_PHY(37) + EXTERNAL_PHY(38) + EXTERNAL_PHY(39) + + EXTERNAL_PHY(40) + EXTERNAL_PHY(41) + EXTERNAL_PHY(42) + EXTERNAL_PHY(43) + EXTERNAL_PHY(44) + EXTERNAL_PHY(45) + EXTERNAL_PHY(46) + EXTERNAL_PHY(47) + + EXTERNAL_SFP_PHY_FULL(48, 1) + EXTERNAL_SFP_PHY_FULL(49, 3) + EXTERNAL_SFP_PHY_FULL(50, 0) + EXTERNAL_SFP_PHY_FULL(51, 2) + }; +}; + +&switch0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + SWITCH_PORT(0, 1, qsgmii) + SWITCH_PORT(1, 2, qsgmii) + SWITCH_PORT(2, 3, qsgmii) + SWITCH_PORT(3, 4, qsgmii) + SWITCH_PORT(4, 5, qsgmii) + SWITCH_PORT(5, 6, qsgmii) + SWITCH_PORT(6, 7, qsgmii) + SWITCH_PORT(7, 8, qsgmii) + + SWITCH_PORT(8, 9, qsgmii) + SWITCH_PORT(9, 10, qsgmii) + SWITCH_PORT(10, 11, qsgmii) + SWITCH_PORT(11, 12, qsgmii) + SWITCH_PORT(12, 13, qsgmii) + SWITCH_PORT(13, 14, qsgmii) + SWITCH_PORT(14, 15, qsgmii) + SWITCH_PORT(15, 16, qsgmii) + + SWITCH_PORT(16, 17, qsgmii) + SWITCH_PORT(17, 18, qsgmii) + SWITCH_PORT(18, 19, qsgmii) + SWITCH_PORT(19, 20, qsgmii) + SWITCH_PORT(20, 21, qsgmii) + SWITCH_PORT(21, 22, qsgmii) + SWITCH_PORT(22, 23, qsgmii) + SWITCH_PORT(23, 24, qsgmii) + + SWITCH_PORT(24, 25, qsgmii) + SWITCH_PORT(25, 26, qsgmii) + SWITCH_PORT(26, 27, qsgmii) + SWITCH_PORT(27, 28, qsgmii) + SWITCH_PORT(28, 29, qsgmii) + SWITCH_PORT(29, 30, qsgmii) + SWITCH_PORT(30, 31, qsgmii) + SWITCH_PORT(31, 32, qsgmii) + + SWITCH_PORT(32, 33, qsgmii) + SWITCH_PORT(33, 34, qsgmii) + SWITCH_PORT(34, 35, qsgmii) + SWITCH_PORT(35, 36, qsgmii) + SWITCH_PORT(36, 37, qsgmii) + SWITCH_PORT(37, 38, qsgmii) + SWITCH_PORT(38, 39, qsgmii) + SWITCH_PORT(39, 40, qsgmii) + + SWITCH_PORT(40, 41, qsgmii) + SWITCH_PORT(41, 42, qsgmii) + SWITCH_PORT(42, 43, qsgmii) + SWITCH_PORT(43, 44, qsgmii) + SWITCH_PORT(44, 45, qsgmii) + SWITCH_PORT(45, 46, qsgmii) + SWITCH_PORT(46, 47, qsgmii) + SWITCH_PORT(47, 48, qsgmii) + + SWITCH_PORT(48, 50, qsgmii) + SWITCH_PORT(49, 52, qsgmii) + SWITCH_PORT(50, 49, qsgmii) + SWITCH_PORT(51, 51, qsgmii) + + port@52 { + ethernet = <ðernet0>; + reg = <52>; + phy-mode = "internal"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; diff --git a/target/linux/realtek/dts/rtl838x_hpe_1920.dtsi b/target/linux/realtek/dts/rtl83xx_hpe_1920.dtsi similarity index 100% rename from target/linux/realtek/dts/rtl838x_hpe_1920.dtsi rename to target/linux/realtek/dts/rtl83xx_hpe_1920.dtsi diff --git a/target/linux/realtek/image/rtl839x.mk b/target/linux/realtek/image/rtl839x.mk index 65078e0c4442..14d23ff37100 100644 --- a/target/linux/realtek/image/rtl839x.mk +++ b/target/linux/realtek/image/rtl839x.mk @@ -9,6 +9,23 @@ define Device/d-link_dgs-1210-52 endef TARGET_DEVICES += d-link_dgs-1210-52 +define Device/hpe_1920-48g + $(Device/hpe_1920) + SOC := rtl8393 + DEVICE_MODEL := 1920-48G (JG927A) + H3C_DEVICE_ID := 0x0001002a +endef +TARGET_DEVICES += hpe_1920-48g + +define Device/hpe_1920-48g-poe + $(Device/hpe_1920) + SOC := rtl8393 + DEVICE_MODEL := 1920-48G-PoE (JG928A) + DEVICE_PACKAGES += realtek-poe + H3C_DEVICE_ID := 0x0001002b +endef +TARGET_DEVICES += hpe_1920-48g-poe + # When the factory image won't fit anymore, it can be removed. # New installation will be performed booting the initramfs image from # ram and then flashing the sysupgrade image from OpenWrt diff --git a/target/linux/realtek/rtl839x/config-5.15 b/target/linux/realtek/rtl839x/config-5.15 index 5fa52ba882ee..c8d841c01e92 100644 --- a/target/linux/realtek/rtl839x/config-5.15 +++ b/target/linux/realtek/rtl839x/config-5.15 @@ -88,6 +88,8 @@ CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_REALTEK_OTTO=y CONFIG_GPIO_RTL8231=y +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set CONFIG_GRO_CELLS=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDWARE_WATCHPOINTS=y @@ -150,6 +152,7 @@ CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPLIT_BRNIMAGE_FW=y CONFIG_MTD_SPLIT_EVA_FW=y CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_H3C_VFS=y CONFIG_MTD_SPLIT_TPLINK_FW=y CONFIG_MTD_SPLIT_UIMAGE_FW=y CONFIG_MTD_VIRT_CONCAT=y diff --git a/target/linux/realtek/rtl839x/config-6.6 b/target/linux/realtek/rtl839x/config-6.6 index 5fa52ba882ee..c8d841c01e92 100644 --- a/target/linux/realtek/rtl839x/config-6.6 +++ b/target/linux/realtek/rtl839x/config-6.6 @@ -88,6 +88,8 @@ CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_REALTEK_OTTO=y CONFIG_GPIO_RTL8231=y +CONFIG_GPIO_WATCHDOG=y +# CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set CONFIG_GRO_CELLS=y CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDWARE_WATCHPOINTS=y @@ -150,6 +152,7 @@ CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPLIT_BRNIMAGE_FW=y CONFIG_MTD_SPLIT_EVA_FW=y CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_H3C_VFS=y CONFIG_MTD_SPLIT_TPLINK_FW=y CONFIG_MTD_SPLIT_UIMAGE_FW=y CONFIG_MTD_VIRT_CONCAT=y