diff --git a/README.md b/README.md
index 16f5a05d..1feac653 100644
--- a/README.md
+++ b/README.md
@@ -45,7 +45,7 @@ Check out the [fault tutorial](https://github.com/leonardt/fault/tree/master/tut
 Here is a simple ALU defined in magma.
 ```python
 import magma as m
-import mantle
+# import mantle
 
 
 class ConfigReg(m.Circuit):
diff --git a/examples/sv_tb/sv_tb.py b/examples/sv_tb/sv_tb.py
index 9e2a8338..4293f863 100644
--- a/examples/sv_tb/sv_tb.py
+++ b/examples/sv_tb/sv_tb.py
@@ -1,7 +1,7 @@
 import random
 
 import magma as m
-import mantle
+# import mantle
 import fault
 
 
diff --git a/examples/test_simple_alu.py b/examples/test_simple_alu.py
index 258f6a1e..ec14277b 100644
--- a/examples/test_simple_alu.py
+++ b/examples/test_simple_alu.py
@@ -1,5 +1,5 @@
 import magma as m
-import mantle
+# import mantle
 import operator
 import fault
 import pytest
diff --git a/tests/common.py b/tests/common.py
index 4359de05..a889583b 100644
--- a/tests/common.py
+++ b/tests/common.py
@@ -1,6 +1,6 @@
 import shutil
 import magma as m
-import mantle
+# import mantle
 
 
 def pytest_sim_params(metafunc, *args, exclude=None):
@@ -93,9 +93,9 @@ class TestPeekCircuit(m.Circuit):
 
 class ConfigReg(m.Circuit):
     io = m.IO(D=m.In(m.Bits[2]), Q=m.Out(m.Bits[2])) + \
-        m.ClockIO(has_ce=True)
+        m.ClockIO(has_enable=True)
 
-    reg = mantle.Register(2, has_ce=True, name="conf_reg")
+    reg = m.Register(m.Bits[2], has_enable=True)(name="conf_reg")
     io.Q @= reg(io.D, CE=io.CE)
 
 
@@ -108,7 +108,7 @@ class SimpleALU(m.Circuit):
               ) + m.ClockIO()
 
     opcode = ConfigReg(name="config_reg")(io.config_data, CE=io.config_en)
-    io.c @= mantle.mux(
+    io.c @= m.mux(
         # udiv not implemented
         # [io.a + io.b, io.a - io.b, io.a * io.b, io.a / io.b], opcode)
         # use arbitrary fourth op
diff --git a/tests/test_env_mod.py b/tests/test_env_mod.py
index 5736fad5..bd1a91aa 100644
--- a/tests/test_env_mod.py
+++ b/tests/test_env_mod.py
@@ -1,5 +1,5 @@
 import fault
-import mantle
+# import mantle
 import magma as m
 from .common import pytest_sim_params
 
diff --git a/tests/test_expressions.py b/tests/test_expressions.py
index 749fc242..04080dfe 100644
--- a/tests/test_expressions.py
+++ b/tests/test_expressions.py
@@ -8,7 +8,7 @@
 
 import fault
 import magma as m
-import mantle
+# import mantle
 import hwtypes
 
 
diff --git a/tests/test_functional_tester.py b/tests/test_functional_tester.py
index dce5e8f1..07c33415 100644
--- a/tests/test_functional_tester.py
+++ b/tests/test_functional_tester.py
@@ -2,7 +2,7 @@
 from hwtypes import BitVector
 from fault.functional_tester import FunctionalTester
 import magma as m
-import mantle
+# import mantle
 import tempfile
 import pytest
 
@@ -24,7 +24,7 @@ class Configurable(m.Circuit):
                   config_en=m.In(m.Enable), O=m.Out(m.Bits[32])
                   ) + m.ClockIO()
 
-        reg = mantle.Register(32, has_ce=True)
+        reg = m.Register(m.Bits[32], has_enable=True)()
 
         reg(io.config_data,
             CE=(io.config_addr == m.bits(1, 32)) & m.bit(io.config_en))
diff --git a/tests/test_power_domains.py b/tests/test_power_domains.py
index 5eeed0af..313066b5 100644
--- a/tests/test_power_domains.py
+++ b/tests/test_power_domains.py
@@ -1,5 +1,5 @@
 import magma as m
-import mantle
+# import mantle
 import fault
 from hwtypes import BitVector
 import pytest
diff --git a/tests/test_select_model.py b/tests/test_select_model.py
index 8d28638f..e7bd9860 100644
--- a/tests/test_select_model.py
+++ b/tests/test_select_model.py
@@ -3,7 +3,7 @@
 subcomponents of a DUT)
 """
 import magma as m
-import mantle
+# import mantle
 import fault
 import hwtypes as ht
 import os
diff --git a/tests/test_test_vectors.py b/tests/test_test_vectors.py
index 464898b8..ddbab618 100644
--- a/tests/test_test_vectors.py
+++ b/tests/test_test_vectors.py
@@ -2,7 +2,7 @@
 import pytest
 from hwtypes import Bit
 import magma as m
-import mantle
+# import mantle
 from fault.test_vectors import (generate_function_test_vectors,
                                 generate_simulator_test_vectors)
 from fault.value import AnyValue
diff --git a/tests/test_tester/test_interactive.py b/tests/test_tester/test_interactive.py
index 2eb4ae1f..df6fda9b 100644
--- a/tests/test_tester/test_interactive.py
+++ b/tests/test_tester/test_interactive.py
@@ -2,7 +2,7 @@
 from ..common import AndCircuit, SimpleALU, TestTupleCircuit, \
     TestNestedArraysCircuit, TestNestedArrayTupleCircuit
 from hwtypes import BitVector
-from mantle import DefineCounter
+import magma as m
 
 
 def test_interactive_basic(capsys):
@@ -38,7 +38,7 @@ def test_interactive_clock():
 
 
 def test_counter():
-    Counter4 = DefineCounter(4)
+    Counter4 = m.mantle.Counter(4)
     tester = PythonTester(Counter4, Counter4.CLK)
     tester.CLK = 0
     tester.wait_until_high(Counter4.O[3])
diff --git a/tutorial/README.md b/tutorial/README.md
index 217ab1f8..d03c4fca 100644
--- a/tutorial/README.md
+++ b/tutorial/README.md
@@ -191,7 +191,7 @@ Here's an example:
 
 ```python
 import magma as m
-import mantle
+# import mantle
 import fault
 
 
@@ -307,7 +307,7 @@ Suppose you had the following definition of a simple, configurable ALU in magma
 (source: [fault/tutorial/exercise_1.py](./exercise_1.py)):
 ```python
 import magma as m
-import mantle
+# import mantle
 
 
 class ConfigReg(m.Circuit):
@@ -405,7 +405,7 @@ Suppose you have the following two memory modules defined in magma (source:
 [fault/tutorial/exercise_2.py](./exercise_2.py)):
 ```python
 import magma as m
-import mantle
+# import mantle
 import fault
 
 
diff --git a/tutorial/exercise_1.py b/tutorial/exercise_1.py
index b54d3261..ef0e73a0 100644
--- a/tutorial/exercise_1.py
+++ b/tutorial/exercise_1.py
@@ -1,5 +1,5 @@
 import magma as m
-import mantle
+# import mantle
 
 
 class ConfigReg(m.Circuit):
diff --git a/tutorial/exercise_2.py b/tutorial/exercise_2.py
index cd0d7cbd..c21d2e1e 100644
--- a/tutorial/exercise_2.py
+++ b/tutorial/exercise_2.py
@@ -1,5 +1,5 @@
 import magma as m
-import mantle
+# import mantle
 import fault
 from reset_tester import ResetTester
 
diff --git a/tutorial/tff.py b/tutorial/tff.py
index c32f217b..5792b3d0 100644
--- a/tutorial/tff.py
+++ b/tutorial/tff.py
@@ -1,5 +1,5 @@
 import magma as m
-import mantle
+# import mantle
 import fault